cvp_hfi.c 116 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <asm/memory.h>
  6. #include <linux/coresight-stm.h>
  7. #include <linux/delay.h>
  8. #include <linux/devfreq.h>
  9. #include <linux/hash.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/io.h>
  12. #include <linux/iommu.h>
  13. #include <linux/iopoll.h>
  14. #include <linux/of.h>
  15. #include <linux/pm_qos.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/slab.h>
  18. #include <linux/workqueue.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/soc/qcom/llcc-qcom.h>
  21. #include <linux/qcom_scm.h>
  22. #include <linux/soc/qcom/smem.h>
  23. #include <soc/qcom/subsystem_restart.h>
  24. #include <linux/dma-mapping.h>
  25. #include <linux/reset.h>
  26. #include "hfi_packetization.h"
  27. #include "msm_cvp_debug.h"
  28. #include "cvp_core_hfi.h"
  29. #include "cvp_hfi_helper.h"
  30. #include "cvp_hfi_io.h"
  31. #include "msm_cvp_dsp.h"
  32. #define FIRMWARE_SIZE 0X00A00000
  33. #define REG_ADDR_OFFSET_BITMASK 0x000FFFFF
  34. #define QDSS_IOVA_START 0x80001000
  35. #define MIN_PAYLOAD_SIZE 3
  36. const struct msm_cvp_hfi_defs cvp_hfi_defs[] = {
  37. {
  38. .size = HFI_DFS_CONFIG_CMD_SIZE,
  39. .type = HFI_CMD_SESSION_CVP_DFS_CONFIG,
  40. .buf_offset = 0,
  41. .buf_num = 0,
  42. .resp = HAL_SESSION_DFS_CONFIG_CMD_DONE,
  43. },
  44. {
  45. .size = HFI_DFS_FRAME_CMD_SIZE,
  46. .type = HFI_CMD_SESSION_CVP_DFS_FRAME,
  47. .buf_offset = HFI_DFS_FRAME_BUFFERS_OFFSET,
  48. .buf_num = HFI_DFS_BUF_NUM,
  49. .resp = HAL_NO_RESP,
  50. },
  51. {
  52. .size = HFI_DME_CONFIG_CMD_SIZE,
  53. .type = HFI_CMD_SESSION_CVP_DME_CONFIG,
  54. .buf_offset = 0,
  55. .buf_num = 0,
  56. .resp = HAL_SESSION_DME_CONFIG_CMD_DONE,
  57. },
  58. {
  59. .size = HFI_DME_BASIC_CONFIG_CMD_SIZE,
  60. .type = HFI_CMD_SESSION_CVP_DME_BASIC_CONFIG,
  61. .buf_offset = 0,
  62. .buf_num = 0,
  63. .resp = HAL_SESSION_DME_BASIC_CONFIG_CMD_DONE,
  64. },
  65. {
  66. .size = HFI_DME_FRAME_CMD_SIZE,
  67. .type = HFI_CMD_SESSION_CVP_DME_FRAME,
  68. .buf_offset = HFI_DME_FRAME_BUFFERS_OFFSET,
  69. .buf_num = HFI_DME_BUF_NUM,
  70. .resp = HAL_NO_RESP,
  71. },
  72. {
  73. .size = HFI_PERSIST_CMD_SIZE,
  74. .type = HFI_CMD_SESSION_CVP_SET_PERSIST_BUFFERS,
  75. .buf_offset = HFI_PERSIST_BUFFERS_OFFSET,
  76. .buf_num = HFI_PERSIST_BUF_NUM,
  77. .resp = HAL_SESSION_PERSIST_SET_DONE,
  78. },
  79. {
  80. .size = 0xffffffff,
  81. .type = HFI_CMD_SESSION_CVP_RELEASE_PERSIST_BUFFERS,
  82. .buf_offset = 0,
  83. .buf_num = 0,
  84. .resp = HAL_SESSION_PERSIST_REL_DONE,
  85. },
  86. {
  87. .size = HFI_DS_CMD_SIZE,
  88. .type = HFI_CMD_SESSION_CVP_DS,
  89. .buf_offset = HFI_DS_BUFFERS_OFFSET,
  90. .buf_num = HFI_DS_BUF_NUM,
  91. .resp = HAL_NO_RESP,
  92. },
  93. {
  94. .size = HFI_OF_CONFIG_CMD_SIZE,
  95. .type = HFI_CMD_SESSION_CVP_CV_TME_CONFIG,
  96. .buf_offset = 0,
  97. .buf_num = 0,
  98. .resp = HAL_SESSION_TME_CONFIG_CMD_DONE,
  99. },
  100. {
  101. .size = HFI_OF_FRAME_CMD_SIZE,
  102. .type = HFI_CMD_SESSION_CVP_CV_TME_FRAME,
  103. .buf_offset = HFI_OF_BUFFERS_OFFSET,
  104. .buf_num = HFI_OF_BUF_NUM,
  105. .resp = HAL_NO_RESP,
  106. },
  107. {
  108. .size = HFI_ODT_CONFIG_CMD_SIZE,
  109. .type = HFI_CMD_SESSION_CVP_CV_ODT_CONFIG,
  110. .buf_offset = 0,
  111. .buf_num = 0,
  112. .resp = HAL_SESSION_ODT_CONFIG_CMD_DONE,
  113. },
  114. {
  115. .size = HFI_ODT_FRAME_CMD_SIZE,
  116. .type = HFI_CMD_SESSION_CVP_CV_ODT_FRAME,
  117. .buf_offset = HFI_ODT_BUFFERS_OFFSET,
  118. .buf_num = HFI_ODT_BUF_NUM,
  119. .resp = HAL_NO_RESP,
  120. },
  121. {
  122. .size = HFI_OD_CONFIG_CMD_SIZE,
  123. .type = HFI_CMD_SESSION_CVP_CV_OD_CONFIG,
  124. .buf_offset = 0,
  125. .buf_num = 0,
  126. .resp = HAL_SESSION_OD_CONFIG_CMD_DONE,
  127. },
  128. {
  129. .size = HFI_OD_FRAME_CMD_SIZE,
  130. .type = HFI_CMD_SESSION_CVP_CV_OD_FRAME,
  131. .buf_offset = HFI_OD_BUFFERS_OFFSET,
  132. .buf_num = HFI_OD_BUF_NUM,
  133. .resp = HAL_NO_RESP,
  134. },
  135. {
  136. .size = HFI_NCC_CONFIG_CMD_SIZE,
  137. .type = HFI_CMD_SESSION_CVP_NCC_CONFIG,
  138. .buf_offset = 0,
  139. .buf_num = 0,
  140. .resp = HAL_SESSION_NCC_CONFIG_CMD_DONE,
  141. },
  142. {
  143. .size = HFI_NCC_FRAME_CMD_SIZE,
  144. .type = HFI_CMD_SESSION_CVP_NCC_FRAME,
  145. .buf_offset = HFI_NCC_BUFFERS_OFFSET,
  146. .buf_num = HFI_NCC_BUF_NUM,
  147. .resp = HAL_NO_RESP,
  148. },
  149. {
  150. .size = HFI_ICA_CONFIG_CMD_SIZE,
  151. .type = HFI_CMD_SESSION_CVP_ICA_CONFIG,
  152. .buf_offset = 0,
  153. .buf_num = 0,
  154. .resp = HAL_SESSION_ICA_CONFIG_CMD_DONE,
  155. },
  156. {
  157. .size = HFI_ICA_FRAME_CMD_SIZE,
  158. .type = HFI_CMD_SESSION_CVP_ICA_FRAME,
  159. .buf_offset = HFI_ICA_BUFFERS_OFFSET,
  160. .buf_num = HFI_ICA_BUF_NUM,
  161. .resp = HAL_NO_RESP,
  162. },
  163. {
  164. .size = HFI_HCD_CONFIG_CMD_SIZE,
  165. .type = HFI_CMD_SESSION_CVP_HCD_CONFIG,
  166. .buf_offset = 0,
  167. .buf_num = 0,
  168. .resp = HAL_SESSION_HCD_CONFIG_CMD_DONE,
  169. },
  170. {
  171. .size = HFI_HCD_FRAME_CMD_SIZE,
  172. .type = HFI_CMD_SESSION_CVP_HCD_FRAME,
  173. .buf_offset = HFI_HCD_BUFFERS_OFFSET,
  174. .buf_num = HFI_HCD_BUF_NUM,
  175. .resp = HAL_NO_RESP,
  176. },
  177. {
  178. .size = HFI_DCM_CONFIG_CMD_SIZE,
  179. .type = HFI_CMD_SESSION_CVP_DC_CONFIG,
  180. .buf_offset = 0,
  181. .buf_num = 0,
  182. .resp = HAL_SESSION_DC_CONFIG_CMD_DONE,
  183. },
  184. {
  185. .size = HFI_DCM_FRAME_CMD_SIZE,
  186. .type = HFI_CMD_SESSION_CVP_DC_FRAME,
  187. .buf_offset = HFI_DCM_BUFFERS_OFFSET,
  188. .buf_num = HFI_DCM_BUF_NUM,
  189. .resp = HAL_NO_RESP,
  190. },
  191. {
  192. .size = HFI_DCM_CONFIG_CMD_SIZE,
  193. .type = HFI_CMD_SESSION_CVP_DCM_CONFIG,
  194. .buf_offset = 0,
  195. .buf_num = 0,
  196. .resp = HAL_SESSION_DCM_CONFIG_CMD_DONE,
  197. },
  198. {
  199. .size = HFI_DCM_FRAME_CMD_SIZE,
  200. .type = HFI_CMD_SESSION_CVP_DCM_FRAME,
  201. .buf_offset = HFI_DCM_BUFFERS_OFFSET,
  202. .buf_num = HFI_DCM_BUF_NUM,
  203. .resp = HAL_NO_RESP,
  204. },
  205. {
  206. .size = HFI_PYS_HCD_CONFIG_CMD_SIZE,
  207. .type = HFI_CMD_SESSION_CVP_PYS_HCD_CONFIG,
  208. .buf_offset = 0,
  209. .buf_num = 0,
  210. .resp = HAL_SESSION_PYS_HCD_CONFIG_CMD_DONE,
  211. },
  212. {
  213. .size = HFI_PYS_HCD_FRAME_CMD_SIZE,
  214. .type = HFI_CMD_SESSION_CVP_PYS_HCD_FRAME,
  215. .buf_offset = HFI_PYS_HCD_BUFFERS_OFFSET,
  216. .buf_num = HFI_PYS_HCD_BUF_NUM,
  217. .resp = HAL_NO_RESP,
  218. },
  219. {
  220. .size = 0xFFFFFFFF,
  221. .type = HFI_CMD_SESSION_CVP_SET_MODEL_BUFFERS,
  222. .buf_offset = 0,
  223. .buf_num = 0,
  224. .resp = HAL_SESSION_MODEL_BUF_CMD_DONE,
  225. },
  226. {
  227. .size = 0xFFFFFFFF,
  228. .type = HFI_CMD_SESSION_CVP_FD_CONFIG,
  229. .buf_offset = 0,
  230. .buf_num = 0,
  231. .resp = HAL_SESSION_FD_CONFIG_CMD_DONE,
  232. },
  233. {
  234. .size = 0xFFFFFFFF,
  235. .type = HFI_CMD_SESSION_CVP_FD_FRAME,
  236. .buf_offset = 0,
  237. .buf_num = 0,
  238. .resp = HAL_NO_RESP,
  239. },
  240. };
  241. struct cvp_tzbsp_memprot {
  242. u32 cp_start;
  243. u32 cp_size;
  244. u32 cp_nonpixel_start;
  245. u32 cp_nonpixel_size;
  246. };
  247. #define TZBSP_PIL_SET_STATE 0xA
  248. #define TZBSP_CVP_PAS_ID 26
  249. /* Poll interval in uS */
  250. #define POLL_INTERVAL_US 50
  251. enum tzbsp_subsys_state {
  252. TZ_SUBSYS_STATE_SUSPEND = 0,
  253. TZ_SUBSYS_STATE_RESUME = 1,
  254. TZ_SUBSYS_STATE_RESTORE_THRESHOLD = 2,
  255. };
  256. const struct msm_cvp_gov_data CVP_DEFAULT_BUS_VOTE = {
  257. .data = NULL,
  258. .data_count = 0,
  259. };
  260. const int cvp_max_packets = 32;
  261. static void iris_hfi_pm_handler(struct work_struct *work);
  262. static DECLARE_DELAYED_WORK(iris_hfi_pm_work, iris_hfi_pm_handler);
  263. static inline int __resume(struct iris_hfi_device *device);
  264. static inline int __suspend(struct iris_hfi_device *device);
  265. static int __disable_regulators(struct iris_hfi_device *device);
  266. static int __enable_regulators(struct iris_hfi_device *device);
  267. static inline int __prepare_enable_clks(struct iris_hfi_device *device);
  268. static inline void __disable_unprepare_clks(struct iris_hfi_device *device);
  269. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet);
  270. static int __initialize_packetization(struct iris_hfi_device *device);
  271. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  272. u32 session_id);
  273. static bool __is_session_valid(struct iris_hfi_device *device,
  274. struct cvp_hal_session *session, const char *func);
  275. static int __set_clocks(struct iris_hfi_device *device, u32 freq);
  276. static int __iface_cmdq_write(struct iris_hfi_device *device,
  277. void *pkt);
  278. static int __load_fw(struct iris_hfi_device *device);
  279. static void __unload_fw(struct iris_hfi_device *device);
  280. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state);
  281. static int __enable_subcaches(struct iris_hfi_device *device);
  282. static int __set_subcaches(struct iris_hfi_device *device);
  283. static int __release_subcaches(struct iris_hfi_device *device);
  284. static int __disable_subcaches(struct iris_hfi_device *device);
  285. static int __power_collapse(struct iris_hfi_device *device, bool force);
  286. static int iris_hfi_noc_error_info(void *dev);
  287. static void interrupt_init_iris2(struct iris_hfi_device *device);
  288. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device);
  289. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device);
  290. static int reset_ahb2axi_bridge(struct iris_hfi_device *device);
  291. static void power_off_iris2(struct iris_hfi_device *device);
  292. static int __set_ubwc_config(struct iris_hfi_device *device);
  293. static void __noc_error_info_iris2(struct iris_hfi_device *device);
  294. static struct iris_hfi_vpu_ops iris2_ops = {
  295. .interrupt_init = interrupt_init_iris2,
  296. .setup_dsp_uc_memmap = setup_dsp_uc_memmap_vpu5,
  297. .clock_config_on_enable = clock_config_on_enable_vpu5,
  298. .reset_ahb2axi_bridge = reset_ahb2axi_bridge,
  299. .power_off = power_off_iris2,
  300. .noc_error_info = __noc_error_info_iris2,
  301. };
  302. /**
  303. * Utility function to enforce some of our assumptions. Spam calls to this
  304. * in hotspots in code to double check some of the assumptions that we hold.
  305. */
  306. static inline void __strict_check(struct iris_hfi_device *device)
  307. {
  308. msm_cvp_res_handle_fatal_hw_error(device->res,
  309. !mutex_is_locked(&device->lock));
  310. }
  311. static inline void __set_state(struct iris_hfi_device *device,
  312. enum iris_hfi_state state)
  313. {
  314. device->state = state;
  315. }
  316. static inline bool __core_in_valid_state(struct iris_hfi_device *device)
  317. {
  318. return device->state != IRIS_STATE_DEINIT;
  319. }
  320. static inline bool is_sys_cache_present(struct iris_hfi_device *device)
  321. {
  322. return device->res->sys_cache_present;
  323. }
  324. #define ROW_SIZE 32
  325. int get_pkt_index(struct cvp_hal_session_cmd_pkt *hdr)
  326. {
  327. int i, pkt_num = ARRAY_SIZE(cvp_hfi_defs);
  328. for (i = 0; i < pkt_num; i++)
  329. if (cvp_hfi_defs[i].type == hdr->packet_type)
  330. return i;
  331. return -EINVAL;
  332. }
  333. int get_hfi_version(void)
  334. {
  335. struct msm_cvp_core *core;
  336. struct iris_hfi_device *hfi;
  337. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  338. hfi = (struct iris_hfi_device *)core->device->hfi_device_data;
  339. return hfi->version;
  340. }
  341. unsigned int get_msg_size(void)
  342. {
  343. return sizeof(struct cvp_hfi_msg_session_hdr);
  344. }
  345. unsigned int get_msg_session_id(void *msg)
  346. {
  347. struct cvp_hfi_msg_session_hdr *hdr =
  348. (struct cvp_hfi_msg_session_hdr *)msg;
  349. return hdr->session_id;
  350. }
  351. unsigned int get_msg_errorcode(void *msg)
  352. {
  353. struct cvp_hfi_msg_session_hdr *hdr =
  354. (struct cvp_hfi_msg_session_hdr *)msg;
  355. return hdr->error_type;
  356. }
  357. int get_msg_opconfigs(void *msg, unsigned int *session_id,
  358. unsigned int *error_type, unsigned int *config_id)
  359. {
  360. struct cvp_hfi_msg_session_op_cfg_packet *cfg =
  361. (struct cvp_hfi_msg_session_op_cfg_packet *)msg;
  362. *session_id = cfg->session_id;
  363. *error_type = cfg->error_type;
  364. *config_id = cfg->op_conf_id;
  365. return 0;
  366. }
  367. int get_signal_from_pkt_type(unsigned int type)
  368. {
  369. int i, pkt_num = ARRAY_SIZE(cvp_hfi_defs);
  370. for (i = 0; i < pkt_num; i++)
  371. if (cvp_hfi_defs[i].type == type)
  372. return cvp_hfi_defs[i].resp;
  373. return -EINVAL;
  374. }
  375. static void __dump_packet(u8 *packet, enum cvp_msg_prio log_level)
  376. {
  377. u32 c = 0, packet_size = *(u32 *)packet;
  378. /*
  379. * row must contain enough for 0xdeadbaad * 8 to be converted into
  380. * "de ad ba ab " * 8 + '\0'
  381. */
  382. char row[3 * ROW_SIZE];
  383. for (c = 0; c * ROW_SIZE < packet_size; ++c) {
  384. int bytes_to_read = ((c + 1) * ROW_SIZE > packet_size) ?
  385. packet_size % ROW_SIZE : ROW_SIZE;
  386. hex_dump_to_buffer(packet + c * ROW_SIZE, bytes_to_read,
  387. ROW_SIZE, 4, row, sizeof(row), false);
  388. dprintk(log_level, "%s\n", row);
  389. }
  390. }
  391. static int __dsp_suspend(struct iris_hfi_device *device, bool force, u32 flags)
  392. {
  393. int rc;
  394. struct cvp_hal_session *temp;
  395. if (msm_cvp_dsp_disable)
  396. return 0;
  397. list_for_each_entry(temp, &device->sess_head, list) {
  398. /* if forceful suspend, don't check session pause info */
  399. if (force)
  400. continue;
  401. /* don't suspend if cvp session is not paused */
  402. if (!(temp->flags & SESSION_PAUSE)) {
  403. dprintk(CVP_DSP,
  404. "%s: cvp session %x not paused\n",
  405. __func__, hash32_ptr(temp));
  406. return -EBUSY;
  407. }
  408. }
  409. dprintk(CVP_DSP, "%s: suspend dsp\n", __func__);
  410. rc = cvp_dsp_suspend(flags);
  411. if (rc) {
  412. dprintk(CVP_ERR, "%s: dsp suspend failed with error %d\n",
  413. __func__, rc);
  414. return -EINVAL;
  415. }
  416. dprintk(CVP_DSP, "%s: dsp suspended\n", __func__);
  417. return 0;
  418. }
  419. static int __dsp_resume(struct iris_hfi_device *device, u32 flags)
  420. {
  421. int rc;
  422. if (msm_cvp_dsp_disable)
  423. return 0;
  424. dprintk(CVP_DSP, "%s: resume dsp\n", __func__);
  425. rc = cvp_dsp_resume(flags);
  426. if (rc) {
  427. dprintk(CVP_ERR,
  428. "%s: dsp resume failed with error %d\n",
  429. __func__, rc);
  430. return rc;
  431. }
  432. dprintk(CVP_DSP, "%s: dsp resumed\n", __func__);
  433. return rc;
  434. }
  435. static int __dsp_shutdown(struct iris_hfi_device *device, u32 flags)
  436. {
  437. int rc;
  438. if (msm_cvp_dsp_disable)
  439. return 0;
  440. dprintk(CVP_DSP, "%s: shutdown dsp\n", __func__);
  441. rc = cvp_dsp_shutdown(flags);
  442. if (rc) {
  443. dprintk(CVP_ERR,
  444. "%s: dsp shutdown failed with error %d\n",
  445. __func__, rc);
  446. WARN_ON(1);
  447. }
  448. dprintk(CVP_DSP, "%s: dsp shutdown successful\n", __func__);
  449. return rc;
  450. }
  451. static int __acquire_regulator(struct regulator_info *rinfo,
  452. struct iris_hfi_device *device)
  453. {
  454. int rc = 0;
  455. if (rinfo->has_hw_power_collapse) {
  456. rc = regulator_set_mode(rinfo->regulator,
  457. REGULATOR_MODE_NORMAL);
  458. if (rc) {
  459. /*
  460. * This is somewhat fatal, but nothing we can do
  461. * about it. We can't disable the regulator w/o
  462. * getting it back under s/w control
  463. */
  464. dprintk(CVP_WARN,
  465. "Failed to acquire regulator control: %s\n",
  466. rinfo->name);
  467. } else {
  468. dprintk(CVP_PWR,
  469. "Acquire regulator control from HW: %s\n",
  470. rinfo->name);
  471. }
  472. }
  473. if (!regulator_is_enabled(rinfo->regulator)) {
  474. dprintk(CVP_WARN, "Regulator is not enabled %s\n",
  475. rinfo->name);
  476. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  477. }
  478. return rc;
  479. }
  480. static int __hand_off_regulator(struct regulator_info *rinfo)
  481. {
  482. int rc = 0;
  483. if (rinfo->has_hw_power_collapse) {
  484. rc = regulator_set_mode(rinfo->regulator,
  485. REGULATOR_MODE_FAST);
  486. if (rc) {
  487. dprintk(CVP_WARN,
  488. "Failed to hand off regulator control: %s\n",
  489. rinfo->name);
  490. } else {
  491. dprintk(CVP_PWR,
  492. "Hand off regulator control to HW: %s\n",
  493. rinfo->name);
  494. }
  495. }
  496. return rc;
  497. }
  498. static int __hand_off_regulators(struct iris_hfi_device *device)
  499. {
  500. struct regulator_info *rinfo;
  501. int rc = 0, c = 0;
  502. iris_hfi_for_each_regulator(device, rinfo) {
  503. rc = __hand_off_regulator(rinfo);
  504. /*
  505. * If one regulator hand off failed, driver should take
  506. * the control for other regulators back.
  507. */
  508. if (rc)
  509. goto err_reg_handoff_failed;
  510. c++;
  511. }
  512. return rc;
  513. err_reg_handoff_failed:
  514. iris_hfi_for_each_regulator_reverse_continue(device, rinfo, c)
  515. __acquire_regulator(rinfo, device);
  516. return rc;
  517. }
  518. static int __write_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  519. bool *rx_req_is_set)
  520. {
  521. struct cvp_hfi_queue_header *queue;
  522. u32 packet_size_in_words, new_write_idx;
  523. u32 empty_space, read_idx, write_idx;
  524. u32 *write_ptr;
  525. if (!qinfo || !packet) {
  526. dprintk(CVP_ERR, "Invalid Params\n");
  527. return -EINVAL;
  528. } else if (!qinfo->q_array.align_virtual_addr) {
  529. dprintk(CVP_WARN, "Queues have already been freed\n");
  530. return -EINVAL;
  531. }
  532. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  533. if (!queue) {
  534. dprintk(CVP_ERR, "queue not present\n");
  535. return -ENOENT;
  536. }
  537. if (msm_cvp_debug & CVP_PKT) {
  538. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  539. __dump_packet(packet, CVP_PKT);
  540. }
  541. packet_size_in_words = (*(u32 *)packet) >> 2;
  542. if (!packet_size_in_words || packet_size_in_words >
  543. qinfo->q_array.mem_size>>2) {
  544. dprintk(CVP_ERR, "Invalid packet size\n");
  545. return -ENODATA;
  546. }
  547. spin_lock(&qinfo->hfi_lock);
  548. read_idx = queue->qhdr_read_idx;
  549. write_idx = queue->qhdr_write_idx;
  550. empty_space = (write_idx >= read_idx) ?
  551. ((qinfo->q_array.mem_size>>2) - (write_idx - read_idx)) :
  552. (read_idx - write_idx);
  553. if (empty_space <= packet_size_in_words) {
  554. queue->qhdr_tx_req = 1;
  555. spin_unlock(&qinfo->hfi_lock);
  556. dprintk(CVP_ERR, "Insufficient size (%d) to write (%d)\n",
  557. empty_space, packet_size_in_words);
  558. return -ENOTEMPTY;
  559. }
  560. queue->qhdr_tx_req = 0;
  561. new_write_idx = write_idx + packet_size_in_words;
  562. write_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  563. (write_idx << 2));
  564. if (write_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  565. write_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  566. qinfo->q_array.mem_size)) {
  567. spin_unlock(&qinfo->hfi_lock);
  568. dprintk(CVP_ERR, "Invalid write index\n");
  569. return -ENODATA;
  570. }
  571. if (new_write_idx < (qinfo->q_array.mem_size >> 2)) {
  572. memcpy(write_ptr, packet, packet_size_in_words << 2);
  573. } else {
  574. new_write_idx -= qinfo->q_array.mem_size >> 2;
  575. memcpy(write_ptr, packet, (packet_size_in_words -
  576. new_write_idx) << 2);
  577. memcpy((void *)qinfo->q_array.align_virtual_addr,
  578. packet + ((packet_size_in_words - new_write_idx) << 2),
  579. new_write_idx << 2);
  580. }
  581. /*
  582. * Memory barrier to make sure packet is written before updating the
  583. * write index
  584. */
  585. mb();
  586. queue->qhdr_write_idx = new_write_idx;
  587. if (rx_req_is_set)
  588. *rx_req_is_set = queue->qhdr_rx_req == 1;
  589. /*
  590. * Memory barrier to make sure write index is updated before an
  591. * interrupt is raised.
  592. */
  593. mb();
  594. spin_unlock(&qinfo->hfi_lock);
  595. return 0;
  596. }
  597. static int __read_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  598. u32 *pb_tx_req_is_set)
  599. {
  600. struct cvp_hfi_queue_header *queue;
  601. u32 packet_size_in_words, new_read_idx;
  602. u32 *read_ptr;
  603. u32 receive_request = 0;
  604. u32 read_idx, write_idx;
  605. int rc = 0;
  606. if (!qinfo || !packet || !pb_tx_req_is_set) {
  607. dprintk(CVP_ERR, "Invalid Params\n");
  608. return -EINVAL;
  609. } else if (!qinfo->q_array.align_virtual_addr) {
  610. dprintk(CVP_WARN, "Queues have already been freed\n");
  611. return -EINVAL;
  612. }
  613. /*
  614. * Memory barrier to make sure data is valid before
  615. *reading it
  616. */
  617. mb();
  618. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  619. if (!queue) {
  620. dprintk(CVP_ERR, "Queue memory is not allocated\n");
  621. return -ENOMEM;
  622. }
  623. /*
  624. * Do not set receive request for debug queue, if set,
  625. * Iris generates interrupt for debug messages even
  626. * when there is no response message available.
  627. * In general debug queue will not become full as it
  628. * is being emptied out for every interrupt from Iris.
  629. * Iris will anyway generates interrupt if it is full.
  630. */
  631. spin_lock(&qinfo->hfi_lock);
  632. if (queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_MSG_Q)
  633. receive_request = 1;
  634. read_idx = queue->qhdr_read_idx;
  635. write_idx = queue->qhdr_write_idx;
  636. if (read_idx == write_idx) {
  637. queue->qhdr_rx_req = receive_request;
  638. /*
  639. * mb() to ensure qhdr is updated in main memory
  640. * so that iris reads the updated header values
  641. */
  642. mb();
  643. *pb_tx_req_is_set = 0;
  644. if (write_idx != queue->qhdr_write_idx) {
  645. queue->qhdr_rx_req = 0;
  646. } else {
  647. spin_unlock(&qinfo->hfi_lock);
  648. dprintk(CVP_HFI,
  649. "%s queue is empty, rx_req = %u, tx_req = %u, read_idx = %u\n",
  650. receive_request ? "message" : "debug",
  651. queue->qhdr_rx_req, queue->qhdr_tx_req,
  652. queue->qhdr_read_idx);
  653. return -ENODATA;
  654. }
  655. }
  656. read_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  657. (read_idx << 2));
  658. if (read_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  659. read_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  660. qinfo->q_array.mem_size - sizeof(*read_ptr))) {
  661. spin_unlock(&qinfo->hfi_lock);
  662. dprintk(CVP_ERR, "Invalid read index\n");
  663. return -ENODATA;
  664. }
  665. packet_size_in_words = (*read_ptr) >> 2;
  666. if (!packet_size_in_words) {
  667. spin_unlock(&qinfo->hfi_lock);
  668. dprintk(CVP_ERR, "Zero packet size\n");
  669. return -ENODATA;
  670. }
  671. new_read_idx = read_idx + packet_size_in_words;
  672. if (((packet_size_in_words << 2) <= CVP_IFACEQ_VAR_HUGE_PKT_SIZE)
  673. && read_idx <= (qinfo->q_array.mem_size >> 2)) {
  674. if (new_read_idx < (qinfo->q_array.mem_size >> 2)) {
  675. memcpy(packet, read_ptr,
  676. packet_size_in_words << 2);
  677. } else {
  678. new_read_idx -= (qinfo->q_array.mem_size >> 2);
  679. memcpy(packet, read_ptr,
  680. (packet_size_in_words - new_read_idx) << 2);
  681. memcpy(packet + ((packet_size_in_words -
  682. new_read_idx) << 2),
  683. (u8 *)qinfo->q_array.align_virtual_addr,
  684. new_read_idx << 2);
  685. }
  686. } else {
  687. dprintk(CVP_WARN,
  688. "BAD packet received, read_idx: %#x, pkt_size: %d\n",
  689. read_idx, packet_size_in_words << 2);
  690. dprintk(CVP_WARN, "Dropping this packet\n");
  691. new_read_idx = write_idx;
  692. rc = -ENODATA;
  693. }
  694. if (new_read_idx != queue->qhdr_write_idx)
  695. queue->qhdr_rx_req = 0;
  696. else
  697. queue->qhdr_rx_req = receive_request;
  698. queue->qhdr_read_idx = new_read_idx;
  699. /*
  700. * mb() to ensure qhdr is updated in main memory
  701. * so that iris reads the updated header values
  702. */
  703. mb();
  704. *pb_tx_req_is_set = (queue->qhdr_tx_req == 1) ? 1 : 0;
  705. spin_unlock(&qinfo->hfi_lock);
  706. if ((msm_cvp_debug & CVP_PKT) &&
  707. !(queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q)) {
  708. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  709. __dump_packet(packet, CVP_PKT);
  710. }
  711. return rc;
  712. }
  713. static int __smem_alloc(struct iris_hfi_device *dev, struct cvp_mem_addr *mem,
  714. u32 size, u32 align, u32 flags)
  715. {
  716. struct msm_cvp_smem *alloc = &mem->mem_data;
  717. int rc = 0;
  718. if (!dev || !mem || !size) {
  719. dprintk(CVP_ERR, "Invalid Params\n");
  720. return -EINVAL;
  721. }
  722. dprintk(CVP_INFO, "start to alloc size: %d, flags: %d\n", size, flags);
  723. rc = msm_cvp_smem_alloc(size, align, flags, 1, (void *)dev->res, alloc);
  724. if (rc) {
  725. dprintk(CVP_ERR, "Alloc failed\n");
  726. rc = -ENOMEM;
  727. goto fail_smem_alloc;
  728. }
  729. dprintk(CVP_MEM, "%s: ptr = %pK, size = %d\n", __func__,
  730. alloc->kvaddr, size);
  731. mem->mem_size = alloc->size;
  732. mem->align_virtual_addr = alloc->kvaddr;
  733. mem->align_device_addr = alloc->device_addr;
  734. return rc;
  735. fail_smem_alloc:
  736. return rc;
  737. }
  738. static void __smem_free(struct iris_hfi_device *dev, struct msm_cvp_smem *mem)
  739. {
  740. if (!dev || !mem) {
  741. dprintk(CVP_ERR, "invalid param %pK %pK\n", dev, mem);
  742. return;
  743. }
  744. msm_cvp_smem_free(mem);
  745. }
  746. static void __write_register(struct iris_hfi_device *device,
  747. u32 reg, u32 value)
  748. {
  749. u32 hwiosymaddr = reg;
  750. u8 *base_addr;
  751. if (!device) {
  752. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  753. return;
  754. }
  755. __strict_check(device);
  756. if (!device->power_enabled) {
  757. dprintk(CVP_WARN,
  758. "HFI Write register failed : Power is OFF\n");
  759. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  760. return;
  761. }
  762. base_addr = device->cvp_hal_data->register_base;
  763. dprintk(CVP_REG, "Base addr: %pK, written to: %#x, Value: %#x...\n",
  764. base_addr, hwiosymaddr, value);
  765. base_addr += hwiosymaddr;
  766. writel_relaxed(value, base_addr);
  767. /*
  768. * Memory barrier to make sure value is written into the register.
  769. */
  770. wmb();
  771. }
  772. static int __read_register(struct iris_hfi_device *device, u32 reg)
  773. {
  774. int rc = 0;
  775. u8 *base_addr;
  776. if (!device) {
  777. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  778. return -EINVAL;
  779. }
  780. __strict_check(device);
  781. if (!device->power_enabled) {
  782. dprintk(CVP_WARN,
  783. "HFI Read register failed : Power is OFF\n");
  784. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  785. return -EINVAL;
  786. }
  787. base_addr = device->cvp_hal_data->register_base;
  788. rc = readl_relaxed(base_addr + reg);
  789. /*
  790. * Memory barrier to make sure value is read correctly from the
  791. * register.
  792. */
  793. rmb();
  794. dprintk(CVP_REG, "Base addr: %pK, read from: %#x, value: %#x...\n",
  795. base_addr, reg, rc);
  796. return rc;
  797. }
  798. static void __set_registers(struct iris_hfi_device *device)
  799. {
  800. struct reg_set *reg_set;
  801. int i;
  802. if (!device->res) {
  803. dprintk(CVP_ERR,
  804. "device resources null, cannot set registers\n");
  805. return;
  806. }
  807. reg_set = &device->res->reg_set;
  808. for (i = 0; i < reg_set->count; i++) {
  809. __write_register(device, reg_set->reg_tbl[i].reg,
  810. reg_set->reg_tbl[i].value);
  811. dprintk(CVP_REG, "write_reg offset=%x, val=%x\n",
  812. reg_set->reg_tbl[i].reg,
  813. reg_set->reg_tbl[i].value);
  814. }
  815. }
  816. /*
  817. * The existence of this function is a hack for 8996 (or certain Iris versions)
  818. * to overcome a hardware bug. Whenever the GDSCs momentarily power collapse
  819. * (after calling __hand_off_regulators()), the values of the threshold
  820. * registers (typically programmed by TZ) are incorrectly reset. As a result
  821. * reprogram these registers at certain agreed upon points.
  822. */
  823. static void __set_threshold_registers(struct iris_hfi_device *device)
  824. {
  825. u32 version = __read_register(device, CVP_WRAPPER_HW_VERSION);
  826. version &= ~GENMASK(15, 0);
  827. if (version != (0x3 << 28 | 0x43 << 16))
  828. return;
  829. if (__tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESTORE_THRESHOLD))
  830. dprintk(CVP_ERR, "Failed to restore threshold values\n");
  831. }
  832. static int __unvote_buses(struct iris_hfi_device *device)
  833. {
  834. int rc = 0;
  835. struct bus_info *bus = NULL;
  836. kfree(device->bus_vote.data);
  837. device->bus_vote.data = NULL;
  838. device->bus_vote.data_count = 0;
  839. iris_hfi_for_each_bus(device, bus) {
  840. rc = icc_set_bw(bus->client, 0, 0);
  841. if (rc) {
  842. dprintk(CVP_ERR,
  843. "%s: Failed unvoting bus\n", __func__);
  844. goto err_unknown_device;
  845. }
  846. }
  847. err_unknown_device:
  848. return rc;
  849. }
  850. static int __vote_buses(struct iris_hfi_device *device,
  851. struct cvp_bus_vote_data *data, int num_data)
  852. {
  853. int rc = 0;
  854. struct bus_info *bus = NULL;
  855. struct cvp_bus_vote_data *new_data = NULL;
  856. if (!num_data) {
  857. dprintk(CVP_PWR, "No vote data available\n");
  858. goto no_data_count;
  859. } else if (!data) {
  860. dprintk(CVP_ERR, "Invalid voting data\n");
  861. return -EINVAL;
  862. }
  863. new_data = kmemdup(data, num_data * sizeof(*new_data), GFP_KERNEL);
  864. if (!new_data) {
  865. dprintk(CVP_ERR, "Can't alloc memory to cache bus votes\n");
  866. rc = -ENOMEM;
  867. goto err_no_mem;
  868. }
  869. no_data_count:
  870. kfree(device->bus_vote.data);
  871. device->bus_vote.data = new_data;
  872. device->bus_vote.data_count = num_data;
  873. iris_hfi_for_each_bus(device, bus) {
  874. if (bus) {
  875. rc = icc_set_bw(bus->client, bus->range[1], 0);
  876. if (rc)
  877. dprintk(CVP_ERR,
  878. "Failed voting bus %s to ab %u\n",
  879. bus->name, bus->range[1]*1000);
  880. }
  881. }
  882. err_no_mem:
  883. return rc;
  884. }
  885. static int iris_hfi_vote_buses(void *dev, struct cvp_bus_vote_data *d, int n)
  886. {
  887. int rc = 0;
  888. struct iris_hfi_device *device = dev;
  889. if (!device)
  890. return -EINVAL;
  891. mutex_lock(&device->lock);
  892. rc = __vote_buses(device, d, n);
  893. mutex_unlock(&device->lock);
  894. return rc;
  895. }
  896. static int __core_set_resource(struct iris_hfi_device *device,
  897. struct cvp_resource_hdr *resource_hdr, void *resource_value)
  898. {
  899. struct cvp_hfi_cmd_sys_set_resource_packet *pkt;
  900. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  901. int rc = 0;
  902. if (!device || !resource_hdr || !resource_value) {
  903. dprintk(CVP_ERR, "set_res: Invalid Params\n");
  904. return -EINVAL;
  905. }
  906. pkt = (struct cvp_hfi_cmd_sys_set_resource_packet *) packet;
  907. rc = call_hfi_pkt_op(device, sys_set_resource,
  908. pkt, resource_hdr, resource_value);
  909. if (rc) {
  910. dprintk(CVP_ERR, "set_res: failed to create packet\n");
  911. goto err_create_pkt;
  912. }
  913. rc = __iface_cmdq_write(device, pkt);
  914. if (rc)
  915. rc = -ENOTEMPTY;
  916. err_create_pkt:
  917. return rc;
  918. }
  919. static int __core_release_resource(struct iris_hfi_device *device,
  920. struct cvp_resource_hdr *resource_hdr)
  921. {
  922. struct cvp_hfi_cmd_sys_release_resource_packet *pkt;
  923. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  924. int rc = 0;
  925. if (!device || !resource_hdr) {
  926. dprintk(CVP_ERR, "release_res: Invalid Params\n");
  927. return -EINVAL;
  928. }
  929. pkt = (struct cvp_hfi_cmd_sys_release_resource_packet *) packet;
  930. rc = call_hfi_pkt_op(device, sys_release_resource,
  931. pkt, resource_hdr);
  932. if (rc) {
  933. dprintk(CVP_ERR, "release_res: failed to create packet\n");
  934. goto err_create_pkt;
  935. }
  936. rc = __iface_cmdq_write(device, pkt);
  937. if (rc)
  938. rc = -ENOTEMPTY;
  939. err_create_pkt:
  940. return rc;
  941. }
  942. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state)
  943. {
  944. int rc = 0;
  945. rc = qcom_scm_set_remote_state(state, TZBSP_CVP_PAS_ID);
  946. dprintk(CVP_CORE, "Set state %d, resp %d\n", state, rc);
  947. if (rc) {
  948. dprintk(CVP_ERR, "Failed qcom_scm_set_remote_state %d\n", rc);
  949. return rc;
  950. }
  951. return 0;
  952. }
  953. static inline int __boot_firmware(struct iris_hfi_device *device)
  954. {
  955. int rc = 0;
  956. u32 ctrl_init_val = 0, ctrl_status = 0, count = 0, max_tries = 1000;
  957. ctrl_init_val = BIT(0);
  958. __write_register(device, CVP_CTRL_INIT, ctrl_init_val);
  959. while (!ctrl_status && count < max_tries) {
  960. ctrl_status = __read_register(device, CVP_CTRL_STATUS);
  961. if ((ctrl_status & CVP_CTRL_ERROR_STATUS__M) == 0x4) {
  962. dprintk(CVP_ERR, "invalid setting for UC_REGION\n");
  963. rc = -ENODATA;
  964. break;
  965. }
  966. /* Reduce to 1/100th and x100 of max_tries */
  967. usleep_range(500, 1000);
  968. count++;
  969. }
  970. if (!(ctrl_status & CVP_CTRL_INIT_STATUS__M)) {
  971. dprintk(CVP_ERR, "Failed to boot FW status: %x\n",
  972. ctrl_status);
  973. rc = -ENODEV;
  974. }
  975. /* Enable interrupt before sending commands to tensilica */
  976. __write_register(device, CVP_CPU_CS_H2XSOFTINTEN, 0x1);
  977. __write_register(device, CVP_CPU_CS_X2RPMh, 0x0);
  978. return rc;
  979. }
  980. static int iris_hfi_resume(void *dev)
  981. {
  982. int rc = 0;
  983. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  984. if (!device) {
  985. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  986. return -EINVAL;
  987. }
  988. dprintk(CVP_CORE, "Resuming Iris\n");
  989. mutex_lock(&device->lock);
  990. rc = __resume(device);
  991. mutex_unlock(&device->lock);
  992. return rc;
  993. }
  994. static int iris_hfi_suspend(void *dev)
  995. {
  996. int rc = 0;
  997. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  998. if (!device) {
  999. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  1000. return -EINVAL;
  1001. } else if (!device->res->sw_power_collapsible) {
  1002. return -ENOTSUPP;
  1003. }
  1004. dprintk(CVP_CORE, "Suspending Iris\n");
  1005. mutex_lock(&device->lock);
  1006. rc = __power_collapse(device, true);
  1007. if (rc) {
  1008. dprintk(CVP_WARN, "%s: Iris is busy\n", __func__);
  1009. rc = -EBUSY;
  1010. }
  1011. mutex_unlock(&device->lock);
  1012. /* Cancel pending delayed works if any */
  1013. if (!rc)
  1014. cancel_delayed_work(&iris_hfi_pm_work);
  1015. return rc;
  1016. }
  1017. static void cvp_dump_csr(struct iris_hfi_device *dev)
  1018. {
  1019. u32 reg;
  1020. if (!dev)
  1021. return;
  1022. if (!dev->power_enabled || dev->reg_dumped)
  1023. return;
  1024. reg = __read_register(dev, CVP_WRAPPER_CPU_STATUS);
  1025. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_STATUS: %x\n", reg);
  1026. reg = __read_register(dev, CVP_CPU_CS_SCIACMDARG0);
  1027. dprintk(CVP_ERR, "CVP_CPU_CS_SCIACMDARG0: %x\n", reg);
  1028. reg = __read_register(dev, CVP_WRAPPER_CPU_CLOCK_CONFIG);
  1029. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_CLOCK_CONFIG: %x\n", reg);
  1030. reg = __read_register(dev, CVP_WRAPPER_CORE_CLOCK_CONFIG);
  1031. dprintk(CVP_ERR, "CVP_WRAPPER_CORE_CLOCK_CONFIG: %x\n", reg);
  1032. reg = __read_register(dev, CVP_WRAPPER_INTR_STATUS);
  1033. dprintk(CVP_ERR, "CVP_WRAPPER_INTR_STATUS: %x\n", reg);
  1034. reg = __read_register(dev, CVP_CPU_CS_H2ASOFTINT);
  1035. dprintk(CVP_ERR, "CVP_CPU_CS_H2ASOFTINT: %x\n", reg);
  1036. reg = __read_register(dev, CVP_CPU_CS_A2HSOFTINT);
  1037. dprintk(CVP_ERR, "CVP_CPU_CS_A2HSOFTINT: %x\n", reg);
  1038. reg = __read_register(dev, CVP_CC_MVS1C_GDSCR);
  1039. dprintk(CVP_ERR, "CVP_CC_MVS1C_GDSCR: %x\n", reg);
  1040. reg = __read_register(dev, CVP_CC_MVS1C_CBCR);
  1041. dprintk(CVP_ERR, "CVP_CC_MVS1C_CBCR: %x\n", reg);
  1042. dev->reg_dumped = true;
  1043. }
  1044. static int iris_hfi_flush_debug_queue(void *dev)
  1045. {
  1046. int rc = 0;
  1047. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  1048. if (!device) {
  1049. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  1050. return -EINVAL;
  1051. }
  1052. cvp_dump_csr(device);
  1053. mutex_lock(&device->lock);
  1054. if (!device->power_enabled) {
  1055. dprintk(CVP_WARN, "%s: iris power off\n", __func__);
  1056. rc = -EINVAL;
  1057. goto exit;
  1058. }
  1059. __flush_debug_queue(device, NULL);
  1060. exit:
  1061. mutex_unlock(&device->lock);
  1062. return rc;
  1063. }
  1064. static int __set_clocks(struct iris_hfi_device *device, u32 freq)
  1065. {
  1066. struct clock_info *cl;
  1067. int rc = 0;
  1068. iris_hfi_for_each_clock(device, cl) {
  1069. if (cl->has_scaling) {/* has_scaling */
  1070. device->clk_freq = freq;
  1071. if (msm_cvp_clock_voting)
  1072. freq = msm_cvp_clock_voting;
  1073. rc = clk_set_rate(cl->clk, freq);
  1074. if (rc) {
  1075. dprintk(CVP_ERR,
  1076. "Failed to set clock rate %u %s: %d %s\n",
  1077. freq, cl->name, rc, __func__);
  1078. return rc;
  1079. }
  1080. dprintk(CVP_PWR, "Scaling clock %s to %u\n",
  1081. cl->name, freq);
  1082. }
  1083. }
  1084. return 0;
  1085. }
  1086. static int iris_hfi_scale_clocks(void *dev, u32 freq)
  1087. {
  1088. int rc = 0;
  1089. struct iris_hfi_device *device = dev;
  1090. if (!device) {
  1091. dprintk(CVP_ERR, "Invalid args: %pK\n", device);
  1092. return -EINVAL;
  1093. }
  1094. mutex_lock(&device->lock);
  1095. if (__resume(device)) {
  1096. dprintk(CVP_ERR, "Resume from power collapse failed\n");
  1097. rc = -ENODEV;
  1098. goto exit;
  1099. }
  1100. rc = __set_clocks(device, freq);
  1101. exit:
  1102. mutex_unlock(&device->lock);
  1103. return rc;
  1104. }
  1105. static int __scale_clocks(struct iris_hfi_device *device)
  1106. {
  1107. int rc = 0;
  1108. struct allowed_clock_rates_table *allowed_clks_tbl = NULL;
  1109. u32 rate = 0;
  1110. allowed_clks_tbl = device->res->allowed_clks_tbl;
  1111. rate = device->clk_freq ? device->clk_freq :
  1112. allowed_clks_tbl[0].clock_rate;
  1113. dprintk(CVP_PWR, "%s: scale clock rate %d\n", __func__, rate);
  1114. rc = __set_clocks(device, rate);
  1115. return rc;
  1116. }
  1117. /* Writes into cmdq without raising an interrupt */
  1118. static int __iface_cmdq_write_relaxed(struct iris_hfi_device *device,
  1119. void *pkt, bool *requires_interrupt)
  1120. {
  1121. struct cvp_iface_q_info *q_info;
  1122. struct cvp_hal_cmd_pkt_hdr *cmd_packet;
  1123. int result = -E2BIG;
  1124. if (!device || !pkt) {
  1125. dprintk(CVP_ERR, "Invalid Params\n");
  1126. return -EINVAL;
  1127. }
  1128. __strict_check(device);
  1129. if (!__core_in_valid_state(device)) {
  1130. dprintk(CVP_ERR, "%s - fw not in init state\n", __func__);
  1131. result = -EINVAL;
  1132. goto err_q_null;
  1133. }
  1134. cmd_packet = (struct cvp_hal_cmd_pkt_hdr *)pkt;
  1135. device->last_packet_type = cmd_packet->packet_type;
  1136. q_info = &device->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1137. if (!q_info) {
  1138. dprintk(CVP_ERR, "cannot write to shared Q's\n");
  1139. goto err_q_null;
  1140. }
  1141. if (!q_info->q_array.align_virtual_addr) {
  1142. dprintk(CVP_ERR, "cannot write to shared CMD Q's\n");
  1143. result = -ENODATA;
  1144. goto err_q_null;
  1145. }
  1146. if (__resume(device)) {
  1147. dprintk(CVP_ERR, "%s: Power on failed\n", __func__);
  1148. goto err_q_write;
  1149. }
  1150. if (!__write_queue(q_info, (u8 *)pkt, requires_interrupt)) {
  1151. if (device->res->sw_power_collapsible) {
  1152. cancel_delayed_work(&iris_hfi_pm_work);
  1153. if (!queue_delayed_work(device->iris_pm_workq,
  1154. &iris_hfi_pm_work,
  1155. msecs_to_jiffies(
  1156. device->res->msm_cvp_pwr_collapse_delay))) {
  1157. dprintk(CVP_PWR,
  1158. "PM work already scheduled\n");
  1159. }
  1160. }
  1161. result = 0;
  1162. } else {
  1163. dprintk(CVP_ERR, "__iface_cmdq_write: queue full\n");
  1164. }
  1165. err_q_write:
  1166. err_q_null:
  1167. return result;
  1168. }
  1169. static int __iface_cmdq_write(struct iris_hfi_device *device, void *pkt)
  1170. {
  1171. bool needs_interrupt = false;
  1172. int rc = __iface_cmdq_write_relaxed(device, pkt, &needs_interrupt);
  1173. if (!rc && needs_interrupt) {
  1174. /* Consumer of cmdq prefers that we raise an interrupt */
  1175. rc = 0;
  1176. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1177. }
  1178. return rc;
  1179. }
  1180. static int __iface_msgq_read(struct iris_hfi_device *device, void *pkt)
  1181. {
  1182. u32 tx_req_is_set = 0;
  1183. int rc = 0;
  1184. struct cvp_iface_q_info *q_info;
  1185. if (!pkt) {
  1186. dprintk(CVP_ERR, "Invalid Params\n");
  1187. return -EINVAL;
  1188. }
  1189. __strict_check(device);
  1190. if (!__core_in_valid_state(device)) {
  1191. dprintk(CVP_WARN, "%s - fw not in init state\n", __func__);
  1192. rc = -EINVAL;
  1193. goto read_error_null;
  1194. }
  1195. q_info = &device->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1196. if (q_info->q_array.align_virtual_addr == NULL) {
  1197. dprintk(CVP_ERR, "cannot read from shared MSG Q's\n");
  1198. rc = -ENODATA;
  1199. goto read_error_null;
  1200. }
  1201. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1202. if (tx_req_is_set)
  1203. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1204. rc = 0;
  1205. } else
  1206. rc = -ENODATA;
  1207. read_error_null:
  1208. return rc;
  1209. }
  1210. static int __iface_dbgq_read(struct iris_hfi_device *device, void *pkt)
  1211. {
  1212. u32 tx_req_is_set = 0;
  1213. int rc = 0;
  1214. struct cvp_iface_q_info *q_info;
  1215. if (!pkt) {
  1216. dprintk(CVP_ERR, "Invalid Params\n");
  1217. return -EINVAL;
  1218. }
  1219. __strict_check(device);
  1220. q_info = &device->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1221. if (q_info->q_array.align_virtual_addr == NULL) {
  1222. dprintk(CVP_ERR, "cannot read from shared DBG Q's\n");
  1223. rc = -ENODATA;
  1224. goto dbg_error_null;
  1225. }
  1226. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1227. if (tx_req_is_set)
  1228. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1229. rc = 0;
  1230. } else
  1231. rc = -ENODATA;
  1232. dbg_error_null:
  1233. return rc;
  1234. }
  1235. static void __set_queue_hdr_defaults(struct cvp_hfi_queue_header *q_hdr)
  1236. {
  1237. q_hdr->qhdr_status = 0x1;
  1238. q_hdr->qhdr_type = CVP_IFACEQ_DFLT_QHDR;
  1239. q_hdr->qhdr_q_size = CVP_IFACEQ_QUEUE_SIZE / 4;
  1240. q_hdr->qhdr_pkt_size = 0;
  1241. q_hdr->qhdr_rx_wm = 0x1;
  1242. q_hdr->qhdr_tx_wm = 0x1;
  1243. q_hdr->qhdr_rx_req = 0x1;
  1244. q_hdr->qhdr_tx_req = 0x0;
  1245. q_hdr->qhdr_rx_irq_status = 0x0;
  1246. q_hdr->qhdr_tx_irq_status = 0x0;
  1247. q_hdr->qhdr_read_idx = 0x0;
  1248. q_hdr->qhdr_write_idx = 0x0;
  1249. }
  1250. static void __interface_dsp_queues_release(struct iris_hfi_device *device)
  1251. {
  1252. int i;
  1253. struct msm_cvp_smem *mem_data = &device->dsp_iface_q_table.mem_data;
  1254. struct context_bank_info *cb = mem_data->mapping_info.cb_info;
  1255. if (!device->dsp_iface_q_table.align_virtual_addr) {
  1256. dprintk(CVP_ERR, "%s: already released\n", __func__);
  1257. return;
  1258. }
  1259. dma_unmap_single_attrs(cb->dev, mem_data->device_addr,
  1260. mem_data->size, DMA_BIDIRECTIONAL, 0);
  1261. dma_free_coherent(device->res->mem_cdsp.dev, mem_data->size,
  1262. mem_data->kvaddr, mem_data->dma_handle);
  1263. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1264. device->dsp_iface_queues[i].q_hdr = NULL;
  1265. device->dsp_iface_queues[i].q_array.align_virtual_addr = NULL;
  1266. device->dsp_iface_queues[i].q_array.align_device_addr = 0;
  1267. }
  1268. device->dsp_iface_q_table.align_virtual_addr = NULL;
  1269. device->dsp_iface_q_table.align_device_addr = 0;
  1270. }
  1271. static int __interface_dsp_queues_init(struct iris_hfi_device *dev)
  1272. {
  1273. int rc = 0;
  1274. u32 i;
  1275. struct cvp_hfi_queue_table_header *q_tbl_hdr;
  1276. struct cvp_hfi_queue_header *q_hdr;
  1277. struct cvp_iface_q_info *iface_q;
  1278. int offset = 0;
  1279. phys_addr_t fw_bias = 0;
  1280. size_t q_size;
  1281. struct msm_cvp_smem *mem_data;
  1282. void *kvaddr;
  1283. dma_addr_t dma_handle;
  1284. dma_addr_t iova;
  1285. struct context_bank_info *cb;
  1286. q_size = ALIGN(QUEUE_SIZE, SZ_1M);
  1287. mem_data = &dev->dsp_iface_q_table.mem_data;
  1288. /* Allocate dsp queues from CDSP device memory */
  1289. kvaddr = dma_alloc_coherent(dev->res->mem_cdsp.dev, q_size,
  1290. &dma_handle, GFP_KERNEL);
  1291. if (IS_ERR_OR_NULL(kvaddr)) {
  1292. dprintk(CVP_ERR, "%s: failed dma allocation\n", __func__);
  1293. goto fail_dma_alloc;
  1294. }
  1295. cb = msm_cvp_smem_get_context_bank(0, dev->res, 0);
  1296. if (!cb) {
  1297. dprintk(CVP_ERR,
  1298. "%s: failed to get context bank\n", __func__);
  1299. goto fail_dma_map;
  1300. }
  1301. iova = dma_map_single_attrs(cb->dev, phys_to_virt(dma_handle),
  1302. q_size, DMA_BIDIRECTIONAL, 0);
  1303. if (dma_mapping_error(cb->dev, iova)) {
  1304. dprintk(CVP_ERR, "%s: failed dma mapping\n", __func__);
  1305. goto fail_dma_map;
  1306. }
  1307. dprintk(CVP_DSP,
  1308. "%s: kvaddr %pK dma_handle %#llx iova %#llx size %zd\n",
  1309. __func__, kvaddr, dma_handle, iova, q_size);
  1310. memset(mem_data, 0, sizeof(struct msm_cvp_smem));
  1311. mem_data->kvaddr = kvaddr;
  1312. mem_data->device_addr = iova;
  1313. mem_data->dma_handle = dma_handle;
  1314. mem_data->size = q_size;
  1315. mem_data->ion_flags = 0;
  1316. mem_data->mapping_info.cb_info = cb;
  1317. if (!is_iommu_present(dev->res))
  1318. fw_bias = dev->cvp_hal_data->firmware_base;
  1319. dev->dsp_iface_q_table.align_virtual_addr = kvaddr;
  1320. dev->dsp_iface_q_table.align_device_addr = iova - fw_bias;
  1321. dev->dsp_iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1322. offset = dev->dsp_iface_q_table.mem_size;
  1323. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1324. iface_q = &dev->dsp_iface_queues[i];
  1325. iface_q->q_array.align_device_addr = iova + offset - fw_bias;
  1326. iface_q->q_array.align_virtual_addr = kvaddr + offset;
  1327. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1328. offset += iface_q->q_array.mem_size;
  1329. iface_q->q_hdr = CVP_IFACEQ_GET_QHDR_START_ADDR(
  1330. dev->dsp_iface_q_table.align_virtual_addr, i);
  1331. __set_queue_hdr_defaults(iface_q->q_hdr);
  1332. spin_lock_init(&iface_q->hfi_lock);
  1333. }
  1334. q_tbl_hdr = (struct cvp_hfi_queue_table_header *)
  1335. dev->dsp_iface_q_table.align_virtual_addr;
  1336. q_tbl_hdr->qtbl_version = 0;
  1337. q_tbl_hdr->device_addr = (void *)dev;
  1338. strlcpy(q_tbl_hdr->name, "msm_cvp", sizeof(q_tbl_hdr->name));
  1339. q_tbl_hdr->qtbl_size = CVP_IFACEQ_TABLE_SIZE;
  1340. q_tbl_hdr->qtbl_qhdr0_offset =
  1341. sizeof(struct cvp_hfi_queue_table_header);
  1342. q_tbl_hdr->qtbl_qhdr_size = sizeof(struct cvp_hfi_queue_header);
  1343. q_tbl_hdr->qtbl_num_q = CVP_IFACEQ_NUMQ;
  1344. q_tbl_hdr->qtbl_num_active_q = CVP_IFACEQ_NUMQ;
  1345. iface_q = &dev->dsp_iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1346. q_hdr = iface_q->q_hdr;
  1347. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1348. q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q;
  1349. iface_q = &dev->dsp_iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1350. q_hdr = iface_q->q_hdr;
  1351. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1352. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q;
  1353. iface_q = &dev->dsp_iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1354. q_hdr = iface_q->q_hdr;
  1355. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1356. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q;
  1357. /*
  1358. * Set receive request to zero on debug queue as there is no
  1359. * need of interrupt from cvp hardware for debug messages
  1360. */
  1361. q_hdr->qhdr_rx_req = 0;
  1362. return rc;
  1363. fail_dma_map:
  1364. dma_free_coherent(dev->res->mem_cdsp.dev, q_size, kvaddr, dma_handle);
  1365. fail_dma_alloc:
  1366. return -ENOMEM;
  1367. }
  1368. static void __interface_queues_release(struct iris_hfi_device *device)
  1369. {
  1370. int i;
  1371. struct cvp_hfi_mem_map_table *qdss;
  1372. struct cvp_hfi_mem_map *mem_map;
  1373. int num_entries = device->res->qdss_addr_set.count;
  1374. unsigned long mem_map_table_base_addr;
  1375. struct context_bank_info *cb;
  1376. if (device->qdss.align_virtual_addr) {
  1377. qdss = (struct cvp_hfi_mem_map_table *)
  1378. device->qdss.align_virtual_addr;
  1379. qdss->mem_map_num_entries = num_entries;
  1380. mem_map_table_base_addr =
  1381. device->qdss.align_device_addr +
  1382. sizeof(struct cvp_hfi_mem_map_table);
  1383. qdss->mem_map_table_base_addr =
  1384. (u32)mem_map_table_base_addr;
  1385. if ((unsigned long)qdss->mem_map_table_base_addr !=
  1386. mem_map_table_base_addr) {
  1387. dprintk(CVP_ERR,
  1388. "Invalid mem_map_table_base_addr %#lx",
  1389. mem_map_table_base_addr);
  1390. }
  1391. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1392. cb = msm_cvp_smem_get_context_bank(false, device->res, 0);
  1393. for (i = 0; cb && i < num_entries; i++) {
  1394. iommu_unmap(cb->domain,
  1395. mem_map[i].virtual_addr,
  1396. mem_map[i].size);
  1397. }
  1398. __smem_free(device, &device->qdss.mem_data);
  1399. }
  1400. __smem_free(device, &device->iface_q_table.mem_data);
  1401. __smem_free(device, &device->sfr.mem_data);
  1402. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1403. device->iface_queues[i].q_hdr = NULL;
  1404. device->iface_queues[i].q_array.align_virtual_addr = NULL;
  1405. device->iface_queues[i].q_array.align_device_addr = 0;
  1406. }
  1407. device->iface_q_table.align_virtual_addr = NULL;
  1408. device->iface_q_table.align_device_addr = 0;
  1409. device->qdss.align_virtual_addr = NULL;
  1410. device->qdss.align_device_addr = 0;
  1411. device->sfr.align_virtual_addr = NULL;
  1412. device->sfr.align_device_addr = 0;
  1413. device->mem_addr.align_virtual_addr = NULL;
  1414. device->mem_addr.align_device_addr = 0;
  1415. __interface_dsp_queues_release(device);
  1416. }
  1417. static int __get_qdss_iommu_virtual_addr(struct iris_hfi_device *dev,
  1418. struct cvp_hfi_mem_map *mem_map,
  1419. struct iommu_domain *domain)
  1420. {
  1421. int i;
  1422. int rc = 0;
  1423. dma_addr_t iova = QDSS_IOVA_START;
  1424. int num_entries = dev->res->qdss_addr_set.count;
  1425. struct addr_range *qdss_addr_tbl = dev->res->qdss_addr_set.addr_tbl;
  1426. if (!num_entries)
  1427. return -ENODATA;
  1428. for (i = 0; i < num_entries; i++) {
  1429. if (domain) {
  1430. rc = iommu_map(domain, iova,
  1431. qdss_addr_tbl[i].start,
  1432. qdss_addr_tbl[i].size,
  1433. IOMMU_READ | IOMMU_WRITE);
  1434. if (rc) {
  1435. dprintk(CVP_ERR,
  1436. "IOMMU QDSS mapping failed for addr %#x\n",
  1437. qdss_addr_tbl[i].start);
  1438. rc = -ENOMEM;
  1439. break;
  1440. }
  1441. } else {
  1442. iova = qdss_addr_tbl[i].start;
  1443. }
  1444. mem_map[i].virtual_addr = (u32)iova;
  1445. mem_map[i].physical_addr = qdss_addr_tbl[i].start;
  1446. mem_map[i].size = qdss_addr_tbl[i].size;
  1447. mem_map[i].attr = 0x0;
  1448. iova += mem_map[i].size;
  1449. }
  1450. if (i < num_entries) {
  1451. dprintk(CVP_ERR,
  1452. "QDSS mapping failed, Freeing other entries %d\n", i);
  1453. for (--i; domain && i >= 0; i--) {
  1454. iommu_unmap(domain,
  1455. mem_map[i].virtual_addr,
  1456. mem_map[i].size);
  1457. }
  1458. }
  1459. return rc;
  1460. }
  1461. static void __setup_ucregion_memory_map(struct iris_hfi_device *device)
  1462. {
  1463. __write_register(device, CVP_UC_REGION_ADDR,
  1464. (u32)device->iface_q_table.align_device_addr);
  1465. __write_register(device, CVP_UC_REGION_SIZE, SHARED_QSIZE);
  1466. __write_register(device, CVP_QTBL_ADDR,
  1467. (u32)device->iface_q_table.align_device_addr);
  1468. __write_register(device, CVP_QTBL_INFO, 0x01);
  1469. if (device->sfr.align_device_addr)
  1470. __write_register(device, CVP_SFR_ADDR,
  1471. (u32)device->sfr.align_device_addr);
  1472. if (device->qdss.align_device_addr)
  1473. __write_register(device, CVP_MMAP_ADDR,
  1474. (u32)device->qdss.align_device_addr);
  1475. call_iris_op(device, setup_dsp_uc_memmap, device);
  1476. }
  1477. static int __interface_queues_init(struct iris_hfi_device *dev)
  1478. {
  1479. struct cvp_hfi_queue_table_header *q_tbl_hdr;
  1480. struct cvp_hfi_queue_header *q_hdr;
  1481. u32 i;
  1482. int rc = 0;
  1483. struct cvp_hfi_mem_map_table *qdss;
  1484. struct cvp_hfi_mem_map *mem_map;
  1485. struct cvp_iface_q_info *iface_q;
  1486. struct cvp_hfi_sfr_struct *vsfr;
  1487. struct cvp_mem_addr *mem_addr;
  1488. int offset = 0;
  1489. int num_entries = dev->res->qdss_addr_set.count;
  1490. phys_addr_t fw_bias = 0;
  1491. size_t q_size;
  1492. unsigned long mem_map_table_base_addr;
  1493. struct context_bank_info *cb;
  1494. q_size = SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE;
  1495. mem_addr = &dev->mem_addr;
  1496. if (!is_iommu_present(dev->res))
  1497. fw_bias = dev->cvp_hal_data->firmware_base;
  1498. rc = __smem_alloc(dev, mem_addr, q_size, 1, SMEM_UNCACHED);
  1499. if (rc) {
  1500. dprintk(CVP_ERR, "iface_q_table_alloc_fail\n");
  1501. goto fail_alloc_queue;
  1502. }
  1503. dev->iface_q_table.align_virtual_addr = mem_addr->align_virtual_addr;
  1504. dev->iface_q_table.align_device_addr = mem_addr->align_device_addr -
  1505. fw_bias;
  1506. dev->iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1507. dev->iface_q_table.mem_data = mem_addr->mem_data;
  1508. offset += dev->iface_q_table.mem_size;
  1509. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1510. iface_q = &dev->iface_queues[i];
  1511. iface_q->q_array.align_device_addr = mem_addr->align_device_addr
  1512. + offset - fw_bias;
  1513. iface_q->q_array.align_virtual_addr =
  1514. mem_addr->align_virtual_addr + offset;
  1515. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1516. offset += iface_q->q_array.mem_size;
  1517. iface_q->q_hdr = CVP_IFACEQ_GET_QHDR_START_ADDR(
  1518. dev->iface_q_table.align_virtual_addr, i);
  1519. __set_queue_hdr_defaults(iface_q->q_hdr);
  1520. spin_lock_init(&iface_q->hfi_lock);
  1521. }
  1522. if ((msm_cvp_fw_debug_mode & HFI_DEBUG_MODE_QDSS) && num_entries) {
  1523. rc = __smem_alloc(dev, mem_addr, ALIGNED_QDSS_SIZE, 1,
  1524. SMEM_UNCACHED);
  1525. if (rc) {
  1526. dprintk(CVP_WARN,
  1527. "qdss_alloc_fail: QDSS messages logging will not work\n");
  1528. dev->qdss.align_device_addr = 0;
  1529. } else {
  1530. dev->qdss.align_device_addr =
  1531. mem_addr->align_device_addr - fw_bias;
  1532. dev->qdss.align_virtual_addr =
  1533. mem_addr->align_virtual_addr;
  1534. dev->qdss.mem_size = ALIGNED_QDSS_SIZE;
  1535. dev->qdss.mem_data = mem_addr->mem_data;
  1536. }
  1537. }
  1538. rc = __smem_alloc(dev, mem_addr, ALIGNED_SFR_SIZE, 1, SMEM_UNCACHED);
  1539. if (rc) {
  1540. dprintk(CVP_WARN, "sfr_alloc_fail: SFR not will work\n");
  1541. dev->sfr.align_device_addr = 0;
  1542. } else {
  1543. dev->sfr.align_device_addr = mem_addr->align_device_addr -
  1544. fw_bias;
  1545. dev->sfr.align_virtual_addr = mem_addr->align_virtual_addr;
  1546. dev->sfr.mem_size = ALIGNED_SFR_SIZE;
  1547. dev->sfr.mem_data = mem_addr->mem_data;
  1548. }
  1549. q_tbl_hdr = (struct cvp_hfi_queue_table_header *)
  1550. dev->iface_q_table.align_virtual_addr;
  1551. q_tbl_hdr->qtbl_version = 0;
  1552. q_tbl_hdr->device_addr = (void *)dev;
  1553. strlcpy(q_tbl_hdr->name, "msm_cvp", sizeof(q_tbl_hdr->name));
  1554. q_tbl_hdr->qtbl_size = CVP_IFACEQ_TABLE_SIZE;
  1555. q_tbl_hdr->qtbl_qhdr0_offset =
  1556. sizeof(struct cvp_hfi_queue_table_header);
  1557. q_tbl_hdr->qtbl_qhdr_size = sizeof(struct cvp_hfi_queue_header);
  1558. q_tbl_hdr->qtbl_num_q = CVP_IFACEQ_NUMQ;
  1559. q_tbl_hdr->qtbl_num_active_q = CVP_IFACEQ_NUMQ;
  1560. iface_q = &dev->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1561. q_hdr = iface_q->q_hdr;
  1562. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1563. q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q;
  1564. iface_q = &dev->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1565. q_hdr = iface_q->q_hdr;
  1566. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1567. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q;
  1568. iface_q = &dev->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1569. q_hdr = iface_q->q_hdr;
  1570. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1571. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q;
  1572. /*
  1573. * Set receive request to zero on debug queue as there is no
  1574. * need of interrupt from cvp hardware for debug messages
  1575. */
  1576. q_hdr->qhdr_rx_req = 0;
  1577. if (dev->qdss.align_virtual_addr) {
  1578. qdss =
  1579. (struct cvp_hfi_mem_map_table *)dev->qdss.align_virtual_addr;
  1580. qdss->mem_map_num_entries = num_entries;
  1581. mem_map_table_base_addr = dev->qdss.align_device_addr +
  1582. sizeof(struct cvp_hfi_mem_map_table);
  1583. qdss->mem_map_table_base_addr = mem_map_table_base_addr;
  1584. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1585. cb = msm_cvp_smem_get_context_bank(false, dev->res, 0);
  1586. if (!cb) {
  1587. dprintk(CVP_ERR,
  1588. "%s: failed to get context bank\n", __func__);
  1589. return -EINVAL;
  1590. }
  1591. rc = __get_qdss_iommu_virtual_addr(dev, mem_map, cb->domain);
  1592. if (rc) {
  1593. dprintk(CVP_ERR,
  1594. "IOMMU mapping failed, Freeing qdss memdata\n");
  1595. __smem_free(dev, &dev->qdss.mem_data);
  1596. dev->qdss.align_virtual_addr = NULL;
  1597. dev->qdss.align_device_addr = 0;
  1598. }
  1599. }
  1600. vsfr = (struct cvp_hfi_sfr_struct *) dev->sfr.align_virtual_addr;
  1601. if (vsfr)
  1602. vsfr->bufSize = ALIGNED_SFR_SIZE;
  1603. rc = __interface_dsp_queues_init(dev);
  1604. if (rc) {
  1605. dprintk(CVP_ERR, "dsp_queues_init failed\n");
  1606. goto fail_alloc_queue;
  1607. }
  1608. __setup_ucregion_memory_map(dev);
  1609. return 0;
  1610. fail_alloc_queue:
  1611. return -ENOMEM;
  1612. }
  1613. static int __sys_set_debug(struct iris_hfi_device *device, u32 debug)
  1614. {
  1615. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1616. int rc = 0;
  1617. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1618. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1619. rc = call_hfi_pkt_op(device, sys_debug_config, pkt, debug);
  1620. if (rc) {
  1621. dprintk(CVP_WARN,
  1622. "Debug mode setting to FW failed\n");
  1623. return -ENOTEMPTY;
  1624. }
  1625. if (__iface_cmdq_write(device, pkt))
  1626. return -ENOTEMPTY;
  1627. return 0;
  1628. }
  1629. static int __sys_set_idle_indicator(struct iris_hfi_device *device,
  1630. bool enable)
  1631. {
  1632. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1633. int rc = 0;
  1634. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1635. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1636. rc = call_hfi_pkt_op(device, sys_set_idle_indicator, pkt, enable);
  1637. if (__iface_cmdq_write(device, pkt))
  1638. return -ENOTEMPTY;
  1639. return 0;
  1640. }
  1641. static int __sys_set_coverage(struct iris_hfi_device *device, u32 mode)
  1642. {
  1643. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1644. int rc = 0;
  1645. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1646. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1647. rc = call_hfi_pkt_op(device, sys_coverage_config,
  1648. pkt, mode);
  1649. if (rc) {
  1650. dprintk(CVP_WARN,
  1651. "Coverage mode setting to FW failed\n");
  1652. return -ENOTEMPTY;
  1653. }
  1654. if (__iface_cmdq_write(device, pkt)) {
  1655. dprintk(CVP_WARN, "Failed to send coverage pkt to f/w\n");
  1656. return -ENOTEMPTY;
  1657. }
  1658. return 0;
  1659. }
  1660. static int __sys_set_power_control(struct iris_hfi_device *device,
  1661. bool enable)
  1662. {
  1663. struct regulator_info *rinfo;
  1664. bool supported = false;
  1665. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1666. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1667. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1668. iris_hfi_for_each_regulator(device, rinfo) {
  1669. if (rinfo->has_hw_power_collapse) {
  1670. supported = true;
  1671. break;
  1672. }
  1673. }
  1674. if (!supported)
  1675. return 0;
  1676. call_hfi_pkt_op(device, sys_power_control, pkt, enable);
  1677. if (__iface_cmdq_write(device, pkt))
  1678. return -ENOTEMPTY;
  1679. return 0;
  1680. }
  1681. static int iris_hfi_core_init(void *device)
  1682. {
  1683. int rc = 0;
  1684. struct cvp_hfi_cmd_sys_init_packet pkt;
  1685. struct cvp_hfi_cmd_sys_get_property_packet version_pkt;
  1686. struct iris_hfi_device *dev;
  1687. if (!device) {
  1688. dprintk(CVP_ERR, "Invalid device\n");
  1689. return -ENODEV;
  1690. }
  1691. dev = device;
  1692. dprintk(CVP_CORE, "Core initializing\n");
  1693. mutex_lock(&dev->lock);
  1694. dev->bus_vote.data =
  1695. kzalloc(sizeof(struct cvp_bus_vote_data), GFP_KERNEL);
  1696. if (!dev->bus_vote.data) {
  1697. dprintk(CVP_ERR, "Bus vote data memory is not allocated\n");
  1698. rc = -ENOMEM;
  1699. goto err_no_mem;
  1700. }
  1701. dev->bus_vote.data_count = 1;
  1702. dev->bus_vote.data->power_mode = CVP_POWER_TURBO;
  1703. rc = __load_fw(dev);
  1704. if (rc) {
  1705. dprintk(CVP_ERR, "Failed to load Iris FW\n");
  1706. goto err_load_fw;
  1707. }
  1708. __set_state(dev, IRIS_STATE_INIT);
  1709. dev->reg_dumped = false;
  1710. dprintk(CVP_CORE, "Dev_Virt: %pa, Reg_Virt: %pK\n",
  1711. &dev->cvp_hal_data->firmware_base,
  1712. dev->cvp_hal_data->register_base);
  1713. rc = __interface_queues_init(dev);
  1714. if (rc) {
  1715. dprintk(CVP_ERR, "failed to init queues\n");
  1716. rc = -ENOMEM;
  1717. goto err_core_init;
  1718. }
  1719. rc = __boot_firmware(dev);
  1720. if (rc) {
  1721. dprintk(CVP_ERR, "Failed to start core\n");
  1722. rc = -ENODEV;
  1723. goto err_core_init;
  1724. }
  1725. dev->version = __read_register(dev, CVP_VERSION_INFO);
  1726. rc = call_hfi_pkt_op(dev, sys_init, &pkt, 0);
  1727. if (rc) {
  1728. dprintk(CVP_ERR, "Failed to create sys init pkt\n");
  1729. goto err_core_init;
  1730. }
  1731. if (__iface_cmdq_write(dev, &pkt)) {
  1732. rc = -ENOTEMPTY;
  1733. goto err_core_init;
  1734. }
  1735. rc = call_hfi_pkt_op(dev, sys_image_version, &version_pkt);
  1736. if (rc || __iface_cmdq_write(dev, &version_pkt))
  1737. dprintk(CVP_WARN, "Failed to send image version pkt to f/w\n");
  1738. __sys_set_debug(device, msm_cvp_fw_debug);
  1739. __enable_subcaches(device);
  1740. __set_subcaches(device);
  1741. __set_ubwc_config(device);
  1742. __sys_set_idle_indicator(device, true);
  1743. if (dev->res->pm_qos_latency_us)
  1744. pm_qos_add_request(&dev->qos, PM_QOS_CPU_DMA_LATENCY,
  1745. dev->res->pm_qos_latency_us);
  1746. mutex_unlock(&dev->lock);
  1747. cvp_dsp_send_hfi_queue();
  1748. dprintk(CVP_CORE, "Core inited successfully\n");
  1749. return 0;
  1750. err_core_init:
  1751. __set_state(dev, IRIS_STATE_DEINIT);
  1752. __unload_fw(dev);
  1753. err_load_fw:
  1754. err_no_mem:
  1755. dprintk(CVP_ERR, "Core init failed\n");
  1756. mutex_unlock(&dev->lock);
  1757. return rc;
  1758. }
  1759. static int iris_hfi_core_release(void *dev)
  1760. {
  1761. int rc = 0;
  1762. struct iris_hfi_device *device = dev;
  1763. struct cvp_hal_session *session, *next;
  1764. if (!device) {
  1765. dprintk(CVP_ERR, "invalid device\n");
  1766. return -ENODEV;
  1767. }
  1768. mutex_lock(&device->lock);
  1769. dprintk(CVP_WARN, "Core releasing\n");
  1770. if (device->res->pm_qos_latency_us &&
  1771. pm_qos_request_active(&device->qos))
  1772. pm_qos_remove_request(&device->qos);
  1773. __resume(device);
  1774. __set_state(device, IRIS_STATE_DEINIT);
  1775. __dsp_shutdown(device, 0);
  1776. __unload_fw(device);
  1777. /* unlink all sessions from device */
  1778. list_for_each_entry_safe(session, next, &device->sess_head, list) {
  1779. list_del(&session->list);
  1780. session->device = NULL;
  1781. }
  1782. dprintk(CVP_CORE, "Core released successfully\n");
  1783. mutex_unlock(&device->lock);
  1784. return rc;
  1785. }
  1786. static void __core_clear_interrupt(struct iris_hfi_device *device)
  1787. {
  1788. u32 intr_status = 0, mask = 0;
  1789. if (!device) {
  1790. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  1791. return;
  1792. }
  1793. intr_status = __read_register(device, CVP_WRAPPER_INTR_STATUS);
  1794. mask = (CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK | CVP_FATAL_INTR_BMSK);
  1795. if (intr_status & mask) {
  1796. device->intr_status |= intr_status;
  1797. device->reg_count++;
  1798. dprintk(CVP_CORE,
  1799. "INTERRUPT for device: %pK: times: %d status: %d\n",
  1800. device, device->reg_count, intr_status);
  1801. } else {
  1802. device->spur_count++;
  1803. }
  1804. __write_register(device, CVP_CPU_CS_A2HSOFTINTCLR, 1);
  1805. }
  1806. static int iris_hfi_core_trigger_ssr(void *device,
  1807. enum hal_ssr_trigger_type type)
  1808. {
  1809. struct cvp_hfi_cmd_sys_test_ssr_packet pkt;
  1810. int rc = 0;
  1811. struct iris_hfi_device *dev;
  1812. if (!device) {
  1813. dprintk(CVP_ERR, "invalid device\n");
  1814. return -ENODEV;
  1815. }
  1816. dev = device;
  1817. if (mutex_trylock(&dev->lock)) {
  1818. rc = call_hfi_pkt_op(dev, ssr_cmd, type, &pkt);
  1819. if (rc) {
  1820. dprintk(CVP_ERR, "%s: failed to create packet\n",
  1821. __func__);
  1822. goto err_create_pkt;
  1823. }
  1824. if (__iface_cmdq_write(dev, &pkt))
  1825. rc = -ENOTEMPTY;
  1826. } else {
  1827. return -EAGAIN;
  1828. }
  1829. err_create_pkt:
  1830. mutex_unlock(&dev->lock);
  1831. return rc;
  1832. }
  1833. static void __set_default_sys_properties(struct iris_hfi_device *device)
  1834. {
  1835. if (__sys_set_debug(device, msm_cvp_fw_debug))
  1836. dprintk(CVP_WARN, "Setting fw_debug msg ON failed\n");
  1837. if (__sys_set_power_control(device, msm_cvp_fw_low_power_mode))
  1838. dprintk(CVP_WARN, "Setting h/w power collapse ON failed\n");
  1839. }
  1840. static void __session_clean(struct cvp_hal_session *session)
  1841. {
  1842. struct cvp_hal_session *temp, *next;
  1843. struct iris_hfi_device *device;
  1844. if (!session || !session->device) {
  1845. dprintk(CVP_WARN, "%s: invalid params\n", __func__);
  1846. return;
  1847. }
  1848. device = session->device;
  1849. dprintk(CVP_SESS, "deleted the session: %pK\n", session);
  1850. /*
  1851. * session might have been removed from the device list in
  1852. * core_release, so check and remove if it is in the list
  1853. */
  1854. list_for_each_entry_safe(temp, next, &device->sess_head, list) {
  1855. if (session == temp) {
  1856. list_del(&session->list);
  1857. break;
  1858. }
  1859. }
  1860. /* Poison the session handle with zeros */
  1861. *session = (struct cvp_hal_session){ {0} };
  1862. kfree(session);
  1863. }
  1864. static int iris_hfi_session_clean(void *session)
  1865. {
  1866. struct cvp_hal_session *sess_close;
  1867. struct iris_hfi_device *device;
  1868. if (!session) {
  1869. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1870. return -EINVAL;
  1871. }
  1872. sess_close = session;
  1873. device = sess_close->device;
  1874. if (!device) {
  1875. dprintk(CVP_ERR, "Invalid device handle %s\n", __func__);
  1876. return -EINVAL;
  1877. }
  1878. mutex_lock(&device->lock);
  1879. __session_clean(sess_close);
  1880. mutex_unlock(&device->lock);
  1881. return 0;
  1882. }
  1883. static int iris_hfi_session_init(void *device, void *session_id,
  1884. void **new_session)
  1885. {
  1886. struct cvp_hfi_cmd_sys_session_init_packet pkt;
  1887. struct iris_hfi_device *dev;
  1888. struct cvp_hal_session *s;
  1889. if (!device || !new_session) {
  1890. dprintk(CVP_ERR, "%s - invalid input\n", __func__);
  1891. return -EINVAL;
  1892. }
  1893. dev = device;
  1894. mutex_lock(&dev->lock);
  1895. s = kzalloc(sizeof(*s), GFP_KERNEL);
  1896. if (!s) {
  1897. dprintk(CVP_ERR, "new session fail: Out of memory\n");
  1898. goto err_session_init_fail;
  1899. }
  1900. s->session_id = session_id;
  1901. s->device = dev;
  1902. dprintk(CVP_SESS,
  1903. "%s: inst %pK, session %pK\n", __func__, session_id, s);
  1904. list_add_tail(&s->list, &dev->sess_head);
  1905. __set_default_sys_properties(device);
  1906. if (call_hfi_pkt_op(dev, session_init, &pkt, s)) {
  1907. dprintk(CVP_ERR, "session_init: failed to create packet\n");
  1908. goto err_session_init_fail;
  1909. }
  1910. *new_session = s;
  1911. if (__iface_cmdq_write(dev, &pkt))
  1912. goto err_session_init_fail;
  1913. mutex_unlock(&dev->lock);
  1914. return 0;
  1915. err_session_init_fail:
  1916. if (s)
  1917. __session_clean(s);
  1918. *new_session = NULL;
  1919. mutex_unlock(&dev->lock);
  1920. return -EINVAL;
  1921. }
  1922. static int __send_session_cmd(struct cvp_hal_session *session, int pkt_type)
  1923. {
  1924. struct cvp_hal_session_cmd_pkt pkt;
  1925. int rc = 0;
  1926. struct iris_hfi_device *device = session->device;
  1927. if (!__is_session_valid(device, session, __func__))
  1928. return -ECONNRESET;
  1929. rc = call_hfi_pkt_op(device, session_cmd,
  1930. &pkt, pkt_type, session);
  1931. if (rc == -EPERM)
  1932. return 0;
  1933. if (rc) {
  1934. dprintk(CVP_ERR, "send session cmd: create pkt failed\n");
  1935. goto err_create_pkt;
  1936. }
  1937. if (__iface_cmdq_write(session->device, &pkt))
  1938. rc = -ENOTEMPTY;
  1939. err_create_pkt:
  1940. return rc;
  1941. }
  1942. static int iris_hfi_session_end(void *session)
  1943. {
  1944. struct cvp_hal_session *sess;
  1945. struct iris_hfi_device *device;
  1946. int rc = 0;
  1947. if (!session) {
  1948. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1949. return -EINVAL;
  1950. }
  1951. sess = session;
  1952. device = sess->device;
  1953. if (!device) {
  1954. dprintk(CVP_ERR, "Invalid session %s\n", __func__);
  1955. return -EINVAL;
  1956. }
  1957. mutex_lock(&device->lock);
  1958. if (msm_cvp_fw_coverage) {
  1959. if (__sys_set_coverage(sess->device, msm_cvp_fw_coverage))
  1960. dprintk(CVP_WARN, "Fw_coverage msg ON failed\n");
  1961. }
  1962. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_END);
  1963. mutex_unlock(&device->lock);
  1964. return rc;
  1965. }
  1966. static int iris_hfi_session_abort(void *sess)
  1967. {
  1968. struct cvp_hal_session *session = sess;
  1969. struct iris_hfi_device *device;
  1970. int rc = 0;
  1971. if (!session || !session->device) {
  1972. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1973. return -EINVAL;
  1974. }
  1975. device = session->device;
  1976. mutex_lock(&device->lock);
  1977. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_ABORT);
  1978. mutex_unlock(&device->lock);
  1979. return rc;
  1980. }
  1981. static int iris_hfi_session_set_buffers(void *sess, u32 iova, u32 size)
  1982. {
  1983. struct cvp_hfi_cmd_session_set_buffers_packet pkt;
  1984. int rc = 0;
  1985. struct cvp_hal_session *session = sess;
  1986. struct iris_hfi_device *device;
  1987. if (!session || !session->device || !iova || !size) {
  1988. dprintk(CVP_ERR, "Invalid Params\n");
  1989. return -EINVAL;
  1990. }
  1991. device = session->device;
  1992. mutex_lock(&device->lock);
  1993. if (!__is_session_valid(device, session, __func__)) {
  1994. rc = -ECONNRESET;
  1995. goto err_create_pkt;
  1996. }
  1997. rc = call_hfi_pkt_op(device, session_set_buffers,
  1998. &pkt, session, iova, size);
  1999. if (rc) {
  2000. dprintk(CVP_ERR, "set buffers: failed to create packet\n");
  2001. goto err_create_pkt;
  2002. }
  2003. if (__iface_cmdq_write(session->device, &pkt))
  2004. rc = -ENOTEMPTY;
  2005. err_create_pkt:
  2006. mutex_unlock(&device->lock);
  2007. return rc;
  2008. }
  2009. static int iris_hfi_session_release_buffers(void *sess)
  2010. {
  2011. struct cvp_session_release_buffers_packet pkt;
  2012. int rc = 0;
  2013. struct cvp_hal_session *session = sess;
  2014. struct iris_hfi_device *device;
  2015. if (!session || !session->device) {
  2016. dprintk(CVP_ERR, "Invalid Params\n");
  2017. return -EINVAL;
  2018. }
  2019. device = session->device;
  2020. mutex_lock(&device->lock);
  2021. if (!__is_session_valid(device, session, __func__)) {
  2022. rc = -ECONNRESET;
  2023. goto err_create_pkt;
  2024. }
  2025. rc = call_hfi_pkt_op(device, session_release_buffers, &pkt, session);
  2026. if (rc) {
  2027. dprintk(CVP_ERR, "release buffers: failed to create packet\n");
  2028. goto err_create_pkt;
  2029. }
  2030. if (__iface_cmdq_write(session->device, &pkt))
  2031. rc = -ENOTEMPTY;
  2032. err_create_pkt:
  2033. mutex_unlock(&device->lock);
  2034. return rc;
  2035. }
  2036. static int iris_hfi_session_send(void *sess,
  2037. struct cvp_kmd_hfi_packet *in_pkt)
  2038. {
  2039. int rc = 0;
  2040. struct cvp_kmd_hfi_packet pkt;
  2041. struct cvp_hal_session *session = sess;
  2042. struct iris_hfi_device *device;
  2043. if (!session || !session->device) {
  2044. dprintk(CVP_ERR, "invalid session");
  2045. return -ENODEV;
  2046. }
  2047. device = session->device;
  2048. mutex_lock(&device->lock);
  2049. if (!__is_session_valid(device, session, __func__)) {
  2050. rc = -ECONNRESET;
  2051. goto err_send_pkt;
  2052. }
  2053. rc = call_hfi_pkt_op(device, session_send,
  2054. &pkt, session, in_pkt);
  2055. if (rc) {
  2056. dprintk(CVP_ERR,
  2057. "failed to create pkt\n");
  2058. goto err_send_pkt;
  2059. }
  2060. if (__iface_cmdq_write(session->device, &pkt))
  2061. rc = -ENOTEMPTY;
  2062. err_send_pkt:
  2063. mutex_unlock(&device->lock);
  2064. return rc;
  2065. return rc;
  2066. }
  2067. static int iris_hfi_session_flush(void *sess)
  2068. {
  2069. struct cvp_hal_session *session = sess;
  2070. struct iris_hfi_device *device;
  2071. int rc = 0;
  2072. if (!session || !session->device) {
  2073. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  2074. return -EINVAL;
  2075. }
  2076. device = session->device;
  2077. mutex_lock(&device->lock);
  2078. rc = __send_session_cmd(session, HFI_CMD_SESSION_CVP_FLUSH);
  2079. mutex_unlock(&device->lock);
  2080. return rc;
  2081. }
  2082. static int __check_core_registered(struct iris_hfi_device *device,
  2083. phys_addr_t fw_addr, u8 *reg_addr, u32 reg_size,
  2084. phys_addr_t irq)
  2085. {
  2086. struct cvp_hal_data *cvp_hal_data;
  2087. if (!device) {
  2088. dprintk(CVP_INFO, "no device Registered\n");
  2089. return -EINVAL;
  2090. }
  2091. cvp_hal_data = device->cvp_hal_data;
  2092. if (!cvp_hal_data)
  2093. return -EINVAL;
  2094. if (cvp_hal_data->irq == irq &&
  2095. (CONTAINS(cvp_hal_data->firmware_base,
  2096. FIRMWARE_SIZE, fw_addr) ||
  2097. CONTAINS(fw_addr, FIRMWARE_SIZE,
  2098. cvp_hal_data->firmware_base) ||
  2099. CONTAINS(cvp_hal_data->register_base,
  2100. reg_size, reg_addr) ||
  2101. CONTAINS(reg_addr, reg_size,
  2102. cvp_hal_data->register_base) ||
  2103. OVERLAPS(cvp_hal_data->register_base,
  2104. reg_size, reg_addr, reg_size) ||
  2105. OVERLAPS(reg_addr, reg_size,
  2106. cvp_hal_data->register_base,
  2107. reg_size) ||
  2108. OVERLAPS(cvp_hal_data->firmware_base,
  2109. FIRMWARE_SIZE, fw_addr,
  2110. FIRMWARE_SIZE) ||
  2111. OVERLAPS(fw_addr, FIRMWARE_SIZE,
  2112. cvp_hal_data->firmware_base,
  2113. FIRMWARE_SIZE))) {
  2114. return 0;
  2115. }
  2116. dprintk(CVP_INFO, "Device not registered\n");
  2117. return -EINVAL;
  2118. }
  2119. static void __process_fatal_error(
  2120. struct iris_hfi_device *device)
  2121. {
  2122. struct msm_cvp_cb_cmd_done cmd_done = {0};
  2123. cmd_done.device_id = device->device_id;
  2124. device->callback(HAL_SYS_ERROR, &cmd_done);
  2125. }
  2126. static int __prepare_pc(struct iris_hfi_device *device)
  2127. {
  2128. int rc = 0;
  2129. struct cvp_hfi_cmd_sys_pc_prep_packet pkt;
  2130. rc = call_hfi_pkt_op(device, sys_pc_prep, &pkt);
  2131. if (rc) {
  2132. dprintk(CVP_ERR, "Failed to create sys pc prep pkt\n");
  2133. goto err_pc_prep;
  2134. }
  2135. if (__iface_cmdq_write(device, &pkt))
  2136. rc = -ENOTEMPTY;
  2137. if (rc)
  2138. dprintk(CVP_ERR, "Failed to prepare iris for power off");
  2139. err_pc_prep:
  2140. return rc;
  2141. }
  2142. static void iris_hfi_pm_handler(struct work_struct *work)
  2143. {
  2144. int rc = 0;
  2145. struct msm_cvp_core *core;
  2146. struct iris_hfi_device *device;
  2147. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2148. if (core)
  2149. device = core->device->hfi_device_data;
  2150. else
  2151. return;
  2152. if (!device) {
  2153. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  2154. return;
  2155. }
  2156. dprintk(CVP_PWR,
  2157. "Entering %s\n", __func__);
  2158. /*
  2159. * It is ok to check this variable outside the lock since
  2160. * it is being updated in this context only
  2161. */
  2162. if (device->skip_pc_count >= CVP_MAX_PC_SKIP_COUNT) {
  2163. dprintk(CVP_WARN, "Failed to PC for %d times\n",
  2164. device->skip_pc_count);
  2165. device->skip_pc_count = 0;
  2166. __process_fatal_error(device);
  2167. return;
  2168. }
  2169. mutex_lock(&device->lock);
  2170. if (gfa_cv.state == DSP_SUSPEND)
  2171. rc = __power_collapse(device, true);
  2172. else
  2173. rc = __power_collapse(device, false);
  2174. mutex_unlock(&device->lock);
  2175. switch (rc) {
  2176. case 0:
  2177. device->skip_pc_count = 0;
  2178. /* Cancel pending delayed works if any */
  2179. cancel_delayed_work(&iris_hfi_pm_work);
  2180. dprintk(CVP_PWR, "%s: power collapse successful!\n",
  2181. __func__);
  2182. break;
  2183. case -EBUSY:
  2184. device->skip_pc_count = 0;
  2185. dprintk(CVP_PWR, "%s: retry PC as cvp is busy\n", __func__);
  2186. queue_delayed_work(device->iris_pm_workq,
  2187. &iris_hfi_pm_work, msecs_to_jiffies(
  2188. device->res->msm_cvp_pwr_collapse_delay));
  2189. break;
  2190. case -EAGAIN:
  2191. device->skip_pc_count++;
  2192. dprintk(CVP_WARN, "%s: retry power collapse (count %d)\n",
  2193. __func__, device->skip_pc_count);
  2194. queue_delayed_work(device->iris_pm_workq,
  2195. &iris_hfi_pm_work, msecs_to_jiffies(
  2196. device->res->msm_cvp_pwr_collapse_delay));
  2197. break;
  2198. default:
  2199. dprintk(CVP_ERR, "%s: power collapse failed\n", __func__);
  2200. break;
  2201. }
  2202. }
  2203. static int __power_collapse(struct iris_hfi_device *device, bool force)
  2204. {
  2205. int rc = 0;
  2206. u32 wfi_status = 0, idle_status = 0, pc_ready = 0;
  2207. u32 flags = 0;
  2208. int count = 0;
  2209. const int max_tries = 150;
  2210. if (!device) {
  2211. dprintk(CVP_ERR, "%s: invalid params\n", __func__);
  2212. return -EINVAL;
  2213. }
  2214. if (!device->power_enabled) {
  2215. dprintk(CVP_PWR, "%s: Power already disabled\n",
  2216. __func__);
  2217. goto exit;
  2218. }
  2219. rc = __core_in_valid_state(device);
  2220. if (!rc) {
  2221. dprintk(CVP_WARN,
  2222. "Core is in bad state, Skipping power collapse\n");
  2223. return -EINVAL;
  2224. }
  2225. rc = __dsp_suspend(device, force, flags);
  2226. if (rc == -EBUSY)
  2227. goto exit;
  2228. else if (rc)
  2229. goto skip_power_off;
  2230. pc_ready = __read_register(device, CVP_CTRL_STATUS) &
  2231. CVP_CTRL_STATUS_PC_READY;
  2232. if (!pc_ready) {
  2233. wfi_status = __read_register(device,
  2234. CVP_WRAPPER_CPU_STATUS);
  2235. idle_status = __read_register(device,
  2236. CVP_CTRL_STATUS);
  2237. if (!(wfi_status & BIT(0))) {
  2238. dprintk(CVP_WARN,
  2239. "Skipping PC as wfi_status (%#x) bit not set\n",
  2240. wfi_status);
  2241. goto skip_power_off;
  2242. }
  2243. if (!(idle_status & BIT(30))) {
  2244. dprintk(CVP_WARN,
  2245. "Skipping PC as idle_status (%#x) bit not set\n",
  2246. idle_status);
  2247. goto skip_power_off;
  2248. }
  2249. rc = __prepare_pc(device);
  2250. if (rc) {
  2251. dprintk(CVP_WARN, "Failed PC %d\n", rc);
  2252. goto skip_power_off;
  2253. }
  2254. while (count < max_tries) {
  2255. wfi_status = __read_register(device,
  2256. CVP_WRAPPER_CPU_STATUS);
  2257. pc_ready = __read_register(device,
  2258. CVP_CTRL_STATUS);
  2259. if ((wfi_status & BIT(0)) && (pc_ready &
  2260. CVP_CTRL_STATUS_PC_READY))
  2261. break;
  2262. usleep_range(150, 250);
  2263. count++;
  2264. }
  2265. if (count == max_tries) {
  2266. dprintk(CVP_ERR,
  2267. "Skip PC. Core is not in right state (%#x, %#x)\n",
  2268. wfi_status, pc_ready);
  2269. goto skip_power_off;
  2270. }
  2271. }
  2272. __flush_debug_queue(device, device->raw_packet);
  2273. rc = __suspend(device);
  2274. if (rc)
  2275. dprintk(CVP_ERR, "Failed __suspend\n");
  2276. exit:
  2277. return rc;
  2278. skip_power_off:
  2279. dprintk(CVP_PWR, "Skip PC(%#x, %#x, %#x)\n",
  2280. wfi_status, idle_status, pc_ready);
  2281. __flush_debug_queue(device, device->raw_packet);
  2282. return -EAGAIN;
  2283. }
  2284. static void __process_sys_error(struct iris_hfi_device *device)
  2285. {
  2286. struct cvp_hfi_sfr_struct *vsfr = NULL;
  2287. vsfr = (struct cvp_hfi_sfr_struct *)device->sfr.align_virtual_addr;
  2288. if (vsfr) {
  2289. void *p = memchr(vsfr->rg_data, '\0', vsfr->bufSize);
  2290. /*
  2291. * SFR isn't guaranteed to be NULL terminated
  2292. * since SYS_ERROR indicates that Iris is in the
  2293. * process of crashing.
  2294. */
  2295. if (p == NULL)
  2296. vsfr->rg_data[vsfr->bufSize - 1] = '\0';
  2297. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2298. vsfr->rg_data);
  2299. }
  2300. }
  2301. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet)
  2302. {
  2303. bool local_packet = false;
  2304. enum cvp_msg_prio log_level = CVP_FW;
  2305. if (!device) {
  2306. dprintk(CVP_ERR, "%s: Invalid params\n", __func__);
  2307. return;
  2308. }
  2309. if (!packet) {
  2310. packet = kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  2311. if (!packet) {
  2312. dprintk(CVP_ERR, "In %s() Fail to allocate mem\n",
  2313. __func__);
  2314. return;
  2315. }
  2316. local_packet = true;
  2317. /*
  2318. * Local packek is used when something FATAL occurred.
  2319. * It is good to print these logs by default.
  2320. */
  2321. log_level = CVP_ERR;
  2322. }
  2323. #define SKIP_INVALID_PKT(pkt_size, payload_size, pkt_hdr_size) ({ \
  2324. if (pkt_size < pkt_hdr_size || \
  2325. payload_size < MIN_PAYLOAD_SIZE || \
  2326. payload_size > \
  2327. (pkt_size - pkt_hdr_size + sizeof(u8))) { \
  2328. dprintk(CVP_ERR, \
  2329. "%s: invalid msg size - %d\n", \
  2330. __func__, pkt->msg_size); \
  2331. continue; \
  2332. } \
  2333. })
  2334. while (!__iface_dbgq_read(device, packet)) {
  2335. struct cvp_hfi_packet_header *pkt =
  2336. (struct cvp_hfi_packet_header *) packet;
  2337. if (pkt->size < sizeof(struct cvp_hfi_packet_header)) {
  2338. dprintk(CVP_ERR, "Invalid pkt size - %s\n",
  2339. __func__);
  2340. continue;
  2341. }
  2342. if (pkt->packet_type == HFI_MSG_SYS_DEBUG) {
  2343. struct cvp_hfi_msg_sys_debug_packet *pkt =
  2344. (struct cvp_hfi_msg_sys_debug_packet *) packet;
  2345. SKIP_INVALID_PKT(pkt->size,
  2346. pkt->msg_size, sizeof(*pkt));
  2347. /*
  2348. * All fw messages starts with new line character. This
  2349. * causes dprintk to print this message in two lines
  2350. * in the kernel log. Ignoring the first character
  2351. * from the message fixes this to print it in a single
  2352. * line.
  2353. */
  2354. pkt->rg_msg_data[pkt->msg_size-1] = '\0';
  2355. dprintk(log_level, "%s", &pkt->rg_msg_data[1]);
  2356. }
  2357. }
  2358. #undef SKIP_INVALID_PKT
  2359. if (local_packet)
  2360. kfree(packet);
  2361. }
  2362. static bool __is_session_valid(struct iris_hfi_device *device,
  2363. struct cvp_hal_session *session, const char *func)
  2364. {
  2365. struct cvp_hal_session *temp = NULL;
  2366. if (!device || !session)
  2367. goto invalid;
  2368. list_for_each_entry(temp, &device->sess_head, list)
  2369. if (session == temp)
  2370. return true;
  2371. invalid:
  2372. dprintk(CVP_WARN, "%s: device %pK, invalid session %pK\n",
  2373. func, device, session);
  2374. return false;
  2375. }
  2376. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  2377. u32 session_id)
  2378. {
  2379. struct cvp_hal_session *temp = NULL;
  2380. list_for_each_entry(temp, &device->sess_head, list) {
  2381. if (session_id == hash32_ptr(temp))
  2382. return temp;
  2383. }
  2384. return NULL;
  2385. }
  2386. #define _INVALID_MSG_ "Unrecognized MSG (%#x) session (%pK), discarding\n"
  2387. #define _INVALID_STATE_ "Ignore responses from %d to %d invalid state\n"
  2388. #define _DEVFREQ_FAIL_ "Failed to add devfreq device bus %s governor %s: %d\n"
  2389. static void process_system_msg(struct msm_cvp_cb_info *info,
  2390. struct iris_hfi_device *device,
  2391. void *raw_packet)
  2392. {
  2393. struct cvp_hal_sys_init_done sys_init_done = {0};
  2394. switch (info->response_type) {
  2395. case HAL_SYS_ERROR:
  2396. __process_sys_error(device);
  2397. break;
  2398. case HAL_SYS_RELEASE_RESOURCE_DONE:
  2399. dprintk(CVP_CORE, "Received SYS_RELEASE_RESOURCE\n");
  2400. break;
  2401. case HAL_SYS_INIT_DONE:
  2402. dprintk(CVP_CORE, "Received SYS_INIT_DONE\n");
  2403. sys_init_done.capabilities =
  2404. device->sys_init_capabilities;
  2405. cvp_hfi_process_sys_init_done_prop_read(
  2406. (struct cvp_hfi_msg_sys_init_done_packet *)
  2407. raw_packet, &sys_init_done);
  2408. info->response.cmd.data.sys_init_done = sys_init_done;
  2409. break;
  2410. default:
  2411. break;
  2412. }
  2413. }
  2414. static void **get_session_id(struct msm_cvp_cb_info *info)
  2415. {
  2416. void **session_id = NULL;
  2417. /* For session-related packets, validate session */
  2418. switch (info->response_type) {
  2419. case HAL_SESSION_INIT_DONE:
  2420. case HAL_SESSION_END_DONE:
  2421. case HAL_SESSION_ABORT_DONE:
  2422. case HAL_SESSION_STOP_DONE:
  2423. case HAL_SESSION_FLUSH_DONE:
  2424. case HAL_SESSION_SET_BUFFER_DONE:
  2425. case HAL_SESSION_SUSPEND_DONE:
  2426. case HAL_SESSION_RESUME_DONE:
  2427. case HAL_SESSION_SET_PROP_DONE:
  2428. case HAL_SESSION_GET_PROP_DONE:
  2429. case HAL_SESSION_RELEASE_BUFFER_DONE:
  2430. case HAL_SESSION_REGISTER_BUFFER_DONE:
  2431. case HAL_SESSION_UNREGISTER_BUFFER_DONE:
  2432. case HAL_SESSION_DFS_CONFIG_CMD_DONE:
  2433. case HAL_SESSION_DME_CONFIG_CMD_DONE:
  2434. case HAL_SESSION_TME_CONFIG_CMD_DONE:
  2435. case HAL_SESSION_ODT_CONFIG_CMD_DONE:
  2436. case HAL_SESSION_OD_CONFIG_CMD_DONE:
  2437. case HAL_SESSION_NCC_CONFIG_CMD_DONE:
  2438. case HAL_SESSION_ICA_CONFIG_CMD_DONE:
  2439. case HAL_SESSION_HCD_CONFIG_CMD_DONE:
  2440. case HAL_SESSION_DCM_CONFIG_CMD_DONE:
  2441. case HAL_SESSION_DC_CONFIG_CMD_DONE:
  2442. case HAL_SESSION_PYS_HCD_CONFIG_CMD_DONE:
  2443. case HAL_SESSION_DME_BASIC_CONFIG_CMD_DONE:
  2444. case HAL_SESSION_DFS_FRAME_CMD_DONE:
  2445. case HAL_SESSION_DME_FRAME_CMD_DONE:
  2446. case HAL_SESSION_ICA_FRAME_CMD_DONE:
  2447. case HAL_SESSION_FD_FRAME_CMD_DONE:
  2448. case HAL_SESSION_PERSIST_SET_DONE:
  2449. case HAL_SESSION_PERSIST_REL_DONE:
  2450. case HAL_SESSION_FD_CONFIG_CMD_DONE:
  2451. case HAL_SESSION_MODEL_BUF_CMD_DONE:
  2452. case HAL_SESSION_PROPERTY_INFO:
  2453. case HAL_SESSION_EVENT_CHANGE:
  2454. session_id = &info->response.cmd.session_id;
  2455. break;
  2456. case HAL_SESSION_ERROR:
  2457. session_id = &info->response.data.session_id;
  2458. break;
  2459. case HAL_RESPONSE_UNUSED:
  2460. default:
  2461. session_id = NULL;
  2462. break;
  2463. }
  2464. return session_id;
  2465. }
  2466. static void print_msg_hdr(void *hdr)
  2467. {
  2468. struct cvp_hfi_msg_session_hdr *new_hdr =
  2469. (struct cvp_hfi_msg_session_hdr *)hdr;
  2470. dprintk(CVP_HFI, "HFI MSG received: %x %x %x %x %x %x %x\n",
  2471. new_hdr->size, new_hdr->packet_type,
  2472. new_hdr->session_id,
  2473. new_hdr->client_data.transaction_id,
  2474. new_hdr->client_data.data1,
  2475. new_hdr->client_data.data2,
  2476. new_hdr->error_type);
  2477. }
  2478. static int __response_handler(struct iris_hfi_device *device)
  2479. {
  2480. struct msm_cvp_cb_info *packets;
  2481. int packet_count = 0;
  2482. u8 *raw_packet = NULL;
  2483. bool requeue_pm_work = true;
  2484. if (!device || device->state != IRIS_STATE_INIT)
  2485. return 0;
  2486. packets = device->response_pkt;
  2487. raw_packet = device->raw_packet;
  2488. if (!raw_packet || !packets) {
  2489. dprintk(CVP_ERR,
  2490. "%s: Invalid args : Res packet = %p, Raw packet = %p\n",
  2491. __func__, packets, raw_packet);
  2492. return 0;
  2493. }
  2494. if (device->intr_status & CVP_FATAL_INTR_BMSK) {
  2495. struct cvp_hfi_sfr_struct *vsfr = (struct cvp_hfi_sfr_struct *)
  2496. device->sfr.align_virtual_addr;
  2497. struct msm_cvp_cb_info info = {
  2498. .response_type = HAL_SYS_WATCHDOG_TIMEOUT,
  2499. .response.cmd = {
  2500. .device_id = device->device_id,
  2501. }
  2502. };
  2503. if (vsfr)
  2504. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2505. vsfr->rg_data);
  2506. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CPU_NOC_BMSK)
  2507. dprintk(CVP_ERR, "Received Xtensa NOC error\n");
  2508. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CORE_NOC_BMSK)
  2509. dprintk(CVP_ERR, "Received CVP core NOC error\n");
  2510. if (device->intr_status & CVP_WRAPPER_INTR_MASK_A2HWD_BMSK)
  2511. dprintk(CVP_ERR, "Received CVP watchdog timeout\n");
  2512. packets[packet_count++] = info;
  2513. goto exit;
  2514. }
  2515. /* Bleed the msg queue dry of packets */
  2516. while (!__iface_msgq_read(device, raw_packet)) {
  2517. void **session_id = NULL;
  2518. struct msm_cvp_cb_info *info = &packets[packet_count++];
  2519. struct cvp_hfi_msg_session_hdr *hdr =
  2520. (struct cvp_hfi_msg_session_hdr *)raw_packet;
  2521. int rc = 0;
  2522. print_msg_hdr(hdr);
  2523. rc = cvp_hfi_process_msg_packet(device->device_id,
  2524. raw_packet, info);
  2525. if (rc) {
  2526. dprintk(CVP_WARN,
  2527. "Corrupt/unknown packet found, discarding\n");
  2528. --packet_count;
  2529. continue;
  2530. } else if (info->response_type == HAL_NO_RESP) {
  2531. --packet_count;
  2532. continue;
  2533. }
  2534. /* Process the packet types that we're interested in */
  2535. process_system_msg(info, device, raw_packet);
  2536. session_id = get_session_id(info);
  2537. /*
  2538. * hfi_process_msg_packet provides a session_id that's a hashed
  2539. * value of struct cvp_hal_session, we need to coerce the hashed
  2540. * value back to pointer that we can use. Ideally, hfi_process\
  2541. * _msg_packet should take care of this, but it doesn't have
  2542. * required information for it
  2543. */
  2544. if (session_id) {
  2545. struct cvp_hal_session *session = NULL;
  2546. if (upper_32_bits((uintptr_t)*session_id) != 0) {
  2547. dprintk(CVP_ERR,
  2548. "Upper 32-bits != 0 for sess_id=%pK\n",
  2549. *session_id);
  2550. }
  2551. session = __get_session(device,
  2552. (u32)(uintptr_t)*session_id);
  2553. if (!session) {
  2554. dprintk(CVP_ERR, _INVALID_MSG_,
  2555. info->response_type,
  2556. *session_id);
  2557. --packet_count;
  2558. continue;
  2559. }
  2560. *session_id = session->session_id;
  2561. }
  2562. if (packet_count >= cvp_max_packets) {
  2563. dprintk(CVP_WARN,
  2564. "Too many packets in message queue!\n");
  2565. break;
  2566. }
  2567. /* do not read packets after sys error packet */
  2568. if (info->response_type == HAL_SYS_ERROR)
  2569. break;
  2570. }
  2571. if (requeue_pm_work && device->res->sw_power_collapsible) {
  2572. cancel_delayed_work(&iris_hfi_pm_work);
  2573. if (!queue_delayed_work(device->iris_pm_workq,
  2574. &iris_hfi_pm_work,
  2575. msecs_to_jiffies(
  2576. device->res->msm_cvp_pwr_collapse_delay))) {
  2577. dprintk(CVP_ERR, "PM work already scheduled\n");
  2578. }
  2579. }
  2580. exit:
  2581. __flush_debug_queue(device, raw_packet);
  2582. return packet_count;
  2583. }
  2584. static void iris_hfi_core_work_handler(struct work_struct *work)
  2585. {
  2586. struct msm_cvp_core *core;
  2587. struct iris_hfi_device *device;
  2588. int num_responses = 0, i = 0;
  2589. u32 intr_status;
  2590. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2591. if (core)
  2592. device = core->device->hfi_device_data;
  2593. else
  2594. return;
  2595. mutex_lock(&device->lock);
  2596. if (!__core_in_valid_state(device)) {
  2597. dprintk(CVP_WARN, "%s - Core not in init state\n", __func__);
  2598. goto err_no_work;
  2599. }
  2600. if (!device->callback) {
  2601. dprintk(CVP_ERR, "No interrupt callback function: %pK\n",
  2602. device);
  2603. goto err_no_work;
  2604. }
  2605. if (__resume(device)) {
  2606. dprintk(CVP_ERR, "%s: Power enable failed\n", __func__);
  2607. goto err_no_work;
  2608. }
  2609. __core_clear_interrupt(device);
  2610. num_responses = __response_handler(device);
  2611. dprintk(CVP_HFI, "%s:: cvp_driver_debug num_responses = %d ",
  2612. __func__, num_responses);
  2613. err_no_work:
  2614. /* Keep the interrupt status before releasing device lock */
  2615. intr_status = device->intr_status;
  2616. mutex_unlock(&device->lock);
  2617. /*
  2618. * Issue the callbacks outside of the locked contex to preserve
  2619. * re-entrancy.
  2620. */
  2621. for (i = 0; !IS_ERR_OR_NULL(device->response_pkt) &&
  2622. i < num_responses; ++i) {
  2623. struct msm_cvp_cb_info *r = &device->response_pkt[i];
  2624. void *rsp = (void *)&r->response;
  2625. if (!__core_in_valid_state(device)) {
  2626. dprintk(CVP_ERR,
  2627. _INVALID_STATE_, (i + 1), num_responses);
  2628. break;
  2629. }
  2630. dprintk(CVP_HFI, "Processing response %d of %d, type %d\n",
  2631. (i + 1), num_responses, r->response_type);
  2632. device->callback(r->response_type, rsp);
  2633. }
  2634. /* We need re-enable the irq which was disabled in ISR handler */
  2635. if (!(intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  2636. enable_irq(device->cvp_hal_data->irq);
  2637. /*
  2638. * XXX: Don't add any code beyond here. Reacquiring locks after release
  2639. * it above doesn't guarantee the atomicity that we're aiming for.
  2640. */
  2641. }
  2642. static DECLARE_WORK(iris_hfi_work, iris_hfi_core_work_handler);
  2643. static irqreturn_t iris_hfi_isr(int irq, void *dev)
  2644. {
  2645. struct iris_hfi_device *device = dev;
  2646. disable_irq_nosync(irq);
  2647. queue_work(device->cvp_workq, &iris_hfi_work);
  2648. return IRQ_HANDLED;
  2649. }
  2650. static int __init_regs_and_interrupts(struct iris_hfi_device *device,
  2651. struct msm_cvp_platform_resources *res)
  2652. {
  2653. struct cvp_hal_data *hal = NULL;
  2654. int rc = 0;
  2655. rc = __check_core_registered(device, res->firmware_base,
  2656. (u8 *)(uintptr_t)res->register_base,
  2657. res->register_size, res->irq);
  2658. if (!rc) {
  2659. dprintk(CVP_ERR, "Core present/Already added\n");
  2660. rc = -EEXIST;
  2661. goto err_core_init;
  2662. }
  2663. hal = kzalloc(sizeof(*hal), GFP_KERNEL);
  2664. if (!hal) {
  2665. dprintk(CVP_ERR, "Failed to alloc\n");
  2666. rc = -ENOMEM;
  2667. goto err_core_init;
  2668. }
  2669. hal->irq = res->irq;
  2670. hal->firmware_base = res->firmware_base;
  2671. hal->register_base = devm_ioremap_nocache(&res->pdev->dev,
  2672. res->register_base, res->register_size);
  2673. hal->register_size = res->register_size;
  2674. if (!hal->register_base) {
  2675. dprintk(CVP_ERR,
  2676. "could not map reg addr %pa of size %d\n",
  2677. &res->register_base, res->register_size);
  2678. goto error_irq_fail;
  2679. }
  2680. device->cvp_hal_data = hal;
  2681. rc = request_irq(res->irq, iris_hfi_isr, IRQF_TRIGGER_HIGH,
  2682. "msm_cvp", device);
  2683. if (unlikely(rc)) {
  2684. dprintk(CVP_ERR, "() :request_irq failed\n");
  2685. goto error_irq_fail;
  2686. }
  2687. disable_irq_nosync(res->irq);
  2688. dprintk(CVP_INFO,
  2689. "firmware_base = %pa, register_base = %pa, register_size = %d\n",
  2690. &res->firmware_base, &res->register_base,
  2691. res->register_size);
  2692. return rc;
  2693. error_irq_fail:
  2694. kfree(hal);
  2695. err_core_init:
  2696. return rc;
  2697. }
  2698. static inline void __deinit_clocks(struct iris_hfi_device *device)
  2699. {
  2700. struct clock_info *cl;
  2701. device->clk_freq = 0;
  2702. iris_hfi_for_each_clock_reverse(device, cl) {
  2703. if (cl->clk) {
  2704. clk_put(cl->clk);
  2705. cl->clk = NULL;
  2706. }
  2707. }
  2708. }
  2709. static inline int __init_clocks(struct iris_hfi_device *device)
  2710. {
  2711. int rc = 0;
  2712. struct clock_info *cl = NULL;
  2713. if (!device) {
  2714. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  2715. return -EINVAL;
  2716. }
  2717. iris_hfi_for_each_clock(device, cl) {
  2718. dprintk(CVP_PWR, "%s: scalable? %d, count %d\n",
  2719. cl->name, cl->has_scaling, cl->count);
  2720. }
  2721. iris_hfi_for_each_clock(device, cl) {
  2722. if (!cl->clk) {
  2723. cl->clk = clk_get(&device->res->pdev->dev, cl->name);
  2724. if (IS_ERR_OR_NULL(cl->clk)) {
  2725. dprintk(CVP_ERR,
  2726. "Failed to get clock: %s\n", cl->name);
  2727. rc = PTR_ERR(cl->clk) ?: -EINVAL;
  2728. cl->clk = NULL;
  2729. goto err_clk_get;
  2730. }
  2731. }
  2732. }
  2733. device->clk_freq = 0;
  2734. return 0;
  2735. err_clk_get:
  2736. __deinit_clocks(device);
  2737. return rc;
  2738. }
  2739. static int __handle_reset_clk(struct msm_cvp_platform_resources *res,
  2740. int reset_index, enum reset_state state,
  2741. enum power_state pwr_state)
  2742. {
  2743. int rc = 0;
  2744. struct reset_control *rst;
  2745. struct reset_info rst_info;
  2746. struct reset_set *rst_set = &res->reset_set;
  2747. if (!rst_set->reset_tbl)
  2748. return 0;
  2749. rst_info = rst_set->reset_tbl[reset_index];
  2750. rst = rst_info.rst;
  2751. dprintk(CVP_PWR, "reset_clk: name %s reset_state %d rst %pK ps=%d\n",
  2752. rst_set->reset_tbl[reset_index].name, state, rst, pwr_state);
  2753. switch (state) {
  2754. case INIT:
  2755. if (rst)
  2756. goto skip_reset_init;
  2757. rst = devm_reset_control_get(&res->pdev->dev,
  2758. rst_set->reset_tbl[reset_index].name);
  2759. if (IS_ERR(rst))
  2760. rc = PTR_ERR(rst);
  2761. rst_set->reset_tbl[reset_index].rst = rst;
  2762. break;
  2763. case ASSERT:
  2764. if (!rst) {
  2765. rc = PTR_ERR(rst);
  2766. goto failed_to_reset;
  2767. }
  2768. if (pwr_state != rst_info.required_state)
  2769. break;
  2770. rc = reset_control_assert(rst);
  2771. break;
  2772. case DEASSERT:
  2773. if (!rst) {
  2774. rc = PTR_ERR(rst);
  2775. goto failed_to_reset;
  2776. }
  2777. if (pwr_state != rst_info.required_state)
  2778. break;
  2779. rc = reset_control_deassert(rst);
  2780. break;
  2781. default:
  2782. dprintk(CVP_ERR, "Invalid reset request\n");
  2783. if (rc)
  2784. goto failed_to_reset;
  2785. }
  2786. return 0;
  2787. skip_reset_init:
  2788. failed_to_reset:
  2789. return rc;
  2790. }
  2791. static inline void __disable_unprepare_clks(struct iris_hfi_device *device)
  2792. {
  2793. struct clock_info *cl;
  2794. if (!device) {
  2795. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  2796. return;
  2797. }
  2798. iris_hfi_for_each_clock_reverse(device, cl) {
  2799. dprintk(CVP_PWR, "Clock: %s disable and unprepare\n",
  2800. cl->name);
  2801. clk_disable_unprepare(cl->clk);
  2802. }
  2803. }
  2804. static int reset_ahb2axi_bridge(struct iris_hfi_device *device)
  2805. {
  2806. int rc, i;
  2807. enum power_state s;
  2808. if (!device) {
  2809. dprintk(CVP_ERR, "NULL device\n");
  2810. rc = -EINVAL;
  2811. goto failed_to_reset;
  2812. }
  2813. if (device->power_enabled)
  2814. s = CVP_POWER_ON;
  2815. else
  2816. s = CVP_POWER_OFF;
  2817. for (i = 0; i < device->res->reset_set.count; i++) {
  2818. rc = __handle_reset_clk(device->res, i, ASSERT, s);
  2819. if (rc) {
  2820. dprintk(CVP_ERR,
  2821. "failed to assert reset clocks\n");
  2822. goto failed_to_reset;
  2823. }
  2824. /* wait for deassert */
  2825. usleep_range(400, 450);
  2826. rc = __handle_reset_clk(device->res, i, DEASSERT, s);
  2827. if (rc) {
  2828. dprintk(CVP_ERR,
  2829. "failed to deassert reset clocks\n");
  2830. goto failed_to_reset;
  2831. }
  2832. }
  2833. return 0;
  2834. failed_to_reset:
  2835. return rc;
  2836. }
  2837. static inline int __prepare_enable_clks(struct iris_hfi_device *device)
  2838. {
  2839. struct clock_info *cl = NULL, *cl_fail = NULL;
  2840. int rc = 0, c = 0;
  2841. if (!device) {
  2842. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  2843. return -EINVAL;
  2844. }
  2845. iris_hfi_for_each_clock(device, cl) {
  2846. /*
  2847. * For the clocks we control, set the rate prior to preparing
  2848. * them. Since we don't really have a load at this point, scale
  2849. * it to the lowest frequency possible
  2850. */
  2851. if (cl->has_scaling)
  2852. clk_set_rate(cl->clk, clk_round_rate(cl->clk, 0));
  2853. rc = clk_prepare_enable(cl->clk);
  2854. if (rc) {
  2855. dprintk(CVP_ERR, "Failed to enable clocks\n");
  2856. cl_fail = cl;
  2857. goto fail_clk_enable;
  2858. }
  2859. c++;
  2860. dprintk(CVP_PWR, "Clock: %s prepared and enabled\n", cl->name);
  2861. }
  2862. return rc;
  2863. fail_clk_enable:
  2864. iris_hfi_for_each_clock_reverse_continue(device, cl, c) {
  2865. dprintk(CVP_ERR, "Clock: %s disable and unprepare\n",
  2866. cl->name);
  2867. clk_disable_unprepare(cl->clk);
  2868. }
  2869. return rc;
  2870. }
  2871. static void __deinit_bus(struct iris_hfi_device *device)
  2872. {
  2873. struct bus_info *bus = NULL;
  2874. if (!device)
  2875. return;
  2876. kfree(device->bus_vote.data);
  2877. device->bus_vote = CVP_DEFAULT_BUS_VOTE;
  2878. iris_hfi_for_each_bus_reverse(device, bus) {
  2879. dev_set_drvdata(bus->dev, NULL);
  2880. icc_put(bus->client);
  2881. bus->client = NULL;
  2882. }
  2883. }
  2884. static int __init_bus(struct iris_hfi_device *device)
  2885. {
  2886. struct bus_info *bus = NULL;
  2887. int rc = 0;
  2888. if (!device)
  2889. return -EINVAL;
  2890. iris_hfi_for_each_bus(device, bus) {
  2891. /*
  2892. * This is stupid, but there's no other easy way to ahold
  2893. * of struct bus_info in iris_hfi_devfreq_*()
  2894. */
  2895. WARN(dev_get_drvdata(bus->dev), "%s's drvdata already set\n",
  2896. dev_name(bus->dev));
  2897. dev_set_drvdata(bus->dev, device);
  2898. bus->client = icc_get(&device->res->pdev->dev,
  2899. bus->master, bus->slave);
  2900. if (IS_ERR_OR_NULL(bus->client)) {
  2901. rc = PTR_ERR(bus->client) ?: -EBADHANDLE;
  2902. dprintk(CVP_ERR, "Failed to register bus %s: %d\n",
  2903. bus->name, rc);
  2904. bus->client = NULL;
  2905. goto err_add_dev;
  2906. }
  2907. }
  2908. return 0;
  2909. err_add_dev:
  2910. __deinit_bus(device);
  2911. return rc;
  2912. }
  2913. static void __deinit_regulators(struct iris_hfi_device *device)
  2914. {
  2915. struct regulator_info *rinfo = NULL;
  2916. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  2917. if (rinfo->regulator) {
  2918. regulator_put(rinfo->regulator);
  2919. rinfo->regulator = NULL;
  2920. }
  2921. }
  2922. }
  2923. static int __init_regulators(struct iris_hfi_device *device)
  2924. {
  2925. int rc = 0;
  2926. struct regulator_info *rinfo = NULL;
  2927. iris_hfi_for_each_regulator(device, rinfo) {
  2928. rinfo->regulator = regulator_get(&device->res->pdev->dev,
  2929. rinfo->name);
  2930. if (IS_ERR_OR_NULL(rinfo->regulator)) {
  2931. rc = PTR_ERR(rinfo->regulator) ?: -EBADHANDLE;
  2932. dprintk(CVP_ERR, "Failed to get regulator: %s\n",
  2933. rinfo->name);
  2934. rinfo->regulator = NULL;
  2935. goto err_reg_get;
  2936. }
  2937. }
  2938. return 0;
  2939. err_reg_get:
  2940. __deinit_regulators(device);
  2941. return rc;
  2942. }
  2943. static void __deinit_subcaches(struct iris_hfi_device *device)
  2944. {
  2945. struct subcache_info *sinfo = NULL;
  2946. if (!device) {
  2947. dprintk(CVP_ERR, "deinit_subcaches: invalid device %pK\n",
  2948. device);
  2949. goto exit;
  2950. }
  2951. if (!is_sys_cache_present(device))
  2952. goto exit;
  2953. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  2954. if (sinfo->subcache) {
  2955. dprintk(CVP_CORE, "deinit_subcaches: %s\n",
  2956. sinfo->name);
  2957. llcc_slice_putd(sinfo->subcache);
  2958. sinfo->subcache = NULL;
  2959. }
  2960. }
  2961. exit:
  2962. return;
  2963. }
  2964. static int __init_subcaches(struct iris_hfi_device *device)
  2965. {
  2966. int rc = 0;
  2967. struct subcache_info *sinfo = NULL;
  2968. if (!device) {
  2969. dprintk(CVP_ERR, "init_subcaches: invalid device %pK\n",
  2970. device);
  2971. return -EINVAL;
  2972. }
  2973. if (!is_sys_cache_present(device))
  2974. return 0;
  2975. iris_hfi_for_each_subcache(device, sinfo) {
  2976. if (!strcmp("cvp", sinfo->name)) {
  2977. sinfo->subcache = llcc_slice_getd(LLCC_CVP);
  2978. } else if (!strcmp("cvpfw", sinfo->name)) {
  2979. sinfo->subcache = llcc_slice_getd(LLCC_CVPFW);
  2980. } else {
  2981. dprintk(CVP_ERR, "Invalid subcache name %s\n",
  2982. sinfo->name);
  2983. }
  2984. if (IS_ERR_OR_NULL(sinfo->subcache)) {
  2985. rc = PTR_ERR(sinfo->subcache) ?
  2986. PTR_ERR(sinfo->subcache) : -EBADHANDLE;
  2987. dprintk(CVP_ERR,
  2988. "init_subcaches: invalid subcache: %s rc %d\n",
  2989. sinfo->name, rc);
  2990. sinfo->subcache = NULL;
  2991. goto err_subcache_get;
  2992. }
  2993. dprintk(CVP_CORE, "init_subcaches: %s\n",
  2994. sinfo->name);
  2995. }
  2996. return 0;
  2997. err_subcache_get:
  2998. __deinit_subcaches(device);
  2999. return rc;
  3000. }
  3001. static int __init_resources(struct iris_hfi_device *device,
  3002. struct msm_cvp_platform_resources *res)
  3003. {
  3004. int i, rc = 0;
  3005. rc = __init_regulators(device);
  3006. if (rc) {
  3007. dprintk(CVP_ERR, "Failed to get all regulators\n");
  3008. return -ENODEV;
  3009. }
  3010. rc = __init_clocks(device);
  3011. if (rc) {
  3012. dprintk(CVP_ERR, "Failed to init clocks\n");
  3013. rc = -ENODEV;
  3014. goto err_init_clocks;
  3015. }
  3016. for (i = 0; i < device->res->reset_set.count; i++) {
  3017. rc = __handle_reset_clk(res, i, INIT, 0);
  3018. if (rc) {
  3019. dprintk(CVP_ERR, "Failed to init reset clocks\n");
  3020. rc = -ENODEV;
  3021. goto err_init_reset_clk;
  3022. }
  3023. }
  3024. rc = __init_bus(device);
  3025. if (rc) {
  3026. dprintk(CVP_ERR, "Failed to init bus: %d\n", rc);
  3027. goto err_init_bus;
  3028. }
  3029. rc = __init_subcaches(device);
  3030. if (rc)
  3031. dprintk(CVP_WARN, "Failed to init subcaches: %d\n", rc);
  3032. device->sys_init_capabilities =
  3033. kzalloc(sizeof(struct msm_cvp_capability)
  3034. * CVP_MAX_SESSIONS, GFP_KERNEL);
  3035. return rc;
  3036. err_init_reset_clk:
  3037. err_init_bus:
  3038. __deinit_clocks(device);
  3039. err_init_clocks:
  3040. __deinit_regulators(device);
  3041. return rc;
  3042. }
  3043. static void __deinit_resources(struct iris_hfi_device *device)
  3044. {
  3045. __deinit_subcaches(device);
  3046. __deinit_bus(device);
  3047. __deinit_clocks(device);
  3048. __deinit_regulators(device);
  3049. kfree(device->sys_init_capabilities);
  3050. device->sys_init_capabilities = NULL;
  3051. }
  3052. static int __protect_cp_mem(struct iris_hfi_device *device)
  3053. {
  3054. return device ? 0 : -EINVAL;
  3055. }
  3056. static int __disable_regulator(struct regulator_info *rinfo,
  3057. struct iris_hfi_device *device)
  3058. {
  3059. int rc = 0;
  3060. dprintk(CVP_PWR, "Disabling regulator %s\n", rinfo->name);
  3061. /*
  3062. * This call is needed. Driver needs to acquire the control back
  3063. * from HW in order to disable the regualtor. Else the behavior
  3064. * is unknown.
  3065. */
  3066. rc = __acquire_regulator(rinfo, device);
  3067. if (rc) {
  3068. /*
  3069. * This is somewhat fatal, but nothing we can do
  3070. * about it. We can't disable the regulator w/o
  3071. * getting it back under s/w control
  3072. */
  3073. dprintk(CVP_WARN,
  3074. "Failed to acquire control on %s\n",
  3075. rinfo->name);
  3076. goto disable_regulator_failed;
  3077. }
  3078. rc = regulator_disable(rinfo->regulator);
  3079. if (rc) {
  3080. dprintk(CVP_WARN,
  3081. "Failed to disable %s: %d\n",
  3082. rinfo->name, rc);
  3083. goto disable_regulator_failed;
  3084. }
  3085. return 0;
  3086. disable_regulator_failed:
  3087. /* Bring attention to this issue */
  3088. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  3089. return rc;
  3090. }
  3091. static int __enable_hw_power_collapse(struct iris_hfi_device *device)
  3092. {
  3093. int rc = 0;
  3094. if (!msm_cvp_fw_low_power_mode) {
  3095. dprintk(CVP_PWR, "Not enabling hardware power collapse\n");
  3096. return 0;
  3097. }
  3098. rc = __hand_off_regulators(device);
  3099. if (rc)
  3100. dprintk(CVP_WARN,
  3101. "%s : Failed to enable HW power collapse %d\n",
  3102. __func__, rc);
  3103. return rc;
  3104. }
  3105. static int __enable_regulators(struct iris_hfi_device *device)
  3106. {
  3107. int rc = 0, c = 0;
  3108. struct regulator_info *rinfo;
  3109. dprintk(CVP_PWR, "Enabling regulators\n");
  3110. iris_hfi_for_each_regulator(device, rinfo) {
  3111. rc = regulator_enable(rinfo->regulator);
  3112. if (rc) {
  3113. dprintk(CVP_ERR, "Failed to enable %s: %d\n",
  3114. rinfo->name, rc);
  3115. goto err_reg_enable_failed;
  3116. }
  3117. dprintk(CVP_PWR, "Enabled regulator %s\n", rinfo->name);
  3118. c++;
  3119. }
  3120. return 0;
  3121. err_reg_enable_failed:
  3122. iris_hfi_for_each_regulator_reverse_continue(device, rinfo, c)
  3123. __disable_regulator(rinfo, device);
  3124. return rc;
  3125. }
  3126. static int __disable_regulators(struct iris_hfi_device *device)
  3127. {
  3128. struct regulator_info *rinfo;
  3129. dprintk(CVP_PWR, "Disabling regulators\n");
  3130. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  3131. __disable_regulator(rinfo, device);
  3132. if (rinfo->has_hw_power_collapse)
  3133. regulator_set_mode(rinfo->regulator,
  3134. REGULATOR_MODE_NORMAL);
  3135. }
  3136. return 0;
  3137. }
  3138. static int __enable_subcaches(struct iris_hfi_device *device)
  3139. {
  3140. int rc = 0;
  3141. u32 c = 0;
  3142. struct subcache_info *sinfo;
  3143. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3144. return 0;
  3145. /* Activate subcaches */
  3146. iris_hfi_for_each_subcache(device, sinfo) {
  3147. rc = llcc_slice_activate(sinfo->subcache);
  3148. if (rc) {
  3149. dprintk(CVP_WARN, "Failed to activate %s: %d\n",
  3150. sinfo->name, rc);
  3151. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  3152. goto err_activate_fail;
  3153. }
  3154. sinfo->isactive = true;
  3155. dprintk(CVP_CORE, "Activated subcache %s\n", sinfo->name);
  3156. c++;
  3157. }
  3158. dprintk(CVP_CORE, "Activated %d Subcaches to CVP\n", c);
  3159. return 0;
  3160. err_activate_fail:
  3161. __release_subcaches(device);
  3162. __disable_subcaches(device);
  3163. return 0;
  3164. }
  3165. static int __set_subcaches(struct iris_hfi_device *device)
  3166. {
  3167. int rc = 0;
  3168. u32 c = 0;
  3169. struct subcache_info *sinfo;
  3170. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  3171. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  3172. struct cvp_hfi_resource_subcache_type *sc_res;
  3173. struct cvp_resource_hdr rhdr;
  3174. if (device->res->sys_cache_res_set || msm_cvp_syscache_disable) {
  3175. dprintk(CVP_CORE, "Subcaches already set or disabled\n");
  3176. return 0;
  3177. }
  3178. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  3179. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  3180. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  3181. iris_hfi_for_each_subcache(device, sinfo) {
  3182. if (sinfo->isactive) {
  3183. sc_res[c].size = sinfo->subcache->slice_size;
  3184. sc_res[c].sc_id = sinfo->subcache->slice_id;
  3185. c++;
  3186. }
  3187. }
  3188. /* Set resource to CVP for activated subcaches */
  3189. if (c) {
  3190. dprintk(CVP_CORE, "Setting %d Subcaches\n", c);
  3191. rhdr.resource_handle = sc_res_info; /* cookie */
  3192. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  3193. sc_res_info->num_entries = c;
  3194. rc = __core_set_resource(device, &rhdr, (void *)sc_res_info);
  3195. if (rc) {
  3196. dprintk(CVP_WARN, "Failed to set subcaches %d\n", rc);
  3197. goto err_fail_set_subacaches;
  3198. }
  3199. iris_hfi_for_each_subcache(device, sinfo) {
  3200. if (sinfo->isactive)
  3201. sinfo->isset = true;
  3202. }
  3203. dprintk(CVP_CORE, "Set Subcaches done to CVP\n");
  3204. device->res->sys_cache_res_set = true;
  3205. }
  3206. return 0;
  3207. err_fail_set_subacaches:
  3208. __disable_subcaches(device);
  3209. return 0;
  3210. }
  3211. static int __release_subcaches(struct iris_hfi_device *device)
  3212. {
  3213. struct subcache_info *sinfo;
  3214. int rc = 0;
  3215. u32 c = 0;
  3216. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  3217. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  3218. struct cvp_hfi_resource_subcache_type *sc_res;
  3219. struct cvp_resource_hdr rhdr;
  3220. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3221. return 0;
  3222. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  3223. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  3224. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  3225. /* Release resource command to Iris */
  3226. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3227. if (sinfo->isset) {
  3228. /* Update the entry */
  3229. sc_res[c].size = sinfo->subcache->slice_size;
  3230. sc_res[c].sc_id = sinfo->subcache->slice_id;
  3231. c++;
  3232. sinfo->isset = false;
  3233. }
  3234. }
  3235. if (c > 0) {
  3236. dprintk(CVP_CORE, "Releasing %d subcaches\n", c);
  3237. rhdr.resource_handle = sc_res_info; /* cookie */
  3238. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  3239. rc = __core_release_resource(device, &rhdr);
  3240. if (rc)
  3241. dprintk(CVP_WARN,
  3242. "Failed to release %d subcaches\n", c);
  3243. }
  3244. device->res->sys_cache_res_set = false;
  3245. return 0;
  3246. }
  3247. static int __disable_subcaches(struct iris_hfi_device *device)
  3248. {
  3249. struct subcache_info *sinfo;
  3250. int rc = 0;
  3251. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3252. return 0;
  3253. /* De-activate subcaches */
  3254. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3255. if (sinfo->isactive) {
  3256. dprintk(CVP_CORE, "De-activate subcache %s\n",
  3257. sinfo->name);
  3258. rc = llcc_slice_deactivate(sinfo->subcache);
  3259. if (rc) {
  3260. dprintk(CVP_WARN,
  3261. "Failed to de-activate %s: %d\n",
  3262. sinfo->name, rc);
  3263. }
  3264. sinfo->isactive = false;
  3265. }
  3266. }
  3267. return 0;
  3268. }
  3269. static void interrupt_init_iris2(struct iris_hfi_device *device)
  3270. {
  3271. u32 mask_val = 0;
  3272. /* All interrupts should be disabled initially 0x1F6 : Reset value */
  3273. mask_val = __read_register(device, CVP_WRAPPER_INTR_MASK);
  3274. /* Write 0 to unmask CPU and WD interrupts */
  3275. mask_val &= ~(CVP_FATAL_INTR_BMSK | CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK);
  3276. __write_register(device, CVP_WRAPPER_INTR_MASK, mask_val);
  3277. dprintk(CVP_REG, "Init irq: reg: %x, mask value %x\n",
  3278. CVP_WRAPPER_INTR_MASK, mask_val);
  3279. }
  3280. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device)
  3281. {
  3282. /* initialize DSP QTBL & UCREGION with CPU queues */
  3283. __write_register(device, HFI_DSP_QTBL_ADDR,
  3284. (u32)device->dsp_iface_q_table.align_device_addr);
  3285. __write_register(device, HFI_DSP_UC_REGION_ADDR,
  3286. (u32)device->dsp_iface_q_table.align_device_addr);
  3287. __write_register(device, HFI_DSP_UC_REGION_SIZE,
  3288. device->dsp_iface_q_table.mem_data.size);
  3289. }
  3290. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device)
  3291. {
  3292. __write_register(device, CVP_WRAPPER_CPU_CLOCK_CONFIG, 0);
  3293. }
  3294. static int __set_ubwc_config(struct iris_hfi_device *device)
  3295. {
  3296. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  3297. int rc = 0;
  3298. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  3299. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  3300. if (!device->res->ubwc_config)
  3301. return 0;
  3302. rc = call_hfi_pkt_op(device, sys_ubwc_config, pkt,
  3303. device->res->ubwc_config);
  3304. if (rc) {
  3305. dprintk(CVP_WARN,
  3306. "ubwc config setting to FW failed\n");
  3307. rc = -ENOTEMPTY;
  3308. goto fail_to_set_ubwc_config;
  3309. }
  3310. if (__iface_cmdq_write(device, pkt)) {
  3311. rc = -ENOTEMPTY;
  3312. goto fail_to_set_ubwc_config;
  3313. }
  3314. fail_to_set_ubwc_config:
  3315. return rc;
  3316. }
  3317. static int __iris_power_on(struct iris_hfi_device *device)
  3318. {
  3319. int rc = 0;
  3320. if (device->power_enabled)
  3321. return 0;
  3322. /* Vote for all hardware resources */
  3323. rc = __vote_buses(device, device->bus_vote.data,
  3324. device->bus_vote.data_count);
  3325. if (rc) {
  3326. dprintk(CVP_ERR, "Failed to vote buses, err: %d\n", rc);
  3327. goto fail_vote_buses;
  3328. }
  3329. rc = __enable_regulators(device);
  3330. if (rc) {
  3331. dprintk(CVP_ERR, "Failed to enable GDSC, err = %d\n", rc);
  3332. goto fail_enable_gdsc;
  3333. }
  3334. rc = call_iris_op(device, reset_ahb2axi_bridge, device);
  3335. if (rc) {
  3336. dprintk(CVP_ERR, "Failed to reset ahb2axi: %d\n", rc);
  3337. goto fail_enable_clks;
  3338. }
  3339. rc = __prepare_enable_clks(device);
  3340. if (rc) {
  3341. dprintk(CVP_ERR, "Failed to enable clocks: %d\n", rc);
  3342. goto fail_enable_clks;
  3343. }
  3344. rc = __scale_clocks(device);
  3345. if (rc) {
  3346. dprintk(CVP_WARN,
  3347. "Failed to scale clocks, perf may regress\n");
  3348. rc = 0;
  3349. }
  3350. /*Do not access registers before this point!*/
  3351. device->power_enabled = true;
  3352. dprintk(CVP_PWR, "Done with scaling\n");
  3353. /*
  3354. * Re-program all of the registers that get reset as a result of
  3355. * regulator_disable() and _enable()
  3356. */
  3357. __set_registers(device);
  3358. dprintk(CVP_CORE, "Done with register set\n");
  3359. call_iris_op(device, interrupt_init, device);
  3360. dprintk(CVP_CORE, "Done with interrupt enabling\n");
  3361. device->intr_status = 0;
  3362. enable_irq(device->cvp_hal_data->irq);
  3363. /*
  3364. * Hand off control of regulators to h/w _after_ enabling clocks.
  3365. * Note that the GDSC will turn off when switching from normal
  3366. * (s/w triggered) to fast (HW triggered) unless the h/w vote is
  3367. * present. Since Iris isn't up yet, the GDSC will be off briefly.
  3368. */
  3369. if (__enable_hw_power_collapse(device))
  3370. dprintk(CVP_ERR, "Failed to enabled inter-frame PC\n");
  3371. return rc;
  3372. fail_enable_clks:
  3373. __disable_regulators(device);
  3374. fail_enable_gdsc:
  3375. __unvote_buses(device);
  3376. fail_vote_buses:
  3377. device->power_enabled = false;
  3378. return rc;
  3379. }
  3380. void power_off_common(struct iris_hfi_device *device)
  3381. {
  3382. if (!device->power_enabled)
  3383. return;
  3384. if (!(device->intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  3385. disable_irq_nosync(device->cvp_hal_data->irq);
  3386. device->intr_status = 0;
  3387. __disable_unprepare_clks(device);
  3388. if (__disable_regulators(device))
  3389. dprintk(CVP_WARN, "Failed to disable regulators\n");
  3390. if (__unvote_buses(device))
  3391. dprintk(CVP_WARN, "Failed to unvote for buses\n");
  3392. device->power_enabled = false;
  3393. }
  3394. static inline int __suspend(struct iris_hfi_device *device)
  3395. {
  3396. int rc = 0;
  3397. if (!device) {
  3398. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3399. return -EINVAL;
  3400. } else if (!device->power_enabled) {
  3401. dprintk(CVP_PWR, "Power already disabled\n");
  3402. return 0;
  3403. }
  3404. dprintk(CVP_PWR, "Entering suspend\n");
  3405. if (device->res->pm_qos_latency_us &&
  3406. pm_qos_request_active(&device->qos))
  3407. pm_qos_remove_request(&device->qos);
  3408. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3409. if (rc) {
  3410. dprintk(CVP_WARN, "Failed to suspend cvp core %d\n", rc);
  3411. goto err_tzbsp_suspend;
  3412. }
  3413. __disable_subcaches(device);
  3414. call_iris_op(device, power_off, device);
  3415. dprintk(CVP_PWR, "Iris power off\n");
  3416. return rc;
  3417. err_tzbsp_suspend:
  3418. return rc;
  3419. }
  3420. static void power_off_iris2(struct iris_hfi_device *device)
  3421. {
  3422. u32 lpi_status, reg_status = 0, count = 0, max_count = 1000;
  3423. u32 pc_ready, wfi_status, sbm_ln0_low;
  3424. u32 main_sbm_ln0_low, main_sbm_ln1_high;
  3425. if (!device->power_enabled || !device->res->sw_power_collapsible)
  3426. return;
  3427. if (!(device->intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  3428. disable_irq_nosync(device->cvp_hal_data->irq);
  3429. device->intr_status = 0;
  3430. /* HPG 6.1.2 Step 1 */
  3431. __write_register(device, CVP_CPU_CS_X2RPMh, 0x3);
  3432. /* HPG 6.1.2 Step 2, noc to low power */
  3433. __write_register(device, CVP_AON_WRAPPER_MVP_NOC_LPI_CONTROL, 0x1);
  3434. while (!reg_status && count < max_count) {
  3435. lpi_status =
  3436. __read_register(device,
  3437. CVP_AON_WRAPPER_MVP_NOC_LPI_STATUS);
  3438. reg_status = lpi_status & BIT(0);
  3439. /* Wait for noc lpi status to be set */
  3440. usleep_range(50, 100);
  3441. count++;
  3442. }
  3443. dprintk(CVP_PWR,
  3444. "Noc: lpi_status %x noc_status %x (count %d)\n",
  3445. lpi_status, reg_status, count);
  3446. if (count == max_count) {
  3447. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  3448. pc_ready = __read_register(device, CVP_CTRL_STATUS);
  3449. sbm_ln0_low =
  3450. __read_register(device, CVP_NOC_SBM_SENSELN0_LOW);
  3451. main_sbm_ln0_low = __read_register(device,
  3452. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_LOW);
  3453. main_sbm_ln1_high = __read_register(device,
  3454. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN1_HIGH);
  3455. dprintk(CVP_WARN,
  3456. "NOC not in qaccept status %x %x %x %x %x %x %x\n",
  3457. reg_status, lpi_status, wfi_status, pc_ready,
  3458. sbm_ln0_low, main_sbm_ln0_low, main_sbm_ln1_high);
  3459. }
  3460. /* HPG 6.1.2 Step 3, debug bridge to low power */
  3461. __write_register(device,
  3462. CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL, 0x7);
  3463. reg_status = 0;
  3464. count = 0;
  3465. while ((reg_status != 0x7) && count < max_count) {
  3466. lpi_status = __read_register(device,
  3467. CVP_WRAPPER_DEBUG_BRIDGE_LPI_STATUS);
  3468. reg_status = lpi_status & 0x7;
  3469. /* Wait for debug bridge lpi status to be set */
  3470. usleep_range(50, 100);
  3471. count++;
  3472. }
  3473. dprintk(CVP_PWR,
  3474. "DBLP Set : lpi_status %d reg_status %d (count %d)\n",
  3475. lpi_status, reg_status, count);
  3476. if (count == max_count) {
  3477. dprintk(CVP_WARN,
  3478. "DBLP Set: status %x %x\n", reg_status, lpi_status);
  3479. }
  3480. /* HPG 6.1.2 Step 4, debug bridge to lpi release */
  3481. __write_register(device,
  3482. CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL, 0x0);
  3483. lpi_status = 0x1;
  3484. count = 0;
  3485. while (lpi_status && count < max_count) {
  3486. lpi_status = __read_register(device,
  3487. CVP_WRAPPER_DEBUG_BRIDGE_LPI_STATUS);
  3488. usleep_range(50, 100);
  3489. count++;
  3490. }
  3491. dprintk(CVP_PWR,
  3492. "DBLP Release: lpi_status %d(count %d)\n",
  3493. lpi_status, count);
  3494. if (count == max_count) {
  3495. dprintk(CVP_WARN,
  3496. "DBLP Release: lpi_status %x\n", lpi_status);
  3497. }
  3498. /* HPG 6.1.2 Step 6 */
  3499. __disable_unprepare_clks(device);
  3500. /* HPG 6.1.2 Step 7 & 8 */
  3501. if (call_iris_op(device, reset_ahb2axi_bridge, device))
  3502. dprintk(CVP_ERR, "Failed to reset ahb2axi\n");
  3503. if (__unvote_buses(device))
  3504. dprintk(CVP_WARN, "Failed to unvote for buses\n");
  3505. /* HPG 6.1.2 Step 5 */
  3506. if (__disable_regulators(device))
  3507. dprintk(CVP_WARN, "Failed to disable regulators\n");
  3508. /*Do not access registers after this point!*/
  3509. device->power_enabled = false;
  3510. }
  3511. static inline int __resume(struct iris_hfi_device *device)
  3512. {
  3513. int rc = 0;
  3514. u32 flags = 0, reg_gdsc, reg_cbcr;
  3515. if (!device) {
  3516. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3517. return -EINVAL;
  3518. } else if (device->power_enabled) {
  3519. goto exit;
  3520. } else if (!__core_in_valid_state(device)) {
  3521. dprintk(CVP_PWR, "iris_hfi_device in deinit state.");
  3522. return -EINVAL;
  3523. }
  3524. dprintk(CVP_PWR, "Resuming from power collapse\n");
  3525. rc = __iris_power_on(device);
  3526. if (rc) {
  3527. dprintk(CVP_ERR, "Failed to power on cvp\n");
  3528. goto err_iris_power_on;
  3529. }
  3530. reg_gdsc = __read_register(device, CVP_CC_MVS1C_GDSCR);
  3531. reg_cbcr = __read_register(device, CVP_CC_MVS1C_CBCR);
  3532. if (!(reg_gdsc & 0x80000000) || (reg_cbcr & 0x80000000))
  3533. dprintk(CVP_ERR, "CVP power on failed gdsc %x cbcr %x\n",
  3534. reg_gdsc, reg_cbcr);
  3535. /* Reboot the firmware */
  3536. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESUME);
  3537. if (rc) {
  3538. dprintk(CVP_ERR, "Failed to resume cvp core %d\n", rc);
  3539. goto err_set_cvp_state;
  3540. }
  3541. __setup_ucregion_memory_map(device);
  3542. /* Wait for boot completion */
  3543. rc = __boot_firmware(device);
  3544. if (rc) {
  3545. dprintk(CVP_ERR, "Failed to reset cvp core\n");
  3546. goto err_reset_core;
  3547. }
  3548. /*
  3549. * Work around for H/W bug, need to reprogram these registers once
  3550. * firmware is out reset
  3551. */
  3552. __set_threshold_registers(device);
  3553. if (device->res->pm_qos_latency_us)
  3554. pm_qos_add_request(&device->qos, PM_QOS_CPU_DMA_LATENCY,
  3555. device->res->pm_qos_latency_us);
  3556. __sys_set_debug(device, msm_cvp_fw_debug);
  3557. __enable_subcaches(device);
  3558. __set_subcaches(device);
  3559. __dsp_resume(device, flags);
  3560. dprintk(CVP_PWR, "Resumed from power collapse\n");
  3561. exit:
  3562. /* Don't reset skip_pc_count for SYS_PC_PREP cmd */
  3563. if (device->last_packet_type != HFI_CMD_SYS_PC_PREP)
  3564. device->skip_pc_count = 0;
  3565. return rc;
  3566. err_reset_core:
  3567. __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3568. err_set_cvp_state:
  3569. call_iris_op(device, power_off, device);
  3570. err_iris_power_on:
  3571. dprintk(CVP_ERR, "Failed to resume from power collapse\n");
  3572. return rc;
  3573. }
  3574. static int __load_fw(struct iris_hfi_device *device)
  3575. {
  3576. int rc = 0;
  3577. /* Initialize resources */
  3578. rc = __init_resources(device, device->res);
  3579. if (rc) {
  3580. dprintk(CVP_ERR, "Failed to init resources: %d\n", rc);
  3581. goto fail_init_res;
  3582. }
  3583. rc = __initialize_packetization(device);
  3584. if (rc) {
  3585. dprintk(CVP_ERR, "Failed to initialize packetization\n");
  3586. goto fail_init_pkt;
  3587. }
  3588. rc = __iris_power_on(device);
  3589. if (rc) {
  3590. dprintk(CVP_ERR, "Failed to power on iris in in load_fw\n");
  3591. goto fail_iris_power_on;
  3592. }
  3593. if ((!device->res->use_non_secure_pil && !device->res->firmware_base)
  3594. || device->res->use_non_secure_pil) {
  3595. if (!device->resources.fw.cookie)
  3596. device->resources.fw.cookie =
  3597. subsystem_get_with_fwname("evass",
  3598. device->res->fw_name);
  3599. if (IS_ERR_OR_NULL(device->resources.fw.cookie)) {
  3600. dprintk(CVP_ERR, "Failed to download firmware\n");
  3601. device->resources.fw.cookie = NULL;
  3602. rc = -ENOMEM;
  3603. goto fail_load_fw;
  3604. }
  3605. }
  3606. if (!device->res->firmware_base) {
  3607. rc = __protect_cp_mem(device);
  3608. if (rc) {
  3609. dprintk(CVP_ERR, "Failed to protect memory\n");
  3610. goto fail_protect_mem;
  3611. }
  3612. }
  3613. return rc;
  3614. fail_protect_mem:
  3615. if (device->resources.fw.cookie)
  3616. subsystem_put(device->resources.fw.cookie);
  3617. device->resources.fw.cookie = NULL;
  3618. fail_load_fw:
  3619. call_iris_op(device, power_off, device);
  3620. fail_iris_power_on:
  3621. fail_init_pkt:
  3622. __deinit_resources(device);
  3623. fail_init_res:
  3624. return rc;
  3625. }
  3626. static void __unload_fw(struct iris_hfi_device *device)
  3627. {
  3628. if (!device->resources.fw.cookie)
  3629. return;
  3630. cancel_delayed_work(&iris_hfi_pm_work);
  3631. if (device->state != IRIS_STATE_DEINIT)
  3632. flush_workqueue(device->iris_pm_workq);
  3633. subsystem_put(device->resources.fw.cookie);
  3634. __interface_queues_release(device);
  3635. call_iris_op(device, power_off, device);
  3636. device->resources.fw.cookie = NULL;
  3637. __deinit_resources(device);
  3638. dprintk(CVP_WARN, "Firmware unloaded\n");
  3639. }
  3640. static int iris_hfi_get_fw_info(void *dev, struct cvp_hal_fw_info *fw_info)
  3641. {
  3642. int i = 0;
  3643. struct iris_hfi_device *device = dev;
  3644. if (!device || !fw_info) {
  3645. dprintk(CVP_ERR,
  3646. "%s Invalid parameter: device = %pK fw_info = %pK\n",
  3647. __func__, device, fw_info);
  3648. return -EINVAL;
  3649. }
  3650. mutex_lock(&device->lock);
  3651. while (cvp_driver->fw_version[i++] != 'V' && i < CVP_VERSION_LENGTH)
  3652. ;
  3653. if (i == CVP_VERSION_LENGTH - 1) {
  3654. dprintk(CVP_WARN, "Iris version string is not proper\n");
  3655. fw_info->version[0] = '\0';
  3656. goto fail_version_string;
  3657. }
  3658. memcpy(&fw_info->version[0], &cvp_driver->fw_version[0],
  3659. CVP_VERSION_LENGTH);
  3660. fw_info->version[CVP_VERSION_LENGTH - 1] = '\0';
  3661. fail_version_string:
  3662. dprintk(CVP_CORE, "F/W version retrieved : %s\n", fw_info->version);
  3663. fw_info->base_addr = device->cvp_hal_data->firmware_base;
  3664. fw_info->register_base = device->res->register_base;
  3665. fw_info->register_size = device->cvp_hal_data->register_size;
  3666. fw_info->irq = device->cvp_hal_data->irq;
  3667. mutex_unlock(&device->lock);
  3668. return 0;
  3669. }
  3670. static int iris_hfi_get_core_capabilities(void *dev)
  3671. {
  3672. dprintk(CVP_CORE, "%s not supported yet!\n", __func__);
  3673. return 0;
  3674. }
  3675. static void __noc_error_info_iris2(struct iris_hfi_device *device)
  3676. {
  3677. u32 val = 0;
  3678. val = __read_register(device, CVP_NOC_ERR_SWID_LOW_OFFS);
  3679. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_SWID_LOW: %#x\n", val);
  3680. val = __read_register(device, CVP_NOC_ERR_SWID_HIGH_OFFS);
  3681. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_SWID_HIGH: %#x\n", val);
  3682. val = __read_register(device, CVP_NOC_ERR_MAINCTL_LOW_OFFS);
  3683. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_MAINCTL_LOW: %#x\n", val);
  3684. val = __read_register(device, CVP_NOC_ERR_ERRVLD_LOW_OFFS);
  3685. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRVLD_LOW: %#x\n", val);
  3686. val = __read_register(device, CVP_NOC_ERR_ERRCLR_LOW_OFFS);
  3687. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRCLR_LOW: %#x\n", val);
  3688. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_LOW_OFFS);
  3689. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG0_LOW: %#x\n", val);
  3690. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_HIGH_OFFS);
  3691. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG0_HIGH: %#x\n", val);
  3692. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_LOW_OFFS);
  3693. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG1_LOW: %#x\n", val);
  3694. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_HIGH_OFFS);
  3695. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG1_HIGH: %#x\n", val);
  3696. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_LOW_OFFS);
  3697. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG2_LOW: %#x\n", val);
  3698. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_HIGH_OFFS);
  3699. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG2_HIGH: %#x\n", val);
  3700. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_LOW_OFFS);
  3701. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG3_LOW: %#x\n", val);
  3702. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_HIGH_OFFS);
  3703. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val);
  3704. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_LOW_OFFS);
  3705. dprintk(CVP_ERR, "CVP_NOC__CORE_ERL_MAIN_SWID_LOW: %#x\n", val);
  3706. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_HIGH_OFFS);
  3707. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_SWID_HIGH: %#x\n", val);
  3708. val = __read_register(device, CVP_NOC_CORE_ERR_MAINCTL_LOW_OFFS);
  3709. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_MAINCTL_LOW: %#x\n", val);
  3710. val = __read_register(device, CVP_NOC_CORE_ERR_ERRVLD_LOW_OFFS);
  3711. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRVLD_LOW: %#x\n", val);
  3712. val = __read_register(device, CVP_NOC_CORE_ERR_ERRCLR_LOW_OFFS);
  3713. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRCLR_LOW: %#x\n", val);
  3714. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_LOW_OFFS);
  3715. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_LOW: %#x\n", val);
  3716. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_HIGH_OFFS);
  3717. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_HIGH: %#x\n", val);
  3718. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_LOW_OFFS);
  3719. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_LOW: %#x\n", val);
  3720. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_HIGH_OFFS);
  3721. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_HIGH: %#x\n", val);
  3722. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_LOW_OFFS);
  3723. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_LOW: %#x\n", val);
  3724. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_HIGH_OFFS);
  3725. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_HIGH: %#x\n", val);
  3726. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_LOW_OFFS);
  3727. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_LOW: %#x\n", val);
  3728. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_HIGH_OFFS);
  3729. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val);
  3730. }
  3731. static int iris_hfi_noc_error_info(void *dev)
  3732. {
  3733. struct iris_hfi_device *device;
  3734. if (!dev) {
  3735. dprintk(CVP_ERR, "%s: null device\n", __func__);
  3736. return -EINVAL;
  3737. }
  3738. device = dev;
  3739. mutex_lock(&device->lock);
  3740. dprintk(CVP_ERR, "%s: non error information\n", __func__);
  3741. call_iris_op(device, noc_error_info, device);
  3742. mutex_unlock(&device->lock);
  3743. return 0;
  3744. }
  3745. static int __initialize_packetization(struct iris_hfi_device *device)
  3746. {
  3747. int rc = 0;
  3748. if (!device || !device->res) {
  3749. dprintk(CVP_ERR, "%s - invalid param\n", __func__);
  3750. return -EINVAL;
  3751. }
  3752. device->packetization_type = HFI_PACKETIZATION_4XX;
  3753. device->pkt_ops = cvp_hfi_get_pkt_ops_handle(
  3754. device->packetization_type);
  3755. if (!device->pkt_ops) {
  3756. rc = -EINVAL;
  3757. dprintk(CVP_ERR, "Failed to get pkt_ops handle\n");
  3758. }
  3759. return rc;
  3760. }
  3761. void __init_cvp_ops(struct iris_hfi_device *device)
  3762. {
  3763. device->vpu_ops = &iris2_ops;
  3764. }
  3765. static struct iris_hfi_device *__add_device(u32 device_id,
  3766. struct msm_cvp_platform_resources *res,
  3767. hfi_cmd_response_callback callback)
  3768. {
  3769. struct iris_hfi_device *hdevice = NULL;
  3770. int rc = 0;
  3771. if (!res || !callback) {
  3772. dprintk(CVP_ERR, "Invalid Parameters\n");
  3773. return NULL;
  3774. }
  3775. dprintk(CVP_INFO, "%s: device_id: %d\n", __func__, device_id);
  3776. hdevice = kzalloc(sizeof(*hdevice), GFP_KERNEL);
  3777. if (!hdevice) {
  3778. dprintk(CVP_ERR, "failed to allocate new device\n");
  3779. goto exit;
  3780. }
  3781. hdevice->response_pkt = kmalloc_array(cvp_max_packets,
  3782. sizeof(*hdevice->response_pkt), GFP_KERNEL);
  3783. if (!hdevice->response_pkt) {
  3784. dprintk(CVP_ERR, "failed to allocate response_pkt\n");
  3785. goto err_cleanup;
  3786. }
  3787. hdevice->raw_packet =
  3788. kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  3789. if (!hdevice->raw_packet) {
  3790. dprintk(CVP_ERR, "failed to allocate raw packet\n");
  3791. goto err_cleanup;
  3792. }
  3793. rc = __init_regs_and_interrupts(hdevice, res);
  3794. if (rc)
  3795. goto err_cleanup;
  3796. hdevice->res = res;
  3797. hdevice->device_id = device_id;
  3798. hdevice->callback = callback;
  3799. __init_cvp_ops(hdevice);
  3800. hdevice->cvp_workq = create_singlethread_workqueue(
  3801. "msm_cvp_workerq_iris");
  3802. if (!hdevice->cvp_workq) {
  3803. dprintk(CVP_ERR, ": create cvp workq failed\n");
  3804. goto err_cleanup;
  3805. }
  3806. hdevice->iris_pm_workq = create_singlethread_workqueue(
  3807. "pm_workerq_iris");
  3808. if (!hdevice->iris_pm_workq) {
  3809. dprintk(CVP_ERR, ": create pm workq failed\n");
  3810. goto err_cleanup;
  3811. }
  3812. mutex_init(&hdevice->lock);
  3813. INIT_LIST_HEAD(&hdevice->sess_head);
  3814. return hdevice;
  3815. err_cleanup:
  3816. if (hdevice->iris_pm_workq)
  3817. destroy_workqueue(hdevice->iris_pm_workq);
  3818. if (hdevice->cvp_workq)
  3819. destroy_workqueue(hdevice->cvp_workq);
  3820. kfree(hdevice->response_pkt);
  3821. kfree(hdevice->raw_packet);
  3822. kfree(hdevice);
  3823. exit:
  3824. return NULL;
  3825. }
  3826. static struct iris_hfi_device *__get_device(u32 device_id,
  3827. struct msm_cvp_platform_resources *res,
  3828. hfi_cmd_response_callback callback)
  3829. {
  3830. if (!res || !callback) {
  3831. dprintk(CVP_ERR, "Invalid params: %pK %pK\n", res, callback);
  3832. return NULL;
  3833. }
  3834. return __add_device(device_id, res, callback);
  3835. }
  3836. void cvp_iris_hfi_delete_device(void *device)
  3837. {
  3838. struct msm_cvp_core *core;
  3839. struct iris_hfi_device *dev = NULL;
  3840. if (!device)
  3841. return;
  3842. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  3843. if (core)
  3844. dev = core->device->hfi_device_data;
  3845. if (!dev)
  3846. return;
  3847. mutex_destroy(&dev->lock);
  3848. destroy_workqueue(dev->cvp_workq);
  3849. destroy_workqueue(dev->iris_pm_workq);
  3850. free_irq(dev->cvp_hal_data->irq, dev);
  3851. iounmap(dev->cvp_hal_data->register_base);
  3852. iounmap(dev->cvp_hal_data->gcc_reg_base);
  3853. kfree(dev->cvp_hal_data);
  3854. kfree(dev->response_pkt);
  3855. kfree(dev->raw_packet);
  3856. kfree(dev);
  3857. }
  3858. static int iris_hfi_validate_session(void *sess, const char *func)
  3859. {
  3860. struct cvp_hal_session *session = sess;
  3861. int rc = 0;
  3862. struct iris_hfi_device *device;
  3863. if (!session || !session->device) {
  3864. dprintk(CVP_ERR, " %s Invalid Params %pK\n", __func__, session);
  3865. return -EINVAL;
  3866. }
  3867. device = session->device;
  3868. mutex_lock(&device->lock);
  3869. if (!__is_session_valid(device, session, func))
  3870. rc = -ECONNRESET;
  3871. mutex_unlock(&device->lock);
  3872. return rc;
  3873. }
  3874. static void iris_init_hfi_callbacks(struct cvp_hfi_device *hdev)
  3875. {
  3876. hdev->core_init = iris_hfi_core_init;
  3877. hdev->core_release = iris_hfi_core_release;
  3878. hdev->core_trigger_ssr = iris_hfi_core_trigger_ssr;
  3879. hdev->session_init = iris_hfi_session_init;
  3880. hdev->session_end = iris_hfi_session_end;
  3881. hdev->session_abort = iris_hfi_session_abort;
  3882. hdev->session_clean = iris_hfi_session_clean;
  3883. hdev->session_set_buffers = iris_hfi_session_set_buffers;
  3884. hdev->session_release_buffers = iris_hfi_session_release_buffers;
  3885. hdev->session_send = iris_hfi_session_send;
  3886. hdev->session_flush = iris_hfi_session_flush;
  3887. hdev->scale_clocks = iris_hfi_scale_clocks;
  3888. hdev->vote_bus = iris_hfi_vote_buses;
  3889. hdev->get_fw_info = iris_hfi_get_fw_info;
  3890. hdev->get_core_capabilities = iris_hfi_get_core_capabilities;
  3891. hdev->suspend = iris_hfi_suspend;
  3892. hdev->resume = iris_hfi_resume;
  3893. hdev->flush_debug_queue = iris_hfi_flush_debug_queue;
  3894. hdev->noc_error_info = iris_hfi_noc_error_info;
  3895. hdev->validate_session = iris_hfi_validate_session;
  3896. }
  3897. int cvp_iris_hfi_initialize(struct cvp_hfi_device *hdev, u32 device_id,
  3898. struct msm_cvp_platform_resources *res,
  3899. hfi_cmd_response_callback callback)
  3900. {
  3901. int rc = 0;
  3902. if (!hdev || !res || !callback) {
  3903. dprintk(CVP_ERR, "Invalid params: %pK %pK %pK\n",
  3904. hdev, res, callback);
  3905. rc = -EINVAL;
  3906. goto err_iris_hfi_init;
  3907. }
  3908. hdev->hfi_device_data = __get_device(device_id, res, callback);
  3909. if (IS_ERR_OR_NULL(hdev->hfi_device_data)) {
  3910. rc = PTR_ERR(hdev->hfi_device_data) ?: -EINVAL;
  3911. goto err_iris_hfi_init;
  3912. }
  3913. iris_init_hfi_callbacks(hdev);
  3914. err_iris_hfi_init:
  3915. return rc;
  3916. }