386e77f95ff27119e169f97faebdf90cfaa208a0

Currently, when there is an idle power collapse HW resets the internal read pointer value to 0. This causes the trigger window to be out of sync when power is restored until the next vsync is received. This change reads the panel read pointer and overrrides the internal register to allow a frame to be picked up in the current vsync cycle, but defers it to next vsync if it comes later than the safe trigger window. Change-Id: I741a91edcddc105eda34d875e8e1c32933b83d71 Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
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