wcd9xxx-utils.c 30 KB

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  1. /* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/of_gpio.h>
  15. #include <linux/of_irq.h>
  16. #include <linux/of_device.h>
  17. #include <linux/slab.h>
  18. #include <linux/regmap.h>
  19. #include <linux/delay.h>
  20. #include <linux/sched.h>
  21. #include <linux/mfd/core.h>
  22. #include "core.h"
  23. #include "msm-cdc-supply.h"
  24. #include "msm-cdc-pinctrl.h"
  25. #include "pdata.h"
  26. #include "wcd9xxx-irq.h"
  27. #include "wcd9xxx-utils.h"
  28. #define REG_BYTES 2
  29. #define VAL_BYTES 1
  30. /*
  31. * Page Register Address that APP Proc uses to
  32. * access WCD9335 Codec registers is identified
  33. * as 0x00
  34. */
  35. #define PAGE_REG_ADDR 0x00
  36. static enum wcd9xxx_intf_status wcd9xxx_intf = -1;
  37. static struct mfd_cell tavil_devs[] = {
  38. {
  39. .name = "qcom-wcd-pinctrl",
  40. .of_compatible = "qcom,wcd-pinctrl",
  41. },
  42. {
  43. .name = "tavil_codec",
  44. },
  45. };
  46. static struct mfd_cell tasha_devs[] = {
  47. {
  48. .name = "tasha_codec",
  49. },
  50. };
  51. static struct mfd_cell tomtom_devs[] = {
  52. {
  53. .name = "tomtom_codec",
  54. },
  55. };
  56. static int wcd9xxx_read_of_property_u32(struct device *dev, const char *name,
  57. u32 *val)
  58. {
  59. int rc = 0;
  60. rc = of_property_read_u32(dev->of_node, name, val);
  61. if (rc)
  62. dev_err(dev, "%s: Looking up %s property in node %s failed",
  63. __func__, name, dev->of_node->full_name);
  64. return rc;
  65. }
  66. static void wcd9xxx_dt_parse_micbias_info(struct device *dev,
  67. struct wcd9xxx_micbias_setting *mb)
  68. {
  69. u32 prop_val;
  70. int rc;
  71. if (of_find_property(dev->of_node, "qcom,cdc-micbias-ldoh-v", NULL)) {
  72. rc = wcd9xxx_read_of_property_u32(dev,
  73. "qcom,cdc-micbias-ldoh-v",
  74. &prop_val);
  75. if (!rc)
  76. mb->ldoh_v = (u8)prop_val;
  77. }
  78. /* MB1 */
  79. if (of_find_property(dev->of_node, "qcom,cdc-micbias-cfilt1-mv",
  80. NULL)) {
  81. rc = wcd9xxx_read_of_property_u32(dev,
  82. "qcom,cdc-micbias-cfilt1-mv",
  83. &prop_val);
  84. if (!rc)
  85. mb->cfilt1_mv = prop_val;
  86. rc = wcd9xxx_read_of_property_u32(dev,
  87. "qcom,cdc-micbias1-cfilt-sel",
  88. &prop_val);
  89. if (!rc)
  90. mb->bias1_cfilt_sel = (u8)prop_val;
  91. } else if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  92. NULL)) {
  93. rc = wcd9xxx_read_of_property_u32(dev,
  94. "qcom,cdc-micbias1-mv",
  95. &prop_val);
  96. if (!rc)
  97. mb->micb1_mv = prop_val;
  98. } else {
  99. dev_info(dev, "%s: Micbias1 DT property not found\n",
  100. __func__);
  101. }
  102. /* MB2 */
  103. if (of_find_property(dev->of_node, "qcom,cdc-micbias-cfilt2-mv",
  104. NULL)) {
  105. rc = wcd9xxx_read_of_property_u32(dev,
  106. "qcom,cdc-micbias-cfilt2-mv",
  107. &prop_val);
  108. if (!rc)
  109. mb->cfilt2_mv = prop_val;
  110. rc = wcd9xxx_read_of_property_u32(dev,
  111. "qcom,cdc-micbias2-cfilt-sel",
  112. &prop_val);
  113. if (!rc)
  114. mb->bias2_cfilt_sel = (u8)prop_val;
  115. } else if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  116. NULL)) {
  117. rc = wcd9xxx_read_of_property_u32(dev,
  118. "qcom,cdc-micbias2-mv",
  119. &prop_val);
  120. if (!rc)
  121. mb->micb2_mv = prop_val;
  122. } else {
  123. dev_info(dev, "%s: Micbias2 DT property not found\n",
  124. __func__);
  125. }
  126. /* MB3 */
  127. if (of_find_property(dev->of_node, "qcom,cdc-micbias-cfilt3-mv",
  128. NULL)) {
  129. rc = wcd9xxx_read_of_property_u32(dev,
  130. "qcom,cdc-micbias-cfilt3-mv",
  131. &prop_val);
  132. if (!rc)
  133. mb->cfilt3_mv = prop_val;
  134. rc = wcd9xxx_read_of_property_u32(dev,
  135. "qcom,cdc-micbias3-cfilt-sel",
  136. &prop_val);
  137. if (!rc)
  138. mb->bias3_cfilt_sel = (u8)prop_val;
  139. } else if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  140. NULL)) {
  141. rc = wcd9xxx_read_of_property_u32(dev,
  142. "qcom,cdc-micbias3-mv",
  143. &prop_val);
  144. if (!rc)
  145. mb->micb3_mv = prop_val;
  146. } else {
  147. dev_info(dev, "%s: Micbias3 DT property not found\n",
  148. __func__);
  149. }
  150. /* MB4 */
  151. if (of_find_property(dev->of_node, "qcom,cdc-micbias4-cfilt-sel",
  152. NULL)) {
  153. rc = wcd9xxx_read_of_property_u32(dev,
  154. "qcom,cdc-micbias4-cfilt-sel",
  155. &prop_val);
  156. if (!rc)
  157. mb->bias4_cfilt_sel = (u8)prop_val;
  158. } else if (of_find_property(dev->of_node, "qcom,cdc-micbias4-mv",
  159. NULL)) {
  160. rc = wcd9xxx_read_of_property_u32(dev,
  161. "qcom,cdc-micbias4-mv",
  162. &prop_val);
  163. if (!rc)
  164. mb->micb4_mv = prop_val;
  165. } else {
  166. dev_info(dev, "%s: Micbias4 DT property not found\n",
  167. __func__);
  168. }
  169. mb->bias1_cap_mode =
  170. (of_property_read_bool(dev->of_node, "qcom,cdc-micbias1-ext-cap") ?
  171. MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
  172. mb->bias2_cap_mode =
  173. (of_property_read_bool(dev->of_node, "qcom,cdc-micbias2-ext-cap") ?
  174. MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
  175. mb->bias3_cap_mode =
  176. (of_property_read_bool(dev->of_node, "qcom,cdc-micbias3-ext-cap") ?
  177. MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
  178. mb->bias4_cap_mode =
  179. (of_property_read_bool(dev->of_node, "qcom,cdc-micbias4-ext-cap") ?
  180. MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
  181. mb->bias2_is_headset_only =
  182. of_property_read_bool(dev->of_node,
  183. "qcom,cdc-micbias2-headset-only");
  184. /* Print micbias info */
  185. dev_dbg(dev, "%s: ldoh_v %u cfilt1_mv %u cfilt2_mv %u cfilt3_mv %u",
  186. __func__, (u32)mb->ldoh_v, (u32)mb->cfilt1_mv,
  187. (u32)mb->cfilt2_mv, (u32)mb->cfilt3_mv);
  188. dev_dbg(dev, "%s: micb1_mv %u micb2_mv %u micb3_mv %u micb4_mv %u",
  189. __func__, mb->micb1_mv, mb->micb2_mv,
  190. mb->micb3_mv, mb->micb4_mv);
  191. dev_dbg(dev, "%s: bias1_cfilt_sel %u bias2_cfilt_sel %u\n",
  192. __func__, (u32)mb->bias1_cfilt_sel, (u32)mb->bias2_cfilt_sel);
  193. dev_dbg(dev, "%s: bias3_cfilt_sel %u bias4_cfilt_sel %u\n",
  194. __func__, (u32)mb->bias3_cfilt_sel, (u32)mb->bias4_cfilt_sel);
  195. dev_dbg(dev, "%s: bias1_ext_cap %d bias2_ext_cap %d\n",
  196. __func__, mb->bias1_cap_mode, mb->bias2_cap_mode);
  197. dev_dbg(dev, "%s: bias3_ext_cap %d bias4_ext_cap %d\n",
  198. __func__, mb->bias3_cap_mode, mb->bias4_cap_mode);
  199. dev_dbg(dev, "%s: bias2_is_headset_only %d\n",
  200. __func__, mb->bias2_is_headset_only);
  201. }
  202. /*
  203. * wcd9xxx_validate_dmic_sample_rate:
  204. * Given the dmic_sample_rate and mclk rate, validate the
  205. * dmic_sample_rate. If dmic rate is found to be invalid,
  206. * assign the dmic rate as undefined, so individual codec
  207. * drivers can use their own defaults
  208. * @dev: the device for which the dmic is to be configured
  209. * @dmic_sample_rate: The input dmic_sample_rate
  210. * @mclk_rate: The input codec mclk rate
  211. * @dmic_rate_type: String to indicate the type of dmic sample
  212. * rate, used for debug/error logging.
  213. */
  214. static u32 wcd9xxx_validate_dmic_sample_rate(struct device *dev,
  215. u32 dmic_sample_rate, u32 mclk_rate,
  216. const char *dmic_rate_type)
  217. {
  218. u32 div_factor;
  219. if (dmic_sample_rate == WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED ||
  220. mclk_rate % dmic_sample_rate != 0)
  221. goto undefined_rate;
  222. div_factor = mclk_rate / dmic_sample_rate;
  223. switch (div_factor) {
  224. case 2:
  225. case 3:
  226. case 4:
  227. case 8:
  228. case 16:
  229. /* Valid dmic DIV factors */
  230. dev_dbg(dev, "%s: DMIC_DIV = %u, mclk_rate = %u\n",
  231. __func__, div_factor, mclk_rate);
  232. break;
  233. case 6:
  234. /*
  235. * DIV 6 is valid for both 9.6MHz and 12.288MHz
  236. * MCLK on Tavil. Older codecs support DIV6 only
  237. * for 12.288MHz MCLK.
  238. */
  239. if ((mclk_rate == WCD9XXX_MCLK_CLK_9P6HZ) &&
  240. (of_device_is_compatible(dev->of_node,
  241. "qcom,tavil-slim-pgd")))
  242. dev_dbg(dev, "%s: DMIC_DIV = %u, mclk_rate = %u\n",
  243. __func__, div_factor, mclk_rate);
  244. else if (mclk_rate != WCD9XXX_MCLK_CLK_12P288MHZ)
  245. goto undefined_rate;
  246. break;
  247. default:
  248. /* Any other DIV factor is invalid */
  249. goto undefined_rate;
  250. }
  251. return dmic_sample_rate;
  252. undefined_rate:
  253. dev_dbg(dev, "%s: Invalid %s = %d, for mclk %d\n",
  254. __func__, dmic_rate_type, dmic_sample_rate, mclk_rate);
  255. dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
  256. return dmic_sample_rate;
  257. }
  258. /*
  259. * wcd9xxx_populate_dt_data:
  260. * Parse device tree properties for the given codec device
  261. *
  262. * @dev: pointer to codec device
  263. *
  264. * Returns pointer to the platform data resulting from parsing
  265. * device tree.
  266. */
  267. struct wcd9xxx_pdata *wcd9xxx_populate_dt_data(struct device *dev)
  268. {
  269. struct wcd9xxx_pdata *pdata;
  270. u32 dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
  271. u32 mad_dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
  272. u32 ecpp_dmic_sample_rate = WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED;
  273. u32 dmic_clk_drive = WCD9XXX_DMIC_CLK_DRIVE_UNDEFINED;
  274. u32 prop_val;
  275. int rc = 0;
  276. if (!dev || !dev->of_node)
  277. return NULL;
  278. pdata = devm_kzalloc(dev, sizeof(struct wcd9xxx_pdata),
  279. GFP_KERNEL);
  280. if (!pdata)
  281. return NULL;
  282. /* Parse power supplies */
  283. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  284. &pdata->num_supplies);
  285. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  286. dev_err(dev, "%s: no power supplies defined for codec\n",
  287. __func__);
  288. goto err_power_sup;
  289. }
  290. /* Parse micbias info */
  291. wcd9xxx_dt_parse_micbias_info(dev, &pdata->micbias);
  292. pdata->wcd_rst_np = of_parse_phandle(dev->of_node,
  293. "qcom,wcd-rst-gpio-node", 0);
  294. if (!pdata->wcd_rst_np) {
  295. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  296. __func__, "qcom,wcd-rst-gpio-node",
  297. dev->of_node->full_name);
  298. goto err_parse_dt_prop;
  299. }
  300. pdata->has_buck_vsel_gpio = of_property_read_bool(dev->of_node,
  301. "qcom,has-buck-vsel-gpio");
  302. if (pdata->has_buck_vsel_gpio) {
  303. pdata->buck_vsel_ctl_np = of_parse_phandle(dev->of_node,
  304. "qcom,buck-vsel-gpio-node", 0);
  305. if (!pdata->buck_vsel_ctl_np) {
  306. dev_err(dev, "%s No entry for %s property in node %s\n",
  307. __func__, "qcom,buck-vsel-gpio-node",
  308. dev->of_node->full_name);
  309. goto err_parse_dt_prop;
  310. }
  311. }
  312. if (!(wcd9xxx_read_of_property_u32(dev, "qcom,cdc-mclk-clk-rate",
  313. &prop_val)))
  314. pdata->mclk_rate = prop_val;
  315. if (pdata->mclk_rate != WCD9XXX_MCLK_CLK_9P6HZ &&
  316. pdata->mclk_rate != WCD9XXX_MCLK_CLK_12P288MHZ) {
  317. dev_err(dev, "%s: Invalid mclk_rate = %u\n", __func__,
  318. pdata->mclk_rate);
  319. goto err_parse_dt_prop;
  320. }
  321. if (!(wcd9xxx_read_of_property_u32(dev, "qcom,cdc-dmic-sample-rate",
  322. &prop_val)))
  323. dmic_sample_rate = prop_val;
  324. pdata->dmic_sample_rate = wcd9xxx_validate_dmic_sample_rate(dev,
  325. dmic_sample_rate,
  326. pdata->mclk_rate,
  327. "audio_dmic_rate");
  328. if (!(wcd9xxx_read_of_property_u32(dev, "qcom,cdc-mad-dmic-rate",
  329. &prop_val)))
  330. mad_dmic_sample_rate = prop_val;
  331. pdata->mad_dmic_sample_rate = wcd9xxx_validate_dmic_sample_rate(dev,
  332. mad_dmic_sample_rate,
  333. pdata->mclk_rate,
  334. "mad_dmic_rate");
  335. if (of_find_property(dev->of_node, "qcom,cdc-ecpp-dmic-rate", NULL)) {
  336. rc = wcd9xxx_read_of_property_u32(dev,
  337. "qcom,cdc-ecpp-dmic-rate",
  338. &prop_val);
  339. if (!rc)
  340. ecpp_dmic_sample_rate = prop_val;
  341. }
  342. pdata->ecpp_dmic_sample_rate = wcd9xxx_validate_dmic_sample_rate(dev,
  343. ecpp_dmic_sample_rate,
  344. pdata->mclk_rate,
  345. "ecpp_dmic_rate");
  346. if (!(of_property_read_u32(dev->of_node,
  347. "qcom,cdc-dmic-clk-drv-strength",
  348. &prop_val))) {
  349. dmic_clk_drive = prop_val;
  350. if (dmic_clk_drive != 2 && dmic_clk_drive != 4 &&
  351. dmic_clk_drive != 8 && dmic_clk_drive != 16)
  352. dev_err(dev, "Invalid cdc-dmic-clk-drv-strength %d\n",
  353. dmic_clk_drive);
  354. }
  355. pdata->dmic_clk_drv = dmic_clk_drive;
  356. return pdata;
  357. err_parse_dt_prop:
  358. devm_kfree(dev, pdata->regulator);
  359. pdata->regulator = NULL;
  360. pdata->num_supplies = 0;
  361. err_power_sup:
  362. devm_kfree(dev, pdata);
  363. return NULL;
  364. }
  365. EXPORT_SYMBOL(wcd9xxx_populate_dt_data);
  366. static bool is_wcd9xxx_reg_power_down(struct wcd9xxx *wcd9xxx, u16 rreg)
  367. {
  368. bool ret = false;
  369. int i;
  370. struct wcd9xxx_power_region *wcd9xxx_pwr;
  371. if (!wcd9xxx)
  372. return ret;
  373. for (i = 0; i < WCD9XXX_MAX_PWR_REGIONS; i++) {
  374. wcd9xxx_pwr = wcd9xxx->wcd9xxx_pwr[i];
  375. if (!wcd9xxx_pwr)
  376. continue;
  377. if (((wcd9xxx_pwr->pwr_collapse_reg_min == 0) &&
  378. (wcd9xxx_pwr->pwr_collapse_reg_max == 0)) ||
  379. (wcd9xxx_pwr->power_state ==
  380. WCD_REGION_POWER_COLLAPSE_REMOVE))
  381. ret = false;
  382. else if (((wcd9xxx_pwr->power_state ==
  383. WCD_REGION_POWER_DOWN) ||
  384. (wcd9xxx_pwr->power_state ==
  385. WCD_REGION_POWER_COLLAPSE_BEGIN)) &&
  386. (rreg >= wcd9xxx_pwr->pwr_collapse_reg_min) &&
  387. (rreg <= wcd9xxx_pwr->pwr_collapse_reg_max))
  388. ret = true;
  389. }
  390. return ret;
  391. }
  392. /*
  393. * wcd9xxx_page_write:
  394. * Retrieve page number from register and
  395. * write that page number to the page address.
  396. * Called under io_lock acquisition.
  397. *
  398. * @wcd9xxx: pointer to wcd9xxx
  399. * @reg: Register address from which page number is retrieved
  400. *
  401. * Returns 0 for success and negative error code for failure.
  402. */
  403. int wcd9xxx_page_write(struct wcd9xxx *wcd9xxx, unsigned short *reg)
  404. {
  405. int ret = 0;
  406. unsigned short c_reg, reg_addr;
  407. u8 pg_num, prev_pg_num;
  408. if (wcd9xxx->type != WCD9335 && wcd9xxx->type != WCD934X)
  409. return ret;
  410. c_reg = *reg;
  411. pg_num = c_reg >> 8;
  412. reg_addr = c_reg & 0xff;
  413. if (wcd9xxx->prev_pg_valid) {
  414. prev_pg_num = wcd9xxx->prev_pg;
  415. if (prev_pg_num != pg_num) {
  416. ret = wcd9xxx->write_dev(
  417. wcd9xxx, PAGE_REG_ADDR, 1,
  418. (void *) &pg_num, false);
  419. if (ret < 0)
  420. pr_err("page write error, pg_num: 0x%x\n",
  421. pg_num);
  422. else {
  423. wcd9xxx->prev_pg = pg_num;
  424. dev_dbg(wcd9xxx->dev, "%s: Page 0x%x Write to 0x00\n",
  425. __func__, pg_num);
  426. }
  427. }
  428. } else {
  429. ret = wcd9xxx->write_dev(
  430. wcd9xxx, PAGE_REG_ADDR, 1, (void *) &pg_num,
  431. false);
  432. if (ret < 0)
  433. pr_err("page write error, pg_num: 0x%x\n", pg_num);
  434. else {
  435. wcd9xxx->prev_pg = pg_num;
  436. wcd9xxx->prev_pg_valid = true;
  437. dev_dbg(wcd9xxx->dev, "%s: Page 0x%x Write to 0x00\n",
  438. __func__, pg_num);
  439. }
  440. }
  441. *reg = reg_addr;
  442. return ret;
  443. }
  444. EXPORT_SYMBOL(wcd9xxx_page_write);
  445. static int regmap_bus_read(void *context, const void *reg, size_t reg_size,
  446. void *val, size_t val_size)
  447. {
  448. struct device *dev = context;
  449. struct wcd9xxx *wcd9xxx = dev_get_drvdata(dev);
  450. unsigned short c_reg, rreg;
  451. int ret, i;
  452. if (!wcd9xxx) {
  453. dev_err(dev, "%s: wcd9xxx is NULL\n", __func__);
  454. return -EINVAL;
  455. }
  456. if (!reg || !val) {
  457. dev_err(dev, "%s: reg or val is NULL\n", __func__);
  458. return -EINVAL;
  459. }
  460. if (reg_size != REG_BYTES) {
  461. dev_err(dev, "%s: register size %zd bytes, not supported\n",
  462. __func__, reg_size);
  463. return -EINVAL;
  464. }
  465. mutex_lock(&wcd9xxx->io_lock);
  466. c_reg = *(u16 *)reg;
  467. rreg = c_reg;
  468. if (is_wcd9xxx_reg_power_down(wcd9xxx, rreg)) {
  469. ret = 0;
  470. for (i = 0; i < val_size; i++)
  471. ((u8 *)val)[i] = 0;
  472. goto err;
  473. }
  474. ret = wcd9xxx_page_write(wcd9xxx, &c_reg);
  475. if (ret)
  476. goto err;
  477. ret = wcd9xxx->read_dev(wcd9xxx, c_reg, val_size, val, false);
  478. if (ret < 0)
  479. dev_err(dev, "%s: Codec read failed (%d), reg: 0x%x, size:%zd\n",
  480. __func__, ret, rreg, val_size);
  481. else {
  482. for (i = 0; i < val_size; i++)
  483. dev_dbg(dev, "%s: Read 0x%02x from 0x%x\n",
  484. __func__, ((u8 *)val)[i], rreg + i);
  485. }
  486. err:
  487. mutex_unlock(&wcd9xxx->io_lock);
  488. return ret;
  489. }
  490. static int regmap_bus_gather_write(void *context,
  491. const void *reg, size_t reg_size,
  492. const void *val, size_t val_size)
  493. {
  494. struct device *dev = context;
  495. struct wcd9xxx *wcd9xxx = dev_get_drvdata(dev);
  496. unsigned short c_reg, rreg;
  497. int ret, i;
  498. if (!wcd9xxx) {
  499. dev_err(dev, "%s: wcd9xxx is NULL\n", __func__);
  500. return -EINVAL;
  501. }
  502. if (!reg || !val) {
  503. dev_err(dev, "%s: reg or val is NULL\n", __func__);
  504. return -EINVAL;
  505. }
  506. if (reg_size != REG_BYTES) {
  507. dev_err(dev, "%s: register size %zd bytes, not supported\n",
  508. __func__, reg_size);
  509. return -EINVAL;
  510. }
  511. mutex_lock(&wcd9xxx->io_lock);
  512. c_reg = *(u16 *)reg;
  513. rreg = c_reg;
  514. if (is_wcd9xxx_reg_power_down(wcd9xxx, rreg)) {
  515. ret = 0;
  516. goto err;
  517. }
  518. ret = wcd9xxx_page_write(wcd9xxx, &c_reg);
  519. if (ret)
  520. goto err;
  521. for (i = 0; i < val_size; i++)
  522. dev_dbg(dev, "Write %02x to 0x%x\n", ((u8 *)val)[i],
  523. rreg + i);
  524. ret = wcd9xxx->write_dev(wcd9xxx, c_reg, val_size, (void *) val,
  525. false);
  526. if (ret < 0)
  527. dev_err(dev, "%s: Codec write failed (%d), reg:0x%x, size:%zd\n",
  528. __func__, ret, rreg, val_size);
  529. err:
  530. mutex_unlock(&wcd9xxx->io_lock);
  531. return ret;
  532. }
  533. static int regmap_bus_write(void *context, const void *data, size_t count)
  534. {
  535. struct device *dev = context;
  536. struct wcd9xxx *wcd9xxx = dev_get_drvdata(dev);
  537. if (!wcd9xxx)
  538. return -EINVAL;
  539. WARN_ON(count < REG_BYTES);
  540. if (count > (REG_BYTES + VAL_BYTES)) {
  541. if (wcd9xxx->multi_reg_write)
  542. return wcd9xxx->multi_reg_write(wcd9xxx,
  543. data, count);
  544. } else
  545. return regmap_bus_gather_write(context, data, REG_BYTES,
  546. data + REG_BYTES,
  547. count - REG_BYTES);
  548. dev_err(dev, "%s: bus multi reg write failure\n", __func__);
  549. return -EINVAL;
  550. }
  551. static struct regmap_bus regmap_bus_config = {
  552. .write = regmap_bus_write,
  553. .gather_write = regmap_bus_gather_write,
  554. .read = regmap_bus_read,
  555. .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
  556. .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
  557. };
  558. /*
  559. * wcd9xxx_regmap_init:
  560. * Initialize wcd9xxx register map
  561. *
  562. * @dev: pointer to wcd device
  563. * @config: pointer to register map config
  564. *
  565. * Returns pointer to regmap structure for success
  566. * or NULL in case of failure.
  567. */
  568. struct regmap *wcd9xxx_regmap_init(struct device *dev,
  569. const struct regmap_config *config)
  570. {
  571. return devm_regmap_init(dev, &regmap_bus_config, dev, config);
  572. }
  573. EXPORT_SYMBOL(wcd9xxx_regmap_init);
  574. /*
  575. * wcd9xxx_reset:
  576. * Reset wcd9xxx codec
  577. *
  578. * @dev: pointer to wcd device
  579. *
  580. * Returns 0 for success or negative error code in case of failure
  581. */
  582. int wcd9xxx_reset(struct device *dev)
  583. {
  584. struct wcd9xxx *wcd9xxx;
  585. int rc;
  586. int value;
  587. if (!dev)
  588. return -ENODEV;
  589. wcd9xxx = dev_get_drvdata(dev);
  590. if (!wcd9xxx)
  591. return -EINVAL;
  592. if (!wcd9xxx->wcd_rst_np) {
  593. dev_err(dev, "%s: reset gpio device node not specified\n",
  594. __func__);
  595. return -EINVAL;
  596. }
  597. value = msm_cdc_pinctrl_get_state(wcd9xxx->wcd_rst_np);
  598. if (value > 0) {
  599. wcd9xxx->avoid_cdc_rstlow = 1;
  600. return 0;
  601. }
  602. rc = msm_cdc_pinctrl_select_sleep_state(wcd9xxx->wcd_rst_np);
  603. if (rc) {
  604. dev_err(dev, "%s: wcd sleep state request fail!\n",
  605. __func__);
  606. return rc;
  607. }
  608. /* 20ms sleep required after pulling the reset gpio to LOW */
  609. msleep(20);
  610. rc = msm_cdc_pinctrl_select_active_state(wcd9xxx->wcd_rst_np);
  611. if (rc) {
  612. dev_err(dev, "%s: wcd active state request fail!\n",
  613. __func__);
  614. return rc;
  615. }
  616. msleep(20);
  617. return rc;
  618. }
  619. EXPORT_SYMBOL(wcd9xxx_reset);
  620. /*
  621. * wcd9xxx_reset_low:
  622. * Pull the wcd9xxx codec reset_n to low
  623. *
  624. * @dev: pointer to wcd device
  625. *
  626. * Returns 0 for success or negative error code in case of failure
  627. */
  628. int wcd9xxx_reset_low(struct device *dev)
  629. {
  630. struct wcd9xxx *wcd9xxx;
  631. int rc;
  632. if (!dev)
  633. return -ENODEV;
  634. wcd9xxx = dev_get_drvdata(dev);
  635. if (!wcd9xxx)
  636. return -EINVAL;
  637. if (!wcd9xxx->wcd_rst_np) {
  638. dev_err(dev, "%s: reset gpio device node not specified\n",
  639. __func__);
  640. return -EINVAL;
  641. }
  642. if (wcd9xxx->avoid_cdc_rstlow) {
  643. wcd9xxx->avoid_cdc_rstlow = 0;
  644. dev_dbg(dev, "%s: avoid pull down of reset GPIO\n", __func__);
  645. return 0;
  646. }
  647. rc = msm_cdc_pinctrl_select_sleep_state(wcd9xxx->wcd_rst_np);
  648. if (rc)
  649. dev_err(dev, "%s: wcd sleep state request fail!\n",
  650. __func__);
  651. return rc;
  652. }
  653. EXPORT_SYMBOL(wcd9xxx_reset_low);
  654. /*
  655. * wcd9xxx_bringup:
  656. * Toggle reset analog and digital cores of wcd9xxx codec
  657. *
  658. * @dev: pointer to wcd device
  659. *
  660. * Returns 0 for success or negative error code in case of failure
  661. */
  662. int wcd9xxx_bringup(struct device *dev)
  663. {
  664. struct wcd9xxx *wcd9xxx;
  665. int rc;
  666. codec_bringup_fn cdc_bup_fn;
  667. if (!dev)
  668. return -ENODEV;
  669. wcd9xxx = dev_get_drvdata(dev);
  670. if (!wcd9xxx)
  671. return -EINVAL;
  672. cdc_bup_fn = wcd9xxx_bringup_fn(wcd9xxx->type);
  673. if (!cdc_bup_fn) {
  674. dev_err(dev, "%s: Codec bringup fn NULL!\n",
  675. __func__);
  676. return -EINVAL;
  677. }
  678. rc = cdc_bup_fn(wcd9xxx);
  679. if (rc)
  680. dev_err(dev, "%s: Codec bringup error, rc: %d\n",
  681. __func__, rc);
  682. return rc;
  683. }
  684. EXPORT_SYMBOL(wcd9xxx_bringup);
  685. /*
  686. * wcd9xxx_bringup:
  687. * Set analog and digital cores of wcd9xxx codec in reset state
  688. *
  689. * @dev: pointer to wcd device
  690. *
  691. * Returns 0 for success or negative error code in case of failure
  692. */
  693. int wcd9xxx_bringdown(struct device *dev)
  694. {
  695. struct wcd9xxx *wcd9xxx;
  696. int rc;
  697. codec_bringdown_fn cdc_bdown_fn;
  698. if (!dev)
  699. return -ENODEV;
  700. wcd9xxx = dev_get_drvdata(dev);
  701. if (!wcd9xxx)
  702. return -EINVAL;
  703. cdc_bdown_fn = wcd9xxx_bringdown_fn(wcd9xxx->type);
  704. if (!cdc_bdown_fn) {
  705. dev_err(dev, "%s: Codec bring down fn NULL!\n",
  706. __func__);
  707. return -EINVAL;
  708. }
  709. rc = cdc_bdown_fn(wcd9xxx);
  710. if (rc)
  711. dev_err(dev, "%s: Codec bring down error, rc: %d\n",
  712. __func__, rc);
  713. return rc;
  714. }
  715. EXPORT_SYMBOL(wcd9xxx_bringdown);
  716. /*
  717. * wcd9xxx_get_codec_info:
  718. * Fill codec specific information like interrupts, version
  719. *
  720. * @dev: pointer to wcd device
  721. *
  722. * Returns 0 for success or negative error code in case of failure
  723. */
  724. int wcd9xxx_get_codec_info(struct device *dev)
  725. {
  726. struct wcd9xxx *wcd9xxx;
  727. int rc;
  728. codec_type_fn cdc_type_fn;
  729. struct wcd9xxx_codec_type *cinfo;
  730. if (!dev)
  731. return -ENODEV;
  732. wcd9xxx = dev_get_drvdata(dev);
  733. if (!wcd9xxx)
  734. return -EINVAL;
  735. cdc_type_fn = wcd9xxx_get_codec_info_fn(wcd9xxx->type);
  736. if (!cdc_type_fn) {
  737. dev_err(dev, "%s: Codec fill type fn NULL!\n",
  738. __func__);
  739. return -EINVAL;
  740. }
  741. cinfo = wcd9xxx->codec_type;
  742. if (!cinfo)
  743. return -EINVAL;
  744. rc = cdc_type_fn(wcd9xxx, cinfo);
  745. if (rc) {
  746. dev_err(dev, "%s: Codec type fill failed, rc:%d\n",
  747. __func__, rc);
  748. return rc;
  749. }
  750. switch (wcd9xxx->type) {
  751. case WCD934X:
  752. cinfo->dev = tavil_devs;
  753. cinfo->size = ARRAY_SIZE(tavil_devs);
  754. break;
  755. case WCD9335:
  756. cinfo->dev = tasha_devs;
  757. cinfo->size = ARRAY_SIZE(tasha_devs);
  758. break;
  759. case WCD9330:
  760. cinfo->dev = tomtom_devs;
  761. cinfo->size = ARRAY_SIZE(tomtom_devs);
  762. break;
  763. default:
  764. cinfo->dev = NULL;
  765. cinfo->size = 0;
  766. break;
  767. }
  768. return rc;
  769. }
  770. EXPORT_SYMBOL(wcd9xxx_get_codec_info);
  771. /*
  772. * wcd9xxx_core_irq_init:
  773. * Initialize wcd9xxx codec irq instance
  774. *
  775. * @wcd9xxx_core_res: pointer to wcd core resource
  776. *
  777. * Returns 0 for success or negative error code in case of failure
  778. */
  779. int wcd9xxx_core_irq_init(
  780. struct wcd9xxx_core_resource *wcd9xxx_core_res)
  781. {
  782. int ret = 0;
  783. if (!wcd9xxx_core_res)
  784. return -EINVAL;
  785. if (wcd9xxx_core_res->irq != 1) {
  786. ret = wcd9xxx_irq_init(wcd9xxx_core_res);
  787. if (ret)
  788. pr_err("IRQ initialization failed\n");
  789. }
  790. return ret;
  791. }
  792. EXPORT_SYMBOL(wcd9xxx_core_irq_init);
  793. /*
  794. * wcd9xxx_assign_irq:
  795. * Assign irq and irq_base to wcd9xxx core resource
  796. *
  797. * @wcd9xxx_core_res: pointer to wcd core resource
  798. * @irq: irq number
  799. * @irq_base: base irq number
  800. *
  801. * Returns 0 for success or negative error code in case of failure
  802. */
  803. int wcd9xxx_assign_irq(
  804. struct wcd9xxx_core_resource *wcd9xxx_core_res,
  805. unsigned int irq,
  806. unsigned int irq_base)
  807. {
  808. if (!wcd9xxx_core_res)
  809. return -EINVAL;
  810. wcd9xxx_core_res->irq = irq;
  811. wcd9xxx_core_res->irq_base = irq_base;
  812. return 0;
  813. }
  814. EXPORT_SYMBOL(wcd9xxx_assign_irq);
  815. /*
  816. * wcd9xxx_core_res_init:
  817. * Initialize wcd core resource instance
  818. *
  819. * @wcd9xxx_core_res: pointer to wcd core resource
  820. * @num_irqs: number of irqs for wcd9xxx core
  821. * @num_irq_regs: number of irq registers
  822. * @wcd_regmap: pointer to the wcd register map
  823. *
  824. * Returns 0 for success or negative error code in case of failure
  825. */
  826. int wcd9xxx_core_res_init(
  827. struct wcd9xxx_core_resource *wcd9xxx_core_res,
  828. int num_irqs, int num_irq_regs, struct regmap *wcd_regmap)
  829. {
  830. if (!wcd9xxx_core_res || !wcd_regmap)
  831. return -EINVAL;
  832. mutex_init(&wcd9xxx_core_res->pm_lock);
  833. wcd9xxx_core_res->wlock_holders = 0;
  834. wcd9xxx_core_res->pm_state = WCD9XXX_PM_SLEEPABLE;
  835. init_waitqueue_head(&wcd9xxx_core_res->pm_wq);
  836. pm_qos_add_request(&wcd9xxx_core_res->pm_qos_req,
  837. PM_QOS_CPU_DMA_LATENCY,
  838. PM_QOS_DEFAULT_VALUE);
  839. wcd9xxx_core_res->num_irqs = num_irqs;
  840. wcd9xxx_core_res->num_irq_regs = num_irq_regs;
  841. wcd9xxx_core_res->wcd_core_regmap = wcd_regmap;
  842. pr_info("%s: num_irqs = %d, num_irq_regs = %d\n",
  843. __func__, wcd9xxx_core_res->num_irqs,
  844. wcd9xxx_core_res->num_irq_regs);
  845. return 0;
  846. }
  847. EXPORT_SYMBOL(wcd9xxx_core_res_init);
  848. /*
  849. * wcd9xxx_core_res_deinit:
  850. * Deinit wcd core resource instance
  851. *
  852. * @wcd9xxx_core_res: pointer to wcd core resource
  853. */
  854. void wcd9xxx_core_res_deinit(struct wcd9xxx_core_resource *wcd9xxx_core_res)
  855. {
  856. if (!wcd9xxx_core_res)
  857. return;
  858. pm_qos_remove_request(&wcd9xxx_core_res->pm_qos_req);
  859. mutex_destroy(&wcd9xxx_core_res->pm_lock);
  860. }
  861. EXPORT_SYMBOL(wcd9xxx_core_res_deinit);
  862. /*
  863. * wcd9xxx_pm_cmpxchg:
  864. * Check old state and exchange with pm new state
  865. * if old state matches with current state
  866. *
  867. * @wcd9xxx_core_res: pointer to wcd core resource
  868. * @o: pm old state
  869. * @n: pm new state
  870. *
  871. * Returns old state
  872. */
  873. enum wcd9xxx_pm_state wcd9xxx_pm_cmpxchg(
  874. struct wcd9xxx_core_resource *wcd9xxx_core_res,
  875. enum wcd9xxx_pm_state o,
  876. enum wcd9xxx_pm_state n)
  877. {
  878. enum wcd9xxx_pm_state old;
  879. if (!wcd9xxx_core_res)
  880. return o;
  881. mutex_lock(&wcd9xxx_core_res->pm_lock);
  882. old = wcd9xxx_core_res->pm_state;
  883. if (old == o)
  884. wcd9xxx_core_res->pm_state = n;
  885. mutex_unlock(&wcd9xxx_core_res->pm_lock);
  886. return old;
  887. }
  888. EXPORT_SYMBOL(wcd9xxx_pm_cmpxchg);
  889. /*
  890. * wcd9xxx_core_res_suspend:
  891. * Suspend callback function for wcd9xxx core
  892. *
  893. * @wcd9xxx_core_res: pointer to wcd core resource
  894. * @pm_message_t: pm message
  895. *
  896. * Returns 0 for success or negative error code for failure/busy
  897. */
  898. int wcd9xxx_core_res_suspend(
  899. struct wcd9xxx_core_resource *wcd9xxx_core_res,
  900. pm_message_t pmesg)
  901. {
  902. int ret = 0;
  903. pr_debug("%s: enter\n", __func__);
  904. /*
  905. * pm_qos_update_request() can be called after this suspend chain call
  906. * started. thus suspend can be called while lock is being held
  907. */
  908. mutex_lock(&wcd9xxx_core_res->pm_lock);
  909. if (wcd9xxx_core_res->pm_state == WCD9XXX_PM_SLEEPABLE) {
  910. pr_debug("%s: suspending system, state %d, wlock %d\n",
  911. __func__, wcd9xxx_core_res->pm_state,
  912. wcd9xxx_core_res->wlock_holders);
  913. wcd9xxx_core_res->pm_state = WCD9XXX_PM_ASLEEP;
  914. } else if (wcd9xxx_core_res->pm_state == WCD9XXX_PM_AWAKE) {
  915. /*
  916. * unlock to wait for pm_state == WCD9XXX_PM_SLEEPABLE
  917. * then set to WCD9XXX_PM_ASLEEP
  918. */
  919. pr_debug("%s: waiting to suspend system, state %d, wlock %d\n",
  920. __func__, wcd9xxx_core_res->pm_state,
  921. wcd9xxx_core_res->wlock_holders);
  922. mutex_unlock(&wcd9xxx_core_res->pm_lock);
  923. if (!(wait_event_timeout(wcd9xxx_core_res->pm_wq,
  924. wcd9xxx_pm_cmpxchg(wcd9xxx_core_res,
  925. WCD9XXX_PM_SLEEPABLE,
  926. WCD9XXX_PM_ASLEEP) ==
  927. WCD9XXX_PM_SLEEPABLE,
  928. HZ))) {
  929. pr_debug("%s: suspend failed state %d, wlock %d\n",
  930. __func__, wcd9xxx_core_res->pm_state,
  931. wcd9xxx_core_res->wlock_holders);
  932. ret = -EBUSY;
  933. } else {
  934. pr_debug("%s: done, state %d, wlock %d\n", __func__,
  935. wcd9xxx_core_res->pm_state,
  936. wcd9xxx_core_res->wlock_holders);
  937. }
  938. mutex_lock(&wcd9xxx_core_res->pm_lock);
  939. } else if (wcd9xxx_core_res->pm_state == WCD9XXX_PM_ASLEEP) {
  940. pr_warn("%s: system is already suspended, state %d, wlock %dn",
  941. __func__, wcd9xxx_core_res->pm_state,
  942. wcd9xxx_core_res->wlock_holders);
  943. }
  944. mutex_unlock(&wcd9xxx_core_res->pm_lock);
  945. return ret;
  946. }
  947. EXPORT_SYMBOL(wcd9xxx_core_res_suspend);
  948. /*
  949. * wcd9xxx_core_res_resume:
  950. * Resume callback function for wcd9xxx core
  951. *
  952. * @wcd9xxx_core_res: pointer to wcd core resource
  953. *
  954. * Returns 0 for success or negative error code for failure/busy
  955. */
  956. int wcd9xxx_core_res_resume(
  957. struct wcd9xxx_core_resource *wcd9xxx_core_res)
  958. {
  959. int ret = 0;
  960. pr_debug("%s: enter\n", __func__);
  961. mutex_lock(&wcd9xxx_core_res->pm_lock);
  962. if (wcd9xxx_core_res->pm_state == WCD9XXX_PM_ASLEEP) {
  963. pr_debug("%s: resuming system, state %d, wlock %d\n", __func__,
  964. wcd9xxx_core_res->pm_state,
  965. wcd9xxx_core_res->wlock_holders);
  966. wcd9xxx_core_res->pm_state = WCD9XXX_PM_SLEEPABLE;
  967. } else {
  968. pr_warn("%s: system is already awake, state %d wlock %d\n",
  969. __func__, wcd9xxx_core_res->pm_state,
  970. wcd9xxx_core_res->wlock_holders);
  971. }
  972. mutex_unlock(&wcd9xxx_core_res->pm_lock);
  973. wake_up_all(&wcd9xxx_core_res->pm_wq);
  974. return ret;
  975. }
  976. EXPORT_SYMBOL(wcd9xxx_core_res_resume);
  977. /*
  978. * wcd9xxx_get_intf_type:
  979. * Get interface type of wcd9xxx core
  980. *
  981. * Returns interface type
  982. */
  983. enum wcd9xxx_intf_status wcd9xxx_get_intf_type(void)
  984. {
  985. return wcd9xxx_intf;
  986. }
  987. EXPORT_SYMBOL(wcd9xxx_get_intf_type);
  988. /*
  989. * wcd9xxx_set_intf_type:
  990. * Set interface type of wcd9xxx core
  991. *
  992. */
  993. void wcd9xxx_set_intf_type(enum wcd9xxx_intf_status intf_status)
  994. {
  995. wcd9xxx_intf = intf_status;
  996. }
  997. EXPORT_SYMBOL(wcd9xxx_set_intf_type);
  998. /*
  999. * wcd9xxx_set_power_state: set power state for the region
  1000. * @wcd9xxx: handle to wcd core
  1001. * @state: power state to be set
  1002. * @region: region index
  1003. *
  1004. * Returns error code in case of failure or 0 for success
  1005. */
  1006. int wcd9xxx_set_power_state(struct wcd9xxx *wcd9xxx,
  1007. enum codec_power_states state,
  1008. enum wcd_power_regions region)
  1009. {
  1010. if (!wcd9xxx) {
  1011. pr_err("%s: wcd9xxx is NULL\n", __func__);
  1012. return -EINVAL;
  1013. }
  1014. if ((region < 0) || (region >= WCD9XXX_MAX_PWR_REGIONS)) {
  1015. dev_err(wcd9xxx->dev, "%s: region index %d out of bounds\n",
  1016. __func__, region);
  1017. return -EINVAL;
  1018. }
  1019. if (!wcd9xxx->wcd9xxx_pwr[region]) {
  1020. dev_err(wcd9xxx->dev, "%s: memory not created for region: %d\n",
  1021. __func__, region);
  1022. return -EINVAL;
  1023. }
  1024. mutex_lock(&wcd9xxx->io_lock);
  1025. wcd9xxx->wcd9xxx_pwr[region]->power_state = state;
  1026. mutex_unlock(&wcd9xxx->io_lock);
  1027. return 0;
  1028. }
  1029. EXPORT_SYMBOL(wcd9xxx_set_power_state);
  1030. /*
  1031. * wcd9xxx_get_current_power_state: Get power state of the region
  1032. * @wcd9xxx: handle to wcd core
  1033. * @region: region index
  1034. *
  1035. * Returns current power state of the region or error code for failure
  1036. */
  1037. int wcd9xxx_get_current_power_state(struct wcd9xxx *wcd9xxx,
  1038. enum wcd_power_regions region)
  1039. {
  1040. int state;
  1041. if (!wcd9xxx) {
  1042. pr_err("%s: wcd9xxx is NULL\n", __func__);
  1043. return -EINVAL;
  1044. }
  1045. if ((region < 0) || (region >= WCD9XXX_MAX_PWR_REGIONS)) {
  1046. dev_err(wcd9xxx->dev, "%s: region index %d out of bounds\n",
  1047. __func__, region);
  1048. return -EINVAL;
  1049. }
  1050. if (!wcd9xxx->wcd9xxx_pwr[region]) {
  1051. dev_err(wcd9xxx->dev, "%s: memory not created for region: %d\n",
  1052. __func__, region);
  1053. return -EINVAL;
  1054. }
  1055. mutex_lock(&wcd9xxx->io_lock);
  1056. state = wcd9xxx->wcd9xxx_pwr[region]->power_state;
  1057. mutex_unlock(&wcd9xxx->io_lock);
  1058. return state;
  1059. }
  1060. EXPORT_SYMBOL(wcd9xxx_get_current_power_state);