htt_stats.h 144 KB

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  1. /*
  2. * Copyright (c) 2017-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. /**
  19. * @file htt_stats.h
  20. *
  21. * @details the public header file of HTT STATS
  22. */
  23. #ifndef __HTT_STATS_H__
  24. #define __HTT_STATS_H__
  25. #include <htt.h>
  26. /*
  27. * htt_dbg_ext_stats_type -
  28. * The base structure for each of the stats_type is only for reference
  29. * Host should use this information to know the type of TLVs to expect
  30. * for a particular stats type.
  31. *
  32. * Max supported stats :- 256.
  33. */
  34. enum htt_dbg_ext_stats_type {
  35. /* HTT_DBG_EXT_STATS_RESET
  36. * PARAM:
  37. * - config_param0 : start_offset (stats type)
  38. * - config_param1 : stats bmask from start offset
  39. * - config_param2 : stats bmask from start offset + 32
  40. * - config_param3 : stats bmask from start offset + 64
  41. * RESP MSG:
  42. * - No response sent.
  43. */
  44. HTT_DBG_EXT_STATS_RESET = 0,
  45. /* HTT_DBG_EXT_STATS_PDEV_TX
  46. * PARAMS:
  47. * - No Params
  48. * RESP MSG:
  49. * - htt_tx_pdev_stats_t
  50. */
  51. HTT_DBG_EXT_STATS_PDEV_TX = 1,
  52. /* HTT_DBG_EXT_STATS_PDEV_RX
  53. * PARAMS:
  54. * - No Params
  55. * RESP MSG:
  56. * - htt_rx_pdev_stats_t
  57. */
  58. HTT_DBG_EXT_STATS_PDEV_RX = 2,
  59. /* HTT_DBG_EXT_STATS_PDEV_TX_HWQ
  60. * PARAMS:
  61. * - config_param0: [Bit31: Bit0] HWQ mask
  62. * RESP MSG:
  63. * - htt_tx_hwq_stats_t
  64. */
  65. HTT_DBG_EXT_STATS_PDEV_TX_HWQ = 3,
  66. /* HTT_DBG_EXT_STATS_PDEV_TX_SCHED
  67. * PARAMS:
  68. * - config_param0: [Bit31: Bit0] TXQ mask
  69. * RESP MSG:
  70. * - htt_stats_tx_sched_t
  71. */
  72. HTT_DBG_EXT_STATS_PDEV_TX_SCHED = 4,
  73. /* HTT_DBG_EXT_STATS_PDEV_ERROR
  74. * PARAMS:
  75. * - No Params
  76. * RESP MSG:
  77. * - htt_hw_err_stats_t
  78. */
  79. HTT_DBG_EXT_STATS_PDEV_ERROR = 5,
  80. /* HTT_DBG_EXT_STATS_PDEV_TQM
  81. * PARAMS:
  82. * - No Params
  83. * RESP MSG:
  84. * - htt_tx_tqm_pdev_stats_t
  85. */
  86. HTT_DBG_EXT_STATS_PDEV_TQM = 6,
  87. /* HTT_DBG_EXT_STATS_TQM_CMDQ
  88. * PARAMS:
  89. * - config_param0:
  90. * [Bit15: Bit0 ] cmdq id :if 0xFFFF print all cmdq's
  91. * [Bit31: Bit16] reserved
  92. * RESP MSG:
  93. * - htt_tx_tqm_cmdq_stats_t
  94. */
  95. HTT_DBG_EXT_STATS_TQM_CMDQ = 7,
  96. /* HTT_DBG_EXT_STATS_TX_DE_INFO
  97. * PARAMS:
  98. * - No Params
  99. * RESP MSG:
  100. * - htt_tx_de_stats_t
  101. */
  102. HTT_DBG_EXT_STATS_TX_DE_INFO = 8,
  103. /* HTT_DBG_EXT_STATS_PDEV_TX_RATE
  104. * PARAMS:
  105. * - No Params
  106. * RESP MSG:
  107. * - htt_tx_pdev_rate_stats_t
  108. */
  109. HTT_DBG_EXT_STATS_PDEV_TX_RATE = 9,
  110. /* HTT_DBG_EXT_STATS_PDEV_RX_RATE
  111. * PARAMS:
  112. * - No Params
  113. * RESP MSG:
  114. * - htt_rx_pdev_rate_stats_t
  115. */
  116. HTT_DBG_EXT_STATS_PDEV_RX_RATE = 10,
  117. /* HTT_DBG_EXT_STATS_PEER_INFO
  118. * PARAMS:
  119. * - config_param0:
  120. * [Bit0] - [0] for sw_peer_id, [1] for mac_addr based request
  121. * [Bit15 : Bit 1] htt_peer_stats_req_mode_t
  122. * [Bit31 : Bit16] sw_peer_id
  123. * config_param1:
  124. * peer_stats_req_type_mask:32 (enum htt_peer_stats_tlv_enum)
  125. * 0 bit htt_peer_stats_cmn_tlv
  126. * 1 bit htt_peer_details_tlv
  127. * 2 bit htt_tx_peer_rate_stats_tlv
  128. * 3 bit htt_rx_peer_rate_stats_tlv
  129. * 4 bit htt_tx_tid_stats_tlv/htt_tx_tid_stats_v1_tlv
  130. * 5 bit htt_rx_tid_stats_tlv
  131. * 6 bit htt_msdu_flow_stats_tlv
  132. * - config_param2: [Bit31 : Bit0] mac_addr31to0
  133. * - config_param3: [Bit15 : Bit0] mac_addr47to32
  134. * [Bit 16] If this bit is set, reset per peer stats
  135. * of corresponding tlv indicated by config
  136. * param 1.
  137. * HTT_DBG_EXT_PEER_STATS_RESET_GET will be
  138. * used to get this bit position.
  139. * WMI_SERVICE_PER_PEER_HTT_STATS_RESET
  140. * indicates that FW supports per peer HTT
  141. * stats reset.
  142. * [Bit31 : Bit17] reserved
  143. * RESP MSG:
  144. * - htt_peer_stats_t
  145. */
  146. HTT_DBG_EXT_STATS_PEER_INFO = 11,
  147. /* HTT_DBG_EXT_STATS_TX_SELFGEN_INFO
  148. * PARAMS:
  149. * - No Params
  150. * RESP MSG:
  151. * - htt_tx_pdev_selfgen_stats_t
  152. */
  153. HTT_DBG_EXT_STATS_TX_SELFGEN_INFO = 12,
  154. /* HTT_DBG_EXT_STATS_TX_MU_HWQ
  155. * PARAMS:
  156. * - config_param0: [Bit31: Bit0] HWQ mask
  157. * RESP MSG:
  158. * - htt_tx_hwq_mu_mimo_stats_t
  159. */
  160. HTT_DBG_EXT_STATS_TX_MU_HWQ = 13,
  161. /* HTT_DBG_EXT_STATS_RING_IF_INFO
  162. * PARAMS:
  163. * - config_param0:
  164. * [Bit15: Bit0 ] ring id :if 0xFFFF print all rings
  165. * [Bit31: Bit16] reserved
  166. * RESP MSG:
  167. * - htt_ring_if_stats_t
  168. */
  169. HTT_DBG_EXT_STATS_RING_IF_INFO = 14,
  170. /* HTT_DBG_EXT_STATS_SRNG_INFO
  171. * PARAMS:
  172. * - config_param0:
  173. * [Bit15: Bit0 ] ring id :if 0xFFFF print all rings
  174. * [Bit31: Bit16] reserved
  175. * - No Params
  176. * RESP MSG:
  177. * - htt_sring_stats_t
  178. */
  179. HTT_DBG_EXT_STATS_SRNG_INFO = 15,
  180. /* HTT_DBG_EXT_STATS_SFM_INFO
  181. * PARAMS:
  182. * - No Params
  183. * RESP MSG:
  184. * - htt_sfm_stats_t
  185. */
  186. HTT_DBG_EXT_STATS_SFM_INFO = 16,
  187. /* HTT_DBG_EXT_STATS_PDEV_TX_MU
  188. * PARAMS:
  189. * - No Params
  190. * RESP MSG:
  191. * - htt_tx_pdev_mu_mimo_stats_t
  192. */
  193. HTT_DBG_EXT_STATS_PDEV_TX_MU = 17,
  194. /* HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST
  195. * PARAMS:
  196. * - config_param0:
  197. * [Bit7 : Bit0] vdev_id:8
  198. * note:0xFF to get all active peers based on pdev_mask.
  199. * [Bit31 : Bit8] rsvd:24
  200. * RESP MSG:
  201. * - htt_active_peer_details_list_t
  202. */
  203. HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST = 18,
  204. /* HTT_DBG_EXT_STATS_PDEV_CCA_STATS
  205. * PARAMS:
  206. * - config_param0:
  207. * [Bit0] - 1 sec interval histogram
  208. * [Bit1] - 100ms interval histogram
  209. * [Bit3] - Cumulative CCA stats
  210. * RESP MSG:
  211. * - htt_pdev_cca_stats_t
  212. */
  213. HTT_DBG_EXT_STATS_PDEV_CCA_STATS = 19,
  214. /* HTT_DBG_EXT_STATS_TWT_SESSIONS
  215. * PARAMS:
  216. * - config_param0:
  217. * No params
  218. * RESP MSG:
  219. * - htt_pdev_twt_sessions_stats_t
  220. */
  221. HTT_DBG_EXT_STATS_TWT_SESSIONS = 20,
  222. /* HTT_DBG_EXT_STATS_REO_CNTS
  223. * PARAMS:
  224. * - config_param0:
  225. * No params
  226. * RESP MSG:
  227. * - htt_soc_reo_resource_stats_t
  228. */
  229. HTT_DBG_EXT_STATS_REO_RESOURCE_STATS = 21,
  230. /* HTT_DBG_EXT_STATS_TX_SOUNDING_INFO
  231. * PARAMS:
  232. * - config_param0:
  233. * [Bit0] vdev_id_set:1
  234. * set to 1 if vdev_id is set and vdev stats are requested
  235. * [Bit8 : Bit1] vdev_id:8
  236. * note:0xFF to get all active vdevs based on pdev_mask.
  237. * [Bit31 : Bit9] rsvd:22
  238. *
  239. * RESP MSG:
  240. * - htt_tx_sounding_stats_t
  241. */
  242. HTT_DBG_EXT_STATS_TX_SOUNDING_INFO = 22,
  243. /* HTT_DBG_EXT_STATS_PDEV_OBSS_PD_STATS
  244. * PARAMS:
  245. * - config_param0:
  246. * No params
  247. * RESP MSG:
  248. * - htt_pdev_obss_pd_stats_t
  249. */
  250. HTT_DBG_EXT_STATS_PDEV_OBSS_PD_STATS = 23,
  251. /* HTT_DBG_EXT_STATS_RING_BACKPRESSURE_STATS
  252. * PARAMS:
  253. * - config_param0:
  254. * No params
  255. * RESP MSG:
  256. * - htt_stats_ring_backpressure_stats_t
  257. */
  258. HTT_DBG_EXT_STATS_RING_BACKPRESSURE_STATS = 24,
  259. /* HTT_DBG_EXT_STATS_LATENCY_PROF_STATS
  260. * PARAMS:
  261. *
  262. * RESP MSG:
  263. * - htt_soc_latency_prof_t
  264. */
  265. HTT_DBG_EXT_STATS_LATENCY_PROF_STATS = 25,
  266. /* keep this last */
  267. HTT_DBG_NUM_EXT_STATS = 256,
  268. };
  269. /*
  270. * Macros to get/set the bit field in config param[3] that indicates to
  271. * clear corresponding per peer stats specified by config param 1
  272. */
  273. #define HTT_DBG_EXT_PEER_STATS_RESET_M 0x00010000
  274. #define HTT_DBG_EXT_PEER_STATS_RESET_S 16
  275. #define HTT_DBG_EXT_PEER_STATS_RESET_GET(_var) \
  276. (((_var) & HTT_DBG_EXT_PEER_STATS_RESET_M) >> \
  277. HTT_DBG_EXT_PEER_STATS_RESET_S)
  278. #define HTT_DBG_EXT_PEER_STATS_RESET_SET(_var, _val) \
  279. do { \
  280. HTT_CHECK_SET_VAL(HTT_DBG_EXT_PEER_STATS_RESET, _val); \
  281. ((_var) |= ((_val) << HTT_DBG_EXT_PEER_STATS_RESET_S)); \
  282. } while (0)
  283. typedef enum {
  284. HTT_STATS_TX_PDEV_CMN_TAG = 0, /* htt_tx_pdev_stats_cmn_tlv */
  285. HTT_STATS_TX_PDEV_UNDERRUN_TAG = 1, /* htt_tx_pdev_stats_urrn_tlv_v */
  286. HTT_STATS_TX_PDEV_SIFS_TAG = 2, /* htt_tx_pdev_stats_sifs_tlv_v */
  287. HTT_STATS_TX_PDEV_FLUSH_TAG = 3, /* htt_tx_pdev_stats_flush_tlv_v */
  288. HTT_STATS_TX_PDEV_PHY_ERR_TAG = 4, /* htt_tx_pdev_stats_phy_err_tlv_v */
  289. HTT_STATS_STRING_TAG = 5, /* htt_stats_string_tlv */
  290. HTT_STATS_TX_HWQ_CMN_TAG = 6, /* htt_tx_hwq_stats_cmn_tlv */
  291. HTT_STATS_TX_HWQ_DIFS_LATENCY_TAG = 7, /* htt_tx_hwq_difs_latency_stats_tlv_v */
  292. HTT_STATS_TX_HWQ_CMD_RESULT_TAG = 8, /* htt_tx_hwq_cmd_result_stats_tlv_v */
  293. HTT_STATS_TX_HWQ_CMD_STALL_TAG = 9, /* htt_tx_hwq_cmd_stall_stats_tlv_v */
  294. HTT_STATS_TX_HWQ_FES_STATUS_TAG = 10, /* htt_tx_hwq_fes_result_stats_tlv_v */
  295. HTT_STATS_TX_TQM_GEN_MPDU_TAG = 11, /* htt_tx_tqm_gen_mpdu_stats_tlv_v */
  296. HTT_STATS_TX_TQM_LIST_MPDU_TAG = 12, /* htt_tx_tqm_list_mpdu_stats_tlv_v */
  297. HTT_STATS_TX_TQM_LIST_MPDU_CNT_TAG = 13, /* htt_tx_tqm_list_mpdu_cnt_tlv_v */
  298. HTT_STATS_TX_TQM_CMN_TAG = 14, /* htt_tx_tqm_cmn_stats_tlv */
  299. HTT_STATS_TX_TQM_PDEV_TAG = 15, /* htt_tx_tqm_pdev_stats_tlv_v */
  300. HTT_STATS_TX_TQM_CMDQ_STATUS_TAG = 16, /* htt_tx_tqm_cmdq_status_tlv */
  301. HTT_STATS_TX_DE_EAPOL_PACKETS_TAG = 17, /* htt_tx_de_eapol_packets_stats_tlv */
  302. HTT_STATS_TX_DE_CLASSIFY_FAILED_TAG = 18, /* htt_tx_de_classify_failed_stats_tlv */
  303. HTT_STATS_TX_DE_CLASSIFY_STATS_TAG = 19, /* htt_tx_de_classify_stats_tlv */
  304. HTT_STATS_TX_DE_CLASSIFY_STATUS_TAG = 20, /* htt_tx_de_classify_status_stats_tlv */
  305. HTT_STATS_TX_DE_ENQUEUE_PACKETS_TAG = 21, /* htt_tx_de_enqueue_packets_stats_tlv */
  306. HTT_STATS_TX_DE_ENQUEUE_DISCARD_TAG = 22, /* htt_tx_de_enqueue_discard_stats_tlv */
  307. HTT_STATS_TX_DE_CMN_TAG = 23, /* htt_tx_de_cmn_stats_tlv */
  308. HTT_STATS_RING_IF_TAG = 24, /* htt_ring_if_stats_tlv */
  309. HTT_STATS_TX_PDEV_MU_MIMO_STATS_TAG = 25, /* htt_tx_pdev_mu_mimo_sch_stats_tlv */
  310. HTT_STATS_SFM_CMN_TAG = 26, /* htt_sfm_cmn_tlv */
  311. HTT_STATS_SRING_STATS_TAG = 27, /* htt_sring_stats_tlv */
  312. HTT_STATS_RX_PDEV_FW_STATS_TAG = 28, /* htt_rx_pdev_fw_stats_tlv */
  313. HTT_STATS_RX_PDEV_FW_RING_MPDU_ERR_TAG = 29, /* htt_rx_pdev_fw_ring_mpdu_err_tlv_v */
  314. HTT_STATS_RX_PDEV_FW_MPDU_DROP_TAG = 30, /* htt_rx_pdev_fw_mpdu_drop_tlv_v */
  315. HTT_STATS_RX_SOC_FW_STATS_TAG = 31, /* htt_rx_soc_fw_stats_tlv */
  316. HTT_STATS_RX_SOC_FW_REFILL_RING_EMPTY_TAG = 32, /* htt_rx_soc_fw_refill_ring_empty_tlv_v */
  317. HTT_STATS_RX_SOC_FW_REFILL_RING_NUM_REFILL_TAG = 33, /* htt_rx_soc_fw_refill_ring_num_refill_tlv_v */
  318. HTT_STATS_TX_PDEV_RATE_STATS_TAG = 34, /* htt_tx_pdev_rate_stats_tlv */
  319. HTT_STATS_RX_PDEV_RATE_STATS_TAG = 35, /* htt_rx_pdev_rate_stats_tlv */
  320. HTT_STATS_TX_PDEV_SCHEDULER_TXQ_STATS_TAG = 36, /* htt_tx_pdev_stats_sched_per_txq_tlv */
  321. HTT_STATS_TX_SCHED_CMN_TAG = 37, /* htt_stats_tx_sched_cmn_tlv */
  322. HTT_STATS_TX_PDEV_MUMIMO_MPDU_STATS_TAG = 38, /* htt_tx_pdev_mu_mimo_mpdu_stats_tlv */
  323. HTT_STATS_SCHED_TXQ_CMD_POSTED_TAG = 39, /* htt_sched_txq_cmd_posted_tlv_v */
  324. HTT_STATS_RING_IF_CMN_TAG = 40, /* htt_ring_if_cmn_tlv */
  325. HTT_STATS_SFM_CLIENT_USER_TAG = 41, /* htt_sfm_client_user_tlv_v */
  326. HTT_STATS_SFM_CLIENT_TAG = 42, /* htt_sfm_client_tlv */
  327. HTT_STATS_TX_TQM_ERROR_STATS_TAG = 43, /* htt_tx_tqm_error_stats_tlv */
  328. HTT_STATS_SCHED_TXQ_CMD_REAPED_TAG = 44, /* htt_sched_txq_cmd_reaped_tlv_v */
  329. HTT_STATS_SRING_CMN_TAG = 45, /* htt_sring_cmn_tlv */
  330. HTT_STATS_TX_SELFGEN_AC_ERR_STATS_TAG = 46, /* htt_tx_selfgen_ac_err_stats_tlv */
  331. HTT_STATS_TX_SELFGEN_CMN_STATS_TAG = 47, /* htt_tx_selfgen_cmn_stats_tlv */
  332. HTT_STATS_TX_SELFGEN_AC_STATS_TAG = 48, /* htt_tx_selfgen_ac_stats_tlv */
  333. HTT_STATS_TX_SELFGEN_AX_STATS_TAG = 49, /* htt_tx_selfgen_ax_stats_tlv */
  334. HTT_STATS_TX_SELFGEN_AX_ERR_STATS_TAG = 50, /* htt_tx_selfgen_ax_err_stats_tlv */
  335. HTT_STATS_TX_HWQ_MUMIMO_SCH_STATS_TAG = 51, /* htt_tx_hwq_mu_mimo_sch_stats_tlv */
  336. HTT_STATS_TX_HWQ_MUMIMO_MPDU_STATS_TAG = 52, /* htt_tx_hwq_mu_mimo_mpdu_stats_tlv */
  337. HTT_STATS_TX_HWQ_MUMIMO_CMN_STATS_TAG = 53, /* htt_tx_hwq_mu_mimo_cmn_stats_tlv */
  338. HTT_STATS_HW_INTR_MISC_TAG = 54, /* htt_hw_stats_intr_misc_tlv */
  339. HTT_STATS_HW_WD_TIMEOUT_TAG = 55, /* htt_hw_stats_wd_timeout_tlv */
  340. HTT_STATS_HW_PDEV_ERRS_TAG = 56, /* htt_hw_stats_pdev_errs_tlv */
  341. HTT_STATS_COUNTER_NAME_TAG = 57, /* htt_counter_tlv */
  342. HTT_STATS_TX_TID_DETAILS_TAG = 58, /* htt_tx_tid_stats_tlv */
  343. HTT_STATS_RX_TID_DETAILS_TAG = 59, /* htt_rx_tid_stats_tlv */
  344. HTT_STATS_PEER_STATS_CMN_TAG = 60, /* htt_peer_stats_cmn_tlv */
  345. HTT_STATS_PEER_DETAILS_TAG = 61, /* htt_peer_details_tlv */
  346. HTT_STATS_PEER_TX_RATE_STATS_TAG = 62, /* htt_tx_peer_rate_stats_tlv */
  347. HTT_STATS_PEER_RX_RATE_STATS_TAG = 63, /* htt_rx_peer_rate_stats_tlv */
  348. HTT_STATS_PEER_MSDU_FLOWQ_TAG = 64, /* htt_msdu_flow_stats_tlv */
  349. HTT_STATS_TX_DE_COMPL_STATS_TAG = 65, /* htt_tx_de_compl_stats_tlv */
  350. HTT_STATS_WHAL_TX_TAG = 66, /* htt_hw_stats_whal_tx_tlv */
  351. HTT_STATS_TX_PDEV_SIFS_HIST_TAG = 67, /* htt_tx_pdev_stats_sifs_hist_tlv_v */
  352. HTT_STATS_RX_PDEV_FW_STATS_PHY_ERR_TAG = 68, /* htt_rx_pdev_fw_stats_phy_err_tlv */
  353. HTT_STATS_TX_TID_DETAILS_V1_TAG = 69, /* htt_tx_tid_stats_v1_tlv */
  354. HTT_STATS_PDEV_CCA_1SEC_HIST_TAG = 70, /* htt_pdev_cca_stats_hist_tlv (for 1 sec interval stats) */
  355. HTT_STATS_PDEV_CCA_100MSEC_HIST_TAG = 71, /* htt_pdev_cca_stats_hist_tlv (for 100 msec interval stats) */
  356. HTT_STATS_PDEV_CCA_STAT_CUMULATIVE_TAG = 72, /* htt_pdev_stats_cca_stats_tlv */
  357. HTT_STATS_PDEV_CCA_COUNTERS_TAG = 73, /* htt_pdev_stats_cca_counters_tlv */
  358. HTT_STATS_TX_PDEV_MPDU_STATS_TAG = 74, /* htt_tx_pdev_mpdu_stats_tlv */
  359. HTT_STATS_PDEV_TWT_SESSIONS_TAG = 75, /* htt_pdev_stats_twt_sessions_tlv */
  360. HTT_STATS_PDEV_TWT_SESSION_TAG = 76, /* htt_pdev_stats_twt_session_tlv */
  361. HTT_STATS_RX_REFILL_RXDMA_ERR_TAG = 77, /* htt_rx_soc_fw_refill_ring_num_rxdma_err_tlv_v */
  362. HTT_STATS_RX_REFILL_REO_ERR_TAG = 78, /* htt_rx_soc_fw_refill_ring_num_reo_err_tlv_v */
  363. HTT_STATS_RX_REO_RESOURCE_STATS_TAG = 79, /* htt_rx_reo_debug_stats_tlv_v */
  364. HTT_STATS_TX_SOUNDING_STATS_TAG = 80, /* htt_tx_sounding_stats_tlv */
  365. HTT_STATS_TX_PDEV_TX_PPDU_STATS_TAG = 81, /* htt_tx_pdev_stats_tx_ppdu_stats_tlv_v */
  366. HTT_STATS_TX_PDEV_TRIED_MPDU_CNT_HIST_TAG = 82, /* htt_tx_pdev_stats_tried_mpdu_cnt_hist_tlv_v */
  367. HTT_STATS_TX_HWQ_TRIED_MPDU_CNT_HIST_TAG = 83, /* htt_tx_hwq_tried_mpdu_cnt_hist_tlv_v */
  368. HTT_STATS_TX_HWQ_TXOP_USED_CNT_HIST_TAG = 84, /* htt_tx_hwq_txop_used_cnt_hist_tlv_v */
  369. HTT_STATS_TX_DE_FW2WBM_RING_FULL_HIST_TAG = 85, /* htt_tx_de_fw2wbm_ring_full_hist_tlv */
  370. HTT_STATS_SCHED_TXQ_SCHED_ORDER_SU_TAG = 86, /* htt_sched_txq_sched_order_su_tlv */
  371. HTT_STATS_SCHED_TXQ_SCHED_INELIGIBILITY_TAG = 87, /* htt_sched_txq_sched_eligibility_tlv */
  372. HTT_STATS_PDEV_OBSS_PD_TAG = 88, /* htt_pdev_obss_pd_stats_tlv */
  373. HTT_STATS_HW_WAR_TAG = 89, /* htt_hw_war_stats_tlv */
  374. HTT_STATS_RING_BACKPRESSURE_STATS_TAG = 90, /* htt_ring_backpressure_stats_tlv */
  375. HTT_STATS_LATENCY_PROF_STATS_TAG = 91, /* htt_latency_prof_stats_tlv */
  376. HTT_STATS_LATENCY_CTX_TAG = 92, /* htt_latency_prof_ctx_tlv */
  377. HTT_STATS_LATENCY_CNT_TAG = 93, /* htt_latency_prof_cnt_tlv */
  378. HTT_STATS_MAX_TAG,
  379. } htt_tlv_tag_t;
  380. #define HTT_STATS_TLV_TAG_M 0x00000fff
  381. #define HTT_STATS_TLV_TAG_S 0
  382. #define HTT_STATS_TLV_LENGTH_M 0x00fff000
  383. #define HTT_STATS_TLV_LENGTH_S 12
  384. #define HTT_STATS_TLV_TAG_GET(_var) \
  385. (((_var) & HTT_STATS_TLV_TAG_M) >> \
  386. HTT_STATS_TLV_TAG_S)
  387. #define HTT_STATS_TLV_TAG_SET(_var, _val) \
  388. do { \
  389. HTT_CHECK_SET_VAL(HTT_STATS_TLV_TAG, _val); \
  390. ((_var) |= ((_val) << HTT_STATS_TLV_TAG_S)); \
  391. } while (0)
  392. #define HTT_STATS_TLV_LENGTH_GET(_var) \
  393. (((_var) & HTT_STATS_TLV_LENGTH_M) >> \
  394. HTT_STATS_TLV_LENGTH_S)
  395. #define HTT_STATS_TLV_LENGTH_SET(_var, _val) \
  396. do { \
  397. HTT_CHECK_SET_VAL(HTT_STATS_TLV_LENGTH, _val); \
  398. ((_var) |= ((_val) << HTT_STATS_TLV_LENGTH_S)); \
  399. } while (0)
  400. typedef struct {
  401. union {
  402. /* BIT [11 : 0] :- tag
  403. * BIT [23 : 12] :- length
  404. * BIT [31 : 24] :- reserved
  405. */
  406. A_UINT32 tag__length;
  407. /*
  408. * The following struct is not endian-portable.
  409. * It is suitable for use within the target, which is known to be
  410. * little-endian.
  411. * The host should use the above endian-portable macros to access
  412. * the tag and length bitfields in an endian-neutral manner.
  413. */
  414. struct {
  415. A_UINT32 tag : 12, /* BIT [11 : 0] */
  416. length : 12, /* BIT [23 : 12] */
  417. reserved : 8; /* BIT [31 : 24] */
  418. };
  419. };
  420. } htt_tlv_hdr_t;
  421. #define HTT_STATS_MAX_STRING_SZ32 4
  422. #define HTT_STATS_MACID_INVALID 0xff
  423. #define HTT_TX_HWQ_MAX_DIFS_LATENCY_BINS 10
  424. #define HTT_TX_HWQ_MAX_CMD_RESULT_STATS 13
  425. #define HTT_TX_HWQ_MAX_CMD_STALL_STATS 5
  426. #define HTT_TX_HWQ_MAX_FES_RESULT_STATS 10
  427. typedef enum {
  428. HTT_STATS_TX_PDEV_NO_DATA_UNDERRUN = 0,
  429. HTT_STATS_TX_PDEV_DATA_UNDERRUN_BETWEEN_MPDU = 1,
  430. HTT_STATS_TX_PDEV_DATA_UNDERRUN_WITHIN_MPDU = 2,
  431. HTT_TX_PDEV_MAX_URRN_STATS = 3,
  432. } htt_tx_pdev_underrun_enum;
  433. #define HTT_TX_PDEV_MAX_FLUSH_REASON_STATS 71
  434. #define HTT_TX_PDEV_MAX_SIFS_BURST_STATS 9
  435. #define HTT_TX_PDEV_MAX_SIFS_BURST_HIST_STATS 10
  436. #define HTT_TX_PDEV_MAX_PHY_ERR_STATS 18
  437. #define HTT_TX_PDEV_SCHED_TX_MODE_MAX 4
  438. #define HTT_TX_PDEV_NUM_SCHED_ORDER_LOG 20
  439. #define HTT_RX_STATS_REFILL_MAX_RING 4
  440. #define HTT_RX_STATS_RXDMA_MAX_ERR 16
  441. #define HTT_RX_STATS_FW_DROP_REASON_MAX 16
  442. /* Bytes stored in little endian order */
  443. /* Length should be multiple of DWORD */
  444. typedef struct {
  445. htt_tlv_hdr_t tlv_hdr;
  446. A_UINT32 data[1]; /* Can be variable length */
  447. } htt_stats_string_tlv;
  448. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_M 0x000000ff
  449. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_S 0
  450. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_GET(_var) \
  451. (((_var) & HTT_TX_PDEV_STATS_CMN_MAC_ID_M) >> \
  452. HTT_TX_PDEV_STATS_CMN_MAC_ID_S)
  453. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_SET(_var, _val) \
  454. do { \
  455. HTT_CHECK_SET_VAL(HTT_TX_PDEV_STATS_CMN_MAC_ID, _val); \
  456. ((_var) |= ((_val) << HTT_TX_PDEV_STATS_CMN_MAC_ID_S)); \
  457. } while (0)
  458. /* == TX PDEV STATS == */
  459. typedef struct {
  460. htt_tlv_hdr_t tlv_hdr;
  461. /* BIT [ 7 : 0] :- mac_id
  462. * BIT [31 : 8] :- reserved
  463. */
  464. A_UINT32 mac_id__word;
  465. /* Num queued to HW */
  466. A_UINT32 hw_queued;
  467. /* Num PPDU reaped from HW */
  468. A_UINT32 hw_reaped;
  469. /* Num underruns */
  470. A_UINT32 underrun;
  471. /* Num HW Paused counter. */
  472. A_UINT32 hw_paused;
  473. /* Num HW flush counter. */
  474. A_UINT32 hw_flush;
  475. /* Num HW filtered counter. */
  476. A_UINT32 hw_filt;
  477. /* Num PPDUs cleaned up in TX abort */
  478. A_UINT32 tx_abort;
  479. /* Num MPDUs requed by SW */
  480. A_UINT32 mpdu_requed;
  481. /* excessive retries */
  482. A_UINT32 tx_xretry;
  483. /* Last used data hw rate code */
  484. A_UINT32 data_rc;
  485. /* frames dropped due to excessive sw retries */
  486. A_UINT32 mpdu_dropped_xretry;
  487. /* illegal rate phy errors */
  488. A_UINT32 illgl_rate_phy_err;
  489. /* wal pdev continous xretry */
  490. A_UINT32 cont_xretry;
  491. /* wal pdev tx timeout */
  492. A_UINT32 tx_timeout;
  493. /* wal pdev resets */
  494. A_UINT32 pdev_resets;
  495. /* PhY/BB underrun */
  496. A_UINT32 phy_underrun;
  497. /* MPDU is more than txop limit */
  498. A_UINT32 txop_ovf;
  499. /* Number of Sequences posted */
  500. A_UINT32 seq_posted;
  501. /* Number of Sequences failed queueing */
  502. A_UINT32 seq_failed_queueing;
  503. /* Number of Sequences completed */
  504. A_UINT32 seq_completed;
  505. /* Number of Sequences restarted */
  506. A_UINT32 seq_restarted;
  507. /* Number of MU Sequences posted */
  508. A_UINT32 mu_seq_posted;
  509. /* Number of time HW ring is paused between seq switch within ISR */
  510. A_UINT32 seq_switch_hw_paused;
  511. /* Number of times seq continuation in DSR */
  512. A_UINT32 next_seq_posted_dsr;
  513. /* Number of times seq continuation in ISR */
  514. A_UINT32 seq_posted_isr;
  515. /* Number of seq_ctrl cached. */
  516. A_UINT32 seq_ctrl_cached;
  517. /* Number of MPDUs successfully transmitted */
  518. A_UINT32 mpdu_count_tqm;
  519. /* Number of MSDUs successfully transmitted */
  520. A_UINT32 msdu_count_tqm;
  521. /* Number of MPDUs dropped */
  522. A_UINT32 mpdu_removed_tqm;
  523. /* Number of MSDUs dropped */
  524. A_UINT32 msdu_removed_tqm;
  525. /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT (Reset,channel change) */
  526. A_UINT32 mpdus_sw_flush;
  527. /* Num MPDUs filtered by HW, all filter condition (TTL expired) */
  528. A_UINT32 mpdus_hw_filter;
  529. /* Num MPDUs truncated by PDG (TXOP, TBTT, PPDU_duration based on rate, dyn_bw) */
  530. A_UINT32 mpdus_truncated;
  531. /* Num MPDUs that was tried but didn't receive ACK or BA */
  532. A_UINT32 mpdus_ack_failed;
  533. /* Num MPDUs that was dropped due to expiry (MSDU TTL). */
  534. A_UINT32 mpdus_expired;
  535. /* Num MPDUs that was retried within seq_ctrl (MGMT/LEGACY) */
  536. A_UINT32 mpdus_seq_hw_retry;
  537. /* Num of TQM acked cmds processed */
  538. A_UINT32 ack_tlv_proc;
  539. /* coex_abort_mpdu_cnt valid. */
  540. A_UINT32 coex_abort_mpdu_cnt_valid;
  541. /* coex_abort_mpdu_cnt from TX FES stats. */
  542. A_UINT32 coex_abort_mpdu_cnt;
  543. /* Number of total PPDUs(DATA, MGMT, excludes selfgen) tried over the air (OTA) */
  544. A_UINT32 num_total_ppdus_tried_ota;
  545. /* Number of data PPDUs tried over the air (OTA) */
  546. A_UINT32 num_data_ppdus_tried_ota;
  547. /* Num Local control/mgmt frames (MSDUs) queued */
  548. A_UINT32 local_ctrl_mgmt_enqued;
  549. /* local_ctrl_mgmt_freed:
  550. * Num Local control/mgmt frames (MSDUs) done
  551. * It includes all local ctrl/mgmt completions
  552. * (acked, no ack, flush, TTL, etc)
  553. */
  554. A_UINT32 local_ctrl_mgmt_freed;
  555. /* Num Local data frames (MSDUs) queued */
  556. A_UINT32 local_data_enqued;
  557. /* local_data_freed:
  558. * Num Local data frames (MSDUs) done
  559. * It includes all local data completions
  560. * (acked, no ack, flush, TTL, etc)
  561. */
  562. A_UINT32 local_data_freed;
  563. /* Num MPDUs tried by SW */
  564. A_UINT32 mpdu_tried;
  565. /* Num of waiting seq posted in isr completion handler */
  566. A_UINT32 isr_wait_seq_posted;
  567. A_UINT32 tx_active_dur_us_low;
  568. A_UINT32 tx_active_dur_us_high;
  569. /* Number of MPDUs dropped after max retries */
  570. A_UINT32 remove_mpdus_max_retries;
  571. /* Num HTT cookies dispatched */
  572. A_UINT32 comp_delivered;
  573. /* successful ppdu transmissions */
  574. A_UINT32 ppdu_ok;
  575. /* Scheduler self triggers */
  576. A_UINT32 self_triggers;
  577. /* FES duration of last tx data PPDU in us (sch_eval_end - ppdu_start) */
  578. A_UINT32 tx_time_dur_data;
  579. /* Num of times sequence terminated due to ppdu duration < burst limit */
  580. A_UINT32 seq_qdepth_repost_stop;
  581. /* Num of times MU sequence terminated due to MSDUs reaching threshold */
  582. A_UINT32 mu_seq_min_msdu_repost_stop;
  583. /* Num of times SU sequence terminated due to MSDUs reaching threshold */
  584. A_UINT32 seq_min_msdu_repost_stop;
  585. /* Num of times sequence terminated due to no TXOP available */
  586. A_UINT32 seq_txop_repost_stop;
  587. /* Num of times the next sequence got cancelled */
  588. A_UINT32 next_seq_cancel;
  589. /* Num of times fes offset was misaligned */
  590. A_UINT32 fes_offsets_err_cnt;
  591. } htt_tx_pdev_stats_cmn_tlv;
  592. #define HTT_TX_PDEV_STATS_URRN_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  593. /* NOTE: Variable length TLV, use length spec to infer array size */
  594. typedef struct {
  595. htt_tlv_hdr_t tlv_hdr;
  596. A_UINT32 urrn_stats[1]; /* HTT_TX_PDEV_MAX_URRN_STATS */
  597. } htt_tx_pdev_stats_urrn_tlv_v;
  598. #define HTT_TX_PDEV_STATS_FLUSH_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  599. /* NOTE: Variable length TLV, use length spec to infer array size */
  600. typedef struct {
  601. htt_tlv_hdr_t tlv_hdr;
  602. A_UINT32 flush_errs[1]; /* HTT_TX_PDEV_MAX_FLUSH_REASON_STATS */
  603. } htt_tx_pdev_stats_flush_tlv_v;
  604. #define HTT_TX_PDEV_STATS_SIFS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  605. /* NOTE: Variable length TLV, use length spec to infer array size */
  606. typedef struct {
  607. htt_tlv_hdr_t tlv_hdr;
  608. A_UINT32 sifs_status[1]; /* HTT_TX_PDEV_MAX_SIFS_BURST_STATS */
  609. } htt_tx_pdev_stats_sifs_tlv_v;
  610. #define HTT_TX_PDEV_STATS_PHY_ERR_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  611. /* NOTE: Variable length TLV, use length spec to infer array size */
  612. typedef struct {
  613. htt_tlv_hdr_t tlv_hdr;
  614. A_UINT32 phy_errs[1]; /* HTT_TX_PDEV_MAX_PHY_ERR_STATS */
  615. } htt_tx_pdev_stats_phy_err_tlv_v;
  616. #define HTT_TX_PDEV_STATS_SIFS_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  617. /* NOTE: Variable length TLV, use length spec to infer array size */
  618. typedef struct {
  619. htt_tlv_hdr_t tlv_hdr;
  620. A_UINT32 sifs_hist_status[1]; /* HTT_TX_PDEV_SIFS_BURST_HIST_STATS */
  621. } htt_tx_pdev_stats_sifs_hist_tlv_v;
  622. typedef struct {
  623. htt_tlv_hdr_t tlv_hdr;
  624. A_UINT32 num_data_ppdus_legacy_su;
  625. A_UINT32 num_data_ppdus_ac_su;
  626. A_UINT32 num_data_ppdus_ax_su;
  627. A_UINT32 num_data_ppdus_ac_su_txbf;
  628. A_UINT32 num_data_ppdus_ax_su_txbf;
  629. } htt_tx_pdev_stats_tx_ppdu_stats_tlv_v;
  630. #define HTT_TX_PDEV_STATS_TRIED_MPDU_CNT_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  631. /* NOTE: Variable length TLV, use length spec to infer array size .
  632. *
  633. * Tried_mpdu_cnt_hist is the histogram of MPDUs tries per HWQ.
  634. * The tries here is the count of the MPDUS within a PPDU that the
  635. * HW had attempted to transmit on air, for the HWSCH Schedule
  636. * command submitted by FW.It is not the retry attempts.
  637. * The histogram bins are 0-29, 30-59, 60-89 and so on. The are
  638. * 10 bins in this histogram. They are defined in FW using the
  639. * following macros
  640. * #define WAL_MAX_TRIED_MPDU_CNT_HISTOGRAM 9
  641. * #define WAL_TRIED_MPDU_CNT_HISTOGRAM_INTERVAL 30
  642. *
  643. */
  644. typedef struct {
  645. htt_tlv_hdr_t tlv_hdr;
  646. A_UINT32 hist_bin_size;
  647. A_UINT32 tried_mpdu_cnt_hist[1]; /* HTT_TX_PDEV_TRIED_MPDU_CNT_HIST */
  648. } htt_tx_pdev_stats_tried_mpdu_cnt_hist_tlv_v;
  649. /* STATS_TYPE: HTT_DBG_EXT_STATS_PDEV_TX
  650. * TLV_TAGS:
  651. * - HTT_STATS_TX_PDEV_CMN_TAG
  652. * - HTT_STATS_TX_PDEV_URRN_TAG
  653. * - HTT_STATS_TX_PDEV_SIFS_TAG
  654. * - HTT_STATS_TX_PDEV_FLUSH_TAG
  655. * - HTT_STATS_TX_PDEV_PHY_ERR_TAG
  656. * - HTT_STATS_TX_PDEV_SIFS_HIST_TAG
  657. * - HTT_STATS_TX_PDEV_TX_PPDU_STATS_TAG
  658. * - HTT_STATS_TX_PDEV_TRIED_MPDU_CNT_HIST_TAG
  659. */
  660. /* NOTE:
  661. * This structure is for documentation, and cannot be safely used directly.
  662. * Instead, use the constituent TLV structures to fill/parse.
  663. */
  664. typedef struct _htt_tx_pdev_stats {
  665. htt_tx_pdev_stats_cmn_tlv cmn_tlv;
  666. htt_tx_pdev_stats_urrn_tlv_v underrun_tlv;
  667. htt_tx_pdev_stats_sifs_tlv_v sifs_tlv;
  668. htt_tx_pdev_stats_flush_tlv_v flush_tlv;
  669. htt_tx_pdev_stats_phy_err_tlv_v phy_err_tlv;
  670. htt_tx_pdev_stats_sifs_hist_tlv_v sifs_hist_tlv;
  671. htt_tx_pdev_stats_tx_ppdu_stats_tlv_v tx_su_tlv;
  672. htt_tx_pdev_stats_tried_mpdu_cnt_hist_tlv_v tried_mpdu_cnt_hist_tlv;
  673. } htt_tx_pdev_stats_t;
  674. /* == SOC ERROR STATS == */
  675. /* =============== PDEV ERROR STATS ============== */
  676. #define HTT_STATS_MAX_HW_INTR_NAME_LEN 8
  677. typedef struct {
  678. htt_tlv_hdr_t tlv_hdr;
  679. /* Stored as little endian */
  680. A_UINT8 hw_intr_name[HTT_STATS_MAX_HW_INTR_NAME_LEN];
  681. A_UINT32 mask;
  682. A_UINT32 count;
  683. } htt_hw_stats_intr_misc_tlv;
  684. #define HTT_STATS_MAX_HW_MODULE_NAME_LEN 8
  685. typedef struct {
  686. htt_tlv_hdr_t tlv_hdr;
  687. /* Stored as little endian */
  688. A_UINT8 hw_module_name[HTT_STATS_MAX_HW_MODULE_NAME_LEN];
  689. A_UINT32 count;
  690. } htt_hw_stats_wd_timeout_tlv;
  691. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_M 0x000000ff
  692. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_S 0
  693. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_GET(_var) \
  694. (((_var) & HTT_HW_STATS_PDEV_ERRS_MAC_ID_M) >> \
  695. HTT_HW_STATS_PDEV_ERRS_MAC_ID_S)
  696. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_SET(_var, _val) \
  697. do { \
  698. HTT_CHECK_SET_VAL(HTT_HW_STATS_PDEV_ERRS_MAC_ID, _val); \
  699. ((_var) |= ((_val) << HTT_HW_STATS_PDEV_ERRS_MAC_ID_S)); \
  700. } while (0)
  701. typedef struct {
  702. htt_tlv_hdr_t tlv_hdr;
  703. /* BIT [ 7 : 0] :- mac_id
  704. * BIT [31 : 8] :- reserved
  705. */
  706. A_UINT32 mac_id__word;
  707. A_UINT32 tx_abort;
  708. A_UINT32 tx_abort_fail_count;
  709. A_UINT32 rx_abort;
  710. A_UINT32 rx_abort_fail_count;
  711. A_UINT32 warm_reset;
  712. A_UINT32 cold_reset;
  713. A_UINT32 tx_flush;
  714. A_UINT32 tx_glb_reset;
  715. A_UINT32 tx_txq_reset;
  716. A_UINT32 rx_timeout_reset;
  717. A_UINT32 mac_cold_reset_restore_cal;
  718. A_UINT32 mac_cold_reset;
  719. A_UINT32 mac_warm_reset;
  720. A_UINT32 mac_only_reset;
  721. A_UINT32 phy_warm_reset;
  722. A_UINT32 phy_warm_reset_ucode_trig;
  723. A_UINT32 mac_warm_reset_restore_cal;
  724. A_UINT32 mac_sfm_reset;
  725. A_UINT32 phy_warm_reset_m3_ssr;
  726. A_UINT32 phy_warm_reset_reason_phy_m3;
  727. A_UINT32 phy_warm_reset_reason_tx_hw_stuck;
  728. A_UINT32 phy_warm_reset_reason_num_cca_rx_frame_stuck;
  729. A_UINT32 phy_warm_reset_reason_wal_rx_recovery_rst_rx_busy;
  730. A_UINT32 phy_warm_reset_reason_wal_rx_recovery_rst_mac_hang;
  731. A_UINT32 phy_warm_reset_reason_mac_reset_converted_phy_reset;
  732. A_UINT32 wal_rx_recovery_rst_mac_hang_count;
  733. A_UINT32 wal_rx_recovery_rst_known_sig_count;
  734. A_UINT32 wal_rx_recovery_rst_no_rx_count;
  735. A_UINT32 wal_rx_recovery_rst_no_rx_consecutive_count;
  736. A_UINT32 wal_rx_recovery_rst_rx_busy_count;
  737. A_UINT32 wal_rx_recovery_rst_phy_mac_hang_count;
  738. A_UINT32 rx_flush_cnt; /* Num rx flush issued */
  739. A_UINT32 phy_warm_reset_reason_tx_lifetime_expiry_cca_stuck;
  740. A_UINT32 phy_warm_reset_reason_tx_consecutive_flush9_war;
  741. A_UINT32 phy_warm_reset_reason_tx_hwsch_reset_war;
  742. A_UINT32 phy_warm_reset_reason_hwsch_wdog_or_cca_wdog_war;
  743. A_UINT32 fw_rx_rings_reset;
  744. } htt_hw_stats_pdev_errs_tlv;
  745. typedef struct {
  746. htt_tlv_hdr_t tlv_hdr;
  747. /* BIT [ 7 : 0] :- mac_id
  748. * BIT [31 : 8] :- reserved
  749. */
  750. A_UINT32 mac_id__word;
  751. A_UINT32 last_unpause_ppdu_id;
  752. A_UINT32 hwsch_unpause_wait_tqm_write;
  753. A_UINT32 hwsch_dummy_tlv_skipped;
  754. A_UINT32 hwsch_misaligned_offset_received;
  755. A_UINT32 hwsch_reset_count;
  756. A_UINT32 hwsch_dev_reset_war;
  757. A_UINT32 hwsch_delayed_pause;
  758. A_UINT32 hwsch_long_delayed_pause;
  759. A_UINT32 sch_rx_ppdu_no_response;
  760. A_UINT32 sch_selfgen_response;
  761. A_UINT32 sch_rx_sifs_resp_trigger;
  762. } htt_hw_stats_whal_tx_tlv;
  763. typedef struct {
  764. htt_tlv_hdr_t tlv_hdr;
  765. /* BIT [ 7 : 0] :- mac_id
  766. * BIT [31 : 8] :- reserved
  767. */
  768. union {
  769. struct {
  770. A_UINT32 mac_id: 8,
  771. reserved: 24;
  772. };
  773. A_UINT32 mac_id__word;
  774. };
  775. /*
  776. * hw_wars is a variable-length array, with each element counting
  777. * the number of occurrences of the corresponding type of HW WAR.
  778. * That is, hw_wars[0] indicates how many times HW WAR 0 occurred,
  779. * hw_wars[1] indicates how many times HW WAR 1 occurred, etc.
  780. * The target has an internal HW WAR mapping that it uses to keep
  781. * track of which HW WAR is WAR 0, which HW WAR is WAR 1, etc.
  782. */
  783. A_UINT32 hw_wars[1/*or more*/];
  784. } htt_hw_war_stats_tlv;
  785. /* STATS_TYPE: HTT_DBG_EXT_STATS_PDEV_ERROR
  786. * TLV_TAGS:
  787. * - HTT_STATS_HW_PDEV_ERRS_TAG
  788. * - HTT_STATS_HW_INTR_MISC_TAG (multiple)
  789. * - HTT_STATS_HW_WD_TIMEOUT_TAG (multiple)
  790. * - HTT_STATS_WHAL_TX_TAG
  791. * - HTT_STATS_HW_WAR_TAG
  792. */
  793. /* NOTE:
  794. * This structure is for documentation, and cannot be safely used directly.
  795. * Instead, use the constituent TLV structures to fill/parse.
  796. */
  797. typedef struct _htt_pdev_err_stats {
  798. htt_hw_stats_pdev_errs_tlv pdev_errs;
  799. htt_hw_stats_intr_misc_tlv misc_stats[1];
  800. htt_hw_stats_wd_timeout_tlv wd_timeout[1];
  801. htt_hw_stats_whal_tx_tlv whal_tx_stats;
  802. htt_hw_war_stats_tlv hw_war;
  803. } htt_hw_err_stats_t;
  804. /* ============ PEER STATS ============ */
  805. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_M 0x0000ffff
  806. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_S 0
  807. #define HTT_MSDU_FLOW_STATS_TID_NUM_M 0x000f0000
  808. #define HTT_MSDU_FLOW_STATS_TID_NUM_S 16
  809. #define HTT_MSDU_FLOW_STATS_DROP_M 0x00100000
  810. #define HTT_MSDU_FLOW_STATS_DROP_S 20
  811. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_GET(_var) \
  812. (((_var) & HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_M) >> \
  813. HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_S)
  814. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_SET(_var, _val) \
  815. do { \
  816. HTT_CHECK_SET_VAL(HTT_MSDU_FLOW_STATS_TX_FLOW_NUM, _val); \
  817. ((_var) |= ((_val) << HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_S)); \
  818. } while (0)
  819. #define HTT_MSDU_FLOW_STATS_TID_NUM_GET(_var) \
  820. (((_var) & HTT_MSDU_FLOW_STATS_TID_NUM_M) >> \
  821. HTT_MSDU_FLOW_STATS_TID_NUM_S)
  822. #define HTT_MSDU_FLOW_STATS_TID_NUM_SET(_var, _val) \
  823. do { \
  824. HTT_CHECK_SET_VAL(HTT_MSDU_FLOW_STATS_TID_NUM, _val); \
  825. ((_var) |= ((_val) << HTT_MSDU_FLOW_STATS_TID_NUM_S)); \
  826. } while (0)
  827. #define HTT_MSDU_FLOW_STATS_DROP_GET(_var) \
  828. (((_var) & HTT_MSDU_FLOW_STATS_DROP_M) >> \
  829. HTT_MSDU_FLOW_STATS_DROP_S)
  830. #define HTT_MSDU_FLOW_STATS_DROP_SET(_var, _val) \
  831. do { \
  832. HTT_CHECK_SET_VAL(HTT_MSDU_FLOW_STATS_DROP, _val); \
  833. ((_var) |= ((_val) << HTT_MSDU_FLOW_STATS_DROP_S)); \
  834. } while (0)
  835. typedef struct _htt_msdu_flow_stats_tlv {
  836. htt_tlv_hdr_t tlv_hdr;
  837. A_UINT32 last_update_timestamp;
  838. A_UINT32 last_add_timestamp;
  839. A_UINT32 last_remove_timestamp;
  840. A_UINT32 total_processed_msdu_count;
  841. A_UINT32 cur_msdu_count_in_flowq;
  842. A_UINT32 sw_peer_id; /* This will help to find which peer_id is stuck state */
  843. /* BIT [15 : 0] :- tx_flow_number
  844. * BIT [19 : 16] :- tid_num
  845. * BIT [20 : 20] :- drop_rule
  846. * BIT [31 : 21] :- reserved
  847. */
  848. A_UINT32 tx_flow_no__tid_num__drop_rule;
  849. A_UINT32 last_cycle_enqueue_count;
  850. A_UINT32 last_cycle_dequeue_count;
  851. A_UINT32 last_cycle_drop_count;
  852. /* BIT [15 : 0] :- current_drop_th
  853. * BIT [31 : 16] :- reserved
  854. */
  855. A_UINT32 current_drop_th;
  856. } htt_msdu_flow_stats_tlv;
  857. #define MAX_HTT_TID_NAME 8
  858. /* DWORD sw_peer_id__tid_num */
  859. #define HTT_TX_TID_STATS_SW_PEER_ID_M 0x0000ffff
  860. #define HTT_TX_TID_STATS_SW_PEER_ID_S 0
  861. #define HTT_TX_TID_STATS_TID_NUM_M 0xffff0000
  862. #define HTT_TX_TID_STATS_TID_NUM_S 16
  863. #define HTT_TX_TID_STATS_SW_PEER_ID_GET(_var) \
  864. (((_var) & HTT_TX_TID_STATS_SW_PEER_ID_M) >> \
  865. HTT_TX_TID_STATS_SW_PEER_ID_S)
  866. #define HTT_TX_TID_STATS_SW_PEER_ID_SET(_var, _val) \
  867. do { \
  868. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_SW_PEER_ID, _val); \
  869. ((_var) |= ((_val) << HTT_TX_TID_STATS_SW_PEER_ID_S)); \
  870. } while (0)
  871. #define HTT_TX_TID_STATS_TID_NUM_GET(_var) \
  872. (((_var) & HTT_TX_TID_STATS_TID_NUM_M) >> \
  873. HTT_TX_TID_STATS_TID_NUM_S)
  874. #define HTT_TX_TID_STATS_TID_NUM_SET(_var, _val) \
  875. do { \
  876. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_TID_NUM, _val); \
  877. ((_var) |= ((_val) << HTT_TX_TID_STATS_TID_NUM_S)); \
  878. } while (0)
  879. /* DWORD num_sched_pending__num_ppdu_in_hwq */
  880. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_M 0x000000ff
  881. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_S 0
  882. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_M 0x0000ff00
  883. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S 8
  884. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_GET(_var) \
  885. (((_var) & HTT_TX_TID_STATS_NUM_SCHED_PENDING_M) >> \
  886. HTT_TX_TID_STATS_NUM_SCHED_PENDING_S)
  887. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_SET(_var, _val) \
  888. do { \
  889. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_NUM_SCHED_PENDING, _val); \
  890. ((_var) |= ((_val) << HTT_TX_TID_STATS_NUM_SCHED_PENDING_S)); \
  891. } while (0)
  892. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_GET(_var) \
  893. (((_var) & HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_M) >> \
  894. HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S)
  895. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_SET(_var, _val) \
  896. do { \
  897. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ, _val); \
  898. ((_var) |= ((_val) << HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S)); \
  899. } while (0)
  900. /* Tidq stats */
  901. typedef struct _htt_tx_tid_stats_tlv {
  902. htt_tlv_hdr_t tlv_hdr;
  903. /* Stored as little endian */
  904. A_UINT8 tid_name[MAX_HTT_TID_NAME];
  905. /* BIT [15 : 0] :- sw_peer_id
  906. * BIT [31 : 16] :- tid_num
  907. */
  908. A_UINT32 sw_peer_id__tid_num;
  909. /* BIT [ 7 : 0] :- num_sched_pending
  910. * BIT [15 : 8] :- num_ppdu_in_hwq
  911. * BIT [31 : 16] :- reserved
  912. */
  913. A_UINT32 num_sched_pending__num_ppdu_in_hwq;
  914. A_UINT32 tid_flags;
  915. /* per tid # of hw_queued ppdu.*/
  916. A_UINT32 hw_queued;
  917. /* number of per tid successful PPDU. */
  918. A_UINT32 hw_reaped;
  919. /* per tid Num MPDUs filtered by HW */
  920. A_UINT32 mpdus_hw_filter;
  921. A_UINT32 qdepth_bytes;
  922. A_UINT32 qdepth_num_msdu;
  923. A_UINT32 qdepth_num_mpdu;
  924. A_UINT32 last_scheduled_tsmp;
  925. A_UINT32 pause_module_id;
  926. A_UINT32 block_module_id;
  927. /* tid tx airtime in sec */
  928. A_UINT32 tid_tx_airtime;
  929. } htt_tx_tid_stats_tlv;
  930. /* Tidq stats */
  931. typedef struct _htt_tx_tid_stats_v1_tlv {
  932. htt_tlv_hdr_t tlv_hdr;
  933. /* Stored as little endian */
  934. A_UINT8 tid_name[MAX_HTT_TID_NAME];
  935. /* BIT [15 : 0] :- sw_peer_id
  936. * BIT [31 : 16] :- tid_num
  937. */
  938. A_UINT32 sw_peer_id__tid_num;
  939. /* BIT [ 7 : 0] :- num_sched_pending
  940. * BIT [15 : 8] :- num_ppdu_in_hwq
  941. * BIT [31 : 16] :- reserved
  942. */
  943. A_UINT32 num_sched_pending__num_ppdu_in_hwq;
  944. A_UINT32 tid_flags;
  945. /* Max qdepth in bytes reached by this tid*/
  946. A_UINT32 max_qdepth_bytes;
  947. /* number of msdus qdepth reached max */
  948. A_UINT32 max_qdepth_n_msdus;
  949. /* Made reserved this field */
  950. A_UINT32 rsvd;
  951. A_UINT32 qdepth_bytes;
  952. A_UINT32 qdepth_num_msdu;
  953. A_UINT32 qdepth_num_mpdu;
  954. A_UINT32 last_scheduled_tsmp;
  955. A_UINT32 pause_module_id;
  956. A_UINT32 block_module_id;
  957. /* tid tx airtime in sec */
  958. A_UINT32 tid_tx_airtime;
  959. A_UINT32 allow_n_flags;
  960. /* BIT [15 : 0] :- sendn_frms_allowed
  961. * BIT [31 : 16] :- reserved
  962. */
  963. A_UINT32 sendn_frms_allowed;
  964. } htt_tx_tid_stats_v1_tlv;
  965. #define HTT_RX_TID_STATS_SW_PEER_ID_M 0x0000ffff
  966. #define HTT_RX_TID_STATS_SW_PEER_ID_S 0
  967. #define HTT_RX_TID_STATS_TID_NUM_M 0xffff0000
  968. #define HTT_RX_TID_STATS_TID_NUM_S 16
  969. #define HTT_RX_TID_STATS_SW_PEER_ID_GET(_var) \
  970. (((_var) & HTT_RX_TID_STATS_SW_PEER_ID_M) >> \
  971. HTT_RX_TID_STATS_SW_PEER_ID_S)
  972. #define HTT_RX_TID_STATS_SW_PEER_ID_SET(_var, _val) \
  973. do { \
  974. HTT_CHECK_SET_VAL(HTT_RX_TID_STATS_SW_PEER_ID, _val); \
  975. ((_var) |= ((_val) << HTT_RX_TID_STATS_SW_PEER_ID_S)); \
  976. } while (0)
  977. #define HTT_RX_TID_STATS_TID_NUM_GET(_var) \
  978. (((_var) & HTT_RX_TID_STATS_TID_NUM_M) >> \
  979. HTT_RX_TID_STATS_TID_NUM_S)
  980. #define HTT_RX_TID_STATS_TID_NUM_SET(_var, _val) \
  981. do { \
  982. HTT_CHECK_SET_VAL(HTT_RX_TID_STATS_TID_NUM, _val); \
  983. ((_var) |= ((_val) << HTT_RX_TID_STATS_TID_NUM_S)); \
  984. } while (0)
  985. typedef struct _htt_rx_tid_stats_tlv {
  986. htt_tlv_hdr_t tlv_hdr;
  987. /* BIT [15 : 0] : sw_peer_id
  988. * BIT [31 : 16] : tid_num
  989. */
  990. A_UINT32 sw_peer_id__tid_num;
  991. /* Stored as little endian */
  992. A_UINT8 tid_name[MAX_HTT_TID_NAME];
  993. /* dup_in_reorder not collected per tid for now,
  994. as there is no wal_peer back ptr in data rx peer. */
  995. A_UINT32 dup_in_reorder;
  996. A_UINT32 dup_past_outside_window;
  997. A_UINT32 dup_past_within_window;
  998. /* Number of per tid MSDUs with flag of decrypt_err */
  999. A_UINT32 rxdesc_err_decrypt;
  1000. /* tid rx airtime in sec */
  1001. A_UINT32 tid_rx_airtime;
  1002. } htt_rx_tid_stats_tlv;
  1003. #define HTT_MAX_COUNTER_NAME 8
  1004. typedef struct {
  1005. htt_tlv_hdr_t tlv_hdr;
  1006. /* Stored as little endian */
  1007. A_UINT8 counter_name[HTT_MAX_COUNTER_NAME];
  1008. A_UINT32 count;
  1009. } htt_counter_tlv;
  1010. typedef struct {
  1011. htt_tlv_hdr_t tlv_hdr;
  1012. /* Number of rx ppdu. */
  1013. A_UINT32 ppdu_cnt;
  1014. /* Number of rx mpdu. */
  1015. A_UINT32 mpdu_cnt;
  1016. /* Number of rx msdu */
  1017. A_UINT32 msdu_cnt;
  1018. /* Pause bitmap */
  1019. A_UINT32 pause_bitmap;
  1020. /* Block bitmap */
  1021. A_UINT32 block_bitmap;
  1022. /* Current timestamp */
  1023. A_UINT32 current_timestamp;
  1024. /* Peer cumulative tx airtime in sec */
  1025. A_UINT32 peer_tx_airtime;
  1026. /* Peer cumulative rx airtime in sec */
  1027. A_UINT32 peer_rx_airtime;
  1028. /* Peer current rssi in dBm */
  1029. A_INT32 rssi;
  1030. /* Total enqueued, dequeued and dropped msdu's for peer */
  1031. A_UINT32 peer_enqueued_count_low;
  1032. A_UINT32 peer_enqueued_count_high;
  1033. A_UINT32 peer_dequeued_count_low;
  1034. A_UINT32 peer_dequeued_count_high;
  1035. A_UINT32 peer_dropped_count_low;
  1036. A_UINT32 peer_dropped_count_high;
  1037. /* Total ppdu transmitted bytes for peer: includes MAC header overhead */
  1038. A_UINT32 ppdu_transmitted_bytes_low;
  1039. A_UINT32 ppdu_transmitted_bytes_high;
  1040. A_UINT32 peer_ttl_removed_count;
  1041. /* inactive_time
  1042. * Running duration of the time since last tx/rx activity by this peer,
  1043. * units = seconds.
  1044. * If the peer is currently active, this inactive_time will be 0x0.
  1045. */
  1046. A_UINT32 inactive_time;
  1047. /* Number of MPDUs dropped after max retries */
  1048. A_UINT32 remove_mpdus_max_retries;
  1049. } htt_peer_stats_cmn_tlv;
  1050. typedef struct {
  1051. htt_tlv_hdr_t tlv_hdr;
  1052. /* This enum type of HTT_PEER_TYPE */
  1053. A_UINT32 peer_type;
  1054. A_UINT32 sw_peer_id;
  1055. /* BIT [7 : 0] :- vdev_id
  1056. * BIT [15 : 8] :- pdev_id
  1057. * BIT [31 : 16] :- ast_indx
  1058. */
  1059. A_UINT32 vdev_pdev_ast_idx;
  1060. htt_mac_addr mac_addr;
  1061. A_UINT32 peer_flags;
  1062. A_UINT32 qpeer_flags;
  1063. } htt_peer_details_tlv;
  1064. typedef enum {
  1065. HTT_STATS_PREAM_OFDM,
  1066. HTT_STATS_PREAM_CCK,
  1067. HTT_STATS_PREAM_HT,
  1068. HTT_STATS_PREAM_VHT,
  1069. HTT_STATS_PREAM_HE,
  1070. HTT_STATS_PREAM_RSVD,
  1071. HTT_STATS_PREAM_RSVD1,
  1072. HTT_STATS_PREAM_COUNT,
  1073. } HTT_STATS_PREAM_TYPE;
  1074. #define HTT_TX_PEER_STATS_NUM_MCS_COUNTERS 12
  1075. #define HTT_TX_PEER_STATS_NUM_GI_COUNTERS 4
  1076. #define HTT_TX_PEER_STATS_NUM_DCM_COUNTERS 5
  1077. #define HTT_TX_PEER_STATS_NUM_BW_COUNTERS 4
  1078. #define HTT_TX_PEER_STATS_NUM_SPATIAL_STREAMS 8
  1079. #define HTT_TX_PEER_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  1080. typedef struct _htt_tx_peer_rate_stats_tlv {
  1081. htt_tlv_hdr_t tlv_hdr;
  1082. /* Number of tx ldpc packets */
  1083. A_UINT32 tx_ldpc;
  1084. /* Number of tx rts packets */
  1085. A_UINT32 rts_cnt;
  1086. /* RSSI value of last ack packet (units = dB above noise floor) */
  1087. A_UINT32 ack_rssi;
  1088. A_UINT32 tx_mcs[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1089. A_UINT32 tx_su_mcs[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1090. A_UINT32 tx_mu_mcs[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1091. A_UINT32 tx_nss[HTT_TX_PEER_STATS_NUM_SPATIAL_STREAMS]; /* element 0,1, ...7 -> NSS 1,2, ...8 */
  1092. A_UINT32 tx_bw[HTT_TX_PEER_STATS_NUM_BW_COUNTERS]; /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
  1093. A_UINT32 tx_stbc[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1094. A_UINT32 tx_pream[HTT_TX_PEER_STATS_NUM_PREAMBLE_TYPES];
  1095. /* Counters to track number of tx packets in each GI (400us, 800us, 1600us & 3200us) in each mcs (0-11) */
  1096. A_UINT32 tx_gi[HTT_TX_PEER_STATS_NUM_GI_COUNTERS][HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1097. /* Counters to track packets in dcm mcs (MCS 0, 1, 3, 4) */
  1098. A_UINT32 tx_dcm[HTT_TX_PEER_STATS_NUM_DCM_COUNTERS];
  1099. } htt_tx_peer_rate_stats_tlv;
  1100. #define HTT_RX_PEER_STATS_NUM_MCS_COUNTERS 12
  1101. #define HTT_RX_PEER_STATS_NUM_GI_COUNTERS 4
  1102. #define HTT_RX_PEER_STATS_NUM_DCM_COUNTERS 5
  1103. #define HTT_RX_PEER_STATS_NUM_BW_COUNTERS 4
  1104. #define HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS 8
  1105. #define HTT_RX_PEER_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  1106. typedef struct _htt_rx_peer_rate_stats_tlv {
  1107. htt_tlv_hdr_t tlv_hdr;
  1108. A_UINT32 nsts;
  1109. /* Number of rx ldpc packets */
  1110. A_UINT32 rx_ldpc;
  1111. /* Number of rx rts packets */
  1112. A_UINT32 rts_cnt;
  1113. A_UINT32 rssi_mgmt; /* units = dB above noise floor */
  1114. A_UINT32 rssi_data; /* units = dB above noise floor */
  1115. A_UINT32 rssi_comb; /* units = dB above noise floor */
  1116. A_UINT32 rx_mcs[HTT_RX_PEER_STATS_NUM_MCS_COUNTERS];
  1117. A_UINT32 rx_nss[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS]; /* element 0,1, ...7 -> NSS 1,2, ...8 */
  1118. A_UINT32 rx_dcm[HTT_RX_PEER_STATS_NUM_DCM_COUNTERS];
  1119. A_UINT32 rx_stbc[HTT_RX_PEER_STATS_NUM_MCS_COUNTERS];
  1120. A_UINT32 rx_bw[HTT_RX_PEER_STATS_NUM_BW_COUNTERS]; /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
  1121. A_UINT32 rx_pream[HTT_RX_PEER_STATS_NUM_PREAMBLE_TYPES];
  1122. A_UINT8 rssi_chain[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PEER_STATS_NUM_BW_COUNTERS]; /* units = dB above noise floor */
  1123. /* Counters to track number of rx packets in each GI in each mcs (0-11) */
  1124. A_UINT32 rx_gi[HTT_RX_PEER_STATS_NUM_GI_COUNTERS][HTT_RX_PEER_STATS_NUM_MCS_COUNTERS];
  1125. A_UINT32 rx_ulofdma_non_data_ppdu; /* ppdu level */
  1126. A_UINT32 rx_ulofdma_data_ppdu; /* ppdu level */
  1127. A_UINT32 rx_ulofdma_mpdu_ok; /* mpdu level */
  1128. A_UINT32 rx_ulofdma_mpdu_fail; /* mpdu level */
  1129. A_INT8 rx_ul_fd_rssi[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS]; /* dBm unit */
  1130. /* per_chain_rssi_pkt_type:
  1131. * This field shows what type of rx frame the per-chain RSSI was computed
  1132. * on, by recording the frame type and sub-type as bit-fields within this
  1133. * field:
  1134. * BIT [3 : 0] :- IEEE80211_FC0_TYPE
  1135. * BIT [7 : 4] :- IEEE80211_FC0_SUBTYPE
  1136. * BIT [31 : 8] :- Reserved
  1137. */
  1138. A_UINT32 per_chain_rssi_pkt_type;
  1139. A_INT8 rx_per_chain_rssi_in_dbm[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PEER_STATS_NUM_BW_COUNTERS];
  1140. A_UINT32 rx_ulmumimo_non_data_ppdu; /* ppdu level */
  1141. A_UINT32 rx_ulmumimo_data_ppdu; /* ppdu level */
  1142. A_UINT32 rx_ulmumimo_mpdu_ok; /* mpdu level */
  1143. A_UINT32 rx_ulmumimo_mpdu_fail; /* mpdu level */
  1144. } htt_rx_peer_rate_stats_tlv;
  1145. typedef enum {
  1146. HTT_PEER_STATS_REQ_MODE_NO_QUERY,
  1147. HTT_PEER_STATS_REQ_MODE_QUERY_TQM,
  1148. HTT_PEER_STATS_REQ_MODE_FLUSH_TQM,
  1149. } htt_peer_stats_req_mode_t;
  1150. typedef enum {
  1151. HTT_PEER_STATS_CMN_TLV = 0,
  1152. HTT_PEER_DETAILS_TLV = 1,
  1153. HTT_TX_PEER_RATE_STATS_TLV = 2,
  1154. HTT_RX_PEER_RATE_STATS_TLV = 3,
  1155. HTT_TX_TID_STATS_TLV = 4,
  1156. HTT_RX_TID_STATS_TLV = 5,
  1157. HTT_MSDU_FLOW_STATS_TLV = 6,
  1158. HTT_PEER_STATS_MAX_TLV = 31,
  1159. } htt_peer_stats_tlv_enum;
  1160. /* config_param0 */
  1161. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_M 0x00000001
  1162. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_S 0
  1163. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_M 0x0000FFFE
  1164. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_S 1
  1165. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_M 0xFFFF0000
  1166. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_S 16
  1167. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(_var, _val) \
  1168. do { \
  1169. HTT_CHECK_SET_VAL(HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR, _val); \
  1170. ((_var) |= ((_val) << HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_S)); \
  1171. } while (0)
  1172. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_GET(_var) \
  1173. (((_var) & HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_M) >> \
  1174. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_S)
  1175. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_GET(_var) \
  1176. (((_var) & HTT_DBG_EXT_STATS_PEER_REQ_MODE_M) >> \
  1177. HTT_DBG_EXT_STATS_PEER_REQ_MODE_S)
  1178. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_SET(_var, _val) \
  1179. do { \
  1180. ((_var) |= ((_val) << HTT_DBG_EXT_STATS_PEER_REQ_MODE_S)); \
  1181. } while (0)
  1182. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_GET(_var) \
  1183. (((_var) & HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_M) >> \
  1184. HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_S)
  1185. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_SET(_var, _val) \
  1186. do { \
  1187. ((_var) |= ((_val) << HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_S)); \
  1188. } while (0)
  1189. /* STATS_TYPE : HTT_DBG_EXT_STATS_PEER_INFO
  1190. * TLV_TAGS:
  1191. * - HTT_STATS_PEER_STATS_CMN_TAG
  1192. * - HTT_STATS_PEER_DETAILS_TAG
  1193. * - HTT_STATS_PEER_TX_RATE_STATS_TAG
  1194. * - HTT_STATS_PEER_RX_RATE_STATS_TAG
  1195. * - HTT_STATS_TX_TID_DETAILS_TAG (multiple) (deprecated, so 0 elements in updated systems)
  1196. * - HTT_STATS_RX_TID_DETAILS_TAG (multiple)
  1197. * - HTT_STATS_PEER_MSDU_FLOWQ_TAG (multiple)
  1198. * - HTT_STATS_TX_TID_DETAILS_V1_TAG (multiple)
  1199. */
  1200. /* NOTE:
  1201. * This structure is for documentation, and cannot be safely used directly.
  1202. * Instead, use the constituent TLV structures to fill/parse.
  1203. */
  1204. typedef struct _htt_peer_stats {
  1205. htt_peer_stats_cmn_tlv cmn_tlv;
  1206. htt_peer_details_tlv peer_details;
  1207. /* from g_rate_info_stats */
  1208. htt_tx_peer_rate_stats_tlv tx_rate;
  1209. htt_rx_peer_rate_stats_tlv rx_rate;
  1210. htt_tx_tid_stats_tlv tx_tid_stats[1];
  1211. htt_rx_tid_stats_tlv rx_tid_stats[1];
  1212. htt_msdu_flow_stats_tlv msdu_flowq[1];
  1213. htt_tx_tid_stats_v1_tlv tx_tid_stats_v1[1];
  1214. } htt_peer_stats_t;
  1215. /* =========== ACTIVE PEER LIST ========== */
  1216. /* STATS_TYPE: HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST
  1217. * TLV_TAGS:
  1218. * - HTT_STATS_PEER_DETAILS_TAG
  1219. */
  1220. /* NOTE:
  1221. * This structure is for documentation, and cannot be safely used directly.
  1222. * Instead, use the constituent TLV structures to fill/parse.
  1223. */
  1224. typedef struct {
  1225. htt_peer_details_tlv peer_details[1];
  1226. } htt_active_peer_details_list_t;
  1227. /* =========== MUMIMO HWQ stats =========== */
  1228. /* MU MIMO stats per hwQ */
  1229. typedef struct {
  1230. htt_tlv_hdr_t tlv_hdr;
  1231. A_UINT32 mu_mimo_sch_posted;
  1232. A_UINT32 mu_mimo_sch_failed;
  1233. A_UINT32 mu_mimo_ppdu_posted;
  1234. } htt_tx_hwq_mu_mimo_sch_stats_tlv;
  1235. typedef struct {
  1236. htt_tlv_hdr_t tlv_hdr;
  1237. A_UINT32 mu_mimo_mpdus_queued_usr; /* Number of mpdus queued per user */
  1238. A_UINT32 mu_mimo_mpdus_tried_usr; /* Number of mpdus actually transmitted by TxPCU per user */
  1239. A_UINT32 mu_mimo_mpdus_failed_usr; /* Number of mpdus failed per user */
  1240. A_UINT32 mu_mimo_mpdus_requeued_usr; /* Number of mpdus requeued per user */
  1241. A_UINT32 mu_mimo_err_no_ba_usr; /* Number of times BA is not received for a user in MU PPDU */
  1242. A_UINT32 mu_mimo_mpdu_underrun_usr;
  1243. A_UINT32 mu_mimo_ampdu_underrun_usr;
  1244. } htt_tx_hwq_mu_mimo_mpdu_stats_tlv;
  1245. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_M 0x000000ff
  1246. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_S 0
  1247. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_M 0x0000ff00
  1248. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_S 8
  1249. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_GET(_var) \
  1250. (((_var) & HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_M) >> \
  1251. HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_S)
  1252. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_SET(_var, _val) \
  1253. do { \
  1254. HTT_CHECK_SET_VAL(HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID, _val); \
  1255. ((_var) |= ((_val) << HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_S)); \
  1256. } while (0)
  1257. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_GET(_var) \
  1258. (((_var) & HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_M) >> \
  1259. HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_S)
  1260. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_SET(_var, _val) \
  1261. do { \
  1262. HTT_CHECK_SET_VAL(HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID, _val); \
  1263. ((_var) |= ((_val) << HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_S)); \
  1264. } while (0)
  1265. typedef struct {
  1266. htt_tlv_hdr_t tlv_hdr;
  1267. /* BIT [ 7 : 0] :- mac_id
  1268. * BIT [15 : 8] :- hwq_id
  1269. * BIT [31 : 16] :- reserved
  1270. */
  1271. A_UINT32 mac_id__hwq_id__word;
  1272. } htt_tx_hwq_mu_mimo_cmn_stats_tlv;
  1273. /* NOTE:
  1274. * This structure is for documentation, and cannot be safely used directly.
  1275. * Instead, use the constituent TLV structures to fill/parse.
  1276. */
  1277. typedef struct {
  1278. struct _hwq_mu_mimo_stats {
  1279. htt_tx_hwq_mu_mimo_cmn_stats_tlv cmn_tlv;
  1280. htt_tx_hwq_mu_mimo_sch_stats_tlv mu_mimo_sch_stats_tlv[1]; /* WAL_TX_STATS_MAX_GROUP_SIZE */
  1281. htt_tx_hwq_mu_mimo_mpdu_stats_tlv mu_mimo_mpdu_stats_tlv[1]; /* WAL_TX_STATS_TX_MAX_NUM_USERS */
  1282. } hwq[1];
  1283. } htt_tx_hwq_mu_mimo_stats_t;
  1284. /* == TX HWQ STATS == */
  1285. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_M 0x000000ff
  1286. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_S 0
  1287. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_M 0x0000ff00
  1288. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_S 8
  1289. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_GET(_var) \
  1290. (((_var) & HTT_TX_HWQ_STATS_CMN_MAC_ID_M) >> \
  1291. HTT_TX_HWQ_STATS_CMN_MAC_ID_S)
  1292. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_SET(_var, _val) \
  1293. do { \
  1294. HTT_CHECK_SET_VAL(HTT_TX_HWQ_STATS_CMN_MAC_ID, _val); \
  1295. ((_var) |= ((_val) << HTT_TX_HWQ_STATS_CMN_MAC_ID_S)); \
  1296. } while (0)
  1297. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_GET(_var) \
  1298. (((_var) & HTT_TX_HWQ_STATS_CMN_HWQ_ID_M) >> \
  1299. HTT_TX_HWQ_STATS_CMN_HWQ_ID_S)
  1300. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_SET(_var, _val) \
  1301. do { \
  1302. HTT_CHECK_SET_VAL(HTT_TX_HWQ_STATS_CMN_HWQ_ID, _val); \
  1303. ((_var) |= ((_val) << HTT_TX_HWQ_STATS_CMN_HWQ_ID_S)); \
  1304. } while (0)
  1305. typedef struct {
  1306. htt_tlv_hdr_t tlv_hdr;
  1307. /* BIT [ 7 : 0] :- mac_id
  1308. * BIT [15 : 8] :- hwq_id
  1309. * BIT [31 : 16] :- reserved
  1310. */
  1311. A_UINT32 mac_id__hwq_id__word;
  1312. /* PPDU level stats */
  1313. A_UINT32 xretry; /* Number of times ack is failed for the PPDU scheduled on this txQ */
  1314. A_UINT32 underrun_cnt; /* Number of times sched cmd status reported mpdu underrun */
  1315. A_UINT32 flush_cnt; /* Number of times sched cmd is flushed */
  1316. A_UINT32 filt_cnt; /* Number of times sched cmd is filtered */
  1317. A_UINT32 null_mpdu_bmap; /* Number of times HWSCH uploaded null mpdu bitmap */
  1318. A_UINT32 user_ack_failure; /* Number of time user ack or ba tlv is not seen on FES ring where it is expected to be */
  1319. A_UINT32 ack_tlv_proc; /* Number of times TQM processed ack tlv received from HWSCH */
  1320. A_UINT32 sched_id_proc; /* Cache latest processed scheduler ID received from ack ba tlv */
  1321. A_UINT32 null_mpdu_tx_count; /* Number of times TxPCU reported mpdus transmitted for a user is zero */
  1322. A_UINT32 mpdu_bmap_not_recvd; /* Number of times SW did not see any mpdu info bitmap tlv on FES status ring */
  1323. /* Selfgen stats per hwQ */
  1324. A_UINT32 num_bar; /* Number of SU/MU BAR frames posted to hwQ */
  1325. A_UINT32 rts; /* Number of RTS frames posted to hwQ */
  1326. A_UINT32 cts2self; /* Number of cts2self frames posted to hwQ */
  1327. A_UINT32 qos_null; /* Number of qos null frames posted to hwQ */
  1328. /* MPDU level stats */
  1329. A_UINT32 mpdu_tried_cnt; /* mpdus tried Tx by HWSCH/TQM */
  1330. A_UINT32 mpdu_queued_cnt; /* mpdus queued to HWSCH */
  1331. A_UINT32 mpdu_ack_fail_cnt; /* mpdus tried but ack was not received */
  1332. A_UINT32 mpdu_filt_cnt; /* This will include sched cmd flush and time based discard */
  1333. A_UINT32 false_mpdu_ack_count; /* Number of MPDUs for which ACK was sucessful but no Tx happened */
  1334. A_UINT32 txq_timeout; /* Number of times txq timeout happened */
  1335. } htt_tx_hwq_stats_cmn_tlv;
  1336. #define HTT_TX_HWQ_DIFS_LATENCY_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) + /* hist_intvl */ \
  1337. (sizeof(A_UINT32) * (_num_elems)))
  1338. /* NOTE: Variable length TLV, use length spec to infer array size */
  1339. typedef struct {
  1340. htt_tlv_hdr_t tlv_hdr;
  1341. A_UINT32 hist_intvl;
  1342. /* histogram of ppdu post to hwsch - > cmd status received */
  1343. A_UINT32 difs_latency_hist[1]; /* HTT_TX_HWQ_MAX_DIFS_LATENCY_BINS */
  1344. } htt_tx_hwq_difs_latency_stats_tlv_v;
  1345. #define HTT_TX_HWQ_CMD_RESULT_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1346. /* NOTE: Variable length TLV, use length spec to infer array size */
  1347. typedef struct {
  1348. htt_tlv_hdr_t tlv_hdr;
  1349. /* Histogram of sched cmd result */
  1350. A_UINT32 cmd_result[1]; /* HTT_TX_HWQ_MAX_CMD_RESULT_STATS */
  1351. } htt_tx_hwq_cmd_result_stats_tlv_v;
  1352. #define HTT_TX_HWQ_CMD_STALL_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1353. /* NOTE: Variable length TLV, use length spec to infer array size */
  1354. typedef struct {
  1355. htt_tlv_hdr_t tlv_hdr;
  1356. /* Histogram of various pause conitions */
  1357. A_UINT32 cmd_stall_status[1]; /* HTT_TX_HWQ_MAX_CMD_STALL_STATS */
  1358. } htt_tx_hwq_cmd_stall_stats_tlv_v;
  1359. #define HTT_TX_HWQ_FES_RESULT_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1360. /* NOTE: Variable length TLV, use length spec to infer array size */
  1361. typedef struct {
  1362. htt_tlv_hdr_t tlv_hdr;
  1363. /* Histogram of number of user fes result */
  1364. A_UINT32 fes_result[1]; /* HTT_TX_HWQ_MAX_FES_RESULT_STATS */
  1365. } htt_tx_hwq_fes_result_stats_tlv_v;
  1366. #define HTT_TX_HWQ_TRIED_MPDU_CNT_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1367. /* NOTE: Variable length TLV, use length spec to infer array size
  1368. *
  1369. * The hwq_tried_mpdu_cnt_hist is a histogram of MPDUs tries per HWQ.
  1370. * The tries here is the count of the MPDUS within a PPDU that the HW
  1371. * had attempted to transmit on air, for the HWSCH Schedule command
  1372. * submitted by FW in this HWQ .It is not the retry attempts. The
  1373. * histogram bins are 0-29, 30-59, 60-89 and so on. The are 10 bins
  1374. * in this histogram.
  1375. * they are defined in FW using the following macros
  1376. * #define WAL_MAX_TRIED_MPDU_CNT_HISTOGRAM 9
  1377. * #define WAL_TRIED_MPDU_CNT_HISTOGRAM_INTERVAL 30
  1378. *
  1379. * */
  1380. typedef struct {
  1381. htt_tlv_hdr_t tlv_hdr;
  1382. A_UINT32 hist_bin_size;
  1383. /* Histogram of number of mpdus on tried mpdu */
  1384. A_UINT32 tried_mpdu_cnt_hist[1]; /* HTT_TX_HWQ_TRIED_MPDU_CNT_HIST */
  1385. } htt_tx_hwq_tried_mpdu_cnt_hist_tlv_v;
  1386. #define HTT_TX_HWQ_TXOP_USED_CNT_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1387. /* NOTE: Variable length TLV, use length spec to infer array size
  1388. *
  1389. * The txop_used_cnt_hist is the histogram of txop per burst. After
  1390. * completing the burst, we identify the txop used in the burst and
  1391. * incr the corresponding bin.
  1392. * Each bin represents 1ms & we have 10 bins in this histogram.
  1393. * they are deined in FW using the following macros
  1394. * #define WAL_MAX_TXOP_USED_CNT_HISTOGRAM 10
  1395. * #define WAL_TXOP_USED_HISTOGRAM_INTERVAL 1000 ( 1 ms )
  1396. *
  1397. * */
  1398. typedef struct {
  1399. htt_tlv_hdr_t tlv_hdr;
  1400. /* Histogram of txop used cnt */
  1401. A_UINT32 txop_used_cnt_hist[1]; /* HTT_TX_HWQ_TXOP_USED_CNT_HIST */
  1402. } htt_tx_hwq_txop_used_cnt_hist_tlv_v;
  1403. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_HWQ
  1404. * TLV_TAGS:
  1405. * - HTT_STATS_STRING_TAG
  1406. * - HTT_STATS_TX_HWQ_CMN_TAG
  1407. * - HTT_STATS_TX_HWQ_DIFS_LATENCY_TAG
  1408. * - HTT_STATS_TX_HWQ_CMD_RESULT_TAG
  1409. * - HTT_STATS_TX_HWQ_CMD_STALL_TAG
  1410. * - HTT_STATS_TX_HWQ_FES_STATUS_TAG
  1411. * - HTT_STATS_TX_HWQ_TRIED_MPDU_CNT_HIST_TAG
  1412. * - HTT_STATS_TX_HWQ_TXOP_USED_CNT_HIST_TAG
  1413. */
  1414. /* NOTE:
  1415. * This structure is for documentation, and cannot be safely used directly.
  1416. * Instead, use the constituent TLV structures to fill/parse.
  1417. * General HWQ stats Mechanism:
  1418. * Once the host request for the stats, FW fill all the HWQ TAGS in a buffer
  1419. * for all the HWQ requested. & the FW send the buffer to host. In the
  1420. * buffer the HWQ ID is filled in mac_id__hwq_id, thus identifying each
  1421. * HWQ distinctly.
  1422. */
  1423. typedef struct _htt_tx_hwq_stats {
  1424. htt_stats_string_tlv hwq_str_tlv;
  1425. htt_tx_hwq_stats_cmn_tlv cmn_tlv;
  1426. htt_tx_hwq_difs_latency_stats_tlv_v difs_tlv;
  1427. htt_tx_hwq_cmd_result_stats_tlv_v cmd_result_tlv;
  1428. htt_tx_hwq_cmd_stall_stats_tlv_v cmd_stall_tlv;
  1429. htt_tx_hwq_fes_result_stats_tlv_v fes_stats_tlv;
  1430. htt_tx_hwq_tried_mpdu_cnt_hist_tlv_v tried_mpdu_tlv;
  1431. htt_tx_hwq_txop_used_cnt_hist_tlv_v txop_used_tlv;
  1432. } htt_tx_hwq_stats_t;
  1433. /* == TX SELFGEN STATS == */
  1434. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_M 0x000000ff
  1435. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_S 0
  1436. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_GET(_var) \
  1437. (((_var) & HTT_TX_SELFGEN_CMN_STATS_MAC_ID_M) >> \
  1438. HTT_TX_SELFGEN_CMN_STATS_MAC_ID_S)
  1439. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_SET(_var, _val) \
  1440. do { \
  1441. HTT_CHECK_SET_VAL(HTT_TX_SELFGEN_CMN_STATS_MAC_ID, _val); \
  1442. ((_var) |= ((_val) << HTT_TX_SELFGEN_CMN_STATS_MAC_ID_S)); \
  1443. } while (0)
  1444. typedef struct {
  1445. htt_tlv_hdr_t tlv_hdr;
  1446. /* BIT [ 7 : 0] :- mac_id
  1447. * BIT [31 : 8] :- reserved
  1448. */
  1449. A_UINT32 mac_id__word;
  1450. A_UINT32 su_bar;
  1451. A_UINT32 rts;
  1452. A_UINT32 cts2self;
  1453. A_UINT32 qos_null;
  1454. A_UINT32 delayed_bar_1; /* MU user 1 */
  1455. A_UINT32 delayed_bar_2; /* MU user 2 */
  1456. A_UINT32 delayed_bar_3; /* MU user 3 */
  1457. A_UINT32 delayed_bar_4; /* MU user 4 */
  1458. A_UINT32 delayed_bar_5; /* MU user 5 */
  1459. A_UINT32 delayed_bar_6; /* MU user 6 */
  1460. A_UINT32 delayed_bar_7; /* MU user 7 */
  1461. } htt_tx_selfgen_cmn_stats_tlv;
  1462. typedef struct {
  1463. htt_tlv_hdr_t tlv_hdr;
  1464. /* 11AC */
  1465. A_UINT32 ac_su_ndpa;
  1466. A_UINT32 ac_su_ndp;
  1467. A_UINT32 ac_mu_mimo_ndpa;
  1468. A_UINT32 ac_mu_mimo_ndp;
  1469. A_UINT32 ac_mu_mimo_brpoll_1; /* MU user 1 */
  1470. A_UINT32 ac_mu_mimo_brpoll_2; /* MU user 2 */
  1471. A_UINT32 ac_mu_mimo_brpoll_3; /* MU user 3 */
  1472. } htt_tx_selfgen_ac_stats_tlv;
  1473. typedef struct {
  1474. htt_tlv_hdr_t tlv_hdr;
  1475. /* 11AX */
  1476. A_UINT32 ax_su_ndpa;
  1477. A_UINT32 ax_su_ndp;
  1478. A_UINT32 ax_mu_mimo_ndpa;
  1479. A_UINT32 ax_mu_mimo_ndp;
  1480. A_UINT32 ax_mu_mimo_brpoll_1; /* MU user 1 */
  1481. A_UINT32 ax_mu_mimo_brpoll_2; /* MU user 2 */
  1482. A_UINT32 ax_mu_mimo_brpoll_3; /* MU user 3 */
  1483. A_UINT32 ax_mu_mimo_brpoll_4; /* MU user 4 */
  1484. A_UINT32 ax_mu_mimo_brpoll_5; /* MU user 5 */
  1485. A_UINT32 ax_mu_mimo_brpoll_6; /* MU user 6 */
  1486. A_UINT32 ax_mu_mimo_brpoll_7; /* MU user 7 */
  1487. A_UINT32 ax_basic_trigger;
  1488. A_UINT32 ax_bsr_trigger;
  1489. A_UINT32 ax_mu_bar_trigger;
  1490. A_UINT32 ax_mu_rts_trigger;
  1491. A_UINT32 ax_ulmumimo_trigger;
  1492. } htt_tx_selfgen_ax_stats_tlv;
  1493. typedef struct {
  1494. htt_tlv_hdr_t tlv_hdr;
  1495. /* 11AC error stats */
  1496. A_UINT32 ac_su_ndp_err;
  1497. A_UINT32 ac_su_ndpa_err;
  1498. A_UINT32 ac_mu_mimo_ndpa_err;
  1499. A_UINT32 ac_mu_mimo_ndp_err;
  1500. A_UINT32 ac_mu_mimo_brp1_err;
  1501. A_UINT32 ac_mu_mimo_brp2_err;
  1502. A_UINT32 ac_mu_mimo_brp3_err;
  1503. } htt_tx_selfgen_ac_err_stats_tlv;
  1504. typedef struct {
  1505. htt_tlv_hdr_t tlv_hdr;
  1506. /* 11AX error stats */
  1507. A_UINT32 ax_su_ndp_err;
  1508. A_UINT32 ax_su_ndpa_err;
  1509. A_UINT32 ax_mu_mimo_ndpa_err;
  1510. A_UINT32 ax_mu_mimo_ndp_err;
  1511. A_UINT32 ax_mu_mimo_brp1_err;
  1512. A_UINT32 ax_mu_mimo_brp2_err;
  1513. A_UINT32 ax_mu_mimo_brp3_err;
  1514. A_UINT32 ax_mu_mimo_brp4_err;
  1515. A_UINT32 ax_mu_mimo_brp5_err;
  1516. A_UINT32 ax_mu_mimo_brp6_err;
  1517. A_UINT32 ax_mu_mimo_brp7_err;
  1518. A_UINT32 ax_basic_trigger_err;
  1519. A_UINT32 ax_bsr_trigger_err;
  1520. A_UINT32 ax_mu_bar_trigger_err;
  1521. A_UINT32 ax_mu_rts_trigger_err;
  1522. A_UINT32 ax_ulmumimo_trigger_err;
  1523. } htt_tx_selfgen_ax_err_stats_tlv;
  1524. /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_SELFGEN_INFO
  1525. * TLV_TAGS:
  1526. * - HTT_STATS_TX_SELFGEN_CMN_STATS_TAG
  1527. * - HTT_STATS_TX_SELFGEN_AC_STATS_TAG
  1528. * - HTT_STATS_TX_SELFGEN_AX_STATS_TAG
  1529. * - HTT_STATS_TX_SELFGEN_AC_ERR_STATS_TAG
  1530. * - HTT_STATS_TX_SELFGEN_AX_ERR_STATS_TAG
  1531. */
  1532. /* NOTE:
  1533. * This structure is for documentation, and cannot be safely used directly.
  1534. * Instead, use the constituent TLV structures to fill/parse.
  1535. */
  1536. typedef struct {
  1537. htt_tx_selfgen_cmn_stats_tlv cmn_tlv;
  1538. /* 11AC */
  1539. htt_tx_selfgen_ac_stats_tlv ac_tlv;
  1540. /* 11AX */
  1541. htt_tx_selfgen_ax_stats_tlv ax_tlv;
  1542. /* 11AC error stats */
  1543. htt_tx_selfgen_ac_err_stats_tlv ac_err_tlv;
  1544. /* 11AX error stats */
  1545. htt_tx_selfgen_ax_err_stats_tlv ax_err_tlv;
  1546. } htt_tx_pdev_selfgen_stats_t;
  1547. /* == TX MU STATS == */
  1548. #define HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS 4
  1549. #define HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS 8
  1550. #define HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS 74
  1551. typedef struct {
  1552. htt_tlv_hdr_t tlv_hdr;
  1553. /* mu-mimo sw sched cmd stats */
  1554. A_UINT32 mu_mimo_sch_posted;
  1555. A_UINT32 mu_mimo_sch_failed;
  1556. /* MU PPDU stats per hwQ */
  1557. A_UINT32 mu_mimo_ppdu_posted;
  1558. /*
  1559. * Counts the number of users in each transmission of
  1560. * the given TX mode.
  1561. *
  1562. * Index is the number of users - 1.
  1563. */
  1564. A_UINT32 ac_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS];
  1565. A_UINT32 ax_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  1566. A_UINT32 ax_ofdma_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  1567. A_UINT32 ax_ul_ofdma_basic_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  1568. A_UINT32 ax_ul_ofdma_bsr_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  1569. A_UINT32 ax_ul_ofdma_bar_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  1570. A_UINT32 ax_ul_ofdma_brp_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  1571. } htt_tx_pdev_mu_mimo_sch_stats_tlv;
  1572. typedef struct {
  1573. htt_tlv_hdr_t tlv_hdr;
  1574. /* mu-mimo mpdu level stats */
  1575. /*
  1576. * This first block of stats is limited to 11ac
  1577. * MU-MIMO transmission.
  1578. */
  1579. A_UINT32 mu_mimo_mpdus_queued_usr;
  1580. A_UINT32 mu_mimo_mpdus_tried_usr;
  1581. A_UINT32 mu_mimo_mpdus_failed_usr;
  1582. A_UINT32 mu_mimo_mpdus_requeued_usr;
  1583. A_UINT32 mu_mimo_err_no_ba_usr;
  1584. A_UINT32 mu_mimo_mpdu_underrun_usr;
  1585. A_UINT32 mu_mimo_ampdu_underrun_usr;
  1586. A_UINT32 ax_mu_mimo_mpdus_queued_usr;
  1587. A_UINT32 ax_mu_mimo_mpdus_tried_usr;
  1588. A_UINT32 ax_mu_mimo_mpdus_failed_usr;
  1589. A_UINT32 ax_mu_mimo_mpdus_requeued_usr;
  1590. A_UINT32 ax_mu_mimo_err_no_ba_usr;
  1591. A_UINT32 ax_mu_mimo_mpdu_underrun_usr;
  1592. A_UINT32 ax_mu_mimo_ampdu_underrun_usr;
  1593. A_UINT32 ax_ofdma_mpdus_queued_usr;
  1594. A_UINT32 ax_ofdma_mpdus_tried_usr;
  1595. A_UINT32 ax_ofdma_mpdus_failed_usr;
  1596. A_UINT32 ax_ofdma_mpdus_requeued_usr;
  1597. A_UINT32 ax_ofdma_err_no_ba_usr;
  1598. A_UINT32 ax_ofdma_mpdu_underrun_usr;
  1599. A_UINT32 ax_ofdma_ampdu_underrun_usr;
  1600. } htt_tx_pdev_mu_mimo_mpdu_stats_tlv;
  1601. #define HTT_STATS_TX_SCHED_MODE_MU_MIMO_AC 1 /* SCHED_TX_MODE_MU_MIMO_AC */
  1602. #define HTT_STATS_TX_SCHED_MODE_MU_MIMO_AX 2 /* SCHED_TX_MODE_MU_MIMO_AX */
  1603. #define HTT_STATS_TX_SCHED_MODE_MU_OFDMA_AX 3 /* SCHED_TX_MODE_MU_OFDMA_AX */
  1604. typedef struct {
  1605. htt_tlv_hdr_t tlv_hdr;
  1606. /* mpdu level stats */
  1607. A_UINT32 mpdus_queued_usr;
  1608. A_UINT32 mpdus_tried_usr;
  1609. A_UINT32 mpdus_failed_usr;
  1610. A_UINT32 mpdus_requeued_usr;
  1611. A_UINT32 err_no_ba_usr;
  1612. A_UINT32 mpdu_underrun_usr;
  1613. A_UINT32 ampdu_underrun_usr;
  1614. A_UINT32 user_index;
  1615. A_UINT32 tx_sched_mode; /* HTT_STATS_TX_SCHED_MODE_xxx */
  1616. } htt_tx_pdev_mpdu_stats_tlv;
  1617. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_MU
  1618. * TLV_TAGS:
  1619. * - HTT_STATS_TX_PDEV_MU_MIMO_STATS_TAG (multiple)
  1620. * - HTT_STATS_TX_PDEV_MPDU_STATS_TAG (multiple)
  1621. */
  1622. /* NOTE:
  1623. * This structure is for documentation, and cannot be safely used directly.
  1624. * Instead, use the constituent TLV structures to fill/parse.
  1625. */
  1626. typedef struct {
  1627. htt_tx_pdev_mu_mimo_sch_stats_tlv mu_mimo_sch_stats_tlv[1]; /* WAL_TX_STATS_MAX_GROUP_SIZE */
  1628. /*
  1629. * Note that though mu_mimo_mpdu_stats_tlv is named MU-MIMO,
  1630. * it can also hold MU-OFDMA stats.
  1631. */
  1632. htt_tx_pdev_mpdu_stats_tlv mu_mimo_mpdu_stats_tlv[1]; /* WAL_TX_STATS_MAX_NUM_USERS */
  1633. } htt_tx_pdev_mu_mimo_stats_t;
  1634. /* == TX SCHED STATS == */
  1635. #define HTT_SCHED_TXQ_CMD_POSTED_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1636. /* NOTE: Variable length TLV, use length spec to infer array size */
  1637. typedef struct {
  1638. htt_tlv_hdr_t tlv_hdr;
  1639. /* Scheduler command posted per tx_mode su / mu mimo 11ac / mu mimo 11ax / mu ofdma */
  1640. A_UINT32 sched_cmd_posted[1]; /* HTT_TX_PDEV_SCHED_TX_MODE_MAX */
  1641. } htt_sched_txq_cmd_posted_tlv_v;
  1642. #define HTT_SCHED_TXQ_CMD_REAPED_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1643. /* NOTE: Variable length TLV, use length spec to infer array size */
  1644. typedef struct {
  1645. htt_tlv_hdr_t tlv_hdr;
  1646. /* Scheduler command reaped per tx_mode su / mu mimo 11ac / mu mimo 11ax / mu ofdma */
  1647. A_UINT32 sched_cmd_reaped[1]; /* HTT_TX_PDEV_SCHED_TX_MODE_MAX */
  1648. } htt_sched_txq_cmd_reaped_tlv_v;
  1649. #define HTT_SCHED_TXQ_SCHED_ORDER_SU_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1650. /* NOTE: Variable length TLV, use length spec to infer array size */
  1651. typedef struct {
  1652. htt_tlv_hdr_t tlv_hdr;
  1653. /*
  1654. * sched_order_su contains the peer IDs of peers chosen in the last
  1655. * NUM_SCHED_ORDER_LOG scheduler instances.
  1656. * The array is circular; it's unspecified which array element corresponds
  1657. * to the most recent scheduler invocation, and which corresponds to
  1658. * the (NUM_SCHED_ORDER_LOG-1) most recent scheduler invocation.
  1659. */
  1660. A_UINT32 sched_order_su[1]; /* HTT_TX_PDEV_NUM_SCHED_ORDER_LOG */
  1661. } htt_sched_txq_sched_order_su_tlv_v;
  1662. typedef enum {
  1663. HTT_SCHED_TID_SKIP_SCHED_MASK_DISABLED = 0, /* Skip the tid when WAL_TID_DISABLE_TX_SCHED_MASK is true */
  1664. HTT_SCHED_TID_SKIP_NOTIFY_MPDU, /* Skip the tid's 2nd sched_cmd when 1st cmd is ongoing */
  1665. HTT_SCHED_TID_SKIP_MPDU_STATE_INVALID, /* Skip the tid when MPDU state is invalid */
  1666. HTT_SCHED_TID_SKIP_SCHED_DISABLED, /* Skip the tid when scheduling is disabled for that tid */
  1667. HTT_SCHED_TID_SKIP_TQM_BYPASS_CMD_PENDING, /* Skip the TQM bypass tid when it has pending sched_cmd */
  1668. HTT_SCHED_TID_SKIP_SECOND_SU_SCHEDULE, /* Skip tid from 2nd SU schedule when any of the following flag is set
  1669. WAL_TX_TID(SEND_BAR | TQM_MPDU_STATE_VALID | SEND_QOS_NULL | TQM_NOTIFY_MPDU | SENDN_PENDING) */
  1670. HTT_SCHED_TID_SKIP_CMD_SLOT_NOT_AVAIL, /* Skip the tid when command slot is not available */
  1671. HTT_SCHED_TID_SKIP_NO_ENQ, /* Skip the tid when num_frames is zero with g_disable_remove_tid as true */
  1672. HTT_SCHED_TID_SKIP_LOW_ENQ, /* Skip the tid when enqueue is low */
  1673. HTT_SCHED_TID_SKIP_PAUSED, /* Skipping the paused tid(sendn-frames) */
  1674. HTT_SCHED_TID_SKIP_UL, /* UL tid skip */
  1675. HTT_SCHED_TID_REMOVE_PAUSED, /* Removing the paused tid when number of sendn frames is zero */
  1676. HTT_SCHED_TID_REMOVE_NO_ENQ, /* Remove tid with zero queue depth */
  1677. HTT_SCHED_TID_REMOVE_UL, /* UL tid remove */
  1678. HTT_SCHED_TID_QUERY, /* Moving to next user and adding tid in prepend list when qstats update is pending */
  1679. HTT_SCHED_TID_SU_ONLY, /* Tid is eligible and TX_SCHED_SU_ONLY is true */
  1680. HTT_SCHED_TID_ELIGIBLE, /* Tid is eligible for scheduling */
  1681. HTT_SCHED_INELIGIBILITY_MAX,
  1682. } htt_sched_txq_sched_ineligibility_tlv_enum;
  1683. #define HTT_SCHED_TXQ_SCHED_INELIGIBILITY_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1684. /* NOTE: Variable length TLV, use length spec to infer array size */
  1685. typedef struct {
  1686. htt_tlv_hdr_t tlv_hdr;
  1687. /* sched_ineligibility counts the number of occurrences of different reasons for tid ineligibility during eligibility checks per txq in scheduling */
  1688. A_UINT32 sched_ineligibility[1]; /* indexed by htt_sched_txq_sched_ineligibility_tlv_enum */
  1689. } htt_sched_txq_sched_ineligibility_tlv_v;
  1690. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_M 0x000000ff
  1691. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_S 0
  1692. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_M 0x0000ff00
  1693. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_S 8
  1694. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_GET(_var) \
  1695. (((_var) & HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_M) >> \
  1696. HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_S)
  1697. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_SET(_var, _val) \
  1698. do { \
  1699. HTT_CHECK_SET_VAL(HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID, _val); \
  1700. ((_var) |= ((_val) << HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_S)); \
  1701. } while (0)
  1702. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_GET(_var) \
  1703. (((_var) & HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_M) >> \
  1704. HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_S)
  1705. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_SET(_var, _val) \
  1706. do { \
  1707. HTT_CHECK_SET_VAL(HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID, _val); \
  1708. ((_var) |= ((_val) << HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_S)); \
  1709. } while (0)
  1710. typedef struct {
  1711. htt_tlv_hdr_t tlv_hdr;
  1712. /* BIT [ 7 : 0] :- mac_id
  1713. * BIT [15 : 8] :- txq_id
  1714. * BIT [31 : 16] :- reserved
  1715. */
  1716. A_UINT32 mac_id__txq_id__word;
  1717. /* Scheduler policy ised for this TxQ */
  1718. A_UINT32 sched_policy;
  1719. /* Timestamp of last scheduler command posted */
  1720. A_UINT32 last_sched_cmd_posted_timestamp;
  1721. /* Timestamp of last scheduler command completed */
  1722. A_UINT32 last_sched_cmd_compl_timestamp;
  1723. /* Num of Sched2TAC ring hit Low Water Mark condition */
  1724. A_UINT32 sched_2_tac_lwm_count;
  1725. /* Num of Sched2TAC ring full condition */
  1726. A_UINT32 sched_2_tac_ring_full;
  1727. /* Num of scheduler command post failures that includes su/mu mimo/mu ofdma sequence type */
  1728. A_UINT32 sched_cmd_post_failure;
  1729. /* Num of active tids for this TxQ at current instance */
  1730. A_UINT32 num_active_tids;
  1731. /* Num of powersave schedules */
  1732. A_UINT32 num_ps_schedules;
  1733. /* Num of scheduler commands pending for this TxQ */
  1734. A_UINT32 sched_cmds_pending;
  1735. /* Num of tidq registration for this TxQ */
  1736. A_UINT32 num_tid_register;
  1737. /* Num of tidq de-registration for this TxQ */
  1738. A_UINT32 num_tid_unregister;
  1739. /* Num of iterations msduq stats was updated */
  1740. A_UINT32 num_qstats_queried;
  1741. /* qstats query update status */
  1742. A_UINT32 qstats_update_pending;
  1743. /* Timestamp of Last query stats made */
  1744. A_UINT32 last_qstats_query_timestamp;
  1745. /* Num of sched2tqm command queue full condition */
  1746. A_UINT32 num_tqm_cmdq_full;
  1747. /* Num of scheduler trigger from DE Module */
  1748. A_UINT32 num_de_sched_algo_trigger;
  1749. /* Num of scheduler trigger from RT Module */
  1750. A_UINT32 num_rt_sched_algo_trigger;
  1751. /* Num of scheduler trigger from TQM Module */
  1752. A_UINT32 num_tqm_sched_algo_trigger;
  1753. /* Num of schedules for notify frame */
  1754. A_UINT32 notify_sched;
  1755. /* Duration based sendn termination */
  1756. A_UINT32 dur_based_sendn_term;
  1757. /* scheduled via NOTIFY2 */
  1758. A_UINT32 su_notify2_sched;
  1759. /* schedule if queued packets are greater than avg MSDUs in PPDU */
  1760. A_UINT32 su_optimal_queued_msdus_sched;
  1761. /* schedule due to timeout */
  1762. A_UINT32 su_delay_timeout_sched;
  1763. /* delay if txtime is less than 500us */
  1764. A_UINT32 su_min_txtime_sched_delay;
  1765. /* scheduled via no delay */
  1766. A_UINT32 su_no_delay;
  1767. } htt_tx_pdev_stats_sched_per_txq_tlv;
  1768. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_M 0x000000ff
  1769. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_S 0
  1770. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_GET(_var) \
  1771. (((_var) & HTT_STATS_TX_SCHED_CMN_MAC_ID_M) >> \
  1772. HTT_STATS_TX_SCHED_CMN_MAC_ID_S)
  1773. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_SET(_var, _val) \
  1774. do { \
  1775. HTT_CHECK_SET_VAL(HTT_STATS_TX_SCHED_CMN_MAC_ID, _val); \
  1776. ((_var) |= ((_val) << HTT_STATS_TX_SCHED_CMN_MAC_ID_S)); \
  1777. } while (0)
  1778. typedef struct {
  1779. htt_tlv_hdr_t tlv_hdr;
  1780. /* BIT [ 7 : 0] :- mac_id
  1781. * BIT [31 : 8] :- reserved
  1782. */
  1783. A_UINT32 mac_id__word;
  1784. /* Current timestamp */
  1785. A_UINT32 current_timestamp;
  1786. } htt_stats_tx_sched_cmn_tlv;
  1787. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_SCHED
  1788. * TLV_TAGS:
  1789. * - HTT_STATS_TX_SCHED_CMN_TAG
  1790. * - HTT_STATS_TX_PDEV_SCHEDULER_TXQ_STATS_TAG
  1791. * - HTT_STATS_SCHED_TXQ_CMD_POSTED_TAG
  1792. * - HTT_STATS_SCHED_TXQ_CMD_REAPED_TAG
  1793. * - HTT_STATS_SCHED_TXQ_SCHED_ORDER_SU_TAG
  1794. * - HTT_STATS_SCHED_TXQ_SCHED_INELIGIBILITY_TAG
  1795. */
  1796. /* NOTE:
  1797. * This structure is for documentation, and cannot be safely used directly.
  1798. * Instead, use the constituent TLV structures to fill/parse.
  1799. */
  1800. typedef struct {
  1801. htt_stats_tx_sched_cmn_tlv cmn_tlv;
  1802. struct _txq_tx_sched_stats {
  1803. htt_tx_pdev_stats_sched_per_txq_tlv txq_tlv;
  1804. htt_sched_txq_cmd_posted_tlv_v cmd_posted_tlv;
  1805. htt_sched_txq_cmd_reaped_tlv_v cmd_reaped_tlv;
  1806. htt_sched_txq_sched_order_su_tlv_v sched_order_su_tlv;
  1807. htt_sched_txq_sched_ineligibility_tlv_v sched_ineligibility_tlv;
  1808. } txq[1];
  1809. } htt_stats_tx_sched_t;
  1810. /* == TQM STATS == */
  1811. #define HTT_TX_TQM_MAX_GEN_MPDU_END_REASON 16
  1812. #define HTT_TX_TQM_MAX_LIST_MPDU_END_REASON 16
  1813. #define HTT_TX_TQM_MAX_LIST_MPDU_CNT_HISTOGRAM_BINS 16
  1814. #define HTT_TX_TQM_GEN_MPDU_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1815. /* NOTE: Variable length TLV, use length spec to infer array size */
  1816. typedef struct {
  1817. htt_tlv_hdr_t tlv_hdr;
  1818. A_UINT32 gen_mpdu_end_reason[1]; /* HTT_TX_TQM_MAX_GEN_MPDU_END_REASON */
  1819. } htt_tx_tqm_gen_mpdu_stats_tlv_v;
  1820. #define HTT_TX_TQM_LIST_MPDU_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1821. /* NOTE: Variable length TLV, use length spec to infer array size */
  1822. typedef struct {
  1823. htt_tlv_hdr_t tlv_hdr;
  1824. A_UINT32 list_mpdu_end_reason[1]; /* HTT_TX_TQM_MAX_LIST_MPDU_END_REASON */
  1825. } htt_tx_tqm_list_mpdu_stats_tlv_v;
  1826. #define HTT_TX_TQM_LIST_MPDU_CNT_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1827. /* NOTE: Variable length TLV, use length spec to infer array size */
  1828. typedef struct {
  1829. htt_tlv_hdr_t tlv_hdr;
  1830. A_UINT32 list_mpdu_cnt_hist[1]; /* HTT_TX_TQM_MAX_LIST_MPDU_CNT_HISTOGRAM_BINS */
  1831. } htt_tx_tqm_list_mpdu_cnt_tlv_v;
  1832. typedef struct {
  1833. htt_tlv_hdr_t tlv_hdr;
  1834. A_UINT32 msdu_count;
  1835. A_UINT32 mpdu_count;
  1836. A_UINT32 remove_msdu;
  1837. A_UINT32 remove_mpdu;
  1838. A_UINT32 remove_msdu_ttl;
  1839. A_UINT32 send_bar;
  1840. A_UINT32 bar_sync;
  1841. A_UINT32 notify_mpdu;
  1842. A_UINT32 sync_cmd;
  1843. A_UINT32 write_cmd;
  1844. A_UINT32 hwsch_trigger;
  1845. A_UINT32 ack_tlv_proc;
  1846. A_UINT32 gen_mpdu_cmd;
  1847. A_UINT32 gen_list_cmd;
  1848. A_UINT32 remove_mpdu_cmd;
  1849. A_UINT32 remove_mpdu_tried_cmd;
  1850. A_UINT32 mpdu_queue_stats_cmd;
  1851. A_UINT32 mpdu_head_info_cmd;
  1852. A_UINT32 msdu_flow_stats_cmd;
  1853. A_UINT32 remove_msdu_cmd;
  1854. A_UINT32 remove_msdu_ttl_cmd;
  1855. A_UINT32 flush_cache_cmd;
  1856. A_UINT32 update_mpduq_cmd;
  1857. A_UINT32 enqueue;
  1858. A_UINT32 enqueue_notify;
  1859. A_UINT32 notify_mpdu_at_head;
  1860. A_UINT32 notify_mpdu_state_valid;
  1861. /*
  1862. * On receiving TQM_FLOW_NOT_EMPTY_STATUS from TQM, (on MSDUs being enqueued
  1863. * the flow is non empty), if the number of MSDUs is greater than the threshold,
  1864. * notify is incremented. UDP_THRESH counters are for UDP MSDUs, and NONUDP are
  1865. * for non-UDP MSDUs.
  1866. * MSDUQ_SWNOTIFY_UDP_THRESH1 threshold - sched_udp_notify1 is incremented
  1867. * MSDUQ_SWNOTIFY_UDP_THRESH2 threshold - sched_udp_notify2 is incremented
  1868. * MSDUQ_SWNOTIFY_NONUDP_THRESH1 threshold - sched_nonudp_notify1 is incremented
  1869. * MSDUQ_SWNOTIFY_NONUDP_THRESH2 threshold - sched_nonudp_notify2 is incremented
  1870. *
  1871. * Notify signifies that we trigger the scheduler.
  1872. */
  1873. A_UINT32 sched_udp_notify1;
  1874. A_UINT32 sched_udp_notify2;
  1875. A_UINT32 sched_nonudp_notify1;
  1876. A_UINT32 sched_nonudp_notify2;
  1877. } htt_tx_tqm_pdev_stats_tlv_v;
  1878. #define HTT_TX_TQM_CMN_STATS_MAC_ID_M 0x000000ff
  1879. #define HTT_TX_TQM_CMN_STATS_MAC_ID_S 0
  1880. #define HTT_TX_TQM_CMN_STATS_MAC_ID_GET(_var) \
  1881. (((_var) & HTT_TX_TQM_CMN_STATS_MAC_ID_M) >> \
  1882. HTT_TX_TQM_CMN_STATS_MAC_ID_S)
  1883. #define HTT_TX_TQM_CMN_STATS_MAC_ID_SET(_var, _val) \
  1884. do { \
  1885. HTT_CHECK_SET_VAL(HTT_TX_TQM_CMN_STATS_MAC_ID, _val); \
  1886. ((_var) |= ((_val) << HTT_TX_TQM_CMN_STATS_MAC_ID_S)); \
  1887. } while (0)
  1888. typedef struct {
  1889. htt_tlv_hdr_t tlv_hdr;
  1890. /* BIT [ 7 : 0] :- mac_id
  1891. * BIT [31 : 8] :- reserved
  1892. */
  1893. A_UINT32 mac_id__word;
  1894. A_UINT32 max_cmdq_id;
  1895. A_UINT32 list_mpdu_cnt_hist_intvl;
  1896. /* Global stats */
  1897. A_UINT32 add_msdu;
  1898. A_UINT32 q_empty;
  1899. A_UINT32 q_not_empty;
  1900. A_UINT32 drop_notification;
  1901. A_UINT32 desc_threshold;
  1902. A_UINT32 hwsch_tqm_invalid_status;
  1903. A_UINT32 missed_tqm_gen_mpdus;
  1904. } htt_tx_tqm_cmn_stats_tlv;
  1905. typedef struct {
  1906. htt_tlv_hdr_t tlv_hdr;
  1907. /* Error stats */
  1908. A_UINT32 q_empty_failure;
  1909. A_UINT32 q_not_empty_failure;
  1910. A_UINT32 add_msdu_failure;
  1911. } htt_tx_tqm_error_stats_tlv;
  1912. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TQM
  1913. * TLV_TAGS:
  1914. * - HTT_STATS_TX_TQM_CMN_TAG
  1915. * - HTT_STATS_TX_TQM_ERROR_STATS_TAG
  1916. * - HTT_STATS_TX_TQM_GEN_MPDU_TAG
  1917. * - HTT_STATS_TX_TQM_LIST_MPDU_TAG
  1918. * - HTT_STATS_TX_TQM_LIST_MPDU_CNT_TAG
  1919. * - HTT_STATS_TX_TQM_PDEV_TAG
  1920. */
  1921. /* NOTE:
  1922. * This structure is for documentation, and cannot be safely used directly.
  1923. * Instead, use the constituent TLV structures to fill/parse.
  1924. */
  1925. typedef struct {
  1926. htt_tx_tqm_cmn_stats_tlv cmn_tlv;
  1927. htt_tx_tqm_error_stats_tlv err_tlv;
  1928. htt_tx_tqm_gen_mpdu_stats_tlv_v gen_mpdu_stats_tlv;
  1929. htt_tx_tqm_list_mpdu_stats_tlv_v list_mpdu_stats_tlv;
  1930. htt_tx_tqm_list_mpdu_cnt_tlv_v list_mpdu_cnt_tlv;
  1931. htt_tx_tqm_pdev_stats_tlv_v tqm_pdev_stats_tlv;
  1932. } htt_tx_tqm_pdev_stats_t;
  1933. /* == TQM CMDQ stats == */
  1934. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_M 0x000000ff
  1935. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_S 0
  1936. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_M 0x0000ff00
  1937. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_S 8
  1938. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_GET(_var) \
  1939. (((_var) & HTT_TX_TQM_CMDQ_STATUS_MAC_ID_M) >> \
  1940. HTT_TX_TQM_CMDQ_STATUS_MAC_ID_S)
  1941. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_SET(_var, _val) \
  1942. do { \
  1943. HTT_CHECK_SET_VAL(HTT_TX_TQM_CMDQ_STATUS_MAC_ID, _val); \
  1944. ((_var) |= ((_val) << HTT_TX_TQM_CMDQ_STATUS_MAC_ID_S)); \
  1945. } while (0)
  1946. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_GET(_var) \
  1947. (((_var) & HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_M) >> \
  1948. HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_S)
  1949. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_SET(_var, _val) \
  1950. do { \
  1951. HTT_CHECK_SET_VAL(HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID, _val); \
  1952. ((_var) |= ((_val) << HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_S)); \
  1953. } while (0)
  1954. typedef struct {
  1955. htt_tlv_hdr_t tlv_hdr;
  1956. /* BIT [ 7 : 0] :- mac_id
  1957. * BIT [15 : 8] :- cmdq_id
  1958. * BIT [31 : 16] :- reserved
  1959. */
  1960. A_UINT32 mac_id__cmdq_id__word;
  1961. A_UINT32 sync_cmd;
  1962. A_UINT32 write_cmd;
  1963. A_UINT32 gen_mpdu_cmd;
  1964. A_UINT32 mpdu_queue_stats_cmd;
  1965. A_UINT32 mpdu_head_info_cmd;
  1966. A_UINT32 msdu_flow_stats_cmd;
  1967. A_UINT32 remove_mpdu_cmd;
  1968. A_UINT32 remove_msdu_cmd;
  1969. A_UINT32 flush_cache_cmd;
  1970. A_UINT32 update_mpduq_cmd;
  1971. A_UINT32 update_msduq_cmd;
  1972. } htt_tx_tqm_cmdq_status_tlv;
  1973. /* STATS_TYPE : HTT_DBG_EXT_STATS_TQM_CMDQ
  1974. * TLV_TAGS:
  1975. * - HTT_STATS_STRING_TAG
  1976. * - HTT_STATS_TX_TQM_CMDQ_STATUS_TAG
  1977. */
  1978. /* NOTE:
  1979. * This structure is for documentation, and cannot be safely used directly.
  1980. * Instead, use the constituent TLV structures to fill/parse.
  1981. */
  1982. typedef struct {
  1983. struct _cmdq_stats {
  1984. htt_stats_string_tlv cmdq_str_tlv;
  1985. htt_tx_tqm_cmdq_status_tlv status_tlv;
  1986. } q[1];
  1987. } htt_tx_tqm_cmdq_stats_t;
  1988. /* == TX-DE STATS == */
  1989. /* Structures for tx de stats */
  1990. typedef struct {
  1991. htt_tlv_hdr_t tlv_hdr;
  1992. A_UINT32 m1_packets;
  1993. A_UINT32 m2_packets;
  1994. A_UINT32 m3_packets;
  1995. A_UINT32 m4_packets;
  1996. A_UINT32 g1_packets;
  1997. A_UINT32 g2_packets;
  1998. A_UINT32 rc4_packets;
  1999. A_UINT32 eap_packets;
  2000. A_UINT32 eapol_start_packets;
  2001. A_UINT32 eapol_logoff_packets;
  2002. A_UINT32 eapol_encap_asf_packets;
  2003. } htt_tx_de_eapol_packets_stats_tlv;
  2004. typedef struct {
  2005. htt_tlv_hdr_t tlv_hdr;
  2006. A_UINT32 ap_bss_peer_not_found;
  2007. A_UINT32 ap_bcast_mcast_no_peer;
  2008. A_UINT32 sta_delete_in_progress;
  2009. A_UINT32 ibss_no_bss_peer;
  2010. A_UINT32 invaild_vdev_type;
  2011. A_UINT32 invalid_ast_peer_entry;
  2012. A_UINT32 peer_entry_invalid;
  2013. A_UINT32 ethertype_not_ip;
  2014. A_UINT32 eapol_lookup_failed;
  2015. A_UINT32 qpeer_not_allow_data;
  2016. A_UINT32 fse_tid_override;
  2017. A_UINT32 ipv6_jumbogram_zero_length;
  2018. A_UINT32 qos_to_non_qos_in_prog;
  2019. A_UINT32 ap_bcast_mcast_eapol;
  2020. A_UINT32 unicast_on_ap_bss_peer;
  2021. A_UINT32 ap_vdev_invalid;
  2022. A_UINT32 incomplete_llc;
  2023. A_UINT32 eapol_duplicate_m3;
  2024. A_UINT32 eapol_duplicate_m4;
  2025. } htt_tx_de_classify_failed_stats_tlv;
  2026. typedef struct {
  2027. htt_tlv_hdr_t tlv_hdr;
  2028. A_UINT32 arp_packets;
  2029. A_UINT32 igmp_packets;
  2030. A_UINT32 dhcp_packets;
  2031. A_UINT32 host_inspected;
  2032. A_UINT32 htt_included;
  2033. A_UINT32 htt_valid_mcs;
  2034. A_UINT32 htt_valid_nss;
  2035. A_UINT32 htt_valid_preamble_type;
  2036. A_UINT32 htt_valid_chainmask;
  2037. A_UINT32 htt_valid_guard_interval;
  2038. A_UINT32 htt_valid_retries;
  2039. A_UINT32 htt_valid_bw_info;
  2040. A_UINT32 htt_valid_power;
  2041. A_UINT32 htt_valid_key_flags;
  2042. A_UINT32 htt_valid_no_encryption;
  2043. A_UINT32 fse_entry_count;
  2044. A_UINT32 fse_priority_be;
  2045. A_UINT32 fse_priority_high;
  2046. A_UINT32 fse_priority_low;
  2047. A_UINT32 fse_traffic_ptrn_be;
  2048. A_UINT32 fse_traffic_ptrn_over_sub;
  2049. A_UINT32 fse_traffic_ptrn_bursty;
  2050. A_UINT32 fse_traffic_ptrn_interactive;
  2051. A_UINT32 fse_traffic_ptrn_periodic;
  2052. A_UINT32 fse_hwqueue_alloc;
  2053. A_UINT32 fse_hwqueue_created;
  2054. A_UINT32 fse_hwqueue_send_to_host;
  2055. A_UINT32 mcast_entry;
  2056. A_UINT32 bcast_entry;
  2057. A_UINT32 htt_update_peer_cache;
  2058. A_UINT32 htt_learning_frame;
  2059. A_UINT32 fse_invalid_peer;
  2060. /*
  2061. * mec_notify is HTT TX WBM multicast echo check notification
  2062. * from firmware to host. FW sends SA addresses to host for all
  2063. * multicast/broadcast packets received on STA side.
  2064. */
  2065. A_UINT32 mec_notify;
  2066. } htt_tx_de_classify_stats_tlv;
  2067. typedef struct {
  2068. htt_tlv_hdr_t tlv_hdr;
  2069. A_UINT32 eok;
  2070. A_UINT32 classify_done;
  2071. A_UINT32 lookup_failed;
  2072. A_UINT32 send_host_dhcp;
  2073. A_UINT32 send_host_mcast;
  2074. A_UINT32 send_host_unknown_dest;
  2075. A_UINT32 send_host;
  2076. A_UINT32 status_invalid;
  2077. } htt_tx_de_classify_status_stats_tlv;
  2078. typedef struct {
  2079. htt_tlv_hdr_t tlv_hdr;
  2080. A_UINT32 enqueued_pkts;
  2081. A_UINT32 to_tqm;
  2082. A_UINT32 to_tqm_bypass;
  2083. } htt_tx_de_enqueue_packets_stats_tlv;
  2084. typedef struct {
  2085. htt_tlv_hdr_t tlv_hdr;
  2086. A_UINT32 discarded_pkts;
  2087. A_UINT32 local_frames;
  2088. A_UINT32 is_ext_msdu;
  2089. } htt_tx_de_enqueue_discard_stats_tlv;
  2090. typedef struct {
  2091. htt_tlv_hdr_t tlv_hdr;
  2092. A_UINT32 tcl_dummy_frame;
  2093. A_UINT32 tqm_dummy_frame;
  2094. A_UINT32 tqm_notify_frame;
  2095. A_UINT32 fw2wbm_enq;
  2096. A_UINT32 tqm_bypass_frame;
  2097. } htt_tx_de_compl_stats_tlv;
  2098. #define HTT_TX_DE_CMN_STATS_MAC_ID_M 0x000000ff
  2099. #define HTT_TX_DE_CMN_STATS_MAC_ID_S 0
  2100. #define HTT_TX_DE_CMN_STATS_MAC_ID_GET(_var) \
  2101. (((_var) & HTT_TX_DE_CMN_STATS_MAC_ID_M) >> \
  2102. HTT_TX_DE_CMN_STATS_MAC_ID_S)
  2103. #define HTT_TX_DE_CMN_STATS_MAC_ID_SET(_var, _val) \
  2104. do { \
  2105. HTT_CHECK_SET_VAL(HTT_TX_DE_CMN_STATS_MAC_ID, _val); \
  2106. ((_var) |= ((_val) << HTT_TX_DE_CMN_STATS_MAC_ID_S)); \
  2107. } while (0)
  2108. /*
  2109. * The htt_tx_de_fw2wbm_ring_full_hist_tlv is a histogram of time we waited
  2110. * for the fw2wbm ring buffer. we are requesting a buffer in FW2WBM release
  2111. * ring,which may fail, due to non availability of buffer. Hence we sleep for
  2112. * 200us & again request for it. This is a histogram of time we wait, with
  2113. * bin of 200ms & there are 10 bin (2 seconds max)
  2114. * They are defined by the following macros in FW
  2115. * #define ENTRIES_PER_BIN_COUNT 1000 // per bin 1000 * 200us = 200ms
  2116. * #define RING_FULL_BIN_ENTRIES (WAL_TX_DE_FW2WBM_ALLOC_TIMEOUT_COUNT /
  2117. * ENTRIES_PER_BIN_COUNT)
  2118. */
  2119. typedef struct {
  2120. htt_tlv_hdr_t tlv_hdr;
  2121. A_UINT32 fw2wbm_ring_full_hist[1];
  2122. } htt_tx_de_fw2wbm_ring_full_hist_tlv;
  2123. typedef struct {
  2124. htt_tlv_hdr_t tlv_hdr;
  2125. /* BIT [ 7 : 0] :- mac_id
  2126. * BIT [31 : 8] :- reserved
  2127. */
  2128. A_UINT32 mac_id__word;
  2129. /* Global Stats */
  2130. A_UINT32 tcl2fw_entry_count;
  2131. A_UINT32 not_to_fw;
  2132. A_UINT32 invalid_pdev_vdev_peer;
  2133. A_UINT32 tcl_res_invalid_addrx;
  2134. A_UINT32 wbm2fw_entry_count;
  2135. A_UINT32 invalid_pdev;
  2136. A_UINT32 tcl_res_addrx_timeout;
  2137. A_UINT32 invalid_vdev;
  2138. A_UINT32 invalid_tcl_exp_frame_desc;
  2139. } htt_tx_de_cmn_stats_tlv;
  2140. /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_DE_INFO
  2141. * TLV_TAGS:
  2142. * - HTT_STATS_TX_DE_CMN_TAG
  2143. * - HTT_STATS_TX_DE_FW2WBM_RING_FULL_HIST_TAG
  2144. * - HTT_STATS_TX_DE_EAPOL_PACKETS_TAG
  2145. * - HTT_STATS_TX_DE_CLASSIFY_STATS_TAG
  2146. * - HTT_STATS_TX_DE_CLASSIFY_FAILED_TAG
  2147. * - HTT_STATS_TX_DE_CLASSIFY_STATUS_TAG
  2148. * - HTT_STATS_TX_DE_ENQUEUE_PACKETS_TAG
  2149. * - HTT_STATS_TX_DE_ENQUEUE_DISCARD_TAG
  2150. * - HTT_STATS_TX_DE_COMPL_STATS_TAG
  2151. */
  2152. /* NOTE:
  2153. * This structure is for documentation, and cannot be safely used directly.
  2154. * Instead, use the constituent TLV structures to fill/parse.
  2155. */
  2156. typedef struct {
  2157. htt_tx_de_cmn_stats_tlv cmn_tlv;
  2158. htt_tx_de_fw2wbm_ring_full_hist_tlv fw2wbm_hist_tlv;
  2159. htt_tx_de_eapol_packets_stats_tlv eapol_stats_tlv;
  2160. htt_tx_de_classify_stats_tlv classify_stats_tlv;
  2161. htt_tx_de_classify_failed_stats_tlv classify_failed_tlv;
  2162. htt_tx_de_classify_status_stats_tlv classify_status_rlv;
  2163. htt_tx_de_enqueue_packets_stats_tlv enqueue_packets_tlv;
  2164. htt_tx_de_enqueue_discard_stats_tlv enqueue_discard_tlv;
  2165. htt_tx_de_compl_stats_tlv comp_status_tlv;
  2166. } htt_tx_de_stats_t;
  2167. /* == RING-IF STATS == */
  2168. /* DWORD num_elems__prefetch_tail_idx */
  2169. #define HTT_RING_IF_STATS_NUM_ELEMS_M 0x0000ffff
  2170. #define HTT_RING_IF_STATS_NUM_ELEMS_S 0
  2171. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_M 0xffff0000
  2172. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_S 16
  2173. #define HTT_RING_IF_STATS_NUM_ELEMS_GET(_var) \
  2174. (((_var) & HTT_RING_IF_STATS_NUM_ELEMS_M) >> \
  2175. HTT_RING_IF_STATS_NUM_ELEMS_S)
  2176. #define HTT_RING_IF_STATS_NUM_ELEMS_SET(_var, _val) \
  2177. do { \
  2178. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_NUM_ELEMS, _val); \
  2179. ((_var) |= ((_val) << HTT_RING_IF_STATS_NUM_ELEMS_S)); \
  2180. } while (0)
  2181. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_GET(_var) \
  2182. (((_var) & HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_M) >> \
  2183. HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_S)
  2184. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_SET(_var, _val) \
  2185. do { \
  2186. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_PREFETCH_TAIL_IDX, _val); \
  2187. ((_var) |= ((_val) << HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_S)); \
  2188. } while (0)
  2189. /* DWORD head_idx__tail_idx */
  2190. #define HTT_RING_IF_STATS_HEAD_IDX_M 0x0000ffff
  2191. #define HTT_RING_IF_STATS_HEAD_IDX_S 0
  2192. #define HTT_RING_IF_STATS_TAIL_IDX_M 0xffff0000
  2193. #define HTT_RING_IF_STATS_TAIL_IDX_S 16
  2194. #define HTT_RING_IF_STATS_HEAD_IDX_GET(_var) \
  2195. (((_var) & HTT_RING_IF_STATS_HEAD_IDX_M) >> \
  2196. HTT_RING_IF_STATS_HEAD_IDX_S)
  2197. #define HTT_RING_IF_STATS_HEAD_IDX_SET(_var, _val) \
  2198. do { \
  2199. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_HEAD_IDX, _val); \
  2200. ((_var) |= ((_val) << HTT_RING_IF_STATS_HEAD_IDX_S)); \
  2201. } while (0)
  2202. #define HTT_RING_IF_STATS_TAIL_IDX_GET(_var) \
  2203. (((_var) & HTT_RING_IF_STATS_TAIL_IDX_M) >> \
  2204. HTT_RING_IF_STATS_TAIL_IDX_S)
  2205. #define HTT_RING_IF_STATS_TAIL_IDX_SET(_var, _val) \
  2206. do { \
  2207. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_TAIL_IDX, _val); \
  2208. ((_var) |= ((_val) << HTT_RING_IF_STATS_TAIL_IDX_S)); \
  2209. } while (0)
  2210. /* DWORD shadow_head_idx__shadow_tail_idx */
  2211. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_M 0x0000ffff
  2212. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_S 0
  2213. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_M 0xffff0000
  2214. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_S 16
  2215. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_GET(_var) \
  2216. (((_var) & HTT_RING_IF_STATS_SHADOW_HEAD_IDX_M) >> \
  2217. HTT_RING_IF_STATS_SHADOW_HEAD_IDX_S)
  2218. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_SET(_var, _val) \
  2219. do { \
  2220. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_SHADOW_HEAD_IDX, _val); \
  2221. ((_var) |= ((_val) << HTT_RING_IF_STATS_SHADOW_HEAD_IDX_S)); \
  2222. } while (0)
  2223. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_GET(_var) \
  2224. (((_var) & HTT_RING_IF_STATS_SHADOW_TAIL_IDX_M) >> \
  2225. HTT_RING_IF_STATS_SHADOW_TAIL_IDX_S)
  2226. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_SET(_var, _val) \
  2227. do { \
  2228. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_SHADOW_TAIL_IDX, _val); \
  2229. ((_var) |= ((_val) << HTT_RING_IF_STATS_SHADOW_TAIL_IDX_S)); \
  2230. } while (0)
  2231. /* DWORD lwm_thresh__hwm_thresh */
  2232. #define HTT_RING_IF_STATS_LWM_THRESHOLD_M 0x0000ffff
  2233. #define HTT_RING_IF_STATS_LWM_THRESHOLD_S 0
  2234. #define HTT_RING_IF_STATS_HWM_THRESHOLD_M 0xffff0000
  2235. #define HTT_RING_IF_STATS_HWM_THRESHOLD_S 16
  2236. #define HTT_RING_IF_STATS_LWM_THRESHOLD_GET(_var) \
  2237. (((_var) & HTT_RING_IF_STATS_LWM_THRESHOLD_M) >> \
  2238. HTT_RING_IF_STATS_LWM_THRESHOLD_S)
  2239. #define HTT_RING_IF_STATS_LWM_THRESHOLD_SET(_var, _val) \
  2240. do { \
  2241. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_LWM_THRESHOLD, _val); \
  2242. ((_var) |= ((_val) << HTT_RING_IF_STATS_LWM_THRESHOLD_S)); \
  2243. } while (0)
  2244. #define HTT_RING_IF_STATS_HWM_THRESHOLD_GET(_var) \
  2245. (((_var) & HTT_RING_IF_STATS_HWM_THRESHOLD_M) >> \
  2246. HTT_RING_IF_STATS_HWM_THRESHOLD_S)
  2247. #define HTT_RING_IF_STATS_HWM_THRESHOLD_SET(_var, _val) \
  2248. do { \
  2249. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_HWM_THRESHOLD, _val); \
  2250. ((_var) |= ((_val) << HTT_RING_IF_STATS_HWM_THRESHOLD_S)); \
  2251. } while (0)
  2252. #define HTT_STATS_LOW_WM_BINS 5
  2253. #define HTT_STATS_HIGH_WM_BINS 5
  2254. typedef struct {
  2255. A_UINT32 base_addr; /* DWORD aligned base memory address of the ring */
  2256. A_UINT32 elem_size; /* size of each ring element */
  2257. /* BIT [15 : 0] :- num_elems
  2258. * BIT [31 : 16] :- prefetch_tail_idx
  2259. */
  2260. A_UINT32 num_elems__prefetch_tail_idx;
  2261. /* BIT [15 : 0] :- head_idx
  2262. * BIT [31 : 16] :- tail_idx
  2263. */
  2264. A_UINT32 head_idx__tail_idx;
  2265. /* BIT [15 : 0] :- shadow_head_idx
  2266. * BIT [31 : 16] :- shadow_tail_idx
  2267. */
  2268. A_UINT32 shadow_head_idx__shadow_tail_idx;
  2269. A_UINT32 num_tail_incr;
  2270. /* BIT [15 : 0] :- lwm_thresh
  2271. * BIT [31 : 16] :- hwm_thresh
  2272. */
  2273. A_UINT32 lwm_thresh__hwm_thresh;
  2274. A_UINT32 overrun_hit_count;
  2275. A_UINT32 underrun_hit_count;
  2276. A_UINT32 prod_blockwait_count;
  2277. A_UINT32 cons_blockwait_count;
  2278. A_UINT32 low_wm_hit_count[HTT_STATS_LOW_WM_BINS]; /* FIX THIS: explain what each array element is for */
  2279. A_UINT32 high_wm_hit_count[HTT_STATS_HIGH_WM_BINS]; /* FIX THIS: explain what each array element is for */
  2280. } htt_ring_if_stats_tlv;
  2281. #define HTT_RING_IF_CMN_MAC_ID_M 0x000000ff
  2282. #define HTT_RING_IF_CMN_MAC_ID_S 0
  2283. #define HTT_RING_IF_CMN_MAC_ID_GET(_var) \
  2284. (((_var) & HTT_RING_IF_CMN_MAC_ID_M) >> \
  2285. HTT_RING_IF_CMN_MAC_ID_S)
  2286. #define HTT_RING_IF_CMN_MAC_ID_SET(_var, _val) \
  2287. do { \
  2288. HTT_CHECK_SET_VAL(HTT_RING_IF_CMN_MAC_ID, _val); \
  2289. ((_var) |= ((_val) << HTT_RING_IF_CMN_MAC_ID_S)); \
  2290. } while (0)
  2291. typedef struct {
  2292. htt_tlv_hdr_t tlv_hdr;
  2293. /* BIT [ 7 : 0] :- mac_id
  2294. * BIT [31 : 8] :- reserved
  2295. */
  2296. A_UINT32 mac_id__word;
  2297. A_UINT32 num_records;
  2298. } htt_ring_if_cmn_tlv;
  2299. /* STATS_TYPE : HTT_DBG_EXT_STATS_RING_IF_INFO
  2300. * TLV_TAGS:
  2301. * - HTT_STATS_RING_IF_CMN_TAG
  2302. * - HTT_STATS_STRING_TAG
  2303. * - HTT_STATS_RING_IF_TAG
  2304. */
  2305. /* NOTE:
  2306. * This structure is for documentation, and cannot be safely used directly.
  2307. * Instead, use the constituent TLV structures to fill/parse.
  2308. */
  2309. typedef struct {
  2310. htt_ring_if_cmn_tlv cmn_tlv;
  2311. /* Variable based on the Number of records. */
  2312. struct _ring_if {
  2313. htt_stats_string_tlv ring_str_tlv;
  2314. htt_ring_if_stats_tlv ring_tlv;
  2315. } r[1];
  2316. } htt_ring_if_stats_t;
  2317. /* == SFM STATS == */
  2318. #define HTT_SFM_CLIENT_USER_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2319. /* NOTE: Variable length TLV, use length spec to infer array size */
  2320. typedef struct {
  2321. htt_tlv_hdr_t tlv_hdr;
  2322. /* Number of DWORDS used per user and per client */
  2323. A_UINT32 dwords_used_by_user_n[1];
  2324. } htt_sfm_client_user_tlv_v;
  2325. typedef struct {
  2326. htt_tlv_hdr_t tlv_hdr;
  2327. /* Client ID */
  2328. A_UINT32 client_id;
  2329. /* Minimum number of buffers */
  2330. A_UINT32 buf_min;
  2331. /* Maximum number of buffers */
  2332. A_UINT32 buf_max;
  2333. /* Number of Busy buffers */
  2334. A_UINT32 buf_busy;
  2335. /* Number of Allocated buffers */
  2336. A_UINT32 buf_alloc;
  2337. /* Number of Available/Usable buffers */
  2338. A_UINT32 buf_avail;
  2339. /* Number of users */
  2340. A_UINT32 num_users;
  2341. } htt_sfm_client_tlv;
  2342. #define HTT_SFM_CMN_MAC_ID_M 0x000000ff
  2343. #define HTT_SFM_CMN_MAC_ID_S 0
  2344. #define HTT_SFM_CMN_MAC_ID_GET(_var) \
  2345. (((_var) & HTT_SFM_CMN_MAC_ID_M) >> \
  2346. HTT_SFM_CMN_MAC_ID_S)
  2347. #define HTT_SFM_CMN_MAC_ID_SET(_var, _val) \
  2348. do { \
  2349. HTT_CHECK_SET_VAL(HTT_SFM_CMN_MAC_ID, _val); \
  2350. ((_var) |= ((_val) << HTT_SFM_CMN_MAC_ID_S)); \
  2351. } while (0)
  2352. typedef struct {
  2353. htt_tlv_hdr_t tlv_hdr;
  2354. /* BIT [ 7 : 0] :- mac_id
  2355. * BIT [31 : 8] :- reserved
  2356. */
  2357. A_UINT32 mac_id__word;
  2358. /* Indicates the total number of 128 byte buffers in the CMEM that are available for buffer sharing */
  2359. A_UINT32 buf_total;
  2360. /* Indicates for certain client or all the clients there is no dowrd saved in SFM, refer to SFM_R1_MEM_EMPTY */
  2361. A_UINT32 mem_empty;
  2362. /* DEALLOCATE_BUFFERS, refer to register SFM_R0_DEALLOCATE_BUFFERS */
  2363. A_UINT32 deallocate_bufs;
  2364. /* Number of Records */
  2365. A_UINT32 num_records;
  2366. } htt_sfm_cmn_tlv;
  2367. /* STATS_TYPE : HTT_DBG_EXT_STATS_RING_IF_INFO
  2368. * TLV_TAGS:
  2369. * - HTT_STATS_SFM_CMN_TAG
  2370. * - HTT_STATS_STRING_TAG
  2371. * - HTT_STATS_SFM_CLIENT_TAG
  2372. * - HTT_STATS_SFM_CLIENT_USER_TAG
  2373. */
  2374. /* NOTE:
  2375. * This structure is for documentation, and cannot be safely used directly.
  2376. * Instead, use the constituent TLV structures to fill/parse.
  2377. */
  2378. typedef struct {
  2379. htt_sfm_cmn_tlv cmn_tlv;
  2380. /* Variable based on the Number of records. */
  2381. struct _sfm_client {
  2382. htt_stats_string_tlv client_str_tlv;
  2383. htt_sfm_client_tlv client_tlv;
  2384. htt_sfm_client_user_tlv_v user_tlv;
  2385. } r[1];
  2386. } htt_sfm_stats_t;
  2387. /* == SRNG STATS == */
  2388. /* DWORD mac_id__ring_id__arena__ep */
  2389. #define HTT_SRING_STATS_MAC_ID_M 0x000000ff
  2390. #define HTT_SRING_STATS_MAC_ID_S 0
  2391. #define HTT_SRING_STATS_RING_ID_M 0x0000ff00
  2392. #define HTT_SRING_STATS_RING_ID_S 8
  2393. #define HTT_SRING_STATS_ARENA_M 0x00ff0000
  2394. #define HTT_SRING_STATS_ARENA_S 16
  2395. #define HTT_SRING_STATS_EP_TYPE_M 0x01000000
  2396. #define HTT_SRING_STATS_EP_TYPE_S 24
  2397. #define HTT_SRING_STATS_MAC_ID_GET(_var) \
  2398. (((_var) & HTT_SRING_STATS_MAC_ID_M) >> \
  2399. HTT_SRING_STATS_MAC_ID_S)
  2400. #define HTT_SRING_STATS_MAC_ID_SET(_var, _val) \
  2401. do { \
  2402. HTT_CHECK_SET_VAL(HTT_SRING_STATS_MAC_ID, _val); \
  2403. ((_var) |= ((_val) << HTT_SRING_STATS_MAC_ID_S)); \
  2404. } while (0)
  2405. #define HTT_SRING_STATS_RING_ID_GET(_var) \
  2406. (((_var) & HTT_SRING_STATS_RING_ID_M) >> \
  2407. HTT_SRING_STATS_RING_ID_S)
  2408. #define HTT_SRING_STATS_RING_ID_SET(_var, _val) \
  2409. do { \
  2410. HTT_CHECK_SET_VAL(HTT_SRING_STATS_RING_ID, _val); \
  2411. ((_var) |= ((_val) << HTT_SRING_STATS_RING_ID_S)); \
  2412. } while (0)
  2413. #define HTT_SRING_STATS_ARENA_GET(_var) \
  2414. (((_var) & HTT_SRING_STATS_ARENA_M) >> \
  2415. HTT_SRING_STATS_ARENA_S)
  2416. #define HTT_SRING_STATS_ARENA_SET(_var, _val) \
  2417. do { \
  2418. HTT_CHECK_SET_VAL(HTT_SRING_STATS_ARENA, _val); \
  2419. ((_var) |= ((_val) << HTT_SRING_STATS_ARENA_S)); \
  2420. } while (0)
  2421. #define HTT_SRING_STATS_EP_TYPE_GET(_var) \
  2422. (((_var) & HTT_SRING_STATS_EP_TYPE_M) >> \
  2423. HTT_SRING_STATS_EP_TYPE_S)
  2424. #define HTT_SRING_STATS_EP_TYPE_SET(_var, _val) \
  2425. do { \
  2426. HTT_CHECK_SET_VAL(HTT_SRING_STATS_EP_TYPE, _val); \
  2427. ((_var) |= ((_val) << HTT_SRING_STATS_EP_TYPE_S)); \
  2428. } while (0)
  2429. /* DWORD num_avail_words__num_valid_words */
  2430. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_M 0x0000ffff
  2431. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_S 0
  2432. #define HTT_SRING_STATS_NUM_VALID_WORDS_M 0xffff0000
  2433. #define HTT_SRING_STATS_NUM_VALID_WORDS_S 16
  2434. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_GET(_var) \
  2435. (((_var) & HTT_SRING_STATS_NUM_AVAIL_WORDS_M) >> \
  2436. HTT_SRING_STATS_NUM_AVAIL_WORDS_S)
  2437. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_SET(_var, _val) \
  2438. do { \
  2439. HTT_CHECK_SET_VAL(HTT_SRING_STATS_NUM_AVAIL_WORDS, _val); \
  2440. ((_var) |= ((_val) << HTT_SRING_STATS_NUM_AVAIL_WORDS_S)); \
  2441. } while (0)
  2442. #define HTT_SRING_STATS_NUM_VALID_WORDS_GET(_var) \
  2443. (((_var) & HTT_SRING_STATS_NUM_VALID_WORDS_M) >> \
  2444. HTT_SRING_STATS_NUM_VALID_WORDS_S)
  2445. #define HTT_SRING_STATS_NUM_VALID_WORDS_SET(_var, _val) \
  2446. do { \
  2447. HTT_CHECK_SET_VAL(HTT_SRING_STATS_NUM_VALID_WORDS, _val); \
  2448. ((_var) |= ((_val) << HTT_SRING_STATS_NUM_VALID_WORDS_S)); \
  2449. } while (0)
  2450. /* DWORD head_ptr__tail_ptr */
  2451. #define HTT_SRING_STATS_HEAD_PTR_M 0x0000ffff
  2452. #define HTT_SRING_STATS_HEAD_PTR_S 0
  2453. #define HTT_SRING_STATS_TAIL_PTR_M 0xffff0000
  2454. #define HTT_SRING_STATS_TAIL_PTR_S 16
  2455. #define HTT_SRING_STATS_HEAD_PTR_GET(_var) \
  2456. (((_var) & HTT_SRING_STATS_HEAD_PTR_M) >> \
  2457. HTT_SRING_STATS_HEAD_PTR_S)
  2458. #define HTT_SRING_STATS_HEAD_PTR_SET(_var, _val) \
  2459. do { \
  2460. HTT_CHECK_SET_VAL(HTT_SRING_STATS_HEAD_PTR, _val); \
  2461. ((_var) |= ((_val) << HTT_SRING_STATS_HEAD_PTR_S)); \
  2462. } while (0)
  2463. #define HTT_SRING_STATS_TAIL_PTR_GET(_var) \
  2464. (((_var) & HTT_SRING_STATS_TAIL_PTR_M) >> \
  2465. HTT_SRING_STATS_TAIL_PTR_S)
  2466. #define HTT_SRING_STATS_TAIL_PTR_SET(_var, _val) \
  2467. do { \
  2468. HTT_CHECK_SET_VAL(HTT_SRING_STATS_TAIL_PTR, _val); \
  2469. ((_var) |= ((_val) << HTT_SRING_STATS_TAIL_PTR_S)); \
  2470. } while (0)
  2471. /* DWORD consumer_empty__producer_full */
  2472. #define HTT_SRING_STATS_CONSUMER_EMPTY_M 0x0000ffff
  2473. #define HTT_SRING_STATS_CONSUMER_EMPTY_S 0
  2474. #define HTT_SRING_STATS_PRODUCER_FULL_M 0xffff0000
  2475. #define HTT_SRING_STATS_PRODUCER_FULL_S 16
  2476. #define HTT_SRING_STATS_CONSUMER_EMPTY_GET(_var) \
  2477. (((_var) & HTT_SRING_STATS_CONSUMER_EMPTY_M) >> \
  2478. HTT_SRING_STATS_CONSUMER_EMPTY_S)
  2479. #define HTT_SRING_STATS_CONSUMER_EMPTY_SET(_var, _val) \
  2480. do { \
  2481. HTT_CHECK_SET_VAL(HTT_SRING_STATS_CONSUMER_EMPTY, _val); \
  2482. ((_var) |= ((_val) << HTT_SRING_STATS_CONSUMER_EMPTY_S)); \
  2483. } while (0)
  2484. #define HTT_SRING_STATS_PRODUCER_FULL_GET(_var) \
  2485. (((_var) & HTT_SRING_STATS_PRODUCER_FULL_M) >> \
  2486. HTT_SRING_STATS_PRODUCER_FULL_S)
  2487. #define HTT_SRING_STATS_PRODUCER_FULL_SET(_var, _val) \
  2488. do { \
  2489. HTT_CHECK_SET_VAL(HTT_SRING_STATS_PRODUCER_FULL, _val); \
  2490. ((_var) |= ((_val) << HTT_SRING_STATS_PRODUCER_FULL_S)); \
  2491. } while (0)
  2492. /* DWORD prefetch_count__internal_tail_ptr */
  2493. #define HTT_SRING_STATS_PREFETCH_COUNT_M 0x0000ffff
  2494. #define HTT_SRING_STATS_PREFETCH_COUNT_S 0
  2495. #define HTT_SRING_STATS_INTERNAL_TP_M 0xffff0000
  2496. #define HTT_SRING_STATS_INTERNAL_TP_S 16
  2497. #define HTT_SRING_STATS_PREFETCH_COUNT_GET(_var) \
  2498. (((_var) & HTT_SRING_STATS_PREFETCH_COUNT_M) >> \
  2499. HTT_SRING_STATS_PREFETCH_COUNT_S)
  2500. #define HTT_SRING_STATS_PREFETCH_COUNT_SET(_var, _val) \
  2501. do { \
  2502. HTT_CHECK_SET_VAL(HTT_SRING_STATS_PREFETCH_COUNT, _val); \
  2503. ((_var) |= ((_val) << HTT_SRING_STATS_PREFETCH_COUNT_S)); \
  2504. } while (0)
  2505. #define HTT_SRING_STATS_INTERNAL_TP_GET(_var) \
  2506. (((_var) & HTT_SRING_STATS_INTERNAL_TP_M) >> \
  2507. HTT_SRING_STATS_INTERNAL_TP_S)
  2508. #define HTT_SRING_STATS_INTERNAL_TP_SET(_var, _val) \
  2509. do { \
  2510. HTT_CHECK_SET_VAL(HTT_SRING_STATS_INTERNAL_TP, _val); \
  2511. ((_var) |= ((_val) << HTT_SRING_STATS_INTERNAL_TP_S)); \
  2512. } while (0)
  2513. typedef struct {
  2514. htt_tlv_hdr_t tlv_hdr;
  2515. /* BIT [ 7 : 0] :- mac_id
  2516. * BIT [15 : 8] :- ring_id
  2517. * BIT [23 : 16] :- arena 0 -SRING_HRAM, 1 - SRING_HCRAM, 2 - SRING_HW2HW.
  2518. * BIT [24 : 24] :- EP 0 -consumer, 1 - producer
  2519. * BIT [31 : 25] :- reserved
  2520. */
  2521. A_UINT32 mac_id__ring_id__arena__ep;
  2522. A_UINT32 base_addr_lsb; /* DWORD aligned base memory address of the ring */
  2523. A_UINT32 base_addr_msb;
  2524. A_UINT32 ring_size; /* size of ring */
  2525. A_UINT32 elem_size; /* size of each ring element */
  2526. /* Ring status */
  2527. /* BIT [15 : 0] :- num_avail_words
  2528. * BIT [31 : 16] :- num_valid_words
  2529. */
  2530. A_UINT32 num_avail_words__num_valid_words;
  2531. /* Index of head and tail */
  2532. /* BIT [15 : 0] :- head_ptr
  2533. * BIT [31 : 16] :- tail_ptr
  2534. */
  2535. A_UINT32 head_ptr__tail_ptr;
  2536. /* Empty or full counter of rings */
  2537. /* BIT [15 : 0] :- consumer_empty
  2538. * BIT [31 : 16] :- producer_full
  2539. */
  2540. A_UINT32 consumer_empty__producer_full;
  2541. /* Prefetch status of consumer ring */
  2542. /* BIT [15 : 0] :- prefetch_count
  2543. * BIT [31 : 16] :- internal_tail_ptr
  2544. */
  2545. A_UINT32 prefetch_count__internal_tail_ptr;
  2546. } htt_sring_stats_tlv;
  2547. typedef struct {
  2548. htt_tlv_hdr_t tlv_hdr;
  2549. A_UINT32 num_records;
  2550. } htt_sring_cmn_tlv;
  2551. /* STATS_TYPE : HTT_DBG_EXT_STATS_SRNG_INFO
  2552. * TLV_TAGS:
  2553. * - HTT_STATS_SRING_CMN_TAG
  2554. * - HTT_STATS_STRING_TAG
  2555. * - HTT_STATS_SRING_STATS_TAG
  2556. */
  2557. /* NOTE:
  2558. * This structure is for documentation, and cannot be safely used directly.
  2559. * Instead, use the constituent TLV structures to fill/parse.
  2560. */
  2561. typedef struct {
  2562. htt_sring_cmn_tlv cmn_tlv;
  2563. /* Variable based on the Number of records. */
  2564. struct _sring_stats {
  2565. htt_stats_string_tlv sring_str_tlv;
  2566. htt_sring_stats_tlv sring_stats_tlv;
  2567. } r[1];
  2568. } htt_sring_stats_t;
  2569. /* == PDEV TX RATE CTRL STATS == */
  2570. #define HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS 12
  2571. #define HTT_TX_PDEV_STATS_NUM_GI_COUNTERS 4
  2572. #define HTT_TX_PDEV_STATS_NUM_DCM_COUNTERS 5
  2573. #define HTT_TX_PDEV_STATS_NUM_BW_COUNTERS 4
  2574. #define HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS 8
  2575. #define HTT_TX_PDEV_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  2576. #define HTT_TX_PDEV_STATS_NUM_LEGACY_CCK_STATS 4
  2577. #define HTT_TX_PDEV_STATS_NUM_LEGACY_OFDM_STATS 8
  2578. #define HTT_TX_PDEV_STATS_NUM_LTF 4
  2579. #define HTT_TX_PDEV_STATS_NUM_11AX_TRIGGER_TYPES 6
  2580. #define HTT_TX_NUM_OF_SOUNDING_STATS_WORDS \
  2581. (HTT_TX_PDEV_STATS_NUM_BW_COUNTERS * \
  2582. HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS)
  2583. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_M 0x000000ff
  2584. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_S 0
  2585. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_GET(_var) \
  2586. (((_var) & HTT_TX_PDEV_RATE_STATS_MAC_ID_M) >> \
  2587. HTT_TX_PDEV_RATE_STATS_MAC_ID_S)
  2588. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_SET(_var, _val) \
  2589. do { \
  2590. HTT_CHECK_SET_VAL(HTT_TX_PDEV_RATE_STATS_MAC_ID, _val); \
  2591. ((_var) |= ((_val) << HTT_TX_PDEV_RATE_STATS_MAC_ID_S)); \
  2592. } while (0)
  2593. typedef struct {
  2594. htt_tlv_hdr_t tlv_hdr;
  2595. /* BIT [ 7 : 0] :- mac_id
  2596. * BIT [31 : 8] :- reserved
  2597. */
  2598. A_UINT32 mac_id__word;
  2599. /* Number of tx ldpc packets */
  2600. A_UINT32 tx_ldpc;
  2601. /* Number of tx rts packets */
  2602. A_UINT32 rts_cnt;
  2603. /* RSSI value of last ack packet (units = dB above noise floor) */
  2604. A_UINT32 ack_rssi;
  2605. A_UINT32 tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2606. /* tx_xx_mcs: currently unused */
  2607. A_UINT32 tx_su_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2608. A_UINT32 tx_mu_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2609. A_UINT32 tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS]; /* element 0,1, ...7 -> NSS 1,2, ...8 */
  2610. A_UINT32 tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS]; /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
  2611. A_UINT32 tx_stbc[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2612. A_UINT32 tx_pream[HTT_TX_PDEV_STATS_NUM_PREAMBLE_TYPES];
  2613. /* Counters to track number of tx packets in each GI (400us, 800us, 1600us & 3200us) in each mcs (0-11) */
  2614. A_UINT32 tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2615. /* Counters to track packets in dcm mcs (MCS 0, 1, 3, 4) */
  2616. A_UINT32 tx_dcm[HTT_TX_PDEV_STATS_NUM_DCM_COUNTERS];
  2617. /* Number of CTS-acknowledged RTS packets */
  2618. A_UINT32 rts_success;
  2619. /*
  2620. * Counters for legacy 11a and 11b transmissions.
  2621. *
  2622. * The index corresponds to:
  2623. *
  2624. * CCK: 0: 1 Mbps, 1: 2 Mbps, 2: 5.5 Mbps, 3: 11 Mbps
  2625. *
  2626. * OFDM: 0: 6 Mbps, 1: 9 Mbps, 2: 12 Mbps, 3: 18 Mbps,
  2627. * 4: 24 Mbps, 5: 36 Mbps, 6: 48 Mbps, 7: 54 Mbps
  2628. */
  2629. A_UINT32 tx_legacy_cck_rate[HTT_TX_PDEV_STATS_NUM_LEGACY_CCK_STATS];
  2630. A_UINT32 tx_legacy_ofdm_rate[HTT_TX_PDEV_STATS_NUM_LEGACY_OFDM_STATS];
  2631. A_UINT32 ac_mu_mimo_tx_ldpc;
  2632. A_UINT32 ax_mu_mimo_tx_ldpc;
  2633. A_UINT32 ofdma_tx_ldpc;
  2634. /*
  2635. * Counters for 11ax HE LTF selection during TX.
  2636. *
  2637. * The index corresponds to:
  2638. *
  2639. * 0: unused, 1: 1x LTF, 2: 2x LTF, 3: 4x LTF
  2640. */
  2641. A_UINT32 tx_he_ltf[HTT_TX_PDEV_STATS_NUM_LTF];
  2642. A_UINT32 ac_mu_mimo_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2643. A_UINT32 ax_mu_mimo_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2644. A_UINT32 ofdma_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2645. A_UINT32 ac_mu_mimo_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  2646. A_UINT32 ax_mu_mimo_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  2647. A_UINT32 ofdma_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  2648. A_UINT32 ac_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  2649. A_UINT32 ax_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  2650. A_UINT32 ofdma_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  2651. A_UINT32 ac_mu_mimo_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2652. A_UINT32 ax_mu_mimo_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2653. A_UINT32 ofdma_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2654. A_UINT32 trigger_type_11ax[HTT_TX_PDEV_STATS_NUM_11AX_TRIGGER_TYPES];
  2655. A_UINT32 tx_11ax_su_ext;
  2656. } htt_tx_pdev_rate_stats_tlv;
  2657. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_RATE
  2658. * TLV_TAGS:
  2659. * - HTT_STATS_TX_PDEV_RATE_STATS_TAG
  2660. */
  2661. /* NOTE:
  2662. * This structure is for documentation, and cannot be safely used directly.
  2663. * Instead, use the constituent TLV structures to fill/parse.
  2664. */
  2665. typedef struct {
  2666. htt_tx_pdev_rate_stats_tlv rate_tlv;
  2667. } htt_tx_pdev_rate_stats_t;
  2668. /* == PDEV RX RATE CTRL STATS == */
  2669. #define HTT_RX_PDEV_STATS_NUM_LEGACY_CCK_STATS 4
  2670. #define HTT_RX_PDEV_STATS_NUM_LEGACY_OFDM_STATS 8
  2671. #define HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS 12
  2672. #define HTT_RX_PDEV_STATS_NUM_GI_COUNTERS 4
  2673. #define HTT_RX_PDEV_STATS_NUM_DCM_COUNTERS 5
  2674. #define HTT_RX_PDEV_STATS_NUM_BW_COUNTERS 4
  2675. #define HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS 8
  2676. #define HTT_RX_PDEV_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  2677. #define HTT_RX_PDEV_MAX_OFDMA_NUM_USER 8
  2678. #define HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER 8
  2679. #define HTT_RX_PDEV_STATS_RXEVM_MAX_PILOTS_PER_NSS 16
  2680. #define HTT_RX_PDEV_STATS_NUM_RU_SIZE_COUNTERS 6
  2681. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_M 0x000000ff
  2682. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_S 0
  2683. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_GET(_var) \
  2684. (((_var) & HTT_RX_PDEV_RATE_STATS_MAC_ID_M) >> \
  2685. HTT_RX_PDEV_RATE_STATS_MAC_ID_S)
  2686. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_SET(_var, _val) \
  2687. do { \
  2688. HTT_CHECK_SET_VAL(HTT_RX_PDEV_RATE_STATS_MAC_ID, _val); \
  2689. ((_var) |= ((_val) << HTT_RX_PDEV_RATE_STATS_MAC_ID_S)); \
  2690. } while (0)
  2691. typedef struct {
  2692. htt_tlv_hdr_t tlv_hdr;
  2693. /* BIT [ 7 : 0] :- mac_id
  2694. * BIT [31 : 8] :- reserved
  2695. */
  2696. A_UINT32 mac_id__word;
  2697. A_UINT32 nsts;
  2698. /* Number of rx ldpc packets */
  2699. A_UINT32 rx_ldpc;
  2700. /* Number of rx rts packets */
  2701. A_UINT32 rts_cnt;
  2702. A_UINT32 rssi_mgmt; /* units = dB above noise floor */
  2703. A_UINT32 rssi_data; /* units = dB above noise floor */
  2704. A_UINT32 rssi_comb; /* units = dB above noise floor */
  2705. A_UINT32 rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2706. A_UINT32 rx_nss[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS]; /* element 0,1, ...7 -> NSS 1,2, ...8 */
  2707. A_UINT32 rx_dcm[HTT_RX_PDEV_STATS_NUM_DCM_COUNTERS];
  2708. A_UINT32 rx_stbc[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2709. A_UINT32 rx_bw[HTT_RX_PDEV_STATS_NUM_BW_COUNTERS]; /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
  2710. A_UINT32 rx_pream[HTT_RX_PDEV_STATS_NUM_PREAMBLE_TYPES];
  2711. A_UINT8 rssi_chain[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS]; /* units = dB above noise floor */
  2712. /* Counters to track number of rx packets in each GI in each mcs (0-11) */
  2713. A_UINT32 rx_gi[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2714. A_INT32 rssi_in_dbm; /* rx Signal Strength value in dBm unit */
  2715. A_UINT32 rx_11ax_su_ext;
  2716. A_UINT32 rx_11ac_mumimo;
  2717. A_UINT32 rx_11ax_mumimo;
  2718. A_UINT32 rx_11ax_ofdma;
  2719. A_UINT32 txbf;
  2720. A_UINT32 rx_legacy_cck_rate[HTT_RX_PDEV_STATS_NUM_LEGACY_CCK_STATS];
  2721. A_UINT32 rx_legacy_ofdm_rate[HTT_RX_PDEV_STATS_NUM_LEGACY_OFDM_STATS];
  2722. A_UINT32 rx_active_dur_us_low;
  2723. A_UINT32 rx_active_dur_us_high;
  2724. A_UINT32 rx_11ax_ul_ofdma;
  2725. A_UINT32 ul_ofdma_rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2726. A_UINT32 ul_ofdma_rx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2727. A_UINT32 ul_ofdma_rx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  2728. A_UINT32 ul_ofdma_rx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  2729. A_UINT32 ul_ofdma_rx_stbc;
  2730. A_UINT32 ul_ofdma_rx_ldpc;
  2731. /* record the stats for each user index */
  2732. A_UINT32 rx_ulofdma_non_data_ppdu[HTT_RX_PDEV_MAX_OFDMA_NUM_USER]; /* ppdu level */
  2733. A_UINT32 rx_ulofdma_data_ppdu[HTT_RX_PDEV_MAX_OFDMA_NUM_USER]; /* ppdu level */
  2734. A_UINT32 rx_ulofdma_mpdu_ok[HTT_RX_PDEV_MAX_OFDMA_NUM_USER]; /* mpdu level */
  2735. A_UINT32 rx_ulofdma_mpdu_fail[HTT_RX_PDEV_MAX_OFDMA_NUM_USER]; /* mpdu level */
  2736. A_UINT32 nss_count;
  2737. A_UINT32 pilot_count;
  2738. /* RxEVM stats in dB */
  2739. A_INT32 rx_pilot_evm_dB[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_RXEVM_MAX_PILOTS_PER_NSS];
  2740. /* rx_pilot_evm_dB_mean:
  2741. * EVM mean across pilots, computed as
  2742. * mean(10*log10(rx_pilot_evm_linear)) = mean(rx_pilot_evm_dB)
  2743. */
  2744. A_INT32 rx_pilot_evm_dB_mean[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  2745. A_INT8 rx_ul_fd_rssi[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_MAX_OFDMA_NUM_USER]; /* dBm units */
  2746. /* per_chain_rssi_pkt_type:
  2747. * This field shows what type of rx frame the per-chain RSSI was computed
  2748. * on, by recording the frame type and sub-type as bit-fields within this
  2749. * field:
  2750. * BIT [3 : 0] :- IEEE80211_FC0_TYPE
  2751. * BIT [7 : 4] :- IEEE80211_FC0_SUBTYPE
  2752. * BIT [31 : 8] :- Reserved
  2753. */
  2754. A_UINT32 per_chain_rssi_pkt_type;
  2755. A_INT8 rx_per_chain_rssi_in_dbm[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  2756. A_UINT32 rx_su_ndpa;
  2757. A_UINT32 rx_11ax_su_txbf_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2758. A_UINT32 rx_mu_ndpa;
  2759. A_UINT32 rx_11ax_mu_txbf_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2760. A_UINT32 rx_br_poll;
  2761. A_UINT32 rx_11ax_dl_ofdma_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2762. A_UINT32 rx_11ax_dl_ofdma_ru[HTT_RX_PDEV_STATS_NUM_RU_SIZE_COUNTERS];
  2763. A_UINT32 rx_ulmumimo_non_data_ppdu[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER]; /* ppdu level */
  2764. A_UINT32 rx_ulmumimo_data_ppdu[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER]; /* ppdu level */
  2765. A_UINT32 rx_ulmumimo_mpdu_ok[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER]; /* mpdu level */
  2766. A_UINT32 rx_ulmumimo_mpdu_fail[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER]; /* mpdu level */
  2767. A_UINT32 rx_ulofdma_non_data_nusers[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  2768. A_UINT32 rx_ulofdma_data_nusers[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  2769. } htt_rx_pdev_rate_stats_tlv;
  2770. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_RX_RATE
  2771. * TLV_TAGS:
  2772. * - HTT_STATS_RX_PDEV_RATE_STATS_TAG
  2773. */
  2774. /* NOTE:
  2775. * This structure is for documentation, and cannot be safely used directly.
  2776. * Instead, use the constituent TLV structures to fill/parse.
  2777. */
  2778. typedef struct {
  2779. htt_rx_pdev_rate_stats_tlv rate_tlv;
  2780. } htt_rx_pdev_rate_stats_t;
  2781. /* == RX PDEV/SOC STATS == */
  2782. typedef struct {
  2783. htt_tlv_hdr_t tlv_hdr;
  2784. /* Num Packets received on REO FW ring */
  2785. A_UINT32 fw_reo_ring_data_msdu;
  2786. /* Num bc/mc packets indicated from fw to host */
  2787. A_UINT32 fw_to_host_data_msdu_bcmc;
  2788. /* Num unicast packets indicated from fw to host */
  2789. A_UINT32 fw_to_host_data_msdu_uc;
  2790. /* Num remote buf recycle from offload */
  2791. A_UINT32 ofld_remote_data_buf_recycle_cnt;
  2792. /* Num remote free buf given to offload */
  2793. A_UINT32 ofld_remote_free_buf_indication_cnt;
  2794. /* Num unicast packets from local path indicated to host */
  2795. A_UINT32 ofld_buf_to_host_data_msdu_uc;
  2796. /* Num unicast packets from REO indicated to host */
  2797. A_UINT32 reo_fw_ring_to_host_data_msdu_uc;
  2798. /* Num Packets received from WBM SW1 ring */
  2799. A_UINT32 wbm_sw_ring_reap;
  2800. /* Num packets from WBM forwarded from fw to host via WBM */
  2801. A_UINT32 wbm_forward_to_host_cnt;
  2802. /* Num packets from WBM recycled to target refill ring */
  2803. A_UINT32 wbm_target_recycle_cnt;
  2804. /* Total Num of recycled to refill ring, including packets from WBM and REO */
  2805. A_UINT32 target_refill_ring_recycle_cnt;
  2806. } htt_rx_soc_fw_stats_tlv;
  2807. #define HTT_RX_SOC_FW_REFILL_RING_EMPTY_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2808. /* NOTE: Variable length TLV, use length spec to infer array size */
  2809. typedef struct {
  2810. htt_tlv_hdr_t tlv_hdr;
  2811. /* Num ring empty encountered */
  2812. A_UINT32 refill_ring_empty_cnt[1]; /* HTT_RX_STATS_REFILL_MAX_RING */
  2813. } htt_rx_soc_fw_refill_ring_empty_tlv_v;
  2814. #define HTT_RX_SOC_FW_REFILL_RING_EMPTY_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2815. /* NOTE: Variable length TLV, use length spec to infer array size */
  2816. typedef struct {
  2817. htt_tlv_hdr_t tlv_hdr;
  2818. /* Num total buf refilled from refill ring */
  2819. A_UINT32 refill_ring_num_refill[1]; /* HTT_RX_STATS_REFILL_MAX_RING */
  2820. } htt_rx_soc_fw_refill_ring_num_refill_tlv_v;
  2821. /* RXDMA error code from WBM released packets */
  2822. typedef enum {
  2823. HTT_RX_RXDMA_OVERFLOW_ERR = 0,
  2824. HTT_RX_RXDMA_MPDU_LENGTH_ERR = 1,
  2825. HTT_RX_RXDMA_FCS_ERR = 2,
  2826. HTT_RX_RXDMA_DECRYPT_ERR = 3,
  2827. HTT_RX_RXDMA_TKIP_MIC_ERR = 4,
  2828. HTT_RX_RXDMA_UNECRYPTED_ERR = 5,
  2829. HTT_RX_RXDMA_MSDU_LEN_ERR = 6,
  2830. HTT_RX_RXDMA_MSDU_LIMIT_ERR = 7,
  2831. HTT_RX_RXDMA_WIFI_PARSE_ERR = 8,
  2832. HTT_RX_RXDMA_AMSDU_PARSE_ERR = 9,
  2833. HTT_RX_RXDMA_SA_TIMEOUT_ERR = 10,
  2834. HTT_RX_RXDMA_DA_TIMEOUT_ERR = 11,
  2835. HTT_RX_RXDMA_FLOW_TIMEOUT_ERR = 12,
  2836. HTT_RX_RXDMA_FLUSH_REQUEST = 13,
  2837. HTT_RX_RXDMA_ERR_CODE_RVSD0 = 14,
  2838. HTT_RX_RXDMA_ERR_CODE_RVSD1 = 15,
  2839. /*
  2840. * This MAX_ERR_CODE should not be used in any host/target messages,
  2841. * so that even though it is defined within a host/target interface
  2842. * definition header file, it isn't actually part of the host/target
  2843. * interface, and thus can be modified.
  2844. */
  2845. HTT_RX_RXDMA_MAX_ERR_CODE
  2846. } htt_rx_rxdma_error_code_enum;
  2847. /* NOTE: Variable length TLV, use length spec to infer array size */
  2848. typedef struct {
  2849. htt_tlv_hdr_t tlv_hdr;
  2850. /* NOTE:
  2851. * The mapping of RXDMA error types to rxdma_err array elements is HW dependent.
  2852. * It is expected but not required that the target will provide a rxdma_err element
  2853. * for each of the htt_rx_rxdma_error_code_enum values, up to but not including
  2854. * MAX_ERR_CODE. The host should ignore any array elements whose
  2855. * indices are >= the MAX_ERR_CODE value the host was compiled with.
  2856. */
  2857. A_UINT32 rxdma_err[1]; /* HTT_RX_RXDMA_MAX_ERR_CODE */
  2858. } htt_rx_soc_fw_refill_ring_num_rxdma_err_tlv_v;
  2859. /* REO error code from WBM released packets */
  2860. typedef enum {
  2861. HTT_RX_REO_QUEUE_DESC_ADDR_ZERO = 0,
  2862. HTT_RX_REO_QUEUE_DESC_NOT_VALID = 1,
  2863. HTT_RX_AMPDU_IN_NON_BA = 2,
  2864. HTT_RX_NON_BA_DUPLICATE = 3,
  2865. HTT_RX_BA_DUPLICATE = 4,
  2866. HTT_RX_REGULAR_FRAME_2K_JUMP = 5,
  2867. HTT_RX_BAR_FRAME_2K_JUMP = 6,
  2868. HTT_RX_REGULAR_FRAME_OOR = 7,
  2869. HTT_RX_BAR_FRAME_OOR = 8,
  2870. HTT_RX_BAR_FRAME_NO_BA_SESSION = 9,
  2871. HTT_RX_BAR_FRAME_SN_EQUALS_SSN = 10,
  2872. HTT_RX_PN_CHECK_FAILED = 11,
  2873. HTT_RX_2K_ERROR_HANDLING_FLAG_SET = 12,
  2874. HTT_RX_PN_ERROR_HANDLING_FLAG_SET = 13,
  2875. HTT_RX_QUEUE_DESCRIPTOR_BLOCKED_SET = 14,
  2876. HTT_RX_REO_ERR_CODE_RVSD = 15,
  2877. /*
  2878. * This MAX_ERR_CODE should not be used in any host/target messages,
  2879. * so that even though it is defined within a host/target interface
  2880. * definition header file, it isn't actually part of the host/target
  2881. * interface, and thus can be modified.
  2882. */
  2883. HTT_RX_REO_MAX_ERR_CODE
  2884. } htt_rx_reo_error_code_enum;
  2885. /* NOTE: Variable length TLV, use length spec to infer array size */
  2886. typedef struct {
  2887. htt_tlv_hdr_t tlv_hdr;
  2888. /* NOTE:
  2889. * The mapping of REO error types to reo_err array elements is HW dependent.
  2890. * It is expected but not required that the target will provide a rxdma_err element
  2891. * for each of the htt_rx_reo_error_code_enum values, up to but not including
  2892. * MAX_ERR_CODE. The host should ignore any array elements whose
  2893. * indices are >= the MAX_ERR_CODE value the host was compiled with.
  2894. */
  2895. A_UINT32 reo_err[1]; /* HTT_RX_REO_MAX_ERR_CODE */
  2896. } htt_rx_soc_fw_refill_ring_num_reo_err_tlv_v;
  2897. /* NOTE:
  2898. * This structure is for documentation, and cannot be safely used directly.
  2899. * Instead, use the constituent TLV structures to fill/parse.
  2900. */
  2901. typedef struct {
  2902. htt_rx_soc_fw_stats_tlv fw_tlv;
  2903. htt_rx_soc_fw_refill_ring_empty_tlv_v fw_refill_ring_empty_tlv;
  2904. htt_rx_soc_fw_refill_ring_num_refill_tlv_v fw_refill_ring_num_refill_tlv;
  2905. htt_rx_soc_fw_refill_ring_num_rxdma_err_tlv_v fw_refill_ring_num_rxdma_err_tlv;
  2906. htt_rx_soc_fw_refill_ring_num_reo_err_tlv_v fw_refill_ring_num_reo_err_tlv;
  2907. } htt_rx_soc_stats_t;
  2908. /* == RX PDEV STATS == */
  2909. #define HTT_RX_PDEV_FW_STATS_MAC_ID_M 0x000000ff
  2910. #define HTT_RX_PDEV_FW_STATS_MAC_ID_S 0
  2911. #define HTT_RX_PDEV_FW_STATS_MAC_ID_GET(_var) \
  2912. (((_var) & HTT_RX_PDEV_FW_STATS_MAC_ID_M) >> \
  2913. HTT_RX_PDEV_FW_STATS_MAC_ID_S)
  2914. #define HTT_RX_PDEV_FW_STATS_MAC_ID_SET(_var, _val) \
  2915. do { \
  2916. HTT_CHECK_SET_VAL(HTT_RX_PDEV_FW_STATS_MAC_ID, _val); \
  2917. ((_var) |= ((_val) << HTT_RX_PDEV_FW_STATS_MAC_ID_S)); \
  2918. } while (0)
  2919. #define HTT_STATS_SUBTYPE_MAX 16
  2920. typedef struct {
  2921. htt_tlv_hdr_t tlv_hdr;
  2922. /* BIT [ 7 : 0] :- mac_id
  2923. * BIT [31 : 8] :- reserved
  2924. */
  2925. A_UINT32 mac_id__word;
  2926. /* Num PPDU status processed from HW */
  2927. A_UINT32 ppdu_recvd;
  2928. /* Num MPDU across PPDUs with FCS ok */
  2929. A_UINT32 mpdu_cnt_fcs_ok;
  2930. /* Num MPDU across PPDUs with FCS err */
  2931. A_UINT32 mpdu_cnt_fcs_err;
  2932. /* Num MSDU across PPDUs */
  2933. A_UINT32 tcp_msdu_cnt;
  2934. /* Num MSDU across PPDUs */
  2935. A_UINT32 tcp_ack_msdu_cnt;
  2936. /* Num MSDU across PPDUs */
  2937. A_UINT32 udp_msdu_cnt;
  2938. /* Num MSDU across PPDUs */
  2939. A_UINT32 other_msdu_cnt;
  2940. /* Num MPDU on FW ring indicated */
  2941. A_UINT32 fw_ring_mpdu_ind;
  2942. /* Num MGMT MPDU given to protocol */
  2943. A_UINT32 fw_ring_mgmt_subtype[HTT_STATS_SUBTYPE_MAX];
  2944. /* Num ctrl MPDU given to protocol */
  2945. A_UINT32 fw_ring_ctrl_subtype[HTT_STATS_SUBTYPE_MAX];
  2946. /* Num mcast data packet received */
  2947. A_UINT32 fw_ring_mcast_data_msdu;
  2948. /* Num broadcast data packet received */
  2949. A_UINT32 fw_ring_bcast_data_msdu;
  2950. /* Num unicat data packet received */
  2951. A_UINT32 fw_ring_ucast_data_msdu;
  2952. /* Num null data packet received */
  2953. A_UINT32 fw_ring_null_data_msdu;
  2954. /* Num MPDU on FW ring dropped */
  2955. A_UINT32 fw_ring_mpdu_drop;
  2956. /* Num buf indication to offload */
  2957. A_UINT32 ofld_local_data_ind_cnt;
  2958. /* Num buf recycle from offload */
  2959. A_UINT32 ofld_local_data_buf_recycle_cnt;
  2960. /* Num buf indication to data_rx */
  2961. A_UINT32 drx_local_data_ind_cnt;
  2962. /* Num buf recycle from data_rx */
  2963. A_UINT32 drx_local_data_buf_recycle_cnt;
  2964. /* Num buf indication to protocol */
  2965. A_UINT32 local_nondata_ind_cnt;
  2966. /* Num buf recycle from protocol */
  2967. A_UINT32 local_nondata_buf_recycle_cnt;
  2968. /* Num buf fed */
  2969. A_UINT32 fw_status_buf_ring_refill_cnt;
  2970. /* Num ring empty encountered */
  2971. A_UINT32 fw_status_buf_ring_empty_cnt;
  2972. /* Num buf fed */
  2973. A_UINT32 fw_pkt_buf_ring_refill_cnt;
  2974. /* Num ring empty encountered */
  2975. A_UINT32 fw_pkt_buf_ring_empty_cnt;
  2976. /* Num buf fed */
  2977. A_UINT32 fw_link_buf_ring_refill_cnt;
  2978. /* Num ring empty encountered */
  2979. A_UINT32 fw_link_buf_ring_empty_cnt;
  2980. /* Num buf fed */
  2981. A_UINT32 host_pkt_buf_ring_refill_cnt;
  2982. /* Num ring empty encountered */
  2983. A_UINT32 host_pkt_buf_ring_empty_cnt;
  2984. /* Num buf fed */
  2985. A_UINT32 mon_pkt_buf_ring_refill_cnt;
  2986. /* Num ring empty encountered */
  2987. A_UINT32 mon_pkt_buf_ring_empty_cnt;
  2988. /* Num buf fed */
  2989. A_UINT32 mon_status_buf_ring_refill_cnt;
  2990. /* Num ring empty encountered */
  2991. A_UINT32 mon_status_buf_ring_empty_cnt;
  2992. /* Num buf fed */
  2993. A_UINT32 mon_desc_buf_ring_refill_cnt;
  2994. /* Num ring empty encountered */
  2995. A_UINT32 mon_desc_buf_ring_empty_cnt;
  2996. /* Num buf fed */
  2997. A_UINT32 mon_dest_ring_update_cnt;
  2998. /* Num ring full encountered */
  2999. A_UINT32 mon_dest_ring_full_cnt;
  3000. /* Num rx suspend is attempted */
  3001. A_UINT32 rx_suspend_cnt;
  3002. /* Num rx suspend failed */
  3003. A_UINT32 rx_suspend_fail_cnt;
  3004. /* Num rx resume attempted */
  3005. A_UINT32 rx_resume_cnt;
  3006. /* Num rx resume failed */
  3007. A_UINT32 rx_resume_fail_cnt;
  3008. /* Num rx ring switch */
  3009. A_UINT32 rx_ring_switch_cnt;
  3010. /* Num rx ring restore */
  3011. A_UINT32 rx_ring_restore_cnt;
  3012. /* Num rx flush issued */
  3013. A_UINT32 rx_flush_cnt;
  3014. /* Num rx recovery */
  3015. A_UINT32 rx_recovery_reset_cnt;
  3016. } htt_rx_pdev_fw_stats_tlv;
  3017. #define HTT_STATS_PHY_ERR_MAX 43
  3018. typedef struct {
  3019. htt_tlv_hdr_t tlv_hdr;
  3020. /* BIT [ 7 : 0] :- mac_id
  3021. * BIT [31 : 8] :- reserved
  3022. */
  3023. A_UINT32 mac_id__word;
  3024. /* Num of phy err */
  3025. A_UINT32 total_phy_err_cnt;
  3026. /* Counts of different types of phy errs
  3027. * The mapping of PHY error types to phy_err array elements is HW dependent.
  3028. * The only currently-supported mapping is shown below:
  3029. *
  3030. * 0 phyrx_err_phy_off Reception aborted due to receiving a PHY_OFF TLV
  3031. * 1 phyrx_err_synth_off
  3032. * 2 phyrx_err_ofdma_timing
  3033. * 3 phyrx_err_ofdma_signal_parity
  3034. * 4 phyrx_err_ofdma_rate_illegal
  3035. * 5 phyrx_err_ofdma_length_illegal
  3036. * 6 phyrx_err_ofdma_restart
  3037. * 7 phyrx_err_ofdma_service
  3038. * 8 phyrx_err_ppdu_ofdma_power_drop
  3039. * 9 phyrx_err_cck_blokker
  3040. * 10 phyrx_err_cck_timing
  3041. * 11 phyrx_err_cck_header_crc
  3042. * 12 phyrx_err_cck_rate_illegal
  3043. * 13 phyrx_err_cck_length_illegal
  3044. * 14 phyrx_err_cck_restart
  3045. * 15 phyrx_err_cck_service
  3046. * 16 phyrx_err_cck_power_drop
  3047. * 17 phyrx_err_ht_crc_err
  3048. * 18 phyrx_err_ht_length_illegal
  3049. * 19 phyrx_err_ht_rate_illegal
  3050. * 20 phyrx_err_ht_zlf
  3051. * 21 phyrx_err_false_radar_ext
  3052. * 22 phyrx_err_green_field
  3053. * 23 phyrx_err_bw_gt_dyn_bw
  3054. * 24 phyrx_err_leg_ht_mismatch
  3055. * 25 phyrx_err_vht_crc_error
  3056. * 26 phyrx_err_vht_siga_unsupported
  3057. * 27 phyrx_err_vht_lsig_len_invalid
  3058. * 28 phyrx_err_vht_ndp_or_zlf
  3059. * 29 phyrx_err_vht_nsym_lt_zero
  3060. * 30 phyrx_err_vht_rx_extra_symbol_mismatch
  3061. * 31 phyrx_err_vht_rx_skip_group_id0
  3062. * 32 phyrx_err_vht_rx_skip_group_id1to62
  3063. * 33 phyrx_err_vht_rx_skip_group_id63
  3064. * 34 phyrx_err_ofdm_ldpc_decoder_disabled
  3065. * 35 phyrx_err_defer_nap
  3066. * 36 phyrx_err_fdomain_timeout
  3067. * 37 phyrx_err_lsig_rel_check
  3068. * 38 phyrx_err_bt_collision
  3069. * 39 phyrx_err_unsupported_mu_feedback
  3070. * 40 phyrx_err_ppdu_tx_interrupt_rx
  3071. * 41 phyrx_err_unsupported_cbf
  3072. * 42 phyrx_err_other
  3073. */
  3074. A_UINT32 phy_err[HTT_STATS_PHY_ERR_MAX];
  3075. } htt_rx_pdev_fw_stats_phy_err_tlv;
  3076. #define HTT_RX_PDEV_FW_RING_MPDU_ERR_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3077. /* NOTE: Variable length TLV, use length spec to infer array size */
  3078. typedef struct {
  3079. htt_tlv_hdr_t tlv_hdr;
  3080. /* Num error MPDU for each RxDMA error type */
  3081. A_UINT32 fw_ring_mpdu_err[1]; /* HTT_RX_STATS_RXDMA_MAX_ERR */
  3082. } htt_rx_pdev_fw_ring_mpdu_err_tlv_v;
  3083. #define HTT_RX_PDEV_FW_MPDU_DROP_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3084. /* NOTE: Variable length TLV, use length spec to infer array size */
  3085. typedef struct {
  3086. htt_tlv_hdr_t tlv_hdr;
  3087. /* Num MPDU dropped */
  3088. A_UINT32 fw_mpdu_drop[1]; /* HTT_RX_STATS_FW_DROP_REASON_MAX */
  3089. } htt_rx_pdev_fw_mpdu_drop_tlv_v;
  3090. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_RX
  3091. * TLV_TAGS:
  3092. * - HTT_STATS_RX_SOC_FW_STATS_TAG (head TLV in soc_stats)
  3093. * - HTT_STATS_RX_SOC_FW_REFILL_RING_EMPTY_TAG (inside soc_stats)
  3094. * - HTT_STATS_RX_SOC_FW_REFILL_RING_NUM_REFILL_TAG (inside soc_stats)
  3095. * - HTT_STATS_RX_PDEV_FW_STATS_TAG
  3096. * - HTT_STATS_RX_PDEV_FW_RING_MPDU_ERR_TAG
  3097. * - HTT_STATS_RX_PDEV_FW_MPDU_DROP_TAG
  3098. */
  3099. /* NOTE:
  3100. * This structure is for documentation, and cannot be safely used directly.
  3101. * Instead, use the constituent TLV structures to fill/parse.
  3102. */
  3103. typedef struct {
  3104. htt_rx_soc_stats_t soc_stats;
  3105. htt_rx_pdev_fw_stats_tlv fw_stats_tlv;
  3106. htt_rx_pdev_fw_ring_mpdu_err_tlv_v fw_ring_mpdu_err_tlv;
  3107. htt_rx_pdev_fw_mpdu_drop_tlv_v fw_ring_mpdu_drop;
  3108. htt_rx_pdev_fw_stats_phy_err_tlv fw_stats_phy_err_tlv;
  3109. } htt_rx_pdev_stats_t;
  3110. #define HTT_PDEV_CCA_STATS_TX_FRAME_INFO_PRESENT (0x1)
  3111. #define HTT_PDEV_CCA_STATS_RX_FRAME_INFO_PRESENT (0x2)
  3112. #define HTT_PDEV_CCA_STATS_RX_CLEAR_INFO_PRESENT (0x4)
  3113. #define HTT_PDEV_CCA_STATS_MY_RX_FRAME_INFO_PRESENT (0x8)
  3114. #define HTT_PDEV_CCA_STATS_USEC_CNT_INFO_PRESENT (0x10)
  3115. #define HTT_PDEV_CCA_STATS_MED_RX_IDLE_INFO_PRESENT (0x20)
  3116. #define HTT_PDEV_CCA_STATS_MED_TX_IDLE_GLOBAL_INFO_PRESENT (0x40)
  3117. #define HTT_PDEV_CCA_STATS_CCA_OBBS_USEC_INFO_PRESENT (0x80)
  3118. typedef struct {
  3119. htt_tlv_hdr_t tlv_hdr;
  3120. /* Below values are obtained from the HW Cycles counter registers */
  3121. A_UINT32 tx_frame_usec;
  3122. A_UINT32 rx_frame_usec;
  3123. A_UINT32 rx_clear_usec;
  3124. A_UINT32 my_rx_frame_usec;
  3125. A_UINT32 usec_cnt;
  3126. A_UINT32 med_rx_idle_usec;
  3127. A_UINT32 med_tx_idle_global_usec;
  3128. A_UINT32 cca_obss_usec;
  3129. } htt_pdev_stats_cca_counters_tlv;
  3130. /* NOTE: THIS htt_pdev_cca_stats_hist_tlv STRUCTURE IS DEPRECATED,
  3131. * due to lack of support in some host stats infrastructures for
  3132. * TLVs nested within TLVs.
  3133. */
  3134. typedef struct {
  3135. htt_tlv_hdr_t tlv_hdr;
  3136. /* The channel number on which these stats were collected */
  3137. A_UINT32 chan_num;
  3138. /* num of CCA records (Num of htt_pdev_stats_cca_counters_tlv)*/
  3139. A_UINT32 num_records;
  3140. /*
  3141. * Bit map of valid CCA counters
  3142. * Bit0 - tx_frame_usec
  3143. * Bit1 - rx_frame_usec
  3144. * Bit2 - rx_clear_usec
  3145. * Bit3 - my_rx_frame_usec
  3146. * bit4 - usec_cnt
  3147. * Bit5 - med_rx_idle_usec
  3148. * Bit6 - med_tx_idle_global_usec
  3149. * Bit7 - cca_obss_usec
  3150. *
  3151. * See HTT_PDEV_CCA_STATS_xxx_INFO_PRESENT defs
  3152. */
  3153. A_UINT32 valid_cca_counters_bitmap;
  3154. /* Indicates the stats collection interval
  3155. * Valid Values:
  3156. * 100 - For the 100ms interval CCA stats histogram
  3157. * 1000 - For 1sec interval CCA histogram
  3158. * 0xFFFFFFFF - For Cumulative CCA Stats
  3159. */
  3160. A_UINT32 collection_interval;
  3161. /**
  3162. * This will be followed by an array which contains the CCA stats
  3163. * collected in the last N intervals,
  3164. * if the indication is for last N intervals CCA stats.
  3165. * Then the pdev_cca_stats[0] element contains the oldest CCA stats
  3166. * and pdev_cca_stats[N-1] will have the most recent CCA stats.
  3167. */
  3168. htt_pdev_stats_cca_counters_tlv cca_hist_tlv[1];
  3169. } htt_pdev_cca_stats_hist_tlv;
  3170. typedef struct {
  3171. htt_tlv_hdr_t tlv_hdr;
  3172. /* The channel number on which these stats were collected */
  3173. A_UINT32 chan_num;
  3174. /* num of CCA records (Num of htt_pdev_stats_cca_counters_tlv)*/
  3175. A_UINT32 num_records;
  3176. /*
  3177. * Bit map of valid CCA counters
  3178. * Bit0 - tx_frame_usec
  3179. * Bit1 - rx_frame_usec
  3180. * Bit2 - rx_clear_usec
  3181. * Bit3 - my_rx_frame_usec
  3182. * bit4 - usec_cnt
  3183. * Bit5 - med_rx_idle_usec
  3184. * Bit6 - med_tx_idle_global_usec
  3185. * Bit7 - cca_obss_usec
  3186. *
  3187. * See HTT_PDEV_CCA_STATS_xxx_INFO_PRESENT defs
  3188. */
  3189. A_UINT32 valid_cca_counters_bitmap;
  3190. /* Indicates the stats collection interval
  3191. * Valid Values:
  3192. * 100 - For the 100ms interval CCA stats histogram
  3193. * 1000 - For 1sec interval CCA histogram
  3194. * 0xFFFFFFFF - For Cumulative CCA Stats
  3195. */
  3196. A_UINT32 collection_interval;
  3197. /**
  3198. * This will be followed by an array which contains the CCA stats
  3199. * collected in the last N intervals,
  3200. * if the indication is for last N intervals CCA stats.
  3201. * Then the pdev_cca_stats[0] element contains the oldest CCA stats
  3202. * and pdev_cca_stats[N-1] will have the most recent CCA stats.
  3203. * htt_pdev_stats_cca_counters_tlv cca_hist_tlv[1];
  3204. */
  3205. } htt_pdev_cca_stats_hist_v1_tlv;
  3206. #define HTT_TWT_SESSION_FLAG_FLOW_ID_M 0x0000ffff
  3207. #define HTT_TWT_SESSION_FLAG_FLOW_ID_S 0
  3208. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_M 0x00010000
  3209. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_S 16
  3210. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_M 0x00020000
  3211. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_S 17
  3212. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_M 0x00040000
  3213. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_S 18
  3214. #define HTT_TWT_SESSION_FLAG_FLOW_ID_GET(_var) \
  3215. (((_var) & HTT_TWT_SESSION_FLAG_FLOW_ID_M) >> \
  3216. HTT_TWT_SESSION_FLAG_FLOW_ID_S)
  3217. #define HTT_TWT_SESSION_FLAG_FLOW_ID_SET(_var, _val) \
  3218. do { \
  3219. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_FLOW_ID, _val); \
  3220. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_FLOW_ID_S)); \
  3221. } while (0)
  3222. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_GET(_var) \
  3223. (((_var) & HTT_TWT_SESSION_FLAG_BCAST_TWT_M) >> \
  3224. HTT_TWT_SESSION_FLAG_BCAST_TWT_S)
  3225. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_SET(_var, _val) \
  3226. do { \
  3227. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_BCAST_TWT, _val); \
  3228. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_BCAST_TWT_S)); \
  3229. } while (0)
  3230. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_GET(_var) \
  3231. (((_var) & HTT_TWT_SESSION_FLAG_TRIGGER_TWT_M) >> \
  3232. HTT_TWT_SESSION_FLAG_TRIGGER_TWT_S)
  3233. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_SET(_var, _val) \
  3234. do { \
  3235. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_TRIGGER_TWT, _val); \
  3236. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_TRIGGER_TWT_S)); \
  3237. } while (0)
  3238. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_GET(_var) \
  3239. (((_var) & HTT_TWT_SESSION_FLAG_ANNOUN_TWT_M) >> \
  3240. HTT_TWT_SESSION_FLAG_ANNOUN_TWT_S)
  3241. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_SET(_var, _val) \
  3242. do { \
  3243. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_ANNOUN_TWT, _val); \
  3244. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_ANNOUN_TWT_S)); \
  3245. } while (0)
  3246. #define TWT_DIALOG_ID_UNAVAILABLE 0xFFFFFFFF
  3247. typedef struct {
  3248. htt_tlv_hdr_t tlv_hdr;
  3249. A_UINT32 vdev_id;
  3250. htt_mac_addr peer_mac;
  3251. A_UINT32 flow_id_flags;
  3252. A_UINT32 dialog_id; /* TWT_DIALOG_ID_UNAVAILABLE is used when TWT session is not initiated by host */
  3253. A_UINT32 wake_dura_us;
  3254. A_UINT32 wake_intvl_us;
  3255. A_UINT32 sp_offset_us;
  3256. } htt_pdev_stats_twt_session_tlv;
  3257. typedef struct {
  3258. htt_tlv_hdr_t tlv_hdr;
  3259. A_UINT32 pdev_id;
  3260. A_UINT32 num_sessions;
  3261. htt_pdev_stats_twt_session_tlv twt_session[1];
  3262. } htt_pdev_stats_twt_sessions_tlv;
  3263. /* STATS_TYPE: HTT_DBG_EXT_STATS_TWT_SESSIONS
  3264. * TLV_TAGS:
  3265. * - HTT_STATS_PDEV_TWT_SESSIONS_TAG
  3266. * - HTT_STATS_PDEV_TWT_SESSION_TAG
  3267. */
  3268. /* NOTE:
  3269. * This structure is for documentation, and cannot be safely used directly.
  3270. * Instead, use the constituent TLV structures to fill/parse.
  3271. */
  3272. typedef struct {
  3273. htt_pdev_stats_twt_sessions_tlv twt_sessions[1];
  3274. } htt_pdev_twt_sessions_stats_t;
  3275. typedef enum {
  3276. /* Global link descriptor queued in REO */
  3277. HTT_RX_REO_RESOURCE_GLOBAL_LINK_DESC_COUNT_0 = 0,
  3278. HTT_RX_REO_RESOURCE_GLOBAL_LINK_DESC_COUNT_1 = 1,
  3279. HTT_RX_REO_RESOURCE_GLOBAL_LINK_DESC_COUNT_2 = 2,
  3280. /*Number of queue descriptors of this aging group */
  3281. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC0 = 3,
  3282. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC1 = 4,
  3283. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC2 = 5,
  3284. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC3 = 6,
  3285. /* Total number of MSDUs buffered in AC */
  3286. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC0 = 7,
  3287. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC1 = 8,
  3288. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC2 = 9,
  3289. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC3 = 10,
  3290. HTT_RX_REO_RESOURCE_STATS_MAX = 16
  3291. } htt_rx_reo_resource_sample_id_enum;
  3292. typedef struct {
  3293. htt_tlv_hdr_t tlv_hdr;
  3294. /* Variable based on the Number of records. HTT_RX_REO_RESOURCE_STATS_MAX */
  3295. /* htt_rx_reo_debug_sample_id_enum */
  3296. A_UINT32 sample_id;
  3297. /* Max value of all samples */
  3298. A_UINT32 total_max;
  3299. /* Average value of total samples */
  3300. A_UINT32 total_avg;
  3301. /* Num of samples including both zeros and non zeros ones*/
  3302. A_UINT32 total_sample;
  3303. /* Average value of all non zeros samples */
  3304. A_UINT32 non_zeros_avg;
  3305. /* Num of non zeros samples */
  3306. A_UINT32 non_zeros_sample;
  3307. /* Max value of last N non zero samples (N = last_non_zeros_sample) */
  3308. A_UINT32 last_non_zeros_max;
  3309. /* Min value of last N non zero samples (N = last_non_zeros_sample) */
  3310. A_UINT32 last_non_zeros_min;
  3311. /* Average value of last N non zero samples (N = last_non_zeros_sample) */
  3312. A_UINT32 last_non_zeros_avg;
  3313. /* Num of last non zero samples */
  3314. A_UINT32 last_non_zeros_sample;
  3315. } htt_rx_reo_resource_stats_tlv_v;
  3316. /* STATS_TYPE: HTT_DBG_EXT_STATS_REO_RESOURCE_STATS
  3317. * TLV_TAGS:
  3318. * - HTT_STATS_RX_REO_RESOURCE_STATS_TAG
  3319. */
  3320. /* NOTE:
  3321. * This structure is for documentation, and cannot be safely used directly.
  3322. * Instead, use the constituent TLV structures to fill/parse.
  3323. */
  3324. typedef struct {
  3325. htt_rx_reo_resource_stats_tlv_v reo_resource_stats;
  3326. } htt_soc_reo_resource_stats_t;
  3327. /* == TX SOUNDING STATS == */
  3328. /* config_param0 */
  3329. #define HTT_DBG_EXT_STATS_SET_VDEV_MASK(_var) ((_var << 1) | 0x1)
  3330. #define HTT_DBG_EXT_STATS_GET_VDEV_ID_FROM_VDEV_MASK(_var) ((_var >> 1) & 0xFF)
  3331. #define HTT_DBG_EXT_STATS_IS_VDEV_ID_SET(_var) ((_var) & 0x1)
  3332. typedef enum {
  3333. /* Implicit beamforming stats */
  3334. HTT_IMPLICIT_TXBF_STEER_STATS = 0,
  3335. /* Single user short inter frame sequence steer stats */
  3336. HTT_EXPLICIT_TXBF_SU_SIFS_STEER_STATS = 1,
  3337. /* Single user random back off steer stats */
  3338. HTT_EXPLICIT_TXBF_SU_RBO_STEER_STATS = 2,
  3339. /* Multi user short inter frame sequence steer stats */
  3340. HTT_EXPLICIT_TXBF_MU_SIFS_STEER_STATS = 3,
  3341. /* Multi user random back off steer stats */
  3342. HTT_EXPLICIT_TXBF_MU_RBO_STEER_STATS = 4,
  3343. /* For backward compatability new modes cannot be added */
  3344. HTT_TXBF_MAX_NUM_OF_MODES = 5
  3345. } htt_txbf_sound_steer_modes;
  3346. typedef enum {
  3347. HTT_TX_AC_SOUNDING_MODE = 0,
  3348. HTT_TX_AX_SOUNDING_MODE = 1,
  3349. } htt_stats_sounding_tx_mode;
  3350. typedef struct {
  3351. htt_tlv_hdr_t tlv_hdr;
  3352. A_UINT32 tx_sounding_mode; /* HTT_TX_XX_SOUNDING_MODE */
  3353. /* Counts number of soundings for all steering modes in each bw */
  3354. A_UINT32 cbf_20[HTT_TXBF_MAX_NUM_OF_MODES];
  3355. A_UINT32 cbf_40[HTT_TXBF_MAX_NUM_OF_MODES];
  3356. A_UINT32 cbf_80[HTT_TXBF_MAX_NUM_OF_MODES];
  3357. A_UINT32 cbf_160[HTT_TXBF_MAX_NUM_OF_MODES];
  3358. /*
  3359. * The sounding array is a 2-D array stored as an 1-D array of
  3360. * A_UINT32. The stats for a particular user/bw combination is
  3361. * referenced with the following:
  3362. *
  3363. * sounding[(user* max_bw) + bw]
  3364. *
  3365. * ... where max_bw == 4 for 160mhz
  3366. */
  3367. A_UINT32 sounding[HTT_TX_NUM_OF_SOUNDING_STATS_WORDS];
  3368. } htt_tx_sounding_stats_tlv;
  3369. /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_SOUNDING_INFO
  3370. * TLV_TAGS:
  3371. * - HTT_STATS_TX_SOUNDING_STATS_TAG
  3372. */
  3373. /* NOTE:
  3374. * This structure is for documentation, and cannot be safely used directly.
  3375. * Instead, use the constituent TLV structures to fill/parse.
  3376. */
  3377. typedef struct {
  3378. htt_tx_sounding_stats_tlv sounding_tlv;
  3379. } htt_tx_sounding_stats_t;
  3380. typedef struct {
  3381. htt_tlv_hdr_t tlv_hdr;
  3382. A_UINT32 num_obss_tx_ppdu_success;
  3383. A_UINT32 num_obss_tx_ppdu_failure;
  3384. } htt_pdev_obss_pd_stats_tlv;
  3385. /* NOTE:
  3386. * This structure is for documentation, and cannot be safely used directly.
  3387. * Instead, use the constituent TLV structures to fill/parse.
  3388. */
  3389. typedef struct {
  3390. htt_pdev_obss_pd_stats_tlv obss_pd_stat;
  3391. } htt_pdev_obss_pd_stats_t;
  3392. typedef struct {
  3393. htt_tlv_hdr_t tlv_hdr;
  3394. A_UINT32 pdev_id;
  3395. A_UINT32 current_head_idx;
  3396. A_UINT32 current_tail_idx;
  3397. A_UINT32 num_htt_msgs_sent;
  3398. /*
  3399. * Time in milliseconds for which the ring has been in
  3400. * its current backpressure condition
  3401. */
  3402. A_UINT32 backpressure_time_ms;
  3403. /* backpressure_hist - histogram showing how many times different degrees
  3404. * of backpressure duration occurred:
  3405. * Index 0 indicates the number of times ring was
  3406. * continously in backpressure state for 100 - 200ms.
  3407. * Index 1 indicates the number of times ring was
  3408. * continously in backpressure state for 200 - 300ms.
  3409. * Index 2 indicates the number of times ring was
  3410. * continously in backpressure state for 300 - 400ms.
  3411. * Index 3 indicates the number of times ring was
  3412. * continously in backpressure state for 400 - 500ms.
  3413. * Index 4 indicates the number of times ring was
  3414. * continously in backpressure state beyond 500ms.
  3415. */
  3416. A_UINT32 backpressure_hist[5];
  3417. } htt_ring_backpressure_stats_tlv;
  3418. /* STATS_TYPE : HTT_STATS_RING_BACKPRESSURE_STATS_INFO
  3419. * TLV_TAGS:
  3420. * - HTT_STATS_RING_BACKPRESSURE_STATS_TAG
  3421. */
  3422. /* NOTE:
  3423. * This structure is for documentation, and cannot be safely used directly.
  3424. * Instead, use the constituent TLV structures to fill/parse.
  3425. */
  3426. typedef struct {
  3427. htt_sring_cmn_tlv cmn_tlv;
  3428. struct {
  3429. htt_stats_string_tlv sring_str_tlv;
  3430. htt_ring_backpressure_stats_tlv backpressure_stats_tlv;
  3431. } r[1]; /* variable-length array */
  3432. } htt_ring_backpressure_stats_t;
  3433. #define HTT_LATENCY_PROFILE_MAX_HIST 3
  3434. #define HTT_STATS_MAX_PROF_STATS_NAME_LEN 32
  3435. typedef struct {
  3436. htt_tlv_hdr_t tlv_hdr;
  3437. /* print_header:
  3438. * This field suggests whether the host should print a header when
  3439. * displaying the TLV (because this is the first latency_prof_stats
  3440. * TLV within a series), or if only the TLV contents should be displayed
  3441. * without a header (because this is not the first TLV within the series).
  3442. */
  3443. A_UINT32 print_header;
  3444. A_UINT8 latency_prof_name[HTT_STATS_MAX_PROF_STATS_NAME_LEN];
  3445. A_UINT32 cnt; /* number of data values included in the tot sum */
  3446. A_UINT32 min; /* time in us */
  3447. A_UINT32 max; /* time in us */
  3448. A_UINT32 last;
  3449. A_UINT32 tot; /* time in us */
  3450. A_UINT32 avg; /* time in us */
  3451. /* hist_intvl:
  3452. * Histogram interval, i.e. the latency range covered by each
  3453. * bin of the histogram, in microsecond units.
  3454. * hist[0] counts how many latencies were between 0 to hist_intvl
  3455. * hist[1] counts how many latencies were between hist_intvl to 2*hist_intvl
  3456. * hist[2] counts how many latencies were more than 2*hist_intvl
  3457. */
  3458. A_UINT32 hist_intvl;
  3459. A_UINT32 hist[HTT_LATENCY_PROFILE_MAX_HIST];
  3460. } htt_latency_prof_stats_tlv;
  3461. typedef struct {
  3462. htt_tlv_hdr_t tlv_hdr;
  3463. /* duration:
  3464. * Time period over which counts were gathered, units = microseconds.
  3465. */
  3466. A_UINT32 duration;
  3467. A_UINT32 tx_msdu_cnt;
  3468. A_UINT32 tx_mpdu_cnt;
  3469. A_UINT32 tx_ppdu_cnt;
  3470. A_UINT32 rx_msdu_cnt;
  3471. A_UINT32 rx_mpdu_cnt;
  3472. } htt_latency_prof_ctx_tlv;
  3473. typedef struct {
  3474. htt_tlv_hdr_t tlv_hdr;
  3475. A_UINT32 prof_enable_cnt; /* count of enabled profiles */
  3476. } htt_latency_prof_cnt_tlv;
  3477. /* STATS_TYPE : HTT_DBG_EXT_STATS_LATENCY_PROF_STATS
  3478. * TLV_TAGS:
  3479. * HTT_STATS_LATENCY_PROF_STATS_TAG / htt_latency_prof_stats_tlv
  3480. * HTT_STATS_LATENCY_CTX_TAG / htt_latency_prof_ctx_tlv
  3481. * HTT_STATS_LATENCY_CNT_TAG / htt_latency_prof_cnt_tlv
  3482. */
  3483. /* NOTE:
  3484. * This structure is for documentation, and cannot be safely used directly.
  3485. * Instead, use the constituent TLV structures to fill/parse.
  3486. */
  3487. typedef struct {
  3488. htt_latency_prof_stats_tlv latency_prof_stat;
  3489. htt_latency_prof_ctx_tlv latency_ctx_stat;
  3490. htt_latency_prof_cnt_tlv latency_cnt_stat;
  3491. } htt_soc_latency_stats_t;
  3492. #endif /* __HTT_STATS_H__ */