dp_rx_mon_dest.c 47 KB

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  1. /*
  2. * Copyright (c) 2017-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "wlan_cfg.h"
  29. #include "dp_internal.h"
  30. /* The maxinum buffer length allocated for radio tap */
  31. #define MAX_MONITOR_HEADER (512)
  32. /*
  33. * PPDU id is from 0 to 64k-1. PPDU id read from status ring and PPDU id
  34. * read from destination ring shall track each other. If the distance of
  35. * two ppdu id is less than 20000. It is assume no wrap around. Otherwise,
  36. * It is assume wrap around.
  37. */
  38. #define NOT_PPDU_ID_WRAP_AROUND 20000
  39. /*
  40. * The destination ring processing is stuck if the destrination is not
  41. * moving while status ring moves 16 ppdu. the destination ring processing
  42. * skips this destination ring ppdu as walkaround
  43. */
  44. #define MON_DEST_RING_STUCK_MAX_CNT 16
  45. /**
  46. * dp_rx_mon_link_desc_return() - Return a MPDU link descriptor to HW
  47. * (WBM), following error handling
  48. *
  49. * @dp_pdev: core txrx pdev context
  50. * @buf_addr_info: void pointer to monitor link descriptor buf addr info
  51. * Return: QDF_STATUS
  52. */
  53. static QDF_STATUS
  54. dp_rx_mon_link_desc_return(struct dp_pdev *dp_pdev,
  55. void *buf_addr_info, int mac_id)
  56. {
  57. struct dp_srng *dp_srng;
  58. hal_ring_handle_t hal_ring_hdl;
  59. hal_soc_handle_t hal_soc;
  60. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  61. void *src_srng_desc;
  62. int mac_for_pdev = dp_get_mac_id_for_mac(dp_pdev->soc, mac_id);
  63. hal_soc = dp_pdev->soc->hal_soc;
  64. dp_srng = &dp_pdev->rxdma_mon_desc_ring[mac_for_pdev];
  65. hal_ring_hdl = dp_srng->hal_srng;
  66. qdf_assert(hal_ring_hdl);
  67. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring_hdl))) {
  68. /* TODO */
  69. /*
  70. * Need API to convert from hal_ring pointer to
  71. * Ring Type / Ring Id combo
  72. */
  73. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  74. "%s %d : \
  75. HAL RING Access For WBM Release SRNG Failed -- %pK",
  76. __func__, __LINE__, hal_ring_hdl);
  77. goto done;
  78. }
  79. src_srng_desc = hal_srng_src_get_next(hal_soc, hal_ring_hdl);
  80. if (qdf_likely(src_srng_desc)) {
  81. /* Return link descriptor through WBM ring (SW2WBM)*/
  82. hal_rx_mon_msdu_link_desc_set(hal_soc,
  83. src_srng_desc, buf_addr_info);
  84. status = QDF_STATUS_SUCCESS;
  85. } else {
  86. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  87. "%s %d -- Monitor Link Desc WBM Release Ring Full",
  88. __func__, __LINE__);
  89. }
  90. done:
  91. hal_srng_access_end(hal_soc, hal_ring_hdl);
  92. return status;
  93. }
  94. /**
  95. * dp_mon_adjust_frag_len() - MPDU and MSDU may spread across
  96. * multiple nbufs. This function
  97. * is to return data length in
  98. * fragmented buffer
  99. *
  100. * @total_len: pointer to remaining data length.
  101. * @frag_len: pointer to data length in this fragment.
  102. */
  103. static inline void dp_mon_adjust_frag_len(uint32_t *total_len,
  104. uint32_t *frag_len)
  105. {
  106. if (*total_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  107. *frag_len = RX_BUFFER_SIZE - RX_PKT_TLVS_LEN;
  108. *total_len -= *frag_len;
  109. } else {
  110. *frag_len = *total_len;
  111. *total_len = 0;
  112. }
  113. }
  114. /**
  115. * dp_rx_cookie_2_mon_link_desc() - Retrieve Link descriptor based on target
  116. * @pdev: core physical device context
  117. * @hal_buf_info: structure holding the buffer info
  118. * mac_id: mac number
  119. *
  120. * Return: link descriptor address
  121. */
  122. static inline
  123. void *dp_rx_cookie_2_mon_link_desc(struct dp_pdev *pdev,
  124. struct hal_buf_info buf_info,
  125. uint8_t mac_id)
  126. {
  127. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  128. return dp_rx_cookie_2_mon_link_desc_va(pdev, &buf_info,
  129. mac_id);
  130. return dp_rx_cookie_2_link_desc_va(pdev->soc, &buf_info);
  131. }
  132. /**
  133. * dp_rx_monitor_link_desc_return() - Return Link descriptor based on target
  134. * @pdev: core physical device context
  135. * @p_last_buf_addr_info: MPDU Link descriptor
  136. * mac_id: mac number
  137. *
  138. * Return: QDF_STATUS
  139. */
  140. static inline
  141. QDF_STATUS dp_rx_monitor_link_desc_return(struct dp_pdev *pdev,
  142. void *p_last_buf_addr_info,
  143. uint8_t mac_id, uint8_t bm_action)
  144. {
  145. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  146. return dp_rx_mon_link_desc_return(pdev, p_last_buf_addr_info,
  147. mac_id);
  148. return dp_rx_link_desc_return(pdev->soc, p_last_buf_addr_info,
  149. bm_action);
  150. }
  151. /**
  152. * dp_rxdma_get_mon_dst_ring() - Return the pointer to rxdma_err_dst_ring
  153. * or mon_dst_ring based on the target
  154. * @pdev: core physical device context
  155. * @mac_for_pdev: mac_id number
  156. *
  157. * Return: ring address
  158. */
  159. static inline
  160. void *dp_rxdma_get_mon_dst_ring(struct dp_pdev *pdev,
  161. uint8_t mac_for_pdev)
  162. {
  163. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  164. return pdev->rxdma_mon_dst_ring[mac_for_pdev].hal_srng;
  165. return pdev->rxdma_err_dst_ring[mac_for_pdev].hal_srng;
  166. }
  167. /**
  168. * dp_rxdma_get_mon_buf_ring() - Return monitor buf ring address
  169. * based on target
  170. * @pdev: core physical device context
  171. * @mac_for_pdev: mac id number
  172. *
  173. * Return: ring address
  174. */
  175. static inline
  176. struct dp_srng *dp_rxdma_get_mon_buf_ring(struct dp_pdev *pdev,
  177. uint8_t mac_for_pdev)
  178. {
  179. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  180. return &pdev->rxdma_mon_buf_ring[mac_for_pdev];
  181. return &pdev->rx_refill_buf_ring;
  182. }
  183. /**
  184. * dp_rx_get_mon_desc_pool() - Return monitor descriptor pool
  185. * based on target
  186. * @soc: soc handle
  187. * @mac_id: mac id number
  188. * @pdev_id: pdev id number
  189. *
  190. * Return: descriptor pool address
  191. */
  192. static inline
  193. struct rx_desc_pool *dp_rx_get_mon_desc_pool(struct dp_soc *soc,
  194. uint8_t mac_id,
  195. uint8_t pdev_id)
  196. {
  197. if (soc->wlan_cfg_ctx->rxdma1_enable)
  198. return &soc->rx_desc_mon[mac_id];
  199. return &soc->rx_desc_buf[pdev_id];
  200. }
  201. /**
  202. * dp_rx_get_mon_desc() - Return Rx descriptor based on target
  203. * @soc: soc handle
  204. * @cookie: cookie value
  205. *
  206. * Return: Rx descriptor
  207. */
  208. static inline
  209. struct dp_rx_desc *dp_rx_get_mon_desc(struct dp_soc *soc,
  210. uint32_t cookie)
  211. {
  212. if (soc->wlan_cfg_ctx->rxdma1_enable)
  213. return dp_rx_cookie_2_va_mon_buf(soc, cookie);
  214. return dp_rx_cookie_2_va_rxdma_buf(soc, cookie);
  215. }
  216. /**
  217. * dp_rx_mon_mpdu_pop() - Return a MPDU link descriptor to HW
  218. * (WBM), following error handling
  219. *
  220. * @soc: core DP main context
  221. * @mac_id: mac id which is one of 3 mac_ids
  222. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  223. * @head_msdu: head of msdu to be popped
  224. * @tail_msdu: tail of msdu to be popped
  225. * @npackets: number of packet to be popped
  226. * @ppdu_id: ppdu id of processing ppdu
  227. * @head: head of descs list to be freed
  228. * @tail: tail of decs list to be freed
  229. *
  230. * Return: number of msdu in MPDU to be popped
  231. */
  232. static inline uint32_t
  233. dp_rx_mon_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  234. hal_rxdma_desc_t rxdma_dst_ring_desc, qdf_nbuf_t *head_msdu,
  235. qdf_nbuf_t *tail_msdu, uint32_t *npackets, uint32_t *ppdu_id,
  236. union dp_rx_desc_list_elem_t **head,
  237. union dp_rx_desc_list_elem_t **tail)
  238. {
  239. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  240. void *rx_desc_tlv;
  241. void *rx_msdu_link_desc;
  242. qdf_nbuf_t msdu;
  243. qdf_nbuf_t last;
  244. struct hal_rx_msdu_list msdu_list;
  245. uint16_t num_msdus;
  246. uint32_t rx_buf_size, rx_pkt_offset;
  247. struct hal_buf_info buf_info;
  248. void *p_buf_addr_info;
  249. void *p_last_buf_addr_info;
  250. uint32_t rx_bufs_used = 0;
  251. uint32_t msdu_ppdu_id, msdu_cnt;
  252. uint8_t *data;
  253. uint32_t i;
  254. uint32_t total_frag_len = 0, frag_len = 0;
  255. bool is_frag, is_first_msdu;
  256. bool drop_mpdu = false;
  257. uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
  258. uint64_t nbuf_paddr = 0;
  259. msdu = 0;
  260. last = NULL;
  261. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  262. &p_last_buf_addr_info, &msdu_cnt);
  263. if ((hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc) ==
  264. HAL_RX_WBM_RXDMA_PSH_RSN_ERROR)) {
  265. uint8_t rxdma_err =
  266. hal_rx_reo_ent_rxdma_error_code_get(
  267. rxdma_dst_ring_desc);
  268. if (qdf_unlikely((rxdma_err == HAL_RXDMA_ERR_FLUSH_REQUEST) ||
  269. (rxdma_err == HAL_RXDMA_ERR_MPDU_LENGTH) ||
  270. (rxdma_err == HAL_RXDMA_ERR_OVERFLOW))) {
  271. drop_mpdu = true;
  272. dp_pdev->rx_mon_stats.dest_mpdu_drop++;
  273. }
  274. }
  275. is_frag = false;
  276. is_first_msdu = true;
  277. do {
  278. /* WAR for duplicate link descriptors received from HW */
  279. if (qdf_unlikely(dp_pdev->mon_last_linkdesc_paddr ==
  280. buf_info.paddr)) {
  281. dp_pdev->rx_mon_stats.dup_mon_linkdesc_cnt++;
  282. return rx_bufs_used;
  283. }
  284. rx_msdu_link_desc =
  285. dp_rx_cookie_2_mon_link_desc(dp_pdev,
  286. buf_info, mac_id);
  287. qdf_assert(rx_msdu_link_desc);
  288. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  289. &msdu_list, &num_msdus);
  290. for (i = 0; i < num_msdus; i++) {
  291. uint32_t l2_hdr_offset;
  292. struct dp_rx_desc *rx_desc = NULL;
  293. rx_desc = dp_rx_get_mon_desc(soc,
  294. msdu_list.sw_cookie[i]);
  295. qdf_assert_always(rx_desc);
  296. msdu = rx_desc->nbuf;
  297. if (msdu)
  298. nbuf_paddr = qdf_nbuf_get_frag_paddr(msdu, 0);
  299. /* WAR for duplicate buffers received from HW */
  300. if (qdf_unlikely(dp_pdev->mon_last_buf_cookie ==
  301. msdu_list.sw_cookie[i] ||
  302. !msdu ||
  303. msdu_list.paddr[i] != nbuf_paddr ||
  304. !rx_desc->in_use)) {
  305. /* Skip duplicate buffer and drop subsequent
  306. * buffers in this MPDU
  307. */
  308. drop_mpdu = true;
  309. dp_pdev->rx_mon_stats.dup_mon_buf_cnt++;
  310. dp_pdev->mon_last_linkdesc_paddr =
  311. buf_info.paddr;
  312. continue;
  313. }
  314. if (rx_desc->unmapped == 0) {
  315. qdf_nbuf_unmap_single(soc->osdev, msdu,
  316. QDF_DMA_FROM_DEVICE);
  317. rx_desc->unmapped = 1;
  318. }
  319. if (drop_mpdu) {
  320. dp_pdev->mon_last_linkdesc_paddr =
  321. buf_info.paddr;
  322. qdf_nbuf_free(msdu);
  323. msdu = NULL;
  324. goto next_msdu;
  325. }
  326. data = qdf_nbuf_data(msdu);
  327. rx_desc_tlv = HAL_RX_MON_DEST_GET_DESC(data);
  328. QDF_TRACE(QDF_MODULE_ID_DP,
  329. QDF_TRACE_LEVEL_DEBUG,
  330. "[%s] i=%d, ppdu_id=%x, num_msdus = %u",
  331. __func__, i, *ppdu_id, num_msdus);
  332. if (is_first_msdu) {
  333. if (!HAL_RX_HW_DESC_MPDU_VALID(
  334. rx_desc_tlv)) {
  335. drop_mpdu = true;
  336. qdf_nbuf_free(msdu);
  337. msdu = NULL;
  338. dp_pdev->mon_last_linkdesc_paddr =
  339. buf_info.paddr;
  340. goto next_msdu;
  341. }
  342. msdu_ppdu_id = HAL_RX_HW_DESC_GET_PPDUID_GET(
  343. rx_desc_tlv);
  344. is_first_msdu = false;
  345. QDF_TRACE(QDF_MODULE_ID_DP,
  346. QDF_TRACE_LEVEL_DEBUG,
  347. "[%s] msdu_ppdu_id=%x",
  348. __func__, msdu_ppdu_id);
  349. if (*ppdu_id > msdu_ppdu_id)
  350. QDF_TRACE(QDF_MODULE_ID_DP,
  351. QDF_TRACE_LEVEL_DEBUG,
  352. "[%s][%d] ppdu_id=%d "
  353. "msdu_ppdu_id=%d",
  354. __func__, __LINE__, *ppdu_id,
  355. msdu_ppdu_id);
  356. if ((*ppdu_id < msdu_ppdu_id) && (
  357. (msdu_ppdu_id - *ppdu_id) <
  358. NOT_PPDU_ID_WRAP_AROUND)) {
  359. *ppdu_id = msdu_ppdu_id;
  360. return rx_bufs_used;
  361. } else if ((*ppdu_id > msdu_ppdu_id) && (
  362. (*ppdu_id - msdu_ppdu_id) >
  363. NOT_PPDU_ID_WRAP_AROUND)) {
  364. *ppdu_id = msdu_ppdu_id;
  365. return rx_bufs_used;
  366. }
  367. dp_pdev->mon_last_linkdesc_paddr =
  368. buf_info.paddr;
  369. }
  370. if (hal_rx_desc_is_first_msdu(rx_desc_tlv))
  371. hal_rx_mon_hw_desc_get_mpdu_status(soc->hal_soc,
  372. rx_desc_tlv,
  373. &(dp_pdev->ppdu_info.rx_status));
  374. if (msdu_list.msdu_info[i].msdu_flags &
  375. HAL_MSDU_F_MSDU_CONTINUATION) {
  376. if (!is_frag) {
  377. total_frag_len =
  378. msdu_list.msdu_info[i].msdu_len;
  379. is_frag = true;
  380. }
  381. dp_mon_adjust_frag_len(
  382. &total_frag_len, &frag_len);
  383. } else {
  384. if (is_frag) {
  385. dp_mon_adjust_frag_len(
  386. &total_frag_len, &frag_len);
  387. } else {
  388. frag_len =
  389. msdu_list.msdu_info[i].msdu_len;
  390. }
  391. is_frag = false;
  392. msdu_cnt--;
  393. }
  394. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  395. "%s total_len %u frag_len %u flags %u",
  396. __func__, total_frag_len, frag_len,
  397. msdu_list.msdu_info[i].msdu_flags);
  398. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  399. /*
  400. * HW structures call this L3 header padding
  401. * -- even though this is actually the offset
  402. * from the buffer beginning where the L2
  403. * header begins.
  404. */
  405. l2_hdr_offset =
  406. hal_rx_msdu_end_l3_hdr_padding_get(data);
  407. rx_buf_size = rx_pkt_offset + l2_hdr_offset
  408. + frag_len;
  409. qdf_nbuf_set_pktlen(msdu, rx_buf_size);
  410. #if 0
  411. /* Disble it.see packet on msdu done set to 0 */
  412. /*
  413. * Check if DMA completed -- msdu_done is the
  414. * last bit to be written
  415. */
  416. if (!hal_rx_attn_msdu_done_get(rx_desc_tlv)) {
  417. QDF_TRACE(QDF_MODULE_ID_DP,
  418. QDF_TRACE_LEVEL_ERROR,
  419. "%s:%d: Pkt Desc",
  420. __func__, __LINE__);
  421. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP,
  422. QDF_TRACE_LEVEL_ERROR,
  423. rx_desc_tlv, 128);
  424. qdf_assert_always(0);
  425. }
  426. #endif
  427. QDF_TRACE(QDF_MODULE_ID_DP,
  428. QDF_TRACE_LEVEL_DEBUG,
  429. "%s: rx_pkt_offset=%d, l2_hdr_offset=%d, msdu_len=%d, addr=%pK skb->len %u",
  430. __func__, rx_pkt_offset, l2_hdr_offset,
  431. msdu_list.msdu_info[i].msdu_len,
  432. qdf_nbuf_data(msdu),
  433. (uint32_t)qdf_nbuf_len(msdu));
  434. if (head_msdu && !*head_msdu) {
  435. *head_msdu = msdu;
  436. } else {
  437. if (last)
  438. qdf_nbuf_set_next(last, msdu);
  439. }
  440. last = msdu;
  441. next_msdu:
  442. dp_pdev->mon_last_buf_cookie = msdu_list.sw_cookie[i];
  443. rx_bufs_used++;
  444. dp_rx_add_to_free_desc_list(head,
  445. tail, rx_desc);
  446. }
  447. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  448. &p_buf_addr_info);
  449. if (dp_rx_monitor_link_desc_return(dp_pdev,
  450. p_last_buf_addr_info,
  451. mac_id,
  452. bm_action)
  453. != QDF_STATUS_SUCCESS)
  454. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  455. "dp_rx_monitor_link_desc_return failed");
  456. p_last_buf_addr_info = p_buf_addr_info;
  457. } while (buf_info.paddr && msdu_cnt);
  458. if (last)
  459. qdf_nbuf_set_next(last, NULL);
  460. *tail_msdu = msdu;
  461. return rx_bufs_used;
  462. }
  463. static inline
  464. void dp_rx_msdus_set_payload(qdf_nbuf_t msdu)
  465. {
  466. uint8_t *data;
  467. uint32_t rx_pkt_offset, l2_hdr_offset;
  468. data = qdf_nbuf_data(msdu);
  469. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  470. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(data);
  471. qdf_nbuf_pull_head(msdu, rx_pkt_offset + l2_hdr_offset);
  472. }
  473. static inline
  474. qdf_nbuf_t dp_rx_mon_restitch_mpdu_from_msdus(struct dp_soc *soc,
  475. uint32_t mac_id, qdf_nbuf_t head_msdu, qdf_nbuf_t last_msdu,
  476. struct cdp_mon_status *rx_status)
  477. {
  478. qdf_nbuf_t msdu, mpdu_buf, prev_buf, msdu_orig, head_frag_list;
  479. uint32_t decap_format, wifi_hdr_len, sec_hdr_len, msdu_llc_len,
  480. mpdu_buf_len, decap_hdr_pull_bytes, frag_list_sum_len, dir,
  481. is_amsdu, is_first_frag, amsdu_pad;
  482. void *rx_desc;
  483. char *hdr_desc;
  484. unsigned char *dest;
  485. struct ieee80211_frame *wh;
  486. struct ieee80211_qoscntl *qos;
  487. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  488. head_frag_list = NULL;
  489. mpdu_buf = NULL;
  490. /* The nbuf has been pulled just beyond the status and points to the
  491. * payload
  492. */
  493. if (!head_msdu)
  494. goto mpdu_stitch_fail;
  495. msdu_orig = head_msdu;
  496. rx_desc = qdf_nbuf_data(msdu_orig);
  497. if (HAL_RX_DESC_GET_MPDU_LENGTH_ERR(rx_desc)) {
  498. /* It looks like there is some issue on MPDU len err */
  499. /* Need further investigate if drop the packet */
  500. DP_STATS_INC(dp_pdev, dropped.mon_rx_drop, 1);
  501. return NULL;
  502. }
  503. rx_desc = qdf_nbuf_data(last_msdu);
  504. rx_status->cdp_rs_fcs_err = HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  505. dp_pdev->ppdu_info.rx_status.rs_fcs_err =
  506. HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  507. /* Fill out the rx_status from the PPDU start and end fields */
  508. /* HAL_RX_GET_PPDU_STATUS(soc, mac_id, rx_status); */
  509. rx_desc = qdf_nbuf_data(head_msdu);
  510. decap_format = HAL_RX_DESC_GET_DECAP_FORMAT(rx_desc);
  511. /* Easy case - The MSDU status indicates that this is a non-decapped
  512. * packet in RAW mode.
  513. */
  514. if (decap_format == HAL_HW_RX_DECAP_FORMAT_RAW) {
  515. /* Note that this path might suffer from headroom unavailabilty
  516. * - but the RX status is usually enough
  517. */
  518. dp_rx_msdus_set_payload(head_msdu);
  519. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  520. "[%s][%d] decap format raw head %pK head->next %pK last_msdu %pK last_msdu->next %pK",
  521. __func__, __LINE__, head_msdu, head_msdu->next,
  522. last_msdu, last_msdu->next);
  523. mpdu_buf = head_msdu;
  524. prev_buf = mpdu_buf;
  525. frag_list_sum_len = 0;
  526. msdu = qdf_nbuf_next(head_msdu);
  527. is_first_frag = 1;
  528. while (msdu) {
  529. dp_rx_msdus_set_payload(msdu);
  530. if (is_first_frag) {
  531. is_first_frag = 0;
  532. head_frag_list = msdu;
  533. }
  534. frag_list_sum_len += qdf_nbuf_len(msdu);
  535. /* Maintain the linking of the cloned MSDUS */
  536. qdf_nbuf_set_next_ext(prev_buf, msdu);
  537. /* Move to the next */
  538. prev_buf = msdu;
  539. msdu = qdf_nbuf_next(msdu);
  540. }
  541. qdf_nbuf_trim_tail(prev_buf, HAL_RX_FCS_LEN);
  542. /* If there were more fragments to this RAW frame */
  543. if (head_frag_list) {
  544. if (frag_list_sum_len <
  545. sizeof(struct ieee80211_frame_min_one)) {
  546. DP_STATS_INC(dp_pdev, dropped.mon_rx_drop, 1);
  547. return NULL;
  548. }
  549. frag_list_sum_len -= HAL_RX_FCS_LEN;
  550. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  551. frag_list_sum_len);
  552. qdf_nbuf_set_next(mpdu_buf, NULL);
  553. }
  554. goto mpdu_stitch_done;
  555. }
  556. /* Decap mode:
  557. * Calculate the amount of header in decapped packet to knock off based
  558. * on the decap type and the corresponding number of raw bytes to copy
  559. * status header
  560. */
  561. rx_desc = qdf_nbuf_data(head_msdu);
  562. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  563. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  564. "[%s][%d] decap format not raw",
  565. __func__, __LINE__);
  566. /* Base size */
  567. wifi_hdr_len = sizeof(struct ieee80211_frame);
  568. wh = (struct ieee80211_frame *)hdr_desc;
  569. dir = wh->i_fc[1] & IEEE80211_FC1_DIR_MASK;
  570. if (dir == IEEE80211_FC1_DIR_DSTODS)
  571. wifi_hdr_len += 6;
  572. is_amsdu = 0;
  573. if (wh->i_fc[0] & QDF_IEEE80211_FC0_SUBTYPE_QOS) {
  574. qos = (struct ieee80211_qoscntl *)
  575. (hdr_desc + wifi_hdr_len);
  576. wifi_hdr_len += 2;
  577. is_amsdu = (qos->i_qos[0] & IEEE80211_QOS_AMSDU);
  578. }
  579. /*Calculate security header length based on 'Protected'
  580. * and 'EXT_IV' flag
  581. * */
  582. if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
  583. char *iv = (char *)wh + wifi_hdr_len;
  584. if (iv[3] & KEY_EXTIV)
  585. sec_hdr_len = 8;
  586. else
  587. sec_hdr_len = 4;
  588. } else {
  589. sec_hdr_len = 0;
  590. }
  591. wifi_hdr_len += sec_hdr_len;
  592. /* MSDU related stuff LLC - AMSDU subframe header etc */
  593. msdu_llc_len = is_amsdu ? (14 + 8) : 8;
  594. mpdu_buf_len = wifi_hdr_len + msdu_llc_len;
  595. /* "Decap" header to remove from MSDU buffer */
  596. decap_hdr_pull_bytes = 14;
  597. /* Allocate a new nbuf for holding the 802.11 header retrieved from the
  598. * status of the now decapped first msdu. Leave enough headroom for
  599. * accomodating any radio-tap /prism like PHY header
  600. */
  601. mpdu_buf = qdf_nbuf_alloc(soc->osdev,
  602. MAX_MONITOR_HEADER + mpdu_buf_len,
  603. MAX_MONITOR_HEADER, 4, FALSE);
  604. if (!mpdu_buf)
  605. goto mpdu_stitch_done;
  606. /* Copy the MPDU related header and enc headers into the first buffer
  607. * - Note that there can be a 2 byte pad between heaader and enc header
  608. */
  609. prev_buf = mpdu_buf;
  610. dest = qdf_nbuf_put_tail(prev_buf, wifi_hdr_len);
  611. if (!dest)
  612. goto mpdu_stitch_fail;
  613. qdf_mem_copy(dest, hdr_desc, wifi_hdr_len);
  614. hdr_desc += wifi_hdr_len;
  615. #if 0
  616. dest = qdf_nbuf_put_tail(prev_buf, sec_hdr_len);
  617. adf_os_mem_copy(dest, hdr_desc, sec_hdr_len);
  618. hdr_desc += sec_hdr_len;
  619. #endif
  620. /* The first LLC len is copied into the MPDU buffer */
  621. frag_list_sum_len = 0;
  622. msdu_orig = head_msdu;
  623. is_first_frag = 1;
  624. amsdu_pad = 0;
  625. while (msdu_orig) {
  626. /* TODO: intra AMSDU padding - do we need it ??? */
  627. msdu = msdu_orig;
  628. if (is_first_frag) {
  629. head_frag_list = msdu;
  630. } else {
  631. /* Reload the hdr ptr only on non-first MSDUs */
  632. rx_desc = qdf_nbuf_data(msdu_orig);
  633. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  634. }
  635. /* Copy this buffers MSDU related status into the prev buffer */
  636. if (is_first_frag) {
  637. is_first_frag = 0;
  638. }
  639. /* Update protocol tag for MSDU */
  640. dp_rx_mon_update_protocol_tag(soc, dp_pdev, msdu_orig, rx_desc);
  641. dest = qdf_nbuf_put_tail(prev_buf,
  642. msdu_llc_len + amsdu_pad);
  643. if (!dest)
  644. goto mpdu_stitch_fail;
  645. dest += amsdu_pad;
  646. qdf_mem_copy(dest, hdr_desc, msdu_llc_len);
  647. dp_rx_msdus_set_payload(msdu);
  648. /* Push the MSDU buffer beyond the decap header */
  649. qdf_nbuf_pull_head(msdu, decap_hdr_pull_bytes);
  650. frag_list_sum_len += msdu_llc_len + qdf_nbuf_len(msdu)
  651. + amsdu_pad;
  652. /* Set up intra-AMSDU pad to be added to start of next buffer -
  653. * AMSDU pad is 4 byte pad on AMSDU subframe */
  654. amsdu_pad = (msdu_llc_len + qdf_nbuf_len(msdu)) & 0x3;
  655. amsdu_pad = amsdu_pad ? (4 - amsdu_pad) : 0;
  656. /* TODO FIXME How do we handle MSDUs that have fraglist - Should
  657. * probably iterate all the frags cloning them along the way and
  658. * and also updating the prev_buf pointer
  659. */
  660. /* Move to the next */
  661. prev_buf = msdu;
  662. msdu_orig = qdf_nbuf_next(msdu_orig);
  663. }
  664. #if 0
  665. /* Add in the trailer section - encryption trailer + FCS */
  666. qdf_nbuf_put_tail(prev_buf, HAL_RX_FCS_LEN);
  667. frag_list_sum_len += HAL_RX_FCS_LEN;
  668. #endif
  669. frag_list_sum_len -= msdu_llc_len;
  670. /* TODO: Convert this to suitable adf routines */
  671. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  672. frag_list_sum_len);
  673. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  674. "%s %d mpdu_buf %pK mpdu_buf->len %u",
  675. __func__, __LINE__,
  676. mpdu_buf, mpdu_buf->len);
  677. mpdu_stitch_done:
  678. /* Check if this buffer contains the PPDU end status for TSF */
  679. /* Need revist this code to see where we can get tsf timestamp */
  680. #if 0
  681. /* PPDU end TLV will be retrieved from monitor status ring */
  682. last_mpdu =
  683. (*(((u_int32_t *)&rx_desc->attention)) &
  684. RX_ATTENTION_0_LAST_MPDU_MASK) >>
  685. RX_ATTENTION_0_LAST_MPDU_LSB;
  686. if (last_mpdu)
  687. rx_status->rs_tstamp.tsf = rx_desc->ppdu_end.tsf_timestamp;
  688. #endif
  689. return mpdu_buf;
  690. mpdu_stitch_fail:
  691. if ((mpdu_buf) && (decap_format != HAL_HW_RX_DECAP_FORMAT_RAW)) {
  692. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  693. "%s mpdu_stitch_fail mpdu_buf %pK",
  694. __func__, mpdu_buf);
  695. /* Free the head buffer */
  696. qdf_nbuf_free(mpdu_buf);
  697. }
  698. return NULL;
  699. }
  700. /**
  701. * dp_send_mgmt_packet_to_stack(): send indicataion to upper layers
  702. *
  703. * @soc: soc handle
  704. * @nbuf: Mgmt packet
  705. * @pdev: pdev handle
  706. *
  707. * Return: QDF_STATUS_SUCCESS on success
  708. * QDF_STATUS_E_INVAL in error
  709. */
  710. #ifdef FEATURE_PERPKT_INFO
  711. static inline QDF_STATUS dp_send_mgmt_packet_to_stack(struct dp_soc *soc,
  712. qdf_nbuf_t nbuf,
  713. struct dp_pdev *pdev)
  714. {
  715. uint32_t *nbuf_data;
  716. struct ieee80211_frame *wh;
  717. if (!nbuf)
  718. return QDF_STATUS_E_INVAL;
  719. /*check if this is not a mgmt packet*/
  720. wh = (struct ieee80211_frame *)qdf_nbuf_data(nbuf);
  721. if (((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) !=
  722. IEEE80211_FC0_TYPE_MGT) &&
  723. ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) !=
  724. IEEE80211_FC0_TYPE_CTL)) {
  725. qdf_nbuf_free(nbuf);
  726. return QDF_STATUS_E_INVAL;
  727. }
  728. nbuf_data = (uint32_t *)qdf_nbuf_push_head(nbuf, 4);
  729. if (!nbuf_data) {
  730. QDF_TRACE(QDF_MODULE_ID_DP,
  731. QDF_TRACE_LEVEL_ERROR,
  732. FL("No headroom"));
  733. qdf_nbuf_free(nbuf);
  734. return QDF_STATUS_E_INVAL;
  735. }
  736. *nbuf_data = pdev->ppdu_info.com_info.ppdu_id;
  737. dp_wdi_event_handler(WDI_EVENT_RX_MGMT_CTRL, soc, nbuf,
  738. HTT_INVALID_PEER,
  739. WDI_NO_VAL, pdev->pdev_id);
  740. return QDF_STATUS_SUCCESS;
  741. }
  742. #else
  743. static inline QDF_STATUS dp_send_mgmt_packet_to_stack(struct dp_soc *soc,
  744. qdf_nbuf_t nbuf,
  745. struct dp_pdev *pdev)
  746. {
  747. return QDF_STATUS_SUCCESS;
  748. }
  749. #endif
  750. /**
  751. * dp_rx_extract_radiotap_info(): Extract and populate information in
  752. * struct mon_rx_status type
  753. * @rx_status: Receive status
  754. * @mon_rx_status: Monitor mode status
  755. *
  756. * Returns: None
  757. */
  758. static inline
  759. void dp_rx_extract_radiotap_info(struct cdp_mon_status *rx_status,
  760. struct mon_rx_status *rx_mon_status)
  761. {
  762. rx_mon_status->tsft = rx_status->cdp_rs_tstamp.cdp_tsf;
  763. rx_mon_status->chan_freq = rx_status->rs_freq;
  764. rx_mon_status->chan_num = rx_status->rs_channel;
  765. rx_mon_status->chan_flags = rx_status->rs_flags;
  766. rx_mon_status->rate = rx_status->rs_datarate;
  767. /* TODO: rx_mon_status->ant_signal_db */
  768. /* TODO: rx_mon_status->nr_ant */
  769. rx_mon_status->mcs = rx_status->cdf_rs_rate_mcs;
  770. rx_mon_status->is_stbc = rx_status->cdp_rs_stbc;
  771. rx_mon_status->sgi = rx_status->cdp_rs_sgi;
  772. /* TODO: rx_mon_status->ldpc */
  773. /* TODO: rx_mon_status->beamformed */
  774. /* TODO: rx_mon_status->vht_flags */
  775. /* TODO: rx_mon_status->vht_flag_values1 */
  776. }
  777. /*
  778. * dp_rx_mon_deliver(): function to deliver packets to stack
  779. * @soc: DP soc
  780. * @mac_id: MAC ID
  781. * @head_msdu: head of msdu list
  782. * @tail_msdu: tail of msdu list
  783. *
  784. * Return: status: 0 - Success, non-zero: Failure
  785. */
  786. QDF_STATUS dp_rx_mon_deliver(struct dp_soc *soc, uint32_t mac_id,
  787. qdf_nbuf_t head_msdu, qdf_nbuf_t tail_msdu)
  788. {
  789. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  790. struct cdp_mon_status *rs = &pdev->rx_mon_recv_status;
  791. qdf_nbuf_t mon_skb, skb_next;
  792. qdf_nbuf_t mon_mpdu = NULL;
  793. if (!pdev->monitor_vdev && !pdev->mcopy_mode)
  794. goto mon_deliver_fail;
  795. /* restitch mon MPDU for delivery via monitor interface */
  796. mon_mpdu = dp_rx_mon_restitch_mpdu_from_msdus(soc, mac_id, head_msdu,
  797. tail_msdu, rs);
  798. /* monitor vap cannot be present when mcopy is enabled
  799. * hence same skb can be consumed
  800. */
  801. if (pdev->mcopy_mode)
  802. return dp_send_mgmt_packet_to_stack(soc, mon_mpdu, pdev);
  803. if (mon_mpdu && pdev->monitor_vdev && pdev->monitor_vdev->osif_vdev &&
  804. pdev->monitor_vdev->osif_rx_mon) {
  805. pdev->ppdu_info.rx_status.ppdu_id =
  806. pdev->ppdu_info.com_info.ppdu_id;
  807. pdev->ppdu_info.rx_status.device_id = soc->device_id;
  808. pdev->ppdu_info.rx_status.chan_noise_floor =
  809. pdev->chan_noise_floor;
  810. /*
  811. * if chan_num is not fetched correctly from ppdu RX TLV,
  812. * get it from pdev saved.
  813. */
  814. if (pdev->ppdu_info.rx_status.chan_num == 0)
  815. pdev->ppdu_info.rx_status.chan_num = pdev->mon_chan_num;
  816. if (!qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status,
  817. mon_mpdu,
  818. qdf_nbuf_headroom(mon_mpdu))) {
  819. DP_STATS_INC(pdev, dropped.mon_radiotap_update_err, 1);
  820. goto mon_deliver_fail;
  821. }
  822. pdev->monitor_vdev->osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  823. mon_mpdu,
  824. &pdev->ppdu_info.rx_status);
  825. } else {
  826. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  827. "[%s][%d] mon_mpdu=%pK monitor_vdev %pK osif_vdev %pK"
  828. , __func__, __LINE__, mon_mpdu, pdev->monitor_vdev,
  829. (pdev->monitor_vdev ? pdev->monitor_vdev->osif_vdev
  830. : NULL));
  831. goto mon_deliver_fail;
  832. }
  833. return QDF_STATUS_SUCCESS;
  834. mon_deliver_fail:
  835. mon_skb = head_msdu;
  836. while (mon_skb) {
  837. skb_next = qdf_nbuf_next(mon_skb);
  838. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  839. "[%s][%d] mon_skb=%pK len %u", __func__,
  840. __LINE__, mon_skb, mon_skb->len);
  841. qdf_nbuf_free(mon_skb);
  842. mon_skb = skb_next;
  843. }
  844. return QDF_STATUS_E_INVAL;
  845. }
  846. /**
  847. * dp_rx_mon_deliver_non_std()
  848. * @soc: core txrx main contex
  849. * @mac_id: MAC ID
  850. *
  851. * This function delivers the radio tap and dummy MSDU
  852. * into user layer application for preamble only PPDU.
  853. *
  854. * Return: QDF_STATUS
  855. */
  856. QDF_STATUS dp_rx_mon_deliver_non_std(struct dp_soc *soc,
  857. uint32_t mac_id)
  858. {
  859. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  860. ol_txrx_rx_mon_fp osif_rx_mon;
  861. qdf_nbuf_t dummy_msdu;
  862. /* Sanity checking */
  863. if ((!pdev->monitor_vdev) || (!pdev->monitor_vdev->osif_rx_mon))
  864. goto mon_deliver_non_std_fail;
  865. /* Generate a dummy skb_buff */
  866. osif_rx_mon = pdev->monitor_vdev->osif_rx_mon;
  867. dummy_msdu = qdf_nbuf_alloc(soc->osdev, MAX_MONITOR_HEADER,
  868. MAX_MONITOR_HEADER, 4, FALSE);
  869. if (!dummy_msdu)
  870. goto allocate_dummy_msdu_fail;
  871. qdf_nbuf_set_pktlen(dummy_msdu, 0);
  872. qdf_nbuf_set_next(dummy_msdu, NULL);
  873. pdev->ppdu_info.rx_status.ppdu_id =
  874. pdev->ppdu_info.com_info.ppdu_id;
  875. /* Apply the radio header to this dummy skb */
  876. if (!qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status, dummy_msdu,
  877. qdf_nbuf_headroom(dummy_msdu))) {
  878. DP_STATS_INC(pdev, dropped.mon_radiotap_update_err, 1);
  879. qdf_nbuf_free(dummy_msdu);
  880. goto mon_deliver_non_std_fail;
  881. }
  882. /* deliver to the user layer application */
  883. osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  884. dummy_msdu, NULL);
  885. /* Clear rx_status*/
  886. qdf_mem_zero(&pdev->ppdu_info.rx_status,
  887. sizeof(pdev->ppdu_info.rx_status));
  888. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  889. return QDF_STATUS_SUCCESS;
  890. allocate_dummy_msdu_fail:
  891. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_DP, "[%s][%d] mon_skb=%pK ",
  892. __func__, __LINE__, dummy_msdu);
  893. mon_deliver_non_std_fail:
  894. return QDF_STATUS_E_INVAL;
  895. }
  896. /**
  897. * dp_rx_mon_dest_process() - Brain of the Rx processing functionality
  898. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  899. * @soc: core txrx main contex
  900. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  901. * @quota: No. of units (packets) that can be serviced in one shot.
  902. *
  903. * This function implements the core of Rx functionality. This is
  904. * expected to handle only non-error frames.
  905. *
  906. * Return: none
  907. */
  908. void dp_rx_mon_dest_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  909. {
  910. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  911. uint8_t pdev_id;
  912. hal_rxdma_desc_t rxdma_dst_ring_desc;
  913. hal_soc_handle_t hal_soc;
  914. void *mon_dst_srng;
  915. union dp_rx_desc_list_elem_t *head = NULL;
  916. union dp_rx_desc_list_elem_t *tail = NULL;
  917. uint32_t ppdu_id;
  918. uint32_t rx_bufs_used;
  919. uint32_t mpdu_rx_bufs_used;
  920. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  921. struct cdp_pdev_mon_stats *rx_mon_stats;
  922. mon_dst_srng = dp_rxdma_get_mon_dst_ring(pdev, mac_for_pdev);
  923. if (!mon_dst_srng || !hal_srng_initialized(mon_dst_srng)) {
  924. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  925. "%s %d : HAL Monitor Destination Ring Init Failed -- %pK",
  926. __func__, __LINE__, mon_dst_srng);
  927. return;
  928. }
  929. hal_soc = soc->hal_soc;
  930. qdf_assert((hal_soc && pdev));
  931. qdf_spin_lock_bh(&pdev->mon_lock);
  932. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_dst_srng))) {
  933. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  934. "%s %d : HAL Monitor Destination Ring access Failed -- %pK",
  935. __func__, __LINE__, mon_dst_srng);
  936. return;
  937. }
  938. pdev_id = pdev->pdev_id;
  939. ppdu_id = pdev->ppdu_info.com_info.ppdu_id;
  940. rx_bufs_used = 0;
  941. rx_mon_stats = &pdev->rx_mon_stats;
  942. while (qdf_likely(rxdma_dst_ring_desc =
  943. hal_srng_dst_peek(hal_soc, mon_dst_srng))) {
  944. qdf_nbuf_t head_msdu, tail_msdu;
  945. uint32_t npackets;
  946. head_msdu = (qdf_nbuf_t) NULL;
  947. tail_msdu = (qdf_nbuf_t) NULL;
  948. mpdu_rx_bufs_used =
  949. dp_rx_mon_mpdu_pop(soc, mac_id,
  950. rxdma_dst_ring_desc,
  951. &head_msdu, &tail_msdu,
  952. &npackets, &ppdu_id,
  953. &head, &tail);
  954. rx_bufs_used += mpdu_rx_bufs_used;
  955. if (mpdu_rx_bufs_used)
  956. pdev->mon_dest_ring_stuck_cnt = 0;
  957. else
  958. pdev->mon_dest_ring_stuck_cnt++;
  959. if (pdev->mon_dest_ring_stuck_cnt >
  960. MON_DEST_RING_STUCK_MAX_CNT) {
  961. dp_alert("destination ring stuck");
  962. dp_alert("ppdu_id status=%d dest=%d",
  963. pdev->ppdu_info.com_info.ppdu_id, ppdu_id);
  964. pdev->ppdu_info.com_info.ppdu_id = ppdu_id;
  965. continue;
  966. }
  967. if (ppdu_id != pdev->ppdu_info.com_info.ppdu_id) {
  968. rx_mon_stats->stat_ring_ppdu_id_hist[
  969. rx_mon_stats->ppdu_id_hist_idx] =
  970. pdev->ppdu_info.com_info.ppdu_id;
  971. rx_mon_stats->dest_ring_ppdu_id_hist[
  972. rx_mon_stats->ppdu_id_hist_idx] = ppdu_id;
  973. rx_mon_stats->ppdu_id_hist_idx =
  974. (rx_mon_stats->ppdu_id_hist_idx + 1) &
  975. (MAX_PPDU_ID_HIST - 1);
  976. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  977. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  978. sizeof(pdev->ppdu_info.rx_status));
  979. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  980. "%s %d ppdu_id %x != ppdu_info.com_info .ppdu_id %x",
  981. __func__, __LINE__,
  982. ppdu_id, pdev->ppdu_info.com_info.ppdu_id);
  983. break;
  984. }
  985. if (qdf_likely((head_msdu) && (tail_msdu))) {
  986. rx_mon_stats->dest_mpdu_done++;
  987. dp_rx_mon_deliver(soc, mac_id, head_msdu, tail_msdu);
  988. }
  989. rxdma_dst_ring_desc = hal_srng_dst_get_next(hal_soc,
  990. mon_dst_srng);
  991. }
  992. hal_srng_access_end(hal_soc, mon_dst_srng);
  993. qdf_spin_unlock_bh(&pdev->mon_lock);
  994. if (rx_bufs_used) {
  995. rx_mon_stats->dest_ppdu_done++;
  996. dp_rx_buffers_replenish(soc, mac_id,
  997. dp_rxdma_get_mon_buf_ring(pdev,
  998. mac_for_pdev),
  999. dp_rx_get_mon_desc_pool(soc, mac_id,
  1000. pdev_id),
  1001. rx_bufs_used, &head, &tail);
  1002. }
  1003. }
  1004. #ifndef DISABLE_MON_CONFIG
  1005. #ifndef QCA_WIFI_QCA6390
  1006. /**
  1007. * dp_rx_pdev_mon_buf_attach() - Allocate the monitor descriptor pool
  1008. *
  1009. * @pdev: physical device handle
  1010. * @mac_id: mac id
  1011. *
  1012. * Return: QDF_STATUS
  1013. */
  1014. #define MON_BUF_MIN_ALLOC_ENTRIES 128
  1015. static QDF_STATUS
  1016. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev, int mac_id) {
  1017. uint8_t pdev_id = pdev->pdev_id;
  1018. struct dp_soc *soc = pdev->soc;
  1019. struct dp_srng *mon_buf_ring;
  1020. uint32_t num_entries;
  1021. struct rx_desc_pool *rx_desc_pool;
  1022. QDF_STATUS status = QDF_STATUS_SUCCESS;
  1023. uint8_t mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  1024. uint32_t rx_desc_pool_size, replenish_size;
  1025. mon_buf_ring = &pdev->rxdma_mon_buf_ring[mac_for_pdev];
  1026. num_entries = mon_buf_ring->num_entries;
  1027. rx_desc_pool = &soc->rx_desc_mon[mac_id];
  1028. dp_debug("Mon RX Desc Pool[%d] entries=%u",
  1029. pdev_id, num_entries);
  1030. rx_desc_pool_size = DP_RX_DESC_ALLOC_MULTIPLIER * num_entries;
  1031. status = dp_rx_desc_pool_alloc(soc, mac_id, rx_desc_pool_size,
  1032. rx_desc_pool);
  1033. if (!QDF_IS_STATUS_SUCCESS(status))
  1034. return status;
  1035. rx_desc_pool->owner = HAL_RX_BUF_RBM_SW3_BM;
  1036. replenish_size = (num_entries < MON_BUF_MIN_ALLOC_ENTRIES) ?
  1037. num_entries : MON_BUF_MIN_ALLOC_ENTRIES;
  1038. status = dp_pdev_rx_buffers_attach(soc, mac_id, mon_buf_ring,
  1039. rx_desc_pool, replenish_size);
  1040. return status;
  1041. }
  1042. static QDF_STATUS
  1043. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev, int mac_id)
  1044. {
  1045. struct dp_soc *soc = pdev->soc;
  1046. struct rx_desc_pool *rx_desc_pool;
  1047. rx_desc_pool = &soc->rx_desc_mon[mac_id];
  1048. if (rx_desc_pool->pool_size != 0) {
  1049. if (!dp_is_soc_reinit(soc))
  1050. dp_rx_desc_nbuf_and_pool_free(soc, mac_id,
  1051. rx_desc_pool);
  1052. else
  1053. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1054. }
  1055. return QDF_STATUS_SUCCESS;
  1056. }
  1057. /**
  1058. * dp_mon_link_desc_pool_setup(): Allocate and setup link descriptor pool
  1059. * that will be used by HW for various link
  1060. * and queue descriptorsand managed by WBM
  1061. *
  1062. * @soc: soc handle
  1063. * @mac_id: mac id
  1064. *
  1065. * Return: QDF_STATUS
  1066. */
  1067. static
  1068. QDF_STATUS dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  1069. {
  1070. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  1071. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  1072. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1073. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1074. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1075. uint32_t total_link_descs, total_mem_size;
  1076. uint32_t num_link_desc_banks;
  1077. uint32_t last_bank_size = 0;
  1078. uint32_t entry_size, num_entries;
  1079. void *mon_desc_srng;
  1080. uint32_t num_replenish_buf;
  1081. struct dp_srng *dp_srng;
  1082. int i;
  1083. qdf_dma_addr_t *baseaddr = NULL;
  1084. dp_srng = &dp_pdev->rxdma_mon_desc_ring[mac_for_pdev];
  1085. num_entries = dp_srng->alloc_size/hal_srng_get_entrysize(
  1086. soc->hal_soc, RXDMA_MONITOR_DESC);
  1087. /* Round up to power of 2 */
  1088. total_link_descs = 1;
  1089. while (total_link_descs < num_entries)
  1090. total_link_descs <<= 1;
  1091. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1092. "%s: total_link_descs: %u, link_desc_size: %d",
  1093. __func__, total_link_descs, link_desc_size);
  1094. total_mem_size = total_link_descs * link_desc_size;
  1095. total_mem_size += link_desc_align;
  1096. if (total_mem_size <= max_alloc_size) {
  1097. num_link_desc_banks = 0;
  1098. last_bank_size = total_mem_size;
  1099. } else {
  1100. num_link_desc_banks = (total_mem_size) /
  1101. (max_alloc_size - link_desc_align);
  1102. last_bank_size = total_mem_size %
  1103. (max_alloc_size - link_desc_align);
  1104. }
  1105. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1106. "%s: total_mem_size: %d, num_link_desc_banks: %u",
  1107. __func__, total_mem_size, num_link_desc_banks);
  1108. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1109. "%s: max_alloc_size: %d last_bank_size: %d",
  1110. __func__, max_alloc_size, last_bank_size);
  1111. for (i = 0; i < num_link_desc_banks; i++) {
  1112. baseaddr = &dp_pdev->link_desc_banks[mac_for_pdev][i].
  1113. base_paddr_unaligned;
  1114. if (!dp_is_soc_reinit(soc)) {
  1115. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1116. base_vaddr_unaligned =
  1117. qdf_mem_alloc_consistent(soc->osdev,
  1118. soc->osdev->dev,
  1119. max_alloc_size,
  1120. baseaddr);
  1121. if (!dp_pdev->link_desc_banks[mac_for_pdev][i].
  1122. base_vaddr_unaligned) {
  1123. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1124. QDF_TRACE_LEVEL_ERROR,
  1125. "%s: Link desc mem alloc failed",
  1126. __func__);
  1127. goto fail;
  1128. }
  1129. }
  1130. dp_pdev->link_desc_banks[mac_for_pdev][i].size = max_alloc_size;
  1131. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr =
  1132. (void *)((unsigned long)
  1133. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1134. base_vaddr_unaligned) +
  1135. ((unsigned long)
  1136. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1137. base_vaddr_unaligned) %
  1138. link_desc_align));
  1139. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr =
  1140. (unsigned long)
  1141. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1142. base_paddr_unaligned) +
  1143. ((unsigned long)
  1144. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  1145. (unsigned long)
  1146. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1147. base_vaddr_unaligned));
  1148. }
  1149. if (last_bank_size) {
  1150. /* Allocate last bank in case total memory required is not exact
  1151. * multiple of max_alloc_size
  1152. */
  1153. baseaddr = &dp_pdev->link_desc_banks[mac_for_pdev][i].
  1154. base_paddr_unaligned;
  1155. if (!dp_is_soc_reinit(soc)) {
  1156. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1157. base_vaddr_unaligned =
  1158. qdf_mem_alloc_consistent(soc->osdev,
  1159. soc->osdev->dev,
  1160. last_bank_size,
  1161. baseaddr);
  1162. if (!dp_pdev->link_desc_banks[mac_for_pdev][i].
  1163. base_vaddr_unaligned) {
  1164. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1165. QDF_TRACE_LEVEL_ERROR,
  1166. "%s: alloc fail:mon link desc pool",
  1167. __func__);
  1168. goto fail;
  1169. }
  1170. }
  1171. dp_pdev->link_desc_banks[mac_for_pdev][i].size = last_bank_size;
  1172. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr =
  1173. (void *)((unsigned long)
  1174. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1175. base_vaddr_unaligned) +
  1176. ((unsigned long)
  1177. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1178. base_vaddr_unaligned) %
  1179. link_desc_align));
  1180. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr =
  1181. (unsigned long)
  1182. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1183. base_paddr_unaligned) +
  1184. ((unsigned long)
  1185. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  1186. (unsigned long)
  1187. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1188. base_vaddr_unaligned));
  1189. }
  1190. /* Allocate and setup link descriptor idle list for HW internal use */
  1191. entry_size = hal_srng_get_entrysize(soc->hal_soc, RXDMA_MONITOR_DESC);
  1192. total_mem_size = entry_size * total_link_descs;
  1193. mon_desc_srng = dp_pdev->rxdma_mon_desc_ring[mac_for_pdev].hal_srng;
  1194. num_replenish_buf = 0;
  1195. if (total_mem_size <= max_alloc_size) {
  1196. void *desc;
  1197. for (i = 0;
  1198. i < MAX_MON_LINK_DESC_BANKS &&
  1199. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr;
  1200. i++) {
  1201. uint32_t num_entries =
  1202. (dp_pdev->link_desc_banks[mac_for_pdev][i].size -
  1203. (unsigned long)
  1204. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  1205. (unsigned long)
  1206. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1207. base_vaddr_unaligned)) / link_desc_size;
  1208. unsigned long paddr =
  1209. (unsigned long)
  1210. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr);
  1211. unsigned long vaddr =
  1212. (unsigned long)
  1213. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr);
  1214. hal_srng_access_start_unlocked(soc->hal_soc,
  1215. mon_desc_srng);
  1216. while (num_entries && (desc =
  1217. hal_srng_src_get_next(soc->hal_soc,
  1218. mon_desc_srng))) {
  1219. hal_set_link_desc_addr(desc, i, paddr);
  1220. num_entries--;
  1221. num_replenish_buf++;
  1222. paddr += link_desc_size;
  1223. vaddr += link_desc_size;
  1224. }
  1225. hal_srng_access_end_unlocked(soc->hal_soc,
  1226. mon_desc_srng);
  1227. }
  1228. } else {
  1229. qdf_assert(0);
  1230. }
  1231. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1232. "%s: successfully replenished %d buffer",
  1233. __func__, num_replenish_buf);
  1234. return QDF_STATUS_SUCCESS;
  1235. fail:
  1236. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  1237. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1238. base_vaddr_unaligned) {
  1239. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1240. dp_pdev->link_desc_banks[mac_for_pdev][i].size,
  1241. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1242. base_vaddr_unaligned,
  1243. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1244. base_paddr_unaligned, 0);
  1245. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1246. base_vaddr_unaligned = NULL;
  1247. }
  1248. }
  1249. return QDF_STATUS_E_FAILURE;
  1250. }
  1251. /*
  1252. * Free link descriptor pool that was setup HW
  1253. */
  1254. static
  1255. void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  1256. {
  1257. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  1258. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  1259. int i;
  1260. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  1261. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1262. base_vaddr_unaligned) {
  1263. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1264. dp_pdev->link_desc_banks[mac_for_pdev][i].size,
  1265. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1266. base_vaddr_unaligned,
  1267. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1268. base_paddr_unaligned, 0);
  1269. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1270. base_vaddr_unaligned = NULL;
  1271. }
  1272. }
  1273. }
  1274. /**
  1275. * dp_mon_buf_delayed_replenish() - Helper routine to replenish monitor dest buf
  1276. * @pdev: DP pdev object
  1277. *
  1278. * Return: None
  1279. */
  1280. void dp_mon_buf_delayed_replenish(struct dp_pdev *pdev)
  1281. {
  1282. struct dp_soc *soc;
  1283. uint32_t mac_for_pdev;
  1284. union dp_rx_desc_list_elem_t *tail = NULL;
  1285. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1286. uint32_t num_entries;
  1287. uint32_t mac_id;
  1288. soc = pdev->soc;
  1289. num_entries = wlan_cfg_get_dma_mon_buf_ring_size(pdev->wlan_cfg_ctx);
  1290. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1291. mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  1292. pdev->pdev_id);
  1293. dp_rx_buffers_replenish(soc, mac_for_pdev,
  1294. dp_rxdma_get_mon_buf_ring(pdev,
  1295. mac_for_pdev),
  1296. dp_rx_get_mon_desc_pool(soc,
  1297. mac_for_pdev,
  1298. pdev->pdev_id),
  1299. num_entries, &desc_list, &tail);
  1300. }
  1301. }
  1302. #else
  1303. static
  1304. QDF_STATUS dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  1305. {
  1306. return QDF_STATUS_SUCCESS;
  1307. }
  1308. static QDF_STATUS
  1309. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev, int mac_id)
  1310. {
  1311. return QDF_STATUS_SUCCESS;
  1312. }
  1313. static
  1314. void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  1315. {
  1316. }
  1317. static QDF_STATUS
  1318. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev, int mac_id)
  1319. {
  1320. return QDF_STATUS_SUCCESS;
  1321. }
  1322. void dp_mon_buf_delayed_replenish(struct dp_pdev *pdev)
  1323. {}
  1324. #endif
  1325. /**
  1326. * dp_rx_pdev_mon_cmn_detach() - detach dp rx for monitor mode
  1327. * @pdev: core txrx pdev context
  1328. * @mac_id: mac_id for which deinit is to be done
  1329. *
  1330. * This function will free DP Rx resources for
  1331. * monitor mode
  1332. *
  1333. * Return: QDF_STATUS_SUCCESS: success
  1334. * QDF_STATUS_E_RESOURCES: Error return
  1335. */
  1336. static QDF_STATUS
  1337. dp_rx_pdev_mon_cmn_detach(struct dp_pdev *pdev, int mac_id) {
  1338. struct dp_soc *soc = pdev->soc;
  1339. uint8_t pdev_id = pdev->pdev_id;
  1340. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1341. dp_mon_link_desc_pool_cleanup(soc, mac_for_pdev);
  1342. dp_rx_pdev_mon_status_detach(pdev, mac_for_pdev);
  1343. dp_rx_pdev_mon_buf_detach(pdev, mac_for_pdev);
  1344. return QDF_STATUS_SUCCESS;
  1345. }
  1346. /**
  1347. * dp_rx_pdev_mon_cmn_attach() - attach DP RX for monitor mode
  1348. * @pdev: core txrx pdev context
  1349. * @mac_id: mac_id for which init is to be done
  1350. *
  1351. * This function Will allocate dp rx resource and
  1352. * initialize resources for monitor mode.
  1353. *
  1354. * Return: QDF_STATUS_SUCCESS: success
  1355. * QDF_STATUS_E_RESOURCES: Error return
  1356. */
  1357. static QDF_STATUS
  1358. dp_rx_pdev_mon_cmn_attach(struct dp_pdev *pdev, int mac_id) {
  1359. struct dp_soc *soc = pdev->soc;
  1360. uint8_t pdev_id = pdev->pdev_id;
  1361. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1362. QDF_STATUS status;
  1363. status = dp_rx_pdev_mon_buf_attach(pdev, mac_for_pdev);
  1364. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1365. dp_err("%s: dp_rx_pdev_mon_buf_attach() failed\n", __func__);
  1366. goto fail;
  1367. }
  1368. status = dp_rx_pdev_mon_status_attach(pdev, mac_for_pdev);
  1369. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1370. dp_err("%s: dp_rx_pdev_mon_status_attach() failed", __func__);
  1371. goto mon_buf_detach;
  1372. }
  1373. status = dp_mon_link_desc_pool_setup(soc, mac_for_pdev);
  1374. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1375. dp_err("%s: dp_mon_link_desc_pool_setup() failed", __func__);
  1376. goto mon_status_detach;
  1377. }
  1378. return status;
  1379. mon_status_detach:
  1380. dp_rx_pdev_mon_status_detach(pdev, mac_for_pdev);
  1381. mon_buf_detach:
  1382. dp_rx_pdev_mon_buf_detach(pdev, mac_for_pdev);
  1383. fail:
  1384. return status;
  1385. }
  1386. /**
  1387. * dp_rx_pdev_mon_attach() - attach DP RX for monitor mode
  1388. * @pdev: core txrx pdev context
  1389. *
  1390. * This function will attach a DP RX for monitor mode instance into
  1391. * the main device (SOC) context. Will allocate dp rx resource and
  1392. * initialize resources.
  1393. *
  1394. * Return: QDF_STATUS_SUCCESS: success
  1395. * QDF_STATUS_E_RESOURCES: Error return
  1396. */
  1397. QDF_STATUS
  1398. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  1399. QDF_STATUS status;
  1400. uint8_t pdev_id = pdev->pdev_id;
  1401. int mac_id;
  1402. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1403. "%s: pdev attach id=%d", __func__, pdev_id);
  1404. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1405. status = dp_rx_pdev_mon_cmn_attach(pdev, mac_id);
  1406. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1407. QDF_TRACE(QDF_MODULE_ID_DP,
  1408. QDF_TRACE_LEVEL_ERROR,
  1409. "%s: dp_rx_pdev_mon_cmn_attach(%d) failed\n",
  1410. __func__, mac_id);
  1411. goto fail;
  1412. }
  1413. }
  1414. pdev->mon_last_linkdesc_paddr = 0;
  1415. pdev->mon_last_buf_cookie = DP_RX_DESC_COOKIE_MAX + 1;
  1416. qdf_spinlock_create(&pdev->mon_lock);
  1417. return QDF_STATUS_SUCCESS;
  1418. fail:
  1419. for (mac_id = mac_id - 1; mac_id >= 0; mac_id--)
  1420. dp_rx_pdev_mon_cmn_detach(pdev, mac_id);
  1421. return status;
  1422. }
  1423. QDF_STATUS
  1424. dp_mon_link_free(struct dp_pdev *pdev) {
  1425. uint8_t pdev_id = pdev->pdev_id;
  1426. struct dp_soc *soc = pdev->soc;
  1427. int mac_id;
  1428. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1429. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1430. dp_mon_link_desc_pool_cleanup(soc, mac_for_pdev);
  1431. }
  1432. return QDF_STATUS_SUCCESS;
  1433. }
  1434. /**
  1435. * dp_rx_pdev_mon_detach() - detach dp rx for monitor mode
  1436. * @pdev: core txrx pdev context
  1437. *
  1438. * This function will detach DP RX for monitor mode from
  1439. * main device context. will free DP Rx resources for
  1440. * monitor mode
  1441. *
  1442. * Return: QDF_STATUS_SUCCESS: success
  1443. * QDF_STATUS_E_RESOURCES: Error return
  1444. */
  1445. QDF_STATUS
  1446. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  1447. uint8_t pdev_id = pdev->pdev_id;
  1448. int mac_id;
  1449. qdf_spinlock_destroy(&pdev->mon_lock);
  1450. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1451. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1452. dp_rx_pdev_mon_status_detach(pdev, mac_for_pdev);
  1453. dp_rx_pdev_mon_buf_detach(pdev, mac_for_pdev);
  1454. }
  1455. return QDF_STATUS_SUCCESS;
  1456. }
  1457. #else
  1458. QDF_STATUS
  1459. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  1460. return QDF_STATUS_SUCCESS;
  1461. }
  1462. QDF_STATUS
  1463. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  1464. return QDF_STATUS_SUCCESS;
  1465. }
  1466. QDF_STATUS
  1467. dp_mon_link_free(struct dp_pdev *pdev) {
  1468. return QDF_STATUS_SUCCESS;
  1469. }
  1470. #endif /* DISABLE_MON_CONFIG */