mmrm_res_parse.c 6.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/types.h>
  6. #include <linux/of_platform.h>
  7. #include "mmrm_internal.h"
  8. #include "mmrm_debug.h"
  9. #include "mmrm_clk_rsrc_mgr.h"
  10. static int mmrm_find_key_value(
  11. struct mmrm_platform_data *pdata, const char *key)
  12. {
  13. int i = 0;
  14. struct mmrm_common_data *cdata = pdata->common_data;
  15. int size = pdata->common_data_length;
  16. for (i = 0; i < size; i++) {
  17. if (!strcmp(cdata[i].key, key))
  18. return cdata[i].value;
  19. }
  20. return 0;
  21. }
  22. static int mmrm_read_clk_pltfrm_rsrc_frm_drv_data(
  23. struct mmrm_driver_data *ddata)
  24. {
  25. struct mmrm_platform_data *pdata;
  26. struct mmrm_clk_platform_resources *cres;
  27. int rc = 0;
  28. pdata = ddata->platform_data;
  29. cres = &ddata->clk_res;
  30. cres->threshold = mmrm_find_key_value(pdata,
  31. "qcom,mmrm_clk_threshold");
  32. d_mpr_h("%s: configured mmrm clk threshold %d\n",
  33. __func__, cres->threshold);
  34. cres->scheme = mmrm_find_key_value(pdata,
  35. "qcom,mmrm_clk_mgr_scheme");
  36. d_mpr_h("%s: configured mmrm scheme %d\n",
  37. __func__, cres->scheme);
  38. return rc;
  39. }
  40. static void mmrm_free_rail_corner_table(
  41. struct mmrm_clk_platform_resources *cres)
  42. {
  43. cres->corner_set.corner_tbl = NULL;
  44. cres->corner_set.count = 0;
  45. }
  46. static int mmrm_load_mm_rail_corner_table(
  47. struct mmrm_clk_platform_resources *cres)
  48. {
  49. int rc = 0, num_corners = 0, c = 0;
  50. struct voltage_corner_set *corners = &cres->corner_set;
  51. struct platform_device *pdev = cres->pdev;
  52. num_corners = of_property_count_strings(pdev->dev.of_node,
  53. "mm-rail-corners");
  54. if (num_corners <= 0) {
  55. d_mpr_e("%s: no mm rail corners found\n",
  56. __func__);
  57. corners->count = 0;
  58. goto err_load_corner_tbl;
  59. }
  60. corners->corner_tbl = devm_kzalloc(&pdev->dev,
  61. sizeof(*corners->corner_tbl) * num_corners, GFP_KERNEL);
  62. if (!corners->corner_tbl) {
  63. d_mpr_e("%s: failed to allocate memory for corner_tbl\n",
  64. __func__);
  65. rc = -ENOMEM;
  66. goto err_load_corner_tbl;
  67. }
  68. corners->count = num_corners;
  69. d_mpr_h("%s: found %d corners\n",
  70. __func__, num_corners);
  71. for (c = 0; c < num_corners; c++) {
  72. struct corner_info *ci = &corners->corner_tbl[c];
  73. of_property_read_string_index(pdev->dev.of_node,
  74. "mm-rail-corners", c, &ci->name);
  75. of_property_read_u32_index(pdev->dev.of_node,
  76. "mm-rail-fact-volt", c, &ci->volt_factor);
  77. of_property_read_u32_index(pdev->dev.of_node,
  78. "scaling-fact-dyn", c, &ci->scaling_factor_dyn);
  79. of_property_read_u32_index(pdev->dev.of_node,
  80. "scaling-fact-leak", c, &ci->scaling_factor_leak);
  81. }
  82. /* print corner tables */
  83. for (c = 0; c < num_corners; c++) {
  84. struct corner_info *ci = &corners->corner_tbl[c];
  85. d_mpr_h(
  86. "%s: corner_name:%s volt_factor: %d sc_dyn: %d sc_leak: %d\n",
  87. __func__, ci->name, ci->volt_factor,
  88. ci->scaling_factor_dyn, ci->scaling_factor_leak);
  89. }
  90. return 0;
  91. err_load_corner_tbl:
  92. return rc;
  93. }
  94. static void mmrm_free_nom_clk_src_table(
  95. struct mmrm_clk_platform_resources *cres)
  96. {
  97. cres->nom_clk_set.clk_src_tbl = NULL;
  98. cres->nom_clk_set.count = 0;
  99. }
  100. static int mmrm_load_nom_clk_src_table(
  101. struct mmrm_clk_platform_resources *cres)
  102. {
  103. int rc = 0, num_clk_src = 0, c = 0, size_clk_src = 0, entry_offset = 4;
  104. struct platform_device *pdev = cres->pdev;
  105. struct nom_clk_src_set *clk_srcs = &cres->nom_clk_set;
  106. of_find_property(pdev->dev.of_node, "mmrm-client-info", &size_clk_src);
  107. if ((size_clk_src < sizeof(*clk_srcs->clk_src_tbl)) ||
  108. (size_clk_src % sizeof(*clk_srcs->clk_src_tbl))) {
  109. d_mpr_e("%s: invalid size(%d) of clk src table\n",
  110. __func__, size_clk_src);
  111. clk_srcs->count = 0;
  112. goto err_load_clk_src_tbl;
  113. }
  114. clk_srcs->clk_src_tbl = devm_kzalloc(&pdev->dev,
  115. size_clk_src, GFP_KERNEL);
  116. if (!clk_srcs->clk_src_tbl) {
  117. d_mpr_e("%s: failed to allocate memory for clk_src_tbl\n",
  118. __func__);
  119. rc = -ENOMEM;
  120. goto err_load_clk_src_tbl;
  121. }
  122. num_clk_src = size_clk_src / sizeof(struct nom_clk_src_info);
  123. clk_srcs->count = num_clk_src;
  124. d_mpr_h("%s: found %d clk_srcs size %d\n",
  125. __func__, num_clk_src, size_clk_src);
  126. for (c = 0; c < num_clk_src; c++) {
  127. struct nom_clk_src_info *ci = &clk_srcs->clk_src_tbl[c];
  128. of_property_read_u32_index(pdev->dev.of_node,
  129. "mmrm-client-info", (c*entry_offset), &ci->domain);
  130. of_property_read_u32_index(pdev->dev.of_node,
  131. "mmrm-client-info", (c*entry_offset+1), &ci->clk_src_id);
  132. of_property_read_u32_index(pdev->dev.of_node,
  133. "mmrm-client-info", (c*entry_offset+2),
  134. &ci->nom_dyn_pwr);
  135. of_property_read_u32_index(pdev->dev.of_node,
  136. "mmrm-client-info", (c*entry_offset+3),
  137. &ci->nom_leak_pwr);
  138. }
  139. /* print corner tables */
  140. for (c = 0; c < num_clk_src; c++) {
  141. struct nom_clk_src_info *ci = &clk_srcs->clk_src_tbl[c];
  142. d_mpr_h("%s: domain: %d clk_src: %d dyn_pwr: %d leak_pwr: %d\n",
  143. __func__, ci->domain, ci->clk_src_id, ci->nom_dyn_pwr,
  144. ci->nom_leak_pwr);
  145. }
  146. return 0;
  147. err_load_clk_src_tbl:
  148. return rc;
  149. }
  150. static int mmrm_read_clk_pltfrm_rsrc_frm_dt(
  151. struct mmrm_clk_platform_resources *cres)
  152. {
  153. int rc = 0;
  154. rc = mmrm_load_mm_rail_corner_table(cres);
  155. if (rc) {
  156. d_mpr_e("%s: failed to load mm rail corner table\n",
  157. __func__);
  158. goto err_load_mmrm_rail_table;
  159. }
  160. if (cres->scheme == CLK_MGR_SCHEME_SW) {
  161. rc = mmrm_load_nom_clk_src_table(cres);
  162. if (rc) {
  163. d_mpr_e("%s: failed to load nom clk src table\n",
  164. __func__);
  165. goto err_load_nom_clk_src_table;
  166. }
  167. } else if (cres->scheme == CLK_MGR_SCHEME_CXIPEAK) {
  168. d_mpr_e("%s: cxipeak is not supported with mmrm\n",
  169. __func__);
  170. rc = -EINVAL;
  171. goto err_load_mmrm_rail_table;
  172. }
  173. return rc;
  174. err_load_nom_clk_src_table:
  175. mmrm_free_nom_clk_src_table(cres);
  176. err_load_mmrm_rail_table:
  177. mmrm_free_rail_corner_table(cres);
  178. return rc;
  179. }
  180. int mmrm_read_platform_resources(struct platform_device *pdev,
  181. struct mmrm_driver_data *drv_data)
  182. {
  183. int rc = 0;
  184. if (pdev->dev.of_node) {
  185. /* clk resources */
  186. drv_data->clk_res.pdev = pdev;
  187. rc = mmrm_read_clk_pltfrm_rsrc_frm_drv_data(drv_data);
  188. if (rc) {
  189. d_mpr_e(
  190. "%s: failed to read clk platform res from driver\n",
  191. __func__);
  192. goto exit;
  193. }
  194. rc = mmrm_read_clk_pltfrm_rsrc_frm_dt(&drv_data->clk_res);
  195. if (rc) {
  196. d_mpr_e("%s: failed to read clk platform res from dt\n",
  197. __func__);
  198. goto exit;
  199. }
  200. } else {
  201. d_mpr_e("%s: of node is null\n", __func__);
  202. rc = -EINVAL;
  203. goto exit;
  204. }
  205. exit:
  206. return rc;
  207. }
  208. int mmrm_free_platform_resources(struct mmrm_driver_data *drv_data)
  209. {
  210. int rc = 0;
  211. /* free clk resources */
  212. mmrm_free_nom_clk_src_table(&drv_data->clk_res);
  213. mmrm_free_rail_corner_table(&drv_data->clk_res);
  214. return rc;
  215. }