dp_rings_main.c 113 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include <wlan_ipa_obj_mgmt_api.h>
  20. #include <qdf_types.h>
  21. #include <qdf_lock.h>
  22. #include <qdf_net_types.h>
  23. #include <qdf_lro.h>
  24. #include <qdf_module.h>
  25. #include <hal_hw_headers.h>
  26. #include <hal_api.h>
  27. #include <hif.h>
  28. #include <htt.h>
  29. #include <wdi_event.h>
  30. #include <queue.h>
  31. #include "dp_types.h"
  32. #include "dp_rings.h"
  33. #include "dp_internal.h"
  34. #include "dp_tx.h"
  35. #include "dp_tx_desc.h"
  36. #include "dp_rx.h"
  37. #ifdef DP_RATETABLE_SUPPORT
  38. #include "dp_ratetable.h"
  39. #endif
  40. #include <cdp_txrx_handle.h>
  41. #include <wlan_cfg.h>
  42. #include <wlan_utility.h>
  43. #include "cdp_txrx_cmn_struct.h"
  44. #include "cdp_txrx_stats_struct.h"
  45. #include "cdp_txrx_cmn_reg.h"
  46. #include <qdf_util.h>
  47. #include "dp_peer.h"
  48. #include "htt_stats.h"
  49. #include "dp_htt.h"
  50. #include "htt_ppdu_stats.h"
  51. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  52. #include "cfg_ucfg_api.h"
  53. #include <wlan_module_ids.h>
  54. #ifdef WIFI_MONITOR_SUPPORT
  55. #include <dp_mon.h>
  56. #endif
  57. #ifdef WLAN_FEATURE_STATS_EXT
  58. #define INIT_RX_HW_STATS_LOCK(_soc) \
  59. qdf_spinlock_create(&(_soc)->rx_hw_stats_lock)
  60. #define DEINIT_RX_HW_STATS_LOCK(_soc) \
  61. qdf_spinlock_destroy(&(_soc)->rx_hw_stats_lock)
  62. #else
  63. #define INIT_RX_HW_STATS_LOCK(_soc) /* no op */
  64. #define DEINIT_RX_HW_STATS_LOCK(_soc) /* no op */
  65. #endif
  66. static QDF_STATUS dp_init_tx_ring_pair_by_index(struct dp_soc *soc,
  67. uint8_t index);
  68. static void dp_deinit_tx_pair_by_index(struct dp_soc *soc, int index);
  69. static void dp_free_tx_ring_pair_by_index(struct dp_soc *soc, uint8_t index);
  70. static QDF_STATUS dp_alloc_tx_ring_pair_by_index(struct dp_soc *soc,
  71. uint8_t index);
  72. /* default_dscp_tid_map - Default DSCP-TID mapping
  73. *
  74. * DSCP TID
  75. * 000000 0
  76. * 001000 1
  77. * 010000 2
  78. * 011000 3
  79. * 100000 4
  80. * 101000 5
  81. * 110000 6
  82. * 111000 7
  83. */
  84. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  85. 0, 0, 0, 0, 0, 0, 0, 0,
  86. 1, 1, 1, 1, 1, 1, 1, 1,
  87. 2, 2, 2, 2, 2, 2, 2, 2,
  88. 3, 3, 3, 3, 3, 3, 3, 3,
  89. 4, 4, 4, 4, 4, 4, 4, 4,
  90. 5, 5, 5, 5, 5, 5, 5, 5,
  91. 6, 6, 6, 6, 6, 6, 6, 6,
  92. 7, 7, 7, 7, 7, 7, 7, 7,
  93. };
  94. /* default_pcp_tid_map - Default PCP-TID mapping
  95. *
  96. * PCP TID
  97. * 000 0
  98. * 001 1
  99. * 010 2
  100. * 011 3
  101. * 100 4
  102. * 101 5
  103. * 110 6
  104. * 111 7
  105. */
  106. static uint8_t default_pcp_tid_map[PCP_TID_MAP_MAX] = {
  107. 0, 1, 2, 3, 4, 5, 6, 7,
  108. };
  109. uint8_t
  110. dp_cpu_ring_map[DP_NSS_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS_MAX] = {
  111. {0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2},
  112. {0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1},
  113. {0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0},
  114. {0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2},
  115. {0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3},
  116. #ifdef WLAN_TX_PKT_CAPTURE_ENH
  117. {0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1}
  118. #endif
  119. };
  120. qdf_export_symbol(dp_cpu_ring_map);
  121. /**
  122. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  123. * @soc: DP soc handle
  124. * @ring_type: ring type
  125. * @ring_num: ring_num
  126. *
  127. * Return: 0 if the ring is not offloaded, non-0 if it is offloaded
  128. */
  129. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc,
  130. enum hal_ring_type ring_type,
  131. int ring_num)
  132. {
  133. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  134. uint8_t status = 0;
  135. switch (ring_type) {
  136. case WBM2SW_RELEASE:
  137. case REO_DST:
  138. case RXDMA_BUF:
  139. case REO_EXCEPTION:
  140. status = ((nss_config) & (1 << ring_num));
  141. break;
  142. default:
  143. break;
  144. }
  145. return status;
  146. }
  147. #if !defined(DP_CON_MON)
  148. void dp_soc_reset_mon_intr_mask(struct dp_soc *soc)
  149. {
  150. int i;
  151. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  152. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  153. soc->intr_ctx[i].host2rxdma_mon_ring_mask = 0;
  154. }
  155. }
  156. qdf_export_symbol(dp_soc_reset_mon_intr_mask);
  157. void dp_service_lmac_rings(void *arg)
  158. {
  159. struct dp_soc *soc = (struct dp_soc *)arg;
  160. int ring = 0, i;
  161. struct dp_pdev *pdev = NULL;
  162. union dp_rx_desc_list_elem_t *desc_list = NULL;
  163. union dp_rx_desc_list_elem_t *tail = NULL;
  164. /* Process LMAC interrupts */
  165. for (ring = 0 ; ring < MAX_NUM_LMAC_HW; ring++) {
  166. int mac_for_pdev = ring;
  167. struct dp_srng *rx_refill_buf_ring;
  168. pdev = dp_get_pdev_for_lmac_id(soc, mac_for_pdev);
  169. if (!pdev)
  170. continue;
  171. rx_refill_buf_ring = &soc->rx_refill_buf_ring[mac_for_pdev];
  172. dp_monitor_process(soc, NULL, mac_for_pdev,
  173. QCA_NAPI_BUDGET);
  174. for (i = 0;
  175. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  176. dp_rxdma_err_process(&soc->intr_ctx[i], soc,
  177. mac_for_pdev,
  178. QCA_NAPI_BUDGET);
  179. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF,
  180. mac_for_pdev))
  181. dp_rx_buffers_replenish(soc, mac_for_pdev,
  182. rx_refill_buf_ring,
  183. &soc->rx_desc_buf[mac_for_pdev],
  184. 0, &desc_list, &tail, false);
  185. }
  186. qdf_timer_mod(&soc->lmac_reap_timer, DP_INTR_POLL_TIMER_MS);
  187. }
  188. #endif
  189. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  190. /**
  191. * dp_is_reo_ring_num_in_nf_grp1() - Check if the current reo ring is part of
  192. * rx_near_full_grp1 mask
  193. * @soc: Datapath SoC Handle
  194. * @ring_num: REO ring number
  195. *
  196. * Return: 1 if the ring_num belongs to reo_nf_grp1,
  197. * 0, otherwise.
  198. */
  199. static inline int
  200. dp_is_reo_ring_num_in_nf_grp1(struct dp_soc *soc, int ring_num)
  201. {
  202. return (WLAN_CFG_RX_NEAR_FULL_IRQ_MASK_1 & (1 << ring_num));
  203. }
  204. /**
  205. * dp_is_reo_ring_num_in_nf_grp2() - Check if the current reo ring is part of
  206. * rx_near_full_grp2 mask
  207. * @soc: Datapath SoC Handle
  208. * @ring_num: REO ring number
  209. *
  210. * Return: 1 if the ring_num belongs to reo_nf_grp2,
  211. * 0, otherwise.
  212. */
  213. static inline int
  214. dp_is_reo_ring_num_in_nf_grp2(struct dp_soc *soc, int ring_num)
  215. {
  216. return (WLAN_CFG_RX_NEAR_FULL_IRQ_MASK_2 & (1 << ring_num));
  217. }
  218. /**
  219. * dp_srng_get_near_full_irq_mask() - Get near-full irq mask for a particular
  220. * ring type and number
  221. * @soc: Datapath SoC handle
  222. * @ring_type: SRNG type
  223. * @ring_num: ring num
  224. *
  225. * Return: near-full irq mask pointer
  226. */
  227. uint8_t *dp_srng_get_near_full_irq_mask(struct dp_soc *soc,
  228. enum hal_ring_type ring_type,
  229. int ring_num)
  230. {
  231. struct wlan_cfg_dp_soc_ctxt *cfg_ctx = soc->wlan_cfg_ctx;
  232. uint8_t wbm2_sw_rx_rel_ring_id;
  233. uint8_t *nf_irq_mask = NULL;
  234. switch (ring_type) {
  235. case WBM2SW_RELEASE:
  236. wbm2_sw_rx_rel_ring_id =
  237. wlan_cfg_get_rx_rel_ring_id(cfg_ctx);
  238. if (ring_num != wbm2_sw_rx_rel_ring_id) {
  239. nf_irq_mask = &soc->wlan_cfg_ctx->
  240. int_tx_ring_near_full_irq_mask[0];
  241. }
  242. break;
  243. case REO_DST:
  244. if (dp_is_reo_ring_num_in_nf_grp1(soc, ring_num))
  245. nf_irq_mask =
  246. &soc->wlan_cfg_ctx->int_rx_ring_near_full_irq_1_mask[0];
  247. else if (dp_is_reo_ring_num_in_nf_grp2(soc, ring_num))
  248. nf_irq_mask =
  249. &soc->wlan_cfg_ctx->int_rx_ring_near_full_irq_2_mask[0];
  250. else
  251. qdf_assert(0);
  252. break;
  253. default:
  254. break;
  255. }
  256. return nf_irq_mask;
  257. }
  258. /**
  259. * dp_srng_set_msi2_ring_params() - Set the msi2 addr/data in the ring params
  260. * @soc: Datapath SoC handle
  261. * @ring_params: srng params handle
  262. * @msi2_addr: MSI2 addr to be set for the SRNG
  263. * @msi2_data: MSI2 data to be set for the SRNG
  264. *
  265. * Return: None
  266. */
  267. void dp_srng_set_msi2_ring_params(struct dp_soc *soc,
  268. struct hal_srng_params *ring_params,
  269. qdf_dma_addr_t msi2_addr,
  270. uint32_t msi2_data)
  271. {
  272. ring_params->msi2_addr = msi2_addr;
  273. ring_params->msi2_data = msi2_data;
  274. }
  275. /**
  276. * dp_srng_msi2_setup() - Setup MSI2 details for near full IRQ of an SRNG
  277. * @soc: Datapath SoC handle
  278. * @ring_params: ring_params for SRNG
  279. * @ring_type: SENG type
  280. * @ring_num: ring number for the SRNG
  281. * @nf_msi_grp_num: near full msi group number
  282. *
  283. * Return: None
  284. */
  285. void dp_srng_msi2_setup(struct dp_soc *soc,
  286. struct hal_srng_params *ring_params,
  287. int ring_type, int ring_num, int nf_msi_grp_num)
  288. {
  289. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  290. int msi_data_count, ret;
  291. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  292. &msi_data_count, &msi_data_start,
  293. &msi_irq_start);
  294. if (ret)
  295. return;
  296. if (nf_msi_grp_num < 0) {
  297. dp_init_info("%pK: ring near full IRQ not part of an ext_group; ring_type: %d,ring_num %d",
  298. soc, ring_type, ring_num);
  299. ring_params->msi2_addr = 0;
  300. ring_params->msi2_data = 0;
  301. return;
  302. }
  303. if (dp_is_msi_group_number_invalid(soc, nf_msi_grp_num,
  304. msi_data_count)) {
  305. dp_init_warn("%pK: 2 msi_groups will share an msi for near full IRQ; msi_group_num %d",
  306. soc, nf_msi_grp_num);
  307. QDF_ASSERT(0);
  308. }
  309. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  310. ring_params->nf_irq_support = 1;
  311. ring_params->msi2_addr = addr_low;
  312. ring_params->msi2_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  313. ring_params->msi2_data = (nf_msi_grp_num % msi_data_count)
  314. + msi_data_start;
  315. ring_params->flags |= HAL_SRNG_MSI_INTR;
  316. }
  317. /* Percentage of ring entries considered as nearly full */
  318. #define DP_NF_HIGH_THRESH_PERCENTAGE 75
  319. /* Percentage of ring entries considered as critically full */
  320. #define DP_NF_CRIT_THRESH_PERCENTAGE 90
  321. /* Percentage of ring entries considered as safe threshold */
  322. #define DP_NF_SAFE_THRESH_PERCENTAGE 50
  323. /**
  324. * dp_srng_configure_nf_interrupt_thresholds() - Configure the thresholds for
  325. * near full irq
  326. * @soc: Datapath SoC handle
  327. * @ring_params: ring params for SRNG
  328. * @ring_type: ring type
  329. */
  330. void
  331. dp_srng_configure_nf_interrupt_thresholds(struct dp_soc *soc,
  332. struct hal_srng_params *ring_params,
  333. int ring_type)
  334. {
  335. if (ring_params->nf_irq_support) {
  336. ring_params->high_thresh = (ring_params->num_entries *
  337. DP_NF_HIGH_THRESH_PERCENTAGE) / 100;
  338. ring_params->crit_thresh = (ring_params->num_entries *
  339. DP_NF_CRIT_THRESH_PERCENTAGE) / 100;
  340. ring_params->safe_thresh = (ring_params->num_entries *
  341. DP_NF_SAFE_THRESH_PERCENTAGE) /100;
  342. }
  343. }
  344. /**
  345. * dp_srng_set_nf_thresholds() - Set the near full thresholds to srng data
  346. * structure from the ring params
  347. * @soc: Datapath SoC handle
  348. * @srng: SRNG handle
  349. * @ring_params: ring params for a SRNG
  350. *
  351. * Return: None
  352. */
  353. static inline void
  354. dp_srng_set_nf_thresholds(struct dp_soc *soc, struct dp_srng *srng,
  355. struct hal_srng_params *ring_params)
  356. {
  357. srng->crit_thresh = ring_params->crit_thresh;
  358. srng->safe_thresh = ring_params->safe_thresh;
  359. }
  360. #else
  361. static inline void
  362. dp_srng_set_nf_thresholds(struct dp_soc *soc, struct dp_srng *srng,
  363. struct hal_srng_params *ring_params)
  364. {
  365. }
  366. #endif
  367. /**
  368. * dp_get_num_msi_available()- API to get number of MSIs available
  369. * @soc: DP soc Handle
  370. * @interrupt_mode: Mode of interrupts
  371. *
  372. * Return: Number of MSIs available or 0 in case of integrated
  373. */
  374. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  375. static int dp_get_num_msi_available(struct dp_soc *soc, int interrupt_mode)
  376. {
  377. return 0;
  378. }
  379. #else
  380. static int dp_get_num_msi_available(struct dp_soc *soc, int interrupt_mode)
  381. {
  382. int msi_data_count;
  383. int msi_data_start;
  384. int msi_irq_start;
  385. int ret;
  386. if (interrupt_mode == DP_INTR_INTEGRATED) {
  387. return 0;
  388. } else if (interrupt_mode == DP_INTR_MSI || interrupt_mode ==
  389. DP_INTR_POLL) {
  390. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  391. &msi_data_count,
  392. &msi_data_start,
  393. &msi_irq_start);
  394. if (ret) {
  395. qdf_err("Unable to get DP MSI assignment %d",
  396. interrupt_mode);
  397. return -EINVAL;
  398. }
  399. return msi_data_count;
  400. }
  401. qdf_err("Interrupt mode invalid %d", interrupt_mode);
  402. return -EINVAL;
  403. }
  404. #endif
  405. /**
  406. * dp_srng_configure_pointer_update_thresholds() - Retrieve pointer
  407. * update threshold value from wlan_cfg_ctx
  408. * @soc: device handle
  409. * @ring_params: per ring specific parameters
  410. * @ring_type: Ring type
  411. * @ring_num: Ring number for a given ring type
  412. * @num_entries: number of entries to fill
  413. *
  414. * Fill the ring params with the pointer update threshold
  415. * configuration parameters available in wlan_cfg_ctx
  416. *
  417. * Return: None
  418. */
  419. static void
  420. dp_srng_configure_pointer_update_thresholds(
  421. struct dp_soc *soc,
  422. struct hal_srng_params *ring_params,
  423. int ring_type, int ring_num,
  424. int num_entries)
  425. {
  426. if (ring_type == REO_DST) {
  427. ring_params->pointer_timer_threshold =
  428. wlan_cfg_get_pointer_timer_threshold_rx(
  429. soc->wlan_cfg_ctx);
  430. ring_params->pointer_num_threshold =
  431. wlan_cfg_get_pointer_num_threshold_rx(
  432. soc->wlan_cfg_ctx);
  433. }
  434. }
  435. QDF_STATUS dp_srng_init_idx(struct dp_soc *soc, struct dp_srng *srng,
  436. int ring_type, int ring_num, int mac_id,
  437. uint32_t idx)
  438. {
  439. bool idle_check;
  440. hal_soc_handle_t hal_soc = soc->hal_soc;
  441. struct hal_srng_params ring_params;
  442. if (srng->hal_srng) {
  443. dp_init_err("%pK: Ring type: %d, num:%d is already initialized",
  444. soc, ring_type, ring_num);
  445. return QDF_STATUS_SUCCESS;
  446. }
  447. /* memset the srng ring to zero */
  448. qdf_mem_zero(srng->base_vaddr_unaligned, srng->alloc_size);
  449. qdf_mem_zero(&ring_params, sizeof(struct hal_srng_params));
  450. ring_params.ring_base_paddr = srng->base_paddr_aligned;
  451. ring_params.ring_base_vaddr = srng->base_vaddr_aligned;
  452. ring_params.num_entries = srng->num_entries;
  453. dp_info("Ring type: %d, num:%d vaddr %pK paddr %pK entries %u",
  454. ring_type, ring_num,
  455. (void *)ring_params.ring_base_vaddr,
  456. (void *)ring_params.ring_base_paddr,
  457. ring_params.num_entries);
  458. if (soc->intr_mode == DP_INTR_MSI && !dp_skip_msi_cfg(soc, ring_type)) {
  459. dp_srng_msi_setup(soc, srng, &ring_params, ring_type, ring_num);
  460. dp_verbose_debug("Using MSI for ring_type: %d, ring_num %d",
  461. ring_type, ring_num);
  462. } else {
  463. ring_params.msi_data = 0;
  464. ring_params.msi_addr = 0;
  465. dp_srng_set_msi2_ring_params(soc, &ring_params, 0, 0);
  466. dp_verbose_debug("Skipping MSI for ring_type: %d, ring_num %d",
  467. ring_type, ring_num);
  468. }
  469. dp_srng_configure_interrupt_thresholds(soc, &ring_params,
  470. ring_type, ring_num,
  471. srng->num_entries);
  472. dp_srng_set_nf_thresholds(soc, srng, &ring_params);
  473. dp_srng_configure_pointer_update_thresholds(soc, &ring_params,
  474. ring_type, ring_num,
  475. srng->num_entries);
  476. if (srng->cached)
  477. ring_params.flags |= HAL_SRNG_CACHED_DESC;
  478. idle_check = dp_check_umac_reset_in_progress(soc);
  479. srng->hal_srng = hal_srng_setup_idx(hal_soc, ring_type, ring_num,
  480. mac_id, &ring_params, idle_check,
  481. idx);
  482. if (!srng->hal_srng) {
  483. dp_srng_free(soc, srng);
  484. return QDF_STATUS_E_FAILURE;
  485. }
  486. return QDF_STATUS_SUCCESS;
  487. }
  488. qdf_export_symbol(dp_srng_init_idx);
  489. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  490. /**
  491. * dp_service_near_full_srngs() - Bottom half handler to process the near
  492. * full IRQ on a SRNG
  493. * @dp_ctx: Datapath SoC handle
  494. * @dp_budget: Number of SRNGs which can be processed in a single attempt
  495. * without rescheduling
  496. * @cpu: cpu id
  497. *
  498. * Return: remaining budget/quota for the soc device
  499. */
  500. static
  501. uint32_t dp_service_near_full_srngs(void *dp_ctx, uint32_t dp_budget, int cpu)
  502. {
  503. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  504. struct dp_soc *soc = int_ctx->soc;
  505. /*
  506. * dp_service_near_full_srngs arch ops should be initialized always
  507. * if the NEAR FULL IRQ feature is enabled.
  508. */
  509. return soc->arch_ops.dp_service_near_full_srngs(soc, int_ctx,
  510. dp_budget);
  511. }
  512. #endif
  513. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  514. uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget, int cpu)
  515. {
  516. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  517. struct dp_intr_stats *intr_stats = &int_ctx->intr_stats;
  518. struct dp_soc *soc = int_ctx->soc;
  519. int ring = 0;
  520. int index;
  521. uint32_t work_done = 0;
  522. int budget = dp_budget;
  523. uint32_t remaining_quota = dp_budget;
  524. uint8_t tx_mask = 0;
  525. uint8_t rx_mask = 0;
  526. uint8_t rx_err_mask = 0;
  527. uint8_t rx_wbm_rel_mask = 0;
  528. uint8_t reo_status_mask = 0;
  529. qdf_atomic_set_bit(cpu, &soc->service_rings_running);
  530. tx_mask = int_ctx->tx_ring_mask;
  531. rx_mask = int_ctx->rx_ring_mask;
  532. rx_err_mask = int_ctx->rx_err_ring_mask;
  533. rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  534. reo_status_mask = int_ctx->reo_status_ring_mask;
  535. dp_verbose_debug("tx %x rx %x rx_err %x rx_wbm_rel %x reo_status %x rx_mon_ring %x host2rxdma %x rxdma2host %x",
  536. tx_mask, rx_mask, rx_err_mask, rx_wbm_rel_mask,
  537. reo_status_mask,
  538. int_ctx->rx_mon_ring_mask,
  539. int_ctx->host2rxdma_ring_mask,
  540. int_ctx->rxdma2host_ring_mask);
  541. /* Process Tx completion interrupts first to return back buffers */
  542. for (index = 0; index < soc->num_tx_comp_rings; index++) {
  543. if (!(1 << wlan_cfg_get_wbm_ring_num_for_index(soc->wlan_cfg_ctx, index) & tx_mask))
  544. continue;
  545. work_done = dp_tx_comp_handler(int_ctx,
  546. soc,
  547. soc->tx_comp_ring[index].hal_srng,
  548. index, remaining_quota);
  549. if (work_done) {
  550. intr_stats->num_tx_ring_masks[index]++;
  551. dp_verbose_debug("tx mask 0x%x index %d, budget %d, work_done %d",
  552. tx_mask, index, budget,
  553. work_done);
  554. }
  555. budget -= work_done;
  556. if (budget <= 0)
  557. goto budget_done;
  558. remaining_quota = budget;
  559. }
  560. /* Process REO Exception ring interrupt */
  561. if (rx_err_mask) {
  562. work_done = dp_rx_err_process(int_ctx, soc,
  563. soc->reo_exception_ring.hal_srng,
  564. remaining_quota);
  565. if (work_done) {
  566. intr_stats->num_rx_err_ring_masks++;
  567. dp_verbose_debug("REO Exception Ring: work_done %d budget %d",
  568. work_done, budget);
  569. }
  570. budget -= work_done;
  571. if (budget <= 0) {
  572. goto budget_done;
  573. }
  574. remaining_quota = budget;
  575. }
  576. /* Process Rx WBM release ring interrupt */
  577. if (rx_wbm_rel_mask) {
  578. work_done = dp_rx_wbm_err_process(int_ctx, soc,
  579. soc->rx_rel_ring.hal_srng,
  580. remaining_quota);
  581. if (work_done) {
  582. intr_stats->num_rx_wbm_rel_ring_masks++;
  583. dp_verbose_debug("WBM Release Ring: work_done %d budget %d",
  584. work_done, budget);
  585. }
  586. budget -= work_done;
  587. if (budget <= 0) {
  588. goto budget_done;
  589. }
  590. remaining_quota = budget;
  591. }
  592. /* Process Rx interrupts */
  593. if (rx_mask) {
  594. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  595. if (!(rx_mask & (1 << ring)))
  596. continue;
  597. work_done = soc->arch_ops.dp_rx_process(int_ctx,
  598. soc->reo_dest_ring[ring].hal_srng,
  599. ring,
  600. remaining_quota);
  601. if (work_done) {
  602. intr_stats->num_rx_ring_masks[ring]++;
  603. dp_verbose_debug("rx mask 0x%x ring %d, work_done %d budget %d",
  604. rx_mask, ring,
  605. work_done, budget);
  606. budget -= work_done;
  607. if (budget <= 0)
  608. goto budget_done;
  609. remaining_quota = budget;
  610. }
  611. }
  612. }
  613. if (reo_status_mask) {
  614. if (dp_reo_status_ring_handler(int_ctx, soc))
  615. int_ctx->intr_stats.num_reo_status_ring_masks++;
  616. }
  617. if (qdf_unlikely(!dp_monitor_is_vdev_timer_running(soc))) {
  618. work_done = dp_process_lmac_rings(int_ctx, remaining_quota);
  619. if (work_done) {
  620. budget -= work_done;
  621. if (budget <= 0)
  622. goto budget_done;
  623. remaining_quota = budget;
  624. }
  625. }
  626. qdf_lro_flush(int_ctx->lro_ctx);
  627. intr_stats->num_masks++;
  628. budget_done:
  629. qdf_atomic_clear_bit(cpu, &soc->service_rings_running);
  630. dp_umac_reset_trigger_pre_reset_notify_cb(soc);
  631. return dp_budget - budget;
  632. }
  633. #else /* QCA_HOST_MODE_WIFI_DISABLED */
  634. uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget, int cpu)
  635. {
  636. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  637. struct dp_intr_stats *intr_stats = &int_ctx->intr_stats;
  638. struct dp_soc *soc = int_ctx->soc;
  639. uint32_t remaining_quota = dp_budget;
  640. uint32_t work_done = 0;
  641. int budget = dp_budget;
  642. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  643. if (reo_status_mask) {
  644. if (dp_reo_status_ring_handler(int_ctx, soc))
  645. int_ctx->intr_stats.num_reo_status_ring_masks++;
  646. }
  647. if (qdf_unlikely(!dp_monitor_is_vdev_timer_running(soc))) {
  648. work_done = dp_process_lmac_rings(int_ctx, remaining_quota);
  649. if (work_done) {
  650. budget -= work_done;
  651. if (budget <= 0)
  652. goto budget_done;
  653. remaining_quota = budget;
  654. }
  655. }
  656. qdf_lro_flush(int_ctx->lro_ctx);
  657. intr_stats->num_masks++;
  658. budget_done:
  659. return dp_budget - budget;
  660. }
  661. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  662. QDF_STATUS dp_soc_attach_poll(struct cdp_soc_t *txrx_soc)
  663. {
  664. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  665. int i;
  666. int lmac_id = 0;
  667. qdf_mem_set(&soc->mon_intr_id_lmac_map,
  668. sizeof(soc->mon_intr_id_lmac_map), DP_MON_INVALID_LMAC_ID);
  669. soc->intr_mode = DP_INTR_POLL;
  670. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  671. soc->intr_ctx[i].dp_intr_id = i;
  672. soc->intr_ctx[i].tx_ring_mask =
  673. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  674. soc->intr_ctx[i].rx_ring_mask =
  675. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  676. soc->intr_ctx[i].rx_mon_ring_mask =
  677. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  678. soc->intr_ctx[i].rx_err_ring_mask =
  679. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  680. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  681. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  682. soc->intr_ctx[i].reo_status_ring_mask =
  683. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  684. soc->intr_ctx[i].rxdma2host_ring_mask =
  685. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  686. soc->intr_ctx[i].soc = soc;
  687. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  688. if (dp_is_mon_mask_valid(soc, &soc->intr_ctx[i])) {
  689. hif_event_history_init(soc->hif_handle, i);
  690. soc->mon_intr_id_lmac_map[lmac_id] = i;
  691. lmac_id++;
  692. }
  693. }
  694. qdf_timer_init(soc->osdev, &soc->int_timer,
  695. dp_interrupt_timer, (void *)soc,
  696. QDF_TIMER_TYPE_WAKE_APPS);
  697. return QDF_STATUS_SUCCESS;
  698. }
  699. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  700. /**
  701. * dp_soc_near_full_interrupt_attach() - Register handler for DP near fill irq
  702. * @soc: DP soc handle
  703. * @num_irq: IRQ number
  704. * @irq_id_map: IRQ map
  705. * @intr_id: interrupt context ID
  706. *
  707. * Return: 0 for success. nonzero for failure.
  708. */
  709. static inline int
  710. dp_soc_near_full_interrupt_attach(struct dp_soc *soc, int num_irq,
  711. int irq_id_map[], int intr_id)
  712. {
  713. return hif_register_ext_group(soc->hif_handle,
  714. num_irq, irq_id_map,
  715. dp_service_near_full_srngs,
  716. &soc->intr_ctx[intr_id], "dp_nf_intr",
  717. HIF_EXEC_NAPI_TYPE,
  718. QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  719. }
  720. #else
  721. static inline int
  722. dp_soc_near_full_interrupt_attach(struct dp_soc *soc, int num_irq,
  723. int *irq_id_map, int intr_id)
  724. {
  725. return 0;
  726. }
  727. #endif
  728. #ifdef DP_CON_MON_MSI_SKIP_SET
  729. static inline bool dp_skip_rx_mon_ring_mask_set(struct dp_soc *soc)
  730. {
  731. return !!(soc->cdp_soc.ol_ops->get_con_mode() !=
  732. QDF_GLOBAL_MONITOR_MODE &&
  733. !wlan_cfg_get_local_pkt_capture(soc->wlan_cfg_ctx));
  734. }
  735. #else
  736. static inline bool dp_skip_rx_mon_ring_mask_set(struct dp_soc *soc)
  737. {
  738. return false;
  739. }
  740. #endif
  741. void dp_soc_interrupt_detach(struct cdp_soc_t *txrx_soc)
  742. {
  743. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  744. int i;
  745. if (soc->intr_mode == DP_INTR_POLL) {
  746. qdf_timer_free(&soc->int_timer);
  747. } else {
  748. hif_deconfigure_ext_group_interrupts(soc->hif_handle);
  749. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  750. hif_deregister_exec_group(soc->hif_handle, "dp_nf_intr");
  751. }
  752. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  753. soc->intr_ctx[i].tx_ring_mask = 0;
  754. soc->intr_ctx[i].rx_ring_mask = 0;
  755. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  756. soc->intr_ctx[i].rx_err_ring_mask = 0;
  757. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  758. soc->intr_ctx[i].reo_status_ring_mask = 0;
  759. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  760. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  761. soc->intr_ctx[i].host2rxdma_mon_ring_mask = 0;
  762. soc->intr_ctx[i].rx_near_full_grp_1_mask = 0;
  763. soc->intr_ctx[i].rx_near_full_grp_2_mask = 0;
  764. soc->intr_ctx[i].tx_ring_near_full_mask = 0;
  765. soc->intr_ctx[i].tx_mon_ring_mask = 0;
  766. soc->intr_ctx[i].host2txmon_ring_mask = 0;
  767. soc->intr_ctx[i].umac_reset_intr_mask = 0;
  768. hif_event_history_deinit(soc->hif_handle, i);
  769. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  770. }
  771. qdf_mem_set(&soc->mon_intr_id_lmac_map,
  772. sizeof(soc->mon_intr_id_lmac_map),
  773. DP_MON_INVALID_LMAC_ID);
  774. }
  775. QDF_STATUS dp_soc_interrupt_attach(struct cdp_soc_t *txrx_soc)
  776. {
  777. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  778. int i = 0;
  779. int num_irq = 0;
  780. int rx_err_ring_intr_ctxt_id = HIF_MAX_GROUP;
  781. int lmac_id = 0;
  782. int napi_scale;
  783. qdf_mem_set(&soc->mon_intr_id_lmac_map,
  784. sizeof(soc->mon_intr_id_lmac_map), DP_MON_INVALID_LMAC_ID);
  785. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  786. int ret = 0;
  787. /* Map of IRQ ids registered with one interrupt context */
  788. int irq_id_map[HIF_MAX_GRP_IRQ];
  789. int tx_mask =
  790. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  791. int rx_mask =
  792. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  793. int rx_mon_mask =
  794. dp_soc_get_mon_mask_for_interrupt_mode(soc, i);
  795. int tx_mon_ring_mask =
  796. wlan_cfg_get_tx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  797. int rx_err_ring_mask =
  798. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  799. int rx_wbm_rel_ring_mask =
  800. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  801. int reo_status_ring_mask =
  802. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  803. int rxdma2host_ring_mask =
  804. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  805. int host2rxdma_ring_mask =
  806. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  807. int host2rxdma_mon_ring_mask =
  808. wlan_cfg_get_host2rxdma_mon_ring_mask(
  809. soc->wlan_cfg_ctx, i);
  810. int rx_near_full_grp_1_mask =
  811. wlan_cfg_get_rx_near_full_grp_1_mask(soc->wlan_cfg_ctx,
  812. i);
  813. int rx_near_full_grp_2_mask =
  814. wlan_cfg_get_rx_near_full_grp_2_mask(soc->wlan_cfg_ctx,
  815. i);
  816. int tx_ring_near_full_mask =
  817. wlan_cfg_get_tx_ring_near_full_mask(soc->wlan_cfg_ctx,
  818. i);
  819. int host2txmon_ring_mask =
  820. wlan_cfg_get_host2txmon_ring_mask(soc->wlan_cfg_ctx, i);
  821. int umac_reset_intr_mask =
  822. wlan_cfg_get_umac_reset_intr_mask(soc->wlan_cfg_ctx, i);
  823. if (dp_skip_rx_mon_ring_mask_set(soc))
  824. rx_mon_mask = 0;
  825. soc->intr_ctx[i].dp_intr_id = i;
  826. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  827. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  828. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  829. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  830. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  831. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  832. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  833. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  834. soc->intr_ctx[i].host2rxdma_mon_ring_mask =
  835. host2rxdma_mon_ring_mask;
  836. soc->intr_ctx[i].rx_near_full_grp_1_mask =
  837. rx_near_full_grp_1_mask;
  838. soc->intr_ctx[i].rx_near_full_grp_2_mask =
  839. rx_near_full_grp_2_mask;
  840. soc->intr_ctx[i].tx_ring_near_full_mask =
  841. tx_ring_near_full_mask;
  842. soc->intr_ctx[i].tx_mon_ring_mask = tx_mon_ring_mask;
  843. soc->intr_ctx[i].host2txmon_ring_mask = host2txmon_ring_mask;
  844. soc->intr_ctx[i].umac_reset_intr_mask = umac_reset_intr_mask;
  845. soc->intr_ctx[i].soc = soc;
  846. num_irq = 0;
  847. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  848. &num_irq);
  849. if (rx_near_full_grp_1_mask | rx_near_full_grp_2_mask |
  850. tx_ring_near_full_mask) {
  851. dp_soc_near_full_interrupt_attach(soc, num_irq,
  852. irq_id_map, i);
  853. } else {
  854. napi_scale = wlan_cfg_get_napi_scale_factor(
  855. soc->wlan_cfg_ctx);
  856. if (!napi_scale)
  857. napi_scale = QCA_NAPI_DEF_SCALE_BIN_SHIFT;
  858. ret = hif_register_ext_group(soc->hif_handle,
  859. num_irq, irq_id_map, dp_service_srngs_wrapper,
  860. &soc->intr_ctx[i], "dp_intr",
  861. HIF_EXEC_NAPI_TYPE, napi_scale);
  862. }
  863. dp_debug(" int ctx %u num_irq %u irq_id_map %u %u",
  864. i, num_irq, irq_id_map[0], irq_id_map[1]);
  865. if (ret) {
  866. dp_init_err("%pK: failed, ret = %d", soc, ret);
  867. dp_soc_interrupt_detach(txrx_soc);
  868. return QDF_STATUS_E_FAILURE;
  869. }
  870. hif_event_history_init(soc->hif_handle, i);
  871. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  872. if (rx_err_ring_mask)
  873. rx_err_ring_intr_ctxt_id = i;
  874. if (dp_is_mon_mask_valid(soc, &soc->intr_ctx[i])) {
  875. soc->mon_intr_id_lmac_map[lmac_id] = i;
  876. lmac_id++;
  877. }
  878. }
  879. hif_configure_ext_group_interrupts(soc->hif_handle);
  880. if (rx_err_ring_intr_ctxt_id != HIF_MAX_GROUP)
  881. hif_config_irq_clear_cpu_affinity(soc->hif_handle,
  882. rx_err_ring_intr_ctxt_id, 0);
  883. return QDF_STATUS_SUCCESS;
  884. }
  885. #define AVG_MAX_MPDUS_PER_TID 128
  886. #define AVG_TIDS_PER_CLIENT 2
  887. #define AVG_FLOWS_PER_TID 2
  888. #define AVG_MSDUS_PER_FLOW 128
  889. #define AVG_MSDUS_PER_MPDU 4
  890. void dp_hw_link_desc_pool_banks_free(struct dp_soc *soc, uint32_t mac_id)
  891. {
  892. struct qdf_mem_multi_page_t *pages;
  893. if (mac_id != WLAN_INVALID_PDEV_ID) {
  894. pages = dp_monitor_get_link_desc_pages(soc, mac_id);
  895. } else {
  896. pages = &soc->link_desc_pages;
  897. }
  898. if (!pages) {
  899. dp_err("can not get link desc pages");
  900. QDF_ASSERT(0);
  901. return;
  902. }
  903. if (pages->dma_pages) {
  904. wlan_minidump_remove((void *)
  905. pages->dma_pages->page_v_addr_start,
  906. pages->num_pages * pages->page_size,
  907. soc->ctrl_psoc,
  908. WLAN_MD_DP_SRNG_WBM_IDLE_LINK,
  909. "hw_link_desc_bank");
  910. dp_desc_multi_pages_mem_free(soc, QDF_DP_HW_LINK_DESC_TYPE,
  911. pages, 0, false);
  912. }
  913. }
  914. qdf_export_symbol(dp_hw_link_desc_pool_banks_free);
  915. QDF_STATUS dp_hw_link_desc_pool_banks_alloc(struct dp_soc *soc, uint32_t mac_id)
  916. {
  917. hal_soc_handle_t hal_soc = soc->hal_soc;
  918. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  919. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  920. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  921. uint32_t num_mpdus_per_link_desc = hal_num_mpdus_per_link_desc(hal_soc);
  922. uint32_t num_msdus_per_link_desc = hal_num_msdus_per_link_desc(hal_soc);
  923. uint32_t num_mpdu_links_per_queue_desc =
  924. hal_num_mpdu_links_per_queue_desc(hal_soc);
  925. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  926. uint32_t *total_link_descs, total_mem_size;
  927. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  928. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  929. uint32_t num_entries;
  930. struct qdf_mem_multi_page_t *pages;
  931. struct dp_srng *dp_srng;
  932. uint8_t minidump_str[MINIDUMP_STR_SIZE];
  933. /* Only Tx queue descriptors are allocated from common link descriptor
  934. * pool Rx queue descriptors are not included in this because (REO queue
  935. * extension descriptors) they are expected to be allocated contiguously
  936. * with REO queue descriptors
  937. */
  938. if (mac_id != WLAN_INVALID_PDEV_ID) {
  939. pages = dp_monitor_get_link_desc_pages(soc, mac_id);
  940. /* dp_monitor_get_link_desc_pages returns NULL only
  941. * if monitor SOC is NULL
  942. */
  943. if (!pages) {
  944. dp_err("can not get link desc pages");
  945. QDF_ASSERT(0);
  946. return QDF_STATUS_E_FAULT;
  947. }
  948. dp_srng = &soc->rxdma_mon_desc_ring[mac_id];
  949. num_entries = dp_srng->alloc_size /
  950. hal_srng_get_entrysize(soc->hal_soc,
  951. RXDMA_MONITOR_DESC);
  952. total_link_descs = dp_monitor_get_total_link_descs(soc, mac_id);
  953. qdf_str_lcopy(minidump_str, "mon_link_desc_bank",
  954. MINIDUMP_STR_SIZE);
  955. } else {
  956. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  957. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  958. num_mpdu_queue_descs = num_mpdu_link_descs /
  959. num_mpdu_links_per_queue_desc;
  960. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  961. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  962. num_msdus_per_link_desc;
  963. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  964. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  965. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  966. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  967. pages = &soc->link_desc_pages;
  968. total_link_descs = &soc->total_link_descs;
  969. qdf_str_lcopy(minidump_str, "link_desc_bank",
  970. MINIDUMP_STR_SIZE);
  971. }
  972. /* If link descriptor banks are allocated, return from here */
  973. if (pages->num_pages)
  974. return QDF_STATUS_SUCCESS;
  975. /* Round up to power of 2 */
  976. *total_link_descs = 1;
  977. while (*total_link_descs < num_entries)
  978. *total_link_descs <<= 1;
  979. dp_init_info("%pK: total_link_descs: %u, link_desc_size: %d",
  980. soc, *total_link_descs, link_desc_size);
  981. total_mem_size = *total_link_descs * link_desc_size;
  982. total_mem_size += link_desc_align;
  983. dp_init_info("%pK: total_mem_size: %d",
  984. soc, total_mem_size);
  985. dp_set_max_page_size(pages, max_alloc_size);
  986. dp_desc_multi_pages_mem_alloc(soc, QDF_DP_HW_LINK_DESC_TYPE,
  987. pages,
  988. link_desc_size,
  989. *total_link_descs,
  990. 0, false);
  991. if (!pages->num_pages) {
  992. dp_err("Multi page alloc fail for hw link desc pool");
  993. return QDF_STATUS_E_FAULT;
  994. }
  995. wlan_minidump_log(pages->dma_pages->page_v_addr_start,
  996. pages->num_pages * pages->page_size,
  997. soc->ctrl_psoc,
  998. WLAN_MD_DP_SRNG_WBM_IDLE_LINK,
  999. "hw_link_desc_bank");
  1000. return QDF_STATUS_SUCCESS;
  1001. }
  1002. void dp_hw_link_desc_ring_free(struct dp_soc *soc)
  1003. {
  1004. uint32_t i;
  1005. uint32_t size = soc->wbm_idle_scatter_buf_size;
  1006. void *vaddr = soc->wbm_idle_link_ring.base_vaddr_unaligned;
  1007. qdf_dma_addr_t paddr;
  1008. if (soc->wbm_idle_scatter_buf_base_vaddr[0]) {
  1009. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1010. vaddr = soc->wbm_idle_scatter_buf_base_vaddr[i];
  1011. paddr = soc->wbm_idle_scatter_buf_base_paddr[i];
  1012. if (vaddr) {
  1013. qdf_mem_free_consistent(soc->osdev,
  1014. soc->osdev->dev,
  1015. size,
  1016. vaddr,
  1017. paddr,
  1018. 0);
  1019. vaddr = NULL;
  1020. }
  1021. }
  1022. } else {
  1023. wlan_minidump_remove(soc->wbm_idle_link_ring.base_vaddr_unaligned,
  1024. soc->wbm_idle_link_ring.alloc_size,
  1025. soc->ctrl_psoc,
  1026. WLAN_MD_DP_SRNG_WBM_IDLE_LINK,
  1027. "wbm_idle_link_ring");
  1028. dp_srng_free(soc, &soc->wbm_idle_link_ring);
  1029. }
  1030. }
  1031. QDF_STATUS dp_hw_link_desc_ring_alloc(struct dp_soc *soc)
  1032. {
  1033. uint32_t entry_size, i;
  1034. uint32_t total_mem_size;
  1035. qdf_dma_addr_t *baseaddr = NULL;
  1036. struct dp_srng *dp_srng;
  1037. uint32_t ring_type;
  1038. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1039. uint32_t tlds;
  1040. ring_type = WBM_IDLE_LINK;
  1041. dp_srng = &soc->wbm_idle_link_ring;
  1042. tlds = soc->total_link_descs;
  1043. entry_size = hal_srng_get_entrysize(soc->hal_soc, ring_type);
  1044. total_mem_size = entry_size * tlds;
  1045. if (total_mem_size <= max_alloc_size) {
  1046. if (dp_srng_alloc(soc, dp_srng, ring_type, tlds, 0)) {
  1047. dp_init_err("%pK: Link desc idle ring setup failed",
  1048. soc);
  1049. goto fail;
  1050. }
  1051. wlan_minidump_log(soc->wbm_idle_link_ring.base_vaddr_unaligned,
  1052. soc->wbm_idle_link_ring.alloc_size,
  1053. soc->ctrl_psoc,
  1054. WLAN_MD_DP_SRNG_WBM_IDLE_LINK,
  1055. "wbm_idle_link_ring");
  1056. } else {
  1057. uint32_t num_scatter_bufs;
  1058. uint32_t buf_size = 0;
  1059. soc->wbm_idle_scatter_buf_size =
  1060. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1061. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1062. soc->hal_soc, total_mem_size,
  1063. soc->wbm_idle_scatter_buf_size);
  1064. if (num_scatter_bufs > MAX_IDLE_SCATTER_BUFS) {
  1065. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1066. FL("scatter bufs size out of bounds"));
  1067. goto fail;
  1068. }
  1069. for (i = 0; i < num_scatter_bufs; i++) {
  1070. baseaddr = &soc->wbm_idle_scatter_buf_base_paddr[i];
  1071. buf_size = soc->wbm_idle_scatter_buf_size;
  1072. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1073. qdf_mem_alloc_consistent(soc->osdev,
  1074. soc->osdev->dev,
  1075. buf_size,
  1076. baseaddr);
  1077. if (!soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1078. QDF_TRACE(QDF_MODULE_ID_DP,
  1079. QDF_TRACE_LEVEL_ERROR,
  1080. FL("Scatter lst memory alloc fail"));
  1081. goto fail;
  1082. }
  1083. }
  1084. soc->num_scatter_bufs = num_scatter_bufs;
  1085. }
  1086. return QDF_STATUS_SUCCESS;
  1087. fail:
  1088. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1089. void *vaddr = soc->wbm_idle_scatter_buf_base_vaddr[i];
  1090. qdf_dma_addr_t paddr = soc->wbm_idle_scatter_buf_base_paddr[i];
  1091. if (vaddr) {
  1092. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1093. soc->wbm_idle_scatter_buf_size,
  1094. vaddr,
  1095. paddr, 0);
  1096. vaddr = NULL;
  1097. }
  1098. }
  1099. return QDF_STATUS_E_NOMEM;
  1100. }
  1101. qdf_export_symbol(dp_hw_link_desc_pool_banks_alloc);
  1102. QDF_STATUS dp_hw_link_desc_ring_init(struct dp_soc *soc)
  1103. {
  1104. struct dp_srng *dp_srng = &soc->wbm_idle_link_ring;
  1105. if (dp_srng->base_vaddr_unaligned) {
  1106. if (dp_srng_init(soc, dp_srng, WBM_IDLE_LINK, 0, 0))
  1107. return QDF_STATUS_E_FAILURE;
  1108. }
  1109. return QDF_STATUS_SUCCESS;
  1110. }
  1111. void dp_hw_link_desc_ring_deinit(struct dp_soc *soc)
  1112. {
  1113. dp_srng_deinit(soc, &soc->wbm_idle_link_ring, WBM_IDLE_LINK, 0);
  1114. }
  1115. #ifdef IPA_OFFLOAD
  1116. #define USE_1_IPA_RX_REO_RING 1
  1117. #define USE_2_IPA_RX_REO_RINGS 2
  1118. #define REO_DST_RING_SIZE_QCA6290 1023
  1119. #ifndef CONFIG_WIFI_EMULATION_WIFI_3_0
  1120. #define REO_DST_RING_SIZE_QCA8074 1023
  1121. #define REO_DST_RING_SIZE_QCN9000 2048
  1122. #else
  1123. #define REO_DST_RING_SIZE_QCA8074 8
  1124. #define REO_DST_RING_SIZE_QCN9000 8
  1125. #endif /* CONFIG_WIFI_EMULATION_WIFI_3_0 */
  1126. #ifdef IPA_WDI3_TX_TWO_PIPES
  1127. #ifdef DP_MEMORY_OPT
  1128. static int dp_ipa_init_alt_tx_ring(struct dp_soc *soc)
  1129. {
  1130. return dp_init_tx_ring_pair_by_index(soc, IPA_TX_ALT_RING_IDX);
  1131. }
  1132. static void dp_ipa_deinit_alt_tx_ring(struct dp_soc *soc)
  1133. {
  1134. dp_deinit_tx_pair_by_index(soc, IPA_TX_ALT_RING_IDX);
  1135. }
  1136. static int dp_ipa_alloc_alt_tx_ring(struct dp_soc *soc)
  1137. {
  1138. return dp_alloc_tx_ring_pair_by_index(soc, IPA_TX_ALT_RING_IDX);
  1139. }
  1140. static void dp_ipa_free_alt_tx_ring(struct dp_soc *soc)
  1141. {
  1142. dp_free_tx_ring_pair_by_index(soc, IPA_TX_ALT_RING_IDX);
  1143. }
  1144. #else /* !DP_MEMORY_OPT */
  1145. static int dp_ipa_init_alt_tx_ring(struct dp_soc *soc)
  1146. {
  1147. return 0;
  1148. }
  1149. static void dp_ipa_deinit_alt_tx_ring(struct dp_soc *soc)
  1150. {
  1151. }
  1152. static int dp_ipa_alloc_alt_tx_ring(struct dp_soc *soc)
  1153. {
  1154. return 0;
  1155. }
  1156. static void dp_ipa_free_alt_tx_ring(struct dp_soc *soc)
  1157. {
  1158. }
  1159. #endif /* DP_MEMORY_OPT */
  1160. void dp_ipa_hal_tx_init_alt_data_ring(struct dp_soc *soc)
  1161. {
  1162. hal_tx_init_data_ring(soc->hal_soc,
  1163. soc->tcl_data_ring[IPA_TX_ALT_RING_IDX].hal_srng);
  1164. }
  1165. #else /* !IPA_WDI3_TX_TWO_PIPES */
  1166. static int dp_ipa_init_alt_tx_ring(struct dp_soc *soc)
  1167. {
  1168. return 0;
  1169. }
  1170. static void dp_ipa_deinit_alt_tx_ring(struct dp_soc *soc)
  1171. {
  1172. }
  1173. static int dp_ipa_alloc_alt_tx_ring(struct dp_soc *soc)
  1174. {
  1175. return 0;
  1176. }
  1177. static void dp_ipa_free_alt_tx_ring(struct dp_soc *soc)
  1178. {
  1179. }
  1180. void dp_ipa_hal_tx_init_alt_data_ring(struct dp_soc *soc)
  1181. {
  1182. }
  1183. #endif /* IPA_WDI3_TX_TWO_PIPES */
  1184. #else
  1185. #define REO_DST_RING_SIZE_QCA6290 1024
  1186. static int dp_ipa_init_alt_tx_ring(struct dp_soc *soc)
  1187. {
  1188. return 0;
  1189. }
  1190. static void dp_ipa_deinit_alt_tx_ring(struct dp_soc *soc)
  1191. {
  1192. }
  1193. static int dp_ipa_alloc_alt_tx_ring(struct dp_soc *soc)
  1194. {
  1195. return 0;
  1196. }
  1197. static void dp_ipa_free_alt_tx_ring(struct dp_soc *soc)
  1198. {
  1199. }
  1200. void dp_ipa_hal_tx_init_alt_data_ring(struct dp_soc *soc)
  1201. {
  1202. }
  1203. #endif /* IPA_OFFLOAD */
  1204. /**
  1205. * dp_soc_reset_cpu_ring_map() - Reset cpu ring map
  1206. * @soc: Datapath soc handler
  1207. *
  1208. * This api resets the default cpu ring map
  1209. */
  1210. void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1211. {
  1212. uint8_t i;
  1213. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1214. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1215. switch (nss_config) {
  1216. case dp_nss_cfg_first_radio:
  1217. /*
  1218. * Setting Tx ring map for one nss offloaded radio
  1219. */
  1220. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1221. break;
  1222. case dp_nss_cfg_second_radio:
  1223. /*
  1224. * Setting Tx ring for two nss offloaded radios
  1225. */
  1226. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1227. break;
  1228. case dp_nss_cfg_dbdc:
  1229. /*
  1230. * Setting Tx ring map for 2 nss offloaded radios
  1231. */
  1232. soc->tx_ring_map[i] =
  1233. dp_cpu_ring_map[DP_NSS_DBDC_OFFLOADED_MAP][i];
  1234. break;
  1235. case dp_nss_cfg_dbtc:
  1236. /*
  1237. * Setting Tx ring map for 3 nss offloaded radios
  1238. */
  1239. soc->tx_ring_map[i] =
  1240. dp_cpu_ring_map[DP_NSS_DBTC_OFFLOADED_MAP][i];
  1241. break;
  1242. default:
  1243. dp_err("tx_ring_map failed due to invalid nss cfg");
  1244. break;
  1245. }
  1246. }
  1247. }
  1248. /**
  1249. * dp_soc_disable_unused_mac_intr_mask() - reset interrupt mask for
  1250. * unused WMAC hw rings
  1251. * @soc: DP Soc handle
  1252. * @mac_num: wmac num
  1253. *
  1254. * Return: Return void
  1255. */
  1256. static void dp_soc_disable_unused_mac_intr_mask(struct dp_soc *soc,
  1257. int mac_num)
  1258. {
  1259. uint8_t *grp_mask = NULL;
  1260. int group_number;
  1261. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1262. group_number = dp_srng_find_ring_in_mask(mac_num, grp_mask);
  1263. if (group_number < 0)
  1264. dp_init_debug("%pK: ring not part of any group; ring_type: RXDMA_BUF, mac_num %d",
  1265. soc, mac_num);
  1266. else
  1267. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1268. group_number, 0x0);
  1269. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  1270. group_number = dp_srng_find_ring_in_mask(mac_num, grp_mask);
  1271. if (group_number < 0)
  1272. dp_init_debug("%pK: ring not part of any group; ring_type: RXDMA_MONITOR_DST, mac_num %d",
  1273. soc, mac_num);
  1274. else
  1275. wlan_cfg_set_rx_mon_ring_mask(soc->wlan_cfg_ctx,
  1276. group_number, 0x0);
  1277. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  1278. group_number = dp_srng_find_ring_in_mask(mac_num, grp_mask);
  1279. if (group_number < 0)
  1280. dp_init_debug("%pK: ring not part of any group; ring_type: RXDMA_DST, mac_num %d",
  1281. soc, mac_num);
  1282. else
  1283. wlan_cfg_set_rxdma2host_ring_mask(soc->wlan_cfg_ctx,
  1284. group_number, 0x0);
  1285. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_mon_ring_mask[0];
  1286. group_number = dp_srng_find_ring_in_mask(mac_num, grp_mask);
  1287. if (group_number < 0)
  1288. dp_init_debug("%pK: ring not part of any group; ring_type: RXDMA_MONITOR_BUF, mac_num %d",
  1289. soc, mac_num);
  1290. else
  1291. wlan_cfg_set_host2rxdma_mon_ring_mask(soc->wlan_cfg_ctx,
  1292. group_number, 0x0);
  1293. }
  1294. #ifdef IPA_OFFLOAD
  1295. #ifdef IPA_WDI3_VLAN_SUPPORT
  1296. /**
  1297. * dp_soc_reset_ipa_vlan_intr_mask() - reset interrupt mask for IPA offloaded
  1298. * ring for vlan tagged traffic
  1299. * @soc: DP Soc handle
  1300. *
  1301. * Return: Return void
  1302. */
  1303. void dp_soc_reset_ipa_vlan_intr_mask(struct dp_soc *soc)
  1304. {
  1305. uint8_t *grp_mask = NULL;
  1306. int group_number, mask;
  1307. if (!wlan_ipa_is_vlan_enabled())
  1308. return;
  1309. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1310. group_number = dp_srng_find_ring_in_mask(IPA_ALT_REO_DEST_RING_IDX, grp_mask);
  1311. if (group_number < 0) {
  1312. dp_init_debug("%pK: ring not part of any group; ring_type: %d,ring_num %d",
  1313. soc, REO_DST, IPA_ALT_REO_DEST_RING_IDX);
  1314. return;
  1315. }
  1316. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1317. /* reset the interrupt mask for offloaded ring */
  1318. mask &= (~(1 << IPA_ALT_REO_DEST_RING_IDX));
  1319. /*
  1320. * set the interrupt mask to zero for rx offloaded radio.
  1321. */
  1322. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1323. }
  1324. #else
  1325. inline
  1326. void dp_soc_reset_ipa_vlan_intr_mask(struct dp_soc *soc)
  1327. { }
  1328. #endif /* IPA_WDI3_VLAN_SUPPORT */
  1329. #else
  1330. inline
  1331. void dp_soc_reset_ipa_vlan_intr_mask(struct dp_soc *soc)
  1332. { }
  1333. #endif /* IPA_OFFLOAD */
  1334. /**
  1335. * dp_soc_reset_intr_mask() - reset interrupt mask
  1336. * @soc: DP Soc handle
  1337. *
  1338. * Return: Return void
  1339. */
  1340. void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1341. {
  1342. uint8_t j;
  1343. uint8_t *grp_mask = NULL;
  1344. int group_number, mask, num_ring;
  1345. /* number of tx ring */
  1346. num_ring = soc->num_tcl_data_rings;
  1347. /*
  1348. * group mask for tx completion ring.
  1349. */
  1350. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1351. /* loop and reset the mask for only offloaded ring */
  1352. for (j = 0; j < WLAN_CFG_NUM_TCL_DATA_RINGS; j++) {
  1353. /*
  1354. * Group number corresponding to tx offloaded ring.
  1355. */
  1356. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1357. if (group_number < 0) {
  1358. dp_init_debug("%pK: ring not part of any group; ring_type: %d,ring_num %d",
  1359. soc, WBM2SW_RELEASE, j);
  1360. continue;
  1361. }
  1362. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1363. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j) &&
  1364. (!mask)) {
  1365. continue;
  1366. }
  1367. /* reset the tx mask for offloaded ring */
  1368. mask &= (~(1 << j));
  1369. /*
  1370. * reset the interrupt mask for offloaded ring.
  1371. */
  1372. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1373. }
  1374. /* number of rx rings */
  1375. num_ring = soc->num_reo_dest_rings;
  1376. /*
  1377. * group mask for reo destination ring.
  1378. */
  1379. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1380. /* loop and reset the mask for only offloaded ring */
  1381. for (j = 0; j < WLAN_CFG_NUM_REO_DEST_RING; j++) {
  1382. /*
  1383. * Group number corresponding to rx offloaded ring.
  1384. */
  1385. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1386. if (group_number < 0) {
  1387. dp_init_debug("%pK: ring not part of any group; ring_type: %d,ring_num %d",
  1388. soc, REO_DST, j);
  1389. continue;
  1390. }
  1391. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1392. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j) &&
  1393. (!mask)) {
  1394. continue;
  1395. }
  1396. /* reset the interrupt mask for offloaded ring */
  1397. mask &= (~(1 << j));
  1398. /*
  1399. * set the interrupt mask to zero for rx offloaded radio.
  1400. */
  1401. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1402. }
  1403. /*
  1404. * group mask for Rx buffer refill ring
  1405. */
  1406. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1407. /* loop and reset the mask for only offloaded ring */
  1408. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1409. int lmac_id = wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1410. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1411. continue;
  1412. }
  1413. /*
  1414. * Group number corresponding to rx offloaded ring.
  1415. */
  1416. group_number = dp_srng_find_ring_in_mask(lmac_id, grp_mask);
  1417. if (group_number < 0) {
  1418. dp_init_debug("%pK: ring not part of any group; ring_type: %d,ring_num %d",
  1419. soc, REO_DST, lmac_id);
  1420. continue;
  1421. }
  1422. /* set the interrupt mask for offloaded ring */
  1423. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1424. group_number);
  1425. mask &= (~(1 << lmac_id));
  1426. /*
  1427. * set the interrupt mask to zero for rx offloaded radio.
  1428. */
  1429. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1430. group_number, mask);
  1431. }
  1432. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  1433. for (j = 0; j < num_ring; j++) {
  1434. if (!dp_soc_ring_if_nss_offloaded(soc, REO_EXCEPTION, j)) {
  1435. continue;
  1436. }
  1437. /*
  1438. * Group number corresponding to rx err ring.
  1439. */
  1440. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1441. if (group_number < 0) {
  1442. dp_init_debug("%pK: ring not part of any group; ring_type: %d,ring_num %d",
  1443. soc, REO_EXCEPTION, j);
  1444. continue;
  1445. }
  1446. wlan_cfg_set_rx_err_ring_mask(soc->wlan_cfg_ctx,
  1447. group_number, 0);
  1448. }
  1449. }
  1450. #ifdef IPA_OFFLOAD
  1451. bool dp_reo_remap_config(struct dp_soc *soc, uint32_t *remap0,
  1452. uint32_t *remap1, uint32_t *remap2)
  1453. {
  1454. uint32_t ring[WLAN_CFG_NUM_REO_DEST_RING_MAX] = {
  1455. REO_REMAP_SW1, REO_REMAP_SW2, REO_REMAP_SW3,
  1456. REO_REMAP_SW5, REO_REMAP_SW6, REO_REMAP_SW7};
  1457. switch (soc->arch_id) {
  1458. case CDP_ARCH_TYPE_BE:
  1459. hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
  1460. soc->num_reo_dest_rings -
  1461. USE_2_IPA_RX_REO_RINGS, remap1,
  1462. remap2);
  1463. break;
  1464. case CDP_ARCH_TYPE_LI:
  1465. if (wlan_ipa_is_vlan_enabled()) {
  1466. hal_compute_reo_remap_ix2_ix3(
  1467. soc->hal_soc, ring,
  1468. soc->num_reo_dest_rings -
  1469. USE_2_IPA_RX_REO_RINGS, remap1,
  1470. remap2);
  1471. } else {
  1472. hal_compute_reo_remap_ix2_ix3(
  1473. soc->hal_soc, ring,
  1474. soc->num_reo_dest_rings -
  1475. USE_1_IPA_RX_REO_RING, remap1,
  1476. remap2);
  1477. }
  1478. hal_compute_reo_remap_ix0(soc->hal_soc, remap0);
  1479. break;
  1480. default:
  1481. dp_err("unknown arch_id 0x%x", soc->arch_id);
  1482. QDF_BUG(0);
  1483. }
  1484. dp_debug("remap1 %x remap2 %x", *remap1, *remap2);
  1485. return true;
  1486. }
  1487. #ifdef IPA_WDI3_TX_TWO_PIPES
  1488. static bool dp_ipa_is_alt_tx_ring(int index)
  1489. {
  1490. return index == IPA_TX_ALT_RING_IDX;
  1491. }
  1492. static bool dp_ipa_is_alt_tx_comp_ring(int index)
  1493. {
  1494. return index == IPA_TX_ALT_COMP_RING_IDX;
  1495. }
  1496. #else /* !IPA_WDI3_TX_TWO_PIPES */
  1497. static bool dp_ipa_is_alt_tx_ring(int index)
  1498. {
  1499. return false;
  1500. }
  1501. static bool dp_ipa_is_alt_tx_comp_ring(int index)
  1502. {
  1503. return false;
  1504. }
  1505. #endif /* IPA_WDI3_TX_TWO_PIPES */
  1506. /**
  1507. * dp_ipa_get_tx_ring_size() - Get Tx ring size for IPA
  1508. *
  1509. * @tx_ring_num: Tx ring number
  1510. * @tx_ipa_ring_sz: Return param only updated for IPA.
  1511. * @soc_cfg_ctx: dp soc cfg context
  1512. *
  1513. * Return: None
  1514. */
  1515. static void dp_ipa_get_tx_ring_size(int tx_ring_num, int *tx_ipa_ring_sz,
  1516. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx)
  1517. {
  1518. if (!soc_cfg_ctx->ipa_enabled)
  1519. return;
  1520. if (tx_ring_num == IPA_TCL_DATA_RING_IDX)
  1521. *tx_ipa_ring_sz = wlan_cfg_ipa_tx_ring_size(soc_cfg_ctx);
  1522. else if (dp_ipa_is_alt_tx_ring(tx_ring_num))
  1523. *tx_ipa_ring_sz = wlan_cfg_ipa_tx_alt_ring_size(soc_cfg_ctx);
  1524. }
  1525. /**
  1526. * dp_ipa_get_tx_comp_ring_size() - Get Tx comp ring size for IPA
  1527. *
  1528. * @tx_comp_ring_num: Tx comp ring number
  1529. * @tx_comp_ipa_ring_sz: Return param only updated for IPA.
  1530. * @soc_cfg_ctx: dp soc cfg context
  1531. *
  1532. * Return: None
  1533. */
  1534. static void dp_ipa_get_tx_comp_ring_size(int tx_comp_ring_num,
  1535. int *tx_comp_ipa_ring_sz,
  1536. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx)
  1537. {
  1538. if (!soc_cfg_ctx->ipa_enabled)
  1539. return;
  1540. if (tx_comp_ring_num == IPA_TCL_DATA_RING_IDX)
  1541. *tx_comp_ipa_ring_sz =
  1542. wlan_cfg_ipa_tx_comp_ring_size(soc_cfg_ctx);
  1543. else if (dp_ipa_is_alt_tx_comp_ring(tx_comp_ring_num))
  1544. *tx_comp_ipa_ring_sz =
  1545. wlan_cfg_ipa_tx_alt_comp_ring_size(soc_cfg_ctx);
  1546. }
  1547. #else
  1548. static uint8_t dp_reo_ring_selection(uint32_t value, uint32_t *ring)
  1549. {
  1550. uint8_t num = 0;
  1551. switch (value) {
  1552. /* should we have all the different possible ring configs */
  1553. case 0xFF:
  1554. num = 8;
  1555. ring[0] = REO_REMAP_SW1;
  1556. ring[1] = REO_REMAP_SW2;
  1557. ring[2] = REO_REMAP_SW3;
  1558. ring[3] = REO_REMAP_SW4;
  1559. ring[4] = REO_REMAP_SW5;
  1560. ring[5] = REO_REMAP_SW6;
  1561. ring[6] = REO_REMAP_SW7;
  1562. ring[7] = REO_REMAP_SW8;
  1563. break;
  1564. case 0x3F:
  1565. num = 6;
  1566. ring[0] = REO_REMAP_SW1;
  1567. ring[1] = REO_REMAP_SW2;
  1568. ring[2] = REO_REMAP_SW3;
  1569. ring[3] = REO_REMAP_SW4;
  1570. ring[4] = REO_REMAP_SW5;
  1571. ring[5] = REO_REMAP_SW6;
  1572. break;
  1573. case 0xF:
  1574. num = 4;
  1575. ring[0] = REO_REMAP_SW1;
  1576. ring[1] = REO_REMAP_SW2;
  1577. ring[2] = REO_REMAP_SW3;
  1578. ring[3] = REO_REMAP_SW4;
  1579. break;
  1580. case 0xE:
  1581. num = 3;
  1582. ring[0] = REO_REMAP_SW2;
  1583. ring[1] = REO_REMAP_SW3;
  1584. ring[2] = REO_REMAP_SW4;
  1585. break;
  1586. case 0xD:
  1587. num = 3;
  1588. ring[0] = REO_REMAP_SW1;
  1589. ring[1] = REO_REMAP_SW3;
  1590. ring[2] = REO_REMAP_SW4;
  1591. break;
  1592. case 0xC:
  1593. num = 2;
  1594. ring[0] = REO_REMAP_SW3;
  1595. ring[1] = REO_REMAP_SW4;
  1596. break;
  1597. case 0xB:
  1598. num = 3;
  1599. ring[0] = REO_REMAP_SW1;
  1600. ring[1] = REO_REMAP_SW2;
  1601. ring[2] = REO_REMAP_SW4;
  1602. break;
  1603. case 0xA:
  1604. num = 2;
  1605. ring[0] = REO_REMAP_SW2;
  1606. ring[1] = REO_REMAP_SW4;
  1607. break;
  1608. case 0x9:
  1609. num = 2;
  1610. ring[0] = REO_REMAP_SW1;
  1611. ring[1] = REO_REMAP_SW4;
  1612. break;
  1613. case 0x8:
  1614. num = 1;
  1615. ring[0] = REO_REMAP_SW4;
  1616. break;
  1617. case 0x7:
  1618. num = 3;
  1619. ring[0] = REO_REMAP_SW1;
  1620. ring[1] = REO_REMAP_SW2;
  1621. ring[2] = REO_REMAP_SW3;
  1622. break;
  1623. case 0x6:
  1624. num = 2;
  1625. ring[0] = REO_REMAP_SW2;
  1626. ring[1] = REO_REMAP_SW3;
  1627. break;
  1628. case 0x5:
  1629. num = 2;
  1630. ring[0] = REO_REMAP_SW1;
  1631. ring[1] = REO_REMAP_SW3;
  1632. break;
  1633. case 0x4:
  1634. num = 1;
  1635. ring[0] = REO_REMAP_SW3;
  1636. break;
  1637. case 0x3:
  1638. num = 2;
  1639. ring[0] = REO_REMAP_SW1;
  1640. ring[1] = REO_REMAP_SW2;
  1641. break;
  1642. case 0x2:
  1643. num = 1;
  1644. ring[0] = REO_REMAP_SW2;
  1645. break;
  1646. case 0x1:
  1647. num = 1;
  1648. ring[0] = REO_REMAP_SW1;
  1649. break;
  1650. default:
  1651. dp_err("unknown reo ring map 0x%x", value);
  1652. QDF_BUG(0);
  1653. }
  1654. return num;
  1655. }
  1656. bool dp_reo_remap_config(struct dp_soc *soc,
  1657. uint32_t *remap0,
  1658. uint32_t *remap1,
  1659. uint32_t *remap2)
  1660. {
  1661. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1662. uint32_t reo_config = wlan_cfg_get_reo_rings_mapping(soc->wlan_cfg_ctx);
  1663. uint8_t num;
  1664. uint32_t ring[WLAN_CFG_NUM_REO_DEST_RING_MAX];
  1665. uint32_t value;
  1666. switch (offload_radio) {
  1667. case dp_nss_cfg_default:
  1668. value = reo_config & WLAN_CFG_NUM_REO_RINGS_MAP_MAX;
  1669. num = dp_reo_ring_selection(value, ring);
  1670. hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
  1671. num, remap1, remap2);
  1672. hal_compute_reo_remap_ix0(soc->hal_soc, remap0);
  1673. break;
  1674. case dp_nss_cfg_first_radio:
  1675. value = reo_config & 0xE;
  1676. num = dp_reo_ring_selection(value, ring);
  1677. hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
  1678. num, remap1, remap2);
  1679. break;
  1680. case dp_nss_cfg_second_radio:
  1681. value = reo_config & 0xD;
  1682. num = dp_reo_ring_selection(value, ring);
  1683. hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
  1684. num, remap1, remap2);
  1685. break;
  1686. case dp_nss_cfg_dbdc:
  1687. case dp_nss_cfg_dbtc:
  1688. /* return false if both or all are offloaded to NSS */
  1689. return false;
  1690. }
  1691. dp_debug("remap1 %x remap2 %x offload_radio %u",
  1692. *remap1, *remap2, offload_radio);
  1693. return true;
  1694. }
  1695. static void dp_ipa_get_tx_ring_size(int ring_num, int *tx_ipa_ring_sz,
  1696. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx)
  1697. {
  1698. }
  1699. static void dp_ipa_get_tx_comp_ring_size(int tx_comp_ring_num,
  1700. int *tx_comp_ipa_ring_sz,
  1701. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx)
  1702. {
  1703. }
  1704. #endif /* IPA_OFFLOAD */
  1705. /**
  1706. * dp_reo_frag_dst_set() - configure reo register to set the
  1707. * fragment destination ring
  1708. * @soc: Datapath soc
  1709. * @frag_dst_ring: output parameter to set fragment destination ring
  1710. *
  1711. * Based on offload_radio below fragment destination rings is selected
  1712. * 0 - TCL
  1713. * 1 - SW1
  1714. * 2 - SW2
  1715. * 3 - SW3
  1716. * 4 - SW4
  1717. * 5 - Release
  1718. * 6 - FW
  1719. * 7 - alternate select
  1720. *
  1721. * Return: void
  1722. */
  1723. void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  1724. {
  1725. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1726. switch (offload_radio) {
  1727. case dp_nss_cfg_default:
  1728. *frag_dst_ring = REO_REMAP_TCL;
  1729. break;
  1730. case dp_nss_cfg_first_radio:
  1731. /*
  1732. * This configuration is valid for single band radio which
  1733. * is also NSS offload.
  1734. */
  1735. case dp_nss_cfg_dbdc:
  1736. case dp_nss_cfg_dbtc:
  1737. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  1738. break;
  1739. default:
  1740. dp_init_err("%pK: dp_reo_frag_dst_set invalid offload radio config", soc);
  1741. break;
  1742. }
  1743. }
  1744. #ifdef WLAN_FEATURE_STATS_EXT
  1745. static inline void dp_create_ext_stats_event(struct dp_soc *soc)
  1746. {
  1747. qdf_event_create(&soc->rx_hw_stats_event);
  1748. }
  1749. #else
  1750. static inline void dp_create_ext_stats_event(struct dp_soc *soc)
  1751. {
  1752. }
  1753. #endif
  1754. static void dp_deinit_tx_pair_by_index(struct dp_soc *soc, int index)
  1755. {
  1756. int tcl_ring_num, wbm_ring_num;
  1757. wlan_cfg_get_tcl_wbm_ring_num_for_index(soc->wlan_cfg_ctx,
  1758. index,
  1759. &tcl_ring_num,
  1760. &wbm_ring_num);
  1761. if (tcl_ring_num == -1) {
  1762. dp_err("incorrect tcl ring num for index %u", index);
  1763. return;
  1764. }
  1765. wlan_minidump_remove(soc->tcl_data_ring[index].base_vaddr_unaligned,
  1766. soc->tcl_data_ring[index].alloc_size,
  1767. soc->ctrl_psoc,
  1768. WLAN_MD_DP_SRNG_TCL_DATA,
  1769. "tcl_data_ring");
  1770. dp_info("index %u tcl %u wbm %u", index, tcl_ring_num, wbm_ring_num);
  1771. dp_srng_deinit(soc, &soc->tcl_data_ring[index], TCL_DATA,
  1772. tcl_ring_num);
  1773. if (wbm_ring_num == INVALID_WBM_RING_NUM)
  1774. return;
  1775. wlan_minidump_remove(soc->tx_comp_ring[index].base_vaddr_unaligned,
  1776. soc->tx_comp_ring[index].alloc_size,
  1777. soc->ctrl_psoc,
  1778. WLAN_MD_DP_SRNG_TX_COMP,
  1779. "tcl_comp_ring");
  1780. dp_srng_deinit(soc, &soc->tx_comp_ring[index], WBM2SW_RELEASE,
  1781. wbm_ring_num);
  1782. }
  1783. /**
  1784. * dp_init_tx_ring_pair_by_index() - The function inits tcl data/wbm completion
  1785. * ring pair
  1786. * @soc: DP soc pointer
  1787. * @index: index of soc->tcl_data or soc->tx_comp to initialize
  1788. *
  1789. * Return: QDF_STATUS_SUCCESS on success, error code otherwise.
  1790. */
  1791. static QDF_STATUS dp_init_tx_ring_pair_by_index(struct dp_soc *soc,
  1792. uint8_t index)
  1793. {
  1794. int tcl_ring_num, wbm_ring_num;
  1795. uint8_t bm_id;
  1796. if (index >= MAX_TCL_DATA_RINGS) {
  1797. dp_err("unexpected index!");
  1798. QDF_BUG(0);
  1799. goto fail1;
  1800. }
  1801. wlan_cfg_get_tcl_wbm_ring_num_for_index(soc->wlan_cfg_ctx,
  1802. index,
  1803. &tcl_ring_num,
  1804. &wbm_ring_num);
  1805. if (tcl_ring_num == -1) {
  1806. dp_err("incorrect tcl ring num for index %u", index);
  1807. goto fail1;
  1808. }
  1809. dp_info("index %u tcl %u wbm %u", index, tcl_ring_num, wbm_ring_num);
  1810. if (dp_srng_init(soc, &soc->tcl_data_ring[index], TCL_DATA,
  1811. tcl_ring_num, 0)) {
  1812. dp_err("dp_srng_init failed for tcl_data_ring");
  1813. goto fail1;
  1814. }
  1815. wlan_minidump_log(soc->tcl_data_ring[index].base_vaddr_unaligned,
  1816. soc->tcl_data_ring[index].alloc_size,
  1817. soc->ctrl_psoc,
  1818. WLAN_MD_DP_SRNG_TCL_DATA,
  1819. "tcl_data_ring");
  1820. if (wbm_ring_num == INVALID_WBM_RING_NUM)
  1821. goto set_rbm;
  1822. if (dp_srng_init(soc, &soc->tx_comp_ring[index], WBM2SW_RELEASE,
  1823. wbm_ring_num, 0)) {
  1824. dp_err("dp_srng_init failed for tx_comp_ring");
  1825. goto fail1;
  1826. }
  1827. wlan_minidump_log(soc->tx_comp_ring[index].base_vaddr_unaligned,
  1828. soc->tx_comp_ring[index].alloc_size,
  1829. soc->ctrl_psoc,
  1830. WLAN_MD_DP_SRNG_TX_COMP,
  1831. "tcl_comp_ring");
  1832. set_rbm:
  1833. bm_id = wlan_cfg_get_rbm_id_for_index(soc->wlan_cfg_ctx, tcl_ring_num);
  1834. soc->arch_ops.tx_implicit_rbm_set(soc, tcl_ring_num, bm_id);
  1835. return QDF_STATUS_SUCCESS;
  1836. fail1:
  1837. return QDF_STATUS_E_FAILURE;
  1838. }
  1839. static void dp_free_tx_ring_pair_by_index(struct dp_soc *soc, uint8_t index)
  1840. {
  1841. dp_debug("index %u", index);
  1842. dp_srng_free(soc, &soc->tcl_data_ring[index]);
  1843. dp_srng_free(soc, &soc->tx_comp_ring[index]);
  1844. }
  1845. /**
  1846. * dp_alloc_tx_ring_pair_by_index() - The function allocs tcl data/wbm2sw
  1847. * ring pair for the given "index"
  1848. * @soc: DP soc pointer
  1849. * @index: index of soc->tcl_data or soc->tx_comp to initialize
  1850. *
  1851. * Return: QDF_STATUS_SUCCESS on success, error code otherwise.
  1852. */
  1853. static QDF_STATUS dp_alloc_tx_ring_pair_by_index(struct dp_soc *soc,
  1854. uint8_t index)
  1855. {
  1856. int tx_ring_size;
  1857. int tx_comp_ring_size;
  1858. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx = soc->wlan_cfg_ctx;
  1859. int cached = 0;
  1860. if (index >= MAX_TCL_DATA_RINGS) {
  1861. dp_err("unexpected index!");
  1862. QDF_BUG(0);
  1863. goto fail1;
  1864. }
  1865. dp_debug("index %u", index);
  1866. tx_ring_size = wlan_cfg_tx_ring_size(soc_cfg_ctx);
  1867. dp_ipa_get_tx_ring_size(index, &tx_ring_size, soc_cfg_ctx);
  1868. if (dp_srng_alloc(soc, &soc->tcl_data_ring[index], TCL_DATA,
  1869. tx_ring_size, cached)) {
  1870. dp_err("dp_srng_alloc failed for tcl_data_ring");
  1871. goto fail1;
  1872. }
  1873. tx_comp_ring_size = wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  1874. dp_ipa_get_tx_comp_ring_size(index, &tx_comp_ring_size, soc_cfg_ctx);
  1875. /* Enable cached TCL desc if NSS offload is disabled */
  1876. if (!wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx))
  1877. cached = WLAN_CFG_DST_RING_CACHED_DESC;
  1878. if (wlan_cfg_get_wbm_ring_num_for_index(soc->wlan_cfg_ctx, index) ==
  1879. INVALID_WBM_RING_NUM)
  1880. return QDF_STATUS_SUCCESS;
  1881. if (dp_srng_alloc(soc, &soc->tx_comp_ring[index], WBM2SW_RELEASE,
  1882. tx_comp_ring_size, cached)) {
  1883. dp_err("dp_srng_alloc failed for tx_comp_ring");
  1884. goto fail1;
  1885. }
  1886. return QDF_STATUS_SUCCESS;
  1887. fail1:
  1888. return QDF_STATUS_E_FAILURE;
  1889. }
  1890. /**
  1891. * dp_dscp_tid_map_setup() - Initialize the dscp-tid maps
  1892. * @pdev: DP_PDEV handle
  1893. *
  1894. * Return: void
  1895. */
  1896. void
  1897. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  1898. {
  1899. uint8_t map_id;
  1900. struct dp_soc *soc = pdev->soc;
  1901. if (!soc)
  1902. return;
  1903. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  1904. qdf_mem_copy(pdev->dscp_tid_map[map_id],
  1905. default_dscp_tid_map,
  1906. sizeof(default_dscp_tid_map));
  1907. }
  1908. for (map_id = 0; map_id < soc->num_hw_dscp_tid_map; map_id++) {
  1909. hal_tx_set_dscp_tid_map(soc->hal_soc,
  1910. default_dscp_tid_map,
  1911. map_id);
  1912. }
  1913. }
  1914. /**
  1915. * dp_pcp_tid_map_setup() - Initialize the pcp-tid maps
  1916. * @pdev: DP_PDEV handle
  1917. *
  1918. * Return: void
  1919. */
  1920. void
  1921. dp_pcp_tid_map_setup(struct dp_pdev *pdev)
  1922. {
  1923. struct dp_soc *soc = pdev->soc;
  1924. if (!soc)
  1925. return;
  1926. qdf_mem_copy(soc->pcp_tid_map, default_pcp_tid_map,
  1927. sizeof(default_pcp_tid_map));
  1928. hal_tx_set_pcp_tid_map_default(soc->hal_soc, default_pcp_tid_map);
  1929. }
  1930. #ifndef DP_UMAC_HW_RESET_SUPPORT
  1931. static inline
  1932. #endif
  1933. void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  1934. {
  1935. struct reo_desc_list_node *desc;
  1936. struct dp_rx_tid *rx_tid;
  1937. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  1938. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  1939. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  1940. rx_tid = &desc->rx_tid;
  1941. qdf_mem_unmap_nbytes_single(soc->osdev,
  1942. rx_tid->hw_qdesc_paddr,
  1943. QDF_DMA_BIDIRECTIONAL,
  1944. rx_tid->hw_qdesc_alloc_size);
  1945. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  1946. qdf_mem_free(desc);
  1947. }
  1948. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  1949. qdf_list_destroy(&soc->reo_desc_freelist);
  1950. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  1951. }
  1952. #ifdef WLAN_DP_FEATURE_DEFERRED_REO_QDESC_DESTROY
  1953. /**
  1954. * dp_reo_desc_deferred_freelist_create() - Initialize the resources used
  1955. * for deferred reo desc list
  1956. * @soc: Datapath soc handle
  1957. *
  1958. * Return: void
  1959. */
  1960. static void dp_reo_desc_deferred_freelist_create(struct dp_soc *soc)
  1961. {
  1962. qdf_spinlock_create(&soc->reo_desc_deferred_freelist_lock);
  1963. qdf_list_create(&soc->reo_desc_deferred_freelist,
  1964. REO_DESC_DEFERRED_FREELIST_SIZE);
  1965. soc->reo_desc_deferred_freelist_init = true;
  1966. }
  1967. /**
  1968. * dp_reo_desc_deferred_freelist_destroy() - loop the deferred free list &
  1969. * free the leftover REO QDESCs
  1970. * @soc: Datapath soc handle
  1971. *
  1972. * Return: void
  1973. */
  1974. static void dp_reo_desc_deferred_freelist_destroy(struct dp_soc *soc)
  1975. {
  1976. struct reo_desc_deferred_freelist_node *desc;
  1977. qdf_spin_lock_bh(&soc->reo_desc_deferred_freelist_lock);
  1978. soc->reo_desc_deferred_freelist_init = false;
  1979. while (qdf_list_remove_front(&soc->reo_desc_deferred_freelist,
  1980. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  1981. qdf_mem_unmap_nbytes_single(soc->osdev,
  1982. desc->hw_qdesc_paddr,
  1983. QDF_DMA_BIDIRECTIONAL,
  1984. desc->hw_qdesc_alloc_size);
  1985. qdf_mem_free(desc->hw_qdesc_vaddr_unaligned);
  1986. qdf_mem_free(desc);
  1987. }
  1988. qdf_spin_unlock_bh(&soc->reo_desc_deferred_freelist_lock);
  1989. qdf_list_destroy(&soc->reo_desc_deferred_freelist);
  1990. qdf_spinlock_destroy(&soc->reo_desc_deferred_freelist_lock);
  1991. }
  1992. #else
  1993. static inline void dp_reo_desc_deferred_freelist_create(struct dp_soc *soc)
  1994. {
  1995. }
  1996. static inline void dp_reo_desc_deferred_freelist_destroy(struct dp_soc *soc)
  1997. {
  1998. }
  1999. #endif /* !WLAN_DP_FEATURE_DEFERRED_REO_QDESC_DESTROY */
  2000. /**
  2001. * dp_soc_reset_txrx_ring_map() - reset tx ring map
  2002. * @soc: DP SOC handle
  2003. *
  2004. */
  2005. static void dp_soc_reset_txrx_ring_map(struct dp_soc *soc)
  2006. {
  2007. uint32_t i;
  2008. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++)
  2009. soc->tx_ring_map[i] = 0;
  2010. }
  2011. /**
  2012. * dp_soc_deinit() - Deinitialize txrx SOC
  2013. * @txrx_soc: Opaque DP SOC handle
  2014. *
  2015. * Return: None
  2016. */
  2017. void dp_soc_deinit(void *txrx_soc)
  2018. {
  2019. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2020. struct htt_soc *htt_soc = soc->htt_handle;
  2021. dp_monitor_soc_deinit(soc);
  2022. /* free peer tables & AST tables allocated during peer_map_attach */
  2023. if (soc->peer_map_attach_success) {
  2024. dp_peer_find_detach(soc);
  2025. soc->arch_ops.txrx_peer_map_detach(soc);
  2026. soc->peer_map_attach_success = FALSE;
  2027. }
  2028. qdf_flush_work(&soc->htt_stats.work);
  2029. qdf_disable_work(&soc->htt_stats.work);
  2030. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2031. dp_soc_reset_txrx_ring_map(soc);
  2032. dp_reo_desc_freelist_destroy(soc);
  2033. dp_reo_desc_deferred_freelist_destroy(soc);
  2034. DEINIT_RX_HW_STATS_LOCK(soc);
  2035. qdf_spinlock_destroy(&soc->ast_lock);
  2036. dp_peer_mec_spinlock_destroy(soc);
  2037. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2038. qdf_nbuf_queue_free(&soc->invalid_buf_queue);
  2039. qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock);
  2040. qdf_spinlock_destroy(&soc->vdev_map_lock);
  2041. dp_reo_cmdlist_destroy(soc);
  2042. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2043. dp_soc_tx_desc_sw_pools_deinit(soc);
  2044. dp_soc_srng_deinit(soc);
  2045. dp_hw_link_desc_ring_deinit(soc);
  2046. dp_soc_print_inactive_objects(soc);
  2047. qdf_spinlock_destroy(&soc->inactive_peer_list_lock);
  2048. qdf_spinlock_destroy(&soc->inactive_vdev_list_lock);
  2049. htt_soc_htc_dealloc(soc->htt_handle);
  2050. htt_soc_detach(htt_soc);
  2051. /* Free wbm sg list and reset flags in down path */
  2052. dp_rx_wbm_sg_list_deinit(soc);
  2053. wlan_minidump_remove(soc, sizeof(*soc), soc->ctrl_psoc,
  2054. WLAN_MD_DP_SOC, "dp_soc");
  2055. }
  2056. #ifdef QCA_HOST2FW_RXBUF_RING
  2057. void
  2058. dp_htt_setup_rxdma_err_dst_ring(struct dp_soc *soc, int mac_id,
  2059. int lmac_id)
  2060. {
  2061. if (soc->rxdma_err_dst_ring[lmac_id].hal_srng)
  2062. htt_srng_setup(soc->htt_handle, mac_id,
  2063. soc->rxdma_err_dst_ring[lmac_id].hal_srng,
  2064. RXDMA_DST);
  2065. }
  2066. #endif
  2067. void dp_vdev_get_default_reo_hash(struct dp_vdev *vdev,
  2068. enum cdp_host_reo_dest_ring *reo_dest,
  2069. bool *hash_based)
  2070. {
  2071. struct dp_soc *soc;
  2072. struct dp_pdev *pdev;
  2073. pdev = vdev->pdev;
  2074. soc = pdev->soc;
  2075. /*
  2076. * hash based steering is disabled for Radios which are offloaded
  2077. * to NSS
  2078. */
  2079. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  2080. *hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  2081. /*
  2082. * Below line of code will ensure the proper reo_dest ring is chosen
  2083. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  2084. */
  2085. *reo_dest = pdev->reo_dest;
  2086. }
  2087. #ifdef IPA_OFFLOAD
  2088. /**
  2089. * dp_is_vdev_subtype_p2p() - Check if the subtype for vdev is P2P
  2090. * @vdev: Virtual device
  2091. *
  2092. * Return: true if the vdev is of subtype P2P
  2093. * false if the vdev is of any other subtype
  2094. */
  2095. static inline bool dp_is_vdev_subtype_p2p(struct dp_vdev *vdev)
  2096. {
  2097. if (vdev->subtype == wlan_op_subtype_p2p_device ||
  2098. vdev->subtype == wlan_op_subtype_p2p_cli ||
  2099. vdev->subtype == wlan_op_subtype_p2p_go)
  2100. return true;
  2101. return false;
  2102. }
  2103. /**
  2104. * dp_peer_setup_get_reo_hash() - get reo dest ring and hash values for a peer
  2105. * @vdev: Datapath VDEV handle
  2106. * @setup_info:
  2107. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  2108. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  2109. * @lmac_peer_id_msb:
  2110. *
  2111. * If IPA is enabled in ini, for SAP mode, disable hash based
  2112. * steering, use default reo_dst ring for RX. Use config values for other modes.
  2113. *
  2114. * Return: None
  2115. */
  2116. static void dp_peer_setup_get_reo_hash(struct dp_vdev *vdev,
  2117. struct cdp_peer_setup_info *setup_info,
  2118. enum cdp_host_reo_dest_ring *reo_dest,
  2119. bool *hash_based,
  2120. uint8_t *lmac_peer_id_msb)
  2121. {
  2122. struct dp_soc *soc;
  2123. struct dp_pdev *pdev;
  2124. pdev = vdev->pdev;
  2125. soc = pdev->soc;
  2126. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  2127. /* For P2P-GO interfaces we do not need to change the REO
  2128. * configuration even if IPA config is enabled
  2129. */
  2130. if (dp_is_vdev_subtype_p2p(vdev))
  2131. return;
  2132. /*
  2133. * If IPA is enabled, disable hash-based flow steering and set
  2134. * reo_dest_ring_4 as the REO ring to receive packets on.
  2135. * IPA is configured to reap reo_dest_ring_4.
  2136. *
  2137. * Note - REO DST indexes are from 0 - 3, while cdp_host_reo_dest_ring
  2138. * value enum value is from 1 - 4.
  2139. * Hence, *reo_dest = IPA_REO_DEST_RING_IDX + 1
  2140. */
  2141. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  2142. if (dp_ipa_is_mdm_platform()) {
  2143. *reo_dest = IPA_REO_DEST_RING_IDX + 1;
  2144. if (vdev->opmode == wlan_op_mode_ap)
  2145. *hash_based = 0;
  2146. } else {
  2147. dp_debug("opt_dp: default HOST reo ring is set");
  2148. }
  2149. }
  2150. }
  2151. #else
  2152. /**
  2153. * dp_peer_setup_get_reo_hash() - get reo dest ring and hash values for a peer
  2154. * @vdev: Datapath VDEV handle
  2155. * @setup_info:
  2156. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  2157. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  2158. * @lmac_peer_id_msb:
  2159. *
  2160. * Use system config values for hash based steering.
  2161. * Return: None
  2162. */
  2163. static void dp_peer_setup_get_reo_hash(struct dp_vdev *vdev,
  2164. struct cdp_peer_setup_info *setup_info,
  2165. enum cdp_host_reo_dest_ring *reo_dest,
  2166. bool *hash_based,
  2167. uint8_t *lmac_peer_id_msb)
  2168. {
  2169. struct dp_soc *soc = vdev->pdev->soc;
  2170. soc->arch_ops.peer_get_reo_hash(vdev, setup_info, reo_dest, hash_based,
  2171. lmac_peer_id_msb);
  2172. }
  2173. #endif /* IPA_OFFLOAD */
  2174. /**
  2175. * dp_peer_setup_wifi3() - initialize the peer
  2176. * @soc_hdl: soc handle object
  2177. * @vdev_id: vdev_id of vdev object
  2178. * @peer_mac: Peer's mac address
  2179. * @setup_info: peer setup info for MLO
  2180. *
  2181. * Return: QDF_STATUS
  2182. */
  2183. QDF_STATUS
  2184. dp_peer_setup_wifi3(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  2185. uint8_t *peer_mac,
  2186. struct cdp_peer_setup_info *setup_info)
  2187. {
  2188. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  2189. struct dp_pdev *pdev;
  2190. bool hash_based = 0;
  2191. enum cdp_host_reo_dest_ring reo_dest;
  2192. QDF_STATUS status = QDF_STATUS_SUCCESS;
  2193. struct dp_vdev *vdev = NULL;
  2194. struct dp_peer *peer =
  2195. dp_peer_find_hash_find(soc, peer_mac, 0, vdev_id,
  2196. DP_MOD_ID_CDP);
  2197. struct dp_peer *mld_peer = NULL;
  2198. enum wlan_op_mode vdev_opmode;
  2199. uint8_t lmac_peer_id_msb = 0;
  2200. if (!peer)
  2201. return QDF_STATUS_E_FAILURE;
  2202. vdev = peer->vdev;
  2203. if (!vdev) {
  2204. status = QDF_STATUS_E_FAILURE;
  2205. goto fail;
  2206. }
  2207. /* save vdev related member in case vdev freed */
  2208. vdev_opmode = vdev->opmode;
  2209. pdev = vdev->pdev;
  2210. dp_peer_setup_get_reo_hash(vdev, setup_info,
  2211. &reo_dest, &hash_based,
  2212. &lmac_peer_id_msb);
  2213. dp_cfg_event_record_peer_setup_evt(soc, DP_CFG_EVENT_PEER_SETUP,
  2214. peer, vdev, vdev->vdev_id,
  2215. setup_info);
  2216. dp_info("pdev: %d vdev :%d opmode:%u peer %pK (" QDF_MAC_ADDR_FMT ") "
  2217. "hash-based-steering:%d default-reo_dest:%u",
  2218. pdev->pdev_id, vdev->vdev_id,
  2219. vdev->opmode, peer,
  2220. QDF_MAC_ADDR_REF(peer->mac_addr.raw), hash_based, reo_dest);
  2221. /*
  2222. * There are corner cases where the AD1 = AD2 = "VAPs address"
  2223. * i.e both the devices have same MAC address. In these
  2224. * cases we want such pkts to be processed in NULL Q handler
  2225. * which is REO2TCL ring. for this reason we should
  2226. * not setup reo_queues and default route for bss_peer.
  2227. */
  2228. if (!IS_MLO_DP_MLD_PEER(peer))
  2229. dp_monitor_peer_tx_init(pdev, peer);
  2230. if (!setup_info)
  2231. if (dp_peer_legacy_setup(soc, peer) !=
  2232. QDF_STATUS_SUCCESS) {
  2233. status = QDF_STATUS_E_RESOURCES;
  2234. goto fail;
  2235. }
  2236. if (peer->bss_peer && vdev->opmode == wlan_op_mode_ap) {
  2237. status = QDF_STATUS_E_FAILURE;
  2238. goto fail;
  2239. }
  2240. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  2241. /* TODO: Check the destination ring number to be passed to FW */
  2242. soc->cdp_soc.ol_ops->peer_set_default_routing(
  2243. soc->ctrl_psoc,
  2244. peer->vdev->pdev->pdev_id,
  2245. peer->mac_addr.raw,
  2246. peer->vdev->vdev_id, hash_based, reo_dest,
  2247. lmac_peer_id_msb);
  2248. }
  2249. qdf_atomic_set(&peer->is_default_route_set, 1);
  2250. status = dp_peer_mlo_setup(soc, peer, vdev->vdev_id, setup_info);
  2251. if (QDF_IS_STATUS_ERROR(status)) {
  2252. dp_peer_err("peer mlo setup failed");
  2253. qdf_assert_always(0);
  2254. }
  2255. if (vdev_opmode != wlan_op_mode_monitor) {
  2256. /* In case of MLD peer, switch peer to mld peer and
  2257. * do peer_rx_init.
  2258. */
  2259. if (hal_reo_shared_qaddr_is_enable(soc->hal_soc) &&
  2260. IS_MLO_DP_LINK_PEER(peer)) {
  2261. if (setup_info && setup_info->is_first_link) {
  2262. mld_peer = DP_GET_MLD_PEER_FROM_PEER(peer);
  2263. if (mld_peer)
  2264. dp_peer_rx_init(pdev, mld_peer);
  2265. else
  2266. dp_peer_err("MLD peer null. Primary link peer:%pK", peer);
  2267. }
  2268. } else {
  2269. dp_peer_rx_init(pdev, peer);
  2270. }
  2271. }
  2272. if (!IS_MLO_DP_MLD_PEER(peer))
  2273. dp_peer_ppdu_delayed_ba_init(peer);
  2274. fail:
  2275. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  2276. return status;
  2277. }
  2278. /**
  2279. * dp_set_ba_aging_timeout() - set ba aging timeout per AC
  2280. * @txrx_soc: cdp soc handle
  2281. * @ac: Access category
  2282. * @value: timeout value in millisec
  2283. *
  2284. * Return: void
  2285. */
  2286. void dp_set_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  2287. uint8_t ac, uint32_t value)
  2288. {
  2289. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2290. hal_set_ba_aging_timeout(soc->hal_soc, ac, value);
  2291. }
  2292. /**
  2293. * dp_get_ba_aging_timeout() - get ba aging timeout per AC
  2294. * @txrx_soc: cdp soc handle
  2295. * @ac: access category
  2296. * @value: timeout value in millisec
  2297. *
  2298. * Return: void
  2299. */
  2300. void dp_get_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  2301. uint8_t ac, uint32_t *value)
  2302. {
  2303. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2304. hal_get_ba_aging_timeout(soc->hal_soc, ac, value);
  2305. }
  2306. /**
  2307. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  2308. * @txrx_soc: cdp soc handle
  2309. * @pdev_id: id of physical device object
  2310. * @val: reo destination ring index (1 - 4)
  2311. *
  2312. * Return: QDF_STATUS
  2313. */
  2314. QDF_STATUS
  2315. dp_set_pdev_reo_dest(struct cdp_soc_t *txrx_soc, uint8_t pdev_id,
  2316. enum cdp_host_reo_dest_ring val)
  2317. {
  2318. struct dp_pdev *pdev =
  2319. dp_get_pdev_from_soc_pdev_id_wifi3((struct dp_soc *)txrx_soc,
  2320. pdev_id);
  2321. if (pdev) {
  2322. pdev->reo_dest = val;
  2323. return QDF_STATUS_SUCCESS;
  2324. }
  2325. return QDF_STATUS_E_FAILURE;
  2326. }
  2327. /**
  2328. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  2329. * @txrx_soc: cdp soc handle
  2330. * @pdev_id: id of physical device object
  2331. *
  2332. * Return: reo destination ring index
  2333. */
  2334. enum cdp_host_reo_dest_ring
  2335. dp_get_pdev_reo_dest(struct cdp_soc_t *txrx_soc, uint8_t pdev_id)
  2336. {
  2337. struct dp_pdev *pdev =
  2338. dp_get_pdev_from_soc_pdev_id_wifi3((struct dp_soc *)txrx_soc,
  2339. pdev_id);
  2340. if (pdev)
  2341. return pdev->reo_dest;
  2342. else
  2343. return cdp_host_reo_dest_ring_unknown;
  2344. }
  2345. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  2346. union hal_reo_status *reo_status)
  2347. {
  2348. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  2349. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  2350. if (!dp_check_pdev_exists(soc, pdev)) {
  2351. dp_err_rl("pdev doesn't exist");
  2352. return;
  2353. }
  2354. if (!qdf_atomic_read(&soc->cmn_init_done))
  2355. return;
  2356. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  2357. DP_PRINT_STATS("REO stats failure %d",
  2358. queue_status->header.status);
  2359. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  2360. return;
  2361. }
  2362. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  2363. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  2364. }
  2365. /**
  2366. * dp_dump_wbm_idle_hptp() - dump wbm idle ring, hw hp tp info.
  2367. * @soc: dp soc.
  2368. * @pdev: dp pdev.
  2369. *
  2370. * Return: None.
  2371. */
  2372. void
  2373. dp_dump_wbm_idle_hptp(struct dp_soc *soc, struct dp_pdev *pdev)
  2374. {
  2375. uint32_t hw_head;
  2376. uint32_t hw_tail;
  2377. struct dp_srng *srng;
  2378. if (!soc) {
  2379. dp_err("soc is NULL");
  2380. return;
  2381. }
  2382. if (!pdev) {
  2383. dp_err("pdev is NULL");
  2384. return;
  2385. }
  2386. srng = &pdev->soc->wbm_idle_link_ring;
  2387. if (!srng) {
  2388. dp_err("wbm_idle_link_ring srng is NULL");
  2389. return;
  2390. }
  2391. hal_get_hw_hptp(soc->hal_soc, srng->hal_srng, &hw_head,
  2392. &hw_tail, WBM_IDLE_LINK);
  2393. dp_debug("WBM_IDLE_LINK: HW hp: %d, HW tp: %d",
  2394. hw_head, hw_tail);
  2395. }
  2396. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  2397. static void dp_update_soft_irq_limits(struct dp_soc *soc, uint32_t tx_limit,
  2398. uint32_t rx_limit)
  2399. {
  2400. soc->wlan_cfg_ctx->tx_comp_loop_pkt_limit = tx_limit;
  2401. soc->wlan_cfg_ctx->rx_reap_loop_pkt_limit = rx_limit;
  2402. }
  2403. #else
  2404. static inline
  2405. void dp_update_soft_irq_limits(struct dp_soc *soc, uint32_t tx_limit,
  2406. uint32_t rx_limit)
  2407. {
  2408. }
  2409. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  2410. /**
  2411. * dp_display_srng_info() - Dump the srng HP TP info
  2412. * @soc_hdl: CDP Soc handle
  2413. *
  2414. * This function dumps the SW hp/tp values for the important rings.
  2415. * HW hp/tp values are not being dumped, since it can lead to
  2416. * READ NOC error when UMAC is in low power state. MCC does not have
  2417. * device force wake working yet.
  2418. *
  2419. * Return: none
  2420. */
  2421. void dp_display_srng_info(struct cdp_soc_t *soc_hdl)
  2422. {
  2423. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2424. hal_soc_handle_t hal_soc = soc->hal_soc;
  2425. uint32_t hp, tp, i;
  2426. dp_info("SRNG HP-TP data:");
  2427. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2428. hal_get_sw_hptp(hal_soc, soc->tcl_data_ring[i].hal_srng,
  2429. &tp, &hp);
  2430. dp_info("TCL DATA ring[%d]: hp=0x%x, tp=0x%x", i, hp, tp);
  2431. if (wlan_cfg_get_wbm_ring_num_for_index(soc->wlan_cfg_ctx, i) ==
  2432. INVALID_WBM_RING_NUM)
  2433. continue;
  2434. hal_get_sw_hptp(hal_soc, soc->tx_comp_ring[i].hal_srng,
  2435. &tp, &hp);
  2436. dp_info("TX comp ring[%d]: hp=0x%x, tp=0x%x", i, hp, tp);
  2437. }
  2438. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2439. hal_get_sw_hptp(hal_soc, soc->reo_dest_ring[i].hal_srng,
  2440. &tp, &hp);
  2441. dp_info("REO DST ring[%d]: hp=0x%x, tp=0x%x", i, hp, tp);
  2442. }
  2443. hal_get_sw_hptp(hal_soc, soc->reo_exception_ring.hal_srng, &tp, &hp);
  2444. dp_info("REO exception ring: hp=0x%x, tp=0x%x", hp, tp);
  2445. hal_get_sw_hptp(hal_soc, soc->rx_rel_ring.hal_srng, &tp, &hp);
  2446. dp_info("WBM RX release ring: hp=0x%x, tp=0x%x", hp, tp);
  2447. hal_get_sw_hptp(hal_soc, soc->wbm_desc_rel_ring.hal_srng, &tp, &hp);
  2448. dp_info("WBM desc release ring: hp=0x%x, tp=0x%x", hp, tp);
  2449. }
  2450. /**
  2451. * dp_set_pdev_pcp_tid_map_wifi3() - update pcp tid map in pdev
  2452. * @psoc: dp soc handle
  2453. * @pdev_id: id of DP_PDEV handle
  2454. * @pcp: pcp value
  2455. * @tid: tid value passed by the user
  2456. *
  2457. * Return: QDF_STATUS_SUCCESS on success
  2458. */
  2459. QDF_STATUS dp_set_pdev_pcp_tid_map_wifi3(ol_txrx_soc_handle psoc,
  2460. uint8_t pdev_id,
  2461. uint8_t pcp, uint8_t tid)
  2462. {
  2463. struct dp_soc *soc = (struct dp_soc *)psoc;
  2464. soc->pcp_tid_map[pcp] = tid;
  2465. hal_tx_update_pcp_tid_map(soc->hal_soc, pcp, tid);
  2466. return QDF_STATUS_SUCCESS;
  2467. }
  2468. /**
  2469. * dp_set_vdev_pcp_tid_map_wifi3() - update pcp tid map in vdev
  2470. * @soc_hdl: DP soc handle
  2471. * @vdev_id: id of DP_VDEV handle
  2472. * @pcp: pcp value
  2473. * @tid: tid value passed by the user
  2474. *
  2475. * Return: QDF_STATUS_SUCCESS on success
  2476. */
  2477. QDF_STATUS dp_set_vdev_pcp_tid_map_wifi3(struct cdp_soc_t *soc_hdl,
  2478. uint8_t vdev_id,
  2479. uint8_t pcp, uint8_t tid)
  2480. {
  2481. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2482. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  2483. DP_MOD_ID_CDP);
  2484. if (!vdev)
  2485. return QDF_STATUS_E_FAILURE;
  2486. vdev->pcp_tid_map[pcp] = tid;
  2487. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  2488. return QDF_STATUS_SUCCESS;
  2489. }
  2490. #if defined(FEATURE_RUNTIME_PM) || defined(DP_POWER_SAVE)
  2491. void dp_drain_txrx(struct cdp_soc_t *soc_handle)
  2492. {
  2493. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  2494. uint32_t cur_tx_limit, cur_rx_limit;
  2495. uint32_t budget = 0xffff;
  2496. uint32_t val;
  2497. int i;
  2498. int cpu = dp_srng_get_cpu();
  2499. cur_tx_limit = soc->wlan_cfg_ctx->tx_comp_loop_pkt_limit;
  2500. cur_rx_limit = soc->wlan_cfg_ctx->rx_reap_loop_pkt_limit;
  2501. /* Temporarily increase soft irq limits when going to drain
  2502. * the UMAC/LMAC SRNGs and restore them after polling.
  2503. * Though the budget is on higher side, the TX/RX reaping loops
  2504. * will not execute longer as both TX and RX would be suspended
  2505. * by the time this API is called.
  2506. */
  2507. dp_update_soft_irq_limits(soc, budget, budget);
  2508. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  2509. soc->arch_ops.dp_service_srngs(&soc->intr_ctx[i], budget, cpu);
  2510. dp_update_soft_irq_limits(soc, cur_tx_limit, cur_rx_limit);
  2511. /* Do a dummy read at offset 0; this will ensure all
  2512. * pendings writes(HP/TP) are flushed before read returns.
  2513. */
  2514. val = HAL_REG_READ((struct hal_soc *)soc->hal_soc, 0);
  2515. dp_debug("Register value at offset 0: %u", val);
  2516. }
  2517. #endif
  2518. #if defined(DP_POWER_SAVE) || defined(FEATURE_RUNTIME_PM)
  2519. /**
  2520. * dp_flush_ring_hptp() - Update ring shadow
  2521. * register HP/TP address when runtime
  2522. * resume
  2523. * @soc: DP soc context
  2524. * @hal_srng: srng
  2525. *
  2526. * Return: None
  2527. */
  2528. static void dp_flush_ring_hptp(struct dp_soc *soc, hal_ring_handle_t hal_srng)
  2529. {
  2530. if (hal_srng && hal_srng_get_clear_event(hal_srng,
  2531. HAL_SRNG_FLUSH_EVENT)) {
  2532. /* Acquire the lock */
  2533. hal_srng_access_start(soc->hal_soc, hal_srng);
  2534. hal_srng_access_end(soc->hal_soc, hal_srng);
  2535. hal_srng_set_flush_last_ts(hal_srng);
  2536. dp_debug("flushed");
  2537. }
  2538. }
  2539. void dp_update_ring_hptp(struct dp_soc *soc, bool force_flush_tx)
  2540. {
  2541. uint8_t i;
  2542. if (force_flush_tx) {
  2543. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2544. hal_srng_set_event(soc->tcl_data_ring[i].hal_srng,
  2545. HAL_SRNG_FLUSH_EVENT);
  2546. dp_flush_ring_hptp(soc, soc->tcl_data_ring[i].hal_srng);
  2547. }
  2548. return;
  2549. }
  2550. for (i = 0; i < soc->num_tcl_data_rings; i++)
  2551. dp_flush_ring_hptp(soc, soc->tcl_data_ring[i].hal_srng);
  2552. dp_flush_ring_hptp(soc, soc->reo_cmd_ring.hal_srng);
  2553. }
  2554. #endif
  2555. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  2556. /*
  2557. * dp_flush_tcl_ring() - flush TCL ring hp
  2558. * @pdev: dp pdev
  2559. * @ring_id: TCL ring id
  2560. *
  2561. * Return: 0 on success and error code on failure
  2562. */
  2563. int dp_flush_tcl_ring(struct dp_pdev *pdev, int ring_id)
  2564. {
  2565. struct dp_soc *soc = pdev->soc;
  2566. hal_ring_handle_t hal_ring_hdl =
  2567. soc->tcl_data_ring[ring_id].hal_srng;
  2568. int ret;
  2569. ret = hal_srng_try_access_start(soc->hal_soc, hal_ring_hdl);
  2570. if (ret)
  2571. return ret;
  2572. ret = hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_DP);
  2573. if (ret) {
  2574. hal_srng_access_end_reap(soc->hal_soc, hal_ring_hdl);
  2575. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  2576. hal_srng_inc_flush_cnt(hal_ring_hdl);
  2577. return ret;
  2578. }
  2579. hal_srng_access_end(soc->hal_soc, hal_ring_hdl);
  2580. hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_DP);
  2581. return ret;
  2582. }
  2583. #else
  2584. int dp_flush_tcl_ring(struct dp_pdev *pdev, int ring_id)
  2585. {
  2586. return QDF_STATUS_SUCCESS;
  2587. }
  2588. #endif
  2589. #ifdef WLAN_FEATURE_STATS_EXT
  2590. /* rx hw stats event wait timeout in ms */
  2591. #define DP_REO_STATUS_STATS_TIMEOUT 100
  2592. /**
  2593. * dp_rx_hw_stats_cb() - request rx hw stats response callback
  2594. * @soc: soc handle
  2595. * @cb_ctxt: callback context
  2596. * @reo_status: reo command response status
  2597. *
  2598. * Return: None
  2599. */
  2600. static void dp_rx_hw_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  2601. union hal_reo_status *reo_status)
  2602. {
  2603. struct hal_reo_queue_status *queue_status = &reo_status->queue_status;
  2604. bool is_query_timeout;
  2605. qdf_spin_lock_bh(&soc->rx_hw_stats_lock);
  2606. is_query_timeout = soc->rx_hw_stats->is_query_timeout;
  2607. /* free the cb_ctxt if all pending tid stats query is received */
  2608. if (qdf_atomic_dec_and_test(&soc->rx_hw_stats->pending_tid_stats_cnt)) {
  2609. if (!is_query_timeout) {
  2610. qdf_event_set(&soc->rx_hw_stats_event);
  2611. soc->is_last_stats_ctx_init = false;
  2612. }
  2613. qdf_mem_free(soc->rx_hw_stats);
  2614. soc->rx_hw_stats = NULL;
  2615. }
  2616. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  2617. dp_info("REO stats failure %d",
  2618. queue_status->header.status);
  2619. qdf_spin_unlock_bh(&soc->rx_hw_stats_lock);
  2620. return;
  2621. }
  2622. if (!is_query_timeout) {
  2623. soc->ext_stats.rx_mpdu_received +=
  2624. queue_status->mpdu_frms_cnt;
  2625. soc->ext_stats.rx_mpdu_missed +=
  2626. queue_status->hole_cnt;
  2627. }
  2628. qdf_spin_unlock_bh(&soc->rx_hw_stats_lock);
  2629. }
  2630. /**
  2631. * dp_request_rx_hw_stats() - request rx hardware stats
  2632. * @soc_hdl: soc handle
  2633. * @vdev_id: vdev id
  2634. *
  2635. * Return: None
  2636. */
  2637. QDF_STATUS
  2638. dp_request_rx_hw_stats(struct cdp_soc_t *soc_hdl, uint8_t vdev_id)
  2639. {
  2640. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  2641. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  2642. DP_MOD_ID_CDP);
  2643. struct dp_peer *peer = NULL;
  2644. QDF_STATUS status;
  2645. int rx_stats_sent_cnt = 0;
  2646. uint32_t last_rx_mpdu_received;
  2647. uint32_t last_rx_mpdu_missed;
  2648. if (soc->rx_hw_stats) {
  2649. dp_err_rl("Stats already requested");
  2650. status = QDF_STATUS_E_ALREADY;
  2651. goto out;
  2652. }
  2653. if (!vdev) {
  2654. dp_err("vdev is null for vdev_id: %u", vdev_id);
  2655. status = QDF_STATUS_E_INVAL;
  2656. goto out;
  2657. }
  2658. peer = dp_vdev_bss_peer_ref_n_get(soc, vdev, DP_MOD_ID_CDP);
  2659. if (!peer) {
  2660. dp_err("Peer is NULL");
  2661. status = QDF_STATUS_E_INVAL;
  2662. goto out;
  2663. }
  2664. soc->rx_hw_stats = qdf_mem_malloc(sizeof(*soc->rx_hw_stats));
  2665. if (!soc->rx_hw_stats) {
  2666. dp_err("malloc failed for hw stats structure");
  2667. status = QDF_STATUS_E_INVAL;
  2668. goto out;
  2669. }
  2670. qdf_event_reset(&soc->rx_hw_stats_event);
  2671. qdf_spin_lock_bh(&soc->rx_hw_stats_lock);
  2672. /* save the last soc cumulative stats and reset it to 0 */
  2673. last_rx_mpdu_received = soc->ext_stats.rx_mpdu_received;
  2674. last_rx_mpdu_missed = soc->ext_stats.rx_mpdu_missed;
  2675. soc->ext_stats.rx_mpdu_received = 0;
  2676. soc->ext_stats.rx_mpdu_missed = 0;
  2677. dp_debug("HW stats query start");
  2678. rx_stats_sent_cnt =
  2679. dp_peer_rxtid_stats(peer, dp_rx_hw_stats_cb, soc->rx_hw_stats);
  2680. if (!rx_stats_sent_cnt) {
  2681. dp_err("no tid stats sent successfully");
  2682. qdf_mem_free(soc->rx_hw_stats);
  2683. soc->rx_hw_stats = NULL;
  2684. qdf_spin_unlock_bh(&soc->rx_hw_stats_lock);
  2685. status = QDF_STATUS_E_INVAL;
  2686. goto out;
  2687. }
  2688. qdf_atomic_set(&soc->rx_hw_stats->pending_tid_stats_cnt,
  2689. rx_stats_sent_cnt);
  2690. soc->rx_hw_stats->is_query_timeout = false;
  2691. soc->is_last_stats_ctx_init = true;
  2692. qdf_spin_unlock_bh(&soc->rx_hw_stats_lock);
  2693. status = qdf_wait_single_event(&soc->rx_hw_stats_event,
  2694. DP_REO_STATUS_STATS_TIMEOUT);
  2695. dp_debug("HW stats query end with %d", rx_stats_sent_cnt);
  2696. qdf_spin_lock_bh(&soc->rx_hw_stats_lock);
  2697. if (status != QDF_STATUS_SUCCESS) {
  2698. if (soc->rx_hw_stats) {
  2699. dp_info("partial rx hw stats event collected with %d",
  2700. qdf_atomic_read(
  2701. &soc->rx_hw_stats->pending_tid_stats_cnt));
  2702. if (soc->is_last_stats_ctx_init)
  2703. soc->rx_hw_stats->is_query_timeout = true;
  2704. }
  2705. /*
  2706. * If query timeout happened, use the last saved stats
  2707. * for this time query.
  2708. */
  2709. soc->ext_stats.rx_mpdu_received = last_rx_mpdu_received;
  2710. soc->ext_stats.rx_mpdu_missed = last_rx_mpdu_missed;
  2711. DP_STATS_INC(soc, rx.rx_hw_stats_timeout, 1);
  2712. }
  2713. qdf_spin_unlock_bh(&soc->rx_hw_stats_lock);
  2714. out:
  2715. if (peer)
  2716. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  2717. if (vdev)
  2718. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  2719. DP_STATS_INC(soc, rx.rx_hw_stats_requested, 1);
  2720. return status;
  2721. }
  2722. /**
  2723. * dp_reset_rx_hw_ext_stats() - Reset rx hardware ext stats
  2724. * @soc_hdl: soc handle
  2725. *
  2726. * Return: None
  2727. */
  2728. void dp_reset_rx_hw_ext_stats(struct cdp_soc_t *soc_hdl)
  2729. {
  2730. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  2731. soc->ext_stats.rx_mpdu_received = 0;
  2732. soc->ext_stats.rx_mpdu_missed = 0;
  2733. }
  2734. #endif /* WLAN_FEATURE_STATS_EXT */
  2735. uint32_t dp_get_tx_rings_grp_bitmap(struct cdp_soc_t *soc_hdl)
  2736. {
  2737. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  2738. return soc->wlan_cfg_ctx->tx_rings_grp_bitmap;
  2739. }
  2740. void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  2741. {
  2742. uint32_t i;
  2743. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  2744. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_DEFAULT_MAP][i];
  2745. }
  2746. }
  2747. qdf_export_symbol(dp_soc_set_txrx_ring_map);
  2748. static void dp_soc_cfg_dump(struct dp_soc *soc, uint32_t target_type)
  2749. {
  2750. dp_init_info("DP soc Dump for Target = %d", target_type);
  2751. dp_init_info("ast_override_support = %d da_war_enabled = %d",
  2752. soc->ast_override_support, soc->da_war_enabled);
  2753. wlan_cfg_dp_soc_ctx_dump(soc->wlan_cfg_ctx);
  2754. }
  2755. /**
  2756. * dp_soc_cfg_init() - initialize target specific configuration
  2757. * during dp_soc_init
  2758. * @soc: dp soc handle
  2759. */
  2760. static void dp_soc_cfg_init(struct dp_soc *soc)
  2761. {
  2762. uint32_t target_type;
  2763. target_type = hal_get_target_type(soc->hal_soc);
  2764. switch (target_type) {
  2765. case TARGET_TYPE_QCA6290:
  2766. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  2767. REO_DST_RING_SIZE_QCA6290);
  2768. soc->ast_override_support = 1;
  2769. soc->da_war_enabled = false;
  2770. break;
  2771. case TARGET_TYPE_QCA6390:
  2772. case TARGET_TYPE_QCA6490:
  2773. case TARGET_TYPE_QCA6750:
  2774. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  2775. REO_DST_RING_SIZE_QCA6290);
  2776. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  2777. soc->ast_override_support = 1;
  2778. if (soc->cdp_soc.ol_ops->get_con_mode &&
  2779. soc->cdp_soc.ol_ops->get_con_mode() ==
  2780. QDF_GLOBAL_MONITOR_MODE) {
  2781. int int_ctx;
  2782. for (int_ctx = 0; int_ctx < WLAN_CFG_INT_NUM_CONTEXTS; int_ctx++) {
  2783. soc->wlan_cfg_ctx->int_rx_ring_mask[int_ctx] = 0;
  2784. soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[int_ctx] = 0;
  2785. }
  2786. }
  2787. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  2788. break;
  2789. case TARGET_TYPE_KIWI:
  2790. case TARGET_TYPE_MANGO:
  2791. case TARGET_TYPE_PEACH:
  2792. soc->ast_override_support = 1;
  2793. soc->per_tid_basize_max_tid = 8;
  2794. if (soc->cdp_soc.ol_ops->get_con_mode &&
  2795. soc->cdp_soc.ol_ops->get_con_mode() ==
  2796. QDF_GLOBAL_MONITOR_MODE) {
  2797. int int_ctx;
  2798. for (int_ctx = 0; int_ctx < WLAN_CFG_INT_NUM_CONTEXTS;
  2799. int_ctx++) {
  2800. soc->wlan_cfg_ctx->int_rx_ring_mask[int_ctx] = 0;
  2801. if (dp_is_monitor_mode_using_poll(soc))
  2802. soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[int_ctx] = 0;
  2803. }
  2804. }
  2805. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  2806. soc->wlan_cfg_ctx->num_rxdma_dst_rings_per_pdev = 1;
  2807. break;
  2808. case TARGET_TYPE_QCA8074:
  2809. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  2810. soc->da_war_enabled = true;
  2811. soc->is_rx_fse_full_cache_invalidate_war_enabled = true;
  2812. break;
  2813. case TARGET_TYPE_QCA8074V2:
  2814. case TARGET_TYPE_QCA6018:
  2815. case TARGET_TYPE_QCA9574:
  2816. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  2817. soc->ast_override_support = 1;
  2818. soc->per_tid_basize_max_tid = 8;
  2819. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS;
  2820. soc->da_war_enabled = false;
  2821. soc->is_rx_fse_full_cache_invalidate_war_enabled = true;
  2822. break;
  2823. case TARGET_TYPE_QCN9000:
  2824. soc->ast_override_support = 1;
  2825. soc->da_war_enabled = false;
  2826. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  2827. soc->per_tid_basize_max_tid = 8;
  2828. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS;
  2829. soc->lmac_polled_mode = 0;
  2830. soc->wbm_release_desc_rx_sg_support = 1;
  2831. soc->is_rx_fse_full_cache_invalidate_war_enabled = true;
  2832. break;
  2833. case TARGET_TYPE_QCA5018:
  2834. case TARGET_TYPE_QCN6122:
  2835. case TARGET_TYPE_QCN9160:
  2836. soc->ast_override_support = 1;
  2837. soc->da_war_enabled = false;
  2838. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  2839. soc->per_tid_basize_max_tid = 8;
  2840. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_MAPS_11AX;
  2841. soc->disable_mac1_intr = 1;
  2842. soc->disable_mac2_intr = 1;
  2843. soc->wbm_release_desc_rx_sg_support = 1;
  2844. break;
  2845. case TARGET_TYPE_QCN9224:
  2846. soc->umac_reset_supported = true;
  2847. soc->ast_override_support = 1;
  2848. soc->da_war_enabled = false;
  2849. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  2850. soc->per_tid_basize_max_tid = 8;
  2851. soc->wbm_release_desc_rx_sg_support = 1;
  2852. soc->rxdma2sw_rings_not_supported = 1;
  2853. soc->wbm_sg_last_msdu_war = 1;
  2854. soc->ast_offload_support = AST_OFFLOAD_ENABLE_STATUS;
  2855. soc->mec_fw_offload = FW_MEC_FW_OFFLOAD_ENABLED;
  2856. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS;
  2857. wlan_cfg_set_txmon_hw_support(soc->wlan_cfg_ctx, true);
  2858. soc->host_ast_db_enable = cfg_get(soc->ctrl_psoc,
  2859. CFG_DP_HOST_AST_DB_ENABLE);
  2860. soc->features.wds_ext_ast_override_enable = true;
  2861. break;
  2862. case TARGET_TYPE_QCA5332:
  2863. case TARGET_TYPE_QCN6432:
  2864. soc->umac_reset_supported = true;
  2865. soc->ast_override_support = 1;
  2866. soc->da_war_enabled = false;
  2867. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  2868. soc->per_tid_basize_max_tid = 8;
  2869. soc->wbm_release_desc_rx_sg_support = 1;
  2870. soc->rxdma2sw_rings_not_supported = 1;
  2871. soc->wbm_sg_last_msdu_war = 1;
  2872. soc->ast_offload_support = AST_OFFLOAD_ENABLE_STATUS;
  2873. soc->mec_fw_offload = FW_MEC_FW_OFFLOAD_ENABLED;
  2874. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS_5332;
  2875. wlan_cfg_set_txmon_hw_support(soc->wlan_cfg_ctx, true);
  2876. soc->host_ast_db_enable = cfg_get(soc->ctrl_psoc,
  2877. CFG_DP_HOST_AST_DB_ENABLE);
  2878. soc->features.wds_ext_ast_override_enable = true;
  2879. break;
  2880. default:
  2881. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  2882. qdf_assert_always(0);
  2883. break;
  2884. }
  2885. dp_soc_cfg_dump(soc, target_type);
  2886. }
  2887. /**
  2888. * dp_soc_get_ap_mld_mode() - store ap mld mode from ini
  2889. * @soc: Opaque DP SOC handle
  2890. *
  2891. * Return: none
  2892. */
  2893. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  2894. static inline void dp_soc_get_ap_mld_mode(struct dp_soc *soc)
  2895. {
  2896. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  2897. soc->mld_mode_ap =
  2898. soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  2899. CDP_CFG_MLD_NETDEV_MODE_AP);
  2900. }
  2901. dp_info("DP mld_mode_ap-%u\n", soc->mld_mode_ap);
  2902. }
  2903. #else
  2904. static inline void dp_soc_get_ap_mld_mode(struct dp_soc *soc)
  2905. {
  2906. (void)soc;
  2907. }
  2908. #endif
  2909. #ifdef QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT
  2910. /**
  2911. * dp_soc_hw_txrx_stats_init() - Initialize hw_txrx_stats_en in dp_soc
  2912. * @soc: Datapath soc handle
  2913. *
  2914. * Return: none
  2915. */
  2916. static inline
  2917. void dp_soc_hw_txrx_stats_init(struct dp_soc *soc)
  2918. {
  2919. soc->hw_txrx_stats_en =
  2920. wlan_cfg_get_vdev_stats_hw_offload_config(soc->wlan_cfg_ctx);
  2921. }
  2922. #else
  2923. static inline
  2924. void dp_soc_hw_txrx_stats_init(struct dp_soc *soc)
  2925. {
  2926. soc->hw_txrx_stats_en = 0;
  2927. }
  2928. #endif
  2929. /**
  2930. * dp_soc_init() - Initialize txrx SOC
  2931. * @soc: Opaque DP SOC handle
  2932. * @htc_handle: Opaque HTC handle
  2933. * @hif_handle: Opaque HIF handle
  2934. *
  2935. * Return: DP SOC handle on success, NULL on failure
  2936. */
  2937. void *dp_soc_init(struct dp_soc *soc, HTC_HANDLE htc_handle,
  2938. struct hif_opaque_softc *hif_handle)
  2939. {
  2940. struct htt_soc *htt_soc = (struct htt_soc *)soc->htt_handle;
  2941. bool is_monitor_mode = false;
  2942. uint8_t i;
  2943. int num_dp_msi;
  2944. bool ppeds_attached = false;
  2945. htt_soc = htt_soc_attach(soc, htc_handle);
  2946. if (!htt_soc)
  2947. goto fail1;
  2948. soc->htt_handle = htt_soc;
  2949. if (htt_soc_htc_prealloc(htt_soc) != QDF_STATUS_SUCCESS)
  2950. goto fail2;
  2951. htt_set_htc_handle(htt_soc, htc_handle);
  2952. dp_soc_cfg_init(soc);
  2953. dp_monitor_soc_cfg_init(soc);
  2954. /* Reset/Initialize wbm sg list and flags */
  2955. dp_rx_wbm_sg_list_reset(soc);
  2956. /* Note: Any SRNG ring initialization should happen only after
  2957. * Interrupt mode is set and followed by filling up the
  2958. * interrupt mask. IT SHOULD ALWAYS BE IN THIS ORDER.
  2959. */
  2960. dp_soc_set_interrupt_mode(soc);
  2961. if (soc->cdp_soc.ol_ops->get_con_mode &&
  2962. soc->cdp_soc.ol_ops->get_con_mode() ==
  2963. QDF_GLOBAL_MONITOR_MODE) {
  2964. is_monitor_mode = true;
  2965. soc->curr_rx_pkt_tlv_size = soc->rx_mon_pkt_tlv_size;
  2966. } else {
  2967. soc->curr_rx_pkt_tlv_size = soc->rx_pkt_tlv_size;
  2968. }
  2969. num_dp_msi = dp_get_num_msi_available(soc, soc->intr_mode);
  2970. if (num_dp_msi < 0) {
  2971. dp_init_err("%pK: dp_interrupt assignment failed", soc);
  2972. goto fail3;
  2973. }
  2974. if (soc->arch_ops.ppeds_handle_attached)
  2975. ppeds_attached = soc->arch_ops.ppeds_handle_attached(soc);
  2976. wlan_cfg_fill_interrupt_mask(soc->wlan_cfg_ctx, num_dp_msi,
  2977. soc->intr_mode, is_monitor_mode,
  2978. ppeds_attached,
  2979. soc->umac_reset_supported);
  2980. /* initialize WBM_IDLE_LINK ring */
  2981. if (dp_hw_link_desc_ring_init(soc)) {
  2982. dp_init_err("%pK: dp_hw_link_desc_ring_init failed", soc);
  2983. goto fail3;
  2984. }
  2985. dp_link_desc_ring_replenish(soc, WLAN_INVALID_PDEV_ID);
  2986. if (dp_soc_srng_init(soc)) {
  2987. dp_init_err("%pK: dp_soc_srng_init failed", soc);
  2988. goto fail4;
  2989. }
  2990. if (htt_soc_initialize(soc->htt_handle, soc->ctrl_psoc,
  2991. htt_get_htc_handle(htt_soc),
  2992. soc->hal_soc, soc->osdev) == NULL)
  2993. goto fail5;
  2994. /* Initialize descriptors in TCL Rings */
  2995. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2996. hal_tx_init_data_ring(soc->hal_soc,
  2997. soc->tcl_data_ring[i].hal_srng);
  2998. }
  2999. if (dp_soc_tx_desc_sw_pools_init(soc)) {
  3000. dp_init_err("%pK: dp_tx_soc_attach failed", soc);
  3001. goto fail6;
  3002. }
  3003. if (soc->arch_ops.txrx_soc_ppeds_start) {
  3004. if (soc->arch_ops.txrx_soc_ppeds_start(soc)) {
  3005. dp_init_err("%pK: ppeds start failed", soc);
  3006. goto fail7;
  3007. }
  3008. }
  3009. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx,
  3010. cfg_get(soc->ctrl_psoc, CFG_DP_RX_HASH));
  3011. #ifdef WLAN_SUPPORT_RX_FLOW_TAG
  3012. wlan_cfg_set_rx_rr(soc->wlan_cfg_ctx,
  3013. cfg_get(soc->ctrl_psoc, CFG_DP_RX_RR));
  3014. #endif
  3015. soc->cce_disable = false;
  3016. soc->max_ast_ageout_count = MAX_AST_AGEOUT_COUNT;
  3017. soc->sta_mode_search_policy = DP_TX_ADDR_SEARCH_ADDR_POLICY;
  3018. qdf_mem_zero(&soc->vdev_id_map, sizeof(soc->vdev_id_map));
  3019. qdf_spinlock_create(&soc->vdev_map_lock);
  3020. qdf_atomic_init(&soc->num_tx_outstanding);
  3021. qdf_atomic_init(&soc->num_tx_exception);
  3022. soc->num_tx_allowed =
  3023. wlan_cfg_get_dp_soc_tx_device_limit(soc->wlan_cfg_ctx);
  3024. soc->num_tx_spl_allowed =
  3025. wlan_cfg_get_dp_soc_tx_spl_device_limit(soc->wlan_cfg_ctx);
  3026. soc->num_reg_tx_allowed = soc->num_tx_allowed - soc->num_tx_spl_allowed;
  3027. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  3028. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  3029. CDP_CFG_MAX_PEER_ID);
  3030. if (ret != -EINVAL)
  3031. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  3032. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  3033. CDP_CFG_CCE_DISABLE);
  3034. if (ret == 1)
  3035. soc->cce_disable = true;
  3036. }
  3037. /*
  3038. * Skip registering hw ring interrupts for WMAC2 on IPQ6018
  3039. * and IPQ5018 WMAC2 is not there in these platforms.
  3040. */
  3041. if (hal_get_target_type(soc->hal_soc) == TARGET_TYPE_QCA6018 ||
  3042. soc->disable_mac2_intr)
  3043. dp_soc_disable_unused_mac_intr_mask(soc, 0x2);
  3044. /*
  3045. * Skip registering hw ring interrupts for WMAC1 on IPQ5018
  3046. * WMAC1 is not there in this platform.
  3047. */
  3048. if (soc->disable_mac1_intr)
  3049. dp_soc_disable_unused_mac_intr_mask(soc, 0x1);
  3050. /* setup the global rx defrag waitlist */
  3051. TAILQ_INIT(&soc->rx.defrag.waitlist);
  3052. soc->rx.defrag.timeout_ms =
  3053. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  3054. soc->rx.defrag.next_flush_ms = 0;
  3055. soc->rx.flags.defrag_timeout_check =
  3056. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  3057. qdf_spinlock_create(&soc->rx.defrag.defrag_lock);
  3058. dp_monitor_soc_init(soc);
  3059. qdf_atomic_set(&soc->cmn_init_done, 1);
  3060. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  3061. qdf_spinlock_create(&soc->ast_lock);
  3062. dp_peer_mec_spinlock_create(soc);
  3063. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  3064. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  3065. INIT_RX_HW_STATS_LOCK(soc);
  3066. qdf_nbuf_queue_init(&soc->invalid_buf_queue);
  3067. /* fill the tx/rx cpu ring map*/
  3068. dp_soc_set_txrx_ring_map(soc);
  3069. TAILQ_INIT(&soc->inactive_peer_list);
  3070. qdf_spinlock_create(&soc->inactive_peer_list_lock);
  3071. TAILQ_INIT(&soc->inactive_vdev_list);
  3072. qdf_spinlock_create(&soc->inactive_vdev_list_lock);
  3073. qdf_spinlock_create(&soc->htt_stats.lock);
  3074. /* initialize work queue for stats processing */
  3075. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  3076. dp_reo_desc_deferred_freelist_create(soc);
  3077. dp_info("Mem stats: DMA = %u HEAP = %u SKB = %u",
  3078. qdf_dma_mem_stats_read(),
  3079. qdf_heap_mem_stats_read(),
  3080. qdf_skb_total_mem_stats_read());
  3081. soc->vdev_stats_id_map = 0;
  3082. dp_soc_hw_txrx_stats_init(soc);
  3083. dp_soc_get_ap_mld_mode(soc);
  3084. return soc;
  3085. fail7:
  3086. dp_soc_tx_desc_sw_pools_deinit(soc);
  3087. fail6:
  3088. htt_soc_htc_dealloc(soc->htt_handle);
  3089. fail5:
  3090. dp_soc_srng_deinit(soc);
  3091. fail4:
  3092. dp_hw_link_desc_ring_deinit(soc);
  3093. fail3:
  3094. htt_htc_pkt_pool_free(htt_soc);
  3095. fail2:
  3096. htt_soc_detach(htt_soc);
  3097. fail1:
  3098. return NULL;
  3099. }
  3100. #ifndef WLAN_DP_DISABLE_TCL_CMD_CRED_SRNG
  3101. static inline QDF_STATUS dp_soc_tcl_cmd_cred_srng_init(struct dp_soc *soc)
  3102. {
  3103. QDF_STATUS status;
  3104. if (soc->init_tcl_cmd_cred_ring) {
  3105. status = dp_srng_init(soc, &soc->tcl_cmd_credit_ring,
  3106. TCL_CMD_CREDIT, 0, 0);
  3107. if (QDF_IS_STATUS_ERROR(status))
  3108. return status;
  3109. wlan_minidump_log(soc->tcl_cmd_credit_ring.base_vaddr_unaligned,
  3110. soc->tcl_cmd_credit_ring.alloc_size,
  3111. soc->ctrl_psoc,
  3112. WLAN_MD_DP_SRNG_TCL_CMD,
  3113. "wbm_desc_rel_ring");
  3114. }
  3115. return QDF_STATUS_SUCCESS;
  3116. }
  3117. static inline void dp_soc_tcl_cmd_cred_srng_deinit(struct dp_soc *soc)
  3118. {
  3119. if (soc->init_tcl_cmd_cred_ring) {
  3120. wlan_minidump_remove(soc->tcl_cmd_credit_ring.base_vaddr_unaligned,
  3121. soc->tcl_cmd_credit_ring.alloc_size,
  3122. soc->ctrl_psoc, WLAN_MD_DP_SRNG_TCL_CMD,
  3123. "wbm_desc_rel_ring");
  3124. dp_srng_deinit(soc, &soc->tcl_cmd_credit_ring,
  3125. TCL_CMD_CREDIT, 0);
  3126. }
  3127. }
  3128. static inline QDF_STATUS dp_soc_tcl_cmd_cred_srng_alloc(struct dp_soc *soc)
  3129. {
  3130. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx = soc->wlan_cfg_ctx;
  3131. uint32_t entries;
  3132. QDF_STATUS status;
  3133. entries = wlan_cfg_get_dp_soc_tcl_cmd_credit_ring_size(soc_cfg_ctx);
  3134. if (soc->init_tcl_cmd_cred_ring) {
  3135. status = dp_srng_alloc(soc, &soc->tcl_cmd_credit_ring,
  3136. TCL_CMD_CREDIT, entries, 0);
  3137. if (QDF_IS_STATUS_ERROR(status))
  3138. return status;
  3139. }
  3140. return QDF_STATUS_SUCCESS;
  3141. }
  3142. static inline void dp_soc_tcl_cmd_cred_srng_free(struct dp_soc *soc)
  3143. {
  3144. if (soc->init_tcl_cmd_cred_ring)
  3145. dp_srng_free(soc, &soc->tcl_cmd_credit_ring);
  3146. }
  3147. inline void dp_tx_init_cmd_credit_ring(struct dp_soc *soc)
  3148. {
  3149. if (soc->init_tcl_cmd_cred_ring)
  3150. hal_tx_init_cmd_credit_ring(soc->hal_soc,
  3151. soc->tcl_cmd_credit_ring.hal_srng);
  3152. }
  3153. #else
  3154. static inline QDF_STATUS dp_soc_tcl_cmd_cred_srng_init(struct dp_soc *soc)
  3155. {
  3156. return QDF_STATUS_SUCCESS;
  3157. }
  3158. static inline void dp_soc_tcl_cmd_cred_srng_deinit(struct dp_soc *soc)
  3159. {
  3160. }
  3161. static inline QDF_STATUS dp_soc_tcl_cmd_cred_srng_alloc(struct dp_soc *soc)
  3162. {
  3163. return QDF_STATUS_SUCCESS;
  3164. }
  3165. static inline void dp_soc_tcl_cmd_cred_srng_free(struct dp_soc *soc)
  3166. {
  3167. }
  3168. inline void dp_tx_init_cmd_credit_ring(struct dp_soc *soc)
  3169. {
  3170. }
  3171. #endif
  3172. #ifndef WLAN_DP_DISABLE_TCL_STATUS_SRNG
  3173. static inline QDF_STATUS dp_soc_tcl_status_srng_init(struct dp_soc *soc)
  3174. {
  3175. QDF_STATUS status;
  3176. status = dp_srng_init(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0);
  3177. if (QDF_IS_STATUS_ERROR(status))
  3178. return status;
  3179. wlan_minidump_log(soc->tcl_status_ring.base_vaddr_unaligned,
  3180. soc->tcl_status_ring.alloc_size,
  3181. soc->ctrl_psoc,
  3182. WLAN_MD_DP_SRNG_TCL_STATUS,
  3183. "wbm_desc_rel_ring");
  3184. return QDF_STATUS_SUCCESS;
  3185. }
  3186. static inline void dp_soc_tcl_status_srng_deinit(struct dp_soc *soc)
  3187. {
  3188. wlan_minidump_remove(soc->tcl_status_ring.base_vaddr_unaligned,
  3189. soc->tcl_status_ring.alloc_size,
  3190. soc->ctrl_psoc, WLAN_MD_DP_SRNG_TCL_STATUS,
  3191. "wbm_desc_rel_ring");
  3192. dp_srng_deinit(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  3193. }
  3194. static inline QDF_STATUS dp_soc_tcl_status_srng_alloc(struct dp_soc *soc)
  3195. {
  3196. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx = soc->wlan_cfg_ctx;
  3197. uint32_t entries;
  3198. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3199. entries = wlan_cfg_get_dp_soc_tcl_status_ring_size(soc_cfg_ctx);
  3200. status = dp_srng_alloc(soc, &soc->tcl_status_ring,
  3201. TCL_STATUS, entries, 0);
  3202. return status;
  3203. }
  3204. static inline void dp_soc_tcl_status_srng_free(struct dp_soc *soc)
  3205. {
  3206. dp_srng_free(soc, &soc->tcl_status_ring);
  3207. }
  3208. #else
  3209. static inline QDF_STATUS dp_soc_tcl_status_srng_init(struct dp_soc *soc)
  3210. {
  3211. return QDF_STATUS_SUCCESS;
  3212. }
  3213. static inline void dp_soc_tcl_status_srng_deinit(struct dp_soc *soc)
  3214. {
  3215. }
  3216. static inline QDF_STATUS dp_soc_tcl_status_srng_alloc(struct dp_soc *soc)
  3217. {
  3218. return QDF_STATUS_SUCCESS;
  3219. }
  3220. static inline void dp_soc_tcl_status_srng_free(struct dp_soc *soc)
  3221. {
  3222. }
  3223. #endif
  3224. /**
  3225. * dp_soc_srng_deinit() - de-initialize soc srng rings
  3226. * @soc: Datapath soc handle
  3227. *
  3228. */
  3229. void dp_soc_srng_deinit(struct dp_soc *soc)
  3230. {
  3231. uint32_t i;
  3232. if (soc->arch_ops.txrx_soc_srng_deinit)
  3233. soc->arch_ops.txrx_soc_srng_deinit(soc);
  3234. /* Free the ring memories */
  3235. /* Common rings */
  3236. wlan_minidump_remove(soc->wbm_desc_rel_ring.base_vaddr_unaligned,
  3237. soc->wbm_desc_rel_ring.alloc_size,
  3238. soc->ctrl_psoc, WLAN_MD_DP_SRNG_WBM_DESC_REL,
  3239. "wbm_desc_rel_ring");
  3240. dp_srng_deinit(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  3241. /* Tx data rings */
  3242. for (i = 0; i < soc->num_tcl_data_rings; i++)
  3243. dp_deinit_tx_pair_by_index(soc, i);
  3244. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  3245. dp_deinit_tx_pair_by_index(soc, IPA_TCL_DATA_RING_IDX);
  3246. dp_ipa_deinit_alt_tx_ring(soc);
  3247. }
  3248. /* TCL command and status rings */
  3249. dp_soc_tcl_cmd_cred_srng_deinit(soc);
  3250. dp_soc_tcl_status_srng_deinit(soc);
  3251. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3252. /* TODO: Get number of rings and ring sizes
  3253. * from wlan_cfg
  3254. */
  3255. wlan_minidump_remove(soc->reo_dest_ring[i].base_vaddr_unaligned,
  3256. soc->reo_dest_ring[i].alloc_size,
  3257. soc->ctrl_psoc, WLAN_MD_DP_SRNG_REO_DEST,
  3258. "reo_dest_ring");
  3259. dp_srng_deinit(soc, &soc->reo_dest_ring[i], REO_DST, i);
  3260. }
  3261. /* REO reinjection ring */
  3262. wlan_minidump_remove(soc->reo_reinject_ring.base_vaddr_unaligned,
  3263. soc->reo_reinject_ring.alloc_size,
  3264. soc->ctrl_psoc, WLAN_MD_DP_SRNG_REO_REINJECT,
  3265. "reo_reinject_ring");
  3266. dp_srng_deinit(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  3267. /* Rx release ring */
  3268. wlan_minidump_remove(soc->rx_rel_ring.base_vaddr_unaligned,
  3269. soc->rx_rel_ring.alloc_size,
  3270. soc->ctrl_psoc, WLAN_MD_DP_SRNG_RX_REL,
  3271. "reo_release_ring");
  3272. dp_srng_deinit(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  3273. /* Rx exception ring */
  3274. /* TODO: Better to store ring_type and ring_num in
  3275. * dp_srng during setup
  3276. */
  3277. wlan_minidump_remove(soc->reo_exception_ring.base_vaddr_unaligned,
  3278. soc->reo_exception_ring.alloc_size,
  3279. soc->ctrl_psoc, WLAN_MD_DP_SRNG_REO_EXCEPTION,
  3280. "reo_exception_ring");
  3281. dp_srng_deinit(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  3282. /* REO command and status rings */
  3283. wlan_minidump_remove(soc->reo_cmd_ring.base_vaddr_unaligned,
  3284. soc->reo_cmd_ring.alloc_size,
  3285. soc->ctrl_psoc, WLAN_MD_DP_SRNG_REO_CMD,
  3286. "reo_cmd_ring");
  3287. dp_srng_deinit(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  3288. wlan_minidump_remove(soc->reo_status_ring.base_vaddr_unaligned,
  3289. soc->reo_status_ring.alloc_size,
  3290. soc->ctrl_psoc, WLAN_MD_DP_SRNG_REO_STATUS,
  3291. "reo_status_ring");
  3292. dp_srng_deinit(soc, &soc->reo_status_ring, REO_STATUS, 0);
  3293. }
  3294. /**
  3295. * dp_soc_srng_init() - Initialize soc level srng rings
  3296. * @soc: Datapath soc handle
  3297. *
  3298. * Return: QDF_STATUS_SUCCESS on success
  3299. * QDF_STATUS_E_FAILURE on failure
  3300. */
  3301. QDF_STATUS dp_soc_srng_init(struct dp_soc *soc)
  3302. {
  3303. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  3304. uint8_t i;
  3305. uint8_t wbm2_sw_rx_rel_ring_id;
  3306. soc_cfg_ctx = soc->wlan_cfg_ctx;
  3307. dp_enable_verbose_debug(soc);
  3308. /* WBM descriptor release ring */
  3309. if (dp_srng_init(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0)) {
  3310. dp_init_err("%pK: dp_srng_init failed for wbm_desc_rel_ring", soc);
  3311. goto fail1;
  3312. }
  3313. wlan_minidump_log(soc->wbm_desc_rel_ring.base_vaddr_unaligned,
  3314. soc->wbm_desc_rel_ring.alloc_size,
  3315. soc->ctrl_psoc,
  3316. WLAN_MD_DP_SRNG_WBM_DESC_REL,
  3317. "wbm_desc_rel_ring");
  3318. /* TCL command and status rings */
  3319. if (dp_soc_tcl_cmd_cred_srng_init(soc)) {
  3320. dp_init_err("%pK: dp_srng_init failed for tcl_cmd_ring", soc);
  3321. goto fail1;
  3322. }
  3323. if (dp_soc_tcl_status_srng_init(soc)) {
  3324. dp_init_err("%pK: dp_srng_init failed for tcl_status_ring", soc);
  3325. goto fail1;
  3326. }
  3327. /* REO reinjection ring */
  3328. if (dp_srng_init(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0)) {
  3329. dp_init_err("%pK: dp_srng_init failed for reo_reinject_ring", soc);
  3330. goto fail1;
  3331. }
  3332. wlan_minidump_log(soc->reo_reinject_ring.base_vaddr_unaligned,
  3333. soc->reo_reinject_ring.alloc_size,
  3334. soc->ctrl_psoc,
  3335. WLAN_MD_DP_SRNG_REO_REINJECT,
  3336. "reo_reinject_ring");
  3337. wbm2_sw_rx_rel_ring_id = wlan_cfg_get_rx_rel_ring_id(soc_cfg_ctx);
  3338. /* Rx release ring */
  3339. if (dp_srng_init(soc, &soc->rx_rel_ring, WBM2SW_RELEASE,
  3340. wbm2_sw_rx_rel_ring_id, 0)) {
  3341. dp_init_err("%pK: dp_srng_init failed for rx_rel_ring", soc);
  3342. goto fail1;
  3343. }
  3344. wlan_minidump_log(soc->rx_rel_ring.base_vaddr_unaligned,
  3345. soc->rx_rel_ring.alloc_size,
  3346. soc->ctrl_psoc,
  3347. WLAN_MD_DP_SRNG_RX_REL,
  3348. "reo_release_ring");
  3349. /* Rx exception ring */
  3350. if (dp_srng_init(soc, &soc->reo_exception_ring,
  3351. REO_EXCEPTION, 0, MAX_REO_DEST_RINGS)) {
  3352. dp_init_err("%pK: dp_srng_init failed - reo_exception", soc);
  3353. goto fail1;
  3354. }
  3355. wlan_minidump_log(soc->reo_exception_ring.base_vaddr_unaligned,
  3356. soc->reo_exception_ring.alloc_size,
  3357. soc->ctrl_psoc,
  3358. WLAN_MD_DP_SRNG_REO_EXCEPTION,
  3359. "reo_exception_ring");
  3360. /* REO command and status rings */
  3361. if (dp_srng_init(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0)) {
  3362. dp_init_err("%pK: dp_srng_init failed for reo_cmd_ring", soc);
  3363. goto fail1;
  3364. }
  3365. wlan_minidump_log(soc->reo_cmd_ring.base_vaddr_unaligned,
  3366. soc->reo_cmd_ring.alloc_size,
  3367. soc->ctrl_psoc,
  3368. WLAN_MD_DP_SRNG_REO_CMD,
  3369. "reo_cmd_ring");
  3370. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  3371. TAILQ_INIT(&soc->rx.reo_cmd_list);
  3372. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  3373. if (dp_srng_init(soc, &soc->reo_status_ring, REO_STATUS, 0, 0)) {
  3374. dp_init_err("%pK: dp_srng_init failed for reo_status_ring", soc);
  3375. goto fail1;
  3376. }
  3377. wlan_minidump_log(soc->reo_status_ring.base_vaddr_unaligned,
  3378. soc->reo_status_ring.alloc_size,
  3379. soc->ctrl_psoc,
  3380. WLAN_MD_DP_SRNG_REO_STATUS,
  3381. "reo_status_ring");
  3382. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3383. if (dp_init_tx_ring_pair_by_index(soc, i))
  3384. goto fail1;
  3385. }
  3386. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  3387. if (dp_init_tx_ring_pair_by_index(soc, IPA_TCL_DATA_RING_IDX))
  3388. goto fail1;
  3389. if (dp_ipa_init_alt_tx_ring(soc))
  3390. goto fail1;
  3391. }
  3392. dp_create_ext_stats_event(soc);
  3393. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3394. /* Initialize REO destination ring */
  3395. if (dp_srng_init(soc, &soc->reo_dest_ring[i], REO_DST, i, 0)) {
  3396. dp_init_err("%pK: dp_srng_init failed for reo_dest_ringn", soc);
  3397. goto fail1;
  3398. }
  3399. wlan_minidump_log(soc->reo_dest_ring[i].base_vaddr_unaligned,
  3400. soc->reo_dest_ring[i].alloc_size,
  3401. soc->ctrl_psoc,
  3402. WLAN_MD_DP_SRNG_REO_DEST,
  3403. "reo_dest_ring");
  3404. }
  3405. if (soc->arch_ops.txrx_soc_srng_init) {
  3406. if (soc->arch_ops.txrx_soc_srng_init(soc)) {
  3407. dp_init_err("%pK: dp_srng_init failed for arch rings",
  3408. soc);
  3409. goto fail1;
  3410. }
  3411. }
  3412. return QDF_STATUS_SUCCESS;
  3413. fail1:
  3414. /*
  3415. * Cleanup will be done as part of soc_detach, which will
  3416. * be called on pdev attach failure
  3417. */
  3418. dp_soc_srng_deinit(soc);
  3419. return QDF_STATUS_E_FAILURE;
  3420. }
  3421. /**
  3422. * dp_soc_srng_free() - free soc level srng rings
  3423. * @soc: Datapath soc handle
  3424. *
  3425. */
  3426. void dp_soc_srng_free(struct dp_soc *soc)
  3427. {
  3428. uint32_t i;
  3429. if (soc->arch_ops.txrx_soc_srng_free)
  3430. soc->arch_ops.txrx_soc_srng_free(soc);
  3431. dp_srng_free(soc, &soc->wbm_desc_rel_ring);
  3432. for (i = 0; i < soc->num_tcl_data_rings; i++)
  3433. dp_free_tx_ring_pair_by_index(soc, i);
  3434. /* Free IPA rings for TCL_TX and TCL_COMPL ring */
  3435. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  3436. dp_free_tx_ring_pair_by_index(soc, IPA_TCL_DATA_RING_IDX);
  3437. dp_ipa_free_alt_tx_ring(soc);
  3438. }
  3439. dp_soc_tcl_cmd_cred_srng_free(soc);
  3440. dp_soc_tcl_status_srng_free(soc);
  3441. for (i = 0; i < soc->num_reo_dest_rings; i++)
  3442. dp_srng_free(soc, &soc->reo_dest_ring[i]);
  3443. dp_srng_free(soc, &soc->reo_reinject_ring);
  3444. dp_srng_free(soc, &soc->rx_rel_ring);
  3445. dp_srng_free(soc, &soc->reo_exception_ring);
  3446. dp_srng_free(soc, &soc->reo_cmd_ring);
  3447. dp_srng_free(soc, &soc->reo_status_ring);
  3448. }
  3449. /**
  3450. * dp_soc_srng_alloc() - Allocate memory for soc level srng rings
  3451. * @soc: Datapath soc handle
  3452. *
  3453. * Return: QDF_STATUS_SUCCESS on success
  3454. * QDF_STATUS_E_NOMEM on failure
  3455. */
  3456. QDF_STATUS dp_soc_srng_alloc(struct dp_soc *soc)
  3457. {
  3458. uint32_t entries;
  3459. uint32_t i;
  3460. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  3461. uint32_t cached = WLAN_CFG_DST_RING_CACHED_DESC;
  3462. uint32_t reo_dst_ring_size;
  3463. soc_cfg_ctx = soc->wlan_cfg_ctx;
  3464. /* sw2wbm link descriptor release ring */
  3465. entries = wlan_cfg_get_dp_soc_wbm_release_ring_size(soc_cfg_ctx);
  3466. if (dp_srng_alloc(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE,
  3467. entries, 0)) {
  3468. dp_init_err("%pK: dp_srng_alloc failed for wbm_desc_rel_ring", soc);
  3469. goto fail1;
  3470. }
  3471. /* TCL command and status rings */
  3472. if (dp_soc_tcl_cmd_cred_srng_alloc(soc)) {
  3473. dp_init_err("%pK: dp_srng_alloc failed for tcl_cmd_ring", soc);
  3474. goto fail1;
  3475. }
  3476. if (dp_soc_tcl_status_srng_alloc(soc)) {
  3477. dp_init_err("%pK: dp_srng_alloc failed for tcl_status_ring", soc);
  3478. goto fail1;
  3479. }
  3480. /* REO reinjection ring */
  3481. entries = wlan_cfg_get_dp_soc_reo_reinject_ring_size(soc_cfg_ctx);
  3482. if (dp_srng_alloc(soc, &soc->reo_reinject_ring, REO_REINJECT,
  3483. entries, 0)) {
  3484. dp_init_err("%pK: dp_srng_alloc failed for reo_reinject_ring", soc);
  3485. goto fail1;
  3486. }
  3487. /* Rx release ring */
  3488. entries = wlan_cfg_get_dp_soc_rx_release_ring_size(soc_cfg_ctx);
  3489. if (dp_srng_alloc(soc, &soc->rx_rel_ring, WBM2SW_RELEASE,
  3490. entries, 0)) {
  3491. dp_init_err("%pK: dp_srng_alloc failed for rx_rel_ring", soc);
  3492. goto fail1;
  3493. }
  3494. /* Rx exception ring */
  3495. entries = wlan_cfg_get_dp_soc_reo_exception_ring_size(soc_cfg_ctx);
  3496. if (dp_srng_alloc(soc, &soc->reo_exception_ring, REO_EXCEPTION,
  3497. entries, 0)) {
  3498. dp_init_err("%pK: dp_srng_alloc failed - reo_exception", soc);
  3499. goto fail1;
  3500. }
  3501. /* REO command and status rings */
  3502. entries = wlan_cfg_get_dp_soc_reo_cmd_ring_size(soc_cfg_ctx);
  3503. if (dp_srng_alloc(soc, &soc->reo_cmd_ring, REO_CMD, entries, 0)) {
  3504. dp_init_err("%pK: dp_srng_alloc failed for reo_cmd_ring", soc);
  3505. goto fail1;
  3506. }
  3507. entries = wlan_cfg_get_dp_soc_reo_status_ring_size(soc_cfg_ctx);
  3508. if (dp_srng_alloc(soc, &soc->reo_status_ring, REO_STATUS,
  3509. entries, 0)) {
  3510. dp_init_err("%pK: dp_srng_alloc failed for reo_status_ring", soc);
  3511. goto fail1;
  3512. }
  3513. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc_cfg_ctx);
  3514. /* Disable cached desc if NSS offload is enabled */
  3515. if (wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx))
  3516. cached = 0;
  3517. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3518. if (dp_alloc_tx_ring_pair_by_index(soc, i))
  3519. goto fail1;
  3520. }
  3521. /* IPA rings for TCL_TX and TX_COMP will be allocated here */
  3522. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  3523. if (dp_alloc_tx_ring_pair_by_index(soc, IPA_TCL_DATA_RING_IDX))
  3524. goto fail1;
  3525. if (dp_ipa_alloc_alt_tx_ring(soc))
  3526. goto fail1;
  3527. }
  3528. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3529. /* Setup REO destination ring */
  3530. if (dp_srng_alloc(soc, &soc->reo_dest_ring[i], REO_DST,
  3531. reo_dst_ring_size, cached)) {
  3532. dp_init_err("%pK: dp_srng_alloc failed for reo_dest_ring", soc);
  3533. goto fail1;
  3534. }
  3535. }
  3536. if (soc->arch_ops.txrx_soc_srng_alloc) {
  3537. if (soc->arch_ops.txrx_soc_srng_alloc(soc)) {
  3538. dp_init_err("%pK: dp_srng_alloc failed for arch rings",
  3539. soc);
  3540. goto fail1;
  3541. }
  3542. }
  3543. return QDF_STATUS_SUCCESS;
  3544. fail1:
  3545. dp_soc_srng_free(soc);
  3546. return QDF_STATUS_E_NOMEM;
  3547. }
  3548. /**
  3549. * dp_soc_cfg_attach() - set target specific configuration in
  3550. * dp soc cfg.
  3551. * @soc: dp soc handle
  3552. */
  3553. void dp_soc_cfg_attach(struct dp_soc *soc)
  3554. {
  3555. int target_type;
  3556. int nss_cfg = 0;
  3557. target_type = hal_get_target_type(soc->hal_soc);
  3558. switch (target_type) {
  3559. case TARGET_TYPE_QCA6290:
  3560. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  3561. REO_DST_RING_SIZE_QCA6290);
  3562. break;
  3563. case TARGET_TYPE_QCA6390:
  3564. case TARGET_TYPE_QCA6490:
  3565. case TARGET_TYPE_QCA6750:
  3566. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  3567. REO_DST_RING_SIZE_QCA6290);
  3568. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  3569. break;
  3570. case TARGET_TYPE_KIWI:
  3571. case TARGET_TYPE_MANGO:
  3572. case TARGET_TYPE_PEACH:
  3573. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  3574. break;
  3575. case TARGET_TYPE_QCA8074:
  3576. wlan_cfg_set_tso_desc_attach_defer(soc->wlan_cfg_ctx, 1);
  3577. break;
  3578. case TARGET_TYPE_QCA8074V2:
  3579. case TARGET_TYPE_QCA6018:
  3580. case TARGET_TYPE_QCA9574:
  3581. case TARGET_TYPE_QCN6122:
  3582. case TARGET_TYPE_QCA5018:
  3583. wlan_cfg_set_tso_desc_attach_defer(soc->wlan_cfg_ctx, 1);
  3584. wlan_cfg_set_rxdma1_enable(soc->wlan_cfg_ctx);
  3585. break;
  3586. case TARGET_TYPE_QCN9160:
  3587. wlan_cfg_set_tso_desc_attach_defer(soc->wlan_cfg_ctx, 1);
  3588. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  3589. break;
  3590. case TARGET_TYPE_QCN9000:
  3591. wlan_cfg_set_tso_desc_attach_defer(soc->wlan_cfg_ctx, 1);
  3592. wlan_cfg_set_rxdma1_enable(soc->wlan_cfg_ctx);
  3593. break;
  3594. case TARGET_TYPE_QCN9224:
  3595. case TARGET_TYPE_QCA5332:
  3596. case TARGET_TYPE_QCN6432:
  3597. wlan_cfg_set_tso_desc_attach_defer(soc->wlan_cfg_ctx, 1);
  3598. wlan_cfg_set_rxdma1_enable(soc->wlan_cfg_ctx);
  3599. break;
  3600. default:
  3601. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  3602. qdf_assert_always(0);
  3603. break;
  3604. }
  3605. if (soc->cdp_soc.ol_ops->get_soc_nss_cfg)
  3606. nss_cfg = soc->cdp_soc.ol_ops->get_soc_nss_cfg(soc->ctrl_psoc);
  3607. wlan_cfg_set_dp_soc_nss_cfg(soc->wlan_cfg_ctx, nss_cfg);
  3608. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  3609. wlan_cfg_set_num_tx_desc_pool(soc->wlan_cfg_ctx, 0);
  3610. wlan_cfg_set_num_tx_ext_desc_pool(soc->wlan_cfg_ctx, 0);
  3611. wlan_cfg_set_num_tx_desc(soc->wlan_cfg_ctx, 0);
  3612. wlan_cfg_set_num_tx_spl_desc(soc->wlan_cfg_ctx, 0);
  3613. wlan_cfg_set_num_tx_ext_desc(soc->wlan_cfg_ctx, 0);
  3614. soc->init_tcl_cmd_cred_ring = false;
  3615. soc->num_tcl_data_rings =
  3616. wlan_cfg_num_nss_tcl_data_rings(soc->wlan_cfg_ctx);
  3617. soc->num_reo_dest_rings =
  3618. wlan_cfg_num_nss_reo_dest_rings(soc->wlan_cfg_ctx);
  3619. } else {
  3620. soc->init_tcl_cmd_cred_ring = true;
  3621. soc->num_tx_comp_rings =
  3622. wlan_cfg_num_tx_comp_rings(soc->wlan_cfg_ctx);
  3623. soc->num_tcl_data_rings =
  3624. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  3625. soc->num_reo_dest_rings =
  3626. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  3627. }
  3628. }
  3629. void dp_pdev_set_default_reo(struct dp_pdev *pdev)
  3630. {
  3631. struct dp_soc *soc = pdev->soc;
  3632. switch (pdev->pdev_id) {
  3633. case 0:
  3634. pdev->reo_dest =
  3635. wlan_cfg_radio0_default_reo_get(soc->wlan_cfg_ctx);
  3636. break;
  3637. case 1:
  3638. pdev->reo_dest =
  3639. wlan_cfg_radio1_default_reo_get(soc->wlan_cfg_ctx);
  3640. break;
  3641. case 2:
  3642. pdev->reo_dest =
  3643. wlan_cfg_radio2_default_reo_get(soc->wlan_cfg_ctx);
  3644. break;
  3645. default:
  3646. dp_init_err("%pK: Invalid pdev_id %d for reo selection",
  3647. soc, pdev->pdev_id);
  3648. break;
  3649. }
  3650. }