wcd934x-dsp-cntl.c 38 KB

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  1. /*
  2. * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/slab.h>
  14. #include <linux/delay.h>
  15. #include <linux/component.h>
  16. #include <linux/debugfs.h>
  17. #include <sound/soc.h>
  18. #include <sound/wcd-dsp-mgr.h>
  19. #include <asoc/wcd934x_registers.h>
  20. #include "wcd934x.h"
  21. #include "wcd934x-dsp-cntl.h"
  22. #include "../wcd9xxx-irq.h"
  23. #include "../core.h"
  24. #define WCD_CNTL_DIR_NAME_LEN_MAX 32
  25. #define WCD_CPE_FLL_MAX_RETRIES 5
  26. #define WCD_MEM_ENABLE_MAX_RETRIES 20
  27. #define WCD_DSP_BOOT_TIMEOUT_MS 3000
  28. #define WCD_SYSFS_ENTRY_MAX_LEN 8
  29. #define WCD_PROCFS_ENTRY_MAX_LEN 16
  30. #define WCD_934X_RAMDUMP_START_ADDR 0x20100000
  31. #define WCD_934X_RAMDUMP_SIZE ((1024 * 1024) - 128)
  32. #define WCD_MISCDEV_CMD_MAX_LEN 11
  33. #define WCD_CNTL_MUTEX_LOCK(codec, lock) \
  34. { \
  35. dev_dbg(codec->dev, "%s: mutex_lock(%s)\n", \
  36. __func__, __stringify_1(lock)); \
  37. mutex_lock(&lock); \
  38. }
  39. #define WCD_CNTL_MUTEX_UNLOCK(codec, lock) \
  40. { \
  41. dev_dbg(codec->dev, "%s: mutex_unlock(%s)\n", \
  42. __func__, __stringify_1(lock)); \
  43. mutex_unlock(&lock); \
  44. }
  45. enum wcd_mem_type {
  46. WCD_MEM_TYPE_ALWAYS_ON,
  47. WCD_MEM_TYPE_SWITCHABLE,
  48. };
  49. struct wcd_cntl_attribute {
  50. struct attribute attr;
  51. ssize_t (*show)(struct wcd_dsp_cntl *cntl, char *buf);
  52. ssize_t (*store)(struct wcd_dsp_cntl *cntl, const char *buf,
  53. ssize_t count);
  54. };
  55. #define WCD_CNTL_ATTR(_name, _mode, _show, _store) \
  56. static struct wcd_cntl_attribute cntl_attr_##_name = { \
  57. .attr = {.name = __stringify(_name), .mode = _mode}, \
  58. .show = _show, \
  59. .store = _store, \
  60. }
  61. #define to_wcd_cntl_attr(a) \
  62. container_of((a), struct wcd_cntl_attribute, attr)
  63. #define to_wcd_cntl(kobj) \
  64. container_of((kobj), struct wcd_dsp_cntl, wcd_kobj)
  65. static u8 mem_enable_values[] = {
  66. 0xFE, 0xFC, 0xF8, 0xF0,
  67. 0xE0, 0xC0, 0x80, 0x00,
  68. };
  69. #ifdef CONFIG_DEBUG_FS
  70. #define WCD_CNTL_SET_ERR_IRQ_FLAG(cntl)\
  71. atomic_cmpxchg(&cntl->err_irq_flag, 0, 1)
  72. #define WCD_CNTL_CLR_ERR_IRQ_FLAG(cntl)\
  73. atomic_set(&cntl->err_irq_flag, 0)
  74. static u16 wdsp_reg_for_debug_dump[] = {
  75. WCD934X_CPE_SS_CPE_CTL,
  76. WCD934X_CPE_SS_PWR_SYS_PSTATE_CTL_0,
  77. WCD934X_CPE_SS_PWR_SYS_PSTATE_CTL_1,
  78. WCD934X_CPE_SS_PWR_CPEFLL_CTL,
  79. WCD934X_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_0,
  80. WCD934X_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_1,
  81. WCD934X_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_OVERRIDE,
  82. WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_0,
  83. WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_1,
  84. WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_2,
  85. WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_3,
  86. WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_4,
  87. WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_5,
  88. WCD934X_CPE_SS_PWR_CPE_DRAM1_SHUTDOWN,
  89. WCD934X_CPE_SS_SOC_SW_COLLAPSE_CTL,
  90. WCD934X_CPE_SS_MAD_CTL,
  91. WCD934X_CPE_SS_CPAR_CTL,
  92. WCD934X_CPE_SS_CPAR_CFG,
  93. WCD934X_CPE_SS_WDOG_CFG,
  94. WCD934X_CPE_SS_STATUS,
  95. WCD934X_CPE_SS_SS_ERROR_INT_MASK_0A,
  96. WCD934X_CPE_SS_SS_ERROR_INT_MASK_0B,
  97. WCD934X_CPE_SS_SS_ERROR_INT_MASK_1A,
  98. WCD934X_CPE_SS_SS_ERROR_INT_MASK_1B,
  99. WCD934X_CPE_SS_SS_ERROR_INT_STATUS_0A,
  100. WCD934X_CPE_SS_SS_ERROR_INT_STATUS_0B,
  101. WCD934X_CPE_SS_SS_ERROR_INT_STATUS_1A,
  102. WCD934X_CPE_SS_SS_ERROR_INT_STATUS_1B,
  103. };
  104. static void wcd_cntl_collect_debug_dumps(struct wcd_dsp_cntl *cntl,
  105. bool internal)
  106. {
  107. struct snd_soc_codec *codec = cntl->codec;
  108. struct wdsp_err_signal_arg arg;
  109. enum wdsp_signal signal;
  110. int i;
  111. u8 val;
  112. /* If WDSP SSR happens, skip collecting debug dumps */
  113. if (WCD_CNTL_SET_ERR_IRQ_FLAG(cntl) != 0)
  114. return;
  115. /* Mask all error interrupts */
  116. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_MASK_0A,
  117. 0xFF);
  118. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_MASK_0B,
  119. 0xFF);
  120. /* Collect important WDSP registers dump for debug use */
  121. pr_err("%s: Dump the WDSP registers for debug use\n", __func__);
  122. for (i = 0; i < sizeof(wdsp_reg_for_debug_dump)/sizeof(u16); i++) {
  123. val = snd_soc_read(codec, wdsp_reg_for_debug_dump[i]);
  124. pr_err("%s: reg = 0x%x, val = 0x%x\n", __func__,
  125. wdsp_reg_for_debug_dump[i], val);
  126. }
  127. /* Trigger NMI in WDSP to sync and update the memory */
  128. snd_soc_write(codec, WCD934X_CPE_SS_BACKUP_INT, 0x02);
  129. /* Collect WDSP ramdump for debug use */
  130. if (cntl->m_dev && cntl->m_ops && cntl->m_ops->signal_handler) {
  131. arg.mem_dumps_enabled = cntl->ramdump_enable;
  132. arg.remote_start_addr = WCD_934X_RAMDUMP_START_ADDR;
  133. arg.dump_size = WCD_934X_RAMDUMP_SIZE;
  134. signal = internal ? WDSP_DEBUG_DUMP_INTERNAL : WDSP_DEBUG_DUMP;
  135. cntl->m_ops->signal_handler(cntl->m_dev, signal, &arg);
  136. }
  137. /* Unmask the fatal irqs */
  138. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_MASK_0A,
  139. ~(cntl->irqs.fatal_irqs & 0xFF));
  140. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_MASK_0B,
  141. ~((cntl->irqs.fatal_irqs >> 8) & 0xFF));
  142. WCD_CNTL_CLR_ERR_IRQ_FLAG(cntl);
  143. }
  144. #else
  145. #define WCD_CNTL_SET_ERR_IRQ_FLAG(cntl) 0
  146. #define WCD_CNTL_CLR_ERR_IRQ_FLAG(cntl) do {} while (0)
  147. static void wcd_cntl_collect_debug_dumps(struct wcd_dsp_cntl *cntl,
  148. bool internal)
  149. {
  150. }
  151. #endif
  152. static ssize_t wdsp_boot_show(struct wcd_dsp_cntl *cntl, char *buf)
  153. {
  154. return snprintf(buf, WCD_SYSFS_ENTRY_MAX_LEN,
  155. "%u", cntl->boot_reqs);
  156. }
  157. static ssize_t wdsp_boot_store(struct wcd_dsp_cntl *cntl,
  158. const char *buf, ssize_t count)
  159. {
  160. u32 val;
  161. bool vote;
  162. int ret;
  163. ret = kstrtou32(buf, 10, &val);
  164. if (ret) {
  165. dev_err(cntl->codec->dev,
  166. "%s: Invalid entry, ret = %d\n", __func__, ret);
  167. return -EINVAL;
  168. }
  169. if (val > 0) {
  170. cntl->boot_reqs++;
  171. vote = true;
  172. } else {
  173. cntl->boot_reqs--;
  174. vote = false;
  175. }
  176. if (cntl->m_dev && cntl->m_ops &&
  177. cntl->m_ops->vote_for_dsp)
  178. ret = cntl->m_ops->vote_for_dsp(cntl->m_dev, vote);
  179. else
  180. ret = -EINVAL;
  181. if (ret < 0)
  182. dev_err(cntl->codec->dev,
  183. "%s: failed to %s dsp\n", __func__,
  184. vote ? "enable" : "disable");
  185. return count;
  186. }
  187. WCD_CNTL_ATTR(boot, 0660, wdsp_boot_show, wdsp_boot_store);
  188. static ssize_t wcd_cntl_sysfs_show(struct kobject *kobj,
  189. struct attribute *attr, char *buf)
  190. {
  191. struct wcd_cntl_attribute *wcd_attr = to_wcd_cntl_attr(attr);
  192. struct wcd_dsp_cntl *cntl = to_wcd_cntl(kobj);
  193. ssize_t ret = -EINVAL;
  194. if (cntl && wcd_attr->show)
  195. ret = wcd_attr->show(cntl, buf);
  196. return ret;
  197. }
  198. static ssize_t wcd_cntl_sysfs_store(struct kobject *kobj,
  199. struct attribute *attr, const char *buf,
  200. size_t count)
  201. {
  202. struct wcd_cntl_attribute *wcd_attr = to_wcd_cntl_attr(attr);
  203. struct wcd_dsp_cntl *cntl = to_wcd_cntl(kobj);
  204. ssize_t ret = -EINVAL;
  205. if (cntl && wcd_attr->store)
  206. ret = wcd_attr->store(cntl, buf, count);
  207. return ret;
  208. }
  209. static const struct sysfs_ops wcd_cntl_sysfs_ops = {
  210. .show = wcd_cntl_sysfs_show,
  211. .store = wcd_cntl_sysfs_store,
  212. };
  213. static struct kobj_type wcd_cntl_ktype = {
  214. .sysfs_ops = &wcd_cntl_sysfs_ops,
  215. };
  216. static void wcd_cntl_change_online_state(struct wcd_dsp_cntl *cntl,
  217. u8 online)
  218. {
  219. struct wdsp_ssr_entry *ssr_entry = &cntl->ssr_entry;
  220. unsigned long ret;
  221. WCD_CNTL_MUTEX_LOCK(cntl->codec, cntl->ssr_mutex);
  222. ssr_entry->offline = !online;
  223. /* Make sure the write is complete */
  224. wmb();
  225. ret = xchg(&ssr_entry->offline_change, 1);
  226. wake_up_interruptible(&ssr_entry->offline_poll_wait);
  227. dev_dbg(cntl->codec->dev,
  228. "%s: requested %u, offline %u offline_change %u, ret = %ldn",
  229. __func__, online, ssr_entry->offline,
  230. ssr_entry->offline_change, ret);
  231. WCD_CNTL_MUTEX_UNLOCK(cntl->codec, cntl->ssr_mutex);
  232. }
  233. static ssize_t wdsp_ssr_entry_read(struct snd_info_entry *entry,
  234. void *file_priv_data, struct file *file,
  235. char __user *buf, size_t count, loff_t pos)
  236. {
  237. int len = 0;
  238. char buffer[WCD_PROCFS_ENTRY_MAX_LEN];
  239. struct wcd_dsp_cntl *cntl;
  240. struct wdsp_ssr_entry *ssr_entry;
  241. ssize_t ret;
  242. u8 offline;
  243. cntl = (struct wcd_dsp_cntl *) entry->private_data;
  244. if (!cntl) {
  245. pr_err("%s: Invalid private data for SSR procfs entry\n",
  246. __func__);
  247. return -EINVAL;
  248. }
  249. ssr_entry = &cntl->ssr_entry;
  250. WCD_CNTL_MUTEX_LOCK(cntl->codec, cntl->ssr_mutex);
  251. offline = ssr_entry->offline;
  252. /* Make sure the read is complete */
  253. rmb();
  254. dev_dbg(cntl->codec->dev, "%s: offline = %s\n", __func__,
  255. offline ? "true" : "false");
  256. len = snprintf(buffer, sizeof(buffer), "%s\n",
  257. offline ? "OFFLINE" : "ONLINE");
  258. ret = simple_read_from_buffer(buf, count, &pos, buffer, len);
  259. WCD_CNTL_MUTEX_UNLOCK(cntl->codec, cntl->ssr_mutex);
  260. return ret;
  261. }
  262. static unsigned int wdsp_ssr_entry_poll(struct snd_info_entry *entry,
  263. void *private_data, struct file *file,
  264. poll_table *wait)
  265. {
  266. struct wcd_dsp_cntl *cntl;
  267. struct wdsp_ssr_entry *ssr_entry;
  268. unsigned int ret = 0;
  269. if (!entry || !entry->private_data) {
  270. pr_err("%s: %s is NULL\n", __func__,
  271. (!entry) ? "entry" : "private_data");
  272. return -EINVAL;
  273. }
  274. cntl = (struct wcd_dsp_cntl *) entry->private_data;
  275. ssr_entry = &cntl->ssr_entry;
  276. dev_dbg(cntl->codec->dev, "%s: Poll wait, offline = %u\n",
  277. __func__, ssr_entry->offline);
  278. poll_wait(file, &ssr_entry->offline_poll_wait, wait);
  279. dev_dbg(cntl->codec->dev, "%s: Woken up Poll wait, offline = %u\n",
  280. __func__, ssr_entry->offline);
  281. WCD_CNTL_MUTEX_LOCK(cntl->codec, cntl->ssr_mutex);
  282. if (xchg(&ssr_entry->offline_change, 0))
  283. ret = POLLIN | POLLPRI | POLLRDNORM;
  284. dev_dbg(cntl->codec->dev, "%s: ret (%d) from poll_wait\n",
  285. __func__, ret);
  286. WCD_CNTL_MUTEX_UNLOCK(cntl->codec, cntl->ssr_mutex);
  287. return ret;
  288. }
  289. static struct snd_info_entry_ops wdsp_ssr_entry_ops = {
  290. .read = wdsp_ssr_entry_read,
  291. .poll = wdsp_ssr_entry_poll,
  292. };
  293. static int wcd_cntl_cpe_fll_calibrate(struct wcd_dsp_cntl *cntl)
  294. {
  295. struct snd_soc_codec *codec = cntl->codec;
  296. int ret = 0, retry = 0;
  297. u8 cal_lsb, cal_msb;
  298. u8 lock_det;
  299. /* Make sure clocks are gated */
  300. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPE_CTL,
  301. 0x05, 0x00);
  302. /* Enable CPE FLL reference clock */
  303. snd_soc_update_bits(codec, WCD934X_CLK_SYS_MCLK2_PRG1,
  304. 0x80, 0x80);
  305. snd_soc_update_bits(codec, WCD934X_CPE_FLL_USER_CTL_5,
  306. 0xF3, 0x13);
  307. snd_soc_write(codec, WCD934X_CPE_FLL_L_VAL_CTL_0, 0x50);
  308. /* Disable CPAR reset and Enable CPAR clk */
  309. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CTL,
  310. 0x02, 0x02);
  311. /* Write calibration l-value based on cdc clk rate */
  312. if (cntl->clk_rate == 9600000) {
  313. cal_lsb = 0x6d;
  314. cal_msb = 0x00;
  315. } else {
  316. cal_lsb = 0x56;
  317. cal_msb = 0x00;
  318. }
  319. snd_soc_write(codec, WCD934X_CPE_FLL_USER_CTL_6, cal_lsb);
  320. snd_soc_write(codec, WCD934X_CPE_FLL_USER_CTL_7, cal_msb);
  321. /* FLL mode to follow power up sequence */
  322. snd_soc_update_bits(codec, WCD934X_CPE_FLL_FLL_MODE,
  323. 0x60, 0x00);
  324. /* HW controlled CPE FLL */
  325. snd_soc_update_bits(codec, WCD934X_CPE_FLL_FLL_MODE,
  326. 0x80, 0x80);
  327. /* Force on CPE FLL */
  328. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CFG,
  329. 0x04, 0x04);
  330. do {
  331. /* Time for FLL calibration to complete */
  332. usleep_range(1000, 1100);
  333. lock_det = snd_soc_read(codec, WCD934X_CPE_FLL_STATUS_3);
  334. retry++;
  335. } while (!(lock_det & 0x01) &&
  336. retry <= WCD_CPE_FLL_MAX_RETRIES);
  337. if (!(lock_det & 0x01)) {
  338. dev_err(codec->dev, "%s: lock detect not set, 0x%02x\n",
  339. __func__, lock_det);
  340. ret = -EIO;
  341. goto err_lock_det;
  342. }
  343. snd_soc_update_bits(codec, WCD934X_CPE_FLL_FLL_MODE,
  344. 0x60, 0x20);
  345. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CFG,
  346. 0x04, 0x00);
  347. return ret;
  348. err_lock_det:
  349. /* Undo the register settings */
  350. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CFG,
  351. 0x04, 0x00);
  352. snd_soc_update_bits(codec, WCD934X_CPE_FLL_FLL_MODE,
  353. 0x80, 0x00);
  354. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CTL,
  355. 0x02, 0x00);
  356. return ret;
  357. }
  358. static void wcd_cntl_config_cpar(struct wcd_dsp_cntl *cntl)
  359. {
  360. struct snd_soc_codec *codec = cntl->codec;
  361. u8 nom_lo, nom_hi, svs2_lo, svs2_hi;
  362. /* Configure CPAR */
  363. nom_hi = svs2_hi = 0;
  364. if (cntl->clk_rate == 9600000) {
  365. nom_lo = 0x90;
  366. svs2_lo = 0x50;
  367. } else {
  368. nom_lo = 0x70;
  369. svs2_lo = 0x3e;
  370. }
  371. snd_soc_write(codec, WCD934X_TEST_DEBUG_LVAL_NOM_LOW, nom_lo);
  372. snd_soc_write(codec, WCD934X_TEST_DEBUG_LVAL_NOM_HIGH, nom_hi);
  373. snd_soc_write(codec, WCD934X_TEST_DEBUG_LVAL_SVS_SVS2_LOW, svs2_lo);
  374. snd_soc_write(codec, WCD934X_TEST_DEBUG_LVAL_SVS_SVS2_HIGH, svs2_hi);
  375. snd_soc_update_bits(codec, WCD934X_CPE_SS_PWR_CPEFLL_CTL,
  376. 0x03, 0x03);
  377. }
  378. static int wcd_cntl_cpe_fll_ctrl(struct wcd_dsp_cntl *cntl,
  379. bool enable)
  380. {
  381. struct snd_soc_codec *codec = cntl->codec;
  382. int ret = 0;
  383. if (enable) {
  384. ret = wcd_cntl_cpe_fll_calibrate(cntl);
  385. if (ret < 0) {
  386. dev_err(codec->dev,
  387. "%s: cpe_fll_cal failed, err = %d\n",
  388. __func__, ret);
  389. goto done;
  390. }
  391. wcd_cntl_config_cpar(cntl);
  392. /* Enable AHB CLK and CPE CLK*/
  393. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPE_CTL,
  394. 0x05, 0x05);
  395. } else {
  396. /* Disable AHB CLK and CPE CLK */
  397. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPE_CTL,
  398. 0x05, 0x00);
  399. /* Reset the CPAR mode for CPE FLL */
  400. snd_soc_write(codec, WCD934X_CPE_FLL_FLL_MODE, 0x20);
  401. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CFG,
  402. 0x04, 0x00);
  403. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CTL,
  404. 0x02, 0x00);
  405. }
  406. done:
  407. return ret;
  408. }
  409. static int wcd_cntl_clocks_enable(struct wcd_dsp_cntl *cntl)
  410. {
  411. struct snd_soc_codec *codec = cntl->codec;
  412. int ret;
  413. WCD_CNTL_MUTEX_LOCK(codec, cntl->clk_mutex);
  414. /* Enable codec clock */
  415. if (cntl->cdc_cb && cntl->cdc_cb->cdc_clk_en)
  416. ret = cntl->cdc_cb->cdc_clk_en(codec, true);
  417. else
  418. ret = -EINVAL;
  419. if (ret < 0) {
  420. dev_err(codec->dev,
  421. "%s: Failed to enable cdc clk, err = %d\n",
  422. __func__, ret);
  423. goto done;
  424. }
  425. /* Pull CPAR out of reset */
  426. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CTL, 0x04, 0x00);
  427. /* Configure and Enable CPE FLL clock */
  428. ret = wcd_cntl_cpe_fll_ctrl(cntl, true);
  429. if (ret < 0) {
  430. dev_err(codec->dev,
  431. "%s: Failed to enable cpe clk, err = %d\n",
  432. __func__, ret);
  433. goto err_cpe_clk;
  434. }
  435. cntl->is_clk_enabled = true;
  436. /* Ungate the CPR clock */
  437. snd_soc_update_bits(codec, WCD934X_CODEC_RPM_CLK_GATE, 0x10, 0x00);
  438. done:
  439. WCD_CNTL_MUTEX_UNLOCK(codec, cntl->clk_mutex);
  440. return ret;
  441. err_cpe_clk:
  442. if (cntl->cdc_cb && cntl->cdc_cb->cdc_clk_en)
  443. cntl->cdc_cb->cdc_clk_en(codec, false);
  444. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CTL, 0x04, 0x04);
  445. WCD_CNTL_MUTEX_UNLOCK(codec, cntl->clk_mutex);
  446. return ret;
  447. }
  448. static int wcd_cntl_clocks_disable(struct wcd_dsp_cntl *cntl)
  449. {
  450. struct snd_soc_codec *codec = cntl->codec;
  451. int ret = 0;
  452. WCD_CNTL_MUTEX_LOCK(codec, cntl->clk_mutex);
  453. if (!cntl->is_clk_enabled) {
  454. dev_info(codec->dev, "%s: clocks already disabled\n",
  455. __func__);
  456. goto done;
  457. }
  458. /* Gate the CPR clock */
  459. snd_soc_update_bits(codec, WCD934X_CODEC_RPM_CLK_GATE, 0x10, 0x10);
  460. /* Disable CPE FLL clock */
  461. ret = wcd_cntl_cpe_fll_ctrl(cntl, false);
  462. if (ret < 0)
  463. dev_err(codec->dev,
  464. "%s: Failed to disable cpe clk, err = %d\n",
  465. __func__, ret);
  466. /*
  467. * Even if CPE FLL disable failed, go ahead and disable
  468. * the codec clock
  469. */
  470. if (cntl->cdc_cb && cntl->cdc_cb->cdc_clk_en)
  471. ret = cntl->cdc_cb->cdc_clk_en(codec, false);
  472. else
  473. ret = -EINVAL;
  474. cntl->is_clk_enabled = false;
  475. /* Put CPAR in reset */
  476. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CTL, 0x04, 0x04);
  477. done:
  478. WCD_CNTL_MUTEX_UNLOCK(codec, cntl->clk_mutex);
  479. return ret;
  480. }
  481. static void wcd_cntl_cpar_ctrl(struct wcd_dsp_cntl *cntl,
  482. bool enable)
  483. {
  484. struct snd_soc_codec *codec = cntl->codec;
  485. if (enable)
  486. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CTL, 0x03, 0x03);
  487. else
  488. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPAR_CTL, 0x03, 0x00);
  489. }
  490. static int wcd_cntl_enable_memory(struct wcd_dsp_cntl *cntl,
  491. enum wcd_mem_type mem_type)
  492. {
  493. struct snd_soc_codec *codec = cntl->codec;
  494. struct wcd9xxx *wcd9xxx = dev_get_drvdata(codec->dev->parent);
  495. int loop_cnt = 0;
  496. u8 status;
  497. int ret = 0;
  498. switch (mem_type) {
  499. case WCD_MEM_TYPE_ALWAYS_ON:
  500. /* 512KB of always on region */
  501. wcd9xxx_slim_write_repeat(wcd9xxx,
  502. WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_0,
  503. ARRAY_SIZE(mem_enable_values),
  504. mem_enable_values);
  505. wcd9xxx_slim_write_repeat(wcd9xxx,
  506. WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_1,
  507. ARRAY_SIZE(mem_enable_values),
  508. mem_enable_values);
  509. break;
  510. case WCD_MEM_TYPE_SWITCHABLE:
  511. snd_soc_update_bits(codec, WCD934X_CPE_SS_SOC_SW_COLLAPSE_CTL,
  512. 0x04, 0x00);
  513. snd_soc_update_bits(codec, WCD934X_TEST_DEBUG_MEM_CTRL,
  514. 0x80, 0x80);
  515. snd_soc_update_bits(codec, WCD934X_CPE_SS_SOC_SW_COLLAPSE_CTL,
  516. 0x01, 0x01);
  517. do {
  518. loop_cnt++;
  519. /* Time to enable the power domain for memory */
  520. usleep_range(100, 150);
  521. status = snd_soc_read(codec,
  522. WCD934X_CPE_SS_SOC_SW_COLLAPSE_CTL);
  523. } while ((status & 0x02) != 0x02 &&
  524. loop_cnt != WCD_MEM_ENABLE_MAX_RETRIES);
  525. if ((status & 0x02) != 0x02) {
  526. dev_err(cntl->codec->dev,
  527. "%s: power domain not enabled, status = 0x%02x\n",
  528. __func__, status);
  529. ret = -EIO;
  530. goto done;
  531. }
  532. /* Rest of the memory */
  533. wcd9xxx_slim_write_repeat(wcd9xxx,
  534. WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_2,
  535. ARRAY_SIZE(mem_enable_values),
  536. mem_enable_values);
  537. wcd9xxx_slim_write_repeat(wcd9xxx,
  538. WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_3,
  539. ARRAY_SIZE(mem_enable_values),
  540. mem_enable_values);
  541. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_DRAM1_SHUTDOWN,
  542. 0x05);
  543. break;
  544. default:
  545. dev_err(cntl->codec->dev, "%s: Invalid mem_type %d\n",
  546. __func__, mem_type);
  547. ret = -EINVAL;
  548. break;
  549. }
  550. done:
  551. /* Make sure Deep sleep of memories is enabled for all banks */
  552. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_0, 0xFF);
  553. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_1, 0x0F);
  554. return ret;
  555. }
  556. static void wcd_cntl_disable_memory(struct wcd_dsp_cntl *cntl,
  557. enum wcd_mem_type mem_type)
  558. {
  559. struct snd_soc_codec *codec = cntl->codec;
  560. u8 val;
  561. switch (mem_type) {
  562. case WCD_MEM_TYPE_ALWAYS_ON:
  563. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_1,
  564. 0xFF);
  565. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_0,
  566. 0xFF);
  567. break;
  568. case WCD_MEM_TYPE_SWITCHABLE:
  569. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_3,
  570. 0xFF);
  571. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_2,
  572. 0xFF);
  573. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_DRAM1_SHUTDOWN,
  574. 0x07);
  575. snd_soc_update_bits(codec, WCD934X_CPE_SS_SOC_SW_COLLAPSE_CTL,
  576. 0x01, 0x00);
  577. val = snd_soc_read(codec, WCD934X_CPE_SS_SOC_SW_COLLAPSE_CTL);
  578. if (val & 0x02)
  579. dev_err(codec->dev,
  580. "%s: Disable switchable failed, val = 0x%02x",
  581. __func__, val);
  582. snd_soc_update_bits(codec, WCD934X_TEST_DEBUG_MEM_CTRL,
  583. 0x80, 0x00);
  584. break;
  585. default:
  586. dev_err(cntl->codec->dev, "%s: Invalid mem_type %d\n",
  587. __func__, mem_type);
  588. break;
  589. }
  590. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_0, 0xFF);
  591. snd_soc_write(codec, WCD934X_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_1, 0x0F);
  592. }
  593. static void wcd_cntl_do_shutdown(struct wcd_dsp_cntl *cntl)
  594. {
  595. struct snd_soc_codec *codec = cntl->codec;
  596. /* Disable WDOG */
  597. snd_soc_update_bits(codec, WCD934X_CPE_SS_WDOG_CFG,
  598. 0x3F, 0x01);
  599. /* Put WDSP in reset state */
  600. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPE_CTL,
  601. 0x02, 0x00);
  602. /* If DSP transitions from boot to shutdown, then vote for SVS */
  603. if (cntl->is_wdsp_booted)
  604. cntl->cdc_cb->cdc_vote_svs(codec, true);
  605. cntl->is_wdsp_booted = false;
  606. }
  607. static int wcd_cntl_do_boot(struct wcd_dsp_cntl *cntl)
  608. {
  609. struct snd_soc_codec *codec = cntl->codec;
  610. int ret = 0;
  611. /*
  612. * Debug mode is set from debugfs file node. If debug_mode
  613. * is set, then do not configure the watchdog timer. This
  614. * will be required for debugging the DSP firmware.
  615. */
  616. if (cntl->debug_mode) {
  617. snd_soc_update_bits(codec, WCD934X_CPE_SS_WDOG_CFG,
  618. 0x3F, 0x01);
  619. } else {
  620. snd_soc_update_bits(codec, WCD934X_CPE_SS_WDOG_CFG,
  621. 0x3F, 0x21);
  622. }
  623. /* Make sure all the error interrupts are cleared */
  624. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_CLEAR_0A, 0xFF);
  625. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_CLEAR_0B, 0xFF);
  626. reinit_completion(&cntl->boot_complete);
  627. /* Remove WDSP out of reset */
  628. snd_soc_update_bits(codec, WCD934X_CPE_SS_CPE_CTL,
  629. 0x02, 0x02);
  630. /*
  631. * In debug mode, DSP may not boot up normally,
  632. * wait indefinitely for DSP to boot.
  633. */
  634. if (cntl->debug_mode) {
  635. wait_for_completion(&cntl->boot_complete);
  636. dev_dbg(codec->dev, "%s: WDSP booted in dbg mode\n", __func__);
  637. cntl->is_wdsp_booted = true;
  638. goto done;
  639. }
  640. /* Boot in normal mode */
  641. ret = wait_for_completion_timeout(&cntl->boot_complete,
  642. msecs_to_jiffies(WCD_DSP_BOOT_TIMEOUT_MS));
  643. if (!ret) {
  644. dev_err(codec->dev, "%s: WDSP boot timed out\n",
  645. __func__);
  646. wcd_cntl_collect_debug_dumps(cntl, true);
  647. ret = -ETIMEDOUT;
  648. goto err_boot;
  649. } else {
  650. /*
  651. * Re-initialize the return code to 0, as in success case,
  652. * it will hold the remaining time for completion timeout
  653. */
  654. ret = 0;
  655. }
  656. dev_dbg(codec->dev, "%s: WDSP booted in normal mode\n", __func__);
  657. cntl->is_wdsp_booted = true;
  658. /* Enable WDOG */
  659. snd_soc_update_bits(codec, WCD934X_CPE_SS_WDOG_CFG,
  660. 0x10, 0x10);
  661. done:
  662. /* If dsp booted up, then remove vote on SVS */
  663. if (cntl->is_wdsp_booted)
  664. cntl->cdc_cb->cdc_vote_svs(codec, false);
  665. return ret;
  666. err_boot:
  667. /* call shutdown to perform cleanup */
  668. wcd_cntl_do_shutdown(cntl);
  669. return ret;
  670. }
  671. static irqreturn_t wcd_cntl_ipc_irq(int irq, void *data)
  672. {
  673. struct wcd_dsp_cntl *cntl = data;
  674. int ret;
  675. complete(&cntl->boot_complete);
  676. if (cntl->m_dev && cntl->m_ops &&
  677. cntl->m_ops->signal_handler)
  678. ret = cntl->m_ops->signal_handler(cntl->m_dev, WDSP_IPC1_INTR,
  679. NULL);
  680. else
  681. ret = -EINVAL;
  682. if (ret < 0)
  683. dev_err(cntl->codec->dev,
  684. "%s: Failed to handle irq %d\n", __func__, irq);
  685. return IRQ_HANDLED;
  686. }
  687. static irqreturn_t wcd_cntl_err_irq(int irq, void *data)
  688. {
  689. struct wcd_dsp_cntl *cntl = data;
  690. struct snd_soc_codec *codec = cntl->codec;
  691. struct wdsp_err_signal_arg arg;
  692. u16 status = 0;
  693. u8 reg_val;
  694. int rc, ret = 0;
  695. reg_val = snd_soc_read(codec, WCD934X_CPE_SS_SS_ERROR_INT_STATUS_0A);
  696. status = status | reg_val;
  697. reg_val = snd_soc_read(codec, WCD934X_CPE_SS_SS_ERROR_INT_STATUS_0B);
  698. status = status | (reg_val << 8);
  699. dev_info(codec->dev, "%s: error interrupt status = 0x%x\n",
  700. __func__, status);
  701. if ((status & cntl->irqs.fatal_irqs) &&
  702. (cntl->m_dev && cntl->m_ops && cntl->m_ops->signal_handler)) {
  703. /*
  704. * If WDSP SSR happens, skip collecting debug dumps.
  705. * If debug dumps collecting happens first, WDSP_ERR_INTR
  706. * will be blocked in signal_handler and get processed later.
  707. */
  708. rc = WCD_CNTL_SET_ERR_IRQ_FLAG(cntl);
  709. arg.mem_dumps_enabled = cntl->ramdump_enable;
  710. arg.remote_start_addr = WCD_934X_RAMDUMP_START_ADDR;
  711. arg.dump_size = WCD_934X_RAMDUMP_SIZE;
  712. ret = cntl->m_ops->signal_handler(cntl->m_dev, WDSP_ERR_INTR,
  713. &arg);
  714. if (ret < 0)
  715. dev_err(cntl->codec->dev,
  716. "%s: Failed to handle fatal irq 0x%x\n",
  717. __func__, status & cntl->irqs.fatal_irqs);
  718. wcd_cntl_change_online_state(cntl, 0);
  719. if (rc == 0)
  720. WCD_CNTL_CLR_ERR_IRQ_FLAG(cntl);
  721. } else {
  722. dev_err(cntl->codec->dev, "%s: Invalid signal_handler\n",
  723. __func__);
  724. }
  725. return IRQ_HANDLED;
  726. }
  727. static int wcd_control_handler(struct device *dev, void *priv_data,
  728. enum wdsp_event_type event, void *data)
  729. {
  730. struct wcd_dsp_cntl *cntl = priv_data;
  731. struct snd_soc_codec *codec = cntl->codec;
  732. int ret = 0;
  733. switch (event) {
  734. case WDSP_EVENT_POST_INIT:
  735. case WDSP_EVENT_POST_DLOAD_CODE:
  736. case WDSP_EVENT_DLOAD_FAILED:
  737. case WDSP_EVENT_POST_SHUTDOWN:
  738. /* Disable CPAR */
  739. wcd_cntl_cpar_ctrl(cntl, false);
  740. /* Disable all the clocks */
  741. ret = wcd_cntl_clocks_disable(cntl);
  742. if (ret < 0)
  743. dev_err(codec->dev,
  744. "%s: Failed to disable clocks, err = %d\n",
  745. __func__, ret);
  746. if (event == WDSP_EVENT_POST_DLOAD_CODE)
  747. /* Mark DSP online since code download is complete */
  748. wcd_cntl_change_online_state(cntl, 1);
  749. break;
  750. case WDSP_EVENT_PRE_DLOAD_DATA:
  751. case WDSP_EVENT_PRE_DLOAD_CODE:
  752. /* Enable all the clocks */
  753. ret = wcd_cntl_clocks_enable(cntl);
  754. if (ret < 0) {
  755. dev_err(codec->dev,
  756. "%s: Failed to enable clocks, err = %d\n",
  757. __func__, ret);
  758. goto done;
  759. }
  760. /* Enable CPAR */
  761. wcd_cntl_cpar_ctrl(cntl, true);
  762. if (event == WDSP_EVENT_PRE_DLOAD_CODE)
  763. wcd_cntl_enable_memory(cntl, WCD_MEM_TYPE_ALWAYS_ON);
  764. else if (event == WDSP_EVENT_PRE_DLOAD_DATA)
  765. wcd_cntl_enable_memory(cntl, WCD_MEM_TYPE_SWITCHABLE);
  766. break;
  767. case WDSP_EVENT_DO_BOOT:
  768. ret = wcd_cntl_do_boot(cntl);
  769. if (ret < 0)
  770. dev_err(codec->dev,
  771. "%s: WDSP boot failed, err = %d\n",
  772. __func__, ret);
  773. break;
  774. case WDSP_EVENT_DO_SHUTDOWN:
  775. wcd_cntl_do_shutdown(cntl);
  776. wcd_cntl_disable_memory(cntl, WCD_MEM_TYPE_SWITCHABLE);
  777. break;
  778. default:
  779. dev_dbg(codec->dev, "%s: unhandled event %d\n",
  780. __func__, event);
  781. }
  782. done:
  783. return ret;
  784. }
  785. static int wcd_cntl_sysfs_init(char *dir, struct wcd_dsp_cntl *cntl)
  786. {
  787. struct snd_soc_codec *codec = cntl->codec;
  788. int ret = 0;
  789. ret = kobject_init_and_add(&cntl->wcd_kobj, &wcd_cntl_ktype,
  790. kernel_kobj, dir);
  791. if (ret < 0) {
  792. dev_err(codec->dev,
  793. "%s: Failed to add kobject %s, err = %d\n",
  794. __func__, dir, ret);
  795. goto done;
  796. }
  797. ret = sysfs_create_file(&cntl->wcd_kobj, &cntl_attr_boot.attr);
  798. if (ret < 0) {
  799. dev_err(codec->dev,
  800. "%s: Failed to add wdsp_boot sysfs entry to %s\n",
  801. __func__, dir);
  802. goto fail_create_file;
  803. }
  804. return ret;
  805. fail_create_file:
  806. kobject_put(&cntl->wcd_kobj);
  807. done:
  808. return ret;
  809. }
  810. static void wcd_cntl_sysfs_remove(struct wcd_dsp_cntl *cntl)
  811. {
  812. sysfs_remove_file(&cntl->wcd_kobj, &cntl_attr_boot.attr);
  813. kobject_put(&cntl->wcd_kobj);
  814. }
  815. static void wcd_cntl_debugfs_init(char *dir, struct wcd_dsp_cntl *cntl)
  816. {
  817. struct snd_soc_codec *codec = cntl->codec;
  818. cntl->entry = debugfs_create_dir(dir, NULL);
  819. if (IS_ERR_OR_NULL(dir)) {
  820. dev_err(codec->dev, "%s debugfs_create_dir failed for %s\n",
  821. __func__, dir);
  822. goto done;
  823. }
  824. debugfs_create_u32("debug_mode", 0644,
  825. cntl->entry, &cntl->debug_mode);
  826. debugfs_create_bool("ramdump_enable", 0644,
  827. cntl->entry, &cntl->ramdump_enable);
  828. done:
  829. return;
  830. }
  831. static void wcd_cntl_debugfs_remove(struct wcd_dsp_cntl *cntl)
  832. {
  833. if (cntl)
  834. debugfs_remove(cntl->entry);
  835. }
  836. static int wcd_miscdev_release(struct inode *inode, struct file *filep)
  837. {
  838. struct wcd_dsp_cntl *cntl = container_of(filep->private_data,
  839. struct wcd_dsp_cntl, miscdev);
  840. if (!cntl->m_dev || !cntl->m_ops ||
  841. !cntl->m_ops->vote_for_dsp) {
  842. dev_err(cntl->codec->dev,
  843. "%s: DSP not ready to boot\n", __func__);
  844. return -EINVAL;
  845. }
  846. /* Make sure the DSP users goes to zero upon closing dev node */
  847. while (cntl->boot_reqs > 0) {
  848. cntl->m_ops->vote_for_dsp(cntl->m_dev, false);
  849. cntl->boot_reqs--;
  850. }
  851. return 0;
  852. }
  853. static ssize_t wcd_miscdev_write(struct file *filep, const char __user *ubuf,
  854. size_t count, loff_t *pos)
  855. {
  856. struct wcd_dsp_cntl *cntl = container_of(filep->private_data,
  857. struct wcd_dsp_cntl, miscdev);
  858. char val[WCD_MISCDEV_CMD_MAX_LEN];
  859. bool vote;
  860. int ret = 0;
  861. if (count == 0 || count > WCD_MISCDEV_CMD_MAX_LEN) {
  862. pr_err("%s: Invalid count = %zd\n", __func__, count);
  863. ret = -EINVAL;
  864. goto done;
  865. }
  866. ret = copy_from_user(val, ubuf, count);
  867. if (ret < 0) {
  868. dev_err(cntl->codec->dev,
  869. "%s: copy_from_user failed, err = %d\n",
  870. __func__, ret);
  871. ret = -EFAULT;
  872. goto done;
  873. }
  874. if (val[0] == '1') {
  875. cntl->boot_reqs++;
  876. vote = true;
  877. } else if (val[0] == '0') {
  878. if (cntl->boot_reqs == 0) {
  879. dev_err(cntl->codec->dev,
  880. "%s: WDSP already disabled\n", __func__);
  881. ret = -EINVAL;
  882. goto done;
  883. }
  884. cntl->boot_reqs--;
  885. vote = false;
  886. } else if (!strcmp(val, "DEBUG_DUMP")) {
  887. dev_dbg(cntl->codec->dev,
  888. "%s: Collect dumps for debug use\n", __func__);
  889. wcd_cntl_collect_debug_dumps(cntl, false);
  890. goto done;
  891. } else {
  892. dev_err(cntl->codec->dev, "%s: Invalid value %s\n",
  893. __func__, val);
  894. ret = -EINVAL;
  895. goto done;
  896. }
  897. dev_dbg(cntl->codec->dev,
  898. "%s: booted = %s, ref_cnt = %d, vote = %s\n",
  899. __func__, cntl->is_wdsp_booted ? "true" : "false",
  900. cntl->boot_reqs, vote ? "true" : "false");
  901. if (cntl->m_dev && cntl->m_ops &&
  902. cntl->m_ops->vote_for_dsp)
  903. ret = cntl->m_ops->vote_for_dsp(cntl->m_dev, vote);
  904. else
  905. ret = -EINVAL;
  906. done:
  907. if (ret)
  908. return ret;
  909. else
  910. return count;
  911. }
  912. static const struct file_operations wcd_miscdev_fops = {
  913. .write = wcd_miscdev_write,
  914. .release = wcd_miscdev_release,
  915. };
  916. static int wcd_cntl_miscdev_create(struct wcd_dsp_cntl *cntl)
  917. {
  918. snprintf(cntl->miscdev_name, ARRAY_SIZE(cntl->miscdev_name),
  919. "wcd_dsp%u_control", cntl->dsp_instance);
  920. cntl->miscdev.minor = MISC_DYNAMIC_MINOR;
  921. cntl->miscdev.name = cntl->miscdev_name;
  922. cntl->miscdev.fops = &wcd_miscdev_fops;
  923. cntl->miscdev.parent = cntl->codec->dev;
  924. return misc_register(&cntl->miscdev);
  925. }
  926. static void wcd_cntl_miscdev_destroy(struct wcd_dsp_cntl *cntl)
  927. {
  928. misc_deregister(&cntl->miscdev);
  929. }
  930. static int wcd_control_init(struct device *dev, void *priv_data)
  931. {
  932. struct wcd_dsp_cntl *cntl = priv_data;
  933. struct snd_soc_codec *codec = cntl->codec;
  934. struct wcd9xxx *wcd9xxx = dev_get_drvdata(codec->dev->parent);
  935. struct wcd9xxx_core_resource *core_res = &wcd9xxx->core_res;
  936. int ret;
  937. bool err_irq_requested = false;
  938. ret = wcd9xxx_request_irq(core_res,
  939. cntl->irqs.cpe_ipc1_irq,
  940. wcd_cntl_ipc_irq, "CPE IPC1",
  941. cntl);
  942. if (ret < 0) {
  943. dev_err(codec->dev,
  944. "%s: Failed to request cpe ipc irq, err = %d\n",
  945. __func__, ret);
  946. goto done;
  947. }
  948. /* Unmask the fatal irqs */
  949. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_MASK_0A,
  950. ~(cntl->irqs.fatal_irqs & 0xFF));
  951. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_MASK_0B,
  952. ~((cntl->irqs.fatal_irqs >> 8) & 0xFF));
  953. /*
  954. * CPE ERR irq is used only for error reporting from WCD DSP,
  955. * even if this request fails, DSP can be function normally.
  956. * Continuing with init even if the CPE ERR irq request fails.
  957. */
  958. if (wcd9xxx_request_irq(core_res, cntl->irqs.cpe_err_irq,
  959. wcd_cntl_err_irq, "CPE ERR", cntl))
  960. dev_info(codec->dev, "%s: Failed request_irq(cpe_err_irq)",
  961. __func__);
  962. else
  963. err_irq_requested = true;
  964. /* Enable all the clocks */
  965. ret = wcd_cntl_clocks_enable(cntl);
  966. if (ret < 0) {
  967. dev_err(codec->dev, "%s: Failed to enable clocks, err = %d\n",
  968. __func__, ret);
  969. goto err_clk_enable;
  970. }
  971. wcd_cntl_cpar_ctrl(cntl, true);
  972. return 0;
  973. err_clk_enable:
  974. /* Mask all error interrupts */
  975. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_MASK_0A, 0xFF);
  976. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_MASK_0B, 0xFF);
  977. /* Free the irq's requested */
  978. wcd9xxx_free_irq(core_res, cntl->irqs.cpe_ipc1_irq, cntl);
  979. if (err_irq_requested)
  980. wcd9xxx_free_irq(core_res, cntl->irqs.cpe_err_irq, cntl);
  981. done:
  982. return ret;
  983. }
  984. static int wcd_control_deinit(struct device *dev, void *priv_data)
  985. {
  986. struct wcd_dsp_cntl *cntl = priv_data;
  987. struct snd_soc_codec *codec = cntl->codec;
  988. struct wcd9xxx *wcd9xxx = dev_get_drvdata(codec->dev->parent);
  989. struct wcd9xxx_core_resource *core_res = &wcd9xxx->core_res;
  990. wcd_cntl_clocks_disable(cntl);
  991. wcd_cntl_cpar_ctrl(cntl, false);
  992. /* Mask all error interrupts */
  993. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_MASK_0A, 0xFF);
  994. snd_soc_write(codec, WCD934X_CPE_SS_SS_ERROR_INT_MASK_0B, 0xFF);
  995. /* Free the irq's requested */
  996. wcd9xxx_free_irq(core_res, cntl->irqs.cpe_err_irq, cntl);
  997. wcd9xxx_free_irq(core_res, cntl->irqs.cpe_ipc1_irq, cntl);
  998. return 0;
  999. }
  1000. static struct wdsp_cmpnt_ops control_ops = {
  1001. .init = wcd_control_init,
  1002. .deinit = wcd_control_deinit,
  1003. .event_handler = wcd_control_handler,
  1004. };
  1005. static int wcd_ctrl_component_bind(struct device *dev,
  1006. struct device *master,
  1007. void *data)
  1008. {
  1009. struct wcd_dsp_cntl *cntl;
  1010. struct snd_soc_codec *codec;
  1011. struct snd_card *card;
  1012. struct snd_info_entry *entry;
  1013. char proc_name[WCD_PROCFS_ENTRY_MAX_LEN];
  1014. char wcd_cntl_dir_name[WCD_CNTL_DIR_NAME_LEN_MAX];
  1015. int ret = 0;
  1016. if (!dev || !master || !data) {
  1017. pr_err("%s: Invalid parameters\n", __func__);
  1018. return -EINVAL;
  1019. }
  1020. cntl = tavil_get_wcd_dsp_cntl(dev);
  1021. if (!cntl) {
  1022. dev_err(dev, "%s: Failed to get cntl reference\n",
  1023. __func__);
  1024. return -EINVAL;
  1025. }
  1026. cntl->m_dev = master;
  1027. cntl->m_ops = data;
  1028. if (!cntl->m_ops->register_cmpnt_ops) {
  1029. dev_err(dev, "%s: invalid master callback register_cmpnt_ops\n",
  1030. __func__);
  1031. ret = -EINVAL;
  1032. goto done;
  1033. }
  1034. ret = cntl->m_ops->register_cmpnt_ops(master, dev, cntl, &control_ops);
  1035. if (ret) {
  1036. dev_err(dev, "%s: register_cmpnt_ops failed, err = %d\n",
  1037. __func__, ret);
  1038. goto done;
  1039. }
  1040. ret = wcd_cntl_miscdev_create(cntl);
  1041. if (ret < 0) {
  1042. dev_err(dev, "%s: misc dev register failed, err = %d\n",
  1043. __func__, ret);
  1044. goto done;
  1045. }
  1046. snprintf(wcd_cntl_dir_name, WCD_CNTL_DIR_NAME_LEN_MAX,
  1047. "%s%d", "wdsp", cntl->dsp_instance);
  1048. ret = wcd_cntl_sysfs_init(wcd_cntl_dir_name, cntl);
  1049. if (ret < 0) {
  1050. dev_err(dev, "%s: sysfs_init failed, err = %d\n",
  1051. __func__, ret);
  1052. goto err_sysfs_init;
  1053. }
  1054. wcd_cntl_debugfs_init(wcd_cntl_dir_name, cntl);
  1055. codec = cntl->codec;
  1056. card = codec->component.card->snd_card;
  1057. snprintf(proc_name, WCD_PROCFS_ENTRY_MAX_LEN, "%s%d%s", "cpe",
  1058. cntl->dsp_instance, "_state");
  1059. entry = snd_info_create_card_entry(card, proc_name, card->proc_root);
  1060. if (!entry) {
  1061. /* Do not treat this as Fatal error */
  1062. dev_err(dev, "%s: Failed to create procfs entry %s\n",
  1063. __func__, proc_name);
  1064. goto err_sysfs_init;
  1065. }
  1066. cntl->ssr_entry.entry = entry;
  1067. cntl->ssr_entry.offline = 1;
  1068. entry->size = WCD_PROCFS_ENTRY_MAX_LEN;
  1069. entry->content = SNDRV_INFO_CONTENT_DATA;
  1070. entry->c.ops = &wdsp_ssr_entry_ops;
  1071. entry->private_data = cntl;
  1072. ret = snd_info_register(entry);
  1073. if (ret < 0) {
  1074. dev_err(dev, "%s: Failed to register entry %s, err = %d\n",
  1075. __func__, proc_name, ret);
  1076. snd_info_free_entry(entry);
  1077. /* Let bind still happen even if creating the entry failed */
  1078. ret = 0;
  1079. }
  1080. done:
  1081. return ret;
  1082. err_sysfs_init:
  1083. wcd_cntl_miscdev_destroy(cntl);
  1084. return ret;
  1085. }
  1086. static void wcd_ctrl_component_unbind(struct device *dev,
  1087. struct device *master,
  1088. void *data)
  1089. {
  1090. struct wcd_dsp_cntl *cntl;
  1091. if (!dev) {
  1092. pr_err("%s: Invalid device\n", __func__);
  1093. return;
  1094. }
  1095. cntl = tavil_get_wcd_dsp_cntl(dev);
  1096. if (!cntl) {
  1097. dev_err(dev, "%s: Failed to get cntl reference\n",
  1098. __func__);
  1099. return;
  1100. }
  1101. cntl->m_dev = NULL;
  1102. cntl->m_ops = NULL;
  1103. /* Remove the sysfs entries */
  1104. wcd_cntl_sysfs_remove(cntl);
  1105. /* Remove the debugfs entries */
  1106. wcd_cntl_debugfs_remove(cntl);
  1107. /* Remove the misc device */
  1108. wcd_cntl_miscdev_destroy(cntl);
  1109. }
  1110. static const struct component_ops wcd_ctrl_component_ops = {
  1111. .bind = wcd_ctrl_component_bind,
  1112. .unbind = wcd_ctrl_component_unbind,
  1113. };
  1114. /*
  1115. * wcd_dsp_ssr_event: handle the SSR event raised by caller.
  1116. * @cntl: Handle to the wcd_dsp_cntl structure
  1117. * @event: The SSR event to be handled
  1118. *
  1119. * Notifies the manager driver about the SSR event.
  1120. * Returns 0 on success and negative error code on error.
  1121. */
  1122. int wcd_dsp_ssr_event(struct wcd_dsp_cntl *cntl, enum cdc_ssr_event event)
  1123. {
  1124. int ret = 0;
  1125. if (!cntl) {
  1126. pr_err("%s: Invalid handle to control\n", __func__);
  1127. return -EINVAL;
  1128. }
  1129. if (!cntl->m_dev || !cntl->m_ops || !cntl->m_ops->signal_handler) {
  1130. dev_err(cntl->codec->dev,
  1131. "%s: Invalid signal_handler callback\n", __func__);
  1132. return -EINVAL;
  1133. }
  1134. switch (event) {
  1135. case WCD_CDC_DOWN_EVENT:
  1136. ret = cntl->m_ops->signal_handler(cntl->m_dev,
  1137. WDSP_CDC_DOWN_SIGNAL,
  1138. NULL);
  1139. if (ret < 0)
  1140. dev_err(cntl->codec->dev,
  1141. "%s: WDSP_CDC_DOWN_SIGNAL failed, err = %d\n",
  1142. __func__, ret);
  1143. wcd_cntl_change_online_state(cntl, 0);
  1144. break;
  1145. case WCD_CDC_UP_EVENT:
  1146. ret = cntl->m_ops->signal_handler(cntl->m_dev,
  1147. WDSP_CDC_UP_SIGNAL,
  1148. NULL);
  1149. if (ret < 0)
  1150. dev_err(cntl->codec->dev,
  1151. "%s: WDSP_CDC_UP_SIGNAL failed, err = %d\n",
  1152. __func__, ret);
  1153. break;
  1154. default:
  1155. dev_err(cntl->codec->dev, "%s: Invalid event %d\n",
  1156. __func__, event);
  1157. ret = -EINVAL;
  1158. break;
  1159. }
  1160. return ret;
  1161. }
  1162. EXPORT_SYMBOL(wcd_dsp_ssr_event);
  1163. /*
  1164. * wcd_dsp_cntl_init: Initialize the wcd-dsp control
  1165. * @codec: pointer to the codec handle
  1166. * @params: Parameters required to initialize wcd-dsp control
  1167. *
  1168. * This API is expected to be invoked by the codec driver and
  1169. * provide information essential for the wcd dsp control to
  1170. * configure and initialize the dsp
  1171. */
  1172. void wcd_dsp_cntl_init(struct snd_soc_codec *codec,
  1173. struct wcd_dsp_params *params,
  1174. struct wcd_dsp_cntl **cntl)
  1175. {
  1176. struct wcd_dsp_cntl *control;
  1177. int ret;
  1178. if (!codec || !params) {
  1179. pr_err("%s: Invalid handle to %s\n", __func__,
  1180. (!codec) ? "codec" : "params");
  1181. *cntl = NULL;
  1182. return;
  1183. }
  1184. if (*cntl) {
  1185. pr_err("%s: cntl is non NULL, maybe already initialized ?\n",
  1186. __func__);
  1187. return;
  1188. }
  1189. if (!params->cb || !params->cb->cdc_clk_en ||
  1190. !params->cb->cdc_vote_svs) {
  1191. dev_err(codec->dev,
  1192. "%s: clk_en and vote_svs callbacks must be provided\n",
  1193. __func__);
  1194. return;
  1195. }
  1196. control = kzalloc(sizeof(*control), GFP_KERNEL);
  1197. if (!(control))
  1198. return;
  1199. control->codec = codec;
  1200. control->clk_rate = params->clk_rate;
  1201. control->cdc_cb = params->cb;
  1202. control->dsp_instance = params->dsp_instance;
  1203. memcpy(&control->irqs, &params->irqs, sizeof(control->irqs));
  1204. init_completion(&control->boot_complete);
  1205. mutex_init(&control->clk_mutex);
  1206. mutex_init(&control->ssr_mutex);
  1207. init_waitqueue_head(&control->ssr_entry.offline_poll_wait);
  1208. WCD_CNTL_CLR_ERR_IRQ_FLAG(control);
  1209. /*
  1210. * The default state of WDSP is in SVS mode.
  1211. * Vote for SVS now, the vote will be removed only
  1212. * after DSP is booted up.
  1213. */
  1214. control->cdc_cb->cdc_vote_svs(codec, true);
  1215. /*
  1216. * If this is the last component needed by master to be ready,
  1217. * then component_bind will be called within the component_add.
  1218. * Hence, the data pointer should be assigned before component_add,
  1219. * so that we can access it during this component's bind call.
  1220. */
  1221. *cntl = control;
  1222. ret = component_add(codec->dev, &wcd_ctrl_component_ops);
  1223. if (ret) {
  1224. dev_err(codec->dev, "%s: component_add failed, err = %d\n",
  1225. __func__, ret);
  1226. kfree(*cntl);
  1227. *cntl = NULL;
  1228. }
  1229. }
  1230. EXPORT_SYMBOL(wcd_dsp_cntl_init);
  1231. /*
  1232. * wcd_dsp_cntl_deinit: De-initialize the wcd-dsp control
  1233. * @cntl: The struct wcd_dsp_cntl to de-initialize
  1234. *
  1235. * This API is intended to be invoked by the codec driver
  1236. * to de-initialize the wcd dsp control
  1237. */
  1238. void wcd_dsp_cntl_deinit(struct wcd_dsp_cntl **cntl)
  1239. {
  1240. struct wcd_dsp_cntl *control = *cntl;
  1241. struct snd_soc_codec *codec;
  1242. /* If control is NULL, there is nothing to de-initialize */
  1243. if (!control)
  1244. return;
  1245. codec = control->codec;
  1246. /*
  1247. * Calling shutdown will cleanup all register states,
  1248. * irrespective of DSP was booted up or not.
  1249. */
  1250. wcd_cntl_do_shutdown(control);
  1251. wcd_cntl_disable_memory(control, WCD_MEM_TYPE_SWITCHABLE);
  1252. wcd_cntl_disable_memory(control, WCD_MEM_TYPE_ALWAYS_ON);
  1253. component_del(codec->dev, &wcd_ctrl_component_ops);
  1254. mutex_destroy(&control->clk_mutex);
  1255. mutex_destroy(&control->ssr_mutex);
  1256. kfree(*cntl);
  1257. *cntl = NULL;
  1258. }
  1259. EXPORT_SYMBOL(wcd_dsp_cntl_deinit);