dp_rx.h 78 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef _DP_RX_H
  20. #define _DP_RX_H
  21. #include "hal_rx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #include <qdf_tracepoint.h>
  25. #include "dp_ipa.h"
  26. #ifdef RXDMA_OPTIMIZATION
  27. #ifndef RX_DATA_BUFFER_ALIGNMENT
  28. #define RX_DATA_BUFFER_ALIGNMENT 128
  29. #endif
  30. #ifndef RX_MONITOR_BUFFER_ALIGNMENT
  31. #define RX_MONITOR_BUFFER_ALIGNMENT 128
  32. #endif
  33. #else /* RXDMA_OPTIMIZATION */
  34. #define RX_DATA_BUFFER_ALIGNMENT 4
  35. #define RX_MONITOR_BUFFER_ALIGNMENT 4
  36. #endif /* RXDMA_OPTIMIZATION */
  37. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  38. #define DP_WBM2SW_RBM(sw0_bm_id) HAL_RX_BUF_RBM_SW1_BM(sw0_bm_id)
  39. /* RBM value used for re-injecting defragmented packets into REO */
  40. #define DP_DEFRAG_RBM(sw0_bm_id) HAL_RX_BUF_RBM_SW3_BM(sw0_bm_id)
  41. #endif
  42. /* Max buffer in invalid peer SG list*/
  43. #define DP_MAX_INVALID_BUFFERS 10
  44. #ifdef DP_INVALID_PEER_ASSERT
  45. #define DP_PDEV_INVALID_PEER_MSDU_CHECK(head, tail) \
  46. do { \
  47. qdf_assert_always(!(head)); \
  48. qdf_assert_always(!(tail)); \
  49. } while (0)
  50. #else
  51. #define DP_PDEV_INVALID_PEER_MSDU_CHECK(head, tail) /* no op */
  52. #endif
  53. #define RX_BUFFER_RESERVATION 0
  54. #ifdef BE_PKTLOG_SUPPORT
  55. #define BUFFER_RESIDUE 1
  56. #define RX_MON_MIN_HEAD_ROOM 64
  57. #endif
  58. #define DP_DEFAULT_NOISEFLOOR (-96)
  59. #define DP_RX_DESC_MAGIC 0xdec0de
  60. #define dp_rx_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_RX, params)
  61. #define dp_rx_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_RX, params)
  62. #define dp_rx_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_RX, params)
  63. #define dp_rx_info(params...) \
  64. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX, ## params)
  65. #define dp_rx_info_rl(params...) \
  66. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX, ## params)
  67. #define dp_rx_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_RX, params)
  68. /**
  69. * enum dp_rx_desc_state
  70. *
  71. * @RX_DESC_REPLENISH: rx desc replenished
  72. * @RX_DESC_FREELIST: rx desc in freelist
  73. */
  74. enum dp_rx_desc_state {
  75. RX_DESC_REPLENISHED,
  76. RX_DESC_IN_FREELIST,
  77. };
  78. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  79. /**
  80. * struct dp_rx_desc_dbg_info
  81. *
  82. * @freelist_caller: name of the function that put the
  83. * the rx desc in freelist
  84. * @freelist_ts: timestamp when the rx desc is put in
  85. * a freelist
  86. * @replenish_caller: name of the function that last
  87. * replenished the rx desc
  88. * @replenish_ts: last replenish timestamp
  89. * @prev_nbuf: previous nbuf info
  90. * @prev_nbuf_data_addr: previous nbuf data address
  91. */
  92. struct dp_rx_desc_dbg_info {
  93. char freelist_caller[QDF_MEM_FUNC_NAME_SIZE];
  94. uint64_t freelist_ts;
  95. char replenish_caller[QDF_MEM_FUNC_NAME_SIZE];
  96. uint64_t replenish_ts;
  97. qdf_nbuf_t prev_nbuf;
  98. uint8_t *prev_nbuf_data_addr;
  99. };
  100. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  101. /**
  102. * struct dp_rx_desc
  103. *
  104. * @nbuf : VA of the "skb" posted
  105. * @rx_buf_start : VA of the original Rx buffer, before
  106. * movement of any skb->data pointer
  107. * @paddr_buf_start : PA of the original Rx buffer, before
  108. * movement of any frag pointer
  109. * @cookie : index into the sw array which holds
  110. * the sw Rx descriptors
  111. * Cookie space is 21 bits:
  112. * lower 18 bits -- index
  113. * upper 3 bits -- pool_id
  114. * @pool_id : pool Id for which this allocated.
  115. * Can only be used if there is no flow
  116. * steering
  117. * @chip_id : chip_id indicating MLO chip_id
  118. * valid or used only in case of multi-chip MLO
  119. * @in_use rx_desc is in use
  120. * @unmapped used to mark rx_desc an unmapped if the corresponding
  121. * nbuf is already unmapped
  122. * @in_err_state : Nbuf sanity failed for this descriptor.
  123. * @nbuf_data_addr : VA of nbuf data posted
  124. */
  125. struct dp_rx_desc {
  126. qdf_nbuf_t nbuf;
  127. uint8_t *rx_buf_start;
  128. qdf_dma_addr_t paddr_buf_start;
  129. uint32_t cookie;
  130. uint8_t pool_id;
  131. uint8_t chip_id;
  132. #ifdef RX_DESC_DEBUG_CHECK
  133. uint32_t magic;
  134. uint8_t *nbuf_data_addr;
  135. struct dp_rx_desc_dbg_info *dbg_info;
  136. #endif
  137. uint8_t in_use:1,
  138. unmapped:1,
  139. in_err_state:1;
  140. };
  141. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  142. #ifdef ATH_RX_PRI_SAVE
  143. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  144. (qdf_nbuf_set_priority(_nbuf, _tid))
  145. #else
  146. #define DP_RX_TID_SAVE(_nbuf, _tid)
  147. #endif
  148. /* RX Descriptor Multi Page memory alloc related */
  149. #define DP_RX_DESC_OFFSET_NUM_BITS 8
  150. #define DP_RX_DESC_PAGE_ID_NUM_BITS 8
  151. #define DP_RX_DESC_POOL_ID_NUM_BITS 4
  152. #define DP_RX_DESC_PAGE_ID_SHIFT DP_RX_DESC_OFFSET_NUM_BITS
  153. #define DP_RX_DESC_POOL_ID_SHIFT \
  154. (DP_RX_DESC_OFFSET_NUM_BITS + DP_RX_DESC_PAGE_ID_NUM_BITS)
  155. #define RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK \
  156. (((1 << DP_RX_DESC_POOL_ID_NUM_BITS) - 1) << DP_RX_DESC_POOL_ID_SHIFT)
  157. #define RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK \
  158. (((1 << DP_RX_DESC_PAGE_ID_NUM_BITS) - 1) << \
  159. DP_RX_DESC_PAGE_ID_SHIFT)
  160. #define RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK \
  161. ((1 << DP_RX_DESC_OFFSET_NUM_BITS) - 1)
  162. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(_cookie) \
  163. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK) >> \
  164. DP_RX_DESC_POOL_ID_SHIFT)
  165. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(_cookie) \
  166. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK) >> \
  167. DP_RX_DESC_PAGE_ID_SHIFT)
  168. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(_cookie) \
  169. ((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK)
  170. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  171. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  172. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  173. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  174. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  175. #define DP_RX_DESC_COOKIE_MAX \
  176. (RX_DESC_COOKIE_INDEX_MASK | RX_DESC_COOKIE_POOL_ID_MASK)
  177. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  178. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  179. RX_DESC_COOKIE_POOL_ID_SHIFT)
  180. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  181. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  182. RX_DESC_COOKIE_INDEX_SHIFT)
  183. #define dp_rx_add_to_free_desc_list(head, tail, new) \
  184. __dp_rx_add_to_free_desc_list(head, tail, new, __func__)
  185. #define dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  186. num_buffers, desc_list, tail, req_only) \
  187. __dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  188. num_buffers, desc_list, tail, req_only, \
  189. __func__)
  190. #ifdef WLAN_SUPPORT_RX_FISA
  191. /**
  192. * dp_rx_set_hdr_pad() - set l3 padding in nbuf cb
  193. * @nbuf: pkt skb pointer
  194. * @l3_padding: l3 padding
  195. *
  196. * Return: None
  197. */
  198. static inline
  199. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  200. {
  201. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  202. }
  203. #else
  204. static inline
  205. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  206. {
  207. }
  208. #endif
  209. #ifdef DP_RX_SPECIAL_FRAME_NEED
  210. /**
  211. * dp_rx_is_special_frame() - check is RX frame special needed
  212. *
  213. * @nbuf: RX skb pointer
  214. * @frame_mask: the mask for special frame needed
  215. *
  216. * Check is RX frame wanted matched with mask
  217. *
  218. * Return: true - special frame needed, false - no
  219. */
  220. static inline
  221. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  222. {
  223. if (((frame_mask & FRAME_MASK_IPV4_ARP) &&
  224. qdf_nbuf_is_ipv4_arp_pkt(nbuf)) ||
  225. ((frame_mask & FRAME_MASK_IPV4_DHCP) &&
  226. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) ||
  227. ((frame_mask & FRAME_MASK_IPV4_EAPOL) &&
  228. qdf_nbuf_is_ipv4_eapol_pkt(nbuf)) ||
  229. ((frame_mask & FRAME_MASK_IPV6_DHCP) &&
  230. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf)))
  231. return true;
  232. return false;
  233. }
  234. /**
  235. * dp_rx_deliver_special_frame() - Deliver the RX special frame to stack
  236. * if matches mask
  237. *
  238. * @soc: Datapath soc handler
  239. * @peer: pointer to DP peer
  240. * @nbuf: pointer to the skb of RX frame
  241. * @frame_mask: the mask for special frame needed
  242. * @rx_tlv_hdr: start of rx tlv header
  243. *
  244. * note: Msdu_len must have been stored in QDF_NBUF_CB_RX_PKT_LEN(nbuf) and
  245. * single nbuf is expected.
  246. *
  247. * return: true - nbuf has been delivered to stack, false - not.
  248. */
  249. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_txrx_peer *peer,
  250. qdf_nbuf_t nbuf, uint32_t frame_mask,
  251. uint8_t *rx_tlv_hdr);
  252. #else
  253. static inline
  254. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  255. {
  256. return false;
  257. }
  258. static inline
  259. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_txrx_peer *peer,
  260. qdf_nbuf_t nbuf, uint32_t frame_mask,
  261. uint8_t *rx_tlv_hdr)
  262. {
  263. return false;
  264. }
  265. #endif
  266. #ifdef FEATURE_RX_LINKSPEED_ROAM_TRIGGER
  267. /**
  268. * dp_rx_data_is_specific() - Used to exclude specific frames
  269. * not practical for getting rx
  270. * stats like rate, mcs, nss, etc.
  271. *
  272. * @hal-soc_hdl: soc handler
  273. * @rx_tlv_hdr: rx tlv header
  274. * @nbuf: RX skb pointer
  275. *
  276. * Return: true - a specific frame not suitable
  277. * for getting rx stats from it.
  278. * false - a common frame suitable for
  279. * getting rx stats from it.
  280. */
  281. static inline
  282. bool dp_rx_data_is_specific(hal_soc_handle_t hal_soc_hdl,
  283. uint8_t *rx_tlv_hdr,
  284. qdf_nbuf_t nbuf)
  285. {
  286. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf)))
  287. return true;
  288. if (!hal_rx_tlv_first_mpdu_get(hal_soc_hdl, rx_tlv_hdr))
  289. return true;
  290. if (!hal_rx_msdu_end_first_msdu_get(hal_soc_hdl, rx_tlv_hdr))
  291. return true;
  292. /* ARP, EAPOL is neither IPV6 ETH nor IPV4 ETH from L3 level */
  293. if (qdf_likely(hal_rx_tlv_l3_type_get(hal_soc_hdl, rx_tlv_hdr) ==
  294. QDF_NBUF_TRAC_IPV4_ETH_TYPE)) {
  295. if (qdf_nbuf_is_ipv4_dhcp_pkt(nbuf))
  296. return true;
  297. } else if (qdf_likely(hal_rx_tlv_l3_type_get(hal_soc_hdl, rx_tlv_hdr) ==
  298. QDF_NBUF_TRAC_IPV6_ETH_TYPE)) {
  299. if (qdf_nbuf_is_ipv6_dhcp_pkt(nbuf))
  300. return true;
  301. } else {
  302. return true;
  303. }
  304. return false;
  305. }
  306. #else
  307. static inline
  308. bool dp_rx_data_is_specific(hal_soc_handle_t hal_soc_hdl,
  309. uint8_t *rx_tlv_hdr,
  310. qdf_nbuf_t nbuf)
  311. {
  312. /*
  313. * default return is true to make sure that rx stats
  314. * will not be handled when this feature is disabled
  315. */
  316. return true;
  317. }
  318. #endif /* FEATURE_RX_LINKSPEED_ROAM_TRIGGER */
  319. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  320. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  321. static inline
  322. bool dp_rx_check_ndi_mdns_fwding(struct dp_txrx_peer *ta_txrx_peer,
  323. qdf_nbuf_t nbuf)
  324. {
  325. if (ta_txrx_peer->vdev->opmode == wlan_op_mode_ndi &&
  326. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  327. DP_PEER_PER_PKT_STATS_INC(ta_txrx_peer,
  328. rx.intra_bss.mdns_no_fwd, 1);
  329. return false;
  330. }
  331. return true;
  332. }
  333. #else
  334. static inline
  335. bool dp_rx_check_ndi_mdns_fwding(struct dp_txrx_peer *ta_txrx_peer,
  336. qdf_nbuf_t nbuf)
  337. {
  338. return true;
  339. }
  340. #endif
  341. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  342. /* DOC: Offset to obtain LLC hdr
  343. *
  344. * In the case of Wifi parse error
  345. * to reach LLC header from beginning
  346. * of VLAN tag we need to skip 8 bytes.
  347. * Vlan_tag(4)+length(2)+length added
  348. * by HW(2) = 8 bytes.
  349. */
  350. #define DP_SKIP_VLAN 8
  351. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  352. /**
  353. * struct dp_rx_cached_buf - rx cached buffer
  354. * @list: linked list node
  355. * @buf: skb buffer
  356. */
  357. struct dp_rx_cached_buf {
  358. qdf_list_node_t node;
  359. qdf_nbuf_t buf;
  360. };
  361. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  362. /*
  363. *dp_rx_xor_block() - xor block of data
  364. *@b: destination data block
  365. *@a: source data block
  366. *@len: length of the data to process
  367. *
  368. *Returns: None
  369. */
  370. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  371. {
  372. qdf_size_t i;
  373. for (i = 0; i < len; i++)
  374. b[i] ^= a[i];
  375. }
  376. /*
  377. *dp_rx_rotl() - rotate the bits left
  378. *@val: unsigned integer input value
  379. *@bits: number of bits
  380. *
  381. *Returns: Integer with left rotated by number of 'bits'
  382. */
  383. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  384. {
  385. return (val << bits) | (val >> (32 - bits));
  386. }
  387. /*
  388. *dp_rx_rotr() - rotate the bits right
  389. *@val: unsigned integer input value
  390. *@bits: number of bits
  391. *
  392. *Returns: Integer with right rotated by number of 'bits'
  393. */
  394. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  395. {
  396. return (val >> bits) | (val << (32 - bits));
  397. }
  398. /*
  399. * dp_set_rx_queue() - set queue_mapping in skb
  400. * @nbuf: skb
  401. * @queue_id: rx queue_id
  402. *
  403. * Return: void
  404. */
  405. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  406. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  407. {
  408. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  409. return;
  410. }
  411. #else
  412. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  413. {
  414. }
  415. #endif
  416. /*
  417. *dp_rx_xswap() - swap the bits left
  418. *@val: unsigned integer input value
  419. *
  420. *Returns: Integer with bits swapped
  421. */
  422. static inline uint32_t dp_rx_xswap(uint32_t val)
  423. {
  424. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  425. }
  426. /*
  427. *dp_rx_get_le32_split() - get little endian 32 bits split
  428. *@b0: byte 0
  429. *@b1: byte 1
  430. *@b2: byte 2
  431. *@b3: byte 3
  432. *
  433. *Returns: Integer with split little endian 32 bits
  434. */
  435. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  436. uint8_t b3)
  437. {
  438. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  439. }
  440. /*
  441. *dp_rx_get_le32() - get little endian 32 bits
  442. *@b0: byte 0
  443. *@b1: byte 1
  444. *@b2: byte 2
  445. *@b3: byte 3
  446. *
  447. *Returns: Integer with little endian 32 bits
  448. */
  449. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  450. {
  451. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  452. }
  453. /*
  454. * dp_rx_put_le32() - put little endian 32 bits
  455. * @p: destination char array
  456. * @v: source 32-bit integer
  457. *
  458. * Returns: None
  459. */
  460. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  461. {
  462. p[0] = (v) & 0xff;
  463. p[1] = (v >> 8) & 0xff;
  464. p[2] = (v >> 16) & 0xff;
  465. p[3] = (v >> 24) & 0xff;
  466. }
  467. /* Extract michal mic block of data */
  468. #define dp_rx_michael_block(l, r) \
  469. do { \
  470. r ^= dp_rx_rotl(l, 17); \
  471. l += r; \
  472. r ^= dp_rx_xswap(l); \
  473. l += r; \
  474. r ^= dp_rx_rotl(l, 3); \
  475. l += r; \
  476. r ^= dp_rx_rotr(l, 2); \
  477. l += r; \
  478. } while (0)
  479. /**
  480. * struct dp_rx_desc_list_elem_t
  481. *
  482. * @next : Next pointer to form free list
  483. * @rx_desc : DP Rx descriptor
  484. */
  485. union dp_rx_desc_list_elem_t {
  486. union dp_rx_desc_list_elem_t *next;
  487. struct dp_rx_desc rx_desc;
  488. };
  489. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  490. /**
  491. * dp_rx_desc_find() - find dp rx descriptor from page ID and offset
  492. * @page_id: Page ID
  493. * @offset: Offset of the descriptor element
  494. *
  495. * Return: RX descriptor element
  496. */
  497. union dp_rx_desc_list_elem_t *dp_rx_desc_find(uint16_t page_id, uint16_t offset,
  498. struct rx_desc_pool *rx_pool);
  499. static inline
  500. struct dp_rx_desc *dp_get_rx_desc_from_cookie(struct dp_soc *soc,
  501. struct rx_desc_pool *pool,
  502. uint32_t cookie)
  503. {
  504. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  505. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  506. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  507. struct rx_desc_pool *rx_desc_pool;
  508. union dp_rx_desc_list_elem_t *rx_desc_elem;
  509. if (qdf_unlikely(pool_id >= MAX_PDEV_CNT))
  510. return NULL;
  511. rx_desc_pool = &pool[pool_id];
  512. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  513. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  514. rx_desc_pool->elem_size * offset);
  515. return &rx_desc_elem->rx_desc;
  516. }
  517. static inline
  518. struct dp_rx_desc *dp_get_rx_mon_status_desc_from_cookie(struct dp_soc *soc,
  519. struct rx_desc_pool *pool,
  520. uint32_t cookie)
  521. {
  522. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  523. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  524. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  525. struct rx_desc_pool *rx_desc_pool;
  526. union dp_rx_desc_list_elem_t *rx_desc_elem;
  527. if (qdf_unlikely(pool_id >= NUM_RXDMA_RINGS_PER_PDEV))
  528. return NULL;
  529. rx_desc_pool = &pool[pool_id];
  530. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  531. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  532. rx_desc_pool->elem_size * offset);
  533. return &rx_desc_elem->rx_desc;
  534. }
  535. /**
  536. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  537. * the Rx descriptor on Rx DMA source ring buffer
  538. * @soc: core txrx main context
  539. * @cookie: cookie used to lookup virtual address
  540. *
  541. * Return: Pointer to the Rx descriptor
  542. */
  543. static inline
  544. struct dp_rx_desc *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc,
  545. uint32_t cookie)
  546. {
  547. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_buf[0], cookie);
  548. }
  549. /**
  550. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  551. * the Rx descriptor on monitor ring buffer
  552. * @soc: core txrx main context
  553. * @cookie: cookie used to lookup virtual address
  554. *
  555. * Return: Pointer to the Rx descriptor
  556. */
  557. static inline
  558. struct dp_rx_desc *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc,
  559. uint32_t cookie)
  560. {
  561. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_mon[0], cookie);
  562. }
  563. /**
  564. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  565. * the Rx descriptor on monitor status ring buffer
  566. * @soc: core txrx main context
  567. * @cookie: cookie used to lookup virtual address
  568. *
  569. * Return: Pointer to the Rx descriptor
  570. */
  571. static inline
  572. struct dp_rx_desc *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc,
  573. uint32_t cookie)
  574. {
  575. return dp_get_rx_mon_status_desc_from_cookie(soc,
  576. &soc->rx_desc_status[0],
  577. cookie);
  578. }
  579. #else
  580. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  581. uint32_t pool_size,
  582. struct rx_desc_pool *rx_desc_pool);
  583. /**
  584. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  585. * the Rx descriptor on Rx DMA source ring buffer
  586. * @soc: core txrx main context
  587. * @cookie: cookie used to lookup virtual address
  588. *
  589. * Return: void *: Virtual Address of the Rx descriptor
  590. */
  591. static inline
  592. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  593. {
  594. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  595. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  596. struct rx_desc_pool *rx_desc_pool;
  597. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  598. return NULL;
  599. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  600. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  601. return NULL;
  602. return &rx_desc_pool->array[index].rx_desc;
  603. }
  604. /**
  605. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  606. * the Rx descriptor on monitor ring buffer
  607. * @soc: core txrx main context
  608. * @cookie: cookie used to lookup virtual address
  609. *
  610. * Return: void *: Virtual Address of the Rx descriptor
  611. */
  612. static inline
  613. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  614. {
  615. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  616. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  617. /* TODO */
  618. /* Add sanity for pool_id & index */
  619. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  620. }
  621. /**
  622. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  623. * the Rx descriptor on monitor status ring buffer
  624. * @soc: core txrx main context
  625. * @cookie: cookie used to lookup virtual address
  626. *
  627. * Return: void *: Virtual Address of the Rx descriptor
  628. */
  629. static inline
  630. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  631. {
  632. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  633. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  634. /* TODO */
  635. /* Add sanity for pool_id & index */
  636. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  637. }
  638. #endif /* RX_DESC_MULTI_PAGE_ALLOC */
  639. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  640. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  641. {
  642. return vdev->ap_bridge_enabled;
  643. }
  644. #ifdef DP_RX_DESC_COOKIE_INVALIDATE
  645. static inline QDF_STATUS
  646. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  647. {
  648. if (qdf_unlikely(HAL_RX_REO_BUF_COOKIE_INVALID_GET(ring_desc)))
  649. return QDF_STATUS_E_FAILURE;
  650. HAL_RX_REO_BUF_COOKIE_INVALID_SET(ring_desc);
  651. return QDF_STATUS_SUCCESS;
  652. }
  653. /**
  654. * dp_rx_cookie_reset_invalid_bit() - Reset the invalid bit of the cookie
  655. * field in ring descriptor
  656. * @ring_desc: ring descriptor
  657. *
  658. * Return: None
  659. */
  660. static inline void
  661. dp_rx_cookie_reset_invalid_bit(hal_ring_desc_t ring_desc)
  662. {
  663. HAL_RX_REO_BUF_COOKIE_INVALID_RESET(ring_desc);
  664. }
  665. #else
  666. static inline QDF_STATUS
  667. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  668. {
  669. return QDF_STATUS_SUCCESS;
  670. }
  671. static inline void
  672. dp_rx_cookie_reset_invalid_bit(hal_ring_desc_t ring_desc)
  673. {
  674. }
  675. #endif
  676. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  677. #if defined(RX_DESC_MULTI_PAGE_ALLOC) && \
  678. defined(DP_WAR_VALIDATE_RX_ERR_MSDU_COOKIE)
  679. /**
  680. * dp_rx_is_sw_cookie_valid() - check whether SW cookie valid
  681. * @soc: dp soc ref
  682. * @cookie: Rx buf SW cookie value
  683. *
  684. * Return: true if cookie is valid else false
  685. */
  686. static inline bool dp_rx_is_sw_cookie_valid(struct dp_soc *soc,
  687. uint32_t cookie)
  688. {
  689. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  690. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  691. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  692. struct rx_desc_pool *rx_desc_pool;
  693. if (qdf_unlikely(pool_id >= MAX_PDEV_CNT))
  694. goto fail;
  695. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  696. if (page_id >= rx_desc_pool->desc_pages.num_pages ||
  697. offset >= rx_desc_pool->desc_pages.num_element_per_page)
  698. goto fail;
  699. return true;
  700. fail:
  701. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  702. return false;
  703. }
  704. #else
  705. /**
  706. * dp_rx_is_sw_cookie_valid() - check whether SW cookie valid
  707. * @soc: dp soc ref
  708. * @cookie: Rx buf SW cookie value
  709. *
  710. * When multi page alloc is disabled SW cookie validness is
  711. * checked while fetching Rx descriptor, so no need to check here
  712. * Return: true if cookie is valid else false
  713. */
  714. static inline bool dp_rx_is_sw_cookie_valid(struct dp_soc *soc,
  715. uint32_t cookie)
  716. {
  717. return true;
  718. }
  719. #endif
  720. QDF_STATUS dp_rx_desc_pool_is_allocated(struct rx_desc_pool *rx_desc_pool);
  721. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc,
  722. uint32_t pool_size,
  723. struct rx_desc_pool *rx_desc_pool);
  724. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  725. uint32_t pool_size,
  726. struct rx_desc_pool *rx_desc_pool);
  727. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  728. union dp_rx_desc_list_elem_t **local_desc_list,
  729. union dp_rx_desc_list_elem_t **tail,
  730. uint16_t pool_id,
  731. struct rx_desc_pool *rx_desc_pool);
  732. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  733. struct rx_desc_pool *rx_desc_pool,
  734. uint16_t num_descs,
  735. union dp_rx_desc_list_elem_t **desc_list,
  736. union dp_rx_desc_list_elem_t **tail);
  737. QDF_STATUS dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev);
  738. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev);
  739. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev);
  740. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev);
  741. void dp_rx_desc_pool_deinit(struct dp_soc *soc,
  742. struct rx_desc_pool *rx_desc_pool,
  743. uint32_t pool_id);
  744. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  745. QDF_STATUS dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev);
  746. void dp_rx_pdev_buffers_free(struct dp_pdev *pdev);
  747. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  748. void dp_print_napi_stats(struct dp_soc *soc);
  749. /**
  750. * dp_rx_vdev_detach() - detach vdev from dp rx
  751. * @vdev: virtual device instance
  752. *
  753. * Return: QDF_STATUS_SUCCESS: success
  754. * QDF_STATUS_E_RESOURCES: Error return
  755. */
  756. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev);
  757. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  758. uint32_t
  759. dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  760. uint8_t reo_ring_num,
  761. uint32_t quota);
  762. /**
  763. * dp_rx_err_process() - Processes error frames routed to REO error ring
  764. * @int_ctx: pointer to DP interrupt context
  765. * @soc: core txrx main context
  766. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  767. * @quota: No. of units (packets) that can be serviced in one shot.
  768. *
  769. * This function implements error processing and top level demultiplexer
  770. * for all the frames routed to REO error ring.
  771. *
  772. * Return: uint32_t: No. of elements processed
  773. */
  774. uint32_t dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  775. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  776. /**
  777. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  778. * @int_ctx: pointer to DP interrupt context
  779. * @soc: core txrx main context
  780. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  781. * @quota: No. of units (packets) that can be serviced in one shot.
  782. *
  783. * This function implements error processing and top level demultiplexer
  784. * for all the frames routed to WBM2HOST sw release ring.
  785. *
  786. * Return: uint32_t: No. of elements processed
  787. */
  788. uint32_t
  789. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  790. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  791. /**
  792. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  793. * multiple nbufs.
  794. * @soc: core txrx main context
  795. * @nbuf: pointer to the first msdu of an amsdu.
  796. *
  797. * This function implements the creation of RX frag_list for cases
  798. * where an MSDU is spread across multiple nbufs.
  799. *
  800. * Return: returns the head nbuf which contains complete frag_list.
  801. */
  802. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf);
  803. /**
  804. * dp_rx_is_sg_supported() - SG packets processing supported or not.
  805. *
  806. * Return: returns true when processing is supported else false.
  807. */
  808. bool dp_rx_is_sg_supported(void);
  809. /*
  810. * dp_rx_desc_nbuf_and_pool_free() - free the sw rx desc pool called during
  811. * de-initialization of wifi module.
  812. *
  813. * @soc: core txrx main context
  814. * @pool_id: pool_id which is one of 3 mac_ids
  815. * @rx_desc_pool: rx descriptor pool pointer
  816. *
  817. * Return: None
  818. */
  819. void dp_rx_desc_nbuf_and_pool_free(struct dp_soc *soc, uint32_t pool_id,
  820. struct rx_desc_pool *rx_desc_pool);
  821. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  822. /*
  823. * dp_rx_desc_nbuf_free() - free the sw rx desc nbufs called during
  824. * de-initialization of wifi module.
  825. *
  826. * @soc: core txrx main context
  827. * @pool_id: pool_id which is one of 3 mac_ids
  828. * @rx_desc_pool: rx descriptor pool pointer
  829. *
  830. * Return: None
  831. */
  832. void dp_rx_desc_nbuf_free(struct dp_soc *soc,
  833. struct rx_desc_pool *rx_desc_pool,
  834. bool is_mon_pool);
  835. #ifdef DP_RX_MON_MEM_FRAG
  836. /*
  837. * dp_rx_desc_frag_free() - free the sw rx desc frag called during
  838. * de-initialization of wifi module.
  839. *
  840. * @soc: core txrx main context
  841. * @rx_desc_pool: rx descriptor pool pointer
  842. *
  843. * Return: None
  844. */
  845. void dp_rx_desc_frag_free(struct dp_soc *soc,
  846. struct rx_desc_pool *rx_desc_pool);
  847. #else
  848. static inline
  849. void dp_rx_desc_frag_free(struct dp_soc *soc,
  850. struct rx_desc_pool *rx_desc_pool)
  851. {
  852. }
  853. #endif
  854. /*
  855. * dp_rx_desc_pool_free() - free the sw rx desc array called during
  856. * de-initialization of wifi module.
  857. *
  858. * @soc: core txrx main context
  859. * @rx_desc_pool: rx descriptor pool pointer
  860. *
  861. * Return: None
  862. */
  863. void dp_rx_desc_pool_free(struct dp_soc *soc,
  864. struct rx_desc_pool *rx_desc_pool);
  865. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  866. struct dp_txrx_peer *peer);
  867. #ifdef RX_DESC_LOGGING
  868. /*
  869. * dp_rx_desc_alloc_dbg_info() - Alloc memory for rx descriptor debug
  870. * structure
  871. * @rx_desc: rx descriptor pointer
  872. *
  873. * Return: None
  874. */
  875. static inline
  876. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  877. {
  878. rx_desc->dbg_info = qdf_mem_malloc(sizeof(struct dp_rx_desc_dbg_info));
  879. }
  880. /*
  881. * dp_rx_desc_free_dbg_info() - Free rx descriptor debug
  882. * structure memory
  883. * @rx_desc: rx descriptor pointer
  884. *
  885. * Return: None
  886. */
  887. static inline
  888. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  889. {
  890. qdf_mem_free(rx_desc->dbg_info);
  891. }
  892. /*
  893. * dp_rx_desc_update_dbg_info() - Update rx descriptor debug info
  894. * structure memory
  895. * @rx_desc: rx descriptor pointer
  896. *
  897. * Return: None
  898. */
  899. static
  900. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  901. const char *func_name, uint8_t flag)
  902. {
  903. struct dp_rx_desc_dbg_info *info = rx_desc->dbg_info;
  904. if (!info)
  905. return;
  906. if (flag == RX_DESC_REPLENISHED) {
  907. qdf_str_lcopy(info->replenish_caller, func_name,
  908. QDF_MEM_FUNC_NAME_SIZE);
  909. info->replenish_ts = qdf_get_log_timestamp();
  910. } else {
  911. qdf_str_lcopy(info->freelist_caller, func_name,
  912. QDF_MEM_FUNC_NAME_SIZE);
  913. info->freelist_ts = qdf_get_log_timestamp();
  914. info->prev_nbuf = rx_desc->nbuf;
  915. info->prev_nbuf_data_addr = rx_desc->nbuf_data_addr;
  916. rx_desc->nbuf_data_addr = NULL;
  917. }
  918. }
  919. #else
  920. static inline
  921. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  922. {
  923. }
  924. static inline
  925. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  926. {
  927. }
  928. static inline
  929. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  930. const char *func_name, uint8_t flag)
  931. {
  932. }
  933. #endif /* RX_DESC_LOGGING */
  934. /**
  935. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  936. *
  937. * @head: pointer to the head of local free list
  938. * @tail: pointer to the tail of local free list
  939. * @new: new descriptor that is added to the free list
  940. * @func_name: caller func name
  941. *
  942. * Return: void:
  943. */
  944. static inline
  945. void __dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  946. union dp_rx_desc_list_elem_t **tail,
  947. struct dp_rx_desc *new, const char *func_name)
  948. {
  949. qdf_assert(head && new);
  950. dp_rx_desc_update_dbg_info(new, func_name, RX_DESC_IN_FREELIST);
  951. new->nbuf = NULL;
  952. new->in_use = 0;
  953. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  954. *head = (union dp_rx_desc_list_elem_t *)new;
  955. /* reset tail if head->next is NULL */
  956. if (!*tail || !(*head)->next)
  957. *tail = *head;
  958. }
  959. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  960. uint8_t mac_id);
  961. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  962. qdf_nbuf_t mpdu, bool mpdu_done, uint8_t mac_id);
  963. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  964. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer);
  965. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  966. uint16_t peer_id, uint8_t tid);
  967. #define DP_RX_HEAD_APPEND(head, elem) \
  968. do { \
  969. qdf_nbuf_set_next((elem), (head)); \
  970. (head) = (elem); \
  971. } while (0)
  972. #define DP_RX_LIST_APPEND(head, tail, elem) \
  973. do { \
  974. if (!(head)) { \
  975. (head) = (elem); \
  976. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head) = 1;\
  977. } else { \
  978. qdf_nbuf_set_next((tail), (elem)); \
  979. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head)++; \
  980. } \
  981. (tail) = (elem); \
  982. qdf_nbuf_set_next((tail), NULL); \
  983. } while (0)
  984. #define DP_RX_MERGE_TWO_LIST(phead, ptail, chead, ctail) \
  985. do { \
  986. if (!(phead)) { \
  987. (phead) = (chead); \
  988. } else { \
  989. qdf_nbuf_set_next((ptail), (chead)); \
  990. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(phead) += \
  991. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(chead); \
  992. } \
  993. (ptail) = (ctail); \
  994. qdf_nbuf_set_next((ptail), NULL); \
  995. } while (0)
  996. #if defined(QCA_PADDR_CHECK_ON_3TH_PLATFORM)
  997. /*
  998. * on some third-party platform, the memory below 0x2000
  999. * is reserved for target use, so any memory allocated in this
  1000. * region should not be used by host
  1001. */
  1002. #define MAX_RETRY 50
  1003. #define DP_PHY_ADDR_RESERVED 0x2000
  1004. #elif defined(BUILD_X86)
  1005. /*
  1006. * in M2M emulation platforms (x86) the memory below 0x50000000
  1007. * is reserved for target use, so any memory allocated in this
  1008. * region should not be used by host
  1009. */
  1010. #define MAX_RETRY 100
  1011. #define DP_PHY_ADDR_RESERVED 0x50000000
  1012. #endif
  1013. #if defined(QCA_PADDR_CHECK_ON_3TH_PLATFORM) || defined(BUILD_X86)
  1014. /**
  1015. * dp_check_paddr() - check if current phy address is valid or not
  1016. * @dp_soc: core txrx main context
  1017. * @rx_netbuf: skb buffer
  1018. * @paddr: physical address
  1019. * @rx_desc_pool: struct of rx descriptor pool
  1020. * check if the physical address of the nbuf->data is less
  1021. * than DP_PHY_ADDR_RESERVED then free the nbuf and try
  1022. * allocating new nbuf. We can try for 100 times.
  1023. *
  1024. * This is a temp WAR till we fix it properly.
  1025. *
  1026. * Return: success or failure.
  1027. */
  1028. static inline
  1029. int dp_check_paddr(struct dp_soc *dp_soc,
  1030. qdf_nbuf_t *rx_netbuf,
  1031. qdf_dma_addr_t *paddr,
  1032. struct rx_desc_pool *rx_desc_pool)
  1033. {
  1034. uint32_t nbuf_retry = 0;
  1035. int32_t ret;
  1036. if (qdf_likely(*paddr > DP_PHY_ADDR_RESERVED))
  1037. return QDF_STATUS_SUCCESS;
  1038. do {
  1039. dp_debug("invalid phy addr 0x%llx, trying again",
  1040. (uint64_t)(*paddr));
  1041. nbuf_retry++;
  1042. if ((*rx_netbuf)) {
  1043. /* Not freeing buffer intentionally.
  1044. * Observed that same buffer is getting
  1045. * re-allocated resulting in longer load time
  1046. * WMI init timeout.
  1047. * This buffer is anyway not useful so skip it.
  1048. *.Add such buffer to invalid list and free
  1049. *.them when driver unload.
  1050. **/
  1051. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  1052. *rx_netbuf,
  1053. QDF_DMA_FROM_DEVICE,
  1054. rx_desc_pool->buf_size);
  1055. qdf_nbuf_queue_add(&dp_soc->invalid_buf_queue,
  1056. *rx_netbuf);
  1057. }
  1058. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  1059. rx_desc_pool->buf_size,
  1060. RX_BUFFER_RESERVATION,
  1061. rx_desc_pool->buf_alignment,
  1062. FALSE);
  1063. if (qdf_unlikely(!(*rx_netbuf)))
  1064. return QDF_STATUS_E_FAILURE;
  1065. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  1066. *rx_netbuf,
  1067. QDF_DMA_FROM_DEVICE,
  1068. rx_desc_pool->buf_size);
  1069. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  1070. qdf_nbuf_free(*rx_netbuf);
  1071. *rx_netbuf = NULL;
  1072. continue;
  1073. }
  1074. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  1075. if (qdf_likely(*paddr > DP_PHY_ADDR_RESERVED))
  1076. return QDF_STATUS_SUCCESS;
  1077. } while (nbuf_retry < MAX_RETRY);
  1078. if ((*rx_netbuf)) {
  1079. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  1080. *rx_netbuf,
  1081. QDF_DMA_FROM_DEVICE,
  1082. rx_desc_pool->buf_size);
  1083. qdf_nbuf_queue_add(&dp_soc->invalid_buf_queue,
  1084. *rx_netbuf);
  1085. }
  1086. return QDF_STATUS_E_FAILURE;
  1087. }
  1088. #else
  1089. static inline
  1090. int dp_check_paddr(struct dp_soc *dp_soc,
  1091. qdf_nbuf_t *rx_netbuf,
  1092. qdf_dma_addr_t *paddr,
  1093. struct rx_desc_pool *rx_desc_pool)
  1094. {
  1095. return QDF_STATUS_SUCCESS;
  1096. }
  1097. #endif
  1098. /**
  1099. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  1100. * the MSDU Link Descriptor
  1101. * @soc: core txrx main context
  1102. * @buf_info: buf_info includes cookie that is used to lookup
  1103. * virtual address of link descriptor after deriving the page id
  1104. * and the offset or index of the desc on the associatde page.
  1105. *
  1106. * This is the VA of the link descriptor, that HAL layer later uses to
  1107. * retrieve the list of MSDU's for a given MPDU.
  1108. *
  1109. * Return: void *: Virtual Address of the Rx descriptor
  1110. */
  1111. static inline
  1112. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  1113. struct hal_buf_info *buf_info)
  1114. {
  1115. void *link_desc_va;
  1116. struct qdf_mem_multi_page_t *pages;
  1117. uint16_t page_id = LINK_DESC_COOKIE_PAGE_ID(buf_info->sw_cookie);
  1118. pages = &soc->link_desc_pages;
  1119. if (!pages)
  1120. return NULL;
  1121. if (qdf_unlikely(page_id >= pages->num_pages))
  1122. return NULL;
  1123. link_desc_va = pages->dma_pages[page_id].page_v_addr_start +
  1124. (buf_info->paddr - pages->dma_pages[page_id].page_p_addr);
  1125. return link_desc_va;
  1126. }
  1127. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1128. #ifdef DISABLE_EAPOL_INTRABSS_FWD
  1129. #ifdef WLAN_FEATURE_11BE_MLO
  1130. static inline bool dp_nbuf_dst_addr_is_mld_addr(struct dp_vdev *vdev,
  1131. qdf_nbuf_t nbuf)
  1132. {
  1133. struct qdf_mac_addr *self_mld_mac_addr =
  1134. (struct qdf_mac_addr *)vdev->mld_mac_addr.raw;
  1135. return qdf_is_macaddr_equal(self_mld_mac_addr,
  1136. (struct qdf_mac_addr *)qdf_nbuf_data(nbuf) +
  1137. QDF_NBUF_DEST_MAC_OFFSET);
  1138. }
  1139. #else
  1140. static inline bool dp_nbuf_dst_addr_is_mld_addr(struct dp_vdev *vdev,
  1141. qdf_nbuf_t nbuf)
  1142. {
  1143. return false;
  1144. }
  1145. #endif
  1146. static inline bool dp_nbuf_dst_addr_is_self_addr(struct dp_vdev *vdev,
  1147. qdf_nbuf_t nbuf)
  1148. {
  1149. return qdf_is_macaddr_equal((struct qdf_mac_addr *)vdev->mac_addr.raw,
  1150. (struct qdf_mac_addr *)qdf_nbuf_data(nbuf) +
  1151. QDF_NBUF_DEST_MAC_OFFSET);
  1152. }
  1153. /*
  1154. * dp_rx_intrabss_eapol_drop_check() - API For EAPOL
  1155. * pkt with DA not equal to vdev mac addr, fwd is not allowed.
  1156. * @soc: core txrx main context
  1157. * @ta_txrx_peer: source peer entry
  1158. * @rx_tlv_hdr: start address of rx tlvs
  1159. * @nbuf: nbuf that has to be intrabss forwarded
  1160. *
  1161. * Return: true if it is forwarded else false
  1162. */
  1163. static inline
  1164. bool dp_rx_intrabss_eapol_drop_check(struct dp_soc *soc,
  1165. struct dp_txrx_peer *ta_txrx_peer,
  1166. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf)
  1167. {
  1168. if (qdf_unlikely(qdf_nbuf_is_ipv4_eapol_pkt(nbuf) &&
  1169. !(dp_nbuf_dst_addr_is_self_addr(ta_txrx_peer->vdev,
  1170. nbuf) ||
  1171. dp_nbuf_dst_addr_is_mld_addr(ta_txrx_peer->vdev,
  1172. nbuf)))) {
  1173. qdf_nbuf_free(nbuf);
  1174. DP_STATS_INC(soc, rx.err.intrabss_eapol_drop, 1);
  1175. return true;
  1176. }
  1177. return false;
  1178. }
  1179. #else /* DISABLE_EAPOL_INTRABSS_FWD */
  1180. static inline
  1181. bool dp_rx_intrabss_eapol_drop_check(struct dp_soc *soc,
  1182. struct dp_txrx_peer *ta_txrx_peer,
  1183. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf)
  1184. {
  1185. return false;
  1186. }
  1187. #endif /* DISABLE_EAPOL_INTRABSS_FWD */
  1188. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc,
  1189. struct dp_txrx_peer *ta_txrx_peer,
  1190. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1191. struct cdp_tid_rx_stats *tid_stats);
  1192. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc,
  1193. struct dp_txrx_peer *ta_txrx_peer,
  1194. uint8_t tx_vdev_id,
  1195. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1196. struct cdp_tid_rx_stats *tid_stats);
  1197. /**
  1198. * dp_rx_defrag_concat() - Concatenate the fragments
  1199. *
  1200. * @dst: destination pointer to the buffer
  1201. * @src: source pointer from where the fragment payload is to be copied
  1202. *
  1203. * Return: QDF_STATUS
  1204. */
  1205. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  1206. {
  1207. /*
  1208. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  1209. * to provide space for src, the headroom portion is copied from
  1210. * the original dst buffer to the larger new dst buffer.
  1211. * (This is needed, because the headroom of the dst buffer
  1212. * contains the rx desc.)
  1213. */
  1214. if (!qdf_nbuf_cat(dst, src)) {
  1215. /*
  1216. * qdf_nbuf_cat does not free the src memory.
  1217. * Free src nbuf before returning
  1218. * For failure case the caller takes of freeing the nbuf
  1219. */
  1220. qdf_nbuf_free(src);
  1221. return QDF_STATUS_SUCCESS;
  1222. }
  1223. return QDF_STATUS_E_DEFRAG_ERROR;
  1224. }
  1225. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1226. #ifndef FEATURE_WDS
  1227. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  1228. struct dp_txrx_peer *ta_txrx_peer, qdf_nbuf_t nbuf);
  1229. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  1230. {
  1231. return QDF_STATUS_SUCCESS;
  1232. }
  1233. static inline void
  1234. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  1235. uint8_t *rx_tlv_hdr,
  1236. struct dp_txrx_peer *txrx_peer,
  1237. qdf_nbuf_t nbuf,
  1238. struct hal_rx_msdu_metadata msdu_metadata)
  1239. {
  1240. }
  1241. static inline void
  1242. dp_rx_ipa_wds_srcport_learn(struct dp_soc *soc,
  1243. struct dp_peer *ta_peer, qdf_nbuf_t nbuf,
  1244. struct hal_rx_msdu_metadata msdu_end_info,
  1245. bool ad4_valid, bool chfrag_start)
  1246. {
  1247. }
  1248. #endif
  1249. /*
  1250. * dp_rx_desc_dump() - dump the sw rx descriptor
  1251. *
  1252. * @rx_desc: sw rx descriptor
  1253. */
  1254. static inline void dp_rx_desc_dump(struct dp_rx_desc *rx_desc)
  1255. {
  1256. dp_info("rx_desc->nbuf: %pK, rx_desc->cookie: %d, rx_desc->pool_id: %d, rx_desc->in_use: %d, rx_desc->unmapped: %d",
  1257. rx_desc->nbuf, rx_desc->cookie, rx_desc->pool_id,
  1258. rx_desc->in_use, rx_desc->unmapped);
  1259. }
  1260. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1261. /*
  1262. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  1263. * In qwrap mode, packets originated from
  1264. * any vdev should not loopback and
  1265. * should be dropped.
  1266. * @vdev: vdev on which rx packet is received
  1267. * @nbuf: rx pkt
  1268. *
  1269. */
  1270. #if ATH_SUPPORT_WRAP
  1271. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  1272. qdf_nbuf_t nbuf)
  1273. {
  1274. struct dp_vdev *psta_vdev;
  1275. struct dp_pdev *pdev = vdev->pdev;
  1276. uint8_t *data = qdf_nbuf_data(nbuf);
  1277. if (qdf_unlikely(vdev->proxysta_vdev)) {
  1278. /* In qwrap isolation mode, allow loopback packets as all
  1279. * packets go to RootAP and Loopback on the mpsta.
  1280. */
  1281. if (vdev->isolation_vdev)
  1282. return false;
  1283. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  1284. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  1285. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  1286. &data[QDF_MAC_ADDR_SIZE],
  1287. QDF_MAC_ADDR_SIZE))) {
  1288. /* Drop packet if source address is equal to
  1289. * any of the vdev addresses.
  1290. */
  1291. return true;
  1292. }
  1293. }
  1294. }
  1295. return false;
  1296. }
  1297. #else
  1298. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  1299. qdf_nbuf_t nbuf)
  1300. {
  1301. return false;
  1302. }
  1303. #endif
  1304. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1305. #if defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) ||\
  1306. defined(WLAN_SUPPORT_RX_TAG_STATISTICS) ||\
  1307. defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1308. #include "dp_rx_tag.h"
  1309. #endif
  1310. #if !defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) &&\
  1311. !defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1312. /**
  1313. * dp_rx_update_protocol_tag() - Reads CCE metadata from the RX MSDU end TLV
  1314. * and set the corresponding tag in QDF packet
  1315. * @soc: core txrx main context
  1316. * @vdev: vdev on which the packet is received
  1317. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1318. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1319. * @ring_index: REO ring number, not used for error & monitor ring
  1320. * @is_reo_exception: flag to indicate if rx from REO ring or exception ring
  1321. * @is_update_stats: flag to indicate whether to update stats or not
  1322. * Return: void
  1323. */
  1324. static inline void
  1325. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1326. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  1327. uint16_t ring_index,
  1328. bool is_reo_exception, bool is_update_stats)
  1329. {
  1330. }
  1331. #endif
  1332. #ifndef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  1333. /**
  1334. * dp_rx_err_cce_drop() - Reads CCE metadata from the RX MSDU end TLV
  1335. * and returns whether cce metadata matches
  1336. * @soc: core txrx main context
  1337. * @vdev: vdev on which the packet is received
  1338. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1339. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1340. * Return: bool
  1341. */
  1342. static inline bool
  1343. dp_rx_err_cce_drop(struct dp_soc *soc, struct dp_vdev *vdev,
  1344. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  1345. {
  1346. return false;
  1347. }
  1348. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  1349. #ifndef WLAN_SUPPORT_RX_FLOW_TAG
  1350. /**
  1351. * dp_rx_update_flow_tag() - Reads FSE metadata from the RX MSDU end TLV
  1352. * and set the corresponding tag in QDF packet
  1353. * @soc: core txrx main context
  1354. * @vdev: vdev on which the packet is received
  1355. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1356. * @rx_tlv_hdr: base address where the RX TLVs starts
  1357. * @is_update_stats: flag to indicate whether to update stats or not
  1358. *
  1359. * Return: void
  1360. */
  1361. static inline void
  1362. dp_rx_update_flow_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1363. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr, bool update_stats)
  1364. {
  1365. }
  1366. #endif /* WLAN_SUPPORT_RX_FLOW_TAG */
  1367. #define CRITICAL_BUFFER_THRESHOLD 64
  1368. /*
  1369. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  1370. * called during dp rx initialization
  1371. * and at the end of dp_rx_process.
  1372. *
  1373. * @soc: core txrx main context
  1374. * @mac_id: mac_id which is one of 3 mac_ids
  1375. * @dp_rxdma_srng: dp rxdma circular ring
  1376. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1377. * @num_req_buffers: number of buffer to be replenished
  1378. * @desc_list: list of descs if called from dp_rx_process
  1379. * or NULL during dp rx initialization or out of buffer
  1380. * interrupt.
  1381. * @tail: tail of descs list
  1382. * @req_only: If true don't replenish more than req buffers
  1383. * @func_name: name of the caller function
  1384. * Return: return success or failure
  1385. */
  1386. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1387. struct dp_srng *dp_rxdma_srng,
  1388. struct rx_desc_pool *rx_desc_pool,
  1389. uint32_t num_req_buffers,
  1390. union dp_rx_desc_list_elem_t **desc_list,
  1391. union dp_rx_desc_list_elem_t **tail,
  1392. bool req_only,
  1393. const char *func_name);
  1394. /*
  1395. * __dp_rx_buffers_no_map_replenish() - replenish rxdma ring with rx nbufs
  1396. * use direct APIs to get invalidate
  1397. * and get the physical address of the
  1398. * nbuf instead of map api,called during
  1399. * dp rx initialization and at the end
  1400. * of dp_rx_process.
  1401. *
  1402. * @soc: core txrx main context
  1403. * @mac_id: mac_id which is one of 3 mac_ids
  1404. * @dp_rxdma_srng: dp rxdma circular ring
  1405. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1406. * @num_req_buffers: number of buffer to be replenished
  1407. * @desc_list: list of descs if called from dp_rx_process
  1408. * or NULL during dp rx initialization or out of buffer
  1409. * interrupt.
  1410. * @tail: tail of descs list
  1411. * Return: return success or failure
  1412. */
  1413. QDF_STATUS
  1414. __dp_rx_buffers_no_map_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1415. struct dp_srng *dp_rxdma_srng,
  1416. struct rx_desc_pool *rx_desc_pool,
  1417. uint32_t num_req_buffers,
  1418. union dp_rx_desc_list_elem_t **desc_list,
  1419. union dp_rx_desc_list_elem_t **tail);
  1420. /*
  1421. * __dp_rx_buffers_no_map__lt_replenish() - replenish rxdma ring with rx nbufs
  1422. * use direct APIs to get invalidate
  1423. * and get the physical address of the
  1424. * nbuf instead of map api,called when
  1425. * low threshold interrupt is triggered
  1426. *
  1427. * @soc: core txrx main context
  1428. * @mac_id: mac_id which is one of 3 mac_ids
  1429. * @dp_rxdma_srng: dp rxdma circular ring
  1430. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1431. * Return: return success or failure
  1432. */
  1433. QDF_STATUS
  1434. __dp_rx_buffers_no_map_lt_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1435. struct dp_srng *dp_rxdma_srng,
  1436. struct rx_desc_pool *rx_desc_pool);
  1437. /*
  1438. * __dp_pdev_rx_buffers_no_map_attach() - replenish rxdma ring with rx nbufs
  1439. * use direct APIs to get invalidate
  1440. * and get the physical address of the
  1441. * nbuf instead of map api,called during
  1442. * dp rx initialization.
  1443. *
  1444. * @soc: core txrx main context
  1445. * @mac_id: mac_id which is one of 3 mac_ids
  1446. * @dp_rxdma_srng: dp rxdma circular ring
  1447. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1448. * @num_req_buffers: number of buffer to be replenished
  1449. * Return: return success or failure
  1450. */
  1451. QDF_STATUS __dp_pdev_rx_buffers_no_map_attach(struct dp_soc *dp_soc,
  1452. uint32_t mac_id,
  1453. struct dp_srng *dp_rxdma_srng,
  1454. struct rx_desc_pool *rx_desc_pool,
  1455. uint32_t num_req_buffers);
  1456. /*
  1457. * dp_pdev_rx_buffers_attach() - replenish rxdma ring with rx nbufs
  1458. * called during dp rx initialization
  1459. *
  1460. * @soc: core txrx main context
  1461. * @mac_id: mac_id which is one of 3 mac_ids
  1462. * @dp_rxdma_srng: dp rxdma circular ring
  1463. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1464. * @num_req_buffers: number of buffer to be replenished
  1465. *
  1466. * Return: return success or failure
  1467. */
  1468. QDF_STATUS
  1469. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1470. struct dp_srng *dp_rxdma_srng,
  1471. struct rx_desc_pool *rx_desc_pool,
  1472. uint32_t num_req_buffers);
  1473. /**
  1474. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  1475. * (WBM), following error handling
  1476. *
  1477. * @soc: core DP main context
  1478. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  1479. * @buf_addr_info: void pointer to the buffer_addr_info
  1480. * @bm_action: put to idle_list or release to msdu_list
  1481. *
  1482. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1483. */
  1484. QDF_STATUS
  1485. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  1486. uint8_t bm_action);
  1487. /**
  1488. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  1489. * (WBM) by address
  1490. *
  1491. * @soc: core DP main context
  1492. * @link_desc_addr: link descriptor addr
  1493. *
  1494. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1495. */
  1496. QDF_STATUS
  1497. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  1498. hal_buff_addrinfo_t link_desc_addr,
  1499. uint8_t bm_action);
  1500. /**
  1501. * dp_rxdma_err_process() - RxDMA error processing functionality
  1502. * @soc: core txrx main context
  1503. * @mac_id: mac id which is one of 3 mac_ids
  1504. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1505. * @quota: No. of units (packets) that can be serviced in one shot.
  1506. *
  1507. * Return: num of buffers processed
  1508. */
  1509. uint32_t
  1510. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1511. uint32_t mac_id, uint32_t quota);
  1512. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1513. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer);
  1514. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1515. uint8_t *rx_tlv_hdr);
  1516. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  1517. struct dp_txrx_peer *peer);
  1518. /*
  1519. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  1520. *
  1521. * @soc: core txrx main context
  1522. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1523. * @ring_desc: opaque pointer to the RX ring descriptor
  1524. * @rx_desc: host rx descriptor
  1525. *
  1526. * Return: void
  1527. */
  1528. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  1529. hal_ring_handle_t hal_ring_hdl,
  1530. hal_ring_desc_t ring_desc,
  1531. struct dp_rx_desc *rx_desc);
  1532. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  1533. #ifdef QCA_PEER_EXT_STATS
  1534. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1535. qdf_nbuf_t nbuf);
  1536. #endif /* QCA_PEER_EXT_STATS */
  1537. #ifdef RX_DESC_DEBUG_CHECK
  1538. /**
  1539. * dp_rx_desc_check_magic() - check the magic value in dp_rx_desc
  1540. * @rx_desc: rx descriptor pointer
  1541. *
  1542. * Return: true, if magic is correct, else false.
  1543. */
  1544. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1545. {
  1546. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC))
  1547. return false;
  1548. rx_desc->magic = 0;
  1549. return true;
  1550. }
  1551. /**
  1552. * dp_rx_desc_prep() - prepare rx desc
  1553. * @rx_desc: rx descriptor pointer to be prepared
  1554. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1555. *
  1556. * Note: assumption is that we are associating a nbuf which is mapped
  1557. *
  1558. * Return: none
  1559. */
  1560. static inline
  1561. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1562. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1563. {
  1564. rx_desc->magic = DP_RX_DESC_MAGIC;
  1565. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1566. rx_desc->unmapped = 0;
  1567. rx_desc->nbuf_data_addr = (uint8_t *)qdf_nbuf_data(rx_desc->nbuf);
  1568. }
  1569. /**
  1570. * dp_rx_desc_frag_prep() - prepare rx desc
  1571. * @rx_desc: rx descriptor pointer to be prepared
  1572. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1573. *
  1574. * Note: assumption is that we frag address is mapped
  1575. *
  1576. * Return: none
  1577. */
  1578. #ifdef DP_RX_MON_MEM_FRAG
  1579. static inline
  1580. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1581. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1582. {
  1583. rx_desc->magic = DP_RX_DESC_MAGIC;
  1584. rx_desc->rx_buf_start =
  1585. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1586. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1587. rx_desc->unmapped = 0;
  1588. }
  1589. #else
  1590. static inline
  1591. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1592. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1593. {
  1594. }
  1595. #endif /* DP_RX_MON_MEM_FRAG */
  1596. /**
  1597. * dp_rx_desc_paddr_sanity_check() - paddr sanity for ring desc vs rx_desc
  1598. * @rx_desc: rx descriptor
  1599. * @ring_paddr: paddr obatined from the ring
  1600. *
  1601. * Returns: QDF_STATUS
  1602. */
  1603. static inline
  1604. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  1605. uint64_t ring_paddr)
  1606. {
  1607. return (ring_paddr == qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1608. }
  1609. #else
  1610. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1611. {
  1612. return true;
  1613. }
  1614. static inline
  1615. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1616. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1617. {
  1618. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1619. rx_desc->unmapped = 0;
  1620. }
  1621. #ifdef DP_RX_MON_MEM_FRAG
  1622. static inline
  1623. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1624. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1625. {
  1626. rx_desc->rx_buf_start =
  1627. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1628. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1629. rx_desc->unmapped = 0;
  1630. }
  1631. #else
  1632. static inline
  1633. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1634. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1635. {
  1636. }
  1637. #endif /* DP_RX_MON_MEM_FRAG */
  1638. static inline
  1639. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  1640. uint64_t ring_paddr)
  1641. {
  1642. return true;
  1643. }
  1644. #endif /* RX_DESC_DEBUG_CHECK */
  1645. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  1646. bool is_mon_dest_desc);
  1647. void dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1648. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer,
  1649. uint8_t err_code, uint8_t mac_id);
  1650. #ifndef QCA_MULTIPASS_SUPPORT
  1651. static inline
  1652. bool dp_rx_multipass_process(struct dp_txrx_peer *peer, qdf_nbuf_t nbuf,
  1653. uint8_t tid)
  1654. {
  1655. return false;
  1656. }
  1657. #else
  1658. bool dp_rx_multipass_process(struct dp_txrx_peer *peer, qdf_nbuf_t nbuf,
  1659. uint8_t tid);
  1660. #endif
  1661. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1662. #ifndef WLAN_RX_PKT_CAPTURE_ENH
  1663. static inline
  1664. QDF_STATUS dp_peer_set_rx_capture_enabled(struct dp_pdev *pdev,
  1665. struct dp_peer *peer_handle,
  1666. bool value, uint8_t *mac_addr)
  1667. {
  1668. return QDF_STATUS_SUCCESS;
  1669. }
  1670. #endif
  1671. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1672. /**
  1673. * dp_rx_deliver_to_stack() - deliver pkts to network stack
  1674. * Caller to hold peer refcount and check for valid peer
  1675. * @soc: soc
  1676. * @vdev: vdev
  1677. * @txrx_peer: txrx peer
  1678. * @nbuf_head: skb list head
  1679. * @nbuf_tail: skb list tail
  1680. *
  1681. * Return: QDF_STATUS
  1682. */
  1683. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  1684. struct dp_vdev *vdev,
  1685. struct dp_txrx_peer *peer,
  1686. qdf_nbuf_t nbuf_head,
  1687. qdf_nbuf_t nbuf_tail);
  1688. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  1689. /**
  1690. * dp_rx_eapol_deliver_to_stack() - deliver pkts to network stack
  1691. * caller to hold peer refcount and check for valid peer
  1692. * @soc: soc
  1693. * @vdev: vdev
  1694. * @peer: peer
  1695. * @nbuf_head: skb list head
  1696. * @nbuf_tail: skb list tail
  1697. *
  1698. * return: QDF_STATUS
  1699. */
  1700. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  1701. struct dp_vdev *vdev,
  1702. struct dp_txrx_peer *peer,
  1703. qdf_nbuf_t nbuf_head,
  1704. qdf_nbuf_t nbuf_tail);
  1705. #endif
  1706. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1707. #ifdef QCA_OL_RX_LOCK_LESS_ACCESS
  1708. /*
  1709. * dp_rx_ring_access_start()- Wrapper function to log access start of a hal ring
  1710. * @int_ctx: pointer to DP interrupt context
  1711. * @dp_soc - DP soc structure pointer
  1712. * @hal_ring_hdl - HAL ring handle
  1713. *
  1714. * Return: 0 on success; error on failure
  1715. */
  1716. static inline int
  1717. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1718. hal_ring_handle_t hal_ring_hdl)
  1719. {
  1720. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  1721. }
  1722. /*
  1723. * dp_rx_ring_access_end()- Wrapper function to log access end of a hal ring
  1724. * @int_ctx: pointer to DP interrupt context
  1725. * @dp_soc - DP soc structure pointer
  1726. * @hal_ring_hdl - HAL ring handle
  1727. *
  1728. * Return - None
  1729. */
  1730. static inline void
  1731. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1732. hal_ring_handle_t hal_ring_hdl)
  1733. {
  1734. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  1735. }
  1736. #else
  1737. static inline int
  1738. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1739. hal_ring_handle_t hal_ring_hdl)
  1740. {
  1741. return dp_srng_access_start(int_ctx, soc, hal_ring_hdl);
  1742. }
  1743. static inline void
  1744. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1745. hal_ring_handle_t hal_ring_hdl)
  1746. {
  1747. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1748. }
  1749. #endif
  1750. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1751. /*
  1752. * dp_rx_wbm_sg_list_reset() - Initialize sg list
  1753. *
  1754. * This api should be called at soc init and afterevery sg processing.
  1755. *@soc: DP SOC handle
  1756. */
  1757. static inline void dp_rx_wbm_sg_list_reset(struct dp_soc *soc)
  1758. {
  1759. if (soc) {
  1760. soc->wbm_sg_param.wbm_is_first_msdu_in_sg = false;
  1761. soc->wbm_sg_param.wbm_sg_nbuf_head = NULL;
  1762. soc->wbm_sg_param.wbm_sg_nbuf_tail = NULL;
  1763. soc->wbm_sg_param.wbm_sg_desc_msdu_len = 0;
  1764. }
  1765. }
  1766. /*
  1767. * dp_rx_wbm_sg_list_deinit() - De-initialize sg list
  1768. *
  1769. * This api should be called in down path, to avoid any leak.
  1770. *@soc: DP SOC handle
  1771. */
  1772. static inline void dp_rx_wbm_sg_list_deinit(struct dp_soc *soc)
  1773. {
  1774. if (soc) {
  1775. if (soc->wbm_sg_param.wbm_sg_nbuf_head)
  1776. qdf_nbuf_list_free(soc->wbm_sg_param.wbm_sg_nbuf_head);
  1777. dp_rx_wbm_sg_list_reset(soc);
  1778. }
  1779. }
  1780. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1781. #ifdef WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL
  1782. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1783. do { \
  1784. if (!soc->rx_buff_pool[rx_desc->pool_id].is_initialized) { \
  1785. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf); \
  1786. break; \
  1787. } \
  1788. DP_RX_LIST_APPEND(ebuf_head, ebuf_tail, rx_desc->nbuf); \
  1789. if (!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)) { \
  1790. if (!dp_rx_buffer_pool_refill(soc, ebuf_head, \
  1791. rx_desc->pool_id)) \
  1792. DP_RX_MERGE_TWO_LIST(head, tail, \
  1793. ebuf_head, ebuf_tail);\
  1794. ebuf_head = NULL; \
  1795. ebuf_tail = NULL; \
  1796. } \
  1797. } while (0)
  1798. #else
  1799. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1800. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf)
  1801. #endif /* WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL */
  1802. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1803. /*
  1804. * dp_rx_link_desc_refill_duplicate_check() - check if link desc duplicate
  1805. to refill
  1806. * @soc: DP SOC handle
  1807. * @buf_info: the last link desc buf info
  1808. * @ring_buf_info: current buf address pointor including link desc
  1809. *
  1810. * return: none.
  1811. */
  1812. void dp_rx_link_desc_refill_duplicate_check(
  1813. struct dp_soc *soc,
  1814. struct hal_buf_info *buf_info,
  1815. hal_buff_addrinfo_t ring_buf_info);
  1816. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  1817. /**
  1818. * dp_rx_deliver_to_pkt_capture() - deliver rx packet to packet capture
  1819. * @soc : dp_soc handle
  1820. * @pdev: dp_pdev handle
  1821. * @peer_id: peer_id of the peer for which completion came
  1822. * @ppdu_id: ppdu_id
  1823. * @netbuf: Buffer pointer
  1824. *
  1825. * This function is used to deliver rx packet to packet capture
  1826. */
  1827. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  1828. uint16_t peer_id, uint32_t is_offload,
  1829. qdf_nbuf_t netbuf);
  1830. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1831. uint32_t is_offload);
  1832. #else
  1833. static inline void
  1834. dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  1835. uint16_t peer_id, uint32_t is_offload,
  1836. qdf_nbuf_t netbuf)
  1837. {
  1838. }
  1839. static inline void
  1840. dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1841. uint32_t is_offload)
  1842. {
  1843. }
  1844. #endif
  1845. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1846. #ifdef FEATURE_MEC
  1847. /**
  1848. * dp_rx_mcast_echo_check() - check if the mcast pkt is a loop
  1849. * back on same vap or a different vap.
  1850. * @soc: core DP main context
  1851. * @peer: dp peer handler
  1852. * @rx_tlv_hdr: start of the rx TLV header
  1853. * @nbuf: pkt buffer
  1854. *
  1855. * Return: bool (true if it is a looped back pkt else false)
  1856. *
  1857. */
  1858. bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  1859. struct dp_txrx_peer *peer,
  1860. uint8_t *rx_tlv_hdr,
  1861. qdf_nbuf_t nbuf);
  1862. #else
  1863. static inline bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  1864. struct dp_txrx_peer *peer,
  1865. uint8_t *rx_tlv_hdr,
  1866. qdf_nbuf_t nbuf)
  1867. {
  1868. return false;
  1869. }
  1870. #endif /* FEATURE_MEC */
  1871. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1872. #ifdef RECEIVE_OFFLOAD
  1873. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1874. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt);
  1875. #else
  1876. static inline
  1877. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1878. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1879. {
  1880. }
  1881. #endif
  1882. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1883. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer,
  1884. uint8_t ring_id,
  1885. struct cdp_tid_rx_stats *tid_stats);
  1886. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1887. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1888. hal_ring_handle_t hal_ring_hdl,
  1889. uint32_t num_entries,
  1890. bool *near_full);
  1891. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1892. void dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1893. hal_ring_desc_t ring_desc);
  1894. #else
  1895. static inline void
  1896. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1897. hal_ring_desc_t ring_desc)
  1898. {
  1899. }
  1900. #endif
  1901. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1902. #ifdef RX_DESC_SANITY_WAR
  1903. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  1904. hal_ring_handle_t hal_ring_hdl,
  1905. hal_ring_desc_t ring_desc,
  1906. struct dp_rx_desc *rx_desc);
  1907. #else
  1908. static inline
  1909. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  1910. hal_ring_handle_t hal_ring_hdl,
  1911. hal_ring_desc_t ring_desc,
  1912. struct dp_rx_desc *rx_desc)
  1913. {
  1914. return QDF_STATUS_SUCCESS;
  1915. }
  1916. #endif
  1917. #ifdef DP_RX_DROP_RAW_FRM
  1918. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf);
  1919. #else
  1920. static inline
  1921. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1922. {
  1923. return false;
  1924. }
  1925. #endif
  1926. #ifdef RX_DESC_DEBUG_CHECK
  1927. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1928. hal_ring_desc_t ring_desc,
  1929. struct dp_rx_desc *rx_desc);
  1930. #else
  1931. static inline
  1932. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1933. hal_ring_desc_t ring_desc,
  1934. struct dp_rx_desc *rx_desc)
  1935. {
  1936. return QDF_STATUS_SUCCESS;
  1937. }
  1938. #endif
  1939. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1940. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1941. #else
  1942. static inline
  1943. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1944. {
  1945. }
  1946. #endif
  1947. /**
  1948. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1949. * @nbuf: pointer to the first msdu of an amsdu.
  1950. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1951. *
  1952. * The ipsumed field of the skb is set based on whether HW validated the
  1953. * IP/TCP/UDP checksum.
  1954. *
  1955. * Return: void
  1956. */
  1957. #if defined(MAX_PDEV_CNT) && (MAX_PDEV_CNT == 1)
  1958. static inline
  1959. void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1960. qdf_nbuf_t nbuf,
  1961. uint8_t *rx_tlv_hdr)
  1962. {
  1963. qdf_nbuf_rx_cksum_t cksum = {0};
  1964. //TODO - Move this to ring desc api
  1965. //HAL_RX_MSDU_DESC_IP_CHKSUM_FAIL_GET
  1966. //HAL_RX_MSDU_DESC_TCP_UDP_CHKSUM_FAIL_GET
  1967. uint32_t ip_csum_err, tcp_udp_csum_er;
  1968. hal_rx_tlv_csum_err_get(pdev->soc->hal_soc, rx_tlv_hdr, &ip_csum_err,
  1969. &tcp_udp_csum_er);
  1970. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1971. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1972. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1973. } else {
  1974. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1975. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1976. }
  1977. }
  1978. #else
  1979. static inline
  1980. void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1981. qdf_nbuf_t nbuf,
  1982. uint8_t *rx_tlv_hdr)
  1983. {
  1984. }
  1985. #endif
  1986. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1987. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1988. static inline
  1989. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  1990. int max_reap_limit)
  1991. {
  1992. bool limit_hit = false;
  1993. limit_hit =
  1994. (num_reaped >= max_reap_limit) ? true : false;
  1995. if (limit_hit)
  1996. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1997. return limit_hit;
  1998. }
  1999. static inline
  2000. bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  2001. {
  2002. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  2003. }
  2004. static inline int dp_rx_get_loop_pkt_limit(struct dp_soc *soc)
  2005. {
  2006. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  2007. return cfg->rx_reap_loop_pkt_limit;
  2008. }
  2009. #else
  2010. static inline
  2011. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  2012. int max_reap_limit)
  2013. {
  2014. return false;
  2015. }
  2016. static inline
  2017. bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  2018. {
  2019. return false;
  2020. }
  2021. static inline int dp_rx_get_loop_pkt_limit(struct dp_soc *soc)
  2022. {
  2023. return 0;
  2024. }
  2025. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  2026. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf);
  2027. #ifdef QCA_SUPPORT_WDS_EXTENDED
  2028. /**
  2029. * dp_rx_is_list_ready() - Make different lists for 4-address
  2030. and 3-address frames
  2031. * @nbuf_head: skb list head
  2032. * @vdev: vdev
  2033. * @txrx_peer : txrx_peer
  2034. * @peer_id: peer id of new received frame
  2035. * @vdev_id: vdev_id of new received frame
  2036. *
  2037. * Return: true if peer_ids are different.
  2038. */
  2039. static inline bool
  2040. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  2041. struct dp_vdev *vdev,
  2042. struct dp_txrx_peer *txrx_peer,
  2043. uint16_t peer_id,
  2044. uint8_t vdev_id)
  2045. {
  2046. if (nbuf_head && txrx_peer && txrx_peer->peer_id != peer_id)
  2047. return true;
  2048. return false;
  2049. }
  2050. #else
  2051. static inline bool
  2052. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  2053. struct dp_vdev *vdev,
  2054. struct dp_txrx_peer *txrx_peer,
  2055. uint16_t peer_id,
  2056. uint8_t vdev_id)
  2057. {
  2058. if (nbuf_head && vdev && (vdev->vdev_id != vdev_id))
  2059. return true;
  2060. return false;
  2061. }
  2062. #endif
  2063. #ifdef WLAN_FEATURE_MARK_FIRST_WAKEUP_PACKET
  2064. /**
  2065. * dp_rx_mark_first_packet_after_wow_wakeup - get first packet after wow wakeup
  2066. * @pdev: pointer to dp_pdev structure
  2067. * @rx_tlv: pointer to rx_pkt_tlvs structure
  2068. * @nbuf: pointer to skb buffer
  2069. *
  2070. * Return: None
  2071. */
  2072. void dp_rx_mark_first_packet_after_wow_wakeup(struct dp_pdev *pdev,
  2073. uint8_t *rx_tlv,
  2074. qdf_nbuf_t nbuf);
  2075. #else
  2076. static inline void
  2077. dp_rx_mark_first_packet_after_wow_wakeup(struct dp_pdev *pdev,
  2078. uint8_t *rx_tlv,
  2079. qdf_nbuf_t nbuf)
  2080. {
  2081. }
  2082. #endif
  2083. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  2084. static inline uint8_t
  2085. dp_rx_get_defrag_bm_id(struct dp_soc *soc)
  2086. {
  2087. return DP_DEFRAG_RBM(soc->wbm_sw0_bm_id);
  2088. }
  2089. static inline uint8_t
  2090. dp_rx_get_rx_bm_id(struct dp_soc *soc)
  2091. {
  2092. return DP_WBM2SW_RBM(soc->wbm_sw0_bm_id);
  2093. }
  2094. #else
  2095. static inline uint8_t
  2096. dp_rx_get_rx_bm_id(struct dp_soc *soc)
  2097. {
  2098. struct wlan_cfg_dp_soc_ctxt *cfg_ctx = soc->wlan_cfg_ctx;
  2099. uint8_t wbm2_sw_rx_rel_ring_id;
  2100. wbm2_sw_rx_rel_ring_id = wlan_cfg_get_rx_rel_ring_id(cfg_ctx);
  2101. return HAL_RX_BUF_RBM_SW_BM(soc->wbm_sw0_bm_id,
  2102. wbm2_sw_rx_rel_ring_id);
  2103. }
  2104. static inline uint8_t
  2105. dp_rx_get_defrag_bm_id(struct dp_soc *soc)
  2106. {
  2107. return dp_rx_get_rx_bm_id(soc);
  2108. }
  2109. #endif
  2110. static inline uint16_t
  2111. dp_rx_peer_metadata_peer_id_get(struct dp_soc *soc, uint32_t peer_metadata)
  2112. {
  2113. return soc->arch_ops.dp_rx_peer_metadata_peer_id_get(soc,
  2114. peer_metadata);
  2115. }
  2116. /**
  2117. * dp_rx_desc_pool_init_generic() - Generic Rx descriptors initialization
  2118. * @soc: SOC handle
  2119. * @rx_desc_pool: pointer to RX descriptor pool
  2120. * @pool_id: pool ID
  2121. *
  2122. * Return: None
  2123. */
  2124. QDF_STATUS dp_rx_desc_pool_init_generic(struct dp_soc *soc,
  2125. struct rx_desc_pool *rx_desc_pool,
  2126. uint32_t pool_id);
  2127. void dp_rx_desc_pool_deinit_generic(struct dp_soc *soc,
  2128. struct rx_desc_pool *rx_desc_pool,
  2129. uint32_t pool_id);
  2130. /**
  2131. * dp_rx_pkt_tracepoints_enabled() - Get the state of rx pkt tracepoint
  2132. *
  2133. * Return: True if any rx pkt tracepoint is enabled else false
  2134. */
  2135. static inline
  2136. bool dp_rx_pkt_tracepoints_enabled(void)
  2137. {
  2138. return (qdf_trace_dp_rx_tcp_pkt_enabled() ||
  2139. qdf_trace_dp_rx_udp_pkt_enabled() ||
  2140. qdf_trace_dp_rx_pkt_enabled());
  2141. }
  2142. #ifdef FEATURE_DIRECT_LINK
  2143. /**
  2144. * dp_audio_smmu_map()- Map memory region into Audio SMMU CB
  2145. * @qdf_dev: pointer to QDF device structure
  2146. * @paddr: physical address
  2147. * @iova: DMA address
  2148. * @size: memory region size
  2149. *
  2150. * Return: 0 on success else failure code
  2151. */
  2152. static inline
  2153. int dp_audio_smmu_map(qdf_device_t qdf_dev, qdf_dma_addr_t paddr,
  2154. qdf_dma_addr_t iova, qdf_size_t size)
  2155. {
  2156. return pld_audio_smmu_map(qdf_dev->dev, paddr, iova, size);
  2157. }
  2158. /**
  2159. * dp_audio_smmu_unmap()- Remove memory region mapping from Audio SMMU CB
  2160. * @qdf_dev: pointer to QDF device structure
  2161. * @iova: DMA address
  2162. * @size: memory region size
  2163. *
  2164. * Return: None
  2165. */
  2166. static inline
  2167. void dp_audio_smmu_unmap(qdf_device_t qdf_dev, qdf_dma_addr_t iova,
  2168. qdf_size_t size)
  2169. {
  2170. pld_audio_smmu_unmap(qdf_dev->dev, iova, size);
  2171. }
  2172. #else
  2173. static inline
  2174. int dp_audio_smmu_map(qdf_device_t qdf_dev, qdf_dma_addr_t paddr,
  2175. qdf_dma_addr_t iova, qdf_size_t size)
  2176. {
  2177. return 0;
  2178. }
  2179. static inline
  2180. void dp_audio_smmu_unmap(qdf_device_t qdf_dev, qdf_dma_addr_t iova,
  2181. qdf_size_t size)
  2182. {
  2183. }
  2184. #endif
  2185. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  2186. static inline
  2187. QDF_STATUS dp_pdev_rx_buffers_attach_simple(struct dp_soc *soc, uint32_t mac_id,
  2188. struct dp_srng *rxdma_srng,
  2189. struct rx_desc_pool *rx_desc_pool,
  2190. uint32_t num_req_buffers)
  2191. {
  2192. return __dp_pdev_rx_buffers_no_map_attach(soc, mac_id,
  2193. rxdma_srng,
  2194. rx_desc_pool,
  2195. num_req_buffers);
  2196. }
  2197. static inline
  2198. void dp_rx_buffers_replenish_simple(struct dp_soc *soc, uint32_t mac_id,
  2199. struct dp_srng *rxdma_srng,
  2200. struct rx_desc_pool *rx_desc_pool,
  2201. uint32_t num_req_buffers,
  2202. union dp_rx_desc_list_elem_t **desc_list,
  2203. union dp_rx_desc_list_elem_t **tail)
  2204. {
  2205. __dp_rx_buffers_no_map_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  2206. num_req_buffers, desc_list, tail);
  2207. }
  2208. static inline
  2209. void dp_rx_buffers_lt_replenish_simple(struct dp_soc *soc, uint32_t mac_id,
  2210. struct dp_srng *rxdma_srng,
  2211. struct rx_desc_pool *rx_desc_pool,
  2212. uint32_t num_req_buffers,
  2213. union dp_rx_desc_list_elem_t **desc_list,
  2214. union dp_rx_desc_list_elem_t **tail)
  2215. {
  2216. __dp_rx_buffers_no_map_lt_replenish(soc, mac_id, rxdma_srng,
  2217. rx_desc_pool);
  2218. }
  2219. #ifndef QCA_DP_NBUF_FAST_RECYCLE_CHECK
  2220. static inline
  2221. qdf_dma_addr_t dp_rx_nbuf_sync_no_dsb(struct dp_soc *dp_soc,
  2222. qdf_nbuf_t nbuf,
  2223. uint32_t buf_size)
  2224. {
  2225. qdf_nbuf_dma_inv_range_no_dsb((void *)nbuf->data,
  2226. (void *)(nbuf->data + buf_size));
  2227. return (qdf_dma_addr_t)qdf_mem_virt_to_phys(nbuf->data);
  2228. }
  2229. #else
  2230. #define L3_HEADER_PAD 2
  2231. static inline
  2232. qdf_dma_addr_t dp_rx_nbuf_sync_no_dsb(struct dp_soc *dp_soc,
  2233. qdf_nbuf_t nbuf,
  2234. uint32_t buf_size)
  2235. {
  2236. if (nbuf->recycled_for_ds) {
  2237. nbuf->recycled_for_ds = 0;
  2238. return (qdf_dma_addr_t)qdf_mem_virt_to_phys(nbuf->data);
  2239. }
  2240. if (unlikely(!nbuf->fast_recycled)) {
  2241. qdf_nbuf_dma_inv_range_no_dsb((void *)nbuf->data,
  2242. (void *)(nbuf->data + buf_size));
  2243. } else {
  2244. /*
  2245. * In case of fast_recycled is set we can avoid invalidating
  2246. * the complete buffer as it would have been invalidated
  2247. * by tx driver before giving to recycler.
  2248. *
  2249. * But we need to still invalidate rx_pkt_tlv_size as this
  2250. * area will not be invalidated in TX path
  2251. */
  2252. DP_STATS_INC(dp_soc, rx.fast_recycled, 1);
  2253. qdf_nbuf_dma_inv_range_no_dsb((void *)nbuf->data,
  2254. (void *)(nbuf->data +
  2255. dp_soc->rx_pkt_tlv_size +
  2256. L3_HEADER_PAD));
  2257. }
  2258. nbuf->fast_recycled = 0;
  2259. return (qdf_dma_addr_t)qdf_mem_virt_to_phys(nbuf->data);
  2260. }
  2261. #endif
  2262. static inline
  2263. qdf_dma_addr_t dp_rx_nbuf_sync(struct dp_soc *dp_soc,
  2264. qdf_nbuf_t nbuf,
  2265. uint32_t buf_size)
  2266. {
  2267. qdf_nbuf_dma_inv_range((void *)nbuf->data,
  2268. (void *)(nbuf->data + buf_size));
  2269. return (qdf_dma_addr_t)qdf_mem_virt_to_phys(nbuf->data);
  2270. }
  2271. #if !defined(SPECULATIVE_READ_DISABLED)
  2272. static inline
  2273. void dp_rx_nbuf_unmap(struct dp_soc *soc,
  2274. struct dp_rx_desc *rx_desc,
  2275. uint8_t reo_ring_num)
  2276. {
  2277. struct rx_desc_pool *rx_desc_pool;
  2278. qdf_nbuf_t nbuf;
  2279. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2280. nbuf = rx_desc->nbuf;
  2281. qdf_nbuf_dma_inv_range_no_dsb((void *)nbuf->data,
  2282. (void *)(nbuf->data + rx_desc_pool->buf_size));
  2283. }
  2284. static inline
  2285. void dp_rx_nbuf_unmap_pool(struct dp_soc *soc,
  2286. struct rx_desc_pool *rx_desc_pool,
  2287. qdf_nbuf_t nbuf)
  2288. {
  2289. qdf_nbuf_dma_inv_range((void *)nbuf->data,
  2290. (void *)(nbuf->data + rx_desc_pool->buf_size));
  2291. }
  2292. #else
  2293. static inline
  2294. void dp_rx_nbuf_unmap(struct dp_soc *soc,
  2295. struct dp_rx_desc *rx_desc,
  2296. uint8_t reo_ring_num)
  2297. {
  2298. }
  2299. static inline
  2300. void dp_rx_nbuf_unmap_pool(struct dp_soc *soc,
  2301. struct rx_desc_pool *rx_desc_pool,
  2302. qdf_nbuf_t nbuf)
  2303. {
  2304. }
  2305. #endif
  2306. static inline
  2307. void dp_rx_per_core_stats_update(struct dp_soc *soc, uint8_t ring_id,
  2308. uint32_t bufs_reaped)
  2309. {
  2310. }
  2311. static inline
  2312. qdf_nbuf_t dp_rx_nbuf_alloc(struct dp_soc *soc,
  2313. struct rx_desc_pool *rx_desc_pool)
  2314. {
  2315. return qdf_nbuf_alloc_simple(soc->osdev, rx_desc_pool->buf_size,
  2316. RX_BUFFER_RESERVATION,
  2317. rx_desc_pool->buf_alignment, FALSE);
  2318. }
  2319. static inline
  2320. void dp_rx_nbuf_free(qdf_nbuf_t nbuf)
  2321. {
  2322. qdf_nbuf_free_simple(nbuf);
  2323. }
  2324. #else
  2325. static inline
  2326. QDF_STATUS dp_pdev_rx_buffers_attach_simple(struct dp_soc *soc, uint32_t mac_id,
  2327. struct dp_srng *rxdma_srng,
  2328. struct rx_desc_pool *rx_desc_pool,
  2329. uint32_t num_req_buffers)
  2330. {
  2331. return dp_pdev_rx_buffers_attach(soc, mac_id,
  2332. rxdma_srng,
  2333. rx_desc_pool,
  2334. num_req_buffers);
  2335. }
  2336. static inline
  2337. void dp_rx_buffers_replenish_simple(struct dp_soc *soc, uint32_t mac_id,
  2338. struct dp_srng *rxdma_srng,
  2339. struct rx_desc_pool *rx_desc_pool,
  2340. uint32_t num_req_buffers,
  2341. union dp_rx_desc_list_elem_t **desc_list,
  2342. union dp_rx_desc_list_elem_t **tail)
  2343. {
  2344. dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  2345. num_req_buffers, desc_list, tail, false);
  2346. }
  2347. static inline
  2348. void dp_rx_buffers_lt_replenish_simple(struct dp_soc *soc, uint32_t mac_id,
  2349. struct dp_srng *rxdma_srng,
  2350. struct rx_desc_pool *rx_desc_pool,
  2351. uint32_t num_req_buffers,
  2352. union dp_rx_desc_list_elem_t **desc_list,
  2353. union dp_rx_desc_list_elem_t **tail)
  2354. {
  2355. dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  2356. num_req_buffers, desc_list, tail, false);
  2357. }
  2358. static inline
  2359. qdf_dma_addr_t dp_rx_nbuf_sync_no_dsb(struct dp_soc *dp_soc,
  2360. qdf_nbuf_t nbuf,
  2361. uint32_t buf_size)
  2362. {
  2363. return (qdf_dma_addr_t)NULL;
  2364. }
  2365. static inline
  2366. qdf_dma_addr_t dp_rx_nbuf_sync(struct dp_soc *dp_soc,
  2367. qdf_nbuf_t nbuf,
  2368. uint32_t buf_size)
  2369. {
  2370. return (qdf_dma_addr_t)NULL;
  2371. }
  2372. static inline
  2373. void dp_rx_nbuf_unmap(struct dp_soc *soc,
  2374. struct dp_rx_desc *rx_desc,
  2375. uint8_t reo_ring_num)
  2376. {
  2377. struct rx_desc_pool *rx_desc_pool;
  2378. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2379. dp_ipa_reo_ctx_buf_mapping_lock(soc, reo_ring_num);
  2380. dp_audio_smmu_unmap(soc->osdev,
  2381. QDF_NBUF_CB_PADDR(rx_desc->nbuf),
  2382. rx_desc_pool->buf_size);
  2383. dp_ipa_handle_rx_buf_smmu_mapping(soc, rx_desc->nbuf,
  2384. rx_desc_pool->buf_size,
  2385. false, __func__, __LINE__);
  2386. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  2387. QDF_DMA_FROM_DEVICE,
  2388. rx_desc_pool->buf_size);
  2389. dp_ipa_reo_ctx_buf_mapping_unlock(soc, reo_ring_num);
  2390. }
  2391. static inline
  2392. void dp_rx_nbuf_unmap_pool(struct dp_soc *soc,
  2393. struct rx_desc_pool *rx_desc_pool,
  2394. qdf_nbuf_t nbuf)
  2395. {
  2396. dp_audio_smmu_unmap(soc->osdev, QDF_NBUF_CB_PADDR(nbuf),
  2397. rx_desc_pool->buf_size);
  2398. dp_ipa_handle_rx_buf_smmu_mapping(soc, nbuf, rx_desc_pool->buf_size,
  2399. false, __func__, __LINE__);
  2400. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf, QDF_DMA_FROM_DEVICE,
  2401. rx_desc_pool->buf_size);
  2402. }
  2403. static inline
  2404. void dp_rx_per_core_stats_update(struct dp_soc *soc, uint8_t ring_id,
  2405. uint32_t bufs_reaped)
  2406. {
  2407. int cpu_id = qdf_get_cpu();
  2408. DP_STATS_INC(soc, rx.ring_packets[cpu_id][ring_id], bufs_reaped);
  2409. }
  2410. static inline
  2411. qdf_nbuf_t dp_rx_nbuf_alloc(struct dp_soc *soc,
  2412. struct rx_desc_pool *rx_desc_pool)
  2413. {
  2414. return qdf_nbuf_alloc(soc->osdev, rx_desc_pool->buf_size,
  2415. RX_BUFFER_RESERVATION,
  2416. rx_desc_pool->buf_alignment, FALSE);
  2417. }
  2418. static inline
  2419. void dp_rx_nbuf_free(qdf_nbuf_t nbuf)
  2420. {
  2421. qdf_nbuf_free(nbuf);
  2422. }
  2423. #endif
  2424. #ifdef DP_UMAC_HW_RESET_SUPPORT
  2425. /*
  2426. * dp_rx_desc_reuse() - Reuse the rx descriptors to fill the rx buf ring
  2427. *
  2428. * @soc: core txrx main context
  2429. * @nbuf_list: nbuf list for delayed free
  2430. *
  2431. * Return: void
  2432. */
  2433. void dp_rx_desc_reuse(struct dp_soc *soc, qdf_nbuf_t *nbuf_list);
  2434. /*
  2435. * dp_rx_desc_delayed_free() - Delayed free of the rx descs
  2436. *
  2437. * @soc: core txrx main context
  2438. *
  2439. * Return: void
  2440. */
  2441. void dp_rx_desc_delayed_free(struct dp_soc *soc);
  2442. #endif
  2443. /**
  2444. * dp_rx_get_txrx_peer_and_vdev() - Get txrx peer and vdev from peer id
  2445. * @nbuf : pointer to the first msdu of an amsdu.
  2446. * @peer_id : Peer id of the peer
  2447. * @txrx_ref_handle : Buffer to save the handle for txrx peer's reference
  2448. * @pkt_capture_offload : Flag indicating if pkt capture offload is needed
  2449. * @vdev : Buffer to hold pointer to vdev
  2450. * @rx_pdev : Buffer to hold pointer to rx pdev
  2451. * @dsf : delay stats flag
  2452. * @old_tid : Old tid
  2453. *
  2454. * Get txrx peer and vdev from peer id
  2455. *
  2456. * Return: Pointer to txrx peer
  2457. */
  2458. static inline struct dp_txrx_peer *
  2459. dp_rx_get_txrx_peer_and_vdev(struct dp_soc *soc,
  2460. qdf_nbuf_t nbuf,
  2461. uint16_t peer_id,
  2462. dp_txrx_ref_handle *txrx_ref_handle,
  2463. bool pkt_capture_offload,
  2464. struct dp_vdev **vdev,
  2465. struct dp_pdev **rx_pdev,
  2466. uint32_t *dsf,
  2467. uint32_t *old_tid)
  2468. {
  2469. struct dp_txrx_peer *txrx_peer = NULL;
  2470. txrx_peer = dp_txrx_peer_get_ref_by_id(soc, peer_id, txrx_ref_handle,
  2471. DP_MOD_ID_RX);
  2472. if (qdf_likely(txrx_peer)) {
  2473. *vdev = txrx_peer->vdev;
  2474. } else {
  2475. nbuf->next = NULL;
  2476. dp_rx_deliver_to_pkt_capture_no_peer(soc, nbuf,
  2477. pkt_capture_offload);
  2478. if (!pkt_capture_offload)
  2479. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2480. goto end;
  2481. }
  2482. if (qdf_unlikely(!(*vdev))) {
  2483. qdf_nbuf_free(nbuf);
  2484. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  2485. goto end;
  2486. }
  2487. *rx_pdev = (*vdev)->pdev;
  2488. *dsf = (*rx_pdev)->delay_stats_flag;
  2489. *old_tid = 0xff;
  2490. end:
  2491. return txrx_peer;
  2492. }
  2493. static inline QDF_STATUS
  2494. dp_peer_rx_reorder_queue_setup(struct dp_soc *soc, struct dp_peer *peer,
  2495. int tid, uint32_t ba_window_size)
  2496. {
  2497. return soc->arch_ops.dp_peer_rx_reorder_queue_setup(soc,
  2498. peer, tid,
  2499. ba_window_size);
  2500. }
  2501. static inline
  2502. void dp_rx_nbuf_list_deliver(struct dp_soc *soc,
  2503. struct dp_vdev *vdev,
  2504. struct dp_txrx_peer *txrx_peer,
  2505. uint16_t peer_id,
  2506. uint8_t pkt_capture_offload,
  2507. qdf_nbuf_t deliver_list_head,
  2508. qdf_nbuf_t deliver_list_tail)
  2509. {
  2510. qdf_nbuf_t nbuf, next;
  2511. if (qdf_likely(deliver_list_head)) {
  2512. if (qdf_likely(txrx_peer)) {
  2513. dp_rx_deliver_to_pkt_capture(soc, vdev->pdev, peer_id,
  2514. pkt_capture_offload,
  2515. deliver_list_head);
  2516. if (!pkt_capture_offload)
  2517. dp_rx_deliver_to_stack(soc, vdev, txrx_peer,
  2518. deliver_list_head,
  2519. deliver_list_tail);
  2520. } else {
  2521. nbuf = deliver_list_head;
  2522. while (nbuf) {
  2523. next = nbuf->next;
  2524. nbuf->next = NULL;
  2525. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2526. nbuf = next;
  2527. }
  2528. }
  2529. }
  2530. }
  2531. #ifdef DP_TX_RX_TPUT_SIMULATE
  2532. /*
  2533. * Change this macro value to simulate different RX T-put,
  2534. * if OTA is 100 Mbps, to simulate 200 Mbps, then multiplication factor
  2535. * is 2, set macro value as 1 (multiplication factor - 1).
  2536. */
  2537. #define DP_RX_PKTS_DUPLICATE_CNT 0
  2538. static inline
  2539. void dp_rx_nbuf_list_dup_deliver(struct dp_soc *soc,
  2540. struct dp_vdev *vdev,
  2541. struct dp_txrx_peer *txrx_peer,
  2542. uint16_t peer_id,
  2543. uint8_t pkt_capture_offload,
  2544. qdf_nbuf_t ori_list_head,
  2545. qdf_nbuf_t ori_list_tail)
  2546. {
  2547. qdf_nbuf_t new_skb = NULL;
  2548. qdf_nbuf_t new_list_head = NULL;
  2549. qdf_nbuf_t new_list_tail = NULL;
  2550. qdf_nbuf_t nbuf = NULL;
  2551. int i;
  2552. for (i = 0; i < DP_RX_PKTS_DUPLICATE_CNT; i++) {
  2553. nbuf = ori_list_head;
  2554. new_list_head = NULL;
  2555. new_list_tail = NULL;
  2556. while (nbuf) {
  2557. new_skb = qdf_nbuf_copy(nbuf);
  2558. if (qdf_likely(new_skb))
  2559. DP_RX_LIST_APPEND(new_list_head,
  2560. new_list_tail,
  2561. new_skb);
  2562. else
  2563. dp_err("copy skb failed");
  2564. nbuf = qdf_nbuf_next(nbuf);
  2565. }
  2566. /* deliver the copied nbuf list */
  2567. dp_rx_nbuf_list_deliver(soc, vdev, txrx_peer, peer_id,
  2568. pkt_capture_offload,
  2569. new_list_head,
  2570. new_list_tail);
  2571. }
  2572. /* deliver the original skb_list */
  2573. dp_rx_nbuf_list_deliver(soc, vdev, txrx_peer, peer_id,
  2574. pkt_capture_offload,
  2575. ori_list_head,
  2576. ori_list_tail);
  2577. }
  2578. #define DP_RX_DELIVER_TO_STACK dp_rx_nbuf_list_dup_deliver
  2579. #else /* !DP_TX_RX_TPUT_SIMULATE */
  2580. #define DP_RX_DELIVER_TO_STACK dp_rx_nbuf_list_deliver
  2581. #endif /* DP_TX_RX_TPUT_SIMULATE */
  2582. #endif /* _DP_RX_H */