kona.c 172 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/input.h>
  14. #include <linux/of_device.h>
  15. #include <linux/soc/qcom/fsa4480-i2c.h>
  16. #include <sound/core.h>
  17. #include <sound/soc.h>
  18. #include <sound/soc-dapm.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/info.h>
  22. #include <soc/snd_event.h>
  23. #include <dsp/audio_notifier.h>
  24. #include <soc/swr-common.h>
  25. #include <dsp/q6afe-v2.h>
  26. #include <dsp/q6core.h>
  27. #include "device_event.h"
  28. #include "msm-pcm-routing-v2.h"
  29. #include "asoc/msm-cdc-pinctrl.h"
  30. #include "asoc/wcd-mbhc-v2.h"
  31. #include "codecs/wcd938x/wcd938x-mbhc.h"
  32. #include "codecs/wsa881x.h"
  33. #include "codecs/wcd938x/wcd938x.h"
  34. #include "codecs/bolero/bolero-cdc.h"
  35. #include <dt-bindings/sound/audio-codec-port-types.h>
  36. #include "codecs/bolero/wsa-macro.h"
  37. #include "sm8250-port-config.h"
  38. #define DRV_NAME "kona-asoc-snd"
  39. #define __CHIPSET__ "KONA "
  40. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  41. #define SAMPLING_RATE_8KHZ 8000
  42. #define SAMPLING_RATE_11P025KHZ 11025
  43. #define SAMPLING_RATE_16KHZ 16000
  44. #define SAMPLING_RATE_22P05KHZ 22050
  45. #define SAMPLING_RATE_32KHZ 32000
  46. #define SAMPLING_RATE_44P1KHZ 44100
  47. #define SAMPLING_RATE_48KHZ 48000
  48. #define SAMPLING_RATE_88P2KHZ 88200
  49. #define SAMPLING_RATE_96KHZ 96000
  50. #define SAMPLING_RATE_176P4KHZ 176400
  51. #define SAMPLING_RATE_192KHZ 192000
  52. #define SAMPLING_RATE_352P8KHZ 352800
  53. #define SAMPLING_RATE_384KHZ 384000
  54. #define WCD9XXX_MBHC_DEF_RLOADS 5
  55. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  56. #define CODEC_EXT_CLK_RATE 9600000
  57. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  58. #define DEV_NAME_STR_LEN 32
  59. #define WCD_MBHC_HS_V_MAX 1600
  60. #define TDM_CHANNEL_MAX 8
  61. #define DEV_NAME_STR_LEN 32
  62. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  63. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  64. #define WSA8810_NAME_1 "wsa881x.20170211"
  65. #define WSA8810_NAME_2 "wsa881x.20170212"
  66. #define WCN_CDC_SLIM_RX_CH_MAX 2
  67. #define WCN_CDC_SLIM_TX_CH_MAX 2
  68. enum {
  69. TDM_0 = 0,
  70. TDM_1,
  71. TDM_2,
  72. TDM_3,
  73. TDM_4,
  74. TDM_5,
  75. TDM_6,
  76. TDM_7,
  77. TDM_PORT_MAX,
  78. };
  79. enum {
  80. TDM_PRI = 0,
  81. TDM_SEC,
  82. TDM_TERT,
  83. TDM_INTERFACE_MAX,
  84. };
  85. enum {
  86. PRIM_AUX_PCM = 0,
  87. SEC_AUX_PCM,
  88. TERT_AUX_PCM,
  89. AUX_PCM_MAX,
  90. };
  91. enum {
  92. PRIM_MI2S = 0,
  93. SEC_MI2S,
  94. TERT_MI2S,
  95. MI2S_MAX,
  96. };
  97. enum {
  98. WSA_CDC_DMA_RX_0 = 0,
  99. WSA_CDC_DMA_RX_1,
  100. RX_CDC_DMA_RX_0,
  101. RX_CDC_DMA_RX_1,
  102. RX_CDC_DMA_RX_2,
  103. RX_CDC_DMA_RX_3,
  104. RX_CDC_DMA_RX_5,
  105. CDC_DMA_RX_MAX,
  106. };
  107. enum {
  108. WSA_CDC_DMA_TX_0 = 0,
  109. WSA_CDC_DMA_TX_1,
  110. WSA_CDC_DMA_TX_2,
  111. TX_CDC_DMA_TX_0,
  112. TX_CDC_DMA_TX_3,
  113. TX_CDC_DMA_TX_4,
  114. VA_CDC_DMA_TX_0,
  115. VA_CDC_DMA_TX_1,
  116. VA_CDC_DMA_TX_2,
  117. CDC_DMA_TX_MAX,
  118. };
  119. struct msm_asoc_mach_data {
  120. struct snd_info_entry *codec_root;
  121. int usbc_en2_gpio; /* used by gpio driver API */
  122. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  123. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  124. struct device_node *dmic45_gpio_p; /* used by pinctrl API */
  125. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  126. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  127. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  128. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  129. bool is_afe_config_done;
  130. struct device_node *fsa_handle;
  131. };
  132. struct tdm_port {
  133. u32 mode;
  134. u32 channel;
  135. };
  136. enum {
  137. EXT_DISP_RX_IDX_DP = 0,
  138. EXT_DISP_RX_IDX_MAX,
  139. };
  140. struct msm_wsa881x_dev_info {
  141. struct device_node *of_node;
  142. u32 index;
  143. };
  144. struct aux_codec_dev_info {
  145. struct device_node *of_node;
  146. u32 index;
  147. };
  148. struct dev_config {
  149. u32 sample_rate;
  150. u32 bit_format;
  151. u32 channels;
  152. };
  153. /* Default configuration of external display BE */
  154. static struct dev_config ext_disp_rx_cfg[] = {
  155. [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  156. };
  157. static struct dev_config usb_rx_cfg = {
  158. .sample_rate = SAMPLING_RATE_48KHZ,
  159. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  160. .channels = 2,
  161. };
  162. static struct dev_config usb_tx_cfg = {
  163. .sample_rate = SAMPLING_RATE_48KHZ,
  164. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  165. .channels = 1,
  166. };
  167. static struct dev_config proxy_rx_cfg = {
  168. .sample_rate = SAMPLING_RATE_48KHZ,
  169. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  170. .channels = 2,
  171. };
  172. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  173. {
  174. AFE_API_VERSION_I2S_CONFIG,
  175. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  176. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  177. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  178. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  179. 0,
  180. },
  181. {
  182. AFE_API_VERSION_I2S_CONFIG,
  183. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  184. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  185. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  186. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  187. 0,
  188. },
  189. {
  190. AFE_API_VERSION_I2S_CONFIG,
  191. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  192. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  193. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  194. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  195. 0,
  196. },
  197. };
  198. struct mi2s_conf {
  199. struct mutex lock;
  200. u32 ref_cnt;
  201. u32 msm_is_mi2s_master;
  202. };
  203. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  204. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  205. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  206. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  207. };
  208. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  209. /* Default configuration of TDM channels */
  210. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  211. { /* PRI TDM */
  212. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  213. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  214. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  215. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  216. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  220. },
  221. { /* SEC TDM */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  230. },
  231. { /* TERT TDM */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  240. },
  241. };
  242. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  243. { /* PRI TDM */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  252. },
  253. { /* SEC TDM */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  262. },
  263. { /* TERT TDM */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  265. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  266. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  267. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  268. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  272. },
  273. };
  274. /* Default configuration of AUX PCM channels */
  275. static struct dev_config aux_pcm_rx_cfg[] = {
  276. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  277. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  278. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  279. };
  280. static struct dev_config aux_pcm_tx_cfg[] = {
  281. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  282. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  283. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  284. };
  285. /* Default configuration of MI2S channels */
  286. static struct dev_config mi2s_rx_cfg[] = {
  287. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  288. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  289. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  290. };
  291. static struct dev_config mi2s_tx_cfg[] = {
  292. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  293. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  294. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  295. };
  296. /* Default configuration of Codec DMA Interface RX */
  297. static struct dev_config cdc_dma_rx_cfg[] = {
  298. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  299. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  300. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  301. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  302. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  303. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  304. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  305. };
  306. /* Default configuration of Codec DMA Interface TX */
  307. static struct dev_config cdc_dma_tx_cfg[] = {
  308. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  309. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  310. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  311. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  312. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  313. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  314. [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  315. [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  316. [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  317. };
  318. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  319. "S32_LE"};
  320. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  321. "Six", "Seven", "Eight"};
  322. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  323. "KHZ_16", "KHZ_22P05",
  324. "KHZ_32", "KHZ_44P1", "KHZ_48",
  325. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  326. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  327. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  328. "Five", "Six", "Seven",
  329. "Eight"};
  330. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  331. "KHZ_48", "KHZ_176P4",
  332. "KHZ_352P8"};
  333. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  334. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  335. "Five", "Six", "Seven", "Eight"};
  336. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  337. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  338. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  339. "KHZ_48", "KHZ_96", "KHZ_192"};
  340. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  341. "Five", "Six", "Seven",
  342. "Eight"};
  343. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  344. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  345. "Five", "Six", "Seven",
  346. "Eight"};
  347. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  348. "KHZ_16", "KHZ_22P05",
  349. "KHZ_32", "KHZ_44P1", "KHZ_48",
  350. "KHZ_88P2", "KHZ_96",
  351. "KHZ_176P4", "KHZ_192",
  352. "KHZ_352P8", "KHZ_384"};
  353. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  354. "S24_3LE"};
  355. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  356. "KHZ_192", "KHZ_32", "KHZ_44P1",
  357. "KHZ_88P2", "KHZ_176P4"};
  358. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  359. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  360. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  361. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  362. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  363. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  364. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  365. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  366. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  367. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  368. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  369. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  370. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  371. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  372. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  373. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  374. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  375. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  376. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  377. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  378. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  379. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  380. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  381. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  382. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  383. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  384. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  385. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  386. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  387. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  388. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  389. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  390. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  391. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  392. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  393. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  394. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  395. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  396. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  397. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  398. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  399. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  400. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  401. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  402. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  403. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  404. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  405. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  406. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  407. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  408. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  409. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  410. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  411. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  412. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  413. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  414. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  415. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  416. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  417. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  418. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  419. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  420. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  421. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
  422. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
  423. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
  424. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  425. cdc_dma_sample_rate_text);
  426. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  427. cdc_dma_sample_rate_text);
  428. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  429. cdc_dma_sample_rate_text);
  430. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  431. cdc_dma_sample_rate_text);
  432. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  433. cdc_dma_sample_rate_text);
  434. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  435. cdc_dma_sample_rate_text);
  436. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  437. cdc_dma_sample_rate_text);
  438. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  439. cdc_dma_sample_rate_text);
  440. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  441. cdc_dma_sample_rate_text);
  442. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  443. cdc_dma_sample_rate_text);
  444. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  445. cdc_dma_sample_rate_text);
  446. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  447. cdc_dma_sample_rate_text);
  448. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  449. cdc_dma_sample_rate_text);
  450. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
  451. cdc_dma_sample_rate_text);
  452. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
  453. cdc_dma_sample_rate_text);
  454. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
  455. cdc_dma_sample_rate_text);
  456. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  457. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  458. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  459. ext_disp_sample_rate_text);
  460. static bool is_initial_boot;
  461. static bool codec_reg_done;
  462. static struct snd_soc_aux_dev *msm_aux_dev;
  463. static struct snd_soc_codec_conf *msm_codec_conf;
  464. static struct snd_soc_card snd_soc_card_kona_msm;
  465. static int dmic_0_1_gpio_cnt;
  466. static int dmic_2_3_gpio_cnt;
  467. static int dmic_4_5_gpio_cnt;
  468. static int msm_vi_feed_tx_ch = 2;
  469. static void *def_wcd_mbhc_cal(void);
  470. /*
  471. * Need to report LINEIN
  472. * if R/L channel impedance is larger than 5K ohm
  473. */
  474. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  475. .read_fw_bin = false,
  476. .calibration = NULL,
  477. .detect_extn_cable = true,
  478. .mono_stero_detection = false,
  479. .swap_gnd_mic = NULL,
  480. .hs_ext_micbias = true,
  481. .key_code[0] = KEY_MEDIA,
  482. .key_code[1] = KEY_VOICECOMMAND,
  483. .key_code[2] = KEY_VOLUMEUP,
  484. .key_code[3] = KEY_VOLUMEDOWN,
  485. .key_code[4] = 0,
  486. .key_code[5] = 0,
  487. .key_code[6] = 0,
  488. .key_code[7] = 0,
  489. .linein_th = 5000,
  490. .moisture_en = true,
  491. .mbhc_micbias = MIC_BIAS_2,
  492. .anc_micbias = MIC_BIAS_2,
  493. .enable_anc_mic_detect = false,
  494. };
  495. static inline int param_is_mask(int p)
  496. {
  497. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  498. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  499. }
  500. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  501. int n)
  502. {
  503. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  504. }
  505. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  506. unsigned int bit)
  507. {
  508. if (bit >= SNDRV_MASK_MAX)
  509. return;
  510. if (param_is_mask(n)) {
  511. struct snd_mask *m = param_to_mask(p, n);
  512. m->bits[0] = 0;
  513. m->bits[1] = 0;
  514. m->bits[bit >> 5] |= (1 << (bit & 31));
  515. }
  516. }
  517. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  518. struct snd_ctl_elem_value *ucontrol)
  519. {
  520. int sample_rate_val = 0;
  521. switch (usb_rx_cfg.sample_rate) {
  522. case SAMPLING_RATE_384KHZ:
  523. sample_rate_val = 12;
  524. break;
  525. case SAMPLING_RATE_352P8KHZ:
  526. sample_rate_val = 11;
  527. break;
  528. case SAMPLING_RATE_192KHZ:
  529. sample_rate_val = 10;
  530. break;
  531. case SAMPLING_RATE_176P4KHZ:
  532. sample_rate_val = 9;
  533. break;
  534. case SAMPLING_RATE_96KHZ:
  535. sample_rate_val = 8;
  536. break;
  537. case SAMPLING_RATE_88P2KHZ:
  538. sample_rate_val = 7;
  539. break;
  540. case SAMPLING_RATE_48KHZ:
  541. sample_rate_val = 6;
  542. break;
  543. case SAMPLING_RATE_44P1KHZ:
  544. sample_rate_val = 5;
  545. break;
  546. case SAMPLING_RATE_32KHZ:
  547. sample_rate_val = 4;
  548. break;
  549. case SAMPLING_RATE_22P05KHZ:
  550. sample_rate_val = 3;
  551. break;
  552. case SAMPLING_RATE_16KHZ:
  553. sample_rate_val = 2;
  554. break;
  555. case SAMPLING_RATE_11P025KHZ:
  556. sample_rate_val = 1;
  557. break;
  558. case SAMPLING_RATE_8KHZ:
  559. default:
  560. sample_rate_val = 0;
  561. break;
  562. }
  563. ucontrol->value.integer.value[0] = sample_rate_val;
  564. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  565. usb_rx_cfg.sample_rate);
  566. return 0;
  567. }
  568. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  569. struct snd_ctl_elem_value *ucontrol)
  570. {
  571. switch (ucontrol->value.integer.value[0]) {
  572. case 12:
  573. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  574. break;
  575. case 11:
  576. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  577. break;
  578. case 10:
  579. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  580. break;
  581. case 9:
  582. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  583. break;
  584. case 8:
  585. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  586. break;
  587. case 7:
  588. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  589. break;
  590. case 6:
  591. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  592. break;
  593. case 5:
  594. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  595. break;
  596. case 4:
  597. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  598. break;
  599. case 3:
  600. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  601. break;
  602. case 2:
  603. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  604. break;
  605. case 1:
  606. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  607. break;
  608. case 0:
  609. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  610. break;
  611. default:
  612. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  613. break;
  614. }
  615. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  616. __func__, ucontrol->value.integer.value[0],
  617. usb_rx_cfg.sample_rate);
  618. return 0;
  619. }
  620. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  621. struct snd_ctl_elem_value *ucontrol)
  622. {
  623. int sample_rate_val = 0;
  624. switch (usb_tx_cfg.sample_rate) {
  625. case SAMPLING_RATE_384KHZ:
  626. sample_rate_val = 12;
  627. break;
  628. case SAMPLING_RATE_352P8KHZ:
  629. sample_rate_val = 11;
  630. break;
  631. case SAMPLING_RATE_192KHZ:
  632. sample_rate_val = 10;
  633. break;
  634. case SAMPLING_RATE_176P4KHZ:
  635. sample_rate_val = 9;
  636. break;
  637. case SAMPLING_RATE_96KHZ:
  638. sample_rate_val = 8;
  639. break;
  640. case SAMPLING_RATE_88P2KHZ:
  641. sample_rate_val = 7;
  642. break;
  643. case SAMPLING_RATE_48KHZ:
  644. sample_rate_val = 6;
  645. break;
  646. case SAMPLING_RATE_44P1KHZ:
  647. sample_rate_val = 5;
  648. break;
  649. case SAMPLING_RATE_32KHZ:
  650. sample_rate_val = 4;
  651. break;
  652. case SAMPLING_RATE_22P05KHZ:
  653. sample_rate_val = 3;
  654. break;
  655. case SAMPLING_RATE_16KHZ:
  656. sample_rate_val = 2;
  657. break;
  658. case SAMPLING_RATE_11P025KHZ:
  659. sample_rate_val = 1;
  660. break;
  661. case SAMPLING_RATE_8KHZ:
  662. sample_rate_val = 0;
  663. break;
  664. default:
  665. sample_rate_val = 6;
  666. break;
  667. }
  668. ucontrol->value.integer.value[0] = sample_rate_val;
  669. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  670. usb_tx_cfg.sample_rate);
  671. return 0;
  672. }
  673. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  674. struct snd_ctl_elem_value *ucontrol)
  675. {
  676. switch (ucontrol->value.integer.value[0]) {
  677. case 12:
  678. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  679. break;
  680. case 11:
  681. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  682. break;
  683. case 10:
  684. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  685. break;
  686. case 9:
  687. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  688. break;
  689. case 8:
  690. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  691. break;
  692. case 7:
  693. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  694. break;
  695. case 6:
  696. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  697. break;
  698. case 5:
  699. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  700. break;
  701. case 4:
  702. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  703. break;
  704. case 3:
  705. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  706. break;
  707. case 2:
  708. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  709. break;
  710. case 1:
  711. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  712. break;
  713. case 0:
  714. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  715. break;
  716. default:
  717. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  718. break;
  719. }
  720. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  721. __func__, ucontrol->value.integer.value[0],
  722. usb_tx_cfg.sample_rate);
  723. return 0;
  724. }
  725. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  726. struct snd_ctl_elem_value *ucontrol)
  727. {
  728. switch (usb_rx_cfg.bit_format) {
  729. case SNDRV_PCM_FORMAT_S32_LE:
  730. ucontrol->value.integer.value[0] = 3;
  731. break;
  732. case SNDRV_PCM_FORMAT_S24_3LE:
  733. ucontrol->value.integer.value[0] = 2;
  734. break;
  735. case SNDRV_PCM_FORMAT_S24_LE:
  736. ucontrol->value.integer.value[0] = 1;
  737. break;
  738. case SNDRV_PCM_FORMAT_S16_LE:
  739. default:
  740. ucontrol->value.integer.value[0] = 0;
  741. break;
  742. }
  743. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  744. __func__, usb_rx_cfg.bit_format,
  745. ucontrol->value.integer.value[0]);
  746. return 0;
  747. }
  748. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  749. struct snd_ctl_elem_value *ucontrol)
  750. {
  751. int rc = 0;
  752. switch (ucontrol->value.integer.value[0]) {
  753. case 3:
  754. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  755. break;
  756. case 2:
  757. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  758. break;
  759. case 1:
  760. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  761. break;
  762. case 0:
  763. default:
  764. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  765. break;
  766. }
  767. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  768. __func__, usb_rx_cfg.bit_format,
  769. ucontrol->value.integer.value[0]);
  770. return rc;
  771. }
  772. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  773. struct snd_ctl_elem_value *ucontrol)
  774. {
  775. switch (usb_tx_cfg.bit_format) {
  776. case SNDRV_PCM_FORMAT_S32_LE:
  777. ucontrol->value.integer.value[0] = 3;
  778. break;
  779. case SNDRV_PCM_FORMAT_S24_3LE:
  780. ucontrol->value.integer.value[0] = 2;
  781. break;
  782. case SNDRV_PCM_FORMAT_S24_LE:
  783. ucontrol->value.integer.value[0] = 1;
  784. break;
  785. case SNDRV_PCM_FORMAT_S16_LE:
  786. default:
  787. ucontrol->value.integer.value[0] = 0;
  788. break;
  789. }
  790. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  791. __func__, usb_tx_cfg.bit_format,
  792. ucontrol->value.integer.value[0]);
  793. return 0;
  794. }
  795. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  796. struct snd_ctl_elem_value *ucontrol)
  797. {
  798. int rc = 0;
  799. switch (ucontrol->value.integer.value[0]) {
  800. case 3:
  801. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  802. break;
  803. case 2:
  804. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  805. break;
  806. case 1:
  807. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  808. break;
  809. case 0:
  810. default:
  811. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  812. break;
  813. }
  814. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  815. __func__, usb_tx_cfg.bit_format,
  816. ucontrol->value.integer.value[0]);
  817. return rc;
  818. }
  819. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  820. struct snd_ctl_elem_value *ucontrol)
  821. {
  822. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  823. usb_rx_cfg.channels);
  824. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  825. return 0;
  826. }
  827. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  828. struct snd_ctl_elem_value *ucontrol)
  829. {
  830. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  831. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  832. return 1;
  833. }
  834. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  835. struct snd_ctl_elem_value *ucontrol)
  836. {
  837. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  838. usb_tx_cfg.channels);
  839. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  840. return 0;
  841. }
  842. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  843. struct snd_ctl_elem_value *ucontrol)
  844. {
  845. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  846. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  847. return 1;
  848. }
  849. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  850. {
  851. int idx = 0;
  852. if (strnstr(kcontrol->id.name, "Display Port RX",
  853. sizeof("Display Port RX"))) {
  854. idx = EXT_DISP_RX_IDX_DP;
  855. } else {
  856. pr_err("%s: unsupported BE: %s\n",
  857. __func__, kcontrol->id.name);
  858. idx = -EINVAL;
  859. }
  860. return idx;
  861. }
  862. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  863. struct snd_ctl_elem_value *ucontrol)
  864. {
  865. int idx = ext_disp_get_port_idx(kcontrol);
  866. if (idx < 0)
  867. return idx;
  868. switch (ext_disp_rx_cfg[idx].bit_format) {
  869. case SNDRV_PCM_FORMAT_S24_3LE:
  870. ucontrol->value.integer.value[0] = 2;
  871. break;
  872. case SNDRV_PCM_FORMAT_S24_LE:
  873. ucontrol->value.integer.value[0] = 1;
  874. break;
  875. case SNDRV_PCM_FORMAT_S16_LE:
  876. default:
  877. ucontrol->value.integer.value[0] = 0;
  878. break;
  879. }
  880. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  881. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  882. ucontrol->value.integer.value[0]);
  883. return 0;
  884. }
  885. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  886. struct snd_ctl_elem_value *ucontrol)
  887. {
  888. int idx = ext_disp_get_port_idx(kcontrol);
  889. if (idx < 0)
  890. return idx;
  891. switch (ucontrol->value.integer.value[0]) {
  892. case 2:
  893. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  894. break;
  895. case 1:
  896. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  897. break;
  898. case 0:
  899. default:
  900. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  901. break;
  902. }
  903. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  904. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  905. ucontrol->value.integer.value[0]);
  906. return 0;
  907. }
  908. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  909. struct snd_ctl_elem_value *ucontrol)
  910. {
  911. int idx = ext_disp_get_port_idx(kcontrol);
  912. if (idx < 0)
  913. return idx;
  914. ucontrol->value.integer.value[0] =
  915. ext_disp_rx_cfg[idx].channels - 2;
  916. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  917. idx, ext_disp_rx_cfg[idx].channels);
  918. return 0;
  919. }
  920. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  921. struct snd_ctl_elem_value *ucontrol)
  922. {
  923. int idx = ext_disp_get_port_idx(kcontrol);
  924. if (idx < 0)
  925. return idx;
  926. ext_disp_rx_cfg[idx].channels =
  927. ucontrol->value.integer.value[0] + 2;
  928. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  929. idx, ext_disp_rx_cfg[idx].channels);
  930. return 1;
  931. }
  932. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  933. struct snd_ctl_elem_value *ucontrol)
  934. {
  935. int sample_rate_val;
  936. int idx = ext_disp_get_port_idx(kcontrol);
  937. if (idx < 0)
  938. return idx;
  939. switch (ext_disp_rx_cfg[idx].sample_rate) {
  940. case SAMPLING_RATE_176P4KHZ:
  941. sample_rate_val = 6;
  942. break;
  943. case SAMPLING_RATE_88P2KHZ:
  944. sample_rate_val = 5;
  945. break;
  946. case SAMPLING_RATE_44P1KHZ:
  947. sample_rate_val = 4;
  948. break;
  949. case SAMPLING_RATE_32KHZ:
  950. sample_rate_val = 3;
  951. break;
  952. case SAMPLING_RATE_192KHZ:
  953. sample_rate_val = 2;
  954. break;
  955. case SAMPLING_RATE_96KHZ:
  956. sample_rate_val = 1;
  957. break;
  958. case SAMPLING_RATE_48KHZ:
  959. default:
  960. sample_rate_val = 0;
  961. break;
  962. }
  963. ucontrol->value.integer.value[0] = sample_rate_val;
  964. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  965. idx, ext_disp_rx_cfg[idx].sample_rate);
  966. return 0;
  967. }
  968. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  969. struct snd_ctl_elem_value *ucontrol)
  970. {
  971. int idx = ext_disp_get_port_idx(kcontrol);
  972. if (idx < 0)
  973. return idx;
  974. switch (ucontrol->value.integer.value[0]) {
  975. case 6:
  976. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  977. break;
  978. case 5:
  979. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  980. break;
  981. case 4:
  982. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  983. break;
  984. case 3:
  985. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  986. break;
  987. case 2:
  988. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  989. break;
  990. case 1:
  991. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  992. break;
  993. case 0:
  994. default:
  995. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  996. break;
  997. }
  998. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  999. __func__, ucontrol->value.integer.value[0], idx,
  1000. ext_disp_rx_cfg[idx].sample_rate);
  1001. return 0;
  1002. }
  1003. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  1004. struct snd_ctl_elem_value *ucontrol)
  1005. {
  1006. pr_debug("%s: proxy_rx channels = %d\n",
  1007. __func__, proxy_rx_cfg.channels);
  1008. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  1009. return 0;
  1010. }
  1011. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  1012. struct snd_ctl_elem_value *ucontrol)
  1013. {
  1014. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  1015. pr_debug("%s: proxy_rx channels = %d\n",
  1016. __func__, proxy_rx_cfg.channels);
  1017. return 1;
  1018. }
  1019. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  1020. struct tdm_port *port)
  1021. {
  1022. if (port) {
  1023. if (strnstr(kcontrol->id.name, "PRI",
  1024. sizeof(kcontrol->id.name))) {
  1025. port->mode = TDM_PRI;
  1026. } else if (strnstr(kcontrol->id.name, "SEC",
  1027. sizeof(kcontrol->id.name))) {
  1028. port->mode = TDM_SEC;
  1029. } else if (strnstr(kcontrol->id.name, "TERT",
  1030. sizeof(kcontrol->id.name))) {
  1031. port->mode = TDM_TERT;
  1032. } else {
  1033. pr_err("%s: unsupported mode in: %s\n",
  1034. __func__, kcontrol->id.name);
  1035. return -EINVAL;
  1036. }
  1037. if (strnstr(kcontrol->id.name, "RX_0",
  1038. sizeof(kcontrol->id.name)) ||
  1039. strnstr(kcontrol->id.name, "TX_0",
  1040. sizeof(kcontrol->id.name))) {
  1041. port->channel = TDM_0;
  1042. } else if (strnstr(kcontrol->id.name, "RX_1",
  1043. sizeof(kcontrol->id.name)) ||
  1044. strnstr(kcontrol->id.name, "TX_1",
  1045. sizeof(kcontrol->id.name))) {
  1046. port->channel = TDM_1;
  1047. } else if (strnstr(kcontrol->id.name, "RX_2",
  1048. sizeof(kcontrol->id.name)) ||
  1049. strnstr(kcontrol->id.name, "TX_2",
  1050. sizeof(kcontrol->id.name))) {
  1051. port->channel = TDM_2;
  1052. } else if (strnstr(kcontrol->id.name, "RX_3",
  1053. sizeof(kcontrol->id.name)) ||
  1054. strnstr(kcontrol->id.name, "TX_3",
  1055. sizeof(kcontrol->id.name))) {
  1056. port->channel = TDM_3;
  1057. } else if (strnstr(kcontrol->id.name, "RX_4",
  1058. sizeof(kcontrol->id.name)) ||
  1059. strnstr(kcontrol->id.name, "TX_4",
  1060. sizeof(kcontrol->id.name))) {
  1061. port->channel = TDM_4;
  1062. } else if (strnstr(kcontrol->id.name, "RX_5",
  1063. sizeof(kcontrol->id.name)) ||
  1064. strnstr(kcontrol->id.name, "TX_5",
  1065. sizeof(kcontrol->id.name))) {
  1066. port->channel = TDM_5;
  1067. } else if (strnstr(kcontrol->id.name, "RX_6",
  1068. sizeof(kcontrol->id.name)) ||
  1069. strnstr(kcontrol->id.name, "TX_6",
  1070. sizeof(kcontrol->id.name))) {
  1071. port->channel = TDM_6;
  1072. } else if (strnstr(kcontrol->id.name, "RX_7",
  1073. sizeof(kcontrol->id.name)) ||
  1074. strnstr(kcontrol->id.name, "TX_7",
  1075. sizeof(kcontrol->id.name))) {
  1076. port->channel = TDM_7;
  1077. } else {
  1078. pr_err("%s: unsupported channel in: %s\n",
  1079. __func__, kcontrol->id.name);
  1080. return -EINVAL;
  1081. }
  1082. } else {
  1083. return -EINVAL;
  1084. }
  1085. return 0;
  1086. }
  1087. static int tdm_get_sample_rate(int value)
  1088. {
  1089. int sample_rate = 0;
  1090. switch (value) {
  1091. case 0:
  1092. sample_rate = SAMPLING_RATE_8KHZ;
  1093. break;
  1094. case 1:
  1095. sample_rate = SAMPLING_RATE_16KHZ;
  1096. break;
  1097. case 2:
  1098. sample_rate = SAMPLING_RATE_32KHZ;
  1099. break;
  1100. case 3:
  1101. sample_rate = SAMPLING_RATE_48KHZ;
  1102. break;
  1103. case 4:
  1104. sample_rate = SAMPLING_RATE_176P4KHZ;
  1105. break;
  1106. case 5:
  1107. sample_rate = SAMPLING_RATE_352P8KHZ;
  1108. break;
  1109. default:
  1110. sample_rate = SAMPLING_RATE_48KHZ;
  1111. break;
  1112. }
  1113. return sample_rate;
  1114. }
  1115. static int tdm_get_sample_rate_val(int sample_rate)
  1116. {
  1117. int sample_rate_val = 0;
  1118. switch (sample_rate) {
  1119. case SAMPLING_RATE_8KHZ:
  1120. sample_rate_val = 0;
  1121. break;
  1122. case SAMPLING_RATE_16KHZ:
  1123. sample_rate_val = 1;
  1124. break;
  1125. case SAMPLING_RATE_32KHZ:
  1126. sample_rate_val = 2;
  1127. break;
  1128. case SAMPLING_RATE_48KHZ:
  1129. sample_rate_val = 3;
  1130. break;
  1131. case SAMPLING_RATE_176P4KHZ:
  1132. sample_rate_val = 4;
  1133. break;
  1134. case SAMPLING_RATE_352P8KHZ:
  1135. sample_rate_val = 5;
  1136. break;
  1137. default:
  1138. sample_rate_val = 3;
  1139. break;
  1140. }
  1141. return sample_rate_val;
  1142. }
  1143. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1144. struct snd_ctl_elem_value *ucontrol)
  1145. {
  1146. struct tdm_port port;
  1147. int ret = tdm_get_port_idx(kcontrol, &port);
  1148. if (ret) {
  1149. pr_err("%s: unsupported control: %s\n",
  1150. __func__, kcontrol->id.name);
  1151. } else {
  1152. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1153. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  1154. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1155. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1156. ucontrol->value.enumerated.item[0]);
  1157. }
  1158. return ret;
  1159. }
  1160. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1161. struct snd_ctl_elem_value *ucontrol)
  1162. {
  1163. struct tdm_port port;
  1164. int ret = tdm_get_port_idx(kcontrol, &port);
  1165. if (ret) {
  1166. pr_err("%s: unsupported control: %s\n",
  1167. __func__, kcontrol->id.name);
  1168. } else {
  1169. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  1170. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1171. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1172. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1173. ucontrol->value.enumerated.item[0]);
  1174. }
  1175. return ret;
  1176. }
  1177. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1178. struct snd_ctl_elem_value *ucontrol)
  1179. {
  1180. struct tdm_port port;
  1181. int ret = tdm_get_port_idx(kcontrol, &port);
  1182. if (ret) {
  1183. pr_err("%s: unsupported control: %s\n",
  1184. __func__, kcontrol->id.name);
  1185. } else {
  1186. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1187. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  1188. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1189. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1190. ucontrol->value.enumerated.item[0]);
  1191. }
  1192. return ret;
  1193. }
  1194. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1195. struct snd_ctl_elem_value *ucontrol)
  1196. {
  1197. struct tdm_port port;
  1198. int ret = tdm_get_port_idx(kcontrol, &port);
  1199. if (ret) {
  1200. pr_err("%s: unsupported control: %s\n",
  1201. __func__, kcontrol->id.name);
  1202. } else {
  1203. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  1204. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1205. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1206. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1207. ucontrol->value.enumerated.item[0]);
  1208. }
  1209. return ret;
  1210. }
  1211. static int tdm_get_format(int value)
  1212. {
  1213. int format = 0;
  1214. switch (value) {
  1215. case 0:
  1216. format = SNDRV_PCM_FORMAT_S16_LE;
  1217. break;
  1218. case 1:
  1219. format = SNDRV_PCM_FORMAT_S24_LE;
  1220. break;
  1221. case 2:
  1222. format = SNDRV_PCM_FORMAT_S32_LE;
  1223. break;
  1224. default:
  1225. format = SNDRV_PCM_FORMAT_S16_LE;
  1226. break;
  1227. }
  1228. return format;
  1229. }
  1230. static int tdm_get_format_val(int format)
  1231. {
  1232. int value = 0;
  1233. switch (format) {
  1234. case SNDRV_PCM_FORMAT_S16_LE:
  1235. value = 0;
  1236. break;
  1237. case SNDRV_PCM_FORMAT_S24_LE:
  1238. value = 1;
  1239. break;
  1240. case SNDRV_PCM_FORMAT_S32_LE:
  1241. value = 2;
  1242. break;
  1243. default:
  1244. value = 0;
  1245. break;
  1246. }
  1247. return value;
  1248. }
  1249. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  1250. struct snd_ctl_elem_value *ucontrol)
  1251. {
  1252. struct tdm_port port;
  1253. int ret = tdm_get_port_idx(kcontrol, &port);
  1254. if (ret) {
  1255. pr_err("%s: unsupported control: %s\n",
  1256. __func__, kcontrol->id.name);
  1257. } else {
  1258. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1259. tdm_rx_cfg[port.mode][port.channel].bit_format);
  1260. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1261. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1262. ucontrol->value.enumerated.item[0]);
  1263. }
  1264. return ret;
  1265. }
  1266. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  1267. struct snd_ctl_elem_value *ucontrol)
  1268. {
  1269. struct tdm_port port;
  1270. int ret = tdm_get_port_idx(kcontrol, &port);
  1271. if (ret) {
  1272. pr_err("%s: unsupported control: %s\n",
  1273. __func__, kcontrol->id.name);
  1274. } else {
  1275. tdm_rx_cfg[port.mode][port.channel].bit_format =
  1276. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1277. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1278. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1279. ucontrol->value.enumerated.item[0]);
  1280. }
  1281. return ret;
  1282. }
  1283. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  1284. struct snd_ctl_elem_value *ucontrol)
  1285. {
  1286. struct tdm_port port;
  1287. int ret = tdm_get_port_idx(kcontrol, &port);
  1288. if (ret) {
  1289. pr_err("%s: unsupported control: %s\n",
  1290. __func__, kcontrol->id.name);
  1291. } else {
  1292. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1293. tdm_tx_cfg[port.mode][port.channel].bit_format);
  1294. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1295. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1296. ucontrol->value.enumerated.item[0]);
  1297. }
  1298. return ret;
  1299. }
  1300. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  1301. struct snd_ctl_elem_value *ucontrol)
  1302. {
  1303. struct tdm_port port;
  1304. int ret = tdm_get_port_idx(kcontrol, &port);
  1305. if (ret) {
  1306. pr_err("%s: unsupported control: %s\n",
  1307. __func__, kcontrol->id.name);
  1308. } else {
  1309. tdm_tx_cfg[port.mode][port.channel].bit_format =
  1310. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1311. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1312. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1313. ucontrol->value.enumerated.item[0]);
  1314. }
  1315. return ret;
  1316. }
  1317. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  1318. struct snd_ctl_elem_value *ucontrol)
  1319. {
  1320. struct tdm_port port;
  1321. int ret = tdm_get_port_idx(kcontrol, &port);
  1322. if (ret) {
  1323. pr_err("%s: unsupported control: %s\n",
  1324. __func__, kcontrol->id.name);
  1325. } else {
  1326. ucontrol->value.enumerated.item[0] =
  1327. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  1328. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1329. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  1330. ucontrol->value.enumerated.item[0]);
  1331. }
  1332. return ret;
  1333. }
  1334. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  1335. struct snd_ctl_elem_value *ucontrol)
  1336. {
  1337. struct tdm_port port;
  1338. int ret = tdm_get_port_idx(kcontrol, &port);
  1339. if (ret) {
  1340. pr_err("%s: unsupported control: %s\n",
  1341. __func__, kcontrol->id.name);
  1342. } else {
  1343. tdm_rx_cfg[port.mode][port.channel].channels =
  1344. ucontrol->value.enumerated.item[0] + 1;
  1345. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1346. tdm_rx_cfg[port.mode][port.channel].channels,
  1347. ucontrol->value.enumerated.item[0] + 1);
  1348. }
  1349. return ret;
  1350. }
  1351. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  1352. struct snd_ctl_elem_value *ucontrol)
  1353. {
  1354. struct tdm_port port;
  1355. int ret = tdm_get_port_idx(kcontrol, &port);
  1356. if (ret) {
  1357. pr_err("%s: unsupported control: %s\n",
  1358. __func__, kcontrol->id.name);
  1359. } else {
  1360. ucontrol->value.enumerated.item[0] =
  1361. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  1362. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1363. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  1364. ucontrol->value.enumerated.item[0]);
  1365. }
  1366. return ret;
  1367. }
  1368. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  1369. struct snd_ctl_elem_value *ucontrol)
  1370. {
  1371. struct tdm_port port;
  1372. int ret = tdm_get_port_idx(kcontrol, &port);
  1373. if (ret) {
  1374. pr_err("%s: unsupported control: %s\n",
  1375. __func__, kcontrol->id.name);
  1376. } else {
  1377. tdm_tx_cfg[port.mode][port.channel].channels =
  1378. ucontrol->value.enumerated.item[0] + 1;
  1379. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1380. tdm_tx_cfg[port.mode][port.channel].channels,
  1381. ucontrol->value.enumerated.item[0] + 1);
  1382. }
  1383. return ret;
  1384. }
  1385. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  1386. {
  1387. int idx = 0;
  1388. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  1389. sizeof("PRIM_AUX_PCM"))) {
  1390. idx = PRIM_AUX_PCM;
  1391. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  1392. sizeof("SEC_AUX_PCM"))) {
  1393. idx = SEC_AUX_PCM;
  1394. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  1395. sizeof("TERT_AUX_PCM"))) {
  1396. idx = TERT_AUX_PCM;
  1397. } else {
  1398. pr_err("%s: unsupported port: %s\n",
  1399. __func__, kcontrol->id.name);
  1400. idx = -EINVAL;
  1401. }
  1402. return idx;
  1403. }
  1404. static int aux_pcm_get_sample_rate(int value)
  1405. {
  1406. int sample_rate = 0;
  1407. switch (value) {
  1408. case 1:
  1409. sample_rate = SAMPLING_RATE_16KHZ;
  1410. break;
  1411. case 0:
  1412. default:
  1413. sample_rate = SAMPLING_RATE_8KHZ;
  1414. break;
  1415. }
  1416. return sample_rate;
  1417. }
  1418. static int aux_pcm_get_sample_rate_val(int sample_rate)
  1419. {
  1420. int sample_rate_val = 0;
  1421. switch (sample_rate) {
  1422. case SAMPLING_RATE_16KHZ:
  1423. sample_rate_val = 1;
  1424. break;
  1425. case SAMPLING_RATE_8KHZ:
  1426. default:
  1427. sample_rate_val = 0;
  1428. break;
  1429. }
  1430. return sample_rate_val;
  1431. }
  1432. static int mi2s_auxpcm_get_format(int value)
  1433. {
  1434. int format = 0;
  1435. switch (value) {
  1436. case 0:
  1437. format = SNDRV_PCM_FORMAT_S16_LE;
  1438. break;
  1439. case 1:
  1440. format = SNDRV_PCM_FORMAT_S24_LE;
  1441. break;
  1442. case 2:
  1443. format = SNDRV_PCM_FORMAT_S24_3LE;
  1444. break;
  1445. case 3:
  1446. format = SNDRV_PCM_FORMAT_S32_LE;
  1447. break;
  1448. default:
  1449. format = SNDRV_PCM_FORMAT_S16_LE;
  1450. break;
  1451. }
  1452. return format;
  1453. }
  1454. static int mi2s_auxpcm_get_format_value(int format)
  1455. {
  1456. int value = 0;
  1457. switch (format) {
  1458. case SNDRV_PCM_FORMAT_S16_LE:
  1459. value = 0;
  1460. break;
  1461. case SNDRV_PCM_FORMAT_S24_LE:
  1462. value = 1;
  1463. break;
  1464. case SNDRV_PCM_FORMAT_S24_3LE:
  1465. value = 2;
  1466. break;
  1467. case SNDRV_PCM_FORMAT_S32_LE:
  1468. value = 3;
  1469. break;
  1470. default:
  1471. value = 0;
  1472. break;
  1473. }
  1474. return value;
  1475. }
  1476. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1477. struct snd_ctl_elem_value *ucontrol)
  1478. {
  1479. int idx = aux_pcm_get_port_idx(kcontrol);
  1480. if (idx < 0)
  1481. return idx;
  1482. ucontrol->value.enumerated.item[0] =
  1483. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  1484. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1485. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1486. ucontrol->value.enumerated.item[0]);
  1487. return 0;
  1488. }
  1489. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1490. struct snd_ctl_elem_value *ucontrol)
  1491. {
  1492. int idx = aux_pcm_get_port_idx(kcontrol);
  1493. if (idx < 0)
  1494. return idx;
  1495. aux_pcm_rx_cfg[idx].sample_rate =
  1496. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1497. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1498. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1499. ucontrol->value.enumerated.item[0]);
  1500. return 0;
  1501. }
  1502. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1503. struct snd_ctl_elem_value *ucontrol)
  1504. {
  1505. int idx = aux_pcm_get_port_idx(kcontrol);
  1506. if (idx < 0)
  1507. return idx;
  1508. ucontrol->value.enumerated.item[0] =
  1509. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  1510. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1511. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1512. ucontrol->value.enumerated.item[0]);
  1513. return 0;
  1514. }
  1515. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1516. struct snd_ctl_elem_value *ucontrol)
  1517. {
  1518. int idx = aux_pcm_get_port_idx(kcontrol);
  1519. if (idx < 0)
  1520. return idx;
  1521. aux_pcm_tx_cfg[idx].sample_rate =
  1522. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1523. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1524. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1525. ucontrol->value.enumerated.item[0]);
  1526. return 0;
  1527. }
  1528. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  1529. struct snd_ctl_elem_value *ucontrol)
  1530. {
  1531. int idx = aux_pcm_get_port_idx(kcontrol);
  1532. if (idx < 0)
  1533. return idx;
  1534. ucontrol->value.enumerated.item[0] =
  1535. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  1536. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1537. idx, aux_pcm_rx_cfg[idx].bit_format,
  1538. ucontrol->value.enumerated.item[0]);
  1539. return 0;
  1540. }
  1541. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  1542. struct snd_ctl_elem_value *ucontrol)
  1543. {
  1544. int idx = aux_pcm_get_port_idx(kcontrol);
  1545. if (idx < 0)
  1546. return idx;
  1547. aux_pcm_rx_cfg[idx].bit_format =
  1548. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1549. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1550. idx, aux_pcm_rx_cfg[idx].bit_format,
  1551. ucontrol->value.enumerated.item[0]);
  1552. return 0;
  1553. }
  1554. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  1555. struct snd_ctl_elem_value *ucontrol)
  1556. {
  1557. int idx = aux_pcm_get_port_idx(kcontrol);
  1558. if (idx < 0)
  1559. return idx;
  1560. ucontrol->value.enumerated.item[0] =
  1561. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  1562. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1563. idx, aux_pcm_tx_cfg[idx].bit_format,
  1564. ucontrol->value.enumerated.item[0]);
  1565. return 0;
  1566. }
  1567. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  1568. struct snd_ctl_elem_value *ucontrol)
  1569. {
  1570. int idx = aux_pcm_get_port_idx(kcontrol);
  1571. if (idx < 0)
  1572. return idx;
  1573. aux_pcm_tx_cfg[idx].bit_format =
  1574. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1575. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1576. idx, aux_pcm_tx_cfg[idx].bit_format,
  1577. ucontrol->value.enumerated.item[0]);
  1578. return 0;
  1579. }
  1580. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  1581. {
  1582. int idx = 0;
  1583. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  1584. sizeof("PRIM_MI2S_RX"))) {
  1585. idx = PRIM_MI2S;
  1586. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  1587. sizeof("SEC_MI2S_RX"))) {
  1588. idx = SEC_MI2S;
  1589. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  1590. sizeof("TERT_MI2S_RX"))) {
  1591. idx = TERT_MI2S;
  1592. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  1593. sizeof("PRIM_MI2S_TX"))) {
  1594. idx = PRIM_MI2S;
  1595. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  1596. sizeof("SEC_MI2S_TX"))) {
  1597. idx = SEC_MI2S;
  1598. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  1599. sizeof("TERT_MI2S_TX"))) {
  1600. idx = TERT_MI2S;
  1601. } else {
  1602. pr_err("%s: unsupported channel: %s\n",
  1603. __func__, kcontrol->id.name);
  1604. idx = -EINVAL;
  1605. }
  1606. return idx;
  1607. }
  1608. static int mi2s_get_sample_rate(int value)
  1609. {
  1610. int sample_rate = 0;
  1611. switch (value) {
  1612. case 0:
  1613. sample_rate = SAMPLING_RATE_8KHZ;
  1614. break;
  1615. case 1:
  1616. sample_rate = SAMPLING_RATE_11P025KHZ;
  1617. break;
  1618. case 2:
  1619. sample_rate = SAMPLING_RATE_16KHZ;
  1620. break;
  1621. case 3:
  1622. sample_rate = SAMPLING_RATE_22P05KHZ;
  1623. break;
  1624. case 4:
  1625. sample_rate = SAMPLING_RATE_32KHZ;
  1626. break;
  1627. case 5:
  1628. sample_rate = SAMPLING_RATE_44P1KHZ;
  1629. break;
  1630. case 6:
  1631. sample_rate = SAMPLING_RATE_48KHZ;
  1632. break;
  1633. case 7:
  1634. sample_rate = SAMPLING_RATE_96KHZ;
  1635. break;
  1636. case 8:
  1637. sample_rate = SAMPLING_RATE_192KHZ;
  1638. break;
  1639. default:
  1640. sample_rate = SAMPLING_RATE_48KHZ;
  1641. break;
  1642. }
  1643. return sample_rate;
  1644. }
  1645. static int mi2s_get_sample_rate_val(int sample_rate)
  1646. {
  1647. int sample_rate_val = 0;
  1648. switch (sample_rate) {
  1649. case SAMPLING_RATE_8KHZ:
  1650. sample_rate_val = 0;
  1651. break;
  1652. case SAMPLING_RATE_11P025KHZ:
  1653. sample_rate_val = 1;
  1654. break;
  1655. case SAMPLING_RATE_16KHZ:
  1656. sample_rate_val = 2;
  1657. break;
  1658. case SAMPLING_RATE_22P05KHZ:
  1659. sample_rate_val = 3;
  1660. break;
  1661. case SAMPLING_RATE_32KHZ:
  1662. sample_rate_val = 4;
  1663. break;
  1664. case SAMPLING_RATE_44P1KHZ:
  1665. sample_rate_val = 5;
  1666. break;
  1667. case SAMPLING_RATE_48KHZ:
  1668. sample_rate_val = 6;
  1669. break;
  1670. case SAMPLING_RATE_96KHZ:
  1671. sample_rate_val = 7;
  1672. break;
  1673. case SAMPLING_RATE_192KHZ:
  1674. sample_rate_val = 8;
  1675. break;
  1676. default:
  1677. sample_rate_val = 6;
  1678. break;
  1679. }
  1680. return sample_rate_val;
  1681. }
  1682. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1683. struct snd_ctl_elem_value *ucontrol)
  1684. {
  1685. int idx = mi2s_get_port_idx(kcontrol);
  1686. if (idx < 0)
  1687. return idx;
  1688. ucontrol->value.enumerated.item[0] =
  1689. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  1690. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1691. idx, mi2s_rx_cfg[idx].sample_rate,
  1692. ucontrol->value.enumerated.item[0]);
  1693. return 0;
  1694. }
  1695. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1696. struct snd_ctl_elem_value *ucontrol)
  1697. {
  1698. int idx = mi2s_get_port_idx(kcontrol);
  1699. if (idx < 0)
  1700. return idx;
  1701. mi2s_rx_cfg[idx].sample_rate =
  1702. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1703. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1704. idx, mi2s_rx_cfg[idx].sample_rate,
  1705. ucontrol->value.enumerated.item[0]);
  1706. return 0;
  1707. }
  1708. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1709. struct snd_ctl_elem_value *ucontrol)
  1710. {
  1711. int idx = mi2s_get_port_idx(kcontrol);
  1712. if (idx < 0)
  1713. return idx;
  1714. ucontrol->value.enumerated.item[0] =
  1715. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  1716. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1717. idx, mi2s_tx_cfg[idx].sample_rate,
  1718. ucontrol->value.enumerated.item[0]);
  1719. return 0;
  1720. }
  1721. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1722. struct snd_ctl_elem_value *ucontrol)
  1723. {
  1724. int idx = mi2s_get_port_idx(kcontrol);
  1725. if (idx < 0)
  1726. return idx;
  1727. mi2s_tx_cfg[idx].sample_rate =
  1728. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1729. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1730. idx, mi2s_tx_cfg[idx].sample_rate,
  1731. ucontrol->value.enumerated.item[0]);
  1732. return 0;
  1733. }
  1734. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  1735. struct snd_ctl_elem_value *ucontrol)
  1736. {
  1737. int idx = mi2s_get_port_idx(kcontrol);
  1738. if (idx < 0)
  1739. return idx;
  1740. ucontrol->value.enumerated.item[0] =
  1741. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  1742. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1743. idx, mi2s_rx_cfg[idx].bit_format,
  1744. ucontrol->value.enumerated.item[0]);
  1745. return 0;
  1746. }
  1747. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  1748. struct snd_ctl_elem_value *ucontrol)
  1749. {
  1750. int idx = mi2s_get_port_idx(kcontrol);
  1751. if (idx < 0)
  1752. return idx;
  1753. mi2s_rx_cfg[idx].bit_format =
  1754. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1755. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1756. idx, mi2s_rx_cfg[idx].bit_format,
  1757. ucontrol->value.enumerated.item[0]);
  1758. return 0;
  1759. }
  1760. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  1761. struct snd_ctl_elem_value *ucontrol)
  1762. {
  1763. int idx = mi2s_get_port_idx(kcontrol);
  1764. if (idx < 0)
  1765. return idx;
  1766. ucontrol->value.enumerated.item[0] =
  1767. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  1768. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1769. idx, mi2s_tx_cfg[idx].bit_format,
  1770. ucontrol->value.enumerated.item[0]);
  1771. return 0;
  1772. }
  1773. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  1774. struct snd_ctl_elem_value *ucontrol)
  1775. {
  1776. int idx = mi2s_get_port_idx(kcontrol);
  1777. if (idx < 0)
  1778. return idx;
  1779. mi2s_tx_cfg[idx].bit_format =
  1780. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1781. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1782. idx, mi2s_tx_cfg[idx].bit_format,
  1783. ucontrol->value.enumerated.item[0]);
  1784. return 0;
  1785. }
  1786. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  1787. struct snd_ctl_elem_value *ucontrol)
  1788. {
  1789. int idx = mi2s_get_port_idx(kcontrol);
  1790. if (idx < 0)
  1791. return idx;
  1792. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1793. idx, mi2s_rx_cfg[idx].channels);
  1794. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  1795. return 0;
  1796. }
  1797. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  1798. struct snd_ctl_elem_value *ucontrol)
  1799. {
  1800. int idx = mi2s_get_port_idx(kcontrol);
  1801. if (idx < 0)
  1802. return idx;
  1803. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1804. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1805. idx, mi2s_rx_cfg[idx].channels);
  1806. return 1;
  1807. }
  1808. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  1809. struct snd_ctl_elem_value *ucontrol)
  1810. {
  1811. int idx = mi2s_get_port_idx(kcontrol);
  1812. if (idx < 0)
  1813. return idx;
  1814. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1815. idx, mi2s_tx_cfg[idx].channels);
  1816. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  1817. return 0;
  1818. }
  1819. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  1820. struct snd_ctl_elem_value *ucontrol)
  1821. {
  1822. int idx = mi2s_get_port_idx(kcontrol);
  1823. if (idx < 0)
  1824. return idx;
  1825. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1826. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1827. idx, mi2s_tx_cfg[idx].channels);
  1828. return 1;
  1829. }
  1830. static int msm_get_port_id(int be_id)
  1831. {
  1832. int afe_port_id = 0;
  1833. switch (be_id) {
  1834. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  1835. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  1836. break;
  1837. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  1838. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  1839. break;
  1840. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  1841. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  1842. break;
  1843. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  1844. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  1845. break;
  1846. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  1847. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  1848. break;
  1849. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  1850. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  1851. break;
  1852. default:
  1853. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  1854. afe_port_id = -EINVAL;
  1855. }
  1856. return afe_port_id;
  1857. }
  1858. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  1859. {
  1860. u32 bit_per_sample = 0;
  1861. switch (bit_format) {
  1862. case SNDRV_PCM_FORMAT_S32_LE:
  1863. case SNDRV_PCM_FORMAT_S24_3LE:
  1864. case SNDRV_PCM_FORMAT_S24_LE:
  1865. bit_per_sample = 32;
  1866. break;
  1867. case SNDRV_PCM_FORMAT_S16_LE:
  1868. default:
  1869. bit_per_sample = 16;
  1870. break;
  1871. }
  1872. return bit_per_sample;
  1873. }
  1874. static void update_mi2s_clk_val(int dai_id, int stream)
  1875. {
  1876. u32 bit_per_sample = 0;
  1877. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  1878. bit_per_sample =
  1879. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  1880. mi2s_clk[dai_id].clk_freq_in_hz =
  1881. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1882. } else {
  1883. bit_per_sample =
  1884. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  1885. mi2s_clk[dai_id].clk_freq_in_hz =
  1886. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1887. }
  1888. }
  1889. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  1890. {
  1891. int ret = 0;
  1892. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1893. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1894. int port_id = 0;
  1895. int index = cpu_dai->id;
  1896. port_id = msm_get_port_id(rtd->dai_link->id);
  1897. if (port_id < 0) {
  1898. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  1899. ret = port_id;
  1900. goto err;
  1901. }
  1902. if (enable) {
  1903. update_mi2s_clk_val(index, substream->stream);
  1904. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  1905. mi2s_clk[index].clk_freq_in_hz);
  1906. }
  1907. mi2s_clk[index].enable = enable;
  1908. ret = afe_set_lpass_clock_v2(port_id,
  1909. &mi2s_clk[index]);
  1910. if (ret < 0) {
  1911. dev_err(rtd->card->dev,
  1912. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  1913. __func__, port_id, ret);
  1914. goto err;
  1915. }
  1916. err:
  1917. return ret;
  1918. }
  1919. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1920. {
  1921. int idx = 0;
  1922. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1923. sizeof("WSA_CDC_DMA_RX_0")))
  1924. idx = WSA_CDC_DMA_RX_0;
  1925. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1926. sizeof("WSA_CDC_DMA_RX_0")))
  1927. idx = WSA_CDC_DMA_RX_1;
  1928. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1929. sizeof("RX_CDC_DMA_RX_0")))
  1930. idx = RX_CDC_DMA_RX_0;
  1931. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1932. sizeof("RX_CDC_DMA_RX_1")))
  1933. idx = RX_CDC_DMA_RX_1;
  1934. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1935. sizeof("RX_CDC_DMA_RX_2")))
  1936. idx = RX_CDC_DMA_RX_2;
  1937. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1938. sizeof("RX_CDC_DMA_RX_3")))
  1939. idx = RX_CDC_DMA_RX_3;
  1940. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1941. sizeof("RX_CDC_DMA_RX_5")))
  1942. idx = RX_CDC_DMA_RX_5;
  1943. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1944. sizeof("WSA_CDC_DMA_TX_0")))
  1945. idx = WSA_CDC_DMA_TX_0;
  1946. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1947. sizeof("WSA_CDC_DMA_TX_1")))
  1948. idx = WSA_CDC_DMA_TX_1;
  1949. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1950. sizeof("WSA_CDC_DMA_TX_2")))
  1951. idx = WSA_CDC_DMA_TX_2;
  1952. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1953. sizeof("TX_CDC_DMA_TX_0")))
  1954. idx = TX_CDC_DMA_TX_0;
  1955. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1956. sizeof("TX_CDC_DMA_TX_3")))
  1957. idx = TX_CDC_DMA_TX_3;
  1958. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1959. sizeof("TX_CDC_DMA_TX_4")))
  1960. idx = TX_CDC_DMA_TX_4;
  1961. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
  1962. sizeof("VA_CDC_DMA_TX_0")))
  1963. idx = VA_CDC_DMA_TX_0;
  1964. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
  1965. sizeof("VA_CDC_DMA_TX_1")))
  1966. idx = VA_CDC_DMA_TX_1;
  1967. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
  1968. sizeof("VA_CDC_DMA_TX_2")))
  1969. idx = VA_CDC_DMA_TX_2;
  1970. else {
  1971. pr_err("%s: unsupported channel: %s\n",
  1972. __func__, kcontrol->id.name);
  1973. return -EINVAL;
  1974. }
  1975. return idx;
  1976. }
  1977. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1978. struct snd_ctl_elem_value *ucontrol)
  1979. {
  1980. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1981. if (ch_num < 0) {
  1982. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1983. return ch_num;
  1984. }
  1985. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1986. cdc_dma_rx_cfg[ch_num].channels - 1);
  1987. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1988. return 0;
  1989. }
  1990. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1991. struct snd_ctl_elem_value *ucontrol)
  1992. {
  1993. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1994. if (ch_num < 0) {
  1995. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1996. return ch_num;
  1997. }
  1998. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1999. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  2000. cdc_dma_rx_cfg[ch_num].channels);
  2001. return 1;
  2002. }
  2003. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  2004. struct snd_ctl_elem_value *ucontrol)
  2005. {
  2006. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2007. if (ch_num < 0) {
  2008. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2009. return ch_num;
  2010. }
  2011. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  2012. case SNDRV_PCM_FORMAT_S32_LE:
  2013. ucontrol->value.integer.value[0] = 3;
  2014. break;
  2015. case SNDRV_PCM_FORMAT_S24_3LE:
  2016. ucontrol->value.integer.value[0] = 2;
  2017. break;
  2018. case SNDRV_PCM_FORMAT_S24_LE:
  2019. ucontrol->value.integer.value[0] = 1;
  2020. break;
  2021. case SNDRV_PCM_FORMAT_S16_LE:
  2022. default:
  2023. ucontrol->value.integer.value[0] = 0;
  2024. break;
  2025. }
  2026. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  2027. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  2028. ucontrol->value.integer.value[0]);
  2029. return 0;
  2030. }
  2031. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  2032. struct snd_ctl_elem_value *ucontrol)
  2033. {
  2034. int rc = 0;
  2035. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2036. if (ch_num < 0) {
  2037. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2038. return ch_num;
  2039. }
  2040. switch (ucontrol->value.integer.value[0]) {
  2041. case 3:
  2042. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  2043. break;
  2044. case 2:
  2045. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2046. break;
  2047. case 1:
  2048. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2049. break;
  2050. case 0:
  2051. default:
  2052. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2053. break;
  2054. }
  2055. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  2056. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  2057. ucontrol->value.integer.value[0]);
  2058. return rc;
  2059. }
  2060. static int cdc_dma_get_sample_rate_val(int sample_rate)
  2061. {
  2062. int sample_rate_val = 0;
  2063. switch (sample_rate) {
  2064. case SAMPLING_RATE_8KHZ:
  2065. sample_rate_val = 0;
  2066. break;
  2067. case SAMPLING_RATE_11P025KHZ:
  2068. sample_rate_val = 1;
  2069. break;
  2070. case SAMPLING_RATE_16KHZ:
  2071. sample_rate_val = 2;
  2072. break;
  2073. case SAMPLING_RATE_22P05KHZ:
  2074. sample_rate_val = 3;
  2075. break;
  2076. case SAMPLING_RATE_32KHZ:
  2077. sample_rate_val = 4;
  2078. break;
  2079. case SAMPLING_RATE_44P1KHZ:
  2080. sample_rate_val = 5;
  2081. break;
  2082. case SAMPLING_RATE_48KHZ:
  2083. sample_rate_val = 6;
  2084. break;
  2085. case SAMPLING_RATE_88P2KHZ:
  2086. sample_rate_val = 7;
  2087. break;
  2088. case SAMPLING_RATE_96KHZ:
  2089. sample_rate_val = 8;
  2090. break;
  2091. case SAMPLING_RATE_176P4KHZ:
  2092. sample_rate_val = 9;
  2093. break;
  2094. case SAMPLING_RATE_192KHZ:
  2095. sample_rate_val = 10;
  2096. break;
  2097. case SAMPLING_RATE_352P8KHZ:
  2098. sample_rate_val = 11;
  2099. break;
  2100. case SAMPLING_RATE_384KHZ:
  2101. sample_rate_val = 12;
  2102. break;
  2103. default:
  2104. sample_rate_val = 6;
  2105. break;
  2106. }
  2107. return sample_rate_val;
  2108. }
  2109. static int cdc_dma_get_sample_rate(int value)
  2110. {
  2111. int sample_rate = 0;
  2112. switch (value) {
  2113. case 0:
  2114. sample_rate = SAMPLING_RATE_8KHZ;
  2115. break;
  2116. case 1:
  2117. sample_rate = SAMPLING_RATE_11P025KHZ;
  2118. break;
  2119. case 2:
  2120. sample_rate = SAMPLING_RATE_16KHZ;
  2121. break;
  2122. case 3:
  2123. sample_rate = SAMPLING_RATE_22P05KHZ;
  2124. break;
  2125. case 4:
  2126. sample_rate = SAMPLING_RATE_32KHZ;
  2127. break;
  2128. case 5:
  2129. sample_rate = SAMPLING_RATE_44P1KHZ;
  2130. break;
  2131. case 6:
  2132. sample_rate = SAMPLING_RATE_48KHZ;
  2133. break;
  2134. case 7:
  2135. sample_rate = SAMPLING_RATE_88P2KHZ;
  2136. break;
  2137. case 8:
  2138. sample_rate = SAMPLING_RATE_96KHZ;
  2139. break;
  2140. case 9:
  2141. sample_rate = SAMPLING_RATE_176P4KHZ;
  2142. break;
  2143. case 10:
  2144. sample_rate = SAMPLING_RATE_192KHZ;
  2145. break;
  2146. case 11:
  2147. sample_rate = SAMPLING_RATE_352P8KHZ;
  2148. break;
  2149. case 12:
  2150. sample_rate = SAMPLING_RATE_384KHZ;
  2151. break;
  2152. default:
  2153. sample_rate = SAMPLING_RATE_48KHZ;
  2154. break;
  2155. }
  2156. return sample_rate;
  2157. }
  2158. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2159. struct snd_ctl_elem_value *ucontrol)
  2160. {
  2161. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2162. if (ch_num < 0) {
  2163. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2164. return ch_num;
  2165. }
  2166. ucontrol->value.enumerated.item[0] =
  2167. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  2168. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  2169. cdc_dma_rx_cfg[ch_num].sample_rate);
  2170. return 0;
  2171. }
  2172. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2173. struct snd_ctl_elem_value *ucontrol)
  2174. {
  2175. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2176. if (ch_num < 0) {
  2177. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2178. return ch_num;
  2179. }
  2180. cdc_dma_rx_cfg[ch_num].sample_rate =
  2181. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2182. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  2183. __func__, ucontrol->value.enumerated.item[0],
  2184. cdc_dma_rx_cfg[ch_num].sample_rate);
  2185. return 0;
  2186. }
  2187. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  2188. struct snd_ctl_elem_value *ucontrol)
  2189. {
  2190. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2191. if (ch_num < 0) {
  2192. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2193. return ch_num;
  2194. }
  2195. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2196. cdc_dma_tx_cfg[ch_num].channels);
  2197. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  2198. return 0;
  2199. }
  2200. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  2201. struct snd_ctl_elem_value *ucontrol)
  2202. {
  2203. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2204. if (ch_num < 0) {
  2205. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2206. return ch_num;
  2207. }
  2208. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  2209. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2210. cdc_dma_tx_cfg[ch_num].channels);
  2211. return 1;
  2212. }
  2213. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2214. struct snd_ctl_elem_value *ucontrol)
  2215. {
  2216. int sample_rate_val;
  2217. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2218. if (ch_num < 0) {
  2219. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2220. return ch_num;
  2221. }
  2222. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  2223. case SAMPLING_RATE_384KHZ:
  2224. sample_rate_val = 12;
  2225. break;
  2226. case SAMPLING_RATE_352P8KHZ:
  2227. sample_rate_val = 11;
  2228. break;
  2229. case SAMPLING_RATE_192KHZ:
  2230. sample_rate_val = 10;
  2231. break;
  2232. case SAMPLING_RATE_176P4KHZ:
  2233. sample_rate_val = 9;
  2234. break;
  2235. case SAMPLING_RATE_96KHZ:
  2236. sample_rate_val = 8;
  2237. break;
  2238. case SAMPLING_RATE_88P2KHZ:
  2239. sample_rate_val = 7;
  2240. break;
  2241. case SAMPLING_RATE_48KHZ:
  2242. sample_rate_val = 6;
  2243. break;
  2244. case SAMPLING_RATE_44P1KHZ:
  2245. sample_rate_val = 5;
  2246. break;
  2247. case SAMPLING_RATE_32KHZ:
  2248. sample_rate_val = 4;
  2249. break;
  2250. case SAMPLING_RATE_22P05KHZ:
  2251. sample_rate_val = 3;
  2252. break;
  2253. case SAMPLING_RATE_16KHZ:
  2254. sample_rate_val = 2;
  2255. break;
  2256. case SAMPLING_RATE_11P025KHZ:
  2257. sample_rate_val = 1;
  2258. break;
  2259. case SAMPLING_RATE_8KHZ:
  2260. sample_rate_val = 0;
  2261. break;
  2262. default:
  2263. sample_rate_val = 6;
  2264. break;
  2265. }
  2266. ucontrol->value.integer.value[0] = sample_rate_val;
  2267. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  2268. cdc_dma_tx_cfg[ch_num].sample_rate);
  2269. return 0;
  2270. }
  2271. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2272. struct snd_ctl_elem_value *ucontrol)
  2273. {
  2274. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2275. if (ch_num < 0) {
  2276. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2277. return ch_num;
  2278. }
  2279. switch (ucontrol->value.integer.value[0]) {
  2280. case 12:
  2281. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  2282. break;
  2283. case 11:
  2284. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  2285. break;
  2286. case 10:
  2287. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  2288. break;
  2289. case 9:
  2290. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  2291. break;
  2292. case 8:
  2293. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  2294. break;
  2295. case 7:
  2296. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  2297. break;
  2298. case 6:
  2299. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2300. break;
  2301. case 5:
  2302. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  2303. break;
  2304. case 4:
  2305. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  2306. break;
  2307. case 3:
  2308. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  2309. break;
  2310. case 2:
  2311. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  2312. break;
  2313. case 1:
  2314. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  2315. break;
  2316. case 0:
  2317. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  2318. break;
  2319. default:
  2320. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2321. break;
  2322. }
  2323. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  2324. __func__, ucontrol->value.integer.value[0],
  2325. cdc_dma_tx_cfg[ch_num].sample_rate);
  2326. return 0;
  2327. }
  2328. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  2329. struct snd_ctl_elem_value *ucontrol)
  2330. {
  2331. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2332. if (ch_num < 0) {
  2333. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2334. return ch_num;
  2335. }
  2336. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  2337. case SNDRV_PCM_FORMAT_S32_LE:
  2338. ucontrol->value.integer.value[0] = 3;
  2339. break;
  2340. case SNDRV_PCM_FORMAT_S24_3LE:
  2341. ucontrol->value.integer.value[0] = 2;
  2342. break;
  2343. case SNDRV_PCM_FORMAT_S24_LE:
  2344. ucontrol->value.integer.value[0] = 1;
  2345. break;
  2346. case SNDRV_PCM_FORMAT_S16_LE:
  2347. default:
  2348. ucontrol->value.integer.value[0] = 0;
  2349. break;
  2350. }
  2351. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2352. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2353. ucontrol->value.integer.value[0]);
  2354. return 0;
  2355. }
  2356. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  2357. struct snd_ctl_elem_value *ucontrol)
  2358. {
  2359. int rc = 0;
  2360. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2361. if (ch_num < 0) {
  2362. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2363. return ch_num;
  2364. }
  2365. switch (ucontrol->value.integer.value[0]) {
  2366. case 3:
  2367. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  2368. break;
  2369. case 2:
  2370. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2371. break;
  2372. case 1:
  2373. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2374. break;
  2375. case 0:
  2376. default:
  2377. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2378. break;
  2379. }
  2380. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2381. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2382. ucontrol->value.integer.value[0]);
  2383. return rc;
  2384. }
  2385. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  2386. {
  2387. int idx = 0;
  2388. switch (be_id) {
  2389. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  2390. idx = WSA_CDC_DMA_RX_0;
  2391. break;
  2392. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  2393. idx = WSA_CDC_DMA_TX_0;
  2394. break;
  2395. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  2396. idx = WSA_CDC_DMA_RX_1;
  2397. break;
  2398. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  2399. idx = WSA_CDC_DMA_TX_1;
  2400. break;
  2401. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  2402. idx = WSA_CDC_DMA_TX_2;
  2403. break;
  2404. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  2405. idx = RX_CDC_DMA_RX_0;
  2406. break;
  2407. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  2408. idx = RX_CDC_DMA_RX_1;
  2409. break;
  2410. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  2411. idx = RX_CDC_DMA_RX_2;
  2412. break;
  2413. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  2414. idx = RX_CDC_DMA_RX_3;
  2415. break;
  2416. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  2417. idx = RX_CDC_DMA_RX_5;
  2418. break;
  2419. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  2420. idx = TX_CDC_DMA_TX_0;
  2421. break;
  2422. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  2423. idx = TX_CDC_DMA_TX_3;
  2424. break;
  2425. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  2426. idx = TX_CDC_DMA_TX_4;
  2427. break;
  2428. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  2429. idx = VA_CDC_DMA_TX_0;
  2430. break;
  2431. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  2432. idx = VA_CDC_DMA_TX_1;
  2433. break;
  2434. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  2435. idx = VA_CDC_DMA_TX_2;
  2436. break;
  2437. default:
  2438. idx = RX_CDC_DMA_RX_0;
  2439. break;
  2440. }
  2441. return idx;
  2442. }
  2443. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2444. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2445. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2446. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2447. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2448. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2449. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2450. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2451. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2452. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2453. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2454. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2455. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2456. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2457. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2458. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2459. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2460. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2461. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2462. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2463. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2464. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2465. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2466. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2467. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2468. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2469. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2470. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
  2471. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2472. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
  2473. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2474. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
  2475. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2476. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2477. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2478. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2479. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2480. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2481. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2482. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2483. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2484. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2485. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2486. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2487. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2488. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2489. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2490. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2491. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2492. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2493. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2494. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2495. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2496. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2497. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2498. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2499. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2500. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
  2501. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2502. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
  2503. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2504. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
  2505. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2506. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2507. wsa_cdc_dma_rx_0_sample_rate,
  2508. cdc_dma_rx_sample_rate_get,
  2509. cdc_dma_rx_sample_rate_put),
  2510. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2511. wsa_cdc_dma_rx_1_sample_rate,
  2512. cdc_dma_rx_sample_rate_get,
  2513. cdc_dma_rx_sample_rate_put),
  2514. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2515. rx_cdc_dma_rx_0_sample_rate,
  2516. cdc_dma_rx_sample_rate_get,
  2517. cdc_dma_rx_sample_rate_put),
  2518. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2519. rx_cdc_dma_rx_1_sample_rate,
  2520. cdc_dma_rx_sample_rate_get,
  2521. cdc_dma_rx_sample_rate_put),
  2522. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2523. rx_cdc_dma_rx_2_sample_rate,
  2524. cdc_dma_rx_sample_rate_get,
  2525. cdc_dma_rx_sample_rate_put),
  2526. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2527. rx_cdc_dma_rx_3_sample_rate,
  2528. cdc_dma_rx_sample_rate_get,
  2529. cdc_dma_rx_sample_rate_put),
  2530. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2531. rx_cdc_dma_rx_5_sample_rate,
  2532. cdc_dma_rx_sample_rate_get,
  2533. cdc_dma_rx_sample_rate_put),
  2534. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2535. wsa_cdc_dma_tx_0_sample_rate,
  2536. cdc_dma_tx_sample_rate_get,
  2537. cdc_dma_tx_sample_rate_put),
  2538. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2539. wsa_cdc_dma_tx_1_sample_rate,
  2540. cdc_dma_tx_sample_rate_get,
  2541. cdc_dma_tx_sample_rate_put),
  2542. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2543. wsa_cdc_dma_tx_2_sample_rate,
  2544. cdc_dma_tx_sample_rate_get,
  2545. cdc_dma_tx_sample_rate_put),
  2546. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2547. tx_cdc_dma_tx_0_sample_rate,
  2548. cdc_dma_tx_sample_rate_get,
  2549. cdc_dma_tx_sample_rate_put),
  2550. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2551. tx_cdc_dma_tx_3_sample_rate,
  2552. cdc_dma_tx_sample_rate_get,
  2553. cdc_dma_tx_sample_rate_put),
  2554. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2555. tx_cdc_dma_tx_4_sample_rate,
  2556. cdc_dma_tx_sample_rate_get,
  2557. cdc_dma_tx_sample_rate_put),
  2558. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
  2559. va_cdc_dma_tx_0_sample_rate,
  2560. cdc_dma_tx_sample_rate_get,
  2561. cdc_dma_tx_sample_rate_put),
  2562. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
  2563. va_cdc_dma_tx_1_sample_rate,
  2564. cdc_dma_tx_sample_rate_get,
  2565. cdc_dma_tx_sample_rate_put),
  2566. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
  2567. va_cdc_dma_tx_2_sample_rate,
  2568. cdc_dma_tx_sample_rate_get,
  2569. cdc_dma_tx_sample_rate_put),
  2570. };
  2571. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2572. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  2573. usb_audio_rx_sample_rate_get,
  2574. usb_audio_rx_sample_rate_put),
  2575. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  2576. usb_audio_tx_sample_rate_get,
  2577. usb_audio_tx_sample_rate_put),
  2578. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2579. tdm_rx_sample_rate_get,
  2580. tdm_rx_sample_rate_put),
  2581. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2582. tdm_rx_sample_rate_get,
  2583. tdm_rx_sample_rate_put),
  2584. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2585. tdm_rx_sample_rate_get,
  2586. tdm_rx_sample_rate_put),
  2587. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2588. tdm_tx_sample_rate_get,
  2589. tdm_tx_sample_rate_put),
  2590. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2591. tdm_tx_sample_rate_get,
  2592. tdm_tx_sample_rate_put),
  2593. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2594. tdm_tx_sample_rate_get,
  2595. tdm_tx_sample_rate_put),
  2596. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2597. aux_pcm_rx_sample_rate_get,
  2598. aux_pcm_rx_sample_rate_put),
  2599. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  2600. aux_pcm_rx_sample_rate_get,
  2601. aux_pcm_rx_sample_rate_put),
  2602. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  2603. aux_pcm_rx_sample_rate_get,
  2604. aux_pcm_rx_sample_rate_put),
  2605. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2606. aux_pcm_tx_sample_rate_get,
  2607. aux_pcm_tx_sample_rate_put),
  2608. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  2609. aux_pcm_tx_sample_rate_get,
  2610. aux_pcm_tx_sample_rate_put),
  2611. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  2612. aux_pcm_tx_sample_rate_get,
  2613. aux_pcm_tx_sample_rate_put),
  2614. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  2615. mi2s_rx_sample_rate_get,
  2616. mi2s_rx_sample_rate_put),
  2617. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  2618. mi2s_rx_sample_rate_get,
  2619. mi2s_rx_sample_rate_put),
  2620. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  2621. mi2s_rx_sample_rate_get,
  2622. mi2s_rx_sample_rate_put),
  2623. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  2624. mi2s_tx_sample_rate_get,
  2625. mi2s_tx_sample_rate_put),
  2626. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  2627. mi2s_tx_sample_rate_get,
  2628. mi2s_tx_sample_rate_put),
  2629. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  2630. mi2s_tx_sample_rate_get,
  2631. mi2s_tx_sample_rate_put),
  2632. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  2633. usb_audio_rx_format_get, usb_audio_rx_format_put),
  2634. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  2635. usb_audio_tx_format_get, usb_audio_tx_format_put),
  2636. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  2637. tdm_rx_format_get,
  2638. tdm_rx_format_put),
  2639. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  2640. tdm_rx_format_get,
  2641. tdm_rx_format_put),
  2642. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  2643. tdm_rx_format_get,
  2644. tdm_rx_format_put),
  2645. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  2646. tdm_tx_format_get,
  2647. tdm_tx_format_put),
  2648. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  2649. tdm_tx_format_get,
  2650. tdm_tx_format_put),
  2651. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  2652. tdm_tx_format_get,
  2653. tdm_tx_format_put),
  2654. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2655. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2656. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  2657. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2658. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2659. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2660. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2661. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2662. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  2663. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2664. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2665. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2666. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  2667. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2668. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  2669. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2670. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  2671. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2672. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  2673. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2674. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  2675. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2676. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  2677. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2678. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2679. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2680. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  2681. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  2682. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  2683. proxy_rx_ch_get, proxy_rx_ch_put),
  2684. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  2685. tdm_rx_ch_get,
  2686. tdm_rx_ch_put),
  2687. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  2688. tdm_rx_ch_get,
  2689. tdm_rx_ch_put),
  2690. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  2691. tdm_rx_ch_get,
  2692. tdm_rx_ch_put),
  2693. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  2694. tdm_tx_ch_get,
  2695. tdm_tx_ch_put),
  2696. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  2697. tdm_tx_ch_get,
  2698. tdm_tx_ch_put),
  2699. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  2700. tdm_tx_ch_get,
  2701. tdm_tx_ch_put),
  2702. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  2703. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2704. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  2705. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2706. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  2707. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2708. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  2709. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2710. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  2711. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2712. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  2713. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2714. };
  2715. static const struct snd_kcontrol_new msm_snd_controls[] = {
  2716. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  2717. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  2718. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2719. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2720. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2721. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2722. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  2723. ext_disp_rx_format_get, ext_disp_rx_format_put),
  2724. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2725. aux_pcm_rx_sample_rate_get,
  2726. aux_pcm_rx_sample_rate_put),
  2727. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2728. aux_pcm_tx_sample_rate_get,
  2729. aux_pcm_tx_sample_rate_put),
  2730. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  2731. ext_disp_rx_sample_rate_get,
  2732. ext_disp_rx_sample_rate_put),
  2733. };
  2734. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  2735. {
  2736. int idx;
  2737. switch (be_id) {
  2738. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  2739. idx = EXT_DISP_RX_IDX_DP;
  2740. break;
  2741. default:
  2742. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  2743. idx = -EINVAL;
  2744. break;
  2745. }
  2746. return idx;
  2747. }
  2748. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  2749. struct snd_pcm_hw_params *params)
  2750. {
  2751. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  2752. struct snd_interval *rate = hw_param_interval(params,
  2753. SNDRV_PCM_HW_PARAM_RATE);
  2754. struct snd_interval *channels = hw_param_interval(params,
  2755. SNDRV_PCM_HW_PARAM_CHANNELS);
  2756. int idx, rc = 0;
  2757. pr_debug("%s: format = %d, rate = %d\n",
  2758. __func__, params_format(params), params_rate(params));
  2759. switch (dai_link->id) {
  2760. case MSM_BACKEND_DAI_USB_RX:
  2761. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2762. usb_rx_cfg.bit_format);
  2763. rate->min = rate->max = usb_rx_cfg.sample_rate;
  2764. channels->min = channels->max = usb_rx_cfg.channels;
  2765. break;
  2766. case MSM_BACKEND_DAI_USB_TX:
  2767. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2768. usb_tx_cfg.bit_format);
  2769. rate->min = rate->max = usb_tx_cfg.sample_rate;
  2770. channels->min = channels->max = usb_tx_cfg.channels;
  2771. break;
  2772. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  2773. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  2774. if (idx < 0) {
  2775. pr_err("%s: Incorrect ext disp idx %d\n",
  2776. __func__, idx);
  2777. rc = idx;
  2778. goto done;
  2779. }
  2780. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2781. ext_disp_rx_cfg[idx].bit_format);
  2782. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  2783. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  2784. break;
  2785. case MSM_BACKEND_DAI_AFE_PCM_RX:
  2786. channels->min = channels->max = proxy_rx_cfg.channels;
  2787. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  2788. break;
  2789. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  2790. channels->min = channels->max =
  2791. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  2792. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2793. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  2794. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  2795. break;
  2796. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  2797. channels->min = channels->max =
  2798. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  2799. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2800. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  2801. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  2802. break;
  2803. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  2804. channels->min = channels->max =
  2805. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  2806. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2807. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  2808. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  2809. break;
  2810. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  2811. channels->min = channels->max =
  2812. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  2813. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2814. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  2815. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  2816. break;
  2817. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  2818. channels->min = channels->max =
  2819. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  2820. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2821. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  2822. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  2823. break;
  2824. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  2825. channels->min = channels->max =
  2826. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  2827. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2828. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  2829. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  2830. break;
  2831. case MSM_BACKEND_DAI_AUXPCM_RX:
  2832. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2833. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  2834. rate->min = rate->max =
  2835. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  2836. channels->min = channels->max =
  2837. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  2838. break;
  2839. case MSM_BACKEND_DAI_AUXPCM_TX:
  2840. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2841. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  2842. rate->min = rate->max =
  2843. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  2844. channels->min = channels->max =
  2845. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  2846. break;
  2847. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  2848. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2849. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  2850. rate->min = rate->max =
  2851. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  2852. channels->min = channels->max =
  2853. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  2854. break;
  2855. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  2856. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2857. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  2858. rate->min = rate->max =
  2859. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  2860. channels->min = channels->max =
  2861. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  2862. break;
  2863. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  2864. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2865. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  2866. rate->min = rate->max =
  2867. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  2868. channels->min = channels->max =
  2869. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  2870. break;
  2871. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  2872. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2873. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  2874. rate->min = rate->max =
  2875. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  2876. channels->min = channels->max =
  2877. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  2878. break;
  2879. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  2880. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2881. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  2882. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  2883. channels->min = channels->max =
  2884. mi2s_rx_cfg[PRIM_MI2S].channels;
  2885. break;
  2886. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  2887. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2888. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  2889. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  2890. channels->min = channels->max =
  2891. mi2s_tx_cfg[PRIM_MI2S].channels;
  2892. break;
  2893. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  2894. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2895. mi2s_rx_cfg[SEC_MI2S].bit_format);
  2896. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  2897. channels->min = channels->max =
  2898. mi2s_rx_cfg[SEC_MI2S].channels;
  2899. break;
  2900. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  2901. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2902. mi2s_tx_cfg[SEC_MI2S].bit_format);
  2903. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  2904. channels->min = channels->max =
  2905. mi2s_tx_cfg[SEC_MI2S].channels;
  2906. break;
  2907. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  2908. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2909. mi2s_rx_cfg[TERT_MI2S].bit_format);
  2910. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  2911. channels->min = channels->max =
  2912. mi2s_rx_cfg[TERT_MI2S].channels;
  2913. break;
  2914. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  2915. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2916. mi2s_tx_cfg[TERT_MI2S].bit_format);
  2917. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  2918. channels->min = channels->max =
  2919. mi2s_tx_cfg[TERT_MI2S].channels;
  2920. break;
  2921. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  2922. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  2923. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  2924. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  2925. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  2926. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  2927. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  2928. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2929. cdc_dma_rx_cfg[idx].bit_format);
  2930. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  2931. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  2932. break;
  2933. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  2934. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  2935. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  2936. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  2937. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  2938. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  2939. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  2940. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  2941. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  2942. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2943. cdc_dma_tx_cfg[idx].bit_format);
  2944. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  2945. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  2946. break;
  2947. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  2948. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2949. SNDRV_PCM_FORMAT_S32_LE);
  2950. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  2951. channels->min = channels->max = msm_vi_feed_tx_ch;
  2952. break;
  2953. default:
  2954. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  2955. break;
  2956. }
  2957. done:
  2958. return rc;
  2959. }
  2960. static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
  2961. {
  2962. struct snd_soc_card *card = component->card;
  2963. struct msm_asoc_mach_data *pdata =
  2964. snd_soc_card_get_drvdata(card);
  2965. if (!pdata->fsa_handle)
  2966. return false;
  2967. return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
  2968. }
  2969. static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
  2970. {
  2971. int value = 0;
  2972. bool ret = false;
  2973. struct snd_soc_card *card;
  2974. struct msm_asoc_mach_data *pdata;
  2975. if (!component) {
  2976. pr_err("%s component is NULL\n", __func__);
  2977. return false;
  2978. }
  2979. card = component->card;
  2980. pdata = snd_soc_card_get_drvdata(card);
  2981. if (!pdata)
  2982. return false;
  2983. if (wcd_mbhc_cfg.enable_usbc_analog)
  2984. return msm_usbc_swap_gnd_mic(component, active);
  2985. /* if usbc is not defined, swap using us_euro_gpio_p */
  2986. if (pdata->us_euro_gpio_p) {
  2987. value = msm_cdc_pinctrl_get_state(
  2988. pdata->us_euro_gpio_p);
  2989. if (value)
  2990. msm_cdc_pinctrl_select_sleep_state(
  2991. pdata->us_euro_gpio_p);
  2992. else
  2993. msm_cdc_pinctrl_select_active_state(
  2994. pdata->us_euro_gpio_p);
  2995. dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
  2996. __func__, value, !value);
  2997. ret = true;
  2998. }
  2999. return ret;
  3000. }
  3001. static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  3002. struct snd_pcm_hw_params *params)
  3003. {
  3004. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3005. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3006. int ret = 0;
  3007. int slot_width = 32;
  3008. int channels, slots;
  3009. unsigned int slot_mask, rate, clk_freq;
  3010. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  3011. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  3012. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  3013. switch (cpu_dai->id) {
  3014. case AFE_PORT_ID_PRIMARY_TDM_RX:
  3015. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3016. break;
  3017. case AFE_PORT_ID_SECONDARY_TDM_RX:
  3018. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3019. break;
  3020. case AFE_PORT_ID_TERTIARY_TDM_RX:
  3021. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3022. break;
  3023. case AFE_PORT_ID_PRIMARY_TDM_TX:
  3024. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3025. break;
  3026. case AFE_PORT_ID_SECONDARY_TDM_TX:
  3027. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3028. break;
  3029. case AFE_PORT_ID_TERTIARY_TDM_TX:
  3030. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3031. break;
  3032. default:
  3033. pr_err("%s: dai id 0x%x not supported\n",
  3034. __func__, cpu_dai->id);
  3035. return -EINVAL;
  3036. }
  3037. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3038. /*2 slot config - bits 0 and 1 set for the first two slots */
  3039. slot_mask = 0x0000FFFF >> (16 - slots);
  3040. channels = slots;
  3041. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  3042. __func__, slot_width, slots);
  3043. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  3044. slots, slot_width);
  3045. if (ret < 0) {
  3046. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  3047. __func__, ret);
  3048. goto end;
  3049. }
  3050. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3051. 0, NULL, channels, slot_offset);
  3052. if (ret < 0) {
  3053. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  3054. __func__, ret);
  3055. goto end;
  3056. }
  3057. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  3058. /*2 slot config - bits 0 and 1 set for the first two slots */
  3059. slot_mask = 0x0000FFFF >> (16 - slots);
  3060. channels = slots;
  3061. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  3062. __func__, slot_width, slots);
  3063. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  3064. slots, slot_width);
  3065. if (ret < 0) {
  3066. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  3067. __func__, ret);
  3068. goto end;
  3069. }
  3070. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3071. channels, slot_offset, 0, NULL);
  3072. if (ret < 0) {
  3073. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  3074. __func__, ret);
  3075. goto end;
  3076. }
  3077. } else {
  3078. ret = -EINVAL;
  3079. pr_err("%s: invalid use case, err:%d\n",
  3080. __func__, ret);
  3081. goto end;
  3082. }
  3083. rate = params_rate(params);
  3084. clk_freq = rate * slot_width * slots;
  3085. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  3086. if (ret < 0)
  3087. pr_err("%s: failed to set tdm clk, err:%d\n",
  3088. __func__, ret);
  3089. end:
  3090. return ret;
  3091. }
  3092. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  3093. struct snd_pcm_hw_params *params)
  3094. {
  3095. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3096. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3097. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3098. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3099. int ret = 0;
  3100. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  3101. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3102. u32 user_set_tx_ch = 0;
  3103. u32 user_set_rx_ch = 0;
  3104. u32 ch_id;
  3105. ret = snd_soc_dai_get_channel_map(codec_dai,
  3106. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  3107. &rx_ch_cdc_dma);
  3108. if (ret < 0) {
  3109. pr_err("%s: failed to get codec chan map, err:%d\n",
  3110. __func__, ret);
  3111. goto err;
  3112. }
  3113. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3114. switch (dai_link->id) {
  3115. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3116. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3117. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3118. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3119. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3120. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3121. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  3122. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3123. {
  3124. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3125. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  3126. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  3127. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  3128. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  3129. user_set_rx_ch, &rx_ch_cdc_dma);
  3130. if (ret < 0) {
  3131. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3132. __func__, ret);
  3133. goto err;
  3134. }
  3135. }
  3136. break;
  3137. }
  3138. } else {
  3139. switch (dai_link->id) {
  3140. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3141. {
  3142. user_set_tx_ch = msm_vi_feed_tx_ch;
  3143. }
  3144. break;
  3145. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3146. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3147. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3148. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3149. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3150. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3151. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3152. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3153. {
  3154. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3155. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  3156. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  3157. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  3158. }
  3159. break;
  3160. }
  3161. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  3162. &tx_ch_cdc_dma, 0, 0);
  3163. if (ret < 0) {
  3164. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3165. __func__, ret);
  3166. goto err;
  3167. }
  3168. }
  3169. err:
  3170. return ret;
  3171. }
  3172. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  3173. {
  3174. cpumask_t mask;
  3175. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  3176. pm_qos_remove_request(&substream->latency_pm_qos_req);
  3177. cpumask_clear(&mask);
  3178. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  3179. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  3180. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  3181. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  3182. pm_qos_add_request(&substream->latency_pm_qos_req,
  3183. PM_QOS_CPU_DMA_LATENCY,
  3184. MSM_LL_QOS_VALUE);
  3185. return 0;
  3186. }
  3187. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  3188. {
  3189. int ret = 0;
  3190. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3191. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3192. int index = cpu_dai->id;
  3193. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  3194. dev_dbg(rtd->card->dev,
  3195. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  3196. __func__, substream->name, substream->stream,
  3197. cpu_dai->name, cpu_dai->id);
  3198. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3199. ret = -EINVAL;
  3200. dev_err(rtd->card->dev,
  3201. "%s: CPU DAI id (%d) out of range\n",
  3202. __func__, cpu_dai->id);
  3203. goto err;
  3204. }
  3205. /*
  3206. * Mutex protection in case the same MI2S
  3207. * interface using for both TX and RX so
  3208. * that the same clock won't be enable twice.
  3209. */
  3210. mutex_lock(&mi2s_intf_conf[index].lock);
  3211. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  3212. /* Check if msm needs to provide the clock to the interface */
  3213. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  3214. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  3215. fmt = SND_SOC_DAIFMT_CBM_CFM;
  3216. }
  3217. ret = msm_mi2s_set_sclk(substream, true);
  3218. if (ret < 0) {
  3219. dev_err(rtd->card->dev,
  3220. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  3221. __func__, ret);
  3222. goto clean_up;
  3223. }
  3224. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  3225. if (ret < 0) {
  3226. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  3227. __func__, index, ret);
  3228. goto clk_off;
  3229. }
  3230. }
  3231. clk_off:
  3232. if (ret < 0)
  3233. msm_mi2s_set_sclk(substream, false);
  3234. clean_up:
  3235. if (ret < 0)
  3236. mi2s_intf_conf[index].ref_cnt--;
  3237. mutex_unlock(&mi2s_intf_conf[index].lock);
  3238. err:
  3239. return ret;
  3240. }
  3241. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  3242. {
  3243. int ret = 0;
  3244. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3245. int index = rtd->cpu_dai->id;
  3246. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  3247. substream->name, substream->stream);
  3248. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3249. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  3250. return;
  3251. }
  3252. mutex_lock(&mi2s_intf_conf[index].lock);
  3253. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  3254. ret = msm_mi2s_set_sclk(substream, false);
  3255. if (ret < 0)
  3256. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  3257. __func__, index, ret);
  3258. }
  3259. mutex_unlock(&mi2s_intf_conf[index].lock);
  3260. }
  3261. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  3262. struct snd_pcm_hw_params *params)
  3263. {
  3264. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3265. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3266. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3267. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3268. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  3269. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3270. int ret = 0;
  3271. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  3272. codec_dai->name, codec_dai->id);
  3273. ret = snd_soc_dai_get_channel_map(codec_dai,
  3274. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3275. if (ret) {
  3276. dev_err(rtd->dev,
  3277. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  3278. __func__, ret);
  3279. goto err;
  3280. }
  3281. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  3282. __func__, tx_ch_cnt, dai_link->id);
  3283. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3284. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  3285. if (ret)
  3286. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  3287. __func__, ret);
  3288. err:
  3289. return ret;
  3290. }
  3291. static struct snd_soc_ops kona_tdm_be_ops = {
  3292. .hw_params = kona_tdm_snd_hw_params,
  3293. };
  3294. static struct snd_soc_ops msm_mi2s_be_ops = {
  3295. .startup = msm_mi2s_snd_startup,
  3296. .shutdown = msm_mi2s_snd_shutdown,
  3297. };
  3298. static struct snd_soc_ops msm_fe_qos_ops = {
  3299. .prepare = msm_fe_qos_prepare,
  3300. };
  3301. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  3302. .hw_params = msm_snd_cdc_dma_hw_params,
  3303. };
  3304. static struct snd_soc_ops msm_wcn_ops = {
  3305. .hw_params = msm_wcn_hw_params,
  3306. };
  3307. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3308. struct snd_kcontrol *kcontrol, int event)
  3309. {
  3310. struct msm_asoc_mach_data *pdata = NULL;
  3311. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  3312. int ret = 0;
  3313. u32 dmic_idx;
  3314. int *dmic_gpio_cnt;
  3315. struct device_node *dmic_gpio;
  3316. char *wname;
  3317. wname = strpbrk(w->name, "012345");
  3318. if (!wname) {
  3319. dev_err(component->dev, "%s: widget not found\n", __func__);
  3320. return -EINVAL;
  3321. }
  3322. ret = kstrtouint(wname, 10, &dmic_idx);
  3323. if (ret < 0) {
  3324. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  3325. __func__);
  3326. return -EINVAL;
  3327. }
  3328. pdata = snd_soc_card_get_drvdata(component->card);
  3329. switch (dmic_idx) {
  3330. case 0:
  3331. case 1:
  3332. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3333. dmic_gpio = pdata->dmic01_gpio_p;
  3334. break;
  3335. case 2:
  3336. case 3:
  3337. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3338. dmic_gpio = pdata->dmic23_gpio_p;
  3339. break;
  3340. case 4:
  3341. case 5:
  3342. dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
  3343. dmic_gpio = pdata->dmic45_gpio_p;
  3344. break;
  3345. default:
  3346. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  3347. __func__);
  3348. return -EINVAL;
  3349. }
  3350. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3351. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3352. switch (event) {
  3353. case SND_SOC_DAPM_PRE_PMU:
  3354. (*dmic_gpio_cnt)++;
  3355. if (*dmic_gpio_cnt == 1) {
  3356. ret = msm_cdc_pinctrl_select_active_state(
  3357. dmic_gpio);
  3358. if (ret < 0) {
  3359. pr_err("%s: gpio set cannot be activated %sd",
  3360. __func__, "dmic_gpio");
  3361. return ret;
  3362. }
  3363. }
  3364. break;
  3365. case SND_SOC_DAPM_POST_PMD:
  3366. (*dmic_gpio_cnt)--;
  3367. if (*dmic_gpio_cnt == 0) {
  3368. ret = msm_cdc_pinctrl_select_sleep_state(
  3369. dmic_gpio);
  3370. if (ret < 0) {
  3371. pr_err("%s: gpio set cannot be de-activated %sd",
  3372. __func__, "dmic_gpio");
  3373. return ret;
  3374. }
  3375. }
  3376. break;
  3377. default:
  3378. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3379. return -EINVAL;
  3380. }
  3381. return 0;
  3382. }
  3383. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3384. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3385. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3386. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3387. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3388. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3389. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3390. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3391. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3392. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3393. SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
  3394. SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
  3395. };
  3396. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  3397. {
  3398. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  3399. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
  3400. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3401. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  3402. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  3403. }
  3404. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  3405. {
  3406. int ret = -EINVAL;
  3407. struct snd_soc_component *component;
  3408. struct snd_soc_dapm_context *dapm;
  3409. struct snd_card *card;
  3410. struct snd_info_entry *entry;
  3411. struct snd_soc_component *aux_comp;
  3412. struct msm_asoc_mach_data *pdata =
  3413. snd_soc_card_get_drvdata(rtd->card);
  3414. component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
  3415. if (!component) {
  3416. pr_err("%s: could not find component for bolero_codec\n",
  3417. __func__);
  3418. return ret;
  3419. }
  3420. dapm = snd_soc_component_get_dapm(component);
  3421. ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
  3422. ARRAY_SIZE(msm_int_snd_controls));
  3423. if (ret < 0) {
  3424. pr_err("%s: add_component_controls failed: %d\n",
  3425. __func__, ret);
  3426. return ret;
  3427. }
  3428. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  3429. ARRAY_SIZE(msm_common_snd_controls));
  3430. if (ret < 0) {
  3431. pr_err("%s: add common snd controls failed: %d\n",
  3432. __func__, ret);
  3433. return ret;
  3434. }
  3435. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  3436. ARRAY_SIZE(msm_int_dapm_widgets));
  3437. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  3438. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  3439. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  3440. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  3441. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  3442. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  3443. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  3444. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  3445. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  3446. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  3447. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  3448. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  3449. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  3450. snd_soc_dapm_sync(dapm);
  3451. /*
  3452. * Send speaker configuration only for WSA8810.
  3453. * Default configuration is for WSA8815.
  3454. */
  3455. dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
  3456. __func__, rtd->card->num_aux_devs);
  3457. if (rtd->card->num_aux_devs &&
  3458. !list_empty(&rtd->card->component_dev_list)) {
  3459. aux_comp = list_first_entry(
  3460. &rtd->card->component_dev_list,
  3461. struct snd_soc_component,
  3462. card_aux_list);
  3463. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  3464. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  3465. wsa_macro_set_spkr_mode(component,
  3466. WSA_MACRO_SPKR_MODE_1);
  3467. wsa_macro_set_spkr_gain_offset(component,
  3468. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  3469. }
  3470. bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
  3471. sm_port_map);
  3472. }
  3473. card = rtd->card->snd_card;
  3474. if (!pdata->codec_root) {
  3475. entry = snd_info_create_subdir(card->module, "codecs",
  3476. card->proc_root);
  3477. if (!entry) {
  3478. pr_debug("%s: Cannot create codecs module entry\n",
  3479. __func__);
  3480. ret = 0;
  3481. goto err;
  3482. }
  3483. pdata->codec_root = entry;
  3484. }
  3485. bolero_info_create_codec_entry(pdata->codec_root, component);
  3486. bolero_register_wake_irq(component, false);
  3487. codec_reg_done = true;
  3488. return 0;
  3489. err:
  3490. return ret;
  3491. }
  3492. static void *def_wcd_mbhc_cal(void)
  3493. {
  3494. void *wcd_mbhc_cal;
  3495. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  3496. u16 *btn_high;
  3497. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  3498. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  3499. if (!wcd_mbhc_cal)
  3500. return NULL;
  3501. WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
  3502. WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
  3503. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  3504. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  3505. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  3506. btn_high[0] = 75;
  3507. btn_high[1] = 150;
  3508. btn_high[2] = 237;
  3509. btn_high[3] = 500;
  3510. btn_high[4] = 500;
  3511. btn_high[5] = 500;
  3512. btn_high[6] = 500;
  3513. btn_high[7] = 500;
  3514. return wcd_mbhc_cal;
  3515. }
  3516. /* Digital audio interface glue - connects codec <---> CPU */
  3517. static struct snd_soc_dai_link msm_common_dai_links[] = {
  3518. /* FrontEnd DAI Links */
  3519. {/* hw:x,0 */
  3520. .name = MSM_DAILINK_NAME(Media1),
  3521. .stream_name = "MultiMedia1",
  3522. .cpu_dai_name = "MultiMedia1",
  3523. .platform_name = "msm-pcm-dsp.0",
  3524. .dynamic = 1,
  3525. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3526. .dpcm_playback = 1,
  3527. .dpcm_capture = 1,
  3528. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3529. SND_SOC_DPCM_TRIGGER_POST},
  3530. .codec_dai_name = "snd-soc-dummy-dai",
  3531. .codec_name = "snd-soc-dummy",
  3532. .ignore_suspend = 1,
  3533. /* this dainlink has playback support */
  3534. .ignore_pmdown_time = 1,
  3535. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  3536. },
  3537. {/* hw:x,1 */
  3538. .name = MSM_DAILINK_NAME(Media2),
  3539. .stream_name = "MultiMedia2",
  3540. .cpu_dai_name = "MultiMedia2",
  3541. .platform_name = "msm-pcm-dsp.0",
  3542. .dynamic = 1,
  3543. .dpcm_playback = 1,
  3544. .dpcm_capture = 1,
  3545. .codec_dai_name = "snd-soc-dummy-dai",
  3546. .codec_name = "snd-soc-dummy",
  3547. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3548. SND_SOC_DPCM_TRIGGER_POST},
  3549. .ignore_suspend = 1,
  3550. /* this dainlink has playback support */
  3551. .ignore_pmdown_time = 1,
  3552. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  3553. },
  3554. {/* hw:x,2 */
  3555. .name = "VoiceMMode1",
  3556. .stream_name = "VoiceMMode1",
  3557. .cpu_dai_name = "VoiceMMode1",
  3558. .platform_name = "msm-pcm-voice",
  3559. .dynamic = 1,
  3560. .dpcm_playback = 1,
  3561. .dpcm_capture = 1,
  3562. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3563. SND_SOC_DPCM_TRIGGER_POST},
  3564. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3565. .ignore_suspend = 1,
  3566. .ignore_pmdown_time = 1,
  3567. .codec_dai_name = "snd-soc-dummy-dai",
  3568. .codec_name = "snd-soc-dummy",
  3569. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  3570. },
  3571. {/* hw:x,3 */
  3572. .name = "MSM VoIP",
  3573. .stream_name = "VoIP",
  3574. .cpu_dai_name = "VoIP",
  3575. .platform_name = "msm-voip-dsp",
  3576. .dynamic = 1,
  3577. .dpcm_playback = 1,
  3578. .dpcm_capture = 1,
  3579. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3580. SND_SOC_DPCM_TRIGGER_POST},
  3581. .codec_dai_name = "snd-soc-dummy-dai",
  3582. .codec_name = "snd-soc-dummy",
  3583. .ignore_suspend = 1,
  3584. /* this dainlink has playback support */
  3585. .ignore_pmdown_time = 1,
  3586. .id = MSM_FRONTEND_DAI_VOIP,
  3587. },
  3588. {/* hw:x,4 */
  3589. .name = MSM_DAILINK_NAME(ULL),
  3590. .stream_name = "MultiMedia3",
  3591. .cpu_dai_name = "MultiMedia3",
  3592. .platform_name = "msm-pcm-dsp.2",
  3593. .dynamic = 1,
  3594. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3595. .dpcm_playback = 1,
  3596. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3597. SND_SOC_DPCM_TRIGGER_POST},
  3598. .codec_dai_name = "snd-soc-dummy-dai",
  3599. .codec_name = "snd-soc-dummy",
  3600. .ignore_suspend = 1,
  3601. /* this dainlink has playback support */
  3602. .ignore_pmdown_time = 1,
  3603. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  3604. },
  3605. {/* hw:x,5 */
  3606. .name = "MSM AFE-PCM RX",
  3607. .stream_name = "AFE-PROXY RX",
  3608. .cpu_dai_name = "msm-dai-q6-dev.241",
  3609. .codec_name = "msm-stub-codec.1",
  3610. .codec_dai_name = "msm-stub-rx",
  3611. .platform_name = "msm-pcm-afe",
  3612. .dpcm_playback = 1,
  3613. .ignore_suspend = 1,
  3614. /* this dainlink has playback support */
  3615. .ignore_pmdown_time = 1,
  3616. },
  3617. {/* hw:x,6 */
  3618. .name = "MSM AFE-PCM TX",
  3619. .stream_name = "AFE-PROXY TX",
  3620. .cpu_dai_name = "msm-dai-q6-dev.240",
  3621. .codec_name = "msm-stub-codec.1",
  3622. .codec_dai_name = "msm-stub-tx",
  3623. .platform_name = "msm-pcm-afe",
  3624. .dpcm_capture = 1,
  3625. .ignore_suspend = 1,
  3626. },
  3627. {/* hw:x,7 */
  3628. .name = MSM_DAILINK_NAME(Compress1),
  3629. .stream_name = "Compress1",
  3630. .cpu_dai_name = "MultiMedia4",
  3631. .platform_name = "msm-compress-dsp",
  3632. .dynamic = 1,
  3633. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  3634. .dpcm_playback = 1,
  3635. .dpcm_capture = 1,
  3636. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3637. SND_SOC_DPCM_TRIGGER_POST},
  3638. .codec_dai_name = "snd-soc-dummy-dai",
  3639. .codec_name = "snd-soc-dummy",
  3640. .ignore_suspend = 1,
  3641. .ignore_pmdown_time = 1,
  3642. /* this dainlink has playback support */
  3643. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  3644. },
  3645. /* Hostless PCM purpose */
  3646. {/* hw:x,8 */
  3647. .name = "AUXPCM Hostless",
  3648. .stream_name = "AUXPCM Hostless",
  3649. .cpu_dai_name = "AUXPCM_HOSTLESS",
  3650. .platform_name = "msm-pcm-hostless",
  3651. .dynamic = 1,
  3652. .dpcm_playback = 1,
  3653. .dpcm_capture = 1,
  3654. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3655. SND_SOC_DPCM_TRIGGER_POST},
  3656. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3657. .ignore_suspend = 1,
  3658. /* this dainlink has playback support */
  3659. .ignore_pmdown_time = 1,
  3660. .codec_dai_name = "snd-soc-dummy-dai",
  3661. .codec_name = "snd-soc-dummy",
  3662. },
  3663. {/* hw:x,9 */
  3664. .name = MSM_DAILINK_NAME(LowLatency),
  3665. .stream_name = "MultiMedia5",
  3666. .cpu_dai_name = "MultiMedia5",
  3667. .platform_name = "msm-pcm-dsp.1",
  3668. .dynamic = 1,
  3669. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3670. .dpcm_playback = 1,
  3671. .dpcm_capture = 1,
  3672. .codec_dai_name = "snd-soc-dummy-dai",
  3673. .codec_name = "snd-soc-dummy",
  3674. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3675. SND_SOC_DPCM_TRIGGER_POST},
  3676. .ignore_suspend = 1,
  3677. /* this dainlink has playback support */
  3678. .ignore_pmdown_time = 1,
  3679. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  3680. .ops = &msm_fe_qos_ops,
  3681. },
  3682. {/* hw:x,10 */
  3683. .name = "Listen 1 Audio Service",
  3684. .stream_name = "Listen 1 Audio Service",
  3685. .cpu_dai_name = "LSM1",
  3686. .platform_name = "msm-lsm-client",
  3687. .dynamic = 1,
  3688. .dpcm_capture = 1,
  3689. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3690. SND_SOC_DPCM_TRIGGER_POST },
  3691. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3692. .ignore_suspend = 1,
  3693. .codec_dai_name = "snd-soc-dummy-dai",
  3694. .codec_name = "snd-soc-dummy",
  3695. .id = MSM_FRONTEND_DAI_LSM1,
  3696. },
  3697. /* Multiple Tunnel instances */
  3698. {/* hw:x,11 */
  3699. .name = MSM_DAILINK_NAME(Compress2),
  3700. .stream_name = "Compress2",
  3701. .cpu_dai_name = "MultiMedia7",
  3702. .platform_name = "msm-compress-dsp",
  3703. .dynamic = 1,
  3704. .dpcm_playback = 1,
  3705. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3706. SND_SOC_DPCM_TRIGGER_POST},
  3707. .codec_dai_name = "snd-soc-dummy-dai",
  3708. .codec_name = "snd-soc-dummy",
  3709. .ignore_suspend = 1,
  3710. .ignore_pmdown_time = 1,
  3711. /* this dainlink has playback support */
  3712. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  3713. },
  3714. {/* hw:x,12 */
  3715. .name = MSM_DAILINK_NAME(MultiMedia10),
  3716. .stream_name = "MultiMedia10",
  3717. .cpu_dai_name = "MultiMedia10",
  3718. .platform_name = "msm-pcm-dsp.1",
  3719. .dynamic = 1,
  3720. .dpcm_playback = 1,
  3721. .dpcm_capture = 1,
  3722. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3723. SND_SOC_DPCM_TRIGGER_POST},
  3724. .codec_dai_name = "snd-soc-dummy-dai",
  3725. .codec_name = "snd-soc-dummy",
  3726. .ignore_suspend = 1,
  3727. .ignore_pmdown_time = 1,
  3728. /* this dainlink has playback support */
  3729. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  3730. },
  3731. {/* hw:x,13 */
  3732. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  3733. .stream_name = "MM_NOIRQ",
  3734. .cpu_dai_name = "MultiMedia8",
  3735. .platform_name = "msm-pcm-dsp-noirq",
  3736. .dynamic = 1,
  3737. .dpcm_playback = 1,
  3738. .dpcm_capture = 1,
  3739. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3740. SND_SOC_DPCM_TRIGGER_POST},
  3741. .codec_dai_name = "snd-soc-dummy-dai",
  3742. .codec_name = "snd-soc-dummy",
  3743. .ignore_suspend = 1,
  3744. .ignore_pmdown_time = 1,
  3745. /* this dainlink has playback support */
  3746. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  3747. .ops = &msm_fe_qos_ops,
  3748. },
  3749. /* HDMI Hostless */
  3750. {/* hw:x,14 */
  3751. .name = "HDMI_RX_HOSTLESS",
  3752. .stream_name = "HDMI_RX_HOSTLESS",
  3753. .cpu_dai_name = "HDMI_HOSTLESS",
  3754. .platform_name = "msm-pcm-hostless",
  3755. .dynamic = 1,
  3756. .dpcm_playback = 1,
  3757. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3758. SND_SOC_DPCM_TRIGGER_POST},
  3759. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3760. .ignore_suspend = 1,
  3761. .ignore_pmdown_time = 1,
  3762. .codec_dai_name = "snd-soc-dummy-dai",
  3763. .codec_name = "snd-soc-dummy",
  3764. },
  3765. {/* hw:x,15 */
  3766. .name = "VoiceMMode2",
  3767. .stream_name = "VoiceMMode2",
  3768. .cpu_dai_name = "VoiceMMode2",
  3769. .platform_name = "msm-pcm-voice",
  3770. .dynamic = 1,
  3771. .dpcm_playback = 1,
  3772. .dpcm_capture = 1,
  3773. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3774. SND_SOC_DPCM_TRIGGER_POST},
  3775. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3776. .ignore_suspend = 1,
  3777. .ignore_pmdown_time = 1,
  3778. .codec_dai_name = "snd-soc-dummy-dai",
  3779. .codec_name = "snd-soc-dummy",
  3780. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  3781. },
  3782. /* LSM FE */
  3783. {/* hw:x,16 */
  3784. .name = "Listen 2 Audio Service",
  3785. .stream_name = "Listen 2 Audio Service",
  3786. .cpu_dai_name = "LSM2",
  3787. .platform_name = "msm-lsm-client",
  3788. .dynamic = 1,
  3789. .dpcm_capture = 1,
  3790. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3791. SND_SOC_DPCM_TRIGGER_POST },
  3792. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3793. .ignore_suspend = 1,
  3794. .codec_dai_name = "snd-soc-dummy-dai",
  3795. .codec_name = "snd-soc-dummy",
  3796. .id = MSM_FRONTEND_DAI_LSM2,
  3797. },
  3798. {/* hw:x,17 */
  3799. .name = "Listen 3 Audio Service",
  3800. .stream_name = "Listen 3 Audio Service",
  3801. .cpu_dai_name = "LSM3",
  3802. .platform_name = "msm-lsm-client",
  3803. .dynamic = 1,
  3804. .dpcm_capture = 1,
  3805. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3806. SND_SOC_DPCM_TRIGGER_POST },
  3807. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3808. .ignore_suspend = 1,
  3809. .codec_dai_name = "snd-soc-dummy-dai",
  3810. .codec_name = "snd-soc-dummy",
  3811. .id = MSM_FRONTEND_DAI_LSM3,
  3812. },
  3813. {/* hw:x,18 */
  3814. .name = "Listen 4 Audio Service",
  3815. .stream_name = "Listen 4 Audio Service",
  3816. .cpu_dai_name = "LSM4",
  3817. .platform_name = "msm-lsm-client",
  3818. .dynamic = 1,
  3819. .dpcm_capture = 1,
  3820. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3821. SND_SOC_DPCM_TRIGGER_POST },
  3822. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3823. .ignore_suspend = 1,
  3824. .codec_dai_name = "snd-soc-dummy-dai",
  3825. .codec_name = "snd-soc-dummy",
  3826. .id = MSM_FRONTEND_DAI_LSM4,
  3827. },
  3828. {/* hw:x,19 */
  3829. .name = "Listen 5 Audio Service",
  3830. .stream_name = "Listen 5 Audio Service",
  3831. .cpu_dai_name = "LSM5",
  3832. .platform_name = "msm-lsm-client",
  3833. .dynamic = 1,
  3834. .dpcm_capture = 1,
  3835. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3836. SND_SOC_DPCM_TRIGGER_POST },
  3837. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3838. .ignore_suspend = 1,
  3839. .codec_dai_name = "snd-soc-dummy-dai",
  3840. .codec_name = "snd-soc-dummy",
  3841. .id = MSM_FRONTEND_DAI_LSM5,
  3842. },
  3843. {/* hw:x,20 */
  3844. .name = "Listen 6 Audio Service",
  3845. .stream_name = "Listen 6 Audio Service",
  3846. .cpu_dai_name = "LSM6",
  3847. .platform_name = "msm-lsm-client",
  3848. .dynamic = 1,
  3849. .dpcm_capture = 1,
  3850. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3851. SND_SOC_DPCM_TRIGGER_POST },
  3852. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3853. .ignore_suspend = 1,
  3854. .codec_dai_name = "snd-soc-dummy-dai",
  3855. .codec_name = "snd-soc-dummy",
  3856. .id = MSM_FRONTEND_DAI_LSM6,
  3857. },
  3858. {/* hw:x,21 */
  3859. .name = "Listen 7 Audio Service",
  3860. .stream_name = "Listen 7 Audio Service",
  3861. .cpu_dai_name = "LSM7",
  3862. .platform_name = "msm-lsm-client",
  3863. .dynamic = 1,
  3864. .dpcm_capture = 1,
  3865. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3866. SND_SOC_DPCM_TRIGGER_POST },
  3867. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3868. .ignore_suspend = 1,
  3869. .codec_dai_name = "snd-soc-dummy-dai",
  3870. .codec_name = "snd-soc-dummy",
  3871. .id = MSM_FRONTEND_DAI_LSM7,
  3872. },
  3873. {/* hw:x,22 */
  3874. .name = "Listen 8 Audio Service",
  3875. .stream_name = "Listen 8 Audio Service",
  3876. .cpu_dai_name = "LSM8",
  3877. .platform_name = "msm-lsm-client",
  3878. .dynamic = 1,
  3879. .dpcm_capture = 1,
  3880. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3881. SND_SOC_DPCM_TRIGGER_POST },
  3882. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3883. .ignore_suspend = 1,
  3884. .codec_dai_name = "snd-soc-dummy-dai",
  3885. .codec_name = "snd-soc-dummy",
  3886. .id = MSM_FRONTEND_DAI_LSM8,
  3887. },
  3888. {/* hw:x,23 */
  3889. .name = MSM_DAILINK_NAME(Media9),
  3890. .stream_name = "MultiMedia9",
  3891. .cpu_dai_name = "MultiMedia9",
  3892. .platform_name = "msm-pcm-dsp.0",
  3893. .dynamic = 1,
  3894. .dpcm_playback = 1,
  3895. .dpcm_capture = 1,
  3896. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3897. SND_SOC_DPCM_TRIGGER_POST},
  3898. .codec_dai_name = "snd-soc-dummy-dai",
  3899. .codec_name = "snd-soc-dummy",
  3900. .ignore_suspend = 1,
  3901. /* this dainlink has playback support */
  3902. .ignore_pmdown_time = 1,
  3903. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  3904. },
  3905. {/* hw:x,24 */
  3906. .name = MSM_DAILINK_NAME(Compress4),
  3907. .stream_name = "Compress4",
  3908. .cpu_dai_name = "MultiMedia11",
  3909. .platform_name = "msm-compress-dsp",
  3910. .dynamic = 1,
  3911. .dpcm_playback = 1,
  3912. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3913. SND_SOC_DPCM_TRIGGER_POST},
  3914. .codec_dai_name = "snd-soc-dummy-dai",
  3915. .codec_name = "snd-soc-dummy",
  3916. .ignore_suspend = 1,
  3917. .ignore_pmdown_time = 1,
  3918. /* this dainlink has playback support */
  3919. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  3920. },
  3921. {/* hw:x,25 */
  3922. .name = MSM_DAILINK_NAME(Compress5),
  3923. .stream_name = "Compress5",
  3924. .cpu_dai_name = "MultiMedia12",
  3925. .platform_name = "msm-compress-dsp",
  3926. .dynamic = 1,
  3927. .dpcm_playback = 1,
  3928. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3929. SND_SOC_DPCM_TRIGGER_POST},
  3930. .codec_dai_name = "snd-soc-dummy-dai",
  3931. .codec_name = "snd-soc-dummy",
  3932. .ignore_suspend = 1,
  3933. .ignore_pmdown_time = 1,
  3934. /* this dainlink has playback support */
  3935. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  3936. },
  3937. {/* hw:x,26 */
  3938. .name = MSM_DAILINK_NAME(Compress6),
  3939. .stream_name = "Compress6",
  3940. .cpu_dai_name = "MultiMedia13",
  3941. .platform_name = "msm-compress-dsp",
  3942. .dynamic = 1,
  3943. .dpcm_playback = 1,
  3944. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3945. SND_SOC_DPCM_TRIGGER_POST},
  3946. .codec_dai_name = "snd-soc-dummy-dai",
  3947. .codec_name = "snd-soc-dummy",
  3948. .ignore_suspend = 1,
  3949. .ignore_pmdown_time = 1,
  3950. /* this dainlink has playback support */
  3951. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  3952. },
  3953. {/* hw:x,27 */
  3954. .name = MSM_DAILINK_NAME(Compress7),
  3955. .stream_name = "Compress7",
  3956. .cpu_dai_name = "MultiMedia14",
  3957. .platform_name = "msm-compress-dsp",
  3958. .dynamic = 1,
  3959. .dpcm_playback = 1,
  3960. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3961. SND_SOC_DPCM_TRIGGER_POST},
  3962. .codec_dai_name = "snd-soc-dummy-dai",
  3963. .codec_name = "snd-soc-dummy",
  3964. .ignore_suspend = 1,
  3965. .ignore_pmdown_time = 1,
  3966. /* this dainlink has playback support */
  3967. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  3968. },
  3969. {/* hw:x,28 */
  3970. .name = MSM_DAILINK_NAME(Compress8),
  3971. .stream_name = "Compress8",
  3972. .cpu_dai_name = "MultiMedia15",
  3973. .platform_name = "msm-compress-dsp",
  3974. .dynamic = 1,
  3975. .dpcm_playback = 1,
  3976. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3977. SND_SOC_DPCM_TRIGGER_POST},
  3978. .codec_dai_name = "snd-soc-dummy-dai",
  3979. .codec_name = "snd-soc-dummy",
  3980. .ignore_suspend = 1,
  3981. .ignore_pmdown_time = 1,
  3982. /* this dainlink has playback support */
  3983. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  3984. },
  3985. {/* hw:x,29 */
  3986. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  3987. .stream_name = "MM_NOIRQ_2",
  3988. .cpu_dai_name = "MultiMedia16",
  3989. .platform_name = "msm-pcm-dsp-noirq",
  3990. .dynamic = 1,
  3991. .dpcm_playback = 1,
  3992. .dpcm_capture = 1,
  3993. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3994. SND_SOC_DPCM_TRIGGER_POST},
  3995. .codec_dai_name = "snd-soc-dummy-dai",
  3996. .codec_name = "snd-soc-dummy",
  3997. .ignore_suspend = 1,
  3998. .ignore_pmdown_time = 1,
  3999. /* this dainlink has playback support */
  4000. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  4001. },
  4002. {/* hw:x,30 */
  4003. .name = "CDC_DMA Hostless",
  4004. .stream_name = "CDC_DMA Hostless",
  4005. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  4006. .platform_name = "msm-pcm-hostless",
  4007. .dynamic = 1,
  4008. .dpcm_playback = 1,
  4009. .dpcm_capture = 1,
  4010. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4011. SND_SOC_DPCM_TRIGGER_POST},
  4012. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4013. .ignore_suspend = 1,
  4014. /* this dailink has playback support */
  4015. .ignore_pmdown_time = 1,
  4016. .codec_dai_name = "snd-soc-dummy-dai",
  4017. .codec_name = "snd-soc-dummy",
  4018. },
  4019. {/* hw:x,31 */
  4020. .name = "TX3_CDC_DMA Hostless",
  4021. .stream_name = "TX3_CDC_DMA Hostless",
  4022. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  4023. .platform_name = "msm-pcm-hostless",
  4024. .dynamic = 1,
  4025. .dpcm_capture = 1,
  4026. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4027. SND_SOC_DPCM_TRIGGER_POST},
  4028. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4029. .ignore_suspend = 1,
  4030. .codec_dai_name = "snd-soc-dummy-dai",
  4031. .codec_name = "snd-soc-dummy",
  4032. },
  4033. };
  4034. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  4035. {/* hw:x,32 */
  4036. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  4037. .stream_name = "WSA CDC DMA0 Capture",
  4038. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  4039. .platform_name = "msm-pcm-hostless",
  4040. .codec_name = "bolero_codec",
  4041. .codec_dai_name = "wsa_macro_vifeedback",
  4042. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  4043. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4044. .ignore_suspend = 1,
  4045. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4046. .ops = &msm_cdc_dma_be_ops,
  4047. },
  4048. };
  4049. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  4050. {/* hw:x,33 */
  4051. .name = MSM_DAILINK_NAME(ASM Loopback),
  4052. .stream_name = "MultiMedia6",
  4053. .cpu_dai_name = "MultiMedia6",
  4054. .platform_name = "msm-pcm-loopback",
  4055. .dynamic = 1,
  4056. .dpcm_playback = 1,
  4057. .dpcm_capture = 1,
  4058. .codec_dai_name = "snd-soc-dummy-dai",
  4059. .codec_name = "snd-soc-dummy",
  4060. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4061. SND_SOC_DPCM_TRIGGER_POST},
  4062. .ignore_suspend = 1,
  4063. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4064. .ignore_pmdown_time = 1,
  4065. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  4066. },
  4067. {/* hw:x,34 */
  4068. .name = "USB Audio Hostless",
  4069. .stream_name = "USB Audio Hostless",
  4070. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  4071. .platform_name = "msm-pcm-hostless",
  4072. .dynamic = 1,
  4073. .dpcm_playback = 1,
  4074. .dpcm_capture = 1,
  4075. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4076. SND_SOC_DPCM_TRIGGER_POST},
  4077. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4078. .ignore_suspend = 1,
  4079. .ignore_pmdown_time = 1,
  4080. .codec_dai_name = "snd-soc-dummy-dai",
  4081. .codec_name = "snd-soc-dummy",
  4082. },
  4083. {/* hw:x,35 */
  4084. .name = "SLIMBUS_7 Hostless",
  4085. .stream_name = "SLIMBUS_7 Hostless",
  4086. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  4087. .platform_name = "msm-pcm-hostless",
  4088. .dynamic = 1,
  4089. .dpcm_capture = 1,
  4090. .dpcm_playback = 1,
  4091. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4092. SND_SOC_DPCM_TRIGGER_POST},
  4093. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4094. .ignore_suspend = 1,
  4095. .ignore_pmdown_time = 1,
  4096. .codec_dai_name = "snd-soc-dummy-dai",
  4097. .codec_name = "snd-soc-dummy",
  4098. },
  4099. {/* hw:x,36 */
  4100. .name = "Compress Capture",
  4101. .stream_name = "Compress9",
  4102. .cpu_dai_name = "MultiMedia17",
  4103. .platform_name = "msm-compress-dsp",
  4104. .dynamic = 1,
  4105. .dpcm_capture = 1,
  4106. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4107. SND_SOC_DPCM_TRIGGER_POST},
  4108. .codec_dai_name = "snd-soc-dummy-dai",
  4109. .codec_name = "snd-soc-dummy",
  4110. .ignore_suspend = 1,
  4111. .ignore_pmdown_time = 1,
  4112. .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
  4113. },
  4114. };
  4115. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  4116. /* Backend AFE DAI Links */
  4117. {
  4118. .name = LPASS_BE_AFE_PCM_RX,
  4119. .stream_name = "AFE Playback",
  4120. .cpu_dai_name = "msm-dai-q6-dev.224",
  4121. .platform_name = "msm-pcm-routing",
  4122. .codec_name = "msm-stub-codec.1",
  4123. .codec_dai_name = "msm-stub-rx",
  4124. .no_pcm = 1,
  4125. .dpcm_playback = 1,
  4126. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  4127. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4128. /* this dainlink has playback support */
  4129. .ignore_pmdown_time = 1,
  4130. .ignore_suspend = 1,
  4131. },
  4132. {
  4133. .name = LPASS_BE_AFE_PCM_TX,
  4134. .stream_name = "AFE Capture",
  4135. .cpu_dai_name = "msm-dai-q6-dev.225",
  4136. .platform_name = "msm-pcm-routing",
  4137. .codec_name = "msm-stub-codec.1",
  4138. .codec_dai_name = "msm-stub-tx",
  4139. .no_pcm = 1,
  4140. .dpcm_capture = 1,
  4141. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  4142. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4143. .ignore_suspend = 1,
  4144. },
  4145. /* Incall Record Uplink BACK END DAI Link */
  4146. {
  4147. .name = LPASS_BE_INCALL_RECORD_TX,
  4148. .stream_name = "Voice Uplink Capture",
  4149. .cpu_dai_name = "msm-dai-q6-dev.32772",
  4150. .platform_name = "msm-pcm-routing",
  4151. .codec_name = "msm-stub-codec.1",
  4152. .codec_dai_name = "msm-stub-tx",
  4153. .no_pcm = 1,
  4154. .dpcm_capture = 1,
  4155. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  4156. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4157. .ignore_suspend = 1,
  4158. },
  4159. /* Incall Record Downlink BACK END DAI Link */
  4160. {
  4161. .name = LPASS_BE_INCALL_RECORD_RX,
  4162. .stream_name = "Voice Downlink Capture",
  4163. .cpu_dai_name = "msm-dai-q6-dev.32771",
  4164. .platform_name = "msm-pcm-routing",
  4165. .codec_name = "msm-stub-codec.1",
  4166. .codec_dai_name = "msm-stub-tx",
  4167. .no_pcm = 1,
  4168. .dpcm_capture = 1,
  4169. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  4170. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4171. .ignore_suspend = 1,
  4172. },
  4173. /* Incall Music BACK END DAI Link */
  4174. {
  4175. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  4176. .stream_name = "Voice Farend Playback",
  4177. .cpu_dai_name = "msm-dai-q6-dev.32773",
  4178. .platform_name = "msm-pcm-routing",
  4179. .codec_name = "msm-stub-codec.1",
  4180. .codec_dai_name = "msm-stub-rx",
  4181. .no_pcm = 1,
  4182. .dpcm_playback = 1,
  4183. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  4184. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4185. .ignore_suspend = 1,
  4186. .ignore_pmdown_time = 1,
  4187. },
  4188. /* Incall Music 2 BACK END DAI Link */
  4189. {
  4190. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  4191. .stream_name = "Voice2 Farend Playback",
  4192. .cpu_dai_name = "msm-dai-q6-dev.32770",
  4193. .platform_name = "msm-pcm-routing",
  4194. .codec_name = "msm-stub-codec.1",
  4195. .codec_dai_name = "msm-stub-rx",
  4196. .no_pcm = 1,
  4197. .dpcm_playback = 1,
  4198. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  4199. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4200. .ignore_suspend = 1,
  4201. .ignore_pmdown_time = 1,
  4202. },
  4203. {
  4204. .name = LPASS_BE_USB_AUDIO_RX,
  4205. .stream_name = "USB Audio Playback",
  4206. .cpu_dai_name = "msm-dai-q6-dev.28672",
  4207. .platform_name = "msm-pcm-routing",
  4208. .codec_name = "msm-stub-codec.1",
  4209. .codec_dai_name = "msm-stub-rx",
  4210. .no_pcm = 1,
  4211. .dpcm_playback = 1,
  4212. .id = MSM_BACKEND_DAI_USB_RX,
  4213. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4214. .ignore_pmdown_time = 1,
  4215. .ignore_suspend = 1,
  4216. },
  4217. {
  4218. .name = LPASS_BE_USB_AUDIO_TX,
  4219. .stream_name = "USB Audio Capture",
  4220. .cpu_dai_name = "msm-dai-q6-dev.28673",
  4221. .platform_name = "msm-pcm-routing",
  4222. .codec_name = "msm-stub-codec.1",
  4223. .codec_dai_name = "msm-stub-tx",
  4224. .no_pcm = 1,
  4225. .dpcm_capture = 1,
  4226. .id = MSM_BACKEND_DAI_USB_TX,
  4227. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4228. .ignore_suspend = 1,
  4229. },
  4230. {
  4231. .name = LPASS_BE_PRI_TDM_RX_0,
  4232. .stream_name = "Primary TDM0 Playback",
  4233. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  4234. .platform_name = "msm-pcm-routing",
  4235. .codec_name = "msm-stub-codec.1",
  4236. .codec_dai_name = "msm-stub-rx",
  4237. .no_pcm = 1,
  4238. .dpcm_playback = 1,
  4239. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  4240. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4241. .ops = &kona_tdm_be_ops,
  4242. .ignore_suspend = 1,
  4243. .ignore_pmdown_time = 1,
  4244. },
  4245. {
  4246. .name = LPASS_BE_PRI_TDM_TX_0,
  4247. .stream_name = "Primary TDM0 Capture",
  4248. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  4249. .platform_name = "msm-pcm-routing",
  4250. .codec_name = "msm-stub-codec.1",
  4251. .codec_dai_name = "msm-stub-tx",
  4252. .no_pcm = 1,
  4253. .dpcm_capture = 1,
  4254. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  4255. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4256. .ops = &kona_tdm_be_ops,
  4257. .ignore_suspend = 1,
  4258. },
  4259. {
  4260. .name = LPASS_BE_SEC_TDM_RX_0,
  4261. .stream_name = "Secondary TDM0 Playback",
  4262. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  4263. .platform_name = "msm-pcm-routing",
  4264. .codec_name = "msm-stub-codec.1",
  4265. .codec_dai_name = "msm-stub-rx",
  4266. .no_pcm = 1,
  4267. .dpcm_playback = 1,
  4268. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  4269. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4270. .ops = &kona_tdm_be_ops,
  4271. .ignore_suspend = 1,
  4272. .ignore_pmdown_time = 1,
  4273. },
  4274. {
  4275. .name = LPASS_BE_SEC_TDM_TX_0,
  4276. .stream_name = "Secondary TDM0 Capture",
  4277. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  4278. .platform_name = "msm-pcm-routing",
  4279. .codec_name = "msm-stub-codec.1",
  4280. .codec_dai_name = "msm-stub-tx",
  4281. .no_pcm = 1,
  4282. .dpcm_capture = 1,
  4283. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  4284. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4285. .ops = &kona_tdm_be_ops,
  4286. .ignore_suspend = 1,
  4287. },
  4288. {
  4289. .name = LPASS_BE_TERT_TDM_RX_0,
  4290. .stream_name = "Tertiary TDM0 Playback",
  4291. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  4292. .platform_name = "msm-pcm-routing",
  4293. .codec_name = "msm-stub-codec.1",
  4294. .codec_dai_name = "msm-stub-rx",
  4295. .no_pcm = 1,
  4296. .dpcm_playback = 1,
  4297. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  4298. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4299. .ops = &kona_tdm_be_ops,
  4300. .ignore_suspend = 1,
  4301. .ignore_pmdown_time = 1,
  4302. },
  4303. {
  4304. .name = LPASS_BE_TERT_TDM_TX_0,
  4305. .stream_name = "Tertiary TDM0 Capture",
  4306. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  4307. .platform_name = "msm-pcm-routing",
  4308. .codec_name = "msm-stub-codec.1",
  4309. .codec_dai_name = "msm-stub-tx",
  4310. .no_pcm = 1,
  4311. .dpcm_capture = 1,
  4312. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  4313. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4314. .ops = &kona_tdm_be_ops,
  4315. .ignore_suspend = 1,
  4316. },
  4317. };
  4318. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  4319. {
  4320. .name = LPASS_BE_SLIMBUS_7_RX,
  4321. .stream_name = "Slimbus7 Playback",
  4322. .cpu_dai_name = "msm-dai-q6-dev.16398",
  4323. .platform_name = "msm-pcm-routing",
  4324. .codec_name = "btfmslim_slave",
  4325. /* BT codec driver determines capabilities based on
  4326. * dai name, bt codecdai name should always contains
  4327. * supported usecase information
  4328. */
  4329. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  4330. .no_pcm = 1,
  4331. .dpcm_playback = 1,
  4332. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  4333. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4334. .init = &msm_wcn_init,
  4335. .ops = &msm_wcn_ops,
  4336. /* dai link has playback support */
  4337. .ignore_pmdown_time = 1,
  4338. .ignore_suspend = 1,
  4339. },
  4340. {
  4341. .name = LPASS_BE_SLIMBUS_7_TX,
  4342. .stream_name = "Slimbus7 Capture",
  4343. .cpu_dai_name = "msm-dai-q6-dev.16399",
  4344. .platform_name = "msm-pcm-routing",
  4345. .codec_name = "btfmslim_slave",
  4346. .codec_dai_name = "btfm_bt_sco_slim_tx",
  4347. .no_pcm = 1,
  4348. .dpcm_capture = 1,
  4349. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  4350. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4351. .ops = &msm_wcn_ops,
  4352. .ignore_suspend = 1,
  4353. },
  4354. };
  4355. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  4356. /* DISP PORT BACK END DAI Link */
  4357. {
  4358. .name = LPASS_BE_DISPLAY_PORT,
  4359. .stream_name = "Display Port Playback",
  4360. .cpu_dai_name = "msm-dai-q6-dp.24608",
  4361. .platform_name = "msm-pcm-routing",
  4362. .codec_name = "msm-ext-disp-audio-codec-rx",
  4363. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  4364. .no_pcm = 1,
  4365. .dpcm_playback = 1,
  4366. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  4367. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4368. .ignore_pmdown_time = 1,
  4369. .ignore_suspend = 1,
  4370. },
  4371. /* DISP PORT 1 BACK END DAI Link */
  4372. {
  4373. .name = LPASS_BE_DISPLAY_PORT1,
  4374. .stream_name = "Display Port1 Playback",
  4375. .cpu_dai_name = "msm-dai-q6-dp.24608",
  4376. .platform_name = "msm-pcm-routing",
  4377. .codec_name = "msm-ext-disp-audio-codec-rx",
  4378. .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
  4379. .no_pcm = 1,
  4380. .dpcm_playback = 1,
  4381. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
  4382. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4383. .ignore_pmdown_time = 1,
  4384. .ignore_suspend = 1,
  4385. },
  4386. };
  4387. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  4388. {
  4389. .name = LPASS_BE_PRI_MI2S_RX,
  4390. .stream_name = "Primary MI2S Playback",
  4391. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4392. .platform_name = "msm-pcm-routing",
  4393. .codec_name = "msm-stub-codec.1",
  4394. .codec_dai_name = "msm-stub-rx",
  4395. .no_pcm = 1,
  4396. .dpcm_playback = 1,
  4397. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  4398. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4399. .ops = &msm_mi2s_be_ops,
  4400. .ignore_suspend = 1,
  4401. .ignore_pmdown_time = 1,
  4402. },
  4403. {
  4404. .name = LPASS_BE_PRI_MI2S_TX,
  4405. .stream_name = "Primary MI2S Capture",
  4406. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4407. .platform_name = "msm-pcm-routing",
  4408. .codec_name = "msm-stub-codec.1",
  4409. .codec_dai_name = "msm-stub-tx",
  4410. .no_pcm = 1,
  4411. .dpcm_capture = 1,
  4412. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  4413. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4414. .ops = &msm_mi2s_be_ops,
  4415. .ignore_suspend = 1,
  4416. },
  4417. {
  4418. .name = LPASS_BE_SEC_MI2S_RX,
  4419. .stream_name = "Secondary MI2S Playback",
  4420. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4421. .platform_name = "msm-pcm-routing",
  4422. .codec_name = "msm-stub-codec.1",
  4423. .codec_dai_name = "msm-stub-rx",
  4424. .no_pcm = 1,
  4425. .dpcm_playback = 1,
  4426. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  4427. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4428. .ops = &msm_mi2s_be_ops,
  4429. .ignore_suspend = 1,
  4430. .ignore_pmdown_time = 1,
  4431. },
  4432. {
  4433. .name = LPASS_BE_SEC_MI2S_TX,
  4434. .stream_name = "Secondary MI2S Capture",
  4435. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4436. .platform_name = "msm-pcm-routing",
  4437. .codec_name = "msm-stub-codec.1",
  4438. .codec_dai_name = "msm-stub-tx",
  4439. .no_pcm = 1,
  4440. .dpcm_capture = 1,
  4441. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  4442. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4443. .ops = &msm_mi2s_be_ops,
  4444. .ignore_suspend = 1,
  4445. },
  4446. {
  4447. .name = LPASS_BE_TERT_MI2S_RX,
  4448. .stream_name = "Tertiary MI2S Playback",
  4449. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4450. .platform_name = "msm-pcm-routing",
  4451. .codec_name = "msm-stub-codec.1",
  4452. .codec_dai_name = "msm-stub-rx",
  4453. .no_pcm = 1,
  4454. .dpcm_playback = 1,
  4455. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  4456. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4457. .ops = &msm_mi2s_be_ops,
  4458. .ignore_suspend = 1,
  4459. .ignore_pmdown_time = 1,
  4460. },
  4461. {
  4462. .name = LPASS_BE_TERT_MI2S_TX,
  4463. .stream_name = "Tertiary MI2S Capture",
  4464. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4465. .platform_name = "msm-pcm-routing",
  4466. .codec_name = "msm-stub-codec.1",
  4467. .codec_dai_name = "msm-stub-tx",
  4468. .no_pcm = 1,
  4469. .dpcm_capture = 1,
  4470. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  4471. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4472. .ops = &msm_mi2s_be_ops,
  4473. .ignore_suspend = 1,
  4474. },
  4475. };
  4476. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  4477. /* Primary AUX PCM Backend DAI Links */
  4478. {
  4479. .name = LPASS_BE_AUXPCM_RX,
  4480. .stream_name = "AUX PCM Playback",
  4481. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4482. .platform_name = "msm-pcm-routing",
  4483. .codec_name = "msm-stub-codec.1",
  4484. .codec_dai_name = "msm-stub-rx",
  4485. .no_pcm = 1,
  4486. .dpcm_playback = 1,
  4487. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  4488. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4489. .ignore_pmdown_time = 1,
  4490. .ignore_suspend = 1,
  4491. },
  4492. {
  4493. .name = LPASS_BE_AUXPCM_TX,
  4494. .stream_name = "AUX PCM Capture",
  4495. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4496. .platform_name = "msm-pcm-routing",
  4497. .codec_name = "msm-stub-codec.1",
  4498. .codec_dai_name = "msm-stub-tx",
  4499. .no_pcm = 1,
  4500. .dpcm_capture = 1,
  4501. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  4502. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4503. .ignore_suspend = 1,
  4504. },
  4505. /* Secondary AUX PCM Backend DAI Links */
  4506. {
  4507. .name = LPASS_BE_SEC_AUXPCM_RX,
  4508. .stream_name = "Sec AUX PCM Playback",
  4509. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4510. .platform_name = "msm-pcm-routing",
  4511. .codec_name = "msm-stub-codec.1",
  4512. .codec_dai_name = "msm-stub-rx",
  4513. .no_pcm = 1,
  4514. .dpcm_playback = 1,
  4515. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  4516. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4517. .ignore_pmdown_time = 1,
  4518. .ignore_suspend = 1,
  4519. },
  4520. {
  4521. .name = LPASS_BE_SEC_AUXPCM_TX,
  4522. .stream_name = "Sec AUX PCM Capture",
  4523. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4524. .platform_name = "msm-pcm-routing",
  4525. .codec_name = "msm-stub-codec.1",
  4526. .codec_dai_name = "msm-stub-tx",
  4527. .no_pcm = 1,
  4528. .dpcm_capture = 1,
  4529. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  4530. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4531. .ignore_suspend = 1,
  4532. },
  4533. /* Tertiary AUX PCM Backend DAI Links */
  4534. {
  4535. .name = LPASS_BE_TERT_AUXPCM_RX,
  4536. .stream_name = "Tert AUX PCM Playback",
  4537. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  4538. .platform_name = "msm-pcm-routing",
  4539. .codec_name = "msm-stub-codec.1",
  4540. .codec_dai_name = "msm-stub-rx",
  4541. .no_pcm = 1,
  4542. .dpcm_playback = 1,
  4543. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  4544. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4545. .ignore_suspend = 1,
  4546. },
  4547. {
  4548. .name = LPASS_BE_TERT_AUXPCM_TX,
  4549. .stream_name = "Tert AUX PCM Capture",
  4550. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  4551. .platform_name = "msm-pcm-routing",
  4552. .codec_name = "msm-stub-codec.1",
  4553. .codec_dai_name = "msm-stub-tx",
  4554. .no_pcm = 1,
  4555. .dpcm_capture = 1,
  4556. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  4557. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4558. .ignore_suspend = 1,
  4559. },
  4560. };
  4561. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  4562. /* WSA CDC DMA Backend DAI Links */
  4563. {
  4564. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  4565. .stream_name = "WSA CDC DMA0 Playback",
  4566. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  4567. .platform_name = "msm-pcm-routing",
  4568. .codec_name = "bolero_codec",
  4569. .codec_dai_name = "wsa_macro_rx1",
  4570. .no_pcm = 1,
  4571. .dpcm_playback = 1,
  4572. .init = &msm_int_audrx_init,
  4573. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  4574. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4575. .ignore_pmdown_time = 1,
  4576. .ignore_suspend = 1,
  4577. .ops = &msm_cdc_dma_be_ops,
  4578. },
  4579. {
  4580. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  4581. .stream_name = "WSA CDC DMA1 Playback",
  4582. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  4583. .platform_name = "msm-pcm-routing",
  4584. .codec_name = "bolero_codec",
  4585. .codec_dai_name = "wsa_macro_rx_mix",
  4586. .no_pcm = 1,
  4587. .dpcm_playback = 1,
  4588. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  4589. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4590. .ignore_pmdown_time = 1,
  4591. .ignore_suspend = 1,
  4592. .ops = &msm_cdc_dma_be_ops,
  4593. },
  4594. {
  4595. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  4596. .stream_name = "WSA CDC DMA1 Capture",
  4597. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  4598. .platform_name = "msm-pcm-routing",
  4599. .codec_name = "bolero_codec",
  4600. .codec_dai_name = "wsa_macro_echo",
  4601. .no_pcm = 1,
  4602. .dpcm_capture = 1,
  4603. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  4604. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4605. .ignore_suspend = 1,
  4606. .ops = &msm_cdc_dma_be_ops,
  4607. },
  4608. };
  4609. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  4610. /* RX CDC DMA Backend DAI Links */
  4611. {
  4612. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  4613. .stream_name = "RX CDC DMA0 Playback",
  4614. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  4615. .platform_name = "msm-pcm-routing",
  4616. .codec_name = "bolero_codec",
  4617. .codec_dai_name = "rx_macro_rx1",
  4618. .no_pcm = 1,
  4619. .dpcm_playback = 1,
  4620. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  4621. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4622. .ignore_pmdown_time = 1,
  4623. .ignore_suspend = 1,
  4624. .ops = &msm_cdc_dma_be_ops,
  4625. },
  4626. {
  4627. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  4628. .stream_name = "RX CDC DMA1 Playback",
  4629. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  4630. .platform_name = "msm-pcm-routing",
  4631. .codec_name = "bolero_codec",
  4632. .codec_dai_name = "rx_macro_rx2",
  4633. .no_pcm = 1,
  4634. .dpcm_playback = 1,
  4635. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  4636. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4637. .ignore_pmdown_time = 1,
  4638. .ignore_suspend = 1,
  4639. .ops = &msm_cdc_dma_be_ops,
  4640. },
  4641. {
  4642. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  4643. .stream_name = "RX CDC DMA2 Playback",
  4644. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  4645. .platform_name = "msm-pcm-routing",
  4646. .codec_name = "bolero_codec",
  4647. .codec_dai_name = "rx_macro_rx3",
  4648. .no_pcm = 1,
  4649. .dpcm_playback = 1,
  4650. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  4651. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4652. .ignore_pmdown_time = 1,
  4653. .ignore_suspend = 1,
  4654. .ops = &msm_cdc_dma_be_ops,
  4655. },
  4656. {
  4657. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  4658. .stream_name = "RX CDC DMA3 Playback",
  4659. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  4660. .platform_name = "msm-pcm-routing",
  4661. .codec_name = "bolero_codec",
  4662. .codec_dai_name = "rx_macro_rx4",
  4663. .no_pcm = 1,
  4664. .dpcm_playback = 1,
  4665. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  4666. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4667. .ignore_pmdown_time = 1,
  4668. .ignore_suspend = 1,
  4669. .ops = &msm_cdc_dma_be_ops,
  4670. },
  4671. /* TX CDC DMA Backend DAI Links */
  4672. {
  4673. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  4674. .stream_name = "TX CDC DMA3 Capture",
  4675. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  4676. .platform_name = "msm-pcm-routing",
  4677. .codec_name = "bolero_codec",
  4678. .codec_dai_name = "tx_macro_tx1",
  4679. .no_pcm = 1,
  4680. .dpcm_capture = 1,
  4681. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  4682. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4683. .ignore_suspend = 1,
  4684. .ops = &msm_cdc_dma_be_ops,
  4685. },
  4686. {
  4687. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  4688. .stream_name = "TX CDC DMA4 Capture",
  4689. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  4690. .platform_name = "msm-pcm-routing",
  4691. .codec_name = "bolero_codec",
  4692. .codec_dai_name = "tx_macro_tx2",
  4693. .no_pcm = 1,
  4694. .dpcm_capture = 1,
  4695. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  4696. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4697. .ignore_suspend = 1,
  4698. .ops = &msm_cdc_dma_be_ops,
  4699. },
  4700. };
  4701. static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
  4702. {
  4703. .name = LPASS_BE_VA_CDC_DMA_TX_0,
  4704. .stream_name = "VA CDC DMA0 Capture",
  4705. .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
  4706. .platform_name = "msm-pcm-routing",
  4707. .codec_name = "bolero_codec",
  4708. .codec_dai_name = "va_macro_tx1",
  4709. .no_pcm = 1,
  4710. .dpcm_capture = 1,
  4711. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
  4712. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4713. .ignore_suspend = 1,
  4714. .ops = &msm_cdc_dma_be_ops,
  4715. },
  4716. {
  4717. .name = LPASS_BE_VA_CDC_DMA_TX_1,
  4718. .stream_name = "VA CDC DMA1 Capture",
  4719. .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
  4720. .platform_name = "msm-pcm-routing",
  4721. .codec_name = "bolero_codec",
  4722. .codec_dai_name = "va_macro_tx2",
  4723. .no_pcm = 1,
  4724. .dpcm_capture = 1,
  4725. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
  4726. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4727. .ignore_suspend = 1,
  4728. .ops = &msm_cdc_dma_be_ops,
  4729. },
  4730. {
  4731. .name = LPASS_BE_VA_CDC_DMA_TX_2,
  4732. .stream_name = "VA CDC DMA2 Capture",
  4733. .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
  4734. .platform_name = "msm-pcm-routing",
  4735. .codec_name = "bolero_codec",
  4736. .codec_dai_name = "va_macro_tx3",
  4737. .no_pcm = 1,
  4738. .dpcm_capture = 1,
  4739. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
  4740. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4741. .ignore_suspend = 1,
  4742. .ops = &msm_cdc_dma_be_ops,
  4743. },
  4744. };
  4745. static struct snd_soc_dai_link msm_kona_dai_links[
  4746. ARRAY_SIZE(msm_common_dai_links) +
  4747. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  4748. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  4749. ARRAY_SIZE(msm_common_be_dai_links) +
  4750. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  4751. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  4752. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  4753. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
  4754. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
  4755. ARRAY_SIZE(ext_disp_be_dai_link) +
  4756. ARRAY_SIZE(msm_wcn_be_dai_links)];
  4757. static int msm_populate_dai_link_component_of_node(
  4758. struct snd_soc_card *card)
  4759. {
  4760. int i, index, ret = 0;
  4761. struct device *cdev = card->dev;
  4762. struct snd_soc_dai_link *dai_link = card->dai_link;
  4763. struct device_node *np;
  4764. if (!cdev) {
  4765. dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
  4766. return -ENODEV;
  4767. }
  4768. for (i = 0; i < card->num_links; i++) {
  4769. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  4770. continue;
  4771. /* populate platform_of_node for snd card dai links */
  4772. if (dai_link[i].platform_name &&
  4773. !dai_link[i].platform_of_node) {
  4774. index = of_property_match_string(cdev->of_node,
  4775. "asoc-platform-names",
  4776. dai_link[i].platform_name);
  4777. if (index < 0) {
  4778. dev_err(cdev, "%s: No match found for platform name: %s\n",
  4779. __func__, dai_link[i].platform_name);
  4780. ret = index;
  4781. goto err;
  4782. }
  4783. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  4784. index);
  4785. if (!np) {
  4786. dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
  4787. __func__, dai_link[i].platform_name,
  4788. index);
  4789. ret = -ENODEV;
  4790. goto err;
  4791. }
  4792. dai_link[i].platform_of_node = np;
  4793. dai_link[i].platform_name = NULL;
  4794. }
  4795. /* populate cpu_of_node for snd card dai links */
  4796. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  4797. index = of_property_match_string(cdev->of_node,
  4798. "asoc-cpu-names",
  4799. dai_link[i].cpu_dai_name);
  4800. if (index >= 0) {
  4801. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  4802. index);
  4803. if (!np) {
  4804. dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
  4805. __func__,
  4806. dai_link[i].cpu_dai_name);
  4807. ret = -ENODEV;
  4808. goto err;
  4809. }
  4810. dai_link[i].cpu_of_node = np;
  4811. dai_link[i].cpu_dai_name = NULL;
  4812. }
  4813. }
  4814. /* populate codec_of_node for snd card dai links */
  4815. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  4816. index = of_property_match_string(cdev->of_node,
  4817. "asoc-codec-names",
  4818. dai_link[i].codec_name);
  4819. if (index < 0)
  4820. continue;
  4821. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  4822. index);
  4823. if (!np) {
  4824. dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
  4825. __func__, dai_link[i].codec_name);
  4826. ret = -ENODEV;
  4827. goto err;
  4828. }
  4829. dai_link[i].codec_of_node = np;
  4830. dai_link[i].codec_name = NULL;
  4831. }
  4832. }
  4833. err:
  4834. return ret;
  4835. }
  4836. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  4837. {
  4838. int ret = -EINVAL;
  4839. struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
  4840. if (!component) {
  4841. pr_err("* %s: No match for msm-stub-codec component\n", __func__);
  4842. return ret;
  4843. }
  4844. ret = snd_soc_add_component_controls(component, msm_snd_controls,
  4845. ARRAY_SIZE(msm_snd_controls));
  4846. if (ret < 0) {
  4847. dev_err(component->dev,
  4848. "%s: add_codec_controls failed, err = %d\n",
  4849. __func__, ret);
  4850. return ret;
  4851. }
  4852. return ret;
  4853. }
  4854. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  4855. struct snd_pcm_hw_params *params)
  4856. {
  4857. return 0;
  4858. }
  4859. static struct snd_soc_ops msm_stub_be_ops = {
  4860. .hw_params = msm_snd_stub_hw_params,
  4861. };
  4862. struct snd_soc_card snd_soc_card_stub_msm = {
  4863. .name = "kona-stub-snd-card",
  4864. };
  4865. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  4866. /* FrontEnd DAI Links */
  4867. {
  4868. .name = "MSMSTUB Media1",
  4869. .stream_name = "MultiMedia1",
  4870. .cpu_dai_name = "MultiMedia1",
  4871. .platform_name = "msm-pcm-dsp.0",
  4872. .dynamic = 1,
  4873. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4874. .dpcm_playback = 1,
  4875. .dpcm_capture = 1,
  4876. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4877. SND_SOC_DPCM_TRIGGER_POST},
  4878. .codec_dai_name = "snd-soc-dummy-dai",
  4879. .codec_name = "snd-soc-dummy",
  4880. .ignore_suspend = 1,
  4881. /* this dainlink has playback support */
  4882. .ignore_pmdown_time = 1,
  4883. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  4884. },
  4885. };
  4886. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  4887. /* Backend DAI Links */
  4888. {
  4889. .name = LPASS_BE_AUXPCM_RX,
  4890. .stream_name = "AUX PCM Playback",
  4891. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4892. .platform_name = "msm-pcm-routing",
  4893. .codec_name = "msm-stub-codec.1",
  4894. .codec_dai_name = "msm-stub-rx",
  4895. .no_pcm = 1,
  4896. .dpcm_playback = 1,
  4897. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  4898. .init = &msm_audrx_stub_init,
  4899. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4900. .ignore_pmdown_time = 1,
  4901. .ignore_suspend = 1,
  4902. .ops = &msm_stub_be_ops,
  4903. },
  4904. {
  4905. .name = LPASS_BE_AUXPCM_TX,
  4906. .stream_name = "AUX PCM Capture",
  4907. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4908. .platform_name = "msm-pcm-routing",
  4909. .codec_name = "msm-stub-codec.1",
  4910. .codec_dai_name = "msm-stub-tx",
  4911. .no_pcm = 1,
  4912. .dpcm_capture = 1,
  4913. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  4914. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4915. .ignore_suspend = 1,
  4916. .ops = &msm_stub_be_ops,
  4917. },
  4918. };
  4919. static struct snd_soc_dai_link msm_stub_dai_links[
  4920. ARRAY_SIZE(msm_stub_fe_dai_links) +
  4921. ARRAY_SIZE(msm_stub_be_dai_links)];
  4922. static const struct of_device_id kona_asoc_machine_of_match[] = {
  4923. { .compatible = "qcom,kona-asoc-snd",
  4924. .data = "codec"},
  4925. { .compatible = "qcom,kona-asoc-snd-stub",
  4926. .data = "stub_codec"},
  4927. {},
  4928. };
  4929. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  4930. {
  4931. struct snd_soc_card *card = NULL;
  4932. struct snd_soc_dai_link *dailink = NULL;
  4933. int len_1 = 0;
  4934. int len_2 = 0;
  4935. int total_links = 0;
  4936. int rc = 0;
  4937. u32 mi2s_audio_intf = 0;
  4938. u32 auxpcm_audio_intf = 0;
  4939. u32 val = 0;
  4940. const struct of_device_id *match;
  4941. match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
  4942. if (!match) {
  4943. dev_err(dev, "%s: No DT match found for sound card\n",
  4944. __func__);
  4945. return NULL;
  4946. }
  4947. if (!strcmp(match->data, "codec")) {
  4948. card = &snd_soc_card_kona_msm;
  4949. memcpy(msm_kona_dai_links + total_links,
  4950. msm_common_dai_links,
  4951. sizeof(msm_common_dai_links));
  4952. total_links += ARRAY_SIZE(msm_common_dai_links);
  4953. memcpy(msm_kona_dai_links + total_links,
  4954. msm_bolero_fe_dai_links,
  4955. sizeof(msm_bolero_fe_dai_links));
  4956. total_links +=
  4957. ARRAY_SIZE(msm_bolero_fe_dai_links);
  4958. memcpy(msm_kona_dai_links + total_links,
  4959. msm_common_misc_fe_dai_links,
  4960. sizeof(msm_common_misc_fe_dai_links));
  4961. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  4962. memcpy(msm_kona_dai_links + total_links,
  4963. msm_common_be_dai_links,
  4964. sizeof(msm_common_be_dai_links));
  4965. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  4966. memcpy(msm_kona_dai_links + total_links,
  4967. msm_wsa_cdc_dma_be_dai_links,
  4968. sizeof(msm_wsa_cdc_dma_be_dai_links));
  4969. total_links +=
  4970. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  4971. memcpy(msm_kona_dai_links + total_links,
  4972. msm_rx_tx_cdc_dma_be_dai_links,
  4973. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  4974. total_links +=
  4975. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  4976. memcpy(msm_kona_dai_links + total_links,
  4977. msm_va_cdc_dma_be_dai_links,
  4978. sizeof(msm_va_cdc_dma_be_dai_links));
  4979. total_links +=
  4980. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
  4981. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  4982. &mi2s_audio_intf);
  4983. if (rc) {
  4984. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  4985. __func__);
  4986. } else {
  4987. if (mi2s_audio_intf) {
  4988. memcpy(msm_kona_dai_links + total_links,
  4989. msm_mi2s_be_dai_links,
  4990. sizeof(msm_mi2s_be_dai_links));
  4991. total_links +=
  4992. ARRAY_SIZE(msm_mi2s_be_dai_links);
  4993. }
  4994. }
  4995. rc = of_property_read_u32(dev->of_node,
  4996. "qcom,auxpcm-audio-intf",
  4997. &auxpcm_audio_intf);
  4998. if (rc) {
  4999. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  5000. __func__);
  5001. } else {
  5002. if (auxpcm_audio_intf) {
  5003. memcpy(msm_kona_dai_links + total_links,
  5004. msm_auxpcm_be_dai_links,
  5005. sizeof(msm_auxpcm_be_dai_links));
  5006. total_links +=
  5007. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  5008. }
  5009. }
  5010. rc = of_property_read_u32(dev->of_node,
  5011. "qcom,ext-disp-audio-rx", &val);
  5012. if (!rc && val) {
  5013. dev_dbg(dev, "%s(): ext disp audio support present\n",
  5014. __func__);
  5015. memcpy(msm_kona_dai_links + total_links,
  5016. ext_disp_be_dai_link,
  5017. sizeof(ext_disp_be_dai_link));
  5018. total_links += ARRAY_SIZE(ext_disp_be_dai_link);
  5019. }
  5020. rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
  5021. if (!rc && val) {
  5022. dev_dbg(dev, "%s(): WCN BT support present\n",
  5023. __func__);
  5024. memcpy(msm_kona_dai_links + total_links,
  5025. msm_wcn_be_dai_links,
  5026. sizeof(msm_wcn_be_dai_links));
  5027. total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
  5028. }
  5029. dailink = msm_kona_dai_links;
  5030. } else if(!strcmp(match->data, "stub_codec")) {
  5031. card = &snd_soc_card_stub_msm;
  5032. len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
  5033. len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
  5034. memcpy(msm_stub_dai_links,
  5035. msm_stub_fe_dai_links,
  5036. sizeof(msm_stub_fe_dai_links));
  5037. memcpy(msm_stub_dai_links + len_1,
  5038. msm_stub_be_dai_links,
  5039. sizeof(msm_stub_be_dai_links));
  5040. dailink = msm_stub_dai_links;
  5041. total_links = len_2;
  5042. }
  5043. if (card) {
  5044. card->dai_link = dailink;
  5045. card->num_links = total_links;
  5046. }
  5047. return card;
  5048. }
  5049. static int msm_wsa881x_init(struct snd_soc_component *component)
  5050. {
  5051. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  5052. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  5053. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  5054. SPKR_L_BOOST, SPKR_L_VI};
  5055. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  5056. SPKR_R_BOOST, SPKR_R_VI};
  5057. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  5058. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  5059. struct msm_asoc_mach_data *pdata;
  5060. struct snd_soc_dapm_context *dapm;
  5061. struct snd_card *card;
  5062. struct snd_info_entry *entry;
  5063. int ret = 0;
  5064. if (!component) {
  5065. pr_err("%s component is NULL\n", __func__);
  5066. return -EINVAL;
  5067. }
  5068. card = component->card->snd_card;
  5069. dapm = snd_soc_component_get_dapm(component);
  5070. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  5071. dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
  5072. __func__, component->name);
  5073. wsa881x_set_channel_map(component, &spkleft_ports[0],
  5074. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  5075. &ch_rate[0], &spkleft_port_types[0]);
  5076. if (dapm->component) {
  5077. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  5078. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  5079. }
  5080. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  5081. dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
  5082. __func__, component->name);
  5083. wsa881x_set_channel_map(component, &spkright_ports[0],
  5084. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  5085. &ch_rate[0], &spkright_port_types[0]);
  5086. if (dapm->component) {
  5087. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  5088. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  5089. }
  5090. } else {
  5091. dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
  5092. component->name);
  5093. ret = -EINVAL;
  5094. goto err;
  5095. }
  5096. pdata = snd_soc_card_get_drvdata(component->card);
  5097. if (!pdata->codec_root) {
  5098. entry = snd_info_create_subdir(card->module, "codecs",
  5099. card->proc_root);
  5100. if (!entry) {
  5101. pr_err("%s: Cannot create codecs module entry\n",
  5102. __func__);
  5103. ret = 0;
  5104. goto err;
  5105. }
  5106. pdata->codec_root = entry;
  5107. }
  5108. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  5109. component);
  5110. err:
  5111. return ret;
  5112. }
  5113. static int msm_aux_codec_init(struct snd_soc_component *component)
  5114. {
  5115. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  5116. int ret = 0;
  5117. void *mbhc_calibration;
  5118. struct snd_info_entry *entry;
  5119. struct snd_card *card = component->card->snd_card;
  5120. struct msm_asoc_mach_data *pdata;
  5121. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  5122. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  5123. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  5124. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  5125. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  5126. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  5127. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  5128. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  5129. snd_soc_dapm_sync(dapm);
  5130. pdata = snd_soc_card_get_drvdata(component->card);
  5131. if (!pdata->codec_root) {
  5132. entry = snd_info_create_subdir(card->module, "codecs",
  5133. card->proc_root);
  5134. if (!entry) {
  5135. dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
  5136. __func__);
  5137. ret = 0;
  5138. goto mbhc_cfg_cal;
  5139. }
  5140. pdata->codec_root = entry;
  5141. }
  5142. wcd938x_info_create_codec_entry(pdata->codec_root, component);
  5143. mbhc_cfg_cal:
  5144. mbhc_calibration = def_wcd_mbhc_cal();
  5145. if (!mbhc_calibration)
  5146. return -ENOMEM;
  5147. wcd_mbhc_cfg.calibration = mbhc_calibration;
  5148. ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  5149. if (ret) {
  5150. dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
  5151. __func__, ret);
  5152. goto err_hs_detect;
  5153. }
  5154. return 0;
  5155. err_hs_detect:
  5156. kfree(mbhc_calibration);
  5157. return ret;
  5158. }
  5159. static int msm_init_aux_dev(struct platform_device *pdev,
  5160. struct snd_soc_card *card)
  5161. {
  5162. struct device_node *wsa_of_node;
  5163. struct device_node *aux_codec_of_node;
  5164. u32 wsa_max_devs;
  5165. u32 wsa_dev_cnt;
  5166. u32 codec_aux_dev_cnt = 0;
  5167. int i;
  5168. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  5169. struct aux_codec_dev_info *aux_cdc_dev_info;
  5170. const char *auxdev_name_prefix[1];
  5171. char *dev_name_str = NULL;
  5172. int found = 0;
  5173. int codecs_found = 0;
  5174. int ret = 0;
  5175. /* Get maximum WSA device count for this platform */
  5176. ret = of_property_read_u32(pdev->dev.of_node,
  5177. "qcom,wsa-max-devs", &wsa_max_devs);
  5178. if (ret) {
  5179. dev_info(&pdev->dev,
  5180. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  5181. __func__, pdev->dev.of_node->full_name, ret);
  5182. wsa_max_devs = 0;
  5183. goto codec_aux_dev;
  5184. }
  5185. if (wsa_max_devs == 0) {
  5186. dev_warn(&pdev->dev,
  5187. "%s: Max WSA devices is 0 for this target?\n",
  5188. __func__);
  5189. goto codec_aux_dev;
  5190. }
  5191. /* Get count of WSA device phandles for this platform */
  5192. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  5193. "qcom,wsa-devs", NULL);
  5194. if (wsa_dev_cnt == -ENOENT) {
  5195. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  5196. __func__);
  5197. goto err;
  5198. } else if (wsa_dev_cnt <= 0) {
  5199. dev_err(&pdev->dev,
  5200. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  5201. __func__, wsa_dev_cnt);
  5202. ret = -EINVAL;
  5203. goto err;
  5204. }
  5205. /*
  5206. * Expect total phandles count to be NOT less than maximum possible
  5207. * WSA count. However, if it is less, then assign same value to
  5208. * max count as well.
  5209. */
  5210. if (wsa_dev_cnt < wsa_max_devs) {
  5211. dev_dbg(&pdev->dev,
  5212. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  5213. __func__, wsa_max_devs, wsa_dev_cnt);
  5214. wsa_max_devs = wsa_dev_cnt;
  5215. }
  5216. /* Make sure prefix string passed for each WSA device */
  5217. ret = of_property_count_strings(pdev->dev.of_node,
  5218. "qcom,wsa-aux-dev-prefix");
  5219. if (ret != wsa_dev_cnt) {
  5220. dev_err(&pdev->dev,
  5221. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  5222. __func__, wsa_dev_cnt, ret);
  5223. ret = -EINVAL;
  5224. goto err;
  5225. }
  5226. /*
  5227. * Alloc mem to store phandle and index info of WSA device, if already
  5228. * registered with ALSA core
  5229. */
  5230. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  5231. sizeof(struct msm_wsa881x_dev_info),
  5232. GFP_KERNEL);
  5233. if (!wsa881x_dev_info) {
  5234. ret = -ENOMEM;
  5235. goto err;
  5236. }
  5237. /*
  5238. * search and check whether all WSA devices are already
  5239. * registered with ALSA core or not. If found a node, store
  5240. * the node and the index in a local array of struct for later
  5241. * use.
  5242. */
  5243. for (i = 0; i < wsa_dev_cnt; i++) {
  5244. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  5245. "qcom,wsa-devs", i);
  5246. if (unlikely(!wsa_of_node)) {
  5247. /* we should not be here */
  5248. dev_err(&pdev->dev,
  5249. "%s: wsa dev node is not present\n",
  5250. __func__);
  5251. ret = -EINVAL;
  5252. goto err;
  5253. }
  5254. if (soc_find_component(wsa_of_node, NULL)) {
  5255. /* WSA device registered with ALSA core */
  5256. wsa881x_dev_info[found].of_node = wsa_of_node;
  5257. wsa881x_dev_info[found].index = i;
  5258. found++;
  5259. if (found == wsa_max_devs)
  5260. break;
  5261. }
  5262. }
  5263. if (found < wsa_max_devs) {
  5264. dev_dbg(&pdev->dev,
  5265. "%s: failed to find %d components. Found only %d\n",
  5266. __func__, wsa_max_devs, found);
  5267. return -EPROBE_DEFER;
  5268. }
  5269. dev_info(&pdev->dev,
  5270. "%s: found %d wsa881x devices registered with ALSA core\n",
  5271. __func__, found);
  5272. codec_aux_dev:
  5273. /* Get count of aux codec device phandles for this platform */
  5274. codec_aux_dev_cnt = of_count_phandle_with_args(
  5275. pdev->dev.of_node,
  5276. "qcom,codec-aux-devs", NULL);
  5277. if (codec_aux_dev_cnt == -ENOENT) {
  5278. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  5279. __func__);
  5280. goto err;
  5281. } else if (codec_aux_dev_cnt <= 0) {
  5282. dev_err(&pdev->dev,
  5283. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  5284. __func__, codec_aux_dev_cnt);
  5285. ret = -EINVAL;
  5286. goto err;
  5287. }
  5288. /*
  5289. * Alloc mem to store phandle and index info of aux codec
  5290. * if already registered with ALSA core
  5291. */
  5292. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  5293. sizeof(struct aux_codec_dev_info),
  5294. GFP_KERNEL);
  5295. if (!aux_cdc_dev_info) {
  5296. ret = -ENOMEM;
  5297. goto err;
  5298. }
  5299. /*
  5300. * search and check whether all aux codecs are already
  5301. * registered with ALSA core or not. If found a node, store
  5302. * the node and the index in a local array of struct for later
  5303. * use.
  5304. */
  5305. for (i = 0; i < codec_aux_dev_cnt; i++) {
  5306. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  5307. "qcom,codec-aux-devs", i);
  5308. if (unlikely(!aux_codec_of_node)) {
  5309. /* we should not be here */
  5310. dev_err(&pdev->dev,
  5311. "%s: aux codec dev node is not present\n",
  5312. __func__);
  5313. ret = -EINVAL;
  5314. goto err;
  5315. }
  5316. if (soc_find_component(aux_codec_of_node, NULL)) {
  5317. /* AUX codec registered with ALSA core */
  5318. aux_cdc_dev_info[codecs_found].of_node =
  5319. aux_codec_of_node;
  5320. aux_cdc_dev_info[codecs_found].index = i;
  5321. codecs_found++;
  5322. }
  5323. }
  5324. if (codecs_found < codec_aux_dev_cnt) {
  5325. dev_dbg(&pdev->dev,
  5326. "%s: failed to find %d components. Found only %d\n",
  5327. __func__, codec_aux_dev_cnt, codecs_found);
  5328. return -EPROBE_DEFER;
  5329. }
  5330. dev_info(&pdev->dev,
  5331. "%s: found %d AUX codecs registered with ALSA core\n",
  5332. __func__, codecs_found);
  5333. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  5334. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  5335. /* Alloc array of AUX devs struct */
  5336. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  5337. sizeof(struct snd_soc_aux_dev),
  5338. GFP_KERNEL);
  5339. if (!msm_aux_dev) {
  5340. ret = -ENOMEM;
  5341. goto err;
  5342. }
  5343. /* Alloc array of codec conf struct */
  5344. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  5345. sizeof(struct snd_soc_codec_conf),
  5346. GFP_KERNEL);
  5347. if (!msm_codec_conf) {
  5348. ret = -ENOMEM;
  5349. goto err;
  5350. }
  5351. for (i = 0; i < wsa_max_devs; i++) {
  5352. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  5353. GFP_KERNEL);
  5354. if (!dev_name_str) {
  5355. ret = -ENOMEM;
  5356. goto err;
  5357. }
  5358. ret = of_property_read_string_index(pdev->dev.of_node,
  5359. "qcom,wsa-aux-dev-prefix",
  5360. wsa881x_dev_info[i].index,
  5361. auxdev_name_prefix);
  5362. if (ret) {
  5363. dev_err(&pdev->dev,
  5364. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  5365. __func__, ret);
  5366. ret = -EINVAL;
  5367. goto err;
  5368. }
  5369. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  5370. msm_aux_dev[i].name = dev_name_str;
  5371. msm_aux_dev[i].codec_name = NULL;
  5372. msm_aux_dev[i].codec_of_node =
  5373. wsa881x_dev_info[i].of_node;
  5374. msm_aux_dev[i].init = msm_wsa881x_init;
  5375. msm_codec_conf[i].dev_name = NULL;
  5376. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  5377. msm_codec_conf[i].of_node =
  5378. wsa881x_dev_info[i].of_node;
  5379. }
  5380. for (i = 0; i < codec_aux_dev_cnt; i++) {
  5381. msm_aux_dev[wsa_max_devs + i].name = NULL;
  5382. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  5383. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  5384. aux_cdc_dev_info[i].of_node;
  5385. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  5386. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  5387. msm_codec_conf[wsa_max_devs + i].name_prefix =
  5388. NULL;
  5389. msm_codec_conf[wsa_max_devs + i].of_node =
  5390. aux_cdc_dev_info[i].of_node;
  5391. }
  5392. card->codec_conf = msm_codec_conf;
  5393. card->aux_dev = msm_aux_dev;
  5394. err:
  5395. return ret;
  5396. }
  5397. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  5398. {
  5399. int count = 0;
  5400. u32 mi2s_master_slave[MI2S_MAX];
  5401. int ret = 0;
  5402. for (count = 0; count < MI2S_MAX; count++) {
  5403. mutex_init(&mi2s_intf_conf[count].lock);
  5404. mi2s_intf_conf[count].ref_cnt = 0;
  5405. }
  5406. ret = of_property_read_u32_array(pdev->dev.of_node,
  5407. "qcom,msm-mi2s-master",
  5408. mi2s_master_slave, MI2S_MAX);
  5409. if (ret) {
  5410. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  5411. __func__);
  5412. } else {
  5413. for (count = 0; count < MI2S_MAX; count++) {
  5414. mi2s_intf_conf[count].msm_is_mi2s_master =
  5415. mi2s_master_slave[count];
  5416. }
  5417. }
  5418. }
  5419. static void msm_i2s_auxpcm_deinit(void)
  5420. {
  5421. int count = 0;
  5422. for (count = 0; count < MI2S_MAX; count++) {
  5423. mutex_destroy(&mi2s_intf_conf[count].lock);
  5424. mi2s_intf_conf[count].ref_cnt = 0;
  5425. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  5426. }
  5427. }
  5428. static int kona_ssr_enable(struct device *dev, void *data)
  5429. {
  5430. struct platform_device *pdev = to_platform_device(dev);
  5431. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5432. int ret = 0;
  5433. if (!card) {
  5434. dev_err(dev, "%s: card is NULL\n", __func__);
  5435. ret = -EINVAL;
  5436. goto err;
  5437. }
  5438. if (!strcmp(card->name, "kona-stub-snd-card")) {
  5439. /* TODO */
  5440. dev_dbg(dev, "%s: TODO \n", __func__);
  5441. }
  5442. snd_soc_card_change_online_state(card, 1);
  5443. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  5444. err:
  5445. return ret;
  5446. }
  5447. static void kona_ssr_disable(struct device *dev, void *data)
  5448. {
  5449. struct platform_device *pdev = to_platform_device(dev);
  5450. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5451. if (!card) {
  5452. dev_err(dev, "%s: card is NULL\n", __func__);
  5453. return;
  5454. }
  5455. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  5456. snd_soc_card_change_online_state(card, 0);
  5457. if (!strcmp(card->name, "kona-stub-snd-card")) {
  5458. /* TODO */
  5459. dev_dbg(dev, "%s: TODO \n", __func__);
  5460. }
  5461. }
  5462. static const struct snd_event_ops kona_ssr_ops = {
  5463. .enable = kona_ssr_enable,
  5464. .disable = kona_ssr_disable,
  5465. };
  5466. static int msm_audio_ssr_compare(struct device *dev, void *data)
  5467. {
  5468. struct device_node *node = data;
  5469. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  5470. __func__, dev->of_node, node);
  5471. return (dev->of_node && dev->of_node == node);
  5472. }
  5473. static int msm_audio_ssr_register(struct device *dev)
  5474. {
  5475. struct device_node *np = dev->of_node;
  5476. struct snd_event_clients *ssr_clients = NULL;
  5477. struct device_node *node = NULL;
  5478. int ret = 0;
  5479. int i = 0;
  5480. for (i = 0; ; i++) {
  5481. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  5482. if (!node)
  5483. break;
  5484. snd_event_mstr_add_client(&ssr_clients,
  5485. msm_audio_ssr_compare, node);
  5486. }
  5487. ret = snd_event_master_register(dev, &kona_ssr_ops,
  5488. ssr_clients, NULL);
  5489. if (!ret)
  5490. snd_event_notify(dev, SND_EVENT_UP);
  5491. return ret;
  5492. }
  5493. static int msm_asoc_machine_probe(struct platform_device *pdev)
  5494. {
  5495. struct snd_soc_card *card = NULL;
  5496. struct msm_asoc_mach_data *pdata = NULL;
  5497. const char *mbhc_audio_jack_type = NULL;
  5498. int ret = 0;
  5499. if (!pdev->dev.of_node) {
  5500. dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
  5501. return -EINVAL;
  5502. }
  5503. pdata = devm_kzalloc(&pdev->dev,
  5504. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  5505. if (!pdata)
  5506. return -ENOMEM;
  5507. card = populate_snd_card_dailinks(&pdev->dev);
  5508. if (!card) {
  5509. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  5510. ret = -EINVAL;
  5511. goto err;
  5512. }
  5513. card->dev = &pdev->dev;
  5514. platform_set_drvdata(pdev, card);
  5515. snd_soc_card_set_drvdata(card, pdata);
  5516. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  5517. if (ret) {
  5518. dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
  5519. __func__, ret);
  5520. goto err;
  5521. }
  5522. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  5523. if (ret) {
  5524. dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
  5525. __func__, ret);
  5526. goto err;
  5527. }
  5528. ret = msm_populate_dai_link_component_of_node(card);
  5529. if (ret) {
  5530. ret = -EPROBE_DEFER;
  5531. goto err;
  5532. }
  5533. ret = msm_init_aux_dev(pdev, card);
  5534. if (ret)
  5535. goto err;
  5536. ret = devm_snd_soc_register_card(&pdev->dev, card);
  5537. if (ret == -EPROBE_DEFER) {
  5538. if (codec_reg_done)
  5539. ret = -EINVAL;
  5540. goto err;
  5541. } else if (ret) {
  5542. dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
  5543. __func__, ret);
  5544. goto err;
  5545. }
  5546. dev_info(&pdev->dev, "%s: Sound card %s registered\n",
  5547. __func__, card->name);
  5548. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5549. "qcom,hph-en1-gpio", 0);
  5550. if (!pdata->hph_en1_gpio_p) {
  5551. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  5552. __func__, "qcom,hph-en1-gpio",
  5553. pdev->dev.of_node->full_name);
  5554. }
  5555. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5556. "qcom,hph-en0-gpio", 0);
  5557. if (!pdata->hph_en0_gpio_p) {
  5558. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  5559. __func__, "qcom,hph-en0-gpio",
  5560. pdev->dev.of_node->full_name);
  5561. }
  5562. ret = of_property_read_string(pdev->dev.of_node,
  5563. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  5564. if (ret) {
  5565. dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
  5566. __func__, "qcom,mbhc-audio-jack-type",
  5567. pdev->dev.of_node->full_name);
  5568. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  5569. } else {
  5570. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  5571. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  5572. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  5573. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  5574. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  5575. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  5576. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  5577. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  5578. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  5579. } else {
  5580. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  5581. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  5582. }
  5583. }
  5584. /*
  5585. * Parse US-Euro gpio info from DT. Report no error if us-euro
  5586. * entry is not found in DT file as some targets do not support
  5587. * US-Euro detection
  5588. */
  5589. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5590. "qcom,us-euro-gpios", 0);
  5591. if (!pdata->us_euro_gpio_p) {
  5592. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  5593. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  5594. } else {
  5595. dev_dbg(&pdev->dev, "%s detected\n",
  5596. "qcom,us-euro-gpios");
  5597. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  5598. }
  5599. if (wcd_mbhc_cfg.enable_usbc_analog)
  5600. wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
  5601. pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
  5602. "fsa4480-i2c-handle", 0);
  5603. if (!pdata->fsa_handle)
  5604. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  5605. "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
  5606. msm_i2s_auxpcm_init(pdev);
  5607. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5608. "qcom,cdc-dmic01-gpios",
  5609. 0);
  5610. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5611. "qcom,cdc-dmic23-gpios",
  5612. 0);
  5613. pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5614. "qcom,cdc-dmic45-gpios",
  5615. 0);
  5616. ret = msm_audio_ssr_register(&pdev->dev);
  5617. if (ret)
  5618. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  5619. __func__, ret);
  5620. is_initial_boot = true;
  5621. return 0;
  5622. err:
  5623. devm_kfree(&pdev->dev, pdata);
  5624. return ret;
  5625. }
  5626. static int msm_asoc_machine_remove(struct platform_device *pdev)
  5627. {
  5628. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5629. snd_event_master_deregister(&pdev->dev);
  5630. snd_soc_unregister_card(card);
  5631. msm_i2s_auxpcm_deinit();
  5632. return 0;
  5633. }
  5634. static struct platform_driver kona_asoc_machine_driver = {
  5635. .driver = {
  5636. .name = DRV_NAME,
  5637. .owner = THIS_MODULE,
  5638. .pm = &snd_soc_pm_ops,
  5639. .of_match_table = kona_asoc_machine_of_match,
  5640. },
  5641. .probe = msm_asoc_machine_probe,
  5642. .remove = msm_asoc_machine_remove,
  5643. };
  5644. module_platform_driver(kona_asoc_machine_driver);
  5645. MODULE_DESCRIPTION("ALSA SoC msm");
  5646. MODULE_LICENSE("GPL v2");
  5647. MODULE_ALIAS("platform:" DRV_NAME);
  5648. MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);