dp_main.c 186 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_api.h>
  24. #include <hif.h>
  25. #include <htt.h>
  26. #include <wdi_event.h>
  27. #include <queue.h>
  28. #include "dp_htt.h"
  29. #include "dp_types.h"
  30. #include "dp_internal.h"
  31. #include "dp_tx.h"
  32. #include "dp_tx_desc.h"
  33. #include "dp_rx.h"
  34. #include <cdp_txrx_handle.h>
  35. #include <wlan_cfg.h>
  36. #include "cdp_txrx_cmn_struct.h"
  37. #include <qdf_util.h>
  38. #include "dp_peer.h"
  39. #include "dp_rx_mon.h"
  40. #include "htt_stats.h"
  41. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  42. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  43. #include "cdp_txrx_flow_ctrl_v2.h"
  44. #else
  45. static inline void
  46. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  47. {
  48. return;
  49. }
  50. #endif
  51. #include "dp_ipa.h"
  52. #ifdef CONFIG_MCL
  53. static void dp_service_mon_rings(void *arg);
  54. #ifndef REMOVE_PKT_LOG
  55. #include <pktlog_ac_api.h>
  56. #include <pktlog_ac.h>
  57. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn);
  58. #endif
  59. #endif
  60. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  61. #define DP_INTR_POLL_TIMER_MS 10
  62. #define DP_WDS_AGING_TIMER_DEFAULT_MS 120000
  63. #define DP_MCS_LENGTH (6*MAX_MCS)
  64. #define DP_NSS_LENGTH (6*SS_COUNT)
  65. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  66. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  67. #define DP_MAX_MCS_STRING_LEN 30
  68. #define DP_CURR_FW_STATS_AVAIL 19
  69. #define DP_HTT_DBG_EXT_STATS_MAX 256
  70. #ifdef IPA_OFFLOAD
  71. /* Exclude IPA rings from the interrupt context */
  72. #define TX_RING_MASK_VAL 0xb
  73. #define RX_RING_MASK_VAL 0x7
  74. #else
  75. #define TX_RING_MASK_VAL 0xF
  76. #define RX_RING_MASK_VAL 0xF
  77. #endif
  78. bool rx_hash = 1;
  79. qdf_declare_param(rx_hash, bool);
  80. #define STR_MAXLEN 64
  81. #define DP_PPDU_STATS_CFG_ALL 0xffff
  82. /**
  83. * default_dscp_tid_map - Default DSCP-TID mapping
  84. *
  85. * DSCP TID AC
  86. * 000000 0 WME_AC_BE
  87. * 001000 1 WME_AC_BK
  88. * 010000 1 WME_AC_BK
  89. * 011000 0 WME_AC_BE
  90. * 100000 5 WME_AC_VI
  91. * 101000 5 WME_AC_VI
  92. * 110000 6 WME_AC_VO
  93. * 111000 6 WME_AC_VO
  94. */
  95. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  96. 0, 0, 0, 0, 0, 0, 0, 0,
  97. 1, 1, 1, 1, 1, 1, 1, 1,
  98. 1, 1, 1, 1, 1, 1, 1, 1,
  99. 0, 0, 0, 0, 0, 0, 0, 0,
  100. 5, 5, 5, 5, 5, 5, 5, 5,
  101. 5, 5, 5, 5, 5, 5, 5, 5,
  102. 6, 6, 6, 6, 6, 6, 6, 6,
  103. 6, 6, 6, 6, 6, 6, 6, 6,
  104. };
  105. /*
  106. * struct dp_rate_debug
  107. *
  108. * @mcs_type: print string for a given mcs
  109. * @valid: valid mcs rate?
  110. */
  111. struct dp_rate_debug {
  112. char mcs_type[DP_MAX_MCS_STRING_LEN];
  113. uint8_t valid;
  114. };
  115. #define MCS_VALID 1
  116. #define MCS_INVALID 0
  117. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  118. {
  119. {"OFDM 48 Mbps", MCS_VALID},
  120. {"OFDM 24 Mbps", MCS_VALID},
  121. {"OFDM 12 Mbps", MCS_VALID},
  122. {"OFDM 6 Mbps ", MCS_VALID},
  123. {"OFDM 54 Mbps", MCS_VALID},
  124. {"OFDM 36 Mbps", MCS_VALID},
  125. {"OFDM 18 Mbps", MCS_VALID},
  126. {"OFDM 9 Mbps ", MCS_VALID},
  127. {"INVALID ", MCS_INVALID},
  128. {"INVALID ", MCS_INVALID},
  129. {"INVALID ", MCS_INVALID},
  130. {"INVALID ", MCS_INVALID},
  131. {"INVALID ", MCS_VALID},
  132. },
  133. {
  134. {"CCK 11 Mbps Long ", MCS_VALID},
  135. {"CCK 5.5 Mbps Long ", MCS_VALID},
  136. {"CCK 2 Mbps Long ", MCS_VALID},
  137. {"CCK 1 Mbps Long ", MCS_VALID},
  138. {"CCK 11 Mbps Short ", MCS_VALID},
  139. {"CCK 5.5 Mbps Short", MCS_VALID},
  140. {"CCK 2 Mbps Short ", MCS_VALID},
  141. {"INVALID ", MCS_INVALID},
  142. {"INVALID ", MCS_INVALID},
  143. {"INVALID ", MCS_INVALID},
  144. {"INVALID ", MCS_INVALID},
  145. {"INVALID ", MCS_INVALID},
  146. {"INVALID ", MCS_VALID},
  147. },
  148. {
  149. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  150. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  151. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  152. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  153. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  154. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  155. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  156. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  157. {"INVALID ", MCS_INVALID},
  158. {"INVALID ", MCS_INVALID},
  159. {"INVALID ", MCS_INVALID},
  160. {"INVALID ", MCS_INVALID},
  161. {"INVALID ", MCS_VALID},
  162. },
  163. {
  164. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  165. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  166. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  167. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  168. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  169. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  170. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  171. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  172. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  173. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  174. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  175. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  176. {"INVALID ", MCS_VALID},
  177. },
  178. {
  179. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  180. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  181. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  182. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  183. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  184. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  185. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  186. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  187. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  188. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  189. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  190. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  191. {"INVALID ", MCS_VALID},
  192. }
  193. };
  194. /**
  195. * @brief Cpu ring map types
  196. */
  197. enum dp_cpu_ring_map_types {
  198. DP_DEFAULT_MAP,
  199. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  200. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  201. DP_NSS_ALL_RADIO_OFFLOADED_MAP,
  202. DP_CPU_RING_MAP_MAX
  203. };
  204. /**
  205. * @brief Cpu to tx ring map
  206. */
  207. static uint8_t dp_cpu_ring_map[DP_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  208. {0x0, 0x1, 0x2, 0x0},
  209. {0x1, 0x2, 0x1, 0x2},
  210. {0x0, 0x2, 0x0, 0x2},
  211. {0x2, 0x2, 0x2, 0x2}
  212. };
  213. /**
  214. * @brief Select the type of statistics
  215. */
  216. enum dp_stats_type {
  217. STATS_FW = 0,
  218. STATS_HOST = 1,
  219. STATS_TYPE_MAX = 2,
  220. };
  221. /**
  222. * @brief General Firmware statistics options
  223. *
  224. */
  225. enum dp_fw_stats {
  226. TXRX_FW_STATS_INVALID = -1,
  227. };
  228. /**
  229. * dp_stats_mapping_table - Firmware and Host statistics
  230. * currently supported
  231. */
  232. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  233. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  234. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  235. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  236. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  237. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  238. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  239. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  240. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  241. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  242. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  243. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  244. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  245. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  246. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  247. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  248. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  249. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  250. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  251. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  252. /* Last ENUM for HTT FW STATS */
  253. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  254. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  255. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  256. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  257. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  258. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  259. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  260. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  261. };
  262. /**
  263. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  264. * @ring_num: ring num of the ring being queried
  265. * @grp_mask: the grp_mask array for the ring type in question.
  266. *
  267. * The grp_mask array is indexed by group number and the bit fields correspond
  268. * to ring numbers. We are finding which interrupt group a ring belongs to.
  269. *
  270. * Return: the index in the grp_mask array with the ring number.
  271. * -QDF_STATUS_E_NOENT if no entry is found
  272. */
  273. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  274. {
  275. int ext_group_num;
  276. int mask = 1 << ring_num;
  277. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  278. ext_group_num++) {
  279. if (mask & grp_mask[ext_group_num])
  280. return ext_group_num;
  281. }
  282. return -QDF_STATUS_E_NOENT;
  283. }
  284. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  285. enum hal_ring_type ring_type,
  286. int ring_num)
  287. {
  288. int *grp_mask;
  289. switch (ring_type) {
  290. case WBM2SW_RELEASE:
  291. /* dp_tx_comp_handler - soc->tx_comp_ring */
  292. if (ring_num < 3)
  293. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  294. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  295. else if (ring_num == 3) {
  296. /* sw treats this as a separate ring type */
  297. grp_mask = &soc->wlan_cfg_ctx->
  298. int_rx_wbm_rel_ring_mask[0];
  299. ring_num = 0;
  300. } else {
  301. qdf_assert(0);
  302. return -QDF_STATUS_E_NOENT;
  303. }
  304. break;
  305. case REO_EXCEPTION:
  306. /* dp_rx_err_process - &soc->reo_exception_ring */
  307. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  308. break;
  309. case REO_DST:
  310. /* dp_rx_process - soc->reo_dest_ring */
  311. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  312. break;
  313. case REO_STATUS:
  314. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  315. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  316. break;
  317. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  318. case RXDMA_MONITOR_STATUS:
  319. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  320. case RXDMA_MONITOR_DST:
  321. /* dp_mon_process */
  322. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  323. break;
  324. case RXDMA_DST:
  325. /* dp_rxdma_err_process */
  326. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  327. break;
  328. case RXDMA_BUF:
  329. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  330. break;
  331. case RXDMA_MONITOR_BUF:
  332. /* TODO: support low_thresh interrupt */
  333. return -QDF_STATUS_E_NOENT;
  334. break;
  335. case TCL_DATA:
  336. case TCL_CMD:
  337. case REO_CMD:
  338. case SW2WBM_RELEASE:
  339. case WBM_IDLE_LINK:
  340. /* normally empty SW_TO_HW rings */
  341. return -QDF_STATUS_E_NOENT;
  342. break;
  343. case TCL_STATUS:
  344. case REO_REINJECT:
  345. /* misc unused rings */
  346. return -QDF_STATUS_E_NOENT;
  347. break;
  348. case CE_SRC:
  349. case CE_DST:
  350. case CE_DST_STATUS:
  351. /* CE_rings - currently handled by hif */
  352. default:
  353. return -QDF_STATUS_E_NOENT;
  354. break;
  355. }
  356. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  357. }
  358. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  359. *ring_params, int ring_type, int ring_num)
  360. {
  361. int msi_group_number;
  362. int msi_data_count;
  363. int ret;
  364. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  365. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  366. &msi_data_count, &msi_data_start,
  367. &msi_irq_start);
  368. if (ret)
  369. return;
  370. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  371. ring_num);
  372. if (msi_group_number < 0) {
  373. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  374. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  375. ring_type, ring_num);
  376. ring_params->msi_addr = 0;
  377. ring_params->msi_data = 0;
  378. return;
  379. }
  380. if (msi_group_number > msi_data_count) {
  381. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  382. FL("2 msi_groups will share an msi; msi_group_num %d"),
  383. msi_group_number);
  384. QDF_ASSERT(0);
  385. }
  386. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  387. ring_params->msi_addr = addr_low;
  388. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  389. ring_params->msi_data = (msi_group_number % msi_data_count)
  390. + msi_data_start;
  391. ring_params->flags |= HAL_SRNG_MSI_INTR;
  392. }
  393. /**
  394. * dp_print_ast_stats() - Dump AST table contents
  395. * @soc: Datapath soc handle
  396. *
  397. * return void
  398. */
  399. #ifdef FEATURE_WDS
  400. static void dp_print_ast_stats(struct dp_soc *soc)
  401. {
  402. uint8_t i;
  403. uint8_t num_entries = 0;
  404. struct dp_vdev *vdev;
  405. struct dp_pdev *pdev;
  406. struct dp_peer *peer;
  407. struct dp_ast_entry *ase, *tmp_ase;
  408. DP_PRINT_STATS("AST Stats:");
  409. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  410. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  411. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  412. DP_PRINT_STATS("AST Table:");
  413. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  414. pdev = soc->pdev_list[i];
  415. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  416. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  417. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  418. DP_PRINT_STATS("%6d mac_addr = %pM"
  419. " peer_mac_addr = %pM"
  420. " type = %d"
  421. " next_hop = %d"
  422. " is_active = %d"
  423. " is_bss = %d",
  424. ++num_entries,
  425. ase->mac_addr.raw,
  426. ase->peer->mac_addr.raw,
  427. ase->type,
  428. ase->next_hop,
  429. ase->is_active,
  430. ase->is_bss);
  431. }
  432. }
  433. }
  434. }
  435. }
  436. #else
  437. static void dp_print_ast_stats(struct dp_soc *soc)
  438. {
  439. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_WDS");
  440. return;
  441. }
  442. #endif
  443. /*
  444. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  445. */
  446. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  447. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  448. {
  449. void *hal_soc = soc->hal_soc;
  450. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  451. /* TODO: See if we should get align size from hal */
  452. uint32_t ring_base_align = 8;
  453. struct hal_srng_params ring_params;
  454. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  455. /* TODO: Currently hal layer takes care of endianness related settings.
  456. * See if these settings need to passed from DP layer
  457. */
  458. ring_params.flags = 0;
  459. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  460. FL("Ring type: %d, num:%d"), ring_type, ring_num);
  461. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  462. srng->hal_srng = NULL;
  463. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  464. srng->num_entries = num_entries;
  465. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  466. soc->osdev, soc->osdev->dev, srng->alloc_size,
  467. &(srng->base_paddr_unaligned));
  468. if (!srng->base_vaddr_unaligned) {
  469. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  470. FL("alloc failed - ring_type: %d, ring_num %d"),
  471. ring_type, ring_num);
  472. return QDF_STATUS_E_NOMEM;
  473. }
  474. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  475. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  476. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  477. ((unsigned long)(ring_params.ring_base_vaddr) -
  478. (unsigned long)srng->base_vaddr_unaligned);
  479. ring_params.num_entries = num_entries;
  480. if (soc->intr_mode == DP_INTR_MSI) {
  481. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  482. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  483. FL("Using MSI for ring_type: %d, ring_num %d"),
  484. ring_type, ring_num);
  485. } else {
  486. ring_params.msi_data = 0;
  487. ring_params.msi_addr = 0;
  488. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  489. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  490. ring_type, ring_num);
  491. }
  492. /*
  493. * Setup interrupt timer and batch counter thresholds for
  494. * interrupt mitigation based on ring type
  495. */
  496. if (ring_type == REO_DST) {
  497. ring_params.intr_timer_thres_us =
  498. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  499. ring_params.intr_batch_cntr_thres_entries =
  500. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  501. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  502. ring_params.intr_timer_thres_us =
  503. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  504. ring_params.intr_batch_cntr_thres_entries =
  505. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  506. } else {
  507. ring_params.intr_timer_thres_us =
  508. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  509. ring_params.intr_batch_cntr_thres_entries =
  510. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  511. }
  512. /* Enable low threshold interrupts for rx buffer rings (regular and
  513. * monitor buffer rings.
  514. * TODO: See if this is required for any other ring
  515. */
  516. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  517. (ring_type == RXDMA_MONITOR_STATUS)) {
  518. /* TODO: Setting low threshold to 1/8th of ring size
  519. * see if this needs to be configurable
  520. */
  521. ring_params.low_threshold = num_entries >> 3;
  522. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  523. ring_params.intr_timer_thres_us = 0x1000;
  524. }
  525. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  526. mac_id, &ring_params);
  527. if (!srng->hal_srng) {
  528. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  529. srng->alloc_size,
  530. srng->base_vaddr_unaligned,
  531. srng->base_paddr_unaligned, 0);
  532. }
  533. return 0;
  534. }
  535. /**
  536. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  537. * Any buffers allocated and attached to ring entries are expected to be freed
  538. * before calling this function.
  539. */
  540. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  541. int ring_type, int ring_num)
  542. {
  543. if (!srng->hal_srng) {
  544. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  545. FL("Ring type: %d, num:%d not setup"),
  546. ring_type, ring_num);
  547. return;
  548. }
  549. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  550. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  551. srng->alloc_size,
  552. srng->base_vaddr_unaligned,
  553. srng->base_paddr_unaligned, 0);
  554. srng->hal_srng = NULL;
  555. }
  556. /* TODO: Need this interface from HIF */
  557. void *hif_get_hal_handle(void *hif_handle);
  558. /*
  559. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  560. * @dp_ctx: DP SOC handle
  561. * @budget: Number of frames/descriptors that can be processed in one shot
  562. *
  563. * Return: remaining budget/quota for the soc device
  564. */
  565. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  566. {
  567. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  568. struct dp_soc *soc = int_ctx->soc;
  569. int ring = 0;
  570. uint32_t work_done = 0;
  571. int budget = dp_budget;
  572. uint8_t tx_mask = int_ctx->tx_ring_mask;
  573. uint8_t rx_mask = int_ctx->rx_ring_mask;
  574. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  575. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  576. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  577. uint32_t remaining_quota = dp_budget;
  578. struct dp_pdev *pdev = NULL;
  579. /* Process Tx completion interrupts first to return back buffers */
  580. while (tx_mask) {
  581. if (tx_mask & 0x1) {
  582. work_done = dp_tx_comp_handler(soc,
  583. soc->tx_comp_ring[ring].hal_srng,
  584. remaining_quota);
  585. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  586. "tx mask 0x%x ring %d, budget %d, work_done %d",
  587. tx_mask, ring, budget, work_done);
  588. budget -= work_done;
  589. if (budget <= 0)
  590. goto budget_done;
  591. remaining_quota = budget;
  592. }
  593. tx_mask = tx_mask >> 1;
  594. ring++;
  595. }
  596. /* Process REO Exception ring interrupt */
  597. if (rx_err_mask) {
  598. work_done = dp_rx_err_process(soc,
  599. soc->reo_exception_ring.hal_srng,
  600. remaining_quota);
  601. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  602. "REO Exception Ring: work_done %d budget %d",
  603. work_done, budget);
  604. budget -= work_done;
  605. if (budget <= 0) {
  606. goto budget_done;
  607. }
  608. remaining_quota = budget;
  609. }
  610. /* Process Rx WBM release ring interrupt */
  611. if (rx_wbm_rel_mask) {
  612. work_done = dp_rx_wbm_err_process(soc,
  613. soc->rx_rel_ring.hal_srng, remaining_quota);
  614. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  615. "WBM Release Ring: work_done %d budget %d",
  616. work_done, budget);
  617. budget -= work_done;
  618. if (budget <= 0) {
  619. goto budget_done;
  620. }
  621. remaining_quota = budget;
  622. }
  623. /* Process Rx interrupts */
  624. if (rx_mask) {
  625. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  626. if (rx_mask & (1 << ring)) {
  627. work_done = dp_rx_process(int_ctx,
  628. soc->reo_dest_ring[ring].hal_srng,
  629. remaining_quota);
  630. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  631. "rx mask 0x%x ring %d, work_done %d budget %d",
  632. rx_mask, ring, work_done, budget);
  633. budget -= work_done;
  634. if (budget <= 0)
  635. goto budget_done;
  636. remaining_quota = budget;
  637. }
  638. }
  639. for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
  640. /* Need to check on this, why is required */
  641. work_done = dp_rxdma_err_process(soc, ring,
  642. remaining_quota);
  643. budget -= work_done;
  644. }
  645. }
  646. if (reo_status_mask)
  647. dp_reo_status_ring_handler(soc);
  648. /* Process LMAC interrupts */
  649. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  650. pdev = soc->pdev_list[ring];
  651. if (pdev == NULL)
  652. continue;
  653. if (int_ctx->rx_mon_ring_mask & (1 << ring)) {
  654. work_done = dp_mon_process(soc, ring, remaining_quota);
  655. budget -= work_done;
  656. if (budget <= 0)
  657. goto budget_done;
  658. remaining_quota = budget;
  659. }
  660. if (int_ctx->rxdma2host_ring_mask & (1 << ring)) {
  661. work_done = dp_rxdma_err_process(soc, ring,
  662. remaining_quota);
  663. budget -= work_done;
  664. if (budget <= 0)
  665. goto budget_done;
  666. remaining_quota = budget;
  667. }
  668. if (int_ctx->host2rxdma_ring_mask & (1 << ring)) {
  669. union dp_rx_desc_list_elem_t *desc_list = NULL;
  670. union dp_rx_desc_list_elem_t *tail = NULL;
  671. struct dp_srng *rx_refill_buf_ring =
  672. &pdev->rx_refill_buf_ring;
  673. DP_STATS_INC(pdev, replenish.low_thresh_intrs, 1);
  674. dp_rx_buffers_replenish(soc, ring,
  675. rx_refill_buf_ring,
  676. &soc->rx_desc_buf[ring], 0,
  677. &desc_list, &tail, HAL_RX_BUF_RBM_SW3_BM);
  678. }
  679. }
  680. qdf_lro_flush(int_ctx->lro_ctx);
  681. budget_done:
  682. return dp_budget - budget;
  683. }
  684. #ifdef DP_INTR_POLL_BASED
  685. /* dp_interrupt_timer()- timer poll for interrupts
  686. *
  687. * @arg: SoC Handle
  688. *
  689. * Return:
  690. *
  691. */
  692. static void dp_interrupt_timer(void *arg)
  693. {
  694. struct dp_soc *soc = (struct dp_soc *) arg;
  695. int i;
  696. if (qdf_atomic_read(&soc->cmn_init_done)) {
  697. for (i = 0;
  698. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  699. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  700. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  701. }
  702. }
  703. /*
  704. * dp_soc_interrupt_attach_poll() - Register handlers for DP interrupts
  705. * @txrx_soc: DP SOC handle
  706. *
  707. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  708. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  709. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  710. *
  711. * Return: 0 for success. nonzero for failure.
  712. */
  713. static QDF_STATUS dp_soc_interrupt_attach_poll(void *txrx_soc)
  714. {
  715. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  716. int i;
  717. soc->intr_mode = DP_INTR_POLL;
  718. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  719. soc->intr_ctx[i].dp_intr_id = i;
  720. soc->intr_ctx[i].tx_ring_mask =
  721. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  722. soc->intr_ctx[i].rx_ring_mask =
  723. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  724. soc->intr_ctx[i].rx_mon_ring_mask =
  725. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  726. soc->intr_ctx[i].rx_err_ring_mask =
  727. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  728. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  729. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  730. soc->intr_ctx[i].reo_status_ring_mask =
  731. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  732. soc->intr_ctx[i].rxdma2host_ring_mask =
  733. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  734. soc->intr_ctx[i].soc = soc;
  735. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  736. }
  737. qdf_timer_init(soc->osdev, &soc->int_timer,
  738. dp_interrupt_timer, (void *)soc,
  739. QDF_TIMER_TYPE_WAKE_APPS);
  740. return QDF_STATUS_SUCCESS;
  741. }
  742. #if defined(CONFIG_MCL)
  743. extern int con_mode_monitor;
  744. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  745. /*
  746. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  747. * @txrx_soc: DP SOC handle
  748. *
  749. * Call the appropriate attach function based on the mode of operation.
  750. * This is a WAR for enabling monitor mode.
  751. *
  752. * Return: 0 for success. nonzero for failure.
  753. */
  754. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  755. {
  756. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  757. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  758. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  759. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  760. "%s: Poll mode", __func__);
  761. return dp_soc_interrupt_attach_poll(txrx_soc);
  762. } else {
  763. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  764. "%s: Interrupt mode", __func__);
  765. return dp_soc_interrupt_attach(txrx_soc);
  766. }
  767. }
  768. #else
  769. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  770. {
  771. return dp_soc_interrupt_attach_poll(txrx_soc);
  772. }
  773. #endif
  774. #endif
  775. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  776. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  777. {
  778. int j;
  779. int num_irq = 0;
  780. int tx_mask =
  781. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  782. int rx_mask =
  783. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  784. int rx_mon_mask =
  785. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  786. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  787. soc->wlan_cfg_ctx, intr_ctx_num);
  788. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  789. soc->wlan_cfg_ctx, intr_ctx_num);
  790. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  791. soc->wlan_cfg_ctx, intr_ctx_num);
  792. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  793. soc->wlan_cfg_ctx, intr_ctx_num);
  794. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  795. soc->wlan_cfg_ctx, intr_ctx_num);
  796. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  797. if (tx_mask & (1 << j)) {
  798. irq_id_map[num_irq++] =
  799. (wbm2host_tx_completions_ring1 - j);
  800. }
  801. if (rx_mask & (1 << j)) {
  802. irq_id_map[num_irq++] =
  803. (reo2host_destination_ring1 - j);
  804. }
  805. if (rxdma2host_ring_mask & (1 << j)) {
  806. irq_id_map[num_irq++] =
  807. rxdma2host_destination_ring_mac1 -
  808. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  809. }
  810. if (host2rxdma_ring_mask & (1 << j)) {
  811. irq_id_map[num_irq++] =
  812. host2rxdma_host_buf_ring_mac1 -
  813. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  814. }
  815. if (rx_mon_mask & (1 << j)) {
  816. irq_id_map[num_irq++] =
  817. ppdu_end_interrupts_mac1 -
  818. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  819. irq_id_map[num_irq++] =
  820. rxdma2host_monitor_status_ring_mac1 -
  821. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  822. }
  823. if (rx_wbm_rel_ring_mask & (1 << j))
  824. irq_id_map[num_irq++] = wbm2host_rx_release;
  825. if (rx_err_ring_mask & (1 << j))
  826. irq_id_map[num_irq++] = reo2host_exception;
  827. if (reo_status_ring_mask & (1 << j))
  828. irq_id_map[num_irq++] = reo2host_status;
  829. }
  830. *num_irq_r = num_irq;
  831. }
  832. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  833. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  834. int msi_vector_count, int msi_vector_start)
  835. {
  836. int tx_mask = wlan_cfg_get_tx_ring_mask(
  837. soc->wlan_cfg_ctx, intr_ctx_num);
  838. int rx_mask = wlan_cfg_get_rx_ring_mask(
  839. soc->wlan_cfg_ctx, intr_ctx_num);
  840. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  841. soc->wlan_cfg_ctx, intr_ctx_num);
  842. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  843. soc->wlan_cfg_ctx, intr_ctx_num);
  844. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  845. soc->wlan_cfg_ctx, intr_ctx_num);
  846. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  847. soc->wlan_cfg_ctx, intr_ctx_num);
  848. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  849. soc->wlan_cfg_ctx, intr_ctx_num);
  850. unsigned int vector =
  851. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  852. int num_irq = 0;
  853. soc->intr_mode = DP_INTR_MSI;
  854. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  855. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  856. irq_id_map[num_irq++] =
  857. pld_get_msi_irq(soc->osdev->dev, vector);
  858. *num_irq_r = num_irq;
  859. }
  860. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  861. int *irq_id_map, int *num_irq)
  862. {
  863. int msi_vector_count, ret;
  864. uint32_t msi_base_data, msi_vector_start;
  865. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  866. &msi_vector_count,
  867. &msi_base_data,
  868. &msi_vector_start);
  869. if (ret)
  870. return dp_soc_interrupt_map_calculate_integrated(soc,
  871. intr_ctx_num, irq_id_map, num_irq);
  872. else
  873. dp_soc_interrupt_map_calculate_msi(soc,
  874. intr_ctx_num, irq_id_map, num_irq,
  875. msi_vector_count, msi_vector_start);
  876. }
  877. /*
  878. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  879. * @txrx_soc: DP SOC handle
  880. *
  881. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  882. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  883. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  884. *
  885. * Return: 0 for success. nonzero for failure.
  886. */
  887. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  888. {
  889. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  890. int i = 0;
  891. int num_irq = 0;
  892. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  893. int ret = 0;
  894. /* Map of IRQ ids registered with one interrupt context */
  895. int irq_id_map[HIF_MAX_GRP_IRQ];
  896. int tx_mask =
  897. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  898. int rx_mask =
  899. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  900. int rx_mon_mask =
  901. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  902. int rx_err_ring_mask =
  903. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  904. int rx_wbm_rel_ring_mask =
  905. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  906. int reo_status_ring_mask =
  907. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  908. int rxdma2host_ring_mask =
  909. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  910. int host2rxdma_ring_mask =
  911. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  912. soc->intr_ctx[i].dp_intr_id = i;
  913. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  914. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  915. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  916. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  917. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  918. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  919. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  920. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  921. soc->intr_ctx[i].soc = soc;
  922. num_irq = 0;
  923. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  924. &num_irq);
  925. ret = hif_register_ext_group(soc->hif_handle,
  926. num_irq, irq_id_map, dp_service_srngs,
  927. &soc->intr_ctx[i], "dp_intr",
  928. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  929. if (ret) {
  930. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  931. FL("failed, ret = %d"), ret);
  932. return QDF_STATUS_E_FAILURE;
  933. }
  934. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  935. }
  936. hif_configure_ext_group_interrupts(soc->hif_handle);
  937. return QDF_STATUS_SUCCESS;
  938. }
  939. /*
  940. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  941. * @txrx_soc: DP SOC handle
  942. *
  943. * Return: void
  944. */
  945. static void dp_soc_interrupt_detach(void *txrx_soc)
  946. {
  947. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  948. int i;
  949. if (soc->intr_mode == DP_INTR_POLL) {
  950. qdf_timer_stop(&soc->int_timer);
  951. qdf_timer_free(&soc->int_timer);
  952. } else {
  953. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  954. }
  955. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  956. soc->intr_ctx[i].tx_ring_mask = 0;
  957. soc->intr_ctx[i].rx_ring_mask = 0;
  958. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  959. soc->intr_ctx[i].rx_err_ring_mask = 0;
  960. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  961. soc->intr_ctx[i].reo_status_ring_mask = 0;
  962. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  963. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  964. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  965. }
  966. }
  967. #define AVG_MAX_MPDUS_PER_TID 128
  968. #define AVG_TIDS_PER_CLIENT 2
  969. #define AVG_FLOWS_PER_TID 2
  970. #define AVG_MSDUS_PER_FLOW 128
  971. #define AVG_MSDUS_PER_MPDU 4
  972. /*
  973. * Allocate and setup link descriptor pool that will be used by HW for
  974. * various link and queue descriptors and managed by WBM
  975. */
  976. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  977. {
  978. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  979. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  980. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  981. uint32_t num_mpdus_per_link_desc =
  982. hal_num_mpdus_per_link_desc(soc->hal_soc);
  983. uint32_t num_msdus_per_link_desc =
  984. hal_num_msdus_per_link_desc(soc->hal_soc);
  985. uint32_t num_mpdu_links_per_queue_desc =
  986. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  987. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  988. uint32_t total_link_descs, total_mem_size;
  989. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  990. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  991. uint32_t num_link_desc_banks;
  992. uint32_t last_bank_size = 0;
  993. uint32_t entry_size, num_entries;
  994. int i;
  995. uint32_t desc_id = 0;
  996. /* Only Tx queue descriptors are allocated from common link descriptor
  997. * pool Rx queue descriptors are not included in this because (REO queue
  998. * extension descriptors) they are expected to be allocated contiguously
  999. * with REO queue descriptors
  1000. */
  1001. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1002. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1003. num_mpdu_queue_descs = num_mpdu_link_descs /
  1004. num_mpdu_links_per_queue_desc;
  1005. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1006. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1007. num_msdus_per_link_desc;
  1008. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1009. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1010. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1011. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1012. /* Round up to power of 2 */
  1013. total_link_descs = 1;
  1014. while (total_link_descs < num_entries)
  1015. total_link_descs <<= 1;
  1016. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1017. FL("total_link_descs: %u, link_desc_size: %d"),
  1018. total_link_descs, link_desc_size);
  1019. total_mem_size = total_link_descs * link_desc_size;
  1020. total_mem_size += link_desc_align;
  1021. if (total_mem_size <= max_alloc_size) {
  1022. num_link_desc_banks = 0;
  1023. last_bank_size = total_mem_size;
  1024. } else {
  1025. num_link_desc_banks = (total_mem_size) /
  1026. (max_alloc_size - link_desc_align);
  1027. last_bank_size = total_mem_size %
  1028. (max_alloc_size - link_desc_align);
  1029. }
  1030. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1031. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1032. total_mem_size, num_link_desc_banks);
  1033. for (i = 0; i < num_link_desc_banks; i++) {
  1034. soc->link_desc_banks[i].base_vaddr_unaligned =
  1035. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1036. max_alloc_size,
  1037. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1038. soc->link_desc_banks[i].size = max_alloc_size;
  1039. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1040. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1041. ((unsigned long)(
  1042. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1043. link_desc_align));
  1044. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1045. soc->link_desc_banks[i].base_paddr_unaligned) +
  1046. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1047. (unsigned long)(
  1048. soc->link_desc_banks[i].base_vaddr_unaligned));
  1049. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1050. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1051. FL("Link descriptor memory alloc failed"));
  1052. goto fail;
  1053. }
  1054. }
  1055. if (last_bank_size) {
  1056. /* Allocate last bank in case total memory required is not exact
  1057. * multiple of max_alloc_size
  1058. */
  1059. soc->link_desc_banks[i].base_vaddr_unaligned =
  1060. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1061. last_bank_size,
  1062. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1063. soc->link_desc_banks[i].size = last_bank_size;
  1064. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1065. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1066. ((unsigned long)(
  1067. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1068. link_desc_align));
  1069. soc->link_desc_banks[i].base_paddr =
  1070. (unsigned long)(
  1071. soc->link_desc_banks[i].base_paddr_unaligned) +
  1072. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1073. (unsigned long)(
  1074. soc->link_desc_banks[i].base_vaddr_unaligned));
  1075. }
  1076. /* Allocate and setup link descriptor idle list for HW internal use */
  1077. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1078. total_mem_size = entry_size * total_link_descs;
  1079. if (total_mem_size <= max_alloc_size) {
  1080. void *desc;
  1081. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1082. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1083. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1084. FL("Link desc idle ring setup failed"));
  1085. goto fail;
  1086. }
  1087. hal_srng_access_start_unlocked(soc->hal_soc,
  1088. soc->wbm_idle_link_ring.hal_srng);
  1089. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1090. soc->link_desc_banks[i].base_paddr; i++) {
  1091. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1092. ((unsigned long)(
  1093. soc->link_desc_banks[i].base_vaddr) -
  1094. (unsigned long)(
  1095. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1096. / link_desc_size;
  1097. unsigned long paddr = (unsigned long)(
  1098. soc->link_desc_banks[i].base_paddr);
  1099. while (num_entries && (desc = hal_srng_src_get_next(
  1100. soc->hal_soc,
  1101. soc->wbm_idle_link_ring.hal_srng))) {
  1102. hal_set_link_desc_addr(desc,
  1103. LINK_DESC_COOKIE(desc_id, i), paddr);
  1104. num_entries--;
  1105. desc_id++;
  1106. paddr += link_desc_size;
  1107. }
  1108. }
  1109. hal_srng_access_end_unlocked(soc->hal_soc,
  1110. soc->wbm_idle_link_ring.hal_srng);
  1111. } else {
  1112. uint32_t num_scatter_bufs;
  1113. uint32_t num_entries_per_buf;
  1114. uint32_t rem_entries;
  1115. uint8_t *scatter_buf_ptr;
  1116. uint16_t scatter_buf_num;
  1117. soc->wbm_idle_scatter_buf_size =
  1118. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1119. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1120. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1121. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1122. soc->hal_soc, total_mem_size,
  1123. soc->wbm_idle_scatter_buf_size);
  1124. for (i = 0; i < num_scatter_bufs; i++) {
  1125. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1126. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1127. soc->wbm_idle_scatter_buf_size,
  1128. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  1129. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1130. QDF_TRACE(QDF_MODULE_ID_DP,
  1131. QDF_TRACE_LEVEL_ERROR,
  1132. FL("Scatter list memory alloc failed"));
  1133. goto fail;
  1134. }
  1135. }
  1136. /* Populate idle list scatter buffers with link descriptor
  1137. * pointers
  1138. */
  1139. scatter_buf_num = 0;
  1140. scatter_buf_ptr = (uint8_t *)(
  1141. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1142. rem_entries = num_entries_per_buf;
  1143. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1144. soc->link_desc_banks[i].base_paddr; i++) {
  1145. uint32_t num_link_descs =
  1146. (soc->link_desc_banks[i].size -
  1147. ((unsigned long)(
  1148. soc->link_desc_banks[i].base_vaddr) -
  1149. (unsigned long)(
  1150. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1151. / link_desc_size;
  1152. unsigned long paddr = (unsigned long)(
  1153. soc->link_desc_banks[i].base_paddr);
  1154. while (num_link_descs) {
  1155. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1156. LINK_DESC_COOKIE(desc_id, i), paddr);
  1157. num_link_descs--;
  1158. desc_id++;
  1159. paddr += link_desc_size;
  1160. rem_entries--;
  1161. if (rem_entries) {
  1162. scatter_buf_ptr += entry_size;
  1163. } else {
  1164. rem_entries = num_entries_per_buf;
  1165. scatter_buf_num++;
  1166. if (scatter_buf_num >= num_scatter_bufs)
  1167. break;
  1168. scatter_buf_ptr = (uint8_t *)(
  1169. soc->wbm_idle_scatter_buf_base_vaddr[
  1170. scatter_buf_num]);
  1171. }
  1172. }
  1173. }
  1174. /* Setup link descriptor idle list in HW */
  1175. hal_setup_link_idle_list(soc->hal_soc,
  1176. soc->wbm_idle_scatter_buf_base_paddr,
  1177. soc->wbm_idle_scatter_buf_base_vaddr,
  1178. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1179. (uint32_t)(scatter_buf_ptr -
  1180. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1181. scatter_buf_num-1])), total_link_descs);
  1182. }
  1183. return 0;
  1184. fail:
  1185. if (soc->wbm_idle_link_ring.hal_srng) {
  1186. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  1187. WBM_IDLE_LINK, 0);
  1188. }
  1189. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1190. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1191. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1192. soc->wbm_idle_scatter_buf_size,
  1193. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1194. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1195. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1196. }
  1197. }
  1198. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1199. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1200. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1201. soc->link_desc_banks[i].size,
  1202. soc->link_desc_banks[i].base_vaddr_unaligned,
  1203. soc->link_desc_banks[i].base_paddr_unaligned,
  1204. 0);
  1205. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1206. }
  1207. }
  1208. return QDF_STATUS_E_FAILURE;
  1209. }
  1210. /*
  1211. * Free link descriptor pool that was setup HW
  1212. */
  1213. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1214. {
  1215. int i;
  1216. if (soc->wbm_idle_link_ring.hal_srng) {
  1217. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1218. WBM_IDLE_LINK, 0);
  1219. }
  1220. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1221. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1222. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1223. soc->wbm_idle_scatter_buf_size,
  1224. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1225. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1226. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1227. }
  1228. }
  1229. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1230. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1231. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1232. soc->link_desc_banks[i].size,
  1233. soc->link_desc_banks[i].base_vaddr_unaligned,
  1234. soc->link_desc_banks[i].base_paddr_unaligned,
  1235. 0);
  1236. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1237. }
  1238. }
  1239. }
  1240. /* TODO: Following should be configurable */
  1241. #define WBM_RELEASE_RING_SIZE 64
  1242. #define TCL_CMD_RING_SIZE 32
  1243. #define TCL_STATUS_RING_SIZE 32
  1244. #if defined(QCA_WIFI_QCA6290)
  1245. #define REO_DST_RING_SIZE 1024
  1246. #else
  1247. #define REO_DST_RING_SIZE 2048
  1248. #endif
  1249. #define REO_REINJECT_RING_SIZE 32
  1250. #define RX_RELEASE_RING_SIZE 1024
  1251. #define REO_EXCEPTION_RING_SIZE 128
  1252. #define REO_CMD_RING_SIZE 32
  1253. #define REO_STATUS_RING_SIZE 32
  1254. #define RXDMA_BUF_RING_SIZE 1024
  1255. #define RXDMA_REFILL_RING_SIZE 4096
  1256. #define RXDMA_MONITOR_BUF_RING_SIZE 4096
  1257. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  1258. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  1259. #define RXDMA_MONITOR_DESC_RING_SIZE 4096
  1260. #define RXDMA_ERR_DST_RING_SIZE 1024
  1261. /*
  1262. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  1263. * @soc: Datapath SOC handle
  1264. *
  1265. * This is a timer function used to age out stale WDS nodes from
  1266. * AST table
  1267. */
  1268. #ifdef FEATURE_WDS
  1269. static void dp_wds_aging_timer_fn(void *soc_hdl)
  1270. {
  1271. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1272. struct dp_pdev *pdev;
  1273. struct dp_vdev *vdev;
  1274. struct dp_peer *peer;
  1275. struct dp_ast_entry *ase, *temp_ase;
  1276. int i;
  1277. qdf_spin_lock_bh(&soc->ast_lock);
  1278. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1279. pdev = soc->pdev_list[i];
  1280. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1281. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1282. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1283. /*
  1284. * Do not expire static ast entries
  1285. */
  1286. if (ase->type == CDP_TXRX_AST_TYPE_STATIC)
  1287. continue;
  1288. if (ase->is_active) {
  1289. ase->is_active = FALSE;
  1290. continue;
  1291. }
  1292. DP_STATS_INC(soc, ast.aged_out, 1);
  1293. soc->cdp_soc.ol_ops->peer_del_wds_entry(
  1294. vdev->osif_vdev,
  1295. ase->mac_addr.raw);
  1296. dp_peer_del_ast(soc, ase);
  1297. }
  1298. }
  1299. }
  1300. }
  1301. qdf_spin_unlock_bh(&soc->ast_lock);
  1302. if (qdf_atomic_read(&soc->cmn_init_done))
  1303. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1304. }
  1305. /*
  1306. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1307. * @soc: Datapath SOC handle
  1308. *
  1309. * Return: None
  1310. */
  1311. static void dp_soc_wds_attach(struct dp_soc *soc)
  1312. {
  1313. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  1314. dp_wds_aging_timer_fn, (void *)soc,
  1315. QDF_TIMER_TYPE_WAKE_APPS);
  1316. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1317. }
  1318. /*
  1319. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1320. * @txrx_soc: DP SOC handle
  1321. *
  1322. * Return: None
  1323. */
  1324. static void dp_soc_wds_detach(struct dp_soc *soc)
  1325. {
  1326. qdf_timer_stop(&soc->wds_aging_timer);
  1327. qdf_timer_free(&soc->wds_aging_timer);
  1328. }
  1329. #else
  1330. static void dp_soc_wds_attach(struct dp_soc *soc)
  1331. {
  1332. }
  1333. static void dp_soc_wds_detach(struct dp_soc *soc)
  1334. {
  1335. }
  1336. #endif
  1337. /*
  1338. * dp_soc_reset_ring_map() - Reset cpu ring map
  1339. * @soc: Datapath soc handler
  1340. *
  1341. * This api resets the default cpu ring map
  1342. */
  1343. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1344. {
  1345. uint8_t i;
  1346. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1347. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1348. if (nss_config == 1) {
  1349. /*
  1350. * Setting Tx ring map for one nss offloaded radio
  1351. */
  1352. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1353. } else if (nss_config == 2) {
  1354. /*
  1355. * Setting Tx ring for two nss offloaded radios
  1356. */
  1357. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1358. } else {
  1359. /*
  1360. * Setting Tx ring map for all nss offloaded radios
  1361. */
  1362. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_ALL_RADIO_OFFLOADED_MAP][i];
  1363. }
  1364. }
  1365. }
  1366. /*
  1367. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1368. * @dp_soc - DP soc handle
  1369. * @ring_type - ring type
  1370. * @ring_num - ring_num
  1371. *
  1372. * return 0 or 1
  1373. */
  1374. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1375. {
  1376. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1377. uint8_t status = 0;
  1378. switch (ring_type) {
  1379. case WBM2SW_RELEASE:
  1380. case REO_DST:
  1381. case RXDMA_BUF:
  1382. status = ((nss_config) & (1 << ring_num));
  1383. break;
  1384. default:
  1385. break;
  1386. }
  1387. return status;
  1388. }
  1389. /*
  1390. * dp_soc_reset_intr_mask() - reset interrupt mask
  1391. * @dp_soc - DP Soc handle
  1392. *
  1393. * Return: Return void
  1394. */
  1395. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1396. {
  1397. uint8_t j;
  1398. int *grp_mask = NULL;
  1399. int group_number, mask, num_ring;
  1400. /* number of tx ring */
  1401. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1402. /*
  1403. * group mask for tx completion ring.
  1404. */
  1405. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1406. /* loop and reset the mask for only offloaded ring */
  1407. for (j = 0; j < num_ring; j++) {
  1408. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1409. continue;
  1410. }
  1411. /*
  1412. * Group number corresponding to tx offloaded ring.
  1413. */
  1414. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1415. if (group_number < 0) {
  1416. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1417. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1418. WBM2SW_RELEASE, j);
  1419. return;
  1420. }
  1421. /* reset the tx mask for offloaded ring */
  1422. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1423. mask &= (~(1 << j));
  1424. /*
  1425. * reset the interrupt mask for offloaded ring.
  1426. */
  1427. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1428. }
  1429. /* number of rx rings */
  1430. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1431. /*
  1432. * group mask for reo destination ring.
  1433. */
  1434. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1435. /* loop and reset the mask for only offloaded ring */
  1436. for (j = 0; j < num_ring; j++) {
  1437. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  1438. continue;
  1439. }
  1440. /*
  1441. * Group number corresponding to rx offloaded ring.
  1442. */
  1443. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1444. if (group_number < 0) {
  1445. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1446. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1447. REO_DST, j);
  1448. return;
  1449. }
  1450. /* set the interrupt mask for offloaded ring */
  1451. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1452. mask &= (~(1 << j));
  1453. /*
  1454. * set the interrupt mask to zero for rx offloaded radio.
  1455. */
  1456. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1457. }
  1458. /*
  1459. * group mask for Rx buffer refill ring
  1460. */
  1461. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1462. /* loop and reset the mask for only offloaded ring */
  1463. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1464. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1465. continue;
  1466. }
  1467. /*
  1468. * Group number corresponding to rx offloaded ring.
  1469. */
  1470. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1471. if (group_number < 0) {
  1472. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1473. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1474. REO_DST, j);
  1475. return;
  1476. }
  1477. /* set the interrupt mask for offloaded ring */
  1478. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1479. group_number);
  1480. mask &= (~(1 << j));
  1481. /*
  1482. * set the interrupt mask to zero for rx offloaded radio.
  1483. */
  1484. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1485. group_number, mask);
  1486. }
  1487. }
  1488. #ifdef IPA_OFFLOAD
  1489. /**
  1490. * dp_reo_remap_config() - configure reo remap register value based
  1491. * nss configuration.
  1492. * based on offload_radio value below remap configuration
  1493. * get applied.
  1494. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  1495. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  1496. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  1497. * 3 - both Radios handled by NSS (remap not required)
  1498. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  1499. *
  1500. * @remap1: output parameter indicates reo remap 1 register value
  1501. * @remap2: output parameter indicates reo remap 2 register value
  1502. * Return: bool type, true if remap is configured else false.
  1503. */
  1504. static bool dp_reo_remap_config(struct dp_soc *soc,
  1505. uint32_t *remap1,
  1506. uint32_t *remap2)
  1507. {
  1508. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  1509. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  1510. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  1511. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  1512. return true;
  1513. }
  1514. #else
  1515. static bool dp_reo_remap_config(struct dp_soc *soc,
  1516. uint32_t *remap1,
  1517. uint32_t *remap2)
  1518. {
  1519. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1520. switch (offload_radio) {
  1521. case 0:
  1522. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1523. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1524. (0x3 << 18) | (0x4 << 21)) << 8;
  1525. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1526. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1527. (0x3 << 18) | (0x4 << 21)) << 8;
  1528. break;
  1529. case 1:
  1530. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  1531. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  1532. (0x2 << 18) | (0x3 << 21)) << 8;
  1533. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  1534. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  1535. (0x4 << 18) | (0x2 << 21)) << 8;
  1536. break;
  1537. case 2:
  1538. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  1539. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  1540. (0x1 << 18) | (0x3 << 21)) << 8;
  1541. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  1542. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  1543. (0x4 << 18) | (0x1 << 21)) << 8;
  1544. break;
  1545. case 3:
  1546. /* return false if both radios are offloaded to NSS */
  1547. return false;
  1548. }
  1549. return true;
  1550. }
  1551. #endif
  1552. /*
  1553. * dp_reo_frag_dst_set() - configure reo register to set the
  1554. * fragment destination ring
  1555. * @soc : Datapath soc
  1556. * @frag_dst_ring : output parameter to set fragment destination ring
  1557. *
  1558. * Based on offload_radio below fragment destination rings is selected
  1559. * 0 - TCL
  1560. * 1 - SW1
  1561. * 2 - SW2
  1562. * 3 - SW3
  1563. * 4 - SW4
  1564. * 5 - Release
  1565. * 6 - FW
  1566. * 7 - alternate select
  1567. *
  1568. * return: void
  1569. */
  1570. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  1571. {
  1572. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1573. switch (offload_radio) {
  1574. case 0:
  1575. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  1576. break;
  1577. case 3:
  1578. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  1579. break;
  1580. default:
  1581. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1582. FL("dp_reo_frag_dst_set invalid offload radio config"));
  1583. break;
  1584. }
  1585. }
  1586. /*
  1587. * dp_soc_cmn_setup() - Common SoC level initializion
  1588. * @soc: Datapath SOC handle
  1589. *
  1590. * This is an internal function used to setup common SOC data structures,
  1591. * to be called from PDEV attach after receiving HW mode capabilities from FW
  1592. */
  1593. static int dp_soc_cmn_setup(struct dp_soc *soc)
  1594. {
  1595. int i;
  1596. struct hal_reo_params reo_params;
  1597. int tx_ring_size;
  1598. int tx_comp_ring_size;
  1599. if (qdf_atomic_read(&soc->cmn_init_done))
  1600. return 0;
  1601. if (dp_peer_find_attach(soc))
  1602. goto fail0;
  1603. if (dp_hw_link_desc_pool_setup(soc))
  1604. goto fail1;
  1605. /* Setup SRNG rings */
  1606. /* Common rings */
  1607. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  1608. WBM_RELEASE_RING_SIZE)) {
  1609. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1610. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  1611. goto fail1;
  1612. }
  1613. soc->num_tcl_data_rings = 0;
  1614. /* Tx data rings */
  1615. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1616. soc->num_tcl_data_rings =
  1617. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1618. tx_comp_ring_size =
  1619. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1620. tx_ring_size =
  1621. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1622. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1623. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  1624. TCL_DATA, i, 0, tx_ring_size)) {
  1625. QDF_TRACE(QDF_MODULE_ID_DP,
  1626. QDF_TRACE_LEVEL_ERROR,
  1627. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  1628. goto fail1;
  1629. }
  1630. /*
  1631. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  1632. * count
  1633. */
  1634. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  1635. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  1636. QDF_TRACE(QDF_MODULE_ID_DP,
  1637. QDF_TRACE_LEVEL_ERROR,
  1638. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  1639. goto fail1;
  1640. }
  1641. }
  1642. } else {
  1643. /* This will be incremented during per pdev ring setup */
  1644. soc->num_tcl_data_rings = 0;
  1645. }
  1646. if (dp_tx_soc_attach(soc)) {
  1647. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1648. FL("dp_tx_soc_attach failed"));
  1649. goto fail1;
  1650. }
  1651. /* TCL command and status rings */
  1652. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  1653. TCL_CMD_RING_SIZE)) {
  1654. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1655. FL("dp_srng_setup failed for tcl_cmd_ring"));
  1656. goto fail1;
  1657. }
  1658. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  1659. TCL_STATUS_RING_SIZE)) {
  1660. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1661. FL("dp_srng_setup failed for tcl_status_ring"));
  1662. goto fail1;
  1663. }
  1664. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  1665. * descriptors
  1666. */
  1667. /* Rx data rings */
  1668. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1669. soc->num_reo_dest_rings =
  1670. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1671. QDF_TRACE(QDF_MODULE_ID_DP,
  1672. QDF_TRACE_LEVEL_ERROR,
  1673. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  1674. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1675. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  1676. i, 0, REO_DST_RING_SIZE)) {
  1677. QDF_TRACE(QDF_MODULE_ID_DP,
  1678. QDF_TRACE_LEVEL_ERROR,
  1679. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  1680. goto fail1;
  1681. }
  1682. }
  1683. } else {
  1684. /* This will be incremented during per pdev ring setup */
  1685. soc->num_reo_dest_rings = 0;
  1686. }
  1687. /* LMAC RxDMA to SW Rings configuration */
  1688. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  1689. /* Only valid for MCL */
  1690. struct dp_pdev *pdev = soc->pdev_list[0];
  1691. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  1692. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  1693. RXDMA_DST, 0, i, RXDMA_ERR_DST_RING_SIZE)) {
  1694. QDF_TRACE(QDF_MODULE_ID_DP,
  1695. QDF_TRACE_LEVEL_ERROR,
  1696. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  1697. goto fail1;
  1698. }
  1699. }
  1700. }
  1701. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  1702. /* REO reinjection ring */
  1703. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  1704. REO_REINJECT_RING_SIZE)) {
  1705. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1706. FL("dp_srng_setup failed for reo_reinject_ring"));
  1707. goto fail1;
  1708. }
  1709. /* Rx release ring */
  1710. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  1711. RX_RELEASE_RING_SIZE)) {
  1712. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1713. FL("dp_srng_setup failed for rx_rel_ring"));
  1714. goto fail1;
  1715. }
  1716. /* Rx exception ring */
  1717. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  1718. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  1719. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1720. FL("dp_srng_setup failed for reo_exception_ring"));
  1721. goto fail1;
  1722. }
  1723. /* REO command and status rings */
  1724. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  1725. REO_CMD_RING_SIZE)) {
  1726. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1727. FL("dp_srng_setup failed for reo_cmd_ring"));
  1728. goto fail1;
  1729. }
  1730. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  1731. TAILQ_INIT(&soc->rx.reo_cmd_list);
  1732. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  1733. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  1734. REO_STATUS_RING_SIZE)) {
  1735. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1736. FL("dp_srng_setup failed for reo_status_ring"));
  1737. goto fail1;
  1738. }
  1739. qdf_spinlock_create(&soc->ast_lock);
  1740. dp_soc_wds_attach(soc);
  1741. /* Reset the cpu ring map if radio is NSS offloaded */
  1742. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1743. dp_soc_reset_cpu_ring_map(soc);
  1744. dp_soc_reset_intr_mask(soc);
  1745. }
  1746. /* Setup HW REO */
  1747. qdf_mem_zero(&reo_params, sizeof(reo_params));
  1748. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1749. /*
  1750. * Reo ring remap is not required if both radios
  1751. * are offloaded to NSS
  1752. */
  1753. if (!dp_reo_remap_config(soc,
  1754. &reo_params.remap1,
  1755. &reo_params.remap2))
  1756. goto out;
  1757. reo_params.rx_hash_enabled = true;
  1758. }
  1759. /* setup the global rx defrag waitlist */
  1760. TAILQ_INIT(&soc->rx.defrag.waitlist);
  1761. soc->rx.defrag.timeout_ms =
  1762. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  1763. soc->rx.flags.defrag_timeout_check =
  1764. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  1765. out:
  1766. /*
  1767. * set the fragment destination ring
  1768. */
  1769. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  1770. hal_reo_setup(soc->hal_soc, &reo_params);
  1771. qdf_atomic_set(&soc->cmn_init_done, 1);
  1772. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  1773. return 0;
  1774. fail1:
  1775. /*
  1776. * Cleanup will be done as part of soc_detach, which will
  1777. * be called on pdev attach failure
  1778. */
  1779. fail0:
  1780. return QDF_STATUS_E_FAILURE;
  1781. }
  1782. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  1783. static void dp_lro_hash_setup(struct dp_soc *soc)
  1784. {
  1785. struct cdp_lro_hash_config lro_hash;
  1786. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  1787. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1788. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1789. FL("LRO disabled RX hash disabled"));
  1790. return;
  1791. }
  1792. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  1793. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  1794. lro_hash.lro_enable = 1;
  1795. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  1796. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  1797. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  1798. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  1799. }
  1800. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  1801. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  1802. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1803. LRO_IPV4_SEED_ARR_SZ));
  1804. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  1805. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1806. LRO_IPV6_SEED_ARR_SZ));
  1807. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  1808. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  1809. lro_hash.lro_enable, lro_hash.tcp_flag,
  1810. lro_hash.tcp_flag_mask);
  1811. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1812. QDF_TRACE_LEVEL_ERROR,
  1813. (void *)lro_hash.toeplitz_hash_ipv4,
  1814. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1815. LRO_IPV4_SEED_ARR_SZ));
  1816. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1817. QDF_TRACE_LEVEL_ERROR,
  1818. (void *)lro_hash.toeplitz_hash_ipv6,
  1819. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1820. LRO_IPV6_SEED_ARR_SZ));
  1821. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  1822. if (soc->cdp_soc.ol_ops->lro_hash_config)
  1823. (void)soc->cdp_soc.ol_ops->lro_hash_config
  1824. (soc->ctrl_psoc, &lro_hash);
  1825. }
  1826. /*
  1827. * dp_rxdma_ring_setup() - configure the RX DMA rings
  1828. * @soc: data path SoC handle
  1829. * @pdev: Physical device handle
  1830. *
  1831. * Return: 0 - success, > 0 - failure
  1832. */
  1833. #ifdef QCA_HOST2FW_RXBUF_RING
  1834. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1835. struct dp_pdev *pdev)
  1836. {
  1837. int max_mac_rings =
  1838. wlan_cfg_get_num_mac_rings
  1839. (pdev->wlan_cfg_ctx);
  1840. int i;
  1841. for (i = 0; i < max_mac_rings; i++) {
  1842. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1843. "%s: pdev_id %d mac_id %d\n",
  1844. __func__, pdev->pdev_id, i);
  1845. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  1846. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  1847. QDF_TRACE(QDF_MODULE_ID_DP,
  1848. QDF_TRACE_LEVEL_ERROR,
  1849. FL("failed rx mac ring setup"));
  1850. return QDF_STATUS_E_FAILURE;
  1851. }
  1852. }
  1853. return QDF_STATUS_SUCCESS;
  1854. }
  1855. #else
  1856. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1857. struct dp_pdev *pdev)
  1858. {
  1859. return QDF_STATUS_SUCCESS;
  1860. }
  1861. #endif
  1862. /**
  1863. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  1864. * @pdev - DP_PDEV handle
  1865. *
  1866. * Return: void
  1867. */
  1868. static inline void
  1869. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  1870. {
  1871. uint8_t map_id;
  1872. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  1873. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  1874. sizeof(default_dscp_tid_map));
  1875. }
  1876. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  1877. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  1878. pdev->dscp_tid_map[map_id],
  1879. map_id);
  1880. }
  1881. }
  1882. #ifdef QCA_SUPPORT_SON
  1883. /**
  1884. * dp_mark_peer_inact(): Update peer inactivity status
  1885. * @peer_handle - datapath peer handle
  1886. *
  1887. * Return: void
  1888. */
  1889. void dp_mark_peer_inact(void *peer_handle, bool inactive)
  1890. {
  1891. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1892. struct dp_pdev *pdev;
  1893. struct dp_soc *soc;
  1894. bool inactive_old;
  1895. if (!peer)
  1896. return;
  1897. pdev = peer->vdev->pdev;
  1898. soc = pdev->soc;
  1899. inactive_old = peer->peer_bs_inact_flag == 1;
  1900. if (!inactive)
  1901. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1902. peer->peer_bs_inact_flag = inactive ? 1 : 0;
  1903. if (inactive_old != inactive) {
  1904. struct ieee80211com *ic;
  1905. struct ol_ath_softc_net80211 *scn;
  1906. scn = (struct ol_ath_softc_net80211 *)pdev->osif_pdev;
  1907. ic = &scn->sc_ic;
  1908. /**
  1909. * Note: a node lookup can happen in RX datapath context
  1910. * when a node changes from inactive to active (at most once
  1911. * per inactivity timeout threshold)
  1912. */
  1913. if (soc->cdp_soc.ol_ops->record_act_change) {
  1914. soc->cdp_soc.ol_ops->record_act_change(ic->ic_pdev_obj,
  1915. peer->mac_addr.raw, !inactive);
  1916. }
  1917. }
  1918. }
  1919. /**
  1920. * dp_txrx_peer_find_inact_timeout_handler(): Inactivity timeout function
  1921. *
  1922. * Periodically checks the inactivity status
  1923. */
  1924. static os_timer_func(dp_txrx_peer_find_inact_timeout_handler)
  1925. {
  1926. struct dp_pdev *pdev;
  1927. struct dp_vdev *vdev;
  1928. struct dp_peer *peer;
  1929. struct dp_soc *soc;
  1930. int i;
  1931. OS_GET_TIMER_ARG(soc, struct dp_soc *);
  1932. qdf_spin_lock(&soc->peer_ref_mutex);
  1933. for (i = 0; i < soc->pdev_count; i++) {
  1934. pdev = soc->pdev_list[i];
  1935. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1936. if (vdev->opmode != wlan_op_mode_ap)
  1937. continue;
  1938. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  1939. if (!peer->authorize) {
  1940. /**
  1941. * Inactivity check only interested in
  1942. * connected node
  1943. */
  1944. continue;
  1945. }
  1946. if (peer->peer_bs_inact > soc->pdev_bs_inact_reload) {
  1947. /**
  1948. * This check ensures we do not wait extra long
  1949. * due to the potential race condition
  1950. */
  1951. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1952. }
  1953. if (peer->peer_bs_inact > 0) {
  1954. /* Do not let it wrap around */
  1955. peer->peer_bs_inact--;
  1956. }
  1957. if (peer->peer_bs_inact == 0)
  1958. dp_mark_peer_inact(peer, true);
  1959. }
  1960. }
  1961. }
  1962. qdf_spin_unlock(&soc->peer_ref_mutex);
  1963. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  1964. soc->pdev_bs_inact_interval * 1000);
  1965. }
  1966. #else
  1967. void dp_mark_peer_inact(void *peer, bool inactive)
  1968. {
  1969. return;
  1970. }
  1971. #endif
  1972. /*
  1973. * dp_pdev_attach_wifi3() - attach txrx pdev
  1974. * @ctrl_pdev: Opaque PDEV object
  1975. * @txrx_soc: Datapath SOC handle
  1976. * @htc_handle: HTC handle for host-target interface
  1977. * @qdf_osdev: QDF OS device
  1978. * @pdev_id: PDEV ID
  1979. *
  1980. * Return: DP PDEV handle on success, NULL on failure
  1981. */
  1982. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  1983. struct cdp_cfg *ctrl_pdev,
  1984. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  1985. {
  1986. int tx_ring_size;
  1987. int tx_comp_ring_size;
  1988. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1989. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  1990. if (!pdev) {
  1991. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1992. FL("DP PDEV memory allocation failed"));
  1993. goto fail0;
  1994. }
  1995. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  1996. if (!pdev->wlan_cfg_ctx) {
  1997. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1998. FL("pdev cfg_attach failed"));
  1999. qdf_mem_free(pdev);
  2000. goto fail0;
  2001. }
  2002. /*
  2003. * set nss pdev config based on soc config
  2004. */
  2005. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2006. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev_id)));
  2007. pdev->soc = soc;
  2008. pdev->osif_pdev = ctrl_pdev;
  2009. pdev->pdev_id = pdev_id;
  2010. soc->pdev_list[pdev_id] = pdev;
  2011. soc->pdev_count++;
  2012. TAILQ_INIT(&pdev->vdev_list);
  2013. pdev->vdev_count = 0;
  2014. qdf_spinlock_create(&pdev->tx_mutex);
  2015. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2016. TAILQ_INIT(&pdev->neighbour_peers_list);
  2017. if (dp_soc_cmn_setup(soc)) {
  2018. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2019. FL("dp_soc_cmn_setup failed"));
  2020. goto fail1;
  2021. }
  2022. /* Setup per PDEV TCL rings if configured */
  2023. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2024. tx_ring_size =
  2025. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2026. tx_comp_ring_size =
  2027. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  2028. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2029. pdev_id, pdev_id, tx_ring_size)) {
  2030. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2031. FL("dp_srng_setup failed for tcl_data_ring"));
  2032. goto fail1;
  2033. }
  2034. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2035. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2036. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2037. FL("dp_srng_setup failed for tx_comp_ring"));
  2038. goto fail1;
  2039. }
  2040. soc->num_tcl_data_rings++;
  2041. }
  2042. /* Tx specific init */
  2043. if (dp_tx_pdev_attach(pdev)) {
  2044. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2045. FL("dp_tx_pdev_attach failed"));
  2046. goto fail1;
  2047. }
  2048. /* Setup per PDEV REO rings if configured */
  2049. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2050. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2051. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  2052. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2053. FL("dp_srng_setup failed for reo_dest_ringn"));
  2054. goto fail1;
  2055. }
  2056. soc->num_reo_dest_rings++;
  2057. }
  2058. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2059. RXDMA_REFILL_RING_SIZE)) {
  2060. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2061. FL("dp_srng_setup failed rx refill ring"));
  2062. goto fail1;
  2063. }
  2064. if (dp_rxdma_ring_setup(soc, pdev)) {
  2065. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2066. FL("RXDMA ring config failed"));
  2067. goto fail1;
  2068. }
  2069. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  2070. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  2071. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2072. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  2073. goto fail1;
  2074. }
  2075. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  2076. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  2077. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2078. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  2079. goto fail1;
  2080. }
  2081. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  2082. RXDMA_MONITOR_STATUS, 0, pdev_id,
  2083. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  2084. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2085. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  2086. goto fail1;
  2087. }
  2088. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring,
  2089. RXDMA_MONITOR_DESC, 0, pdev_id, RXDMA_MONITOR_DESC_RING_SIZE)) {
  2090. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2091. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  2092. goto fail1;
  2093. }
  2094. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2095. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2096. 0, pdev_id, RXDMA_ERR_DST_RING_SIZE)) {
  2097. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2098. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  2099. goto fail1;
  2100. }
  2101. }
  2102. /* Setup second Rx refill buffer ring */
  2103. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF, 2,
  2104. pdev->pdev_id, RXDMA_REFILL_RING_SIZE)) {
  2105. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2106. FL("dp_srng_setup failed second rx refill ring"));
  2107. goto fail1;
  2108. }
  2109. if (dp_ipa_ring_resource_setup(soc, pdev))
  2110. goto fail1;
  2111. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2112. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2113. FL("dp_ipa_uc_attach failed"));
  2114. goto fail1;
  2115. }
  2116. /* Rx specific init */
  2117. if (dp_rx_pdev_attach(pdev)) {
  2118. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2119. FL("dp_rx_pdev_attach failed"));
  2120. goto fail0;
  2121. }
  2122. DP_STATS_INIT(pdev);
  2123. /* Monitor filter init */
  2124. pdev->mon_filter_mode = MON_FILTER_ALL;
  2125. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2126. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2127. pdev->fp_data_filter = FILTER_DATA_ALL;
  2128. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2129. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2130. pdev->mo_data_filter = FILTER_DATA_ALL;
  2131. #ifndef CONFIG_WIN
  2132. /* MCL */
  2133. dp_local_peer_id_pool_init(pdev);
  2134. #endif
  2135. dp_dscp_tid_map_setup(pdev);
  2136. /* Rx monitor mode specific init */
  2137. if (dp_rx_pdev_mon_attach(pdev)) {
  2138. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2139. "dp_rx_pdev_attach failed\n");
  2140. goto fail1;
  2141. }
  2142. if (dp_wdi_event_attach(pdev)) {
  2143. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2144. "dp_wdi_evet_attach failed\n");
  2145. goto fail1;
  2146. }
  2147. #ifdef QCA_SUPPORT_SON
  2148. qdf_timer_init(soc->osdev, &soc->pdev_bs_inact_timer,
  2149. dp_txrx_peer_find_inact_timeout_handler,
  2150. (void *)soc, QDF_TIMER_TYPE_WAKE_APPS);
  2151. #endif
  2152. /* set the reo destination during initialization */
  2153. pdev->reo_dest = pdev->pdev_id + 1;
  2154. return (struct cdp_pdev *)pdev;
  2155. fail1:
  2156. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  2157. fail0:
  2158. return NULL;
  2159. }
  2160. /*
  2161. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2162. * @soc: data path SoC handle
  2163. * @pdev: Physical device handle
  2164. *
  2165. * Return: void
  2166. */
  2167. #ifdef QCA_HOST2FW_RXBUF_RING
  2168. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2169. struct dp_pdev *pdev)
  2170. {
  2171. int max_mac_rings =
  2172. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2173. int i;
  2174. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2175. max_mac_rings : MAX_RX_MAC_RINGS;
  2176. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2177. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2178. RXDMA_BUF, 1);
  2179. qdf_timer_free(&soc->mon_reap_timer);
  2180. }
  2181. #else
  2182. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2183. struct dp_pdev *pdev)
  2184. {
  2185. }
  2186. #endif
  2187. /*
  2188. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2189. * @pdev: device object
  2190. *
  2191. * Return: void
  2192. */
  2193. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2194. {
  2195. struct dp_neighbour_peer *peer = NULL;
  2196. struct dp_neighbour_peer *temp_peer = NULL;
  2197. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2198. neighbour_peer_list_elem, temp_peer) {
  2199. /* delete this peer from the list */
  2200. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2201. peer, neighbour_peer_list_elem);
  2202. qdf_mem_free(peer);
  2203. }
  2204. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2205. }
  2206. /*
  2207. * dp_pdev_detach_wifi3() - detach txrx pdev
  2208. * @txrx_pdev: Datapath PDEV handle
  2209. * @force: Force detach
  2210. *
  2211. */
  2212. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  2213. {
  2214. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2215. struct dp_soc *soc = pdev->soc;
  2216. qdf_nbuf_t curr_nbuf, next_nbuf;
  2217. dp_wdi_event_detach(pdev);
  2218. dp_tx_pdev_detach(pdev);
  2219. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2220. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2221. TCL_DATA, pdev->pdev_id);
  2222. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2223. WBM2SW_RELEASE, pdev->pdev_id);
  2224. }
  2225. dp_pktlogmod_exit(pdev);
  2226. dp_rx_pdev_detach(pdev);
  2227. dp_rx_pdev_mon_detach(pdev);
  2228. dp_neighbour_peers_detach(pdev);
  2229. qdf_spinlock_destroy(&pdev->tx_mutex);
  2230. dp_ipa_uc_detach(soc, pdev);
  2231. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF, 2);
  2232. /* Cleanup per PDEV REO rings if configured */
  2233. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2234. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  2235. REO_DST, pdev->pdev_id);
  2236. }
  2237. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  2238. dp_rxdma_ring_cleanup(soc, pdev);
  2239. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  2240. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  2241. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  2242. RXDMA_MONITOR_STATUS, 0);
  2243. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring,
  2244. RXDMA_MONITOR_DESC, 0);
  2245. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2246. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST, 0);
  2247. } else {
  2248. int i;
  2249. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2250. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[i],
  2251. RXDMA_DST, 0);
  2252. }
  2253. curr_nbuf = pdev->invalid_peer_head_msdu;
  2254. while (curr_nbuf) {
  2255. next_nbuf = qdf_nbuf_next(curr_nbuf);
  2256. qdf_nbuf_free(curr_nbuf);
  2257. curr_nbuf = next_nbuf;
  2258. }
  2259. soc->pdev_list[pdev->pdev_id] = NULL;
  2260. soc->pdev_count--;
  2261. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  2262. qdf_mem_free(pdev->dp_txrx_handle);
  2263. qdf_mem_free(pdev);
  2264. }
  2265. /*
  2266. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  2267. * @soc: DP SOC handle
  2268. */
  2269. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2270. {
  2271. struct reo_desc_list_node *desc;
  2272. struct dp_rx_tid *rx_tid;
  2273. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2274. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2275. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2276. rx_tid = &desc->rx_tid;
  2277. qdf_mem_unmap_nbytes_single(soc->osdev,
  2278. rx_tid->hw_qdesc_paddr,
  2279. QDF_DMA_BIDIRECTIONAL,
  2280. rx_tid->hw_qdesc_alloc_size);
  2281. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2282. qdf_mem_free(desc);
  2283. }
  2284. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2285. qdf_list_destroy(&soc->reo_desc_freelist);
  2286. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2287. }
  2288. /*
  2289. * dp_soc_detach_wifi3() - Detach txrx SOC
  2290. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  2291. */
  2292. static void dp_soc_detach_wifi3(void *txrx_soc)
  2293. {
  2294. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2295. int i;
  2296. qdf_atomic_set(&soc->cmn_init_done, 0);
  2297. qdf_flush_work(&soc->htt_stats.work);
  2298. qdf_disable_work(&soc->htt_stats.work);
  2299. /* Free pending htt stats messages */
  2300. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2301. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2302. if (soc->pdev_list[i])
  2303. dp_pdev_detach_wifi3(
  2304. (struct cdp_pdev *)soc->pdev_list[i], 1);
  2305. }
  2306. dp_peer_find_detach(soc);
  2307. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  2308. * SW descriptors
  2309. */
  2310. /* Free the ring memories */
  2311. /* Common rings */
  2312. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  2313. dp_tx_soc_detach(soc);
  2314. /* Tx data rings */
  2315. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2316. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2317. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  2318. TCL_DATA, i);
  2319. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  2320. WBM2SW_RELEASE, i);
  2321. }
  2322. }
  2323. /* TCL command and status rings */
  2324. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  2325. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  2326. /* Rx data rings */
  2327. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2328. soc->num_reo_dest_rings =
  2329. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2330. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2331. /* TODO: Get number of rings and ring sizes
  2332. * from wlan_cfg
  2333. */
  2334. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  2335. REO_DST, i);
  2336. }
  2337. }
  2338. /* REO reinjection ring */
  2339. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  2340. /* Rx release ring */
  2341. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  2342. /* Rx exception ring */
  2343. /* TODO: Better to store ring_type and ring_num in
  2344. * dp_srng during setup
  2345. */
  2346. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  2347. /* REO command and status rings */
  2348. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  2349. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  2350. dp_hw_link_desc_pool_cleanup(soc);
  2351. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  2352. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2353. htt_soc_detach(soc->htt_handle);
  2354. dp_reo_cmdlist_destroy(soc);
  2355. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2356. dp_reo_desc_freelist_destroy(soc);
  2357. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  2358. dp_soc_wds_detach(soc);
  2359. qdf_spinlock_destroy(&soc->ast_lock);
  2360. qdf_mem_free(soc);
  2361. }
  2362. /*
  2363. * dp_rxdma_ring_config() - configure the RX DMA rings
  2364. *
  2365. * This function is used to configure the MAC rings.
  2366. * On MCL host provides buffers in Host2FW ring
  2367. * FW refills (copies) buffers to the ring and updates
  2368. * ring_idx in register
  2369. *
  2370. * @soc: data path SoC handle
  2371. *
  2372. * Return: void
  2373. */
  2374. #ifdef QCA_HOST2FW_RXBUF_RING
  2375. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2376. {
  2377. int i;
  2378. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2379. struct dp_pdev *pdev = soc->pdev_list[i];
  2380. if (pdev) {
  2381. int mac_id = 0;
  2382. int j;
  2383. bool dbs_enable = 0;
  2384. int max_mac_rings =
  2385. wlan_cfg_get_num_mac_rings
  2386. (pdev->wlan_cfg_ctx);
  2387. htt_srng_setup(soc->htt_handle, 0,
  2388. pdev->rx_refill_buf_ring.hal_srng,
  2389. RXDMA_BUF);
  2390. if (pdev->rx_refill_buf_ring2.hal_srng)
  2391. htt_srng_setup(soc->htt_handle, 0,
  2392. pdev->rx_refill_buf_ring2.hal_srng,
  2393. RXDMA_BUF);
  2394. if (soc->cdp_soc.ol_ops->
  2395. is_hw_dbs_2x2_capable) {
  2396. dbs_enable = soc->cdp_soc.ol_ops->
  2397. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  2398. }
  2399. if (dbs_enable) {
  2400. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2401. QDF_TRACE_LEVEL_ERROR,
  2402. FL("DBS enabled max_mac_rings %d\n"),
  2403. max_mac_rings);
  2404. } else {
  2405. max_mac_rings = 1;
  2406. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2407. QDF_TRACE_LEVEL_ERROR,
  2408. FL("DBS disabled, max_mac_rings %d\n"),
  2409. max_mac_rings);
  2410. }
  2411. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2412. FL("pdev_id %d max_mac_rings %d\n"),
  2413. pdev->pdev_id, max_mac_rings);
  2414. for (j = 0; j < max_mac_rings; j++) {
  2415. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2416. QDF_TRACE_LEVEL_ERROR,
  2417. FL("mac_id %d\n"), mac_id);
  2418. htt_srng_setup(soc->htt_handle, mac_id,
  2419. pdev->rx_mac_buf_ring[j]
  2420. .hal_srng,
  2421. RXDMA_BUF);
  2422. htt_srng_setup(soc->htt_handle, mac_id,
  2423. pdev->rxdma_err_dst_ring[j]
  2424. .hal_srng,
  2425. RXDMA_DST);
  2426. mac_id++;
  2427. }
  2428. /* Configure monitor mode rings */
  2429. htt_srng_setup(soc->htt_handle, i,
  2430. pdev->rxdma_mon_buf_ring.hal_srng,
  2431. RXDMA_MONITOR_BUF);
  2432. htt_srng_setup(soc->htt_handle, i,
  2433. pdev->rxdma_mon_dst_ring.hal_srng,
  2434. RXDMA_MONITOR_DST);
  2435. htt_srng_setup(soc->htt_handle, i,
  2436. pdev->rxdma_mon_status_ring.hal_srng,
  2437. RXDMA_MONITOR_STATUS);
  2438. htt_srng_setup(soc->htt_handle, i,
  2439. pdev->rxdma_mon_desc_ring.hal_srng,
  2440. RXDMA_MONITOR_DESC);
  2441. }
  2442. }
  2443. /*
  2444. * Timer to reap rxdma status rings.
  2445. * Needed until we enable ppdu end interrupts
  2446. */
  2447. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  2448. dp_service_mon_rings, (void *)soc,
  2449. QDF_TIMER_TYPE_WAKE_APPS);
  2450. soc->reap_timer_init = 1;
  2451. }
  2452. #else
  2453. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2454. {
  2455. int i;
  2456. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2457. struct dp_pdev *pdev = soc->pdev_list[i];
  2458. if (pdev) {
  2459. int ring_idx = dp_get_ring_id_for_mac_id(soc, i);
  2460. htt_srng_setup(soc->htt_handle, i,
  2461. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  2462. htt_srng_setup(soc->htt_handle, i,
  2463. pdev->rxdma_mon_buf_ring.hal_srng,
  2464. RXDMA_MONITOR_BUF);
  2465. htt_srng_setup(soc->htt_handle, i,
  2466. pdev->rxdma_mon_dst_ring.hal_srng,
  2467. RXDMA_MONITOR_DST);
  2468. htt_srng_setup(soc->htt_handle, i,
  2469. pdev->rxdma_mon_status_ring.hal_srng,
  2470. RXDMA_MONITOR_STATUS);
  2471. htt_srng_setup(soc->htt_handle, i,
  2472. pdev->rxdma_mon_desc_ring.hal_srng,
  2473. RXDMA_MONITOR_DESC);
  2474. htt_srng_setup(soc->htt_handle, i,
  2475. pdev->rxdma_err_dst_ring[ring_idx].hal_srng,
  2476. RXDMA_DST);
  2477. }
  2478. }
  2479. }
  2480. #endif
  2481. /*
  2482. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  2483. * @txrx_soc: Datapath SOC handle
  2484. */
  2485. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  2486. {
  2487. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  2488. htt_soc_attach_target(soc->htt_handle);
  2489. dp_rxdma_ring_config(soc);
  2490. DP_STATS_INIT(soc);
  2491. /* initialize work queue for stats processing */
  2492. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  2493. return 0;
  2494. }
  2495. /*
  2496. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  2497. * @txrx_soc: Datapath SOC handle
  2498. */
  2499. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  2500. {
  2501. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2502. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  2503. }
  2504. /*
  2505. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  2506. * @txrx_soc: Datapath SOC handle
  2507. * @nss_cfg: nss config
  2508. */
  2509. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  2510. {
  2511. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2512. wlan_cfg_set_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx, config);
  2513. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2514. FL("nss-wifi<0> nss config is enabled"));
  2515. }
  2516. /*
  2517. * dp_vdev_attach_wifi3() - attach txrx vdev
  2518. * @txrx_pdev: Datapath PDEV handle
  2519. * @vdev_mac_addr: MAC address of the virtual interface
  2520. * @vdev_id: VDEV Id
  2521. * @wlan_op_mode: VDEV operating mode
  2522. *
  2523. * Return: DP VDEV handle on success, NULL on failure
  2524. */
  2525. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  2526. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  2527. {
  2528. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2529. struct dp_soc *soc = pdev->soc;
  2530. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  2531. int tx_ring_size;
  2532. if (!vdev) {
  2533. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2534. FL("DP VDEV memory allocation failed"));
  2535. goto fail0;
  2536. }
  2537. vdev->pdev = pdev;
  2538. vdev->vdev_id = vdev_id;
  2539. vdev->opmode = op_mode;
  2540. vdev->osdev = soc->osdev;
  2541. vdev->osif_rx = NULL;
  2542. vdev->osif_rsim_rx_decap = NULL;
  2543. vdev->osif_get_key = NULL;
  2544. vdev->osif_rx_mon = NULL;
  2545. vdev->osif_tx_free_ext = NULL;
  2546. vdev->osif_vdev = NULL;
  2547. vdev->delete.pending = 0;
  2548. vdev->safemode = 0;
  2549. vdev->drop_unenc = 1;
  2550. vdev->sec_type = cdp_sec_type_none;
  2551. #ifdef notyet
  2552. vdev->filters_num = 0;
  2553. #endif
  2554. qdf_mem_copy(
  2555. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2556. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2557. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2558. vdev->dscp_tid_map_id = 0;
  2559. vdev->mcast_enhancement_en = 0;
  2560. tx_ring_size = wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2561. /* TODO: Initialize default HTT meta data that will be used in
  2562. * TCL descriptors for packets transmitted from this VDEV
  2563. */
  2564. TAILQ_INIT(&vdev->peer_list);
  2565. /* add this vdev into the pdev's list */
  2566. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  2567. pdev->vdev_count++;
  2568. dp_tx_vdev_attach(vdev);
  2569. if (QDF_STATUS_SUCCESS != dp_tx_flow_pool_map_handler(pdev, vdev_id,
  2570. FLOW_TYPE_VDEV, vdev_id, tx_ring_size))
  2571. goto fail1;
  2572. if ((soc->intr_mode == DP_INTR_POLL) &&
  2573. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  2574. if (pdev->vdev_count == 1)
  2575. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  2576. }
  2577. dp_lro_hash_setup(soc);
  2578. /* LRO */
  2579. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2580. wlan_op_mode_sta == vdev->opmode)
  2581. vdev->lro_enable = true;
  2582. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2583. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  2584. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2585. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  2586. DP_STATS_INIT(vdev);
  2587. return (struct cdp_vdev *)vdev;
  2588. fail1:
  2589. dp_tx_vdev_detach(vdev);
  2590. qdf_mem_free(vdev);
  2591. fail0:
  2592. return NULL;
  2593. }
  2594. /**
  2595. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  2596. * @vdev: Datapath VDEV handle
  2597. * @osif_vdev: OSIF vdev handle
  2598. * @txrx_ops: Tx and Rx operations
  2599. *
  2600. * Return: DP VDEV handle on success, NULL on failure
  2601. */
  2602. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  2603. void *osif_vdev,
  2604. struct ol_txrx_ops *txrx_ops)
  2605. {
  2606. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2607. vdev->osif_vdev = osif_vdev;
  2608. vdev->osif_rx = txrx_ops->rx.rx;
  2609. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  2610. vdev->osif_get_key = txrx_ops->get_key;
  2611. vdev->osif_rx_mon = txrx_ops->rx.mon;
  2612. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  2613. #ifdef notyet
  2614. #if ATH_SUPPORT_WAPI
  2615. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  2616. #endif
  2617. #endif
  2618. #ifdef UMAC_SUPPORT_PROXY_ARP
  2619. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  2620. #endif
  2621. vdev->me_convert = txrx_ops->me_convert;
  2622. /* TODO: Enable the following once Tx code is integrated */
  2623. if (vdev->mesh_vdev)
  2624. txrx_ops->tx.tx = dp_tx_send_mesh;
  2625. else
  2626. txrx_ops->tx.tx = dp_tx_send;
  2627. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  2628. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2629. "DP Vdev Register success");
  2630. }
  2631. /*
  2632. * dp_vdev_detach_wifi3() - Detach txrx vdev
  2633. * @txrx_vdev: Datapath VDEV handle
  2634. * @callback: Callback OL_IF on completion of detach
  2635. * @cb_context: Callback context
  2636. *
  2637. */
  2638. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  2639. ol_txrx_vdev_delete_cb callback, void *cb_context)
  2640. {
  2641. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2642. struct dp_pdev *pdev = vdev->pdev;
  2643. struct dp_soc *soc = pdev->soc;
  2644. /* preconditions */
  2645. qdf_assert(vdev);
  2646. /* remove the vdev from its parent pdev's list */
  2647. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  2648. /*
  2649. * Use peer_ref_mutex while accessing peer_list, in case
  2650. * a peer is in the process of being removed from the list.
  2651. */
  2652. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2653. /* check that the vdev has no peers allocated */
  2654. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  2655. /* debug print - will be removed later */
  2656. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  2657. FL("not deleting vdev object %pK (%pM)"
  2658. "until deletion finishes for all its peers"),
  2659. vdev, vdev->mac_addr.raw);
  2660. /* indicate that the vdev needs to be deleted */
  2661. vdev->delete.pending = 1;
  2662. vdev->delete.callback = callback;
  2663. vdev->delete.context = cb_context;
  2664. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2665. return;
  2666. }
  2667. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2668. dp_tx_flow_pool_unmap_handler(pdev, vdev->vdev_id, FLOW_TYPE_VDEV,
  2669. vdev->vdev_id);
  2670. dp_tx_vdev_detach(vdev);
  2671. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2672. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  2673. qdf_mem_free(vdev);
  2674. if (callback)
  2675. callback(cb_context);
  2676. }
  2677. /*
  2678. * dp_peer_create_wifi3() - attach txrx peer
  2679. * @txrx_vdev: Datapath VDEV handle
  2680. * @peer_mac_addr: Peer MAC address
  2681. *
  2682. * Return: DP peeer handle on success, NULL on failure
  2683. */
  2684. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  2685. uint8_t *peer_mac_addr)
  2686. {
  2687. struct dp_peer *peer;
  2688. int i;
  2689. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2690. struct dp_pdev *pdev;
  2691. struct dp_soc *soc;
  2692. /* preconditions */
  2693. qdf_assert(vdev);
  2694. qdf_assert(peer_mac_addr);
  2695. pdev = vdev->pdev;
  2696. soc = pdev->soc;
  2697. #ifdef notyet
  2698. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  2699. soc->mempool_ol_ath_peer);
  2700. #else
  2701. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  2702. #endif
  2703. if (!peer)
  2704. return NULL; /* failure */
  2705. qdf_mem_zero(peer, sizeof(struct dp_peer));
  2706. TAILQ_INIT(&peer->ast_entry_list);
  2707. /* store provided params */
  2708. peer->vdev = vdev;
  2709. dp_peer_add_ast(soc, peer, peer_mac_addr, dp_ast_type_static);
  2710. qdf_spinlock_create(&peer->peer_info_lock);
  2711. qdf_mem_copy(
  2712. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2713. /* TODO: See of rx_opt_proc is really required */
  2714. peer->rx_opt_proc = soc->rx_opt_proc;
  2715. /* initialize the peer_id */
  2716. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  2717. peer->peer_ids[i] = HTT_INVALID_PEER;
  2718. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2719. qdf_atomic_init(&peer->ref_cnt);
  2720. /* keep one reference for attach */
  2721. qdf_atomic_inc(&peer->ref_cnt);
  2722. /* add this peer into the vdev's list */
  2723. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  2724. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2725. /* TODO: See if hash based search is required */
  2726. dp_peer_find_hash_add(soc, peer);
  2727. /* Initialize the peer state */
  2728. peer->state = OL_TXRX_PEER_STATE_DISC;
  2729. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2730. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  2731. vdev, peer, peer->mac_addr.raw,
  2732. qdf_atomic_read(&peer->ref_cnt));
  2733. /*
  2734. * For every peer MAp message search and set if bss_peer
  2735. */
  2736. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  2737. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2738. "vdev bss_peer!!!!");
  2739. peer->bss_peer = 1;
  2740. vdev->vap_bss_peer = peer;
  2741. }
  2742. #ifndef CONFIG_WIN
  2743. dp_local_peer_id_alloc(pdev, peer);
  2744. #endif
  2745. DP_STATS_INIT(peer);
  2746. return (void *)peer;
  2747. }
  2748. /*
  2749. * dp_peer_setup_wifi3() - initialize the peer
  2750. * @vdev_hdl: virtual device object
  2751. * @peer: Peer object
  2752. *
  2753. * Return: void
  2754. */
  2755. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  2756. {
  2757. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  2758. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  2759. struct dp_pdev *pdev;
  2760. struct dp_soc *soc;
  2761. bool hash_based = 0;
  2762. enum cdp_host_reo_dest_ring reo_dest;
  2763. /* preconditions */
  2764. qdf_assert(vdev);
  2765. qdf_assert(peer);
  2766. pdev = vdev->pdev;
  2767. soc = pdev->soc;
  2768. dp_peer_rx_init(pdev, peer);
  2769. peer->last_assoc_rcvd = 0;
  2770. peer->last_disassoc_rcvd = 0;
  2771. peer->last_deauth_rcvd = 0;
  2772. /*
  2773. * hash based steering is disabled for Radios which are offloaded
  2774. * to NSS
  2775. */
  2776. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  2777. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  2778. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2779. FL("hash based steering for pdev: %d is %d\n"),
  2780. pdev->pdev_id, hash_based);
  2781. /*
  2782. * Below line of code will ensure the proper reo_dest ring is choosen
  2783. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  2784. */
  2785. reo_dest = pdev->reo_dest;
  2786. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  2787. /* TODO: Check the destination ring number to be passed to FW */
  2788. soc->cdp_soc.ol_ops->peer_set_default_routing(
  2789. pdev->osif_pdev, peer->mac_addr.raw,
  2790. peer->vdev->vdev_id, hash_based, reo_dest);
  2791. }
  2792. return;
  2793. }
  2794. /*
  2795. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  2796. * @vdev_handle: virtual device object
  2797. * @htt_pkt_type: type of pkt
  2798. *
  2799. * Return: void
  2800. */
  2801. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  2802. enum htt_cmn_pkt_type val)
  2803. {
  2804. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2805. vdev->tx_encap_type = val;
  2806. }
  2807. /*
  2808. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  2809. * @vdev_handle: virtual device object
  2810. * @htt_pkt_type: type of pkt
  2811. *
  2812. * Return: void
  2813. */
  2814. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  2815. enum htt_cmn_pkt_type val)
  2816. {
  2817. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2818. vdev->rx_decap_type = val;
  2819. }
  2820. /*
  2821. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  2822. * @pdev_handle: physical device object
  2823. * @val: reo destination ring index (1 - 4)
  2824. *
  2825. * Return: void
  2826. */
  2827. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  2828. enum cdp_host_reo_dest_ring val)
  2829. {
  2830. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2831. if (pdev)
  2832. pdev->reo_dest = val;
  2833. }
  2834. /*
  2835. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  2836. * @pdev_handle: physical device object
  2837. *
  2838. * Return: reo destination ring index
  2839. */
  2840. static enum cdp_host_reo_dest_ring
  2841. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  2842. {
  2843. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2844. if (pdev)
  2845. return pdev->reo_dest;
  2846. else
  2847. return cdp_host_reo_dest_ring_unknown;
  2848. }
  2849. #ifdef QCA_SUPPORT_SON
  2850. static void dp_son_peer_authorize(struct dp_peer *peer)
  2851. {
  2852. struct dp_soc *soc;
  2853. soc = peer->vdev->pdev->soc;
  2854. peer->peer_bs_inact_flag = 0;
  2855. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2856. return;
  2857. }
  2858. #else
  2859. static void dp_son_peer_authorize(struct dp_peer *peer)
  2860. {
  2861. return;
  2862. }
  2863. #endif
  2864. /*
  2865. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  2866. * @pdev_handle: device object
  2867. * @val: value to be set
  2868. *
  2869. * Return: void
  2870. */
  2871. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  2872. uint32_t val)
  2873. {
  2874. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2875. /* Enable/Disable smart mesh filtering. This flag will be checked
  2876. * during rx processing to check if packets are from NAC clients.
  2877. */
  2878. pdev->filter_neighbour_peers = val;
  2879. return 0;
  2880. }
  2881. /*
  2882. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  2883. * address for smart mesh filtering
  2884. * @pdev_handle: device object
  2885. * @cmd: Add/Del command
  2886. * @macaddr: nac client mac address
  2887. *
  2888. * Return: void
  2889. */
  2890. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  2891. uint32_t cmd, uint8_t *macaddr)
  2892. {
  2893. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2894. struct dp_neighbour_peer *peer = NULL;
  2895. if (!macaddr)
  2896. goto fail0;
  2897. /* Store address of NAC (neighbour peer) which will be checked
  2898. * against TA of received packets.
  2899. */
  2900. if (cmd == DP_NAC_PARAM_ADD) {
  2901. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  2902. sizeof(*peer));
  2903. if (!peer) {
  2904. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2905. FL("DP neighbour peer node memory allocation failed"));
  2906. goto fail0;
  2907. }
  2908. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  2909. macaddr, DP_MAC_ADDR_LEN);
  2910. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  2911. /* add this neighbour peer into the list */
  2912. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  2913. neighbour_peer_list_elem);
  2914. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  2915. return 1;
  2916. } else if (cmd == DP_NAC_PARAM_DEL) {
  2917. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  2918. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  2919. neighbour_peer_list_elem) {
  2920. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  2921. macaddr, DP_MAC_ADDR_LEN)) {
  2922. /* delete this peer from the list */
  2923. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2924. peer, neighbour_peer_list_elem);
  2925. qdf_mem_free(peer);
  2926. break;
  2927. }
  2928. }
  2929. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  2930. return 1;
  2931. }
  2932. fail0:
  2933. return 0;
  2934. }
  2935. /*
  2936. * dp_get_sec_type() - Get the security type
  2937. * @peer: Datapath peer handle
  2938. * @sec_idx: Security id (mcast, ucast)
  2939. *
  2940. * return sec_type: Security type
  2941. */
  2942. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  2943. {
  2944. struct dp_peer *dpeer = (struct dp_peer *)peer;
  2945. return dpeer->security[sec_idx].sec_type;
  2946. }
  2947. /*
  2948. * dp_peer_authorize() - authorize txrx peer
  2949. * @peer_handle: Datapath peer handle
  2950. * @authorize
  2951. *
  2952. */
  2953. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  2954. {
  2955. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  2956. struct dp_soc *soc;
  2957. if (peer != NULL) {
  2958. soc = peer->vdev->pdev->soc;
  2959. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2960. dp_son_peer_authorize(peer);
  2961. peer->authorize = authorize ? 1 : 0;
  2962. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2963. }
  2964. }
  2965. #ifdef QCA_SUPPORT_SON
  2966. /*
  2967. * dp_txrx_update_inact_threshold() - Update inact timer threshold
  2968. * @pdev_handle: Device handle
  2969. * @new_threshold : updated threshold value
  2970. *
  2971. */
  2972. static void
  2973. dp_txrx_update_inact_threshold(struct cdp_pdev *pdev_handle,
  2974. u_int16_t new_threshold)
  2975. {
  2976. struct dp_vdev *vdev;
  2977. struct dp_peer *peer;
  2978. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2979. struct dp_soc *soc = pdev->soc;
  2980. u_int16_t old_threshold = soc->pdev_bs_inact_reload;
  2981. if (old_threshold == new_threshold)
  2982. return;
  2983. soc->pdev_bs_inact_reload = new_threshold;
  2984. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2985. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2986. if (vdev->opmode != wlan_op_mode_ap)
  2987. continue;
  2988. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2989. if (!peer->authorize)
  2990. continue;
  2991. if (old_threshold - peer->peer_bs_inact >=
  2992. new_threshold) {
  2993. dp_mark_peer_inact((void *)peer, true);
  2994. peer->peer_bs_inact = 0;
  2995. } else {
  2996. peer->peer_bs_inact = new_threshold -
  2997. (old_threshold - peer->peer_bs_inact);
  2998. }
  2999. }
  3000. }
  3001. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3002. }
  3003. /**
  3004. * dp_txrx_reset_inact_count(): Reset inact count
  3005. * @pdev_handle - device handle
  3006. *
  3007. * Return: void
  3008. */
  3009. static void
  3010. dp_txrx_reset_inact_count(struct cdp_pdev *pdev_handle)
  3011. {
  3012. struct dp_vdev *vdev = NULL;
  3013. struct dp_peer *peer = NULL;
  3014. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3015. struct dp_soc *soc = pdev->soc;
  3016. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3017. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3018. if (vdev->opmode != wlan_op_mode_ap)
  3019. continue;
  3020. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3021. if (!peer->authorize)
  3022. continue;
  3023. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3024. }
  3025. }
  3026. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3027. }
  3028. /**
  3029. * dp_set_inact_params(): set inactivity params
  3030. * @pdev_handle - device handle
  3031. * @inact_check_interval - inactivity interval
  3032. * @inact_normal - Inactivity normal
  3033. * @inact_overload - Inactivity overload
  3034. *
  3035. * Return: bool
  3036. */
  3037. bool dp_set_inact_params(struct cdp_pdev *pdev_handle,
  3038. u_int16_t inact_check_interval,
  3039. u_int16_t inact_normal, u_int16_t inact_overload)
  3040. {
  3041. struct dp_soc *soc;
  3042. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3043. if (!pdev)
  3044. return false;
  3045. soc = pdev->soc;
  3046. if (!soc)
  3047. return false;
  3048. soc->pdev_bs_inact_interval = inact_check_interval;
  3049. soc->pdev_bs_inact_normal = inact_normal;
  3050. soc->pdev_bs_inact_overload = inact_overload;
  3051. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3052. soc->pdev_bs_inact_normal);
  3053. return true;
  3054. }
  3055. /**
  3056. * dp_start_inact_timer(): Inactivity timer start
  3057. * @pdev_handle - device handle
  3058. * @enable - Inactivity timer start/stop
  3059. *
  3060. * Return: bool
  3061. */
  3062. bool dp_start_inact_timer(struct cdp_pdev *pdev_handle, bool enable)
  3063. {
  3064. struct dp_soc *soc;
  3065. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3066. if (!pdev)
  3067. return false;
  3068. soc = pdev->soc;
  3069. if (!soc)
  3070. return false;
  3071. if (enable) {
  3072. dp_txrx_reset_inact_count((struct cdp_pdev *)pdev);
  3073. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  3074. soc->pdev_bs_inact_interval * 1000);
  3075. } else {
  3076. qdf_timer_stop(&soc->pdev_bs_inact_timer);
  3077. }
  3078. return true;
  3079. }
  3080. /**
  3081. * dp_set_overload(): Set inactivity overload
  3082. * @pdev_handle - device handle
  3083. * @overload - overload status
  3084. *
  3085. * Return: void
  3086. */
  3087. void dp_set_overload(struct cdp_pdev *pdev_handle, bool overload)
  3088. {
  3089. struct dp_soc *soc;
  3090. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3091. if (!pdev)
  3092. return;
  3093. soc = pdev->soc;
  3094. if (!soc)
  3095. return;
  3096. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3097. overload ? soc->pdev_bs_inact_overload :
  3098. soc->pdev_bs_inact_normal);
  3099. }
  3100. /**
  3101. * dp_peer_is_inact(): check whether peer is inactive
  3102. * @peer_handle - datapath peer handle
  3103. *
  3104. * Return: bool
  3105. */
  3106. bool dp_peer_is_inact(void *peer_handle)
  3107. {
  3108. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3109. if (!peer)
  3110. return false;
  3111. return peer->peer_bs_inact_flag == 1;
  3112. }
  3113. #else
  3114. bool dp_set_inact_params(struct cdp_pdev *pdev, u_int16_t inact_check_interval,
  3115. u_int16_t inact_normal, u_int16_t inact_overload)
  3116. {
  3117. return false;
  3118. }
  3119. bool dp_start_inact_timer(struct cdp_pdev *pdev, bool enable)
  3120. {
  3121. return false;
  3122. }
  3123. void dp_set_overload(struct cdp_pdev *pdev, bool overload)
  3124. {
  3125. return;
  3126. }
  3127. bool dp_peer_is_inact(void *peer)
  3128. {
  3129. return false;
  3130. }
  3131. #endif
  3132. /*
  3133. * dp_peer_unref_delete() - unref and delete peer
  3134. * @peer_handle: Datapath peer handle
  3135. *
  3136. */
  3137. void dp_peer_unref_delete(void *peer_handle)
  3138. {
  3139. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3140. struct dp_peer *bss_peer = NULL;
  3141. struct dp_vdev *vdev = peer->vdev;
  3142. struct dp_pdev *pdev = vdev->pdev;
  3143. struct dp_soc *soc = pdev->soc;
  3144. struct dp_peer *tmppeer;
  3145. int found = 0;
  3146. uint16_t peer_id;
  3147. /*
  3148. * Hold the lock all the way from checking if the peer ref count
  3149. * is zero until the peer references are removed from the hash
  3150. * table and vdev list (if the peer ref count is zero).
  3151. * This protects against a new HL tx operation starting to use the
  3152. * peer object just after this function concludes it's done being used.
  3153. * Furthermore, the lock needs to be held while checking whether the
  3154. * vdev's list of peers is empty, to make sure that list is not modified
  3155. * concurrently with the empty check.
  3156. */
  3157. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3158. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3159. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  3160. peer, qdf_atomic_read(&peer->ref_cnt));
  3161. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  3162. peer_id = peer->peer_ids[0];
  3163. /*
  3164. * Make sure that the reference to the peer in
  3165. * peer object map is removed
  3166. */
  3167. if (peer_id != HTT_INVALID_PEER)
  3168. soc->peer_id_to_obj_map[peer_id] = NULL;
  3169. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3170. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  3171. /* remove the reference to the peer from the hash table */
  3172. dp_peer_find_hash_remove(soc, peer);
  3173. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  3174. if (tmppeer == peer) {
  3175. found = 1;
  3176. break;
  3177. }
  3178. }
  3179. if (found) {
  3180. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  3181. peer_list_elem);
  3182. } else {
  3183. /*Ignoring the remove operation as peer not found*/
  3184. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3185. "peer %pK not found in vdev (%pK)->peer_list:%pK",
  3186. peer, vdev, &peer->vdev->peer_list);
  3187. }
  3188. /* cleanup the peer data */
  3189. dp_peer_cleanup(vdev, peer);
  3190. /* check whether the parent vdev has no peers left */
  3191. if (TAILQ_EMPTY(&vdev->peer_list)) {
  3192. /*
  3193. * Now that there are no references to the peer, we can
  3194. * release the peer reference lock.
  3195. */
  3196. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3197. /*
  3198. * Check if the parent vdev was waiting for its peers
  3199. * to be deleted, in order for it to be deleted too.
  3200. */
  3201. if (vdev->delete.pending) {
  3202. ol_txrx_vdev_delete_cb vdev_delete_cb =
  3203. vdev->delete.callback;
  3204. void *vdev_delete_context =
  3205. vdev->delete.context;
  3206. QDF_TRACE(QDF_MODULE_ID_DP,
  3207. QDF_TRACE_LEVEL_INFO_HIGH,
  3208. FL("deleting vdev object %pK (%pM)"
  3209. " - its last peer is done"),
  3210. vdev, vdev->mac_addr.raw);
  3211. /* all peers are gone, go ahead and delete it */
  3212. dp_tx_flow_pool_unmap_handler(pdev, vdev->vdev_id,
  3213. FLOW_TYPE_VDEV,
  3214. vdev->vdev_id);
  3215. dp_tx_vdev_detach(vdev);
  3216. QDF_TRACE(QDF_MODULE_ID_DP,
  3217. QDF_TRACE_LEVEL_INFO_HIGH,
  3218. FL("deleting vdev object %pK (%pM)"),
  3219. vdev, vdev->mac_addr.raw);
  3220. qdf_mem_free(vdev);
  3221. if (vdev_delete_cb)
  3222. vdev_delete_cb(vdev_delete_context);
  3223. }
  3224. } else {
  3225. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3226. }
  3227. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3228. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  3229. vdev->vdev_id, peer->mac_addr.raw);
  3230. }
  3231. #ifdef notyet
  3232. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  3233. #else
  3234. if (!vdev || !vdev->vap_bss_peer)
  3235. goto free_peer;
  3236. bss_peer = vdev->vap_bss_peer;
  3237. DP_UPDATE_STATS(bss_peer, peer);
  3238. free_peer:
  3239. qdf_mem_free(peer);
  3240. #endif
  3241. } else {
  3242. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3243. }
  3244. }
  3245. /*
  3246. * dp_peer_detach_wifi3() – Detach txrx peer
  3247. * @peer_handle: Datapath peer handle
  3248. * @bitmap: bitmap indicating special handling of request.
  3249. *
  3250. */
  3251. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  3252. {
  3253. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3254. /* redirect the peer's rx delivery function to point to a
  3255. * discard func
  3256. */
  3257. peer->rx_opt_proc = dp_rx_discard;
  3258. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3259. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  3260. #ifndef CONFIG_WIN
  3261. dp_local_peer_id_free(peer->vdev->pdev, peer);
  3262. #endif
  3263. qdf_spinlock_destroy(&peer->peer_info_lock);
  3264. /*
  3265. * Remove the reference added during peer_attach.
  3266. * The peer will still be left allocated until the
  3267. * PEER_UNMAP message arrives to remove the other
  3268. * reference, added by the PEER_MAP message.
  3269. */
  3270. dp_peer_unref_delete(peer_handle);
  3271. }
  3272. /*
  3273. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  3274. * @peer_handle: Datapath peer handle
  3275. *
  3276. */
  3277. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  3278. {
  3279. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3280. return vdev->mac_addr.raw;
  3281. }
  3282. /*
  3283. * dp_vdev_set_wds() - Enable per packet stats
  3284. * @vdev_handle: DP VDEV handle
  3285. * @val: value
  3286. *
  3287. * Return: none
  3288. */
  3289. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  3290. {
  3291. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3292. vdev->wds_enabled = val;
  3293. return 0;
  3294. }
  3295. /*
  3296. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  3297. * @peer_handle: Datapath peer handle
  3298. *
  3299. */
  3300. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  3301. uint8_t vdev_id)
  3302. {
  3303. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  3304. struct dp_vdev *vdev = NULL;
  3305. if (qdf_unlikely(!pdev))
  3306. return NULL;
  3307. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3308. if (vdev->vdev_id == vdev_id)
  3309. break;
  3310. }
  3311. return (struct cdp_vdev *)vdev;
  3312. }
  3313. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  3314. {
  3315. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3316. return vdev->opmode;
  3317. }
  3318. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  3319. {
  3320. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3321. struct dp_pdev *pdev = vdev->pdev;
  3322. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  3323. }
  3324. /**
  3325. * dp_reset_monitor_mode() - Disable monitor mode
  3326. * @pdev_handle: Datapath PDEV handle
  3327. *
  3328. * Return: 0 on success, not 0 on failure
  3329. */
  3330. static int dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  3331. {
  3332. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3333. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3334. struct dp_soc *soc;
  3335. uint8_t pdev_id;
  3336. pdev_id = pdev->pdev_id;
  3337. soc = pdev->soc;
  3338. pdev->monitor_vdev = NULL;
  3339. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3340. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3341. pdev->rxdma_mon_buf_ring.hal_srng,
  3342. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3343. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3344. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3345. RX_BUFFER_SIZE, &htt_tlv_filter);
  3346. return 0;
  3347. }
  3348. /**
  3349. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  3350. * @vdev_handle: Datapath VDEV handle
  3351. * @smart_monitor: Flag to denote if its smart monitor mode
  3352. *
  3353. * Return: 0 on success, not 0 on failure
  3354. */
  3355. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  3356. uint8_t smart_monitor)
  3357. {
  3358. /* Many monitor VAPs can exists in a system but only one can be up at
  3359. * anytime
  3360. */
  3361. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3362. struct dp_pdev *pdev;
  3363. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3364. struct dp_soc *soc;
  3365. uint8_t pdev_id;
  3366. qdf_assert(vdev);
  3367. pdev = vdev->pdev;
  3368. pdev_id = pdev->pdev_id;
  3369. soc = pdev->soc;
  3370. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3371. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3372. pdev, pdev_id, soc, vdev);
  3373. /*Check if current pdev's monitor_vdev exists */
  3374. if (pdev->monitor_vdev) {
  3375. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3376. "vdev=%pK\n", vdev);
  3377. qdf_assert(vdev);
  3378. }
  3379. pdev->monitor_vdev = vdev;
  3380. /* If smart monitor mode, do not configure monitor ring */
  3381. if (smart_monitor)
  3382. return QDF_STATUS_SUCCESS;
  3383. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3384. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3385. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3386. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3387. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3388. pdev->mo_data_filter);
  3389. htt_tlv_filter.mpdu_start = 1;
  3390. htt_tlv_filter.msdu_start = 1;
  3391. htt_tlv_filter.packet = 1;
  3392. htt_tlv_filter.msdu_end = 1;
  3393. htt_tlv_filter.mpdu_end = 1;
  3394. htt_tlv_filter.packet_header = 1;
  3395. htt_tlv_filter.attention = 1;
  3396. htt_tlv_filter.ppdu_start = 0;
  3397. htt_tlv_filter.ppdu_end = 0;
  3398. htt_tlv_filter.ppdu_end_user_stats = 0;
  3399. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3400. htt_tlv_filter.ppdu_end_status_done = 0;
  3401. htt_tlv_filter.header_per_msdu = 1;
  3402. htt_tlv_filter.enable_fp =
  3403. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3404. htt_tlv_filter.enable_md = 0;
  3405. htt_tlv_filter.enable_mo =
  3406. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3407. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3408. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3409. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3410. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3411. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3412. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3413. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3414. pdev->rxdma_mon_buf_ring.hal_srng,
  3415. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3416. htt_tlv_filter.mpdu_start = 1;
  3417. htt_tlv_filter.msdu_start = 1;
  3418. htt_tlv_filter.packet = 0;
  3419. htt_tlv_filter.msdu_end = 1;
  3420. htt_tlv_filter.mpdu_end = 1;
  3421. htt_tlv_filter.packet_header = 1;
  3422. htt_tlv_filter.attention = 1;
  3423. htt_tlv_filter.ppdu_start = 1;
  3424. htt_tlv_filter.ppdu_end = 1;
  3425. htt_tlv_filter.ppdu_end_user_stats = 1;
  3426. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3427. htt_tlv_filter.ppdu_end_status_done = 1;
  3428. htt_tlv_filter.header_per_msdu = 0;
  3429. htt_tlv_filter.enable_fp =
  3430. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3431. htt_tlv_filter.enable_md = 0;
  3432. htt_tlv_filter.enable_mo =
  3433. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3434. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3435. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3436. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3437. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3438. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3439. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3440. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3441. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3442. RX_BUFFER_SIZE, &htt_tlv_filter);
  3443. return QDF_STATUS_SUCCESS;
  3444. }
  3445. /**
  3446. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  3447. * @pdev_handle: Datapath PDEV handle
  3448. * @filter_val: Flag to select Filter for monitor mode
  3449. * Return: 0 on success, not 0 on failure
  3450. */
  3451. static int dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  3452. struct cdp_monitor_filter *filter_val)
  3453. {
  3454. /* Many monitor VAPs can exists in a system but only one can be up at
  3455. * anytime
  3456. */
  3457. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3458. struct dp_vdev *vdev = pdev->monitor_vdev;
  3459. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3460. struct dp_soc *soc;
  3461. uint8_t pdev_id;
  3462. pdev_id = pdev->pdev_id;
  3463. soc = pdev->soc;
  3464. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3465. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3466. pdev, pdev_id, soc, vdev);
  3467. /*Check if current pdev's monitor_vdev exists */
  3468. if (!pdev->monitor_vdev) {
  3469. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3470. "vdev=%pK\n", vdev);
  3471. qdf_assert(vdev);
  3472. }
  3473. /* update filter mode, type in pdev structure */
  3474. pdev->mon_filter_mode = filter_val->mode;
  3475. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  3476. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  3477. pdev->fp_data_filter = filter_val->fp_data;
  3478. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  3479. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  3480. pdev->mo_data_filter = filter_val->mo_data;
  3481. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3482. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3483. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3484. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3485. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3486. pdev->mo_data_filter);
  3487. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3488. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3489. pdev->rxdma_mon_buf_ring.hal_srng,
  3490. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3491. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3492. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3493. RX_BUFFER_SIZE, &htt_tlv_filter);
  3494. htt_tlv_filter.mpdu_start = 1;
  3495. htt_tlv_filter.msdu_start = 1;
  3496. htt_tlv_filter.packet = 1;
  3497. htt_tlv_filter.msdu_end = 1;
  3498. htt_tlv_filter.mpdu_end = 1;
  3499. htt_tlv_filter.packet_header = 1;
  3500. htt_tlv_filter.attention = 1;
  3501. htt_tlv_filter.ppdu_start = 0;
  3502. htt_tlv_filter.ppdu_end = 0;
  3503. htt_tlv_filter.ppdu_end_user_stats = 0;
  3504. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3505. htt_tlv_filter.ppdu_end_status_done = 0;
  3506. htt_tlv_filter.header_per_msdu = 1;
  3507. htt_tlv_filter.enable_fp =
  3508. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3509. htt_tlv_filter.enable_md = 0;
  3510. htt_tlv_filter.enable_mo =
  3511. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3512. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3513. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3514. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3515. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3516. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3517. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3518. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3519. pdev->rxdma_mon_buf_ring.hal_srng, RXDMA_MONITOR_BUF,
  3520. RX_BUFFER_SIZE, &htt_tlv_filter);
  3521. htt_tlv_filter.mpdu_start = 1;
  3522. htt_tlv_filter.msdu_start = 1;
  3523. htt_tlv_filter.packet = 0;
  3524. htt_tlv_filter.msdu_end = 1;
  3525. htt_tlv_filter.mpdu_end = 1;
  3526. htt_tlv_filter.packet_header = 1;
  3527. htt_tlv_filter.attention = 1;
  3528. htt_tlv_filter.ppdu_start = 1;
  3529. htt_tlv_filter.ppdu_end = 1;
  3530. htt_tlv_filter.ppdu_end_user_stats = 1;
  3531. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3532. htt_tlv_filter.ppdu_end_status_done = 1;
  3533. htt_tlv_filter.header_per_msdu = 0;
  3534. htt_tlv_filter.enable_fp =
  3535. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3536. htt_tlv_filter.enable_md = 0;
  3537. htt_tlv_filter.enable_mo =
  3538. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3539. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3540. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3541. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3542. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3543. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3544. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3545. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3546. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3547. RX_BUFFER_SIZE, &htt_tlv_filter);
  3548. return QDF_STATUS_SUCCESS;
  3549. }
  3550. /**
  3551. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  3552. * @vdev_handle: Datapath VDEV handle
  3553. * Return: true on ucast filter flag set
  3554. */
  3555. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  3556. {
  3557. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3558. struct dp_pdev *pdev;
  3559. pdev = vdev->pdev;
  3560. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  3561. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  3562. return true;
  3563. return false;
  3564. }
  3565. /**
  3566. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  3567. * @vdev_handle: Datapath VDEV handle
  3568. * Return: true on mcast filter flag set
  3569. */
  3570. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  3571. {
  3572. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3573. struct dp_pdev *pdev;
  3574. pdev = vdev->pdev;
  3575. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  3576. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  3577. return true;
  3578. return false;
  3579. }
  3580. /**
  3581. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  3582. * @vdev_handle: Datapath VDEV handle
  3583. * Return: true on non data filter flag set
  3584. */
  3585. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  3586. {
  3587. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3588. struct dp_pdev *pdev;
  3589. pdev = vdev->pdev;
  3590. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  3591. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  3592. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  3593. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  3594. return true;
  3595. }
  3596. }
  3597. return false;
  3598. }
  3599. #ifdef MESH_MODE_SUPPORT
  3600. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  3601. {
  3602. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3603. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3604. FL("val %d"), val);
  3605. vdev->mesh_vdev = val;
  3606. }
  3607. /*
  3608. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  3609. * @vdev_hdl: virtual device object
  3610. * @val: value to be set
  3611. *
  3612. * Return: void
  3613. */
  3614. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  3615. {
  3616. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3617. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3618. FL("val %d"), val);
  3619. vdev->mesh_rx_filter = val;
  3620. }
  3621. #endif
  3622. /*
  3623. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  3624. * Current scope is bar recieved count
  3625. *
  3626. * @pdev_handle: DP_PDEV handle
  3627. *
  3628. * Return: void
  3629. */
  3630. #define STATS_PROC_TIMEOUT (HZ/10)
  3631. static void
  3632. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  3633. {
  3634. struct dp_vdev *vdev;
  3635. struct dp_peer *peer;
  3636. uint32_t waitcnt;
  3637. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3638. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3639. if (!peer) {
  3640. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3641. FL("DP Invalid Peer refernce"));
  3642. return;
  3643. }
  3644. waitcnt = 0;
  3645. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  3646. while (!(qdf_atomic_read(&(pdev->stats.cmd_complete)))
  3647. && waitcnt < 10) {
  3648. schedule_timeout_interruptible(
  3649. STATS_PROC_TIMEOUT);
  3650. waitcnt++;
  3651. }
  3652. qdf_atomic_set(&(pdev->stats.cmd_complete), 0);
  3653. }
  3654. }
  3655. }
  3656. /**
  3657. * dp_rx_bar_stats_cb(): BAR received stats callback
  3658. * @soc: SOC handle
  3659. * @cb_ctxt: Call back context
  3660. * @reo_status: Reo status
  3661. *
  3662. * return: void
  3663. */
  3664. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  3665. union hal_reo_status *reo_status)
  3666. {
  3667. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  3668. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  3669. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  3670. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  3671. queue_status->header.status);
  3672. qdf_atomic_set(&(pdev->stats.cmd_complete), 1);
  3673. return;
  3674. }
  3675. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  3676. qdf_atomic_set(&(pdev->stats.cmd_complete), 1);
  3677. }
  3678. /**
  3679. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  3680. * @vdev: DP VDEV handle
  3681. *
  3682. * return: void
  3683. */
  3684. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  3685. {
  3686. struct dp_peer *peer = NULL;
  3687. struct dp_soc *soc = vdev->pdev->soc;
  3688. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  3689. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  3690. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  3691. DP_UPDATE_STATS(vdev, peer);
  3692. if (soc->cdp_soc.ol_ops->update_dp_stats)
  3693. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  3694. &vdev->stats, (uint16_t) vdev->vdev_id,
  3695. UPDATE_VDEV_STATS);
  3696. }
  3697. /**
  3698. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  3699. * @pdev: DP PDEV handle
  3700. *
  3701. * return: void
  3702. */
  3703. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  3704. {
  3705. struct dp_vdev *vdev = NULL;
  3706. struct dp_soc *soc = pdev->soc;
  3707. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  3708. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  3709. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  3710. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3711. dp_aggregate_vdev_stats(vdev);
  3712. DP_UPDATE_STATS(pdev, vdev);
  3713. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  3714. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  3715. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  3716. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  3717. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  3718. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  3719. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  3720. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  3721. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  3722. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  3723. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  3724. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  3725. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  3726. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  3727. DP_STATS_AGGR(pdev, vdev,
  3728. tx_i.mcast_en.dropped_map_error);
  3729. DP_STATS_AGGR(pdev, vdev,
  3730. tx_i.mcast_en.dropped_self_mac);
  3731. DP_STATS_AGGR(pdev, vdev,
  3732. tx_i.mcast_en.dropped_send_fail);
  3733. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  3734. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  3735. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  3736. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  3737. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  3738. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  3739. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  3740. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  3741. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  3742. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  3743. pdev->stats.tx_i.dropped.dropped_pkt.num =
  3744. pdev->stats.tx_i.dropped.dma_error +
  3745. pdev->stats.tx_i.dropped.ring_full +
  3746. pdev->stats.tx_i.dropped.enqueue_fail +
  3747. pdev->stats.tx_i.dropped.desc_na +
  3748. pdev->stats.tx_i.dropped.res_full;
  3749. pdev->stats.tx.last_ack_rssi =
  3750. vdev->stats.tx.last_ack_rssi;
  3751. pdev->stats.tx_i.tso.num_seg =
  3752. vdev->stats.tx_i.tso.num_seg;
  3753. }
  3754. if (soc->cdp_soc.ol_ops->update_dp_stats)
  3755. soc->cdp_soc.ol_ops->update_dp_stats(pdev->osif_pdev,
  3756. &pdev->stats, pdev->pdev_id, UPDATE_PDEV_STATS);
  3757. }
  3758. /**
  3759. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  3760. * @pdev: DP_PDEV Handle
  3761. *
  3762. * Return:void
  3763. */
  3764. static inline void
  3765. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  3766. {
  3767. DP_PRINT_STATS("PDEV Tx Stats:\n");
  3768. DP_PRINT_STATS("Received From Stack:");
  3769. DP_PRINT_STATS(" Packets = %d",
  3770. pdev->stats.tx_i.rcvd.num);
  3771. DP_PRINT_STATS(" Bytes = %llu",
  3772. pdev->stats.tx_i.rcvd.bytes);
  3773. DP_PRINT_STATS("Processed:");
  3774. DP_PRINT_STATS(" Packets = %d",
  3775. pdev->stats.tx_i.processed.num);
  3776. DP_PRINT_STATS(" Bytes = %llu",
  3777. pdev->stats.tx_i.processed.bytes);
  3778. DP_PRINT_STATS("Completions:");
  3779. DP_PRINT_STATS(" Packets = %d",
  3780. pdev->stats.tx.comp_pkt.num);
  3781. DP_PRINT_STATS(" Bytes = %llu",
  3782. pdev->stats.tx.comp_pkt.bytes);
  3783. DP_PRINT_STATS("Dropped:");
  3784. DP_PRINT_STATS(" Total = %d",
  3785. pdev->stats.tx_i.dropped.dropped_pkt.num);
  3786. DP_PRINT_STATS(" Dma_map_error = %d",
  3787. pdev->stats.tx_i.dropped.dma_error);
  3788. DP_PRINT_STATS(" Ring Full = %d",
  3789. pdev->stats.tx_i.dropped.ring_full);
  3790. DP_PRINT_STATS(" Descriptor Not available = %d",
  3791. pdev->stats.tx_i.dropped.desc_na);
  3792. DP_PRINT_STATS(" HW enqueue failed= %d",
  3793. pdev->stats.tx_i.dropped.enqueue_fail);
  3794. DP_PRINT_STATS(" Resources Full = %d",
  3795. pdev->stats.tx_i.dropped.res_full);
  3796. DP_PRINT_STATS(" FW removed = %d",
  3797. pdev->stats.tx.dropped.fw_rem);
  3798. DP_PRINT_STATS(" FW removed transmitted = %d",
  3799. pdev->stats.tx.dropped.fw_rem_tx);
  3800. DP_PRINT_STATS(" FW removed untransmitted = %d",
  3801. pdev->stats.tx.dropped.fw_rem_notx);
  3802. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  3803. pdev->stats.tx.dropped.age_out);
  3804. DP_PRINT_STATS("Scatter Gather:");
  3805. DP_PRINT_STATS(" Packets = %d",
  3806. pdev->stats.tx_i.sg.sg_pkt.num);
  3807. DP_PRINT_STATS(" Bytes = %llu",
  3808. pdev->stats.tx_i.sg.sg_pkt.bytes);
  3809. DP_PRINT_STATS(" Dropped By Host = %d",
  3810. pdev->stats.tx_i.sg.dropped_host);
  3811. DP_PRINT_STATS(" Dropped By Target = %d",
  3812. pdev->stats.tx_i.sg.dropped_target);
  3813. DP_PRINT_STATS("TSO:");
  3814. DP_PRINT_STATS(" Number of Segments = %d",
  3815. pdev->stats.tx_i.tso.num_seg);
  3816. DP_PRINT_STATS(" Packets = %d",
  3817. pdev->stats.tx_i.tso.tso_pkt.num);
  3818. DP_PRINT_STATS(" Bytes = %llu",
  3819. pdev->stats.tx_i.tso.tso_pkt.bytes);
  3820. DP_PRINT_STATS(" Dropped By Host = %d",
  3821. pdev->stats.tx_i.tso.dropped_host);
  3822. DP_PRINT_STATS("Mcast Enhancement:");
  3823. DP_PRINT_STATS(" Packets = %d",
  3824. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  3825. DP_PRINT_STATS(" Bytes = %llu",
  3826. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  3827. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  3828. pdev->stats.tx_i.mcast_en.dropped_map_error);
  3829. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  3830. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  3831. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  3832. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  3833. DP_PRINT_STATS(" Unicast sent = %d",
  3834. pdev->stats.tx_i.mcast_en.ucast);
  3835. DP_PRINT_STATS("Raw:");
  3836. DP_PRINT_STATS(" Packets = %d",
  3837. pdev->stats.tx_i.raw.raw_pkt.num);
  3838. DP_PRINT_STATS(" Bytes = %llu",
  3839. pdev->stats.tx_i.raw.raw_pkt.bytes);
  3840. DP_PRINT_STATS(" DMA map error = %d",
  3841. pdev->stats.tx_i.raw.dma_map_error);
  3842. DP_PRINT_STATS("Reinjected:");
  3843. DP_PRINT_STATS(" Packets = %d",
  3844. pdev->stats.tx_i.reinject_pkts.num);
  3845. DP_PRINT_STATS("Bytes = %llu\n",
  3846. pdev->stats.tx_i.reinject_pkts.bytes);
  3847. DP_PRINT_STATS("Inspected:");
  3848. DP_PRINT_STATS(" Packets = %d",
  3849. pdev->stats.tx_i.inspect_pkts.num);
  3850. DP_PRINT_STATS(" Bytes = %llu",
  3851. pdev->stats.tx_i.inspect_pkts.bytes);
  3852. DP_PRINT_STATS("Nawds Multicast:");
  3853. DP_PRINT_STATS(" Packets = %d",
  3854. pdev->stats.tx_i.nawds_mcast.num);
  3855. DP_PRINT_STATS(" Bytes = %llu",
  3856. pdev->stats.tx_i.nawds_mcast.bytes);
  3857. DP_PRINT_STATS("CCE Classified:");
  3858. DP_PRINT_STATS(" CCE Classified Packets: %u",
  3859. pdev->stats.tx_i.cce_classified);
  3860. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  3861. pdev->stats.tx_i.cce_classified_raw);
  3862. DP_PRINT_STATS("Mesh stats:");
  3863. DP_PRINT_STATS(" frames to firmware: %u",
  3864. pdev->stats.tx_i.mesh.exception_fw);
  3865. DP_PRINT_STATS(" completions from fw: %u",
  3866. pdev->stats.tx_i.mesh.completion_fw);
  3867. }
  3868. /**
  3869. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  3870. * @pdev: DP_PDEV Handle
  3871. *
  3872. * Return: void
  3873. */
  3874. static inline void
  3875. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  3876. {
  3877. DP_PRINT_STATS("PDEV Rx Stats:\n");
  3878. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  3879. DP_PRINT_STATS(" Packets = %d %d %d %d",
  3880. pdev->stats.rx.rcvd_reo[0].num,
  3881. pdev->stats.rx.rcvd_reo[1].num,
  3882. pdev->stats.rx.rcvd_reo[2].num,
  3883. pdev->stats.rx.rcvd_reo[3].num);
  3884. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  3885. pdev->stats.rx.rcvd_reo[0].bytes,
  3886. pdev->stats.rx.rcvd_reo[1].bytes,
  3887. pdev->stats.rx.rcvd_reo[2].bytes,
  3888. pdev->stats.rx.rcvd_reo[3].bytes);
  3889. DP_PRINT_STATS("Replenished:");
  3890. DP_PRINT_STATS(" Packets = %d",
  3891. pdev->stats.replenish.pkts.num);
  3892. DP_PRINT_STATS(" Bytes = %llu",
  3893. pdev->stats.replenish.pkts.bytes);
  3894. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  3895. pdev->stats.buf_freelist);
  3896. DP_PRINT_STATS(" Low threshold intr = %d",
  3897. pdev->stats.replenish.low_thresh_intrs);
  3898. DP_PRINT_STATS("Dropped:");
  3899. DP_PRINT_STATS(" msdu_not_done = %d",
  3900. pdev->stats.dropped.msdu_not_done);
  3901. DP_PRINT_STATS("Sent To Stack:");
  3902. DP_PRINT_STATS(" Packets = %d",
  3903. pdev->stats.rx.to_stack.num);
  3904. DP_PRINT_STATS(" Bytes = %llu",
  3905. pdev->stats.rx.to_stack.bytes);
  3906. DP_PRINT_STATS("Multicast/Broadcast:");
  3907. DP_PRINT_STATS(" Packets = %d",
  3908. pdev->stats.rx.multicast.num);
  3909. DP_PRINT_STATS(" Bytes = %llu",
  3910. pdev->stats.rx.multicast.bytes);
  3911. DP_PRINT_STATS("Errors:");
  3912. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  3913. pdev->stats.replenish.rxdma_err);
  3914. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  3915. pdev->stats.err.desc_alloc_fail);
  3916. /* Get bar_recv_cnt */
  3917. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  3918. DP_PRINT_STATS("BAR Received Count: = %d",
  3919. pdev->stats.rx.bar_recv_cnt);
  3920. }
  3921. /**
  3922. * dp_print_soc_tx_stats(): Print SOC level stats
  3923. * @soc DP_SOC Handle
  3924. *
  3925. * Return: void
  3926. */
  3927. static inline void
  3928. dp_print_soc_tx_stats(struct dp_soc *soc)
  3929. {
  3930. DP_PRINT_STATS("SOC Tx Stats:\n");
  3931. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  3932. soc->stats.tx.desc_in_use);
  3933. DP_PRINT_STATS("Invalid peer:");
  3934. DP_PRINT_STATS(" Packets = %d",
  3935. soc->stats.tx.tx_invalid_peer.num);
  3936. DP_PRINT_STATS(" Bytes = %llu",
  3937. soc->stats.tx.tx_invalid_peer.bytes);
  3938. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  3939. soc->stats.tx.tcl_ring_full[0],
  3940. soc->stats.tx.tcl_ring_full[1],
  3941. soc->stats.tx.tcl_ring_full[2]);
  3942. }
  3943. /**
  3944. * dp_print_soc_rx_stats: Print SOC level Rx stats
  3945. * @soc: DP_SOC Handle
  3946. *
  3947. * Return:void
  3948. */
  3949. static inline void
  3950. dp_print_soc_rx_stats(struct dp_soc *soc)
  3951. {
  3952. uint32_t i;
  3953. char reo_error[DP_REO_ERR_LENGTH];
  3954. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  3955. uint8_t index = 0;
  3956. DP_PRINT_STATS("SOC Rx Stats:\n");
  3957. DP_PRINT_STATS("Errors:\n");
  3958. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  3959. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  3960. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  3961. DP_PRINT_STATS("Invalid RBM = %d",
  3962. soc->stats.rx.err.invalid_rbm);
  3963. DP_PRINT_STATS("Invalid Vdev = %d",
  3964. soc->stats.rx.err.invalid_vdev);
  3965. DP_PRINT_STATS("Invalid Pdev = %d",
  3966. soc->stats.rx.err.invalid_pdev);
  3967. DP_PRINT_STATS("Invalid Peer = %d",
  3968. soc->stats.rx.err.rx_invalid_peer.num);
  3969. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  3970. soc->stats.rx.err.hal_ring_access_fail);
  3971. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  3972. index += qdf_snprint(&rxdma_error[index],
  3973. DP_RXDMA_ERR_LENGTH - index,
  3974. " %d", soc->stats.rx.err.rxdma_error[i]);
  3975. }
  3976. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  3977. rxdma_error);
  3978. index = 0;
  3979. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  3980. index += qdf_snprint(&reo_error[index],
  3981. DP_REO_ERR_LENGTH - index,
  3982. " %d", soc->stats.rx.err.reo_error[i]);
  3983. }
  3984. DP_PRINT_STATS("REO Error(0-14):%s",
  3985. reo_error);
  3986. }
  3987. /**
  3988. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  3989. * @soc: DP_SOC handle
  3990. * @srng: DP_SRNG handle
  3991. * @ring_name: SRNG name
  3992. *
  3993. * Return: void
  3994. */
  3995. static inline void
  3996. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  3997. char *ring_name)
  3998. {
  3999. uint32_t tailp;
  4000. uint32_t headp;
  4001. if (srng->hal_srng != NULL) {
  4002. hal_api_get_tphp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  4003. DP_PRINT_STATS("%s : Head pointer = %d Tail Pointer = %d\n",
  4004. ring_name, headp, tailp);
  4005. }
  4006. }
  4007. /**
  4008. * dp_print_ring_stats(): Print tail and head pointer
  4009. * @pdev: DP_PDEV handle
  4010. *
  4011. * Return:void
  4012. */
  4013. static inline void
  4014. dp_print_ring_stats(struct dp_pdev *pdev)
  4015. {
  4016. uint32_t i;
  4017. char ring_name[STR_MAXLEN + 1];
  4018. dp_print_ring_stat_from_hal(pdev->soc,
  4019. &pdev->soc->reo_exception_ring,
  4020. "Reo Exception Ring");
  4021. dp_print_ring_stat_from_hal(pdev->soc,
  4022. &pdev->soc->reo_reinject_ring,
  4023. "Reo Inject Ring");
  4024. dp_print_ring_stat_from_hal(pdev->soc,
  4025. &pdev->soc->reo_cmd_ring,
  4026. "Reo Command Ring");
  4027. dp_print_ring_stat_from_hal(pdev->soc,
  4028. &pdev->soc->reo_status_ring,
  4029. "Reo Status Ring");
  4030. dp_print_ring_stat_from_hal(pdev->soc,
  4031. &pdev->soc->rx_rel_ring,
  4032. "Rx Release ring");
  4033. dp_print_ring_stat_from_hal(pdev->soc,
  4034. &pdev->soc->tcl_cmd_ring,
  4035. "Tcl command Ring");
  4036. dp_print_ring_stat_from_hal(pdev->soc,
  4037. &pdev->soc->tcl_status_ring,
  4038. "Tcl Status Ring");
  4039. dp_print_ring_stat_from_hal(pdev->soc,
  4040. &pdev->soc->wbm_desc_rel_ring,
  4041. "Wbm Desc Rel Ring");
  4042. for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
  4043. snprintf(ring_name, STR_MAXLEN, "Reo Dest Ring %d", i);
  4044. dp_print_ring_stat_from_hal(pdev->soc,
  4045. &pdev->soc->reo_dest_ring[i],
  4046. ring_name);
  4047. }
  4048. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++) {
  4049. snprintf(ring_name, STR_MAXLEN, "Tcl Data Ring %d", i);
  4050. dp_print_ring_stat_from_hal(pdev->soc,
  4051. &pdev->soc->tcl_data_ring[i],
  4052. ring_name);
  4053. }
  4054. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  4055. snprintf(ring_name, STR_MAXLEN, "Tx Comp Ring %d", i);
  4056. dp_print_ring_stat_from_hal(pdev->soc,
  4057. &pdev->soc->tx_comp_ring[i],
  4058. ring_name);
  4059. }
  4060. dp_print_ring_stat_from_hal(pdev->soc,
  4061. &pdev->rx_refill_buf_ring,
  4062. "Rx Refill Buf Ring");
  4063. dp_print_ring_stat_from_hal(pdev->soc,
  4064. &pdev->rx_refill_buf_ring2,
  4065. "Second Rx Refill Buf Ring");
  4066. dp_print_ring_stat_from_hal(pdev->soc,
  4067. &pdev->rxdma_mon_buf_ring,
  4068. "Rxdma Mon Buf Ring");
  4069. dp_print_ring_stat_from_hal(pdev->soc,
  4070. &pdev->rxdma_mon_dst_ring,
  4071. "Rxdma Mon Dst Ring");
  4072. dp_print_ring_stat_from_hal(pdev->soc,
  4073. &pdev->rxdma_mon_status_ring,
  4074. "Rxdma Mon Status Ring");
  4075. dp_print_ring_stat_from_hal(pdev->soc,
  4076. &pdev->rxdma_mon_desc_ring,
  4077. "Rxdma mon desc Ring");
  4078. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4079. snprintf(ring_name, STR_MAXLEN, "Rxdma err dst ring %d", i);
  4080. dp_print_ring_stat_from_hal(pdev->soc,
  4081. &pdev->rxdma_err_dst_ring[i],
  4082. ring_name);
  4083. }
  4084. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4085. snprintf(ring_name, STR_MAXLEN, "Rx mac buf ring %d", i);
  4086. dp_print_ring_stat_from_hal(pdev->soc,
  4087. &pdev->rx_mac_buf_ring[i],
  4088. ring_name);
  4089. }
  4090. }
  4091. /**
  4092. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  4093. * @vdev: DP_VDEV handle
  4094. *
  4095. * Return:void
  4096. */
  4097. static inline void
  4098. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  4099. {
  4100. struct dp_peer *peer = NULL;
  4101. struct dp_soc *soc = (struct dp_soc *)vdev->pdev->soc;
  4102. DP_STATS_CLR(vdev->pdev);
  4103. DP_STATS_CLR(vdev->pdev->soc);
  4104. DP_STATS_CLR(vdev);
  4105. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4106. if (!peer)
  4107. return;
  4108. DP_STATS_CLR(peer);
  4109. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  4110. soc->cdp_soc.ol_ops->update_dp_stats(
  4111. vdev->pdev->osif_pdev,
  4112. &peer->stats,
  4113. peer->peer_ids[0],
  4114. UPDATE_PEER_STATS);
  4115. }
  4116. }
  4117. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4118. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  4119. &vdev->stats, (uint16_t)vdev->vdev_id,
  4120. UPDATE_VDEV_STATS);
  4121. }
  4122. /**
  4123. * dp_print_rx_rates(): Print Rx rate stats
  4124. * @vdev: DP_VDEV handle
  4125. *
  4126. * Return:void
  4127. */
  4128. static inline void
  4129. dp_print_rx_rates(struct dp_vdev *vdev)
  4130. {
  4131. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4132. uint8_t i, mcs, pkt_type;
  4133. uint8_t index = 0;
  4134. char nss[DP_NSS_LENGTH];
  4135. DP_PRINT_STATS("Rx Rate Info:\n");
  4136. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4137. index = 0;
  4138. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4139. if (!dp_rate_string[pkt_type][mcs].valid)
  4140. continue;
  4141. DP_PRINT_STATS(" %s = %d",
  4142. dp_rate_string[pkt_type][mcs].mcs_type,
  4143. pdev->stats.rx.pkt_type[pkt_type].
  4144. mcs_count[mcs]);
  4145. }
  4146. DP_PRINT_STATS("\n");
  4147. }
  4148. index = 0;
  4149. for (i = 0; i < SS_COUNT; i++) {
  4150. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4151. " %d", pdev->stats.rx.nss[i]);
  4152. }
  4153. DP_PRINT_STATS("NSS(1-8) = %s",
  4154. nss);
  4155. DP_PRINT_STATS("SGI ="
  4156. " 0.8us %d,"
  4157. " 0.4us %d,"
  4158. " 1.6us %d,"
  4159. " 3.2us %d,",
  4160. pdev->stats.rx.sgi_count[0],
  4161. pdev->stats.rx.sgi_count[1],
  4162. pdev->stats.rx.sgi_count[2],
  4163. pdev->stats.rx.sgi_count[3]);
  4164. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4165. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  4166. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  4167. DP_PRINT_STATS("Reception Type ="
  4168. " SU: %d,"
  4169. " MU_MIMO:%d,"
  4170. " MU_OFDMA:%d,"
  4171. " MU_OFDMA_MIMO:%d\n",
  4172. pdev->stats.rx.reception_type[0],
  4173. pdev->stats.rx.reception_type[1],
  4174. pdev->stats.rx.reception_type[2],
  4175. pdev->stats.rx.reception_type[3]);
  4176. DP_PRINT_STATS("Aggregation:\n");
  4177. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  4178. pdev->stats.rx.ampdu_cnt);
  4179. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  4180. pdev->stats.rx.non_ampdu_cnt);
  4181. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  4182. pdev->stats.rx.amsdu_cnt);
  4183. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  4184. pdev->stats.rx.non_amsdu_cnt);
  4185. }
  4186. /**
  4187. * dp_print_tx_rates(): Print tx rates
  4188. * @vdev: DP_VDEV handle
  4189. *
  4190. * Return:void
  4191. */
  4192. static inline void
  4193. dp_print_tx_rates(struct dp_vdev *vdev)
  4194. {
  4195. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4196. uint8_t mcs, pkt_type;
  4197. uint32_t index;
  4198. DP_PRINT_STATS("Tx Rate Info:\n");
  4199. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4200. index = 0;
  4201. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4202. if (!dp_rate_string[pkt_type][mcs].valid)
  4203. continue;
  4204. DP_PRINT_STATS(" %s = %d",
  4205. dp_rate_string[pkt_type][mcs].mcs_type,
  4206. pdev->stats.tx.pkt_type[pkt_type].
  4207. mcs_count[mcs]);
  4208. }
  4209. DP_PRINT_STATS("\n");
  4210. }
  4211. DP_PRINT_STATS("SGI ="
  4212. " 0.8us %d"
  4213. " 0.4us %d"
  4214. " 1.6us %d"
  4215. " 3.2us %d",
  4216. pdev->stats.tx.sgi_count[0],
  4217. pdev->stats.tx.sgi_count[1],
  4218. pdev->stats.tx.sgi_count[2],
  4219. pdev->stats.tx.sgi_count[3]);
  4220. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4221. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  4222. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  4223. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  4224. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  4225. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  4226. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  4227. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  4228. DP_PRINT_STATS("Aggregation:\n");
  4229. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  4230. pdev->stats.tx.amsdu_cnt);
  4231. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  4232. pdev->stats.tx.non_amsdu_cnt);
  4233. }
  4234. /**
  4235. * dp_print_peer_stats():print peer stats
  4236. * @peer: DP_PEER handle
  4237. *
  4238. * return void
  4239. */
  4240. static inline void dp_print_peer_stats(struct dp_peer *peer)
  4241. {
  4242. uint8_t i, mcs, pkt_type;
  4243. uint32_t index;
  4244. char nss[DP_NSS_LENGTH];
  4245. DP_PRINT_STATS("Node Tx Stats:\n");
  4246. DP_PRINT_STATS("Total Packet Completions = %d",
  4247. peer->stats.tx.comp_pkt.num);
  4248. DP_PRINT_STATS("Total Bytes Completions = %llu",
  4249. peer->stats.tx.comp_pkt.bytes);
  4250. DP_PRINT_STATS("Success Packets = %d",
  4251. peer->stats.tx.tx_success.num);
  4252. DP_PRINT_STATS("Success Bytes = %llu",
  4253. peer->stats.tx.tx_success.bytes);
  4254. DP_PRINT_STATS("Unicast Success Packets = %d",
  4255. peer->stats.tx.ucast.num);
  4256. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  4257. peer->stats.tx.ucast.bytes);
  4258. DP_PRINT_STATS("Multicast Success Packets = %d",
  4259. peer->stats.tx.mcast.num);
  4260. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  4261. peer->stats.tx.mcast.bytes);
  4262. DP_PRINT_STATS("Broadcast Success Packets = %d",
  4263. peer->stats.tx.bcast.num);
  4264. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  4265. peer->stats.tx.bcast.bytes);
  4266. DP_PRINT_STATS("Packets Failed = %d",
  4267. peer->stats.tx.tx_failed);
  4268. DP_PRINT_STATS("Packets In OFDMA = %d",
  4269. peer->stats.tx.ofdma);
  4270. DP_PRINT_STATS("Packets In STBC = %d",
  4271. peer->stats.tx.stbc);
  4272. DP_PRINT_STATS("Packets In LDPC = %d",
  4273. peer->stats.tx.ldpc);
  4274. DP_PRINT_STATS("Packet Retries = %d",
  4275. peer->stats.tx.retries);
  4276. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  4277. peer->stats.tx.amsdu_cnt);
  4278. DP_PRINT_STATS("Last Packet RSSI = %d",
  4279. peer->stats.tx.last_ack_rssi);
  4280. DP_PRINT_STATS("Dropped At FW: Removed = %d",
  4281. peer->stats.tx.dropped.fw_rem);
  4282. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  4283. peer->stats.tx.dropped.fw_rem_tx);
  4284. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  4285. peer->stats.tx.dropped.fw_rem_notx);
  4286. DP_PRINT_STATS("Dropped : Age Out = %d",
  4287. peer->stats.tx.dropped.age_out);
  4288. DP_PRINT_STATS("NAWDS : ");
  4289. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  4290. peer->stats.tx.nawds_mcast_drop);
  4291. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  4292. peer->stats.tx.nawds_mcast.num);
  4293. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  4294. peer->stats.tx.nawds_mcast.bytes);
  4295. DP_PRINT_STATS("Rate Info:");
  4296. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4297. index = 0;
  4298. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4299. if (!dp_rate_string[pkt_type][mcs].valid)
  4300. continue;
  4301. DP_PRINT_STATS(" %s = %d",
  4302. dp_rate_string[pkt_type][mcs].mcs_type,
  4303. peer->stats.tx.pkt_type[pkt_type].
  4304. mcs_count[mcs]);
  4305. }
  4306. DP_PRINT_STATS("\n");
  4307. }
  4308. DP_PRINT_STATS("SGI = "
  4309. " 0.8us %d"
  4310. " 0.4us %d"
  4311. " 1.6us %d"
  4312. " 3.2us %d",
  4313. peer->stats.tx.sgi_count[0],
  4314. peer->stats.tx.sgi_count[1],
  4315. peer->stats.tx.sgi_count[2],
  4316. peer->stats.tx.sgi_count[3]);
  4317. DP_PRINT_STATS("Excess Retries per AC ");
  4318. DP_PRINT_STATS(" Best effort = %d",
  4319. peer->stats.tx.excess_retries_per_ac[0]);
  4320. DP_PRINT_STATS(" Background= %d",
  4321. peer->stats.tx.excess_retries_per_ac[1]);
  4322. DP_PRINT_STATS(" Video = %d",
  4323. peer->stats.tx.excess_retries_per_ac[2]);
  4324. DP_PRINT_STATS(" Voice = %d",
  4325. peer->stats.tx.excess_retries_per_ac[3]);
  4326. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  4327. peer->stats.tx.bw[2], peer->stats.tx.bw[3],
  4328. peer->stats.tx.bw[4], peer->stats.tx.bw[5]);
  4329. index = 0;
  4330. for (i = 0; i < SS_COUNT; i++) {
  4331. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4332. " %d", peer->stats.tx.nss[i]);
  4333. }
  4334. DP_PRINT_STATS("NSS(1-8) = %s",
  4335. nss);
  4336. DP_PRINT_STATS("Aggregation:");
  4337. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  4338. peer->stats.tx.amsdu_cnt);
  4339. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  4340. peer->stats.tx.non_amsdu_cnt);
  4341. DP_PRINT_STATS("Node Rx Stats:");
  4342. DP_PRINT_STATS("Packets Sent To Stack = %d",
  4343. peer->stats.rx.to_stack.num);
  4344. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  4345. peer->stats.rx.to_stack.bytes);
  4346. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  4347. DP_PRINT_STATS("Ring Id = %d", i);
  4348. DP_PRINT_STATS(" Packets Received = %d",
  4349. peer->stats.rx.rcvd_reo[i].num);
  4350. DP_PRINT_STATS(" Bytes Received = %llu",
  4351. peer->stats.rx.rcvd_reo[i].bytes);
  4352. }
  4353. DP_PRINT_STATS("Multicast Packets Received = %d",
  4354. peer->stats.rx.multicast.num);
  4355. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  4356. peer->stats.rx.multicast.bytes);
  4357. DP_PRINT_STATS("Broadcast Packets Received = %d",
  4358. peer->stats.rx.bcast.num);
  4359. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  4360. peer->stats.rx.bcast.bytes);
  4361. DP_PRINT_STATS("WDS Packets Received = %d",
  4362. peer->stats.rx.wds.num);
  4363. DP_PRINT_STATS("WDS Bytes Received = %llu",
  4364. peer->stats.rx.wds.bytes);
  4365. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  4366. peer->stats.rx.intra_bss.pkts.num);
  4367. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  4368. peer->stats.rx.intra_bss.pkts.bytes);
  4369. DP_PRINT_STATS("Raw Packets Received = %d",
  4370. peer->stats.rx.raw.num);
  4371. DP_PRINT_STATS("Raw Bytes Received = %llu",
  4372. peer->stats.rx.raw.bytes);
  4373. DP_PRINT_STATS("Errors: MIC Errors = %d",
  4374. peer->stats.rx.err.mic_err);
  4375. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  4376. peer->stats.rx.err.decrypt_err);
  4377. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  4378. peer->stats.rx.non_ampdu_cnt);
  4379. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  4380. peer->stats.rx.ampdu_cnt);
  4381. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  4382. peer->stats.rx.non_amsdu_cnt);
  4383. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  4384. peer->stats.rx.amsdu_cnt);
  4385. DP_PRINT_STATS("NAWDS : ");
  4386. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  4387. peer->stats.rx.nawds_mcast_drop.num);
  4388. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet Bytes = %llu",
  4389. peer->stats.rx.nawds_mcast_drop.bytes);
  4390. DP_PRINT_STATS("SGI ="
  4391. " 0.8us %d"
  4392. " 0.4us %d"
  4393. " 1.6us %d"
  4394. " 3.2us %d",
  4395. peer->stats.rx.sgi_count[0],
  4396. peer->stats.rx.sgi_count[1],
  4397. peer->stats.rx.sgi_count[2],
  4398. peer->stats.rx.sgi_count[3]);
  4399. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  4400. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  4401. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  4402. DP_PRINT_STATS("Reception Type ="
  4403. " SU %d,"
  4404. " MU_MIMO %d,"
  4405. " MU_OFDMA %d,"
  4406. " MU_OFDMA_MIMO %d",
  4407. peer->stats.rx.reception_type[0],
  4408. peer->stats.rx.reception_type[1],
  4409. peer->stats.rx.reception_type[2],
  4410. peer->stats.rx.reception_type[3]);
  4411. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4412. index = 0;
  4413. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4414. if (!dp_rate_string[pkt_type][mcs].valid)
  4415. continue;
  4416. DP_PRINT_STATS(" %s = %d",
  4417. dp_rate_string[pkt_type][mcs].mcs_type,
  4418. peer->stats.rx.pkt_type[pkt_type].
  4419. mcs_count[mcs]);
  4420. }
  4421. DP_PRINT_STATS("\n");
  4422. }
  4423. index = 0;
  4424. for (i = 0; i < SS_COUNT; i++) {
  4425. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4426. " %d", peer->stats.rx.nss[i]);
  4427. }
  4428. DP_PRINT_STATS("NSS(1-8) = %s",
  4429. nss);
  4430. DP_PRINT_STATS("Aggregation:");
  4431. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  4432. peer->stats.rx.ampdu_cnt);
  4433. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  4434. peer->stats.rx.non_ampdu_cnt);
  4435. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  4436. peer->stats.rx.amsdu_cnt);
  4437. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  4438. peer->stats.rx.non_amsdu_cnt);
  4439. }
  4440. /**
  4441. * dp_print_host_stats()- Function to print the stats aggregated at host
  4442. * @vdev_handle: DP_VDEV handle
  4443. * @type: host stats type
  4444. *
  4445. * Available Stat types
  4446. * TXRX_CLEAR_STATS : Clear the stats
  4447. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  4448. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  4449. * TXRX_TX_HOST_STATS: Print Tx Stats
  4450. * TXRX_RX_HOST_STATS: Print Rx Stats
  4451. * TXRX_AST_STATS: Print AST Stats
  4452. * TXRX_SRNG_PTR_STATS: Print SRNG ring pointer stats
  4453. *
  4454. * Return: 0 on success, print error message in case of failure
  4455. */
  4456. static int
  4457. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  4458. {
  4459. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4460. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4461. dp_aggregate_pdev_stats(pdev);
  4462. switch (type) {
  4463. case TXRX_CLEAR_STATS:
  4464. dp_txrx_host_stats_clr(vdev);
  4465. break;
  4466. case TXRX_RX_RATE_STATS:
  4467. dp_print_rx_rates(vdev);
  4468. break;
  4469. case TXRX_TX_RATE_STATS:
  4470. dp_print_tx_rates(vdev);
  4471. break;
  4472. case TXRX_TX_HOST_STATS:
  4473. dp_print_pdev_tx_stats(pdev);
  4474. dp_print_soc_tx_stats(pdev->soc);
  4475. break;
  4476. case TXRX_RX_HOST_STATS:
  4477. dp_print_pdev_rx_stats(pdev);
  4478. dp_print_soc_rx_stats(pdev->soc);
  4479. break;
  4480. case TXRX_AST_STATS:
  4481. dp_print_ast_stats(pdev->soc);
  4482. break;
  4483. case TXRX_SRNG_PTR_STATS:
  4484. dp_print_ring_stats(pdev);
  4485. break;
  4486. default:
  4487. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  4488. break;
  4489. }
  4490. return 0;
  4491. }
  4492. /*
  4493. * dp_get_host_peer_stats()- function to print peer stats
  4494. * @pdev_handle: DP_PDEV handle
  4495. * @mac_addr: mac address of the peer
  4496. *
  4497. * Return: void
  4498. */
  4499. static void
  4500. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  4501. {
  4502. struct dp_peer *peer;
  4503. uint8_t local_id;
  4504. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  4505. &local_id);
  4506. if (!peer) {
  4507. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4508. "%s: Invalid peer\n", __func__);
  4509. return;
  4510. }
  4511. dp_print_peer_stats(peer);
  4512. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  4513. return;
  4514. }
  4515. /*
  4516. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  4517. * @pdev: DP_PDEV handle
  4518. *
  4519. * Return: void
  4520. */
  4521. static void
  4522. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  4523. {
  4524. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4525. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4526. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, pdev->pdev_id,
  4527. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  4528. RX_BUFFER_SIZE, &htt_tlv_filter);
  4529. }
  4530. /*
  4531. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  4532. * @pdev: DP_PDEV handle
  4533. *
  4534. * Return: void
  4535. */
  4536. static void
  4537. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  4538. {
  4539. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  4540. htt_tlv_filter.mpdu_start = 0;
  4541. htt_tlv_filter.msdu_start = 0;
  4542. htt_tlv_filter.packet = 0;
  4543. htt_tlv_filter.msdu_end = 0;
  4544. htt_tlv_filter.mpdu_end = 0;
  4545. htt_tlv_filter.packet_header = 1;
  4546. htt_tlv_filter.attention = 1;
  4547. htt_tlv_filter.ppdu_start = 1;
  4548. htt_tlv_filter.ppdu_end = 1;
  4549. htt_tlv_filter.ppdu_end_user_stats = 1;
  4550. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4551. htt_tlv_filter.ppdu_end_status_done = 1;
  4552. htt_tlv_filter.enable_fp = 1;
  4553. htt_tlv_filter.enable_md = 0;
  4554. htt_tlv_filter.enable_mo = 0;
  4555. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4556. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4557. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4558. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4559. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4560. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4561. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, pdev->pdev_id,
  4562. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  4563. RX_BUFFER_SIZE, &htt_tlv_filter);
  4564. }
  4565. /*
  4566. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  4567. * @pdev_handle: DP_PDEV handle
  4568. * @val: user provided value
  4569. *
  4570. * Return: void
  4571. */
  4572. static void
  4573. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  4574. {
  4575. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4576. switch (val) {
  4577. case 0:
  4578. pdev->tx_sniffer_enable = 0;
  4579. pdev->mcopy_mode = 0;
  4580. if (!pdev->enhanced_stats_en) {
  4581. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  4582. dp_ppdu_ring_reset(pdev);
  4583. }
  4584. break;
  4585. case 1:
  4586. pdev->tx_sniffer_enable = 1;
  4587. pdev->mcopy_mode = 0;
  4588. if (!pdev->enhanced_stats_en)
  4589. dp_h2t_cfg_stats_msg_send(pdev,
  4590. DP_PPDU_STATS_CFG_ALL, pdev->pdev_id);
  4591. break;
  4592. case 2:
  4593. pdev->mcopy_mode = 1;
  4594. pdev->tx_sniffer_enable = 0;
  4595. if (!pdev->enhanced_stats_en) {
  4596. dp_ppdu_ring_cfg(pdev);
  4597. dp_h2t_cfg_stats_msg_send(pdev,
  4598. DP_PPDU_STATS_CFG_ALL, pdev->pdev_id);
  4599. }
  4600. break;
  4601. default:
  4602. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4603. "Invalid value\n");
  4604. break;
  4605. }
  4606. }
  4607. /*
  4608. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  4609. * @pdev_handle: DP_PDEV handle
  4610. *
  4611. * Return: void
  4612. */
  4613. static void
  4614. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  4615. {
  4616. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4617. pdev->enhanced_stats_en = 1;
  4618. if (!pdev->mcopy_mode)
  4619. dp_ppdu_ring_cfg(pdev);
  4620. if (!pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  4621. dp_h2t_cfg_stats_msg_send(pdev, 0xffff, pdev->pdev_id);
  4622. }
  4623. /*
  4624. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  4625. * @pdev_handle: DP_PDEV handle
  4626. *
  4627. * Return: void
  4628. */
  4629. static void
  4630. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  4631. {
  4632. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4633. pdev->enhanced_stats_en = 0;
  4634. if (!pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  4635. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  4636. if (!pdev->mcopy_mode)
  4637. dp_ppdu_ring_reset(pdev);
  4638. }
  4639. /*
  4640. * dp_get_fw_peer_stats()- function to print peer stats
  4641. * @pdev_handle: DP_PDEV handle
  4642. * @mac_addr: mac address of the peer
  4643. * @cap: Type of htt stats requested
  4644. *
  4645. * Currently Supporting only MAC ID based requests Only
  4646. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  4647. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  4648. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  4649. *
  4650. * Return: void
  4651. */
  4652. static void
  4653. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  4654. uint32_t cap)
  4655. {
  4656. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4657. int i;
  4658. uint32_t config_param0 = 0;
  4659. uint32_t config_param1 = 0;
  4660. uint32_t config_param2 = 0;
  4661. uint32_t config_param3 = 0;
  4662. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  4663. config_param0 |= (1 << (cap + 1));
  4664. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  4665. config_param1 |= (1 << i);
  4666. }
  4667. config_param2 |= (mac_addr[0] & 0x000000ff);
  4668. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  4669. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  4670. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  4671. config_param3 |= (mac_addr[4] & 0x000000ff);
  4672. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  4673. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  4674. config_param0, config_param1, config_param2,
  4675. config_param3, 0);
  4676. }
  4677. /* This struct definition will be removed from here
  4678. * once it get added in FW headers*/
  4679. struct httstats_cmd_req {
  4680. uint32_t config_param0;
  4681. uint32_t config_param1;
  4682. uint32_t config_param2;
  4683. uint32_t config_param3;
  4684. int cookie;
  4685. u_int8_t stats_id;
  4686. };
  4687. /*
  4688. * dp_get_htt_stats: function to process the httstas request
  4689. * @pdev_handle: DP pdev handle
  4690. * @data: pointer to request data
  4691. * @data_len: length for request data
  4692. *
  4693. * return: void
  4694. */
  4695. static void
  4696. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  4697. {
  4698. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4699. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  4700. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  4701. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  4702. req->config_param0, req->config_param1,
  4703. req->config_param2, req->config_param3,
  4704. req->cookie);
  4705. }
  4706. /*
  4707. * dp_set_pdev_param: function to set parameters in pdev
  4708. * @pdev_handle: DP pdev handle
  4709. * @param: parameter type to be set
  4710. * @val: value of parameter to be set
  4711. *
  4712. * return: void
  4713. */
  4714. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  4715. enum cdp_pdev_param_type param, uint8_t val)
  4716. {
  4717. switch (param) {
  4718. case CDP_CONFIG_DEBUG_SNIFFER:
  4719. dp_config_debug_sniffer(pdev_handle, val);
  4720. break;
  4721. default:
  4722. break;
  4723. }
  4724. }
  4725. /*
  4726. * dp_set_vdev_param: function to set parameters in vdev
  4727. * @param: parameter type to be set
  4728. * @val: value of parameter to be set
  4729. *
  4730. * return: void
  4731. */
  4732. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  4733. enum cdp_vdev_param_type param, uint32_t val)
  4734. {
  4735. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4736. switch (param) {
  4737. case CDP_ENABLE_WDS:
  4738. vdev->wds_enabled = val;
  4739. break;
  4740. case CDP_ENABLE_NAWDS:
  4741. vdev->nawds_enabled = val;
  4742. break;
  4743. case CDP_ENABLE_MCAST_EN:
  4744. vdev->mcast_enhancement_en = val;
  4745. break;
  4746. case CDP_ENABLE_PROXYSTA:
  4747. vdev->proxysta_vdev = val;
  4748. break;
  4749. case CDP_UPDATE_TDLS_FLAGS:
  4750. vdev->tdls_link_connected = val;
  4751. break;
  4752. case CDP_CFG_WDS_AGING_TIMER:
  4753. if (val == 0)
  4754. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  4755. else if (val != vdev->wds_aging_timer_val)
  4756. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  4757. vdev->wds_aging_timer_val = val;
  4758. break;
  4759. case CDP_ENABLE_AP_BRIDGE:
  4760. if (wlan_op_mode_sta != vdev->opmode)
  4761. vdev->ap_bridge_enabled = val;
  4762. else
  4763. vdev->ap_bridge_enabled = false;
  4764. break;
  4765. case CDP_ENABLE_CIPHER:
  4766. vdev->sec_type = val;
  4767. break;
  4768. case CDP_ENABLE_QWRAP_ISOLATION:
  4769. vdev->isolation_vdev = val;
  4770. break;
  4771. default:
  4772. break;
  4773. }
  4774. dp_tx_vdev_update_search_flags(vdev);
  4775. }
  4776. /**
  4777. * dp_peer_set_nawds: set nawds bit in peer
  4778. * @peer_handle: pointer to peer
  4779. * @value: enable/disable nawds
  4780. *
  4781. * return: void
  4782. */
  4783. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  4784. {
  4785. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4786. peer->nawds_enabled = value;
  4787. }
  4788. /*
  4789. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  4790. * @vdev_handle: DP_VDEV handle
  4791. * @map_id:ID of map that needs to be updated
  4792. *
  4793. * Return: void
  4794. */
  4795. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  4796. uint8_t map_id)
  4797. {
  4798. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4799. vdev->dscp_tid_map_id = map_id;
  4800. return;
  4801. }
  4802. /**
  4803. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  4804. * @pdev: DP_PDEV handle
  4805. * @map_id: ID of map that needs to be updated
  4806. * @tos: index value in map
  4807. * @tid: tid value passed by the user
  4808. *
  4809. * Return: void
  4810. */
  4811. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  4812. uint8_t map_id, uint8_t tos, uint8_t tid)
  4813. {
  4814. uint8_t dscp;
  4815. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  4816. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  4817. pdev->dscp_tid_map[map_id][dscp] = tid;
  4818. if (map_id < HAL_MAX_HW_DSCP_TID_MAPS)
  4819. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  4820. map_id, dscp);
  4821. return;
  4822. }
  4823. /**
  4824. * dp_fw_stats_process(): Process TxRX FW stats request
  4825. * @vdev_handle: DP VDEV handle
  4826. * @req: stats request
  4827. *
  4828. * return: int
  4829. */
  4830. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  4831. struct cdp_txrx_stats_req *req)
  4832. {
  4833. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4834. struct dp_pdev *pdev = NULL;
  4835. uint32_t stats = req->stats;
  4836. if (!vdev) {
  4837. DP_TRACE(NONE, "VDEV not found");
  4838. return 1;
  4839. }
  4840. pdev = vdev->pdev;
  4841. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  4842. req->param1, req->param2, req->param3, 0);
  4843. }
  4844. /**
  4845. * dp_txrx_stats_request - function to map to firmware and host stats
  4846. * @vdev: virtual handle
  4847. * @req: stats request
  4848. *
  4849. * Return: integer
  4850. */
  4851. static int dp_txrx_stats_request(struct cdp_vdev *vdev,
  4852. struct cdp_txrx_stats_req *req)
  4853. {
  4854. int host_stats;
  4855. int fw_stats;
  4856. enum cdp_stats stats;
  4857. if (!vdev || !req) {
  4858. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4859. "Invalid vdev/req instance");
  4860. return 0;
  4861. }
  4862. stats = req->stats;
  4863. if (stats >= CDP_TXRX_MAX_STATS)
  4864. return 0;
  4865. /*
  4866. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  4867. * has to be updated if new FW HTT stats added
  4868. */
  4869. if (stats > CDP_TXRX_STATS_HTT_MAX)
  4870. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  4871. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  4872. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  4873. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4874. "stats: %u fw_stats_type: %d host_stats_type: %d",
  4875. stats, fw_stats, host_stats);
  4876. if (fw_stats != TXRX_FW_STATS_INVALID) {
  4877. /* update request with FW stats type */
  4878. req->stats = fw_stats;
  4879. return dp_fw_stats_process(vdev, req);
  4880. }
  4881. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  4882. (host_stats <= TXRX_HOST_STATS_MAX))
  4883. return dp_print_host_stats(vdev, host_stats);
  4884. else
  4885. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4886. "Wrong Input for TxRx Stats");
  4887. return 0;
  4888. }
  4889. /**
  4890. * dp_txrx_stats() - function to map to firmware and host stats
  4891. * @vdev: virtual handle
  4892. * @stats: type of statistics requested
  4893. *
  4894. * Return: integer
  4895. */
  4896. static int dp_txrx_stats(struct cdp_vdev *vdev, enum cdp_stats stats)
  4897. {
  4898. struct cdp_txrx_stats_req req = {0,};
  4899. req.stats = stats;
  4900. return dp_txrx_stats_request(vdev, &req);
  4901. }
  4902. /*
  4903. * dp_print_napi_stats(): NAPI stats
  4904. * @soc - soc handle
  4905. */
  4906. static void dp_print_napi_stats(struct dp_soc *soc)
  4907. {
  4908. hif_print_napi_stats(soc->hif_handle);
  4909. }
  4910. /*
  4911. * dp_print_per_ring_stats(): Packet count per ring
  4912. * @soc - soc handle
  4913. */
  4914. static void dp_print_per_ring_stats(struct dp_soc *soc)
  4915. {
  4916. uint8_t ring;
  4917. uint16_t core;
  4918. uint64_t total_packets;
  4919. DP_TRACE(FATAL, "Reo packets per ring:");
  4920. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  4921. total_packets = 0;
  4922. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  4923. for (core = 0; core < NR_CPUS; core++) {
  4924. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  4925. core, soc->stats.rx.ring_packets[core][ring]);
  4926. total_packets += soc->stats.rx.ring_packets[core][ring];
  4927. }
  4928. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  4929. ring, total_packets);
  4930. }
  4931. }
  4932. /*
  4933. * dp_txrx_path_stats() - Function to display dump stats
  4934. * @soc - soc handle
  4935. *
  4936. * return: none
  4937. */
  4938. static void dp_txrx_path_stats(struct dp_soc *soc)
  4939. {
  4940. uint8_t error_code;
  4941. uint8_t loop_pdev;
  4942. struct dp_pdev *pdev;
  4943. uint8_t i;
  4944. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  4945. pdev = soc->pdev_list[loop_pdev];
  4946. dp_aggregate_pdev_stats(pdev);
  4947. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4948. "Tx path Statistics:");
  4949. DP_TRACE(FATAL, "from stack: %u msdus (%llu bytes)",
  4950. pdev->stats.tx_i.rcvd.num,
  4951. pdev->stats.tx_i.rcvd.bytes);
  4952. DP_TRACE(FATAL, "processed from host: %u msdus (%llu bytes)",
  4953. pdev->stats.tx_i.processed.num,
  4954. pdev->stats.tx_i.processed.bytes);
  4955. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%llu bytes)",
  4956. pdev->stats.tx.tx_success.num,
  4957. pdev->stats.tx.tx_success.bytes);
  4958. DP_TRACE(FATAL, "Dropped in host:");
  4959. DP_TRACE(FATAL, "Total packets dropped: %u,",
  4960. pdev->stats.tx_i.dropped.dropped_pkt.num);
  4961. DP_TRACE(FATAL, "Descriptor not available: %u",
  4962. pdev->stats.tx_i.dropped.desc_na);
  4963. DP_TRACE(FATAL, "Ring full: %u",
  4964. pdev->stats.tx_i.dropped.ring_full);
  4965. DP_TRACE(FATAL, "Enqueue fail: %u",
  4966. pdev->stats.tx_i.dropped.enqueue_fail);
  4967. DP_TRACE(FATAL, "DMA Error: %u",
  4968. pdev->stats.tx_i.dropped.dma_error);
  4969. DP_TRACE(FATAL, "Dropped in hardware:");
  4970. DP_TRACE(FATAL, "total packets dropped: %u",
  4971. pdev->stats.tx.tx_failed);
  4972. DP_TRACE(FATAL, "mpdu age out: %u",
  4973. pdev->stats.tx.dropped.age_out);
  4974. DP_TRACE(FATAL, "firmware removed: %u",
  4975. pdev->stats.tx.dropped.fw_rem);
  4976. DP_TRACE(FATAL, "firmware removed tx: %u",
  4977. pdev->stats.tx.dropped.fw_rem_tx);
  4978. DP_TRACE(FATAL, "firmware removed notx %u",
  4979. pdev->stats.tx.dropped.fw_rem_notx);
  4980. DP_TRACE(FATAL, "peer_invalid: %u",
  4981. pdev->soc->stats.tx.tx_invalid_peer.num);
  4982. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  4983. DP_TRACE(FATAL, "Single Packet: %u",
  4984. pdev->stats.tx_comp_histogram.pkts_1);
  4985. DP_TRACE(FATAL, "2-20 Packets: %u",
  4986. pdev->stats.tx_comp_histogram.pkts_2_20);
  4987. DP_TRACE(FATAL, "21-40 Packets: %u",
  4988. pdev->stats.tx_comp_histogram.pkts_21_40);
  4989. DP_TRACE(FATAL, "41-60 Packets: %u",
  4990. pdev->stats.tx_comp_histogram.pkts_41_60);
  4991. DP_TRACE(FATAL, "61-80 Packets: %u",
  4992. pdev->stats.tx_comp_histogram.pkts_61_80);
  4993. DP_TRACE(FATAL, "81-100 Packets: %u",
  4994. pdev->stats.tx_comp_histogram.pkts_81_100);
  4995. DP_TRACE(FATAL, "101-200 Packets: %u",
  4996. pdev->stats.tx_comp_histogram.pkts_101_200);
  4997. DP_TRACE(FATAL, " 201+ Packets: %u",
  4998. pdev->stats.tx_comp_histogram.pkts_201_plus);
  4999. DP_TRACE(FATAL, "Rx path statistics");
  5000. DP_TRACE(FATAL, "delivered %u msdus ( %llu bytes),",
  5001. pdev->stats.rx.to_stack.num,
  5002. pdev->stats.rx.to_stack.bytes);
  5003. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  5004. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %llu bytes),",
  5005. i, pdev->stats.rx.rcvd_reo[i].num,
  5006. pdev->stats.rx.rcvd_reo[i].bytes);
  5007. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %llu bytes),",
  5008. pdev->stats.rx.intra_bss.pkts.num,
  5009. pdev->stats.rx.intra_bss.pkts.bytes);
  5010. DP_TRACE(FATAL, "intra-bss fails %u msdus ( %llu bytes),",
  5011. pdev->stats.rx.intra_bss.fail.num,
  5012. pdev->stats.rx.intra_bss.fail.bytes);
  5013. DP_TRACE(FATAL, "raw packets %u msdus ( %llu bytes),",
  5014. pdev->stats.rx.raw.num,
  5015. pdev->stats.rx.raw.bytes);
  5016. DP_TRACE(FATAL, "dropped: error %u msdus",
  5017. pdev->stats.rx.err.mic_err);
  5018. DP_TRACE(FATAL, "peer invalid %u",
  5019. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  5020. DP_TRACE(FATAL, "Reo Statistics");
  5021. DP_TRACE(FATAL, "rbm error: %u msdus",
  5022. pdev->soc->stats.rx.err.invalid_rbm);
  5023. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  5024. pdev->soc->stats.rx.err.hal_ring_access_fail);
  5025. DP_TRACE(FATAL, "Reo errors");
  5026. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  5027. error_code++) {
  5028. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  5029. error_code,
  5030. pdev->soc->stats.rx.err.reo_error[error_code]);
  5031. }
  5032. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  5033. error_code++) {
  5034. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  5035. error_code,
  5036. pdev->soc->stats.rx.err
  5037. .rxdma_error[error_code]);
  5038. }
  5039. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  5040. DP_TRACE(FATAL, "Single Packet: %u",
  5041. pdev->stats.rx_ind_histogram.pkts_1);
  5042. DP_TRACE(FATAL, "2-20 Packets: %u",
  5043. pdev->stats.rx_ind_histogram.pkts_2_20);
  5044. DP_TRACE(FATAL, "21-40 Packets: %u",
  5045. pdev->stats.rx_ind_histogram.pkts_21_40);
  5046. DP_TRACE(FATAL, "41-60 Packets: %u",
  5047. pdev->stats.rx_ind_histogram.pkts_41_60);
  5048. DP_TRACE(FATAL, "61-80 Packets: %u",
  5049. pdev->stats.rx_ind_histogram.pkts_61_80);
  5050. DP_TRACE(FATAL, "81-100 Packets: %u",
  5051. pdev->stats.rx_ind_histogram.pkts_81_100);
  5052. DP_TRACE(FATAL, "101-200 Packets: %u",
  5053. pdev->stats.rx_ind_histogram.pkts_101_200);
  5054. DP_TRACE(FATAL, " 201+ Packets: %u",
  5055. pdev->stats.rx_ind_histogram.pkts_201_plus);
  5056. DP_TRACE_STATS(ERROR, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  5057. __func__,
  5058. pdev->soc->wlan_cfg_ctx->tso_enabled,
  5059. pdev->soc->wlan_cfg_ctx->lro_enabled,
  5060. pdev->soc->wlan_cfg_ctx->rx_hash,
  5061. pdev->soc->wlan_cfg_ctx->napi_enabled);
  5062. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5063. DP_TRACE_STATS(ERROR, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  5064. __func__,
  5065. pdev->soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold,
  5066. pdev->soc->wlan_cfg_ctx->tx_flow_start_queue_offset);
  5067. #endif
  5068. }
  5069. }
  5070. /*
  5071. * dp_txrx_dump_stats() - Dump statistics
  5072. * @value - Statistics option
  5073. */
  5074. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  5075. enum qdf_stats_verbosity_level level)
  5076. {
  5077. struct dp_soc *soc =
  5078. (struct dp_soc *)psoc;
  5079. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5080. if (!soc) {
  5081. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5082. "%s: soc is NULL", __func__);
  5083. return QDF_STATUS_E_INVAL;
  5084. }
  5085. switch (value) {
  5086. case CDP_TXRX_PATH_STATS:
  5087. dp_txrx_path_stats(soc);
  5088. break;
  5089. case CDP_RX_RING_STATS:
  5090. dp_print_per_ring_stats(soc);
  5091. break;
  5092. case CDP_TXRX_TSO_STATS:
  5093. /* TODO: NOT IMPLEMENTED */
  5094. break;
  5095. case CDP_DUMP_TX_FLOW_POOL_INFO:
  5096. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  5097. break;
  5098. case CDP_DP_NAPI_STATS:
  5099. dp_print_napi_stats(soc);
  5100. break;
  5101. case CDP_TXRX_DESC_STATS:
  5102. /* TODO: NOT IMPLEMENTED */
  5103. break;
  5104. default:
  5105. status = QDF_STATUS_E_INVAL;
  5106. break;
  5107. }
  5108. return status;
  5109. }
  5110. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5111. /**
  5112. * dp_update_flow_control_parameters() - API to store datapath
  5113. * config parameters
  5114. * @soc: soc handle
  5115. * @cfg: ini parameter handle
  5116. *
  5117. * Return: void
  5118. */
  5119. static inline
  5120. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5121. struct cdp_config_params *params)
  5122. {
  5123. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  5124. params->tx_flow_stop_queue_threshold;
  5125. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  5126. params->tx_flow_start_queue_offset;
  5127. }
  5128. #else
  5129. static inline
  5130. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5131. struct cdp_config_params *params)
  5132. {
  5133. }
  5134. #endif
  5135. /**
  5136. * dp_update_config_parameters() - API to store datapath
  5137. * config parameters
  5138. * @soc: soc handle
  5139. * @cfg: ini parameter handle
  5140. *
  5141. * Return: status
  5142. */
  5143. static
  5144. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  5145. struct cdp_config_params *params)
  5146. {
  5147. struct dp_soc *soc = (struct dp_soc *)psoc;
  5148. if (!(soc)) {
  5149. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5150. "%s: Invalid handle", __func__);
  5151. return QDF_STATUS_E_INVAL;
  5152. }
  5153. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  5154. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  5155. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  5156. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  5157. params->tcp_udp_checksumoffload;
  5158. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  5159. dp_update_flow_control_parameters(soc, params);
  5160. return QDF_STATUS_SUCCESS;
  5161. }
  5162. /**
  5163. * dp_txrx_set_wds_rx_policy() - API to store datapath
  5164. * config parameters
  5165. * @vdev_handle - datapath vdev handle
  5166. * @cfg: ini parameter handle
  5167. *
  5168. * Return: status
  5169. */
  5170. #ifdef WDS_VENDOR_EXTENSION
  5171. void
  5172. dp_txrx_set_wds_rx_policy(
  5173. struct cdp_vdev *vdev_handle,
  5174. u_int32_t val)
  5175. {
  5176. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5177. struct dp_peer *peer;
  5178. if (vdev->opmode == wlan_op_mode_ap) {
  5179. /* for ap, set it on bss_peer */
  5180. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5181. if (peer->bss_peer) {
  5182. peer->wds_ecm.wds_rx_filter = 1;
  5183. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5184. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5185. break;
  5186. }
  5187. }
  5188. } else if (vdev->opmode == wlan_op_mode_sta) {
  5189. peer = TAILQ_FIRST(&vdev->peer_list);
  5190. peer->wds_ecm.wds_rx_filter = 1;
  5191. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5192. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5193. }
  5194. }
  5195. /**
  5196. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  5197. *
  5198. * @peer_handle - datapath peer handle
  5199. * @wds_tx_ucast: policy for unicast transmission
  5200. * @wds_tx_mcast: policy for multicast transmission
  5201. *
  5202. * Return: void
  5203. */
  5204. void
  5205. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  5206. int wds_tx_ucast, int wds_tx_mcast)
  5207. {
  5208. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5209. if (wds_tx_ucast || wds_tx_mcast) {
  5210. peer->wds_enabled = 1;
  5211. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  5212. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  5213. } else {
  5214. peer->wds_enabled = 0;
  5215. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  5216. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  5217. }
  5218. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5219. FL("Policy Update set to :\
  5220. peer->wds_enabled %d\
  5221. peer->wds_ecm.wds_tx_ucast_4addr %d\
  5222. peer->wds_ecm.wds_tx_mcast_4addr %d\n"),
  5223. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  5224. peer->wds_ecm.wds_tx_mcast_4addr);
  5225. return;
  5226. }
  5227. #endif
  5228. static struct cdp_wds_ops dp_ops_wds = {
  5229. .vdev_set_wds = dp_vdev_set_wds,
  5230. #ifdef WDS_VENDOR_EXTENSION
  5231. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  5232. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  5233. #endif
  5234. };
  5235. /*
  5236. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  5237. * @soc - datapath soc handle
  5238. * @peer - datapath peer handle
  5239. *
  5240. * Delete the AST entries belonging to a peer
  5241. */
  5242. #ifdef FEATURE_WDS
  5243. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5244. struct dp_peer *peer)
  5245. {
  5246. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  5247. qdf_spin_lock_bh(&soc->ast_lock);
  5248. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry) {
  5249. if (ast_entry->next_hop) {
  5250. soc->cdp_soc.ol_ops->peer_del_wds_entry(
  5251. peer->vdev->osif_vdev,
  5252. ast_entry->mac_addr.raw);
  5253. }
  5254. dp_peer_del_ast(soc, ast_entry);
  5255. }
  5256. qdf_spin_unlock_bh(&soc->ast_lock);
  5257. }
  5258. #else
  5259. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5260. struct dp_peer *peer)
  5261. {
  5262. }
  5263. #endif
  5264. /*
  5265. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  5266. * @vdev_handle - datapath vdev handle
  5267. * @callback - callback function
  5268. * @ctxt: callback context
  5269. *
  5270. */
  5271. static void
  5272. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  5273. ol_txrx_data_tx_cb callback, void *ctxt)
  5274. {
  5275. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5276. vdev->tx_non_std_data_callback.func = callback;
  5277. vdev->tx_non_std_data_callback.ctxt = ctxt;
  5278. }
  5279. /**
  5280. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  5281. * @pdev_hdl: datapath pdev handle
  5282. *
  5283. * Return: opaque pointer to dp txrx handle
  5284. */
  5285. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  5286. {
  5287. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5288. return pdev->dp_txrx_handle;
  5289. }
  5290. /**
  5291. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  5292. * @pdev_hdl: datapath pdev handle
  5293. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  5294. *
  5295. * Return: void
  5296. */
  5297. static void
  5298. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  5299. {
  5300. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5301. pdev->dp_txrx_handle = dp_txrx_hdl;
  5302. }
  5303. #ifdef CONFIG_WIN
  5304. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  5305. {
  5306. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  5307. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  5308. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  5309. peer->delete_in_progress = true;
  5310. dp_peer_delete_ast_entries(soc, peer);
  5311. }
  5312. #endif
  5313. static struct cdp_cmn_ops dp_ops_cmn = {
  5314. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  5315. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  5316. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  5317. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  5318. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  5319. .txrx_peer_create = dp_peer_create_wifi3,
  5320. .txrx_peer_setup = dp_peer_setup_wifi3,
  5321. #ifdef CONFIG_WIN
  5322. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  5323. #else
  5324. .txrx_peer_teardown = NULL,
  5325. #endif
  5326. .txrx_peer_delete = dp_peer_delete_wifi3,
  5327. .txrx_vdev_register = dp_vdev_register_wifi3,
  5328. .txrx_soc_detach = dp_soc_detach_wifi3,
  5329. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  5330. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  5331. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  5332. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  5333. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  5334. .delba_process = dp_delba_process_wifi3,
  5335. .set_addba_response = dp_set_addba_response,
  5336. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  5337. .flush_cache_rx_queue = NULL,
  5338. /* TODO: get API's for dscp-tid need to be added*/
  5339. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  5340. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  5341. .txrx_stats = dp_txrx_stats,
  5342. .txrx_stats_request = dp_txrx_stats_request,
  5343. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  5344. .display_stats = dp_txrx_dump_stats,
  5345. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  5346. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  5347. #ifdef DP_INTR_POLL_BASED
  5348. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  5349. #else
  5350. .txrx_intr_attach = dp_soc_interrupt_attach,
  5351. #endif
  5352. .txrx_intr_detach = dp_soc_interrupt_detach,
  5353. .set_pn_check = dp_set_pn_check_wifi3,
  5354. .update_config_parameters = dp_update_config_parameters,
  5355. /* TODO: Add other functions */
  5356. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  5357. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  5358. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  5359. };
  5360. static struct cdp_ctrl_ops dp_ops_ctrl = {
  5361. .txrx_peer_authorize = dp_peer_authorize,
  5362. #ifdef QCA_SUPPORT_SON
  5363. .txrx_set_inact_params = dp_set_inact_params,
  5364. .txrx_start_inact_timer = dp_start_inact_timer,
  5365. .txrx_set_overload = dp_set_overload,
  5366. .txrx_peer_is_inact = dp_peer_is_inact,
  5367. .txrx_mark_peer_inact = dp_mark_peer_inact,
  5368. #endif
  5369. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  5370. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  5371. #ifdef MESH_MODE_SUPPORT
  5372. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  5373. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  5374. #endif
  5375. .txrx_set_vdev_param = dp_set_vdev_param,
  5376. .txrx_peer_set_nawds = dp_peer_set_nawds,
  5377. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  5378. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  5379. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  5380. .txrx_update_filter_neighbour_peers =
  5381. dp_update_filter_neighbour_peers,
  5382. .txrx_get_sec_type = dp_get_sec_type,
  5383. /* TODO: Add other functions */
  5384. .txrx_wdi_event_sub = dp_wdi_event_sub,
  5385. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  5386. #ifdef WDI_EVENT_ENABLE
  5387. .txrx_get_pldev = dp_get_pldev,
  5388. #endif
  5389. .txrx_set_pdev_param = dp_set_pdev_param,
  5390. };
  5391. static struct cdp_me_ops dp_ops_me = {
  5392. #ifdef ATH_SUPPORT_IQUE
  5393. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  5394. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  5395. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  5396. #endif
  5397. };
  5398. static struct cdp_mon_ops dp_ops_mon = {
  5399. .txrx_monitor_set_filter_ucast_data = NULL,
  5400. .txrx_monitor_set_filter_mcast_data = NULL,
  5401. .txrx_monitor_set_filter_non_data = NULL,
  5402. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  5403. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  5404. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  5405. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  5406. /* Added support for HK advance filter */
  5407. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  5408. };
  5409. static struct cdp_host_stats_ops dp_ops_host_stats = {
  5410. .txrx_per_peer_stats = dp_get_host_peer_stats,
  5411. .get_fw_peer_stats = dp_get_fw_peer_stats,
  5412. .get_htt_stats = dp_get_htt_stats,
  5413. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  5414. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  5415. /* TODO */
  5416. };
  5417. static struct cdp_raw_ops dp_ops_raw = {
  5418. /* TODO */
  5419. };
  5420. #ifdef CONFIG_WIN
  5421. static struct cdp_pflow_ops dp_ops_pflow = {
  5422. /* TODO */
  5423. };
  5424. #endif /* CONFIG_WIN */
  5425. #ifdef FEATURE_RUNTIME_PM
  5426. /**
  5427. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  5428. * @opaque_pdev: DP pdev context
  5429. *
  5430. * DP is ready to runtime suspend if there are no pending TX packets.
  5431. *
  5432. * Return: QDF_STATUS
  5433. */
  5434. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  5435. {
  5436. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5437. struct dp_soc *soc = pdev->soc;
  5438. /* Call DP TX flow control API to check if there is any
  5439. pending packets */
  5440. if (soc->intr_mode == DP_INTR_POLL)
  5441. qdf_timer_stop(&soc->int_timer);
  5442. return QDF_STATUS_SUCCESS;
  5443. }
  5444. /**
  5445. * dp_runtime_resume() - ensure DP is ready to runtime resume
  5446. * @opaque_pdev: DP pdev context
  5447. *
  5448. * Resume DP for runtime PM.
  5449. *
  5450. * Return: QDF_STATUS
  5451. */
  5452. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  5453. {
  5454. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5455. struct dp_soc *soc = pdev->soc;
  5456. void *hal_srng;
  5457. int i;
  5458. if (soc->intr_mode == DP_INTR_POLL)
  5459. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  5460. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  5461. hal_srng = soc->tcl_data_ring[i].hal_srng;
  5462. if (hal_srng) {
  5463. /* We actually only need to acquire the lock */
  5464. hal_srng_access_start(soc->hal_soc, hal_srng);
  5465. /* Update SRC ring head pointer for HW to send
  5466. all pending packets */
  5467. hal_srng_access_end(soc->hal_soc, hal_srng);
  5468. }
  5469. }
  5470. return QDF_STATUS_SUCCESS;
  5471. }
  5472. #endif /* FEATURE_RUNTIME_PM */
  5473. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  5474. {
  5475. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5476. struct dp_soc *soc = pdev->soc;
  5477. if (soc->intr_mode == DP_INTR_POLL)
  5478. qdf_timer_stop(&soc->int_timer);
  5479. return QDF_STATUS_SUCCESS;
  5480. }
  5481. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  5482. {
  5483. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5484. struct dp_soc *soc = pdev->soc;
  5485. if (soc->intr_mode == DP_INTR_POLL)
  5486. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  5487. return QDF_STATUS_SUCCESS;
  5488. }
  5489. #ifndef CONFIG_WIN
  5490. static struct cdp_misc_ops dp_ops_misc = {
  5491. .tx_non_std = dp_tx_non_std,
  5492. .get_opmode = dp_get_opmode,
  5493. #ifdef FEATURE_RUNTIME_PM
  5494. .runtime_suspend = dp_runtime_suspend,
  5495. .runtime_resume = dp_runtime_resume,
  5496. #endif /* FEATURE_RUNTIME_PM */
  5497. .pkt_log_init = dp_pkt_log_init,
  5498. .pkt_log_con_service = dp_pkt_log_con_service,
  5499. };
  5500. static struct cdp_flowctl_ops dp_ops_flowctl = {
  5501. /* WIFI 3.0 DP implement as required. */
  5502. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5503. .register_pause_cb = dp_txrx_register_pause_cb,
  5504. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  5505. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  5506. };
  5507. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  5508. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5509. };
  5510. #ifdef IPA_OFFLOAD
  5511. static struct cdp_ipa_ops dp_ops_ipa = {
  5512. .ipa_get_resource = dp_ipa_get_resource,
  5513. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  5514. .ipa_op_response = dp_ipa_op_response,
  5515. .ipa_register_op_cb = dp_ipa_register_op_cb,
  5516. .ipa_get_stat = dp_ipa_get_stat,
  5517. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  5518. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  5519. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  5520. .ipa_setup = dp_ipa_setup,
  5521. .ipa_cleanup = dp_ipa_cleanup,
  5522. .ipa_setup_iface = dp_ipa_setup_iface,
  5523. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  5524. .ipa_enable_pipes = dp_ipa_enable_pipes,
  5525. .ipa_disable_pipes = dp_ipa_disable_pipes,
  5526. .ipa_set_perf_level = dp_ipa_set_perf_level
  5527. };
  5528. #endif
  5529. static struct cdp_bus_ops dp_ops_bus = {
  5530. .bus_suspend = dp_bus_suspend,
  5531. .bus_resume = dp_bus_resume
  5532. };
  5533. static struct cdp_ocb_ops dp_ops_ocb = {
  5534. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5535. };
  5536. static struct cdp_throttle_ops dp_ops_throttle = {
  5537. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5538. };
  5539. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  5540. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5541. };
  5542. static struct cdp_cfg_ops dp_ops_cfg = {
  5543. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5544. };
  5545. /*
  5546. * dp_wrapper_peer_get_ref_by_addr - wrapper function to get to peer
  5547. * @dev: physical device instance
  5548. * @peer_mac_addr: peer mac address
  5549. * @local_id: local id for the peer
  5550. * @debug_id: to track enum peer access
  5551. * Return: peer instance pointer
  5552. */
  5553. static inline void *
  5554. dp_wrapper_peer_get_ref_by_addr(struct cdp_pdev *dev, u8 *peer_mac_addr,
  5555. u8 *local_id,
  5556. enum peer_debug_id_type debug_id)
  5557. {
  5558. /*
  5559. * Currently this function does not implement the "get ref"
  5560. * functionality and is mapped to dp_find_peer_by_addr which does not
  5561. * increment the peer ref count. So the peer state is uncertain after
  5562. * calling this API. The functionality needs to be implemented.
  5563. * Accordingly the corresponding release_ref function is NULL.
  5564. */
  5565. return dp_find_peer_by_addr(dev, peer_mac_addr, local_id);
  5566. }
  5567. static struct cdp_peer_ops dp_ops_peer = {
  5568. .register_peer = dp_register_peer,
  5569. .clear_peer = dp_clear_peer,
  5570. .find_peer_by_addr = dp_find_peer_by_addr,
  5571. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  5572. .peer_get_ref_by_addr = dp_wrapper_peer_get_ref_by_addr,
  5573. .peer_release_ref = NULL,
  5574. .local_peer_id = dp_local_peer_id,
  5575. .peer_find_by_local_id = dp_peer_find_by_local_id,
  5576. .peer_state_update = dp_peer_state_update,
  5577. .get_vdevid = dp_get_vdevid,
  5578. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  5579. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  5580. .get_vdev_for_peer = dp_get_vdev_for_peer,
  5581. .get_peer_state = dp_get_peer_state,
  5582. .last_assoc_received = dp_get_last_assoc_received,
  5583. .last_disassoc_received = dp_get_last_disassoc_received,
  5584. .last_deauth_received = dp_get_last_deauth_received,
  5585. };
  5586. #endif
  5587. static struct cdp_ops dp_txrx_ops = {
  5588. .cmn_drv_ops = &dp_ops_cmn,
  5589. .ctrl_ops = &dp_ops_ctrl,
  5590. .me_ops = &dp_ops_me,
  5591. .mon_ops = &dp_ops_mon,
  5592. .host_stats_ops = &dp_ops_host_stats,
  5593. .wds_ops = &dp_ops_wds,
  5594. .raw_ops = &dp_ops_raw,
  5595. #ifdef CONFIG_WIN
  5596. .pflow_ops = &dp_ops_pflow,
  5597. #endif /* CONFIG_WIN */
  5598. #ifndef CONFIG_WIN
  5599. .misc_ops = &dp_ops_misc,
  5600. .cfg_ops = &dp_ops_cfg,
  5601. .flowctl_ops = &dp_ops_flowctl,
  5602. .l_flowctl_ops = &dp_ops_l_flowctl,
  5603. #ifdef IPA_OFFLOAD
  5604. .ipa_ops = &dp_ops_ipa,
  5605. #endif
  5606. .bus_ops = &dp_ops_bus,
  5607. .ocb_ops = &dp_ops_ocb,
  5608. .peer_ops = &dp_ops_peer,
  5609. .throttle_ops = &dp_ops_throttle,
  5610. .mob_stats_ops = &dp_ops_mob_stats,
  5611. #endif
  5612. };
  5613. /*
  5614. * dp_soc_set_txrx_ring_map()
  5615. * @dp_soc: DP handler for soc
  5616. *
  5617. * Return: Void
  5618. */
  5619. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  5620. {
  5621. uint32_t i;
  5622. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  5623. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_DEFAULT_MAP][i];
  5624. }
  5625. }
  5626. /*
  5627. * dp_soc_attach_wifi3() - Attach txrx SOC
  5628. * @ctrl_psoc: Opaque SOC handle from control plane
  5629. * @htc_handle: Opaque HTC handle
  5630. * @hif_handle: Opaque HIF handle
  5631. * @qdf_osdev: QDF device
  5632. *
  5633. * Return: DP SOC handle on success, NULL on failure
  5634. */
  5635. /*
  5636. * Local prototype added to temporarily address warning caused by
  5637. * -Wmissing-prototypes. A more correct solution, namely to expose
  5638. * a prototype in an appropriate header file, will come later.
  5639. */
  5640. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  5641. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  5642. struct ol_if_ops *ol_ops);
  5643. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  5644. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  5645. struct ol_if_ops *ol_ops)
  5646. {
  5647. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  5648. if (!soc) {
  5649. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5650. FL("DP SOC memory allocation failed"));
  5651. goto fail0;
  5652. }
  5653. soc->cdp_soc.ops = &dp_txrx_ops;
  5654. soc->cdp_soc.ol_ops = ol_ops;
  5655. soc->ctrl_psoc = ctrl_psoc;
  5656. soc->osdev = qdf_osdev;
  5657. soc->hif_handle = hif_handle;
  5658. soc->hal_soc = hif_get_hal_handle(hif_handle);
  5659. soc->htt_handle = htt_soc_attach(soc, ctrl_psoc, htc_handle,
  5660. soc->hal_soc, qdf_osdev);
  5661. if (!soc->htt_handle) {
  5662. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5663. FL("HTT attach failed"));
  5664. goto fail1;
  5665. }
  5666. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  5667. if (!soc->wlan_cfg_ctx) {
  5668. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5669. FL("wlan_cfg_soc_attach failed"));
  5670. goto fail2;
  5671. }
  5672. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx, rx_hash);
  5673. soc->cce_disable = false;
  5674. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  5675. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  5676. CDP_CFG_MAX_PEER_ID);
  5677. if (ret != -EINVAL) {
  5678. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  5679. }
  5680. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  5681. CDP_CFG_CCE_DISABLE);
  5682. if (ret)
  5683. soc->cce_disable = true;
  5684. }
  5685. qdf_spinlock_create(&soc->peer_ref_mutex);
  5686. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  5687. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  5688. /* fill the tx/rx cpu ring map*/
  5689. dp_soc_set_txrx_ring_map(soc);
  5690. qdf_spinlock_create(&soc->htt_stats.lock);
  5691. /* initialize work queue for stats processing */
  5692. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  5693. return (void *)soc;
  5694. fail2:
  5695. htt_soc_detach(soc->htt_handle);
  5696. fail1:
  5697. qdf_mem_free(soc);
  5698. fail0:
  5699. return NULL;
  5700. }
  5701. /*
  5702. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  5703. *
  5704. * @soc: handle to DP soc
  5705. * @mac_id: MAC id
  5706. *
  5707. * Return: Return pdev corresponding to MAC
  5708. */
  5709. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  5710. {
  5711. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  5712. return soc->pdev_list[mac_id];
  5713. /* Typically for MCL as there only 1 PDEV*/
  5714. return soc->pdev_list[0];
  5715. }
  5716. /*
  5717. * dp_get_ring_id_for_mac_id() - Return pdev for mac_id
  5718. *
  5719. * @soc: handle to DP soc
  5720. * @mac_id: MAC id
  5721. *
  5722. * Return: ring id
  5723. */
  5724. int dp_get_ring_id_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  5725. {
  5726. /*
  5727. * Single pdev using both MACs will operate on both MAC rings,
  5728. * which is the case for MCL.
  5729. */
  5730. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  5731. return mac_id;
  5732. /* For WIN each PDEV will operate one ring, so index is zero. */
  5733. return 0;
  5734. }
  5735. /*
  5736. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  5737. * @soc: DP SoC context
  5738. * @max_mac_rings: No of MAC rings
  5739. *
  5740. * Return: None
  5741. */
  5742. static
  5743. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  5744. int *max_mac_rings)
  5745. {
  5746. bool dbs_enable = false;
  5747. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  5748. dbs_enable = soc->cdp_soc.ol_ops->
  5749. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  5750. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  5751. }
  5752. /*
  5753. * dp_set_pktlog_wifi3() - attach txrx vdev
  5754. * @pdev: Datapath PDEV handle
  5755. * @event: which event's notifications are being subscribed to
  5756. * @enable: WDI event subscribe or not. (True or False)
  5757. *
  5758. * Return: Success, NULL on failure
  5759. */
  5760. #ifdef WDI_EVENT_ENABLE
  5761. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  5762. bool enable)
  5763. {
  5764. struct dp_soc *soc = pdev->soc;
  5765. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  5766. int max_mac_rings = wlan_cfg_get_num_mac_rings
  5767. (pdev->wlan_cfg_ctx);
  5768. uint8_t mac_id = 0;
  5769. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  5770. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  5771. FL("Max_mac_rings %d \n"),
  5772. max_mac_rings);
  5773. if (enable) {
  5774. switch (event) {
  5775. case WDI_EVENT_RX_DESC:
  5776. if (pdev->monitor_vdev) {
  5777. /* Nothing needs to be done if monitor mode is
  5778. * enabled
  5779. */
  5780. return 0;
  5781. }
  5782. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  5783. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  5784. htt_tlv_filter.mpdu_start = 1;
  5785. htt_tlv_filter.msdu_start = 1;
  5786. htt_tlv_filter.msdu_end = 1;
  5787. htt_tlv_filter.mpdu_end = 1;
  5788. htt_tlv_filter.packet_header = 1;
  5789. htt_tlv_filter.attention = 1;
  5790. htt_tlv_filter.ppdu_start = 1;
  5791. htt_tlv_filter.ppdu_end = 1;
  5792. htt_tlv_filter.ppdu_end_user_stats = 1;
  5793. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5794. htt_tlv_filter.ppdu_end_status_done = 1;
  5795. htt_tlv_filter.enable_fp = 1;
  5796. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5797. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5798. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5799. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5800. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5801. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5802. for (mac_id = 0; mac_id < max_mac_rings;
  5803. mac_id++) {
  5804. htt_h2t_rx_ring_cfg(soc->htt_handle,
  5805. pdev->pdev_id + mac_id,
  5806. pdev->rxdma_mon_status_ring
  5807. .hal_srng,
  5808. RXDMA_MONITOR_STATUS,
  5809. RX_BUFFER_SIZE,
  5810. &htt_tlv_filter);
  5811. }
  5812. if (soc->reap_timer_init)
  5813. qdf_timer_mod(&soc->mon_reap_timer,
  5814. DP_INTR_POLL_TIMER_MS);
  5815. }
  5816. break;
  5817. case WDI_EVENT_LITE_RX:
  5818. if (pdev->monitor_vdev) {
  5819. /* Nothing needs to be done if monitor mode is
  5820. * enabled
  5821. */
  5822. return 0;
  5823. }
  5824. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  5825. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  5826. htt_tlv_filter.ppdu_start = 1;
  5827. htt_tlv_filter.ppdu_end = 1;
  5828. htt_tlv_filter.ppdu_end_user_stats = 1;
  5829. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5830. htt_tlv_filter.ppdu_end_status_done = 1;
  5831. htt_tlv_filter.mpdu_start = 1;
  5832. htt_tlv_filter.enable_fp = 1;
  5833. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5834. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5835. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5836. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5837. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5838. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5839. for (mac_id = 0; mac_id < max_mac_rings;
  5840. mac_id++) {
  5841. htt_h2t_rx_ring_cfg(soc->htt_handle,
  5842. pdev->pdev_id + mac_id,
  5843. pdev->rxdma_mon_status_ring
  5844. .hal_srng,
  5845. RXDMA_MONITOR_STATUS,
  5846. RX_BUFFER_SIZE_PKTLOG_LITE,
  5847. &htt_tlv_filter);
  5848. }
  5849. if (soc->reap_timer_init)
  5850. qdf_timer_mod(&soc->mon_reap_timer,
  5851. DP_INTR_POLL_TIMER_MS);
  5852. }
  5853. break;
  5854. case WDI_EVENT_LITE_T2H:
  5855. if (pdev->monitor_vdev) {
  5856. /* Nothing needs to be done if monitor mode is
  5857. * enabled
  5858. */
  5859. return 0;
  5860. }
  5861. /* To enable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  5862. * passing value 0xffff. Once these macros will define
  5863. * in htt header file will use proper macros
  5864. */
  5865. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  5866. dp_h2t_cfg_stats_msg_send(pdev, 0xffff,
  5867. pdev->pdev_id + mac_id);
  5868. }
  5869. break;
  5870. default:
  5871. /* Nothing needs to be done for other pktlog types */
  5872. break;
  5873. }
  5874. } else {
  5875. switch (event) {
  5876. case WDI_EVENT_RX_DESC:
  5877. case WDI_EVENT_LITE_RX:
  5878. if (pdev->monitor_vdev) {
  5879. /* Nothing needs to be done if monitor mode is
  5880. * enabled
  5881. */
  5882. return 0;
  5883. }
  5884. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  5885. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  5886. for (mac_id = 0; mac_id < max_mac_rings;
  5887. mac_id++) {
  5888. htt_h2t_rx_ring_cfg(soc->htt_handle,
  5889. pdev->pdev_id + mac_id,
  5890. pdev->rxdma_mon_status_ring
  5891. .hal_srng,
  5892. RXDMA_MONITOR_STATUS,
  5893. RX_BUFFER_SIZE,
  5894. &htt_tlv_filter);
  5895. }
  5896. if (soc->reap_timer_init)
  5897. qdf_timer_stop(&soc->mon_reap_timer);
  5898. }
  5899. break;
  5900. case WDI_EVENT_LITE_T2H:
  5901. if (pdev->monitor_vdev) {
  5902. /* Nothing needs to be done if monitor mode is
  5903. * enabled
  5904. */
  5905. return 0;
  5906. }
  5907. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  5908. * passing value 0. Once these macros will define in htt
  5909. * header file will use proper macros
  5910. */
  5911. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  5912. dp_h2t_cfg_stats_msg_send(pdev, 0,
  5913. pdev->pdev_id + mac_id);
  5914. }
  5915. break;
  5916. default:
  5917. /* Nothing needs to be done for other pktlog types */
  5918. break;
  5919. }
  5920. }
  5921. return 0;
  5922. }
  5923. #endif
  5924. #ifdef CONFIG_MCL
  5925. /*
  5926. * dp_service_mon_rings()- timer to reap monitor rings
  5927. * reqd as we are not getting ppdu end interrupts
  5928. * @arg: SoC Handle
  5929. *
  5930. * Return:
  5931. *
  5932. */
  5933. static void dp_service_mon_rings(void *arg)
  5934. {
  5935. struct dp_soc *soc = (struct dp_soc *) arg;
  5936. int ring = 0, work_done;
  5937. work_done = dp_mon_process(soc, ring, QCA_NAPI_BUDGET);
  5938. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  5939. FL("Reaped %d descs from Monitor rings"), work_done);
  5940. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  5941. }
  5942. #ifndef REMOVE_PKT_LOG
  5943. /**
  5944. * dp_pkt_log_init() - API to initialize packet log
  5945. * @ppdev: physical device handle
  5946. * @scn: HIF context
  5947. *
  5948. * Return: none
  5949. */
  5950. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  5951. {
  5952. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  5953. if (handle->pkt_log_init) {
  5954. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5955. "%s: Packet log not initialized", __func__);
  5956. return;
  5957. }
  5958. pktlog_sethandle(&handle->pl_dev, scn);
  5959. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  5960. if (pktlogmod_init(scn)) {
  5961. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5962. "%s: pktlogmod_init failed", __func__);
  5963. handle->pkt_log_init = false;
  5964. } else {
  5965. handle->pkt_log_init = true;
  5966. }
  5967. }
  5968. /**
  5969. * dp_pkt_log_con_service() - connect packet log service
  5970. * @ppdev: physical device handle
  5971. * @scn: device context
  5972. *
  5973. * Return: none
  5974. */
  5975. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  5976. {
  5977. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  5978. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  5979. pktlog_htc_attach();
  5980. }
  5981. /**
  5982. * dp_pktlogmod_exit() - API to cleanup pktlog info
  5983. * @handle: Pdev handle
  5984. *
  5985. * Return: none
  5986. */
  5987. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  5988. {
  5989. void *scn = (void *)handle->soc->hif_handle;
  5990. if (!scn) {
  5991. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5992. "%s: Invalid hif(scn) handle", __func__);
  5993. return;
  5994. }
  5995. pktlogmod_exit(scn);
  5996. handle->pkt_log_init = false;
  5997. }
  5998. #endif
  5999. #else
  6000. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  6001. #endif