dp_rings_main.c 140 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include <wlan_ipa_obj_mgmt_api.h>
  20. #include <qdf_types.h>
  21. #include <qdf_lock.h>
  22. #include <qdf_net_types.h>
  23. #include <qdf_lro.h>
  24. #include <qdf_module.h>
  25. #include <hal_hw_headers.h>
  26. #include <hal_api.h>
  27. #include <hif.h>
  28. #include <htt.h>
  29. #include <wdi_event.h>
  30. #include <queue.h>
  31. #include "dp_types.h"
  32. #include "dp_rings.h"
  33. #include "dp_internal.h"
  34. #include "dp_tx.h"
  35. #include "dp_tx_desc.h"
  36. #include "dp_rx.h"
  37. #ifdef DP_RATETABLE_SUPPORT
  38. #include "dp_ratetable.h"
  39. #endif
  40. #include <cdp_txrx_handle.h>
  41. #include <wlan_cfg.h>
  42. #include <wlan_utility.h>
  43. #include "cdp_txrx_cmn_struct.h"
  44. #include "cdp_txrx_stats_struct.h"
  45. #include "cdp_txrx_cmn_reg.h"
  46. #include <qdf_util.h>
  47. #include "dp_peer.h"
  48. #include "htt_stats.h"
  49. #include "dp_htt.h"
  50. #include "htt_ppdu_stats.h"
  51. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  52. #include "cfg_ucfg_api.h"
  53. #include <wlan_module_ids.h>
  54. #ifdef WIFI_MONITOR_SUPPORT
  55. #include <dp_mon.h>
  56. #endif
  57. #ifdef WLAN_FEATURE_STATS_EXT
  58. #define INIT_RX_HW_STATS_LOCK(_soc) \
  59. qdf_spinlock_create(&(_soc)->rx_hw_stats_lock)
  60. #define DEINIT_RX_HW_STATS_LOCK(_soc) \
  61. qdf_spinlock_destroy(&(_soc)->rx_hw_stats_lock)
  62. #else
  63. #define INIT_RX_HW_STATS_LOCK(_soc) /* no op */
  64. #define DEINIT_RX_HW_STATS_LOCK(_soc) /* no op */
  65. #endif
  66. #ifdef QCA_DP_ENABLE_TX_COMP_RING4
  67. #define TXCOMP_RING4_NUM 3
  68. #else
  69. #define TXCOMP_RING4_NUM WBM2SW_TXCOMP_RING4_NUM
  70. #endif
  71. static QDF_STATUS dp_init_tx_ring_pair_by_index(struct dp_soc *soc,
  72. uint8_t index);
  73. static void dp_deinit_tx_pair_by_index(struct dp_soc *soc, int index);
  74. static void dp_free_tx_ring_pair_by_index(struct dp_soc *soc, uint8_t index);
  75. static QDF_STATUS dp_alloc_tx_ring_pair_by_index(struct dp_soc *soc,
  76. uint8_t index);
  77. /* default_dscp_tid_map - Default DSCP-TID mapping
  78. *
  79. * DSCP TID
  80. * 000000 0
  81. * 001000 1
  82. * 010000 2
  83. * 011000 3
  84. * 100000 4
  85. * 101000 5
  86. * 110000 6
  87. * 111000 7
  88. */
  89. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  90. 0, 0, 0, 0, 0, 0, 0, 0,
  91. 1, 1, 1, 1, 1, 1, 1, 1,
  92. 2, 2, 2, 2, 2, 2, 2, 2,
  93. 3, 3, 3, 3, 3, 3, 3, 3,
  94. 4, 4, 4, 4, 4, 4, 4, 4,
  95. 5, 5, 5, 5, 5, 5, 5, 5,
  96. 6, 6, 6, 6, 6, 6, 6, 6,
  97. 7, 7, 7, 7, 7, 7, 7, 7,
  98. };
  99. /* default_pcp_tid_map - Default PCP-TID mapping
  100. *
  101. * PCP TID
  102. * 000 0
  103. * 001 1
  104. * 010 2
  105. * 011 3
  106. * 100 4
  107. * 101 5
  108. * 110 6
  109. * 111 7
  110. */
  111. static uint8_t default_pcp_tid_map[PCP_TID_MAP_MAX] = {
  112. 0, 1, 2, 3, 4, 5, 6, 7,
  113. };
  114. uint8_t
  115. dp_cpu_ring_map[DP_NSS_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS_MAX] = {
  116. {0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2},
  117. {0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1},
  118. {0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0},
  119. {0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2},
  120. {0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3},
  121. #ifdef WLAN_TX_PKT_CAPTURE_ENH
  122. {0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1}
  123. #endif
  124. };
  125. qdf_export_symbol(dp_cpu_ring_map);
  126. /**
  127. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  128. * @soc: DP soc handle
  129. * @ring_type: ring type
  130. * @ring_num: ring_num
  131. *
  132. * Return: 0 if the ring is not offloaded, non-0 if it is offloaded
  133. */
  134. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc,
  135. enum hal_ring_type ring_type,
  136. int ring_num)
  137. {
  138. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  139. uint8_t status = 0;
  140. switch (ring_type) {
  141. case WBM2SW_RELEASE:
  142. case REO_DST:
  143. case RXDMA_BUF:
  144. case REO_EXCEPTION:
  145. status = ((nss_config) & (1 << ring_num));
  146. break;
  147. default:
  148. break;
  149. }
  150. return status;
  151. }
  152. /* MCL specific functions */
  153. #if defined(DP_CON_MON)
  154. #ifdef DP_CON_MON_MSI_ENABLED
  155. /**
  156. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  157. * @soc: pointer to dp_soc handle
  158. * @intr_ctx_num: interrupt context number for which mon mask is needed
  159. *
  160. * For MCL, monitor mode rings are being processed in timer contexts (polled).
  161. * This function is returning 0, since in interrupt mode(softirq based RX),
  162. * we donot want to process monitor mode rings in a softirq.
  163. *
  164. * So, in case packet log is enabled for SAP/STA/P2P modes,
  165. * regular interrupt processing will not process monitor mode rings. It would be
  166. * done in a separate timer context.
  167. *
  168. * Return: 0
  169. */
  170. static inline uint32_t
  171. dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  172. {
  173. return wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  174. }
  175. #else
  176. /**
  177. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  178. * @soc: pointer to dp_soc handle
  179. * @intr_ctx_num: interrupt context number for which mon mask is needed
  180. *
  181. * For MCL, monitor mode rings are being processed in timer contexts (polled).
  182. * This function is returning 0, since in interrupt mode(softirq based RX),
  183. * we donot want to process monitor mode rings in a softirq.
  184. *
  185. * So, in case packet log is enabled for SAP/STA/P2P modes,
  186. * regular interrupt processing will not process monitor mode rings. It would be
  187. * done in a separate timer context.
  188. *
  189. * Return: 0
  190. */
  191. static inline uint32_t
  192. dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  193. {
  194. return 0;
  195. }
  196. #endif
  197. #else
  198. /**
  199. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  200. * @soc: pointer to dp_soc handle
  201. * @intr_ctx_num: interrupt context number for which mon mask is needed
  202. *
  203. * Return: mon mask value
  204. */
  205. static inline
  206. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc,
  207. int intr_ctx_num)
  208. {
  209. return wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  210. }
  211. void dp_soc_reset_mon_intr_mask(struct dp_soc *soc)
  212. {
  213. int i;
  214. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  215. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  216. soc->intr_ctx[i].host2rxdma_mon_ring_mask = 0;
  217. }
  218. }
  219. qdf_export_symbol(dp_soc_reset_mon_intr_mask);
  220. void dp_service_lmac_rings(void *arg)
  221. {
  222. struct dp_soc *soc = (struct dp_soc *)arg;
  223. int ring = 0, i;
  224. struct dp_pdev *pdev = NULL;
  225. union dp_rx_desc_list_elem_t *desc_list = NULL;
  226. union dp_rx_desc_list_elem_t *tail = NULL;
  227. /* Process LMAC interrupts */
  228. for (ring = 0 ; ring < MAX_NUM_LMAC_HW; ring++) {
  229. int mac_for_pdev = ring;
  230. struct dp_srng *rx_refill_buf_ring;
  231. pdev = dp_get_pdev_for_lmac_id(soc, mac_for_pdev);
  232. if (!pdev)
  233. continue;
  234. rx_refill_buf_ring = &soc->rx_refill_buf_ring[mac_for_pdev];
  235. dp_monitor_process(soc, NULL, mac_for_pdev,
  236. QCA_NAPI_BUDGET);
  237. for (i = 0;
  238. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  239. dp_rxdma_err_process(&soc->intr_ctx[i], soc,
  240. mac_for_pdev,
  241. QCA_NAPI_BUDGET);
  242. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF,
  243. mac_for_pdev))
  244. dp_rx_buffers_replenish(soc, mac_for_pdev,
  245. rx_refill_buf_ring,
  246. &soc->rx_desc_buf[mac_for_pdev],
  247. 0, &desc_list, &tail, false);
  248. }
  249. qdf_timer_mod(&soc->lmac_reap_timer, DP_INTR_POLL_TIMER_MS);
  250. }
  251. #endif
  252. /**
  253. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  254. * @ring_num: ring num of the ring being queried
  255. * @grp_mask: the grp_mask array for the ring type in question.
  256. *
  257. * The grp_mask array is indexed by group number and the bit fields correspond
  258. * to ring numbers. We are finding which interrupt group a ring belongs to.
  259. *
  260. * Return: the index in the grp_mask array with the ring number.
  261. * -QDF_STATUS_E_NOENT if no entry is found
  262. */
  263. static int dp_srng_find_ring_in_mask(int ring_num, uint8_t *grp_mask)
  264. {
  265. int ext_group_num;
  266. uint8_t mask = 1 << ring_num;
  267. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  268. ext_group_num++) {
  269. if (mask & grp_mask[ext_group_num])
  270. return ext_group_num;
  271. }
  272. return -QDF_STATUS_E_NOENT;
  273. }
  274. /**
  275. * dp_is_msi_group_number_invalid() - check msi_group_number valid or not
  276. * @soc: dp_soc
  277. * @msi_group_number: MSI group number.
  278. * @msi_data_count: MSI data count.
  279. *
  280. * Return: true if msi_group_number is invalid.
  281. */
  282. static bool dp_is_msi_group_number_invalid(struct dp_soc *soc,
  283. int msi_group_number,
  284. int msi_data_count)
  285. {
  286. if (soc && soc->osdev && soc->osdev->dev &&
  287. pld_is_one_msi(soc->osdev->dev))
  288. return false;
  289. return msi_group_number > msi_data_count;
  290. }
  291. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  292. /**
  293. * dp_is_reo_ring_num_in_nf_grp1() - Check if the current reo ring is part of
  294. * rx_near_full_grp1 mask
  295. * @soc: Datapath SoC Handle
  296. * @ring_num: REO ring number
  297. *
  298. * Return: 1 if the ring_num belongs to reo_nf_grp1,
  299. * 0, otherwise.
  300. */
  301. static inline int
  302. dp_is_reo_ring_num_in_nf_grp1(struct dp_soc *soc, int ring_num)
  303. {
  304. return (WLAN_CFG_RX_NEAR_FULL_IRQ_MASK_1 & (1 << ring_num));
  305. }
  306. /**
  307. * dp_is_reo_ring_num_in_nf_grp2() - Check if the current reo ring is part of
  308. * rx_near_full_grp2 mask
  309. * @soc: Datapath SoC Handle
  310. * @ring_num: REO ring number
  311. *
  312. * Return: 1 if the ring_num belongs to reo_nf_grp2,
  313. * 0, otherwise.
  314. */
  315. static inline int
  316. dp_is_reo_ring_num_in_nf_grp2(struct dp_soc *soc, int ring_num)
  317. {
  318. return (WLAN_CFG_RX_NEAR_FULL_IRQ_MASK_2 & (1 << ring_num));
  319. }
  320. /**
  321. * dp_srng_get_near_full_irq_mask() - Get near-full irq mask for a particular
  322. * ring type and number
  323. * @soc: Datapath SoC handle
  324. * @ring_type: SRNG type
  325. * @ring_num: ring num
  326. *
  327. * Return: near-full irq mask pointer
  328. */
  329. static inline
  330. uint8_t *dp_srng_get_near_full_irq_mask(struct dp_soc *soc,
  331. enum hal_ring_type ring_type,
  332. int ring_num)
  333. {
  334. struct wlan_cfg_dp_soc_ctxt *cfg_ctx = soc->wlan_cfg_ctx;
  335. uint8_t wbm2_sw_rx_rel_ring_id;
  336. uint8_t *nf_irq_mask = NULL;
  337. switch (ring_type) {
  338. case WBM2SW_RELEASE:
  339. wbm2_sw_rx_rel_ring_id =
  340. wlan_cfg_get_rx_rel_ring_id(cfg_ctx);
  341. if (ring_num != wbm2_sw_rx_rel_ring_id) {
  342. nf_irq_mask = &soc->wlan_cfg_ctx->
  343. int_tx_ring_near_full_irq_mask[0];
  344. }
  345. break;
  346. case REO_DST:
  347. if (dp_is_reo_ring_num_in_nf_grp1(soc, ring_num))
  348. nf_irq_mask =
  349. &soc->wlan_cfg_ctx->int_rx_ring_near_full_irq_1_mask[0];
  350. else if (dp_is_reo_ring_num_in_nf_grp2(soc, ring_num))
  351. nf_irq_mask =
  352. &soc->wlan_cfg_ctx->int_rx_ring_near_full_irq_2_mask[0];
  353. else
  354. qdf_assert(0);
  355. break;
  356. default:
  357. break;
  358. }
  359. return nf_irq_mask;
  360. }
  361. /**
  362. * dp_srng_set_msi2_ring_params() - Set the msi2 addr/data in the ring params
  363. * @soc: Datapath SoC handle
  364. * @ring_params: srng params handle
  365. * @msi2_addr: MSI2 addr to be set for the SRNG
  366. * @msi2_data: MSI2 data to be set for the SRNG
  367. *
  368. * Return: None
  369. */
  370. static inline
  371. void dp_srng_set_msi2_ring_params(struct dp_soc *soc,
  372. struct hal_srng_params *ring_params,
  373. qdf_dma_addr_t msi2_addr,
  374. uint32_t msi2_data)
  375. {
  376. ring_params->msi2_addr = msi2_addr;
  377. ring_params->msi2_data = msi2_data;
  378. }
  379. /**
  380. * dp_srng_msi2_setup() - Setup MSI2 details for near full IRQ of an SRNG
  381. * @soc: Datapath SoC handle
  382. * @ring_params: ring_params for SRNG
  383. * @ring_type: SENG type
  384. * @ring_num: ring number for the SRNG
  385. * @nf_msi_grp_num: near full msi group number
  386. *
  387. * Return: None
  388. */
  389. static inline void
  390. dp_srng_msi2_setup(struct dp_soc *soc,
  391. struct hal_srng_params *ring_params,
  392. int ring_type, int ring_num, int nf_msi_grp_num)
  393. {
  394. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  395. int msi_data_count, ret;
  396. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  397. &msi_data_count, &msi_data_start,
  398. &msi_irq_start);
  399. if (ret)
  400. return;
  401. if (nf_msi_grp_num < 0) {
  402. dp_init_info("%pK: ring near full IRQ not part of an ext_group; ring_type: %d,ring_num %d",
  403. soc, ring_type, ring_num);
  404. ring_params->msi2_addr = 0;
  405. ring_params->msi2_data = 0;
  406. return;
  407. }
  408. if (dp_is_msi_group_number_invalid(soc, nf_msi_grp_num,
  409. msi_data_count)) {
  410. dp_init_warn("%pK: 2 msi_groups will share an msi for near full IRQ; msi_group_num %d",
  411. soc, nf_msi_grp_num);
  412. QDF_ASSERT(0);
  413. }
  414. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  415. ring_params->nf_irq_support = 1;
  416. ring_params->msi2_addr = addr_low;
  417. ring_params->msi2_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  418. ring_params->msi2_data = (nf_msi_grp_num % msi_data_count)
  419. + msi_data_start;
  420. ring_params->flags |= HAL_SRNG_MSI_INTR;
  421. }
  422. /* Percentage of ring entries considered as nearly full */
  423. #define DP_NF_HIGH_THRESH_PERCENTAGE 75
  424. /* Percentage of ring entries considered as critically full */
  425. #define DP_NF_CRIT_THRESH_PERCENTAGE 90
  426. /* Percentage of ring entries considered as safe threshold */
  427. #define DP_NF_SAFE_THRESH_PERCENTAGE 50
  428. /**
  429. * dp_srng_configure_nf_interrupt_thresholds() - Configure the thresholds for
  430. * near full irq
  431. * @soc: Datapath SoC handle
  432. * @ring_params: ring params for SRNG
  433. * @ring_type: ring type
  434. */
  435. static inline void
  436. dp_srng_configure_nf_interrupt_thresholds(struct dp_soc *soc,
  437. struct hal_srng_params *ring_params,
  438. int ring_type)
  439. {
  440. if (ring_params->nf_irq_support) {
  441. ring_params->high_thresh = (ring_params->num_entries *
  442. DP_NF_HIGH_THRESH_PERCENTAGE) / 100;
  443. ring_params->crit_thresh = (ring_params->num_entries *
  444. DP_NF_CRIT_THRESH_PERCENTAGE) / 100;
  445. ring_params->safe_thresh = (ring_params->num_entries *
  446. DP_NF_SAFE_THRESH_PERCENTAGE) /100;
  447. }
  448. }
  449. /**
  450. * dp_srng_set_nf_thresholds() - Set the near full thresholds to srng data
  451. * structure from the ring params
  452. * @soc: Datapath SoC handle
  453. * @srng: SRNG handle
  454. * @ring_params: ring params for a SRNG
  455. *
  456. * Return: None
  457. */
  458. static inline void
  459. dp_srng_set_nf_thresholds(struct dp_soc *soc, struct dp_srng *srng,
  460. struct hal_srng_params *ring_params)
  461. {
  462. srng->crit_thresh = ring_params->crit_thresh;
  463. srng->safe_thresh = ring_params->safe_thresh;
  464. }
  465. #else
  466. static inline
  467. uint8_t *dp_srng_get_near_full_irq_mask(struct dp_soc *soc,
  468. enum hal_ring_type ring_type,
  469. int ring_num)
  470. {
  471. return NULL;
  472. }
  473. static inline
  474. void dp_srng_set_msi2_ring_params(struct dp_soc *soc,
  475. struct hal_srng_params *ring_params,
  476. qdf_dma_addr_t msi2_addr,
  477. uint32_t msi2_data)
  478. {
  479. }
  480. static inline void
  481. dp_srng_msi2_setup(struct dp_soc *soc,
  482. struct hal_srng_params *ring_params,
  483. int ring_type, int ring_num, int nf_msi_grp_num)
  484. {
  485. }
  486. static inline void
  487. dp_srng_configure_nf_interrupt_thresholds(struct dp_soc *soc,
  488. struct hal_srng_params *ring_params,
  489. int ring_type)
  490. {
  491. }
  492. static inline void
  493. dp_srng_set_nf_thresholds(struct dp_soc *soc, struct dp_srng *srng,
  494. struct hal_srng_params *ring_params)
  495. {
  496. }
  497. #endif
  498. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  499. enum hal_ring_type ring_type,
  500. int ring_num,
  501. int *reg_msi_grp_num,
  502. bool nf_irq_support,
  503. int *nf_msi_grp_num)
  504. {
  505. struct wlan_cfg_dp_soc_ctxt *cfg_ctx = soc->wlan_cfg_ctx;
  506. uint8_t *grp_mask, *nf_irq_mask = NULL;
  507. bool nf_irq_enabled = false;
  508. uint8_t wbm2_sw_rx_rel_ring_id;
  509. switch (ring_type) {
  510. case WBM2SW_RELEASE:
  511. wbm2_sw_rx_rel_ring_id =
  512. wlan_cfg_get_rx_rel_ring_id(cfg_ctx);
  513. if (ring_num == wbm2_sw_rx_rel_ring_id) {
  514. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  515. grp_mask = &cfg_ctx->int_rx_wbm_rel_ring_mask[0];
  516. ring_num = 0;
  517. } else if (ring_num == WBM2_SW_PPE_REL_RING_ID) {
  518. grp_mask = &cfg_ctx->int_ppeds_wbm_release_ring_mask[0];
  519. ring_num = 0;
  520. } else { /* dp_tx_comp_handler - soc->tx_comp_ring */
  521. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  522. nf_irq_mask = dp_srng_get_near_full_irq_mask(soc,
  523. ring_type,
  524. ring_num);
  525. if (nf_irq_mask)
  526. nf_irq_enabled = true;
  527. /*
  528. * Using ring 4 as 4th tx completion ring since ring 3
  529. * is Rx error ring
  530. */
  531. if (ring_num == WBM2SW_TXCOMP_RING4_NUM)
  532. ring_num = TXCOMP_RING4_NUM;
  533. }
  534. break;
  535. case REO_EXCEPTION:
  536. /* dp_rx_err_process - &soc->reo_exception_ring */
  537. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  538. break;
  539. case REO_DST:
  540. /* dp_rx_process - soc->reo_dest_ring */
  541. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  542. nf_irq_mask = dp_srng_get_near_full_irq_mask(soc, ring_type,
  543. ring_num);
  544. if (nf_irq_mask)
  545. nf_irq_enabled = true;
  546. break;
  547. case REO_STATUS:
  548. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  549. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  550. break;
  551. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  552. case RXDMA_MONITOR_STATUS:
  553. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  554. case RXDMA_MONITOR_DST:
  555. /* dp_mon_process */
  556. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  557. break;
  558. case TX_MONITOR_DST:
  559. /* dp_tx_mon_process */
  560. grp_mask = &soc->wlan_cfg_ctx->int_tx_mon_ring_mask[0];
  561. break;
  562. case RXDMA_DST:
  563. /* dp_rxdma_err_process */
  564. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  565. break;
  566. case RXDMA_BUF:
  567. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  568. break;
  569. case RXDMA_MONITOR_BUF:
  570. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_mon_ring_mask[0];
  571. break;
  572. case TX_MONITOR_BUF:
  573. grp_mask = &soc->wlan_cfg_ctx->int_host2txmon_ring_mask[0];
  574. break;
  575. case REO2PPE:
  576. grp_mask = &soc->wlan_cfg_ctx->int_reo2ppe_ring_mask[0];
  577. break;
  578. case PPE2TCL:
  579. grp_mask = &soc->wlan_cfg_ctx->int_ppe2tcl_ring_mask[0];
  580. break;
  581. case TCL_DATA:
  582. /* CMD_CREDIT_RING is used as command in 8074 and credit in 9000 */
  583. case TCL_CMD_CREDIT:
  584. case REO_CMD:
  585. case SW2WBM_RELEASE:
  586. case WBM_IDLE_LINK:
  587. /* normally empty SW_TO_HW rings */
  588. return -QDF_STATUS_E_NOENT;
  589. break;
  590. case TCL_STATUS:
  591. case REO_REINJECT:
  592. /* misc unused rings */
  593. return -QDF_STATUS_E_NOENT;
  594. break;
  595. case CE_SRC:
  596. case CE_DST:
  597. case CE_DST_STATUS:
  598. /* CE_rings - currently handled by hif */
  599. default:
  600. return -QDF_STATUS_E_NOENT;
  601. break;
  602. }
  603. *reg_msi_grp_num = dp_srng_find_ring_in_mask(ring_num, grp_mask);
  604. if (nf_irq_support && nf_irq_enabled) {
  605. *nf_msi_grp_num = dp_srng_find_ring_in_mask(ring_num,
  606. nf_irq_mask);
  607. }
  608. return QDF_STATUS_SUCCESS;
  609. }
  610. /**
  611. * dp_get_num_msi_available()- API to get number of MSIs available
  612. * @soc: DP soc Handle
  613. * @interrupt_mode: Mode of interrupts
  614. *
  615. * Return: Number of MSIs available or 0 in case of integrated
  616. */
  617. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  618. static int dp_get_num_msi_available(struct dp_soc *soc, int interrupt_mode)
  619. {
  620. return 0;
  621. }
  622. #else
  623. static int dp_get_num_msi_available(struct dp_soc *soc, int interrupt_mode)
  624. {
  625. int msi_data_count;
  626. int msi_data_start;
  627. int msi_irq_start;
  628. int ret;
  629. if (interrupt_mode == DP_INTR_INTEGRATED) {
  630. return 0;
  631. } else if (interrupt_mode == DP_INTR_MSI || interrupt_mode ==
  632. DP_INTR_POLL) {
  633. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  634. &msi_data_count,
  635. &msi_data_start,
  636. &msi_irq_start);
  637. if (ret) {
  638. qdf_err("Unable to get DP MSI assignment %d",
  639. interrupt_mode);
  640. return -EINVAL;
  641. }
  642. return msi_data_count;
  643. }
  644. qdf_err("Interrupt mode invalid %d", interrupt_mode);
  645. return -EINVAL;
  646. }
  647. #endif
  648. #if defined(IPA_OFFLOAD) && defined(IPA_WDI3_VLAN_SUPPORT)
  649. static void
  650. dp_ipa_vlan_srng_msi_setup(struct hal_srng_params *ring_params, int ring_type,
  651. int ring_num)
  652. {
  653. if (wlan_ipa_is_vlan_enabled()) {
  654. if ((ring_type == REO_DST) &&
  655. (ring_num == IPA_ALT_REO_DEST_RING_IDX)) {
  656. ring_params->msi_addr = 0;
  657. ring_params->msi_data = 0;
  658. ring_params->flags &= ~HAL_SRNG_MSI_INTR;
  659. }
  660. }
  661. }
  662. #else
  663. static inline void
  664. dp_ipa_vlan_srng_msi_setup(struct hal_srng_params *ring_params, int ring_type,
  665. int ring_num)
  666. {
  667. }
  668. #endif
  669. static void dp_srng_msi_setup(struct dp_soc *soc, struct dp_srng *srng,
  670. struct hal_srng_params *ring_params,
  671. int ring_type, int ring_num)
  672. {
  673. int reg_msi_grp_num;
  674. /*
  675. * nf_msi_grp_num needs to be initialized with negative value,
  676. * to avoid configuring near-full msi for WBM2SW3 ring
  677. */
  678. int nf_msi_grp_num = -1;
  679. int msi_data_count;
  680. int ret;
  681. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  682. bool nf_irq_support;
  683. int vector;
  684. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  685. &msi_data_count, &msi_data_start,
  686. &msi_irq_start);
  687. if (ret)
  688. return;
  689. nf_irq_support = hal_srng_is_near_full_irq_supported(soc->hal_soc,
  690. ring_type,
  691. ring_num);
  692. ret = dp_srng_calculate_msi_group(soc, ring_type, ring_num,
  693. &reg_msi_grp_num,
  694. nf_irq_support,
  695. &nf_msi_grp_num);
  696. if (ret < 0) {
  697. dp_init_info("%pK: ring not part of an ext_group; ring_type: %d,ring_num %d",
  698. soc, ring_type, ring_num);
  699. ring_params->msi_addr = 0;
  700. ring_params->msi_data = 0;
  701. dp_srng_set_msi2_ring_params(soc, ring_params, 0, 0);
  702. return;
  703. }
  704. if (reg_msi_grp_num < 0) {
  705. dp_init_info("%pK: ring not part of an ext_group; ring_type: %d,ring_num %d",
  706. soc, ring_type, ring_num);
  707. ring_params->msi_addr = 0;
  708. ring_params->msi_data = 0;
  709. goto configure_msi2;
  710. }
  711. if (dp_is_msi_group_number_invalid(soc, reg_msi_grp_num,
  712. msi_data_count)) {
  713. dp_init_warn("%pK: 2 msi_groups will share an msi; msi_group_num %d",
  714. soc, reg_msi_grp_num);
  715. QDF_ASSERT(0);
  716. }
  717. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  718. ring_params->msi_addr = addr_low;
  719. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  720. ring_params->msi_data = (reg_msi_grp_num % msi_data_count)
  721. + msi_data_start;
  722. ring_params->flags |= HAL_SRNG_MSI_INTR;
  723. dp_ipa_vlan_srng_msi_setup(ring_params, ring_type, ring_num);
  724. dp_debug("ring type %u ring_num %u msi->data %u msi_addr %llx",
  725. ring_type, ring_num, ring_params->msi_data,
  726. (uint64_t)ring_params->msi_addr);
  727. vector = msi_irq_start + (reg_msi_grp_num % msi_data_count);
  728. /*
  729. * During umac reset ppeds interrupts free is not called.
  730. * Avoid registering interrupts again.
  731. *
  732. */
  733. if (dp_check_umac_reset_in_progress(soc))
  734. goto configure_msi2;
  735. if (soc->arch_ops.dp_register_ppeds_interrupts)
  736. if (soc->arch_ops.dp_register_ppeds_interrupts(soc, srng,
  737. vector,
  738. ring_type,
  739. ring_num))
  740. return;
  741. configure_msi2:
  742. if (!nf_irq_support) {
  743. dp_srng_set_msi2_ring_params(soc, ring_params, 0, 0);
  744. return;
  745. }
  746. dp_srng_msi2_setup(soc, ring_params, ring_type, ring_num,
  747. nf_msi_grp_num);
  748. }
  749. /**
  750. * dp_srng_configure_pointer_update_thresholds() - Retrieve pointer
  751. * update threshold value from wlan_cfg_ctx
  752. * @soc: device handle
  753. * @ring_params: per ring specific parameters
  754. * @ring_type: Ring type
  755. * @ring_num: Ring number for a given ring type
  756. * @num_entries: number of entries to fill
  757. *
  758. * Fill the ring params with the pointer update threshold
  759. * configuration parameters available in wlan_cfg_ctx
  760. *
  761. * Return: None
  762. */
  763. static void
  764. dp_srng_configure_pointer_update_thresholds(
  765. struct dp_soc *soc,
  766. struct hal_srng_params *ring_params,
  767. int ring_type, int ring_num,
  768. int num_entries)
  769. {
  770. if (ring_type == REO_DST) {
  771. ring_params->pointer_timer_threshold =
  772. wlan_cfg_get_pointer_timer_threshold_rx(
  773. soc->wlan_cfg_ctx);
  774. ring_params->pointer_num_threshold =
  775. wlan_cfg_get_pointer_num_threshold_rx(
  776. soc->wlan_cfg_ctx);
  777. }
  778. }
  779. #ifdef WLAN_DP_PER_RING_TYPE_CONFIG
  780. /**
  781. * dp_srng_configure_interrupt_thresholds() - Retrieve interrupt
  782. * threshold values from the wlan_srng_cfg table for each ring type
  783. * @soc: device handle
  784. * @ring_params: per ring specific parameters
  785. * @ring_type: Ring type
  786. * @ring_num: Ring number for a given ring type
  787. * @num_entries: number of entries to fill
  788. *
  789. * Fill the ring params with the interrupt threshold
  790. * configuration parameters available in the per ring type wlan_srng_cfg
  791. * table.
  792. *
  793. * Return: None
  794. */
  795. static void
  796. dp_srng_configure_interrupt_thresholds(struct dp_soc *soc,
  797. struct hal_srng_params *ring_params,
  798. int ring_type, int ring_num,
  799. int num_entries)
  800. {
  801. uint8_t wbm2_sw_rx_rel_ring_id;
  802. wbm2_sw_rx_rel_ring_id = wlan_cfg_get_rx_rel_ring_id(soc->wlan_cfg_ctx);
  803. if (ring_type == REO_DST) {
  804. ring_params->intr_timer_thres_us =
  805. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  806. ring_params->intr_batch_cntr_thres_entries =
  807. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  808. } else if (ring_type == WBM2SW_RELEASE &&
  809. (ring_num == wbm2_sw_rx_rel_ring_id)) {
  810. ring_params->intr_timer_thres_us =
  811. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  812. ring_params->intr_batch_cntr_thres_entries =
  813. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  814. } else {
  815. ring_params->intr_timer_thres_us =
  816. soc->wlan_srng_cfg[ring_type].timer_threshold;
  817. ring_params->intr_batch_cntr_thres_entries =
  818. soc->wlan_srng_cfg[ring_type].batch_count_threshold;
  819. }
  820. ring_params->low_threshold =
  821. soc->wlan_srng_cfg[ring_type].low_threshold;
  822. if (ring_params->low_threshold)
  823. ring_params->flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  824. dp_srng_configure_nf_interrupt_thresholds(soc, ring_params, ring_type);
  825. }
  826. #else
  827. static void
  828. dp_srng_configure_interrupt_thresholds(struct dp_soc *soc,
  829. struct hal_srng_params *ring_params,
  830. int ring_type, int ring_num,
  831. int num_entries)
  832. {
  833. uint8_t wbm2_sw_rx_rel_ring_id;
  834. bool rx_refill_lt_disable;
  835. wbm2_sw_rx_rel_ring_id = wlan_cfg_get_rx_rel_ring_id(soc->wlan_cfg_ctx);
  836. if (ring_type == REO_DST || ring_type == REO2PPE) {
  837. ring_params->intr_timer_thres_us =
  838. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  839. ring_params->intr_batch_cntr_thres_entries =
  840. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  841. } else if (ring_type == WBM2SW_RELEASE &&
  842. (ring_num < wbm2_sw_rx_rel_ring_id ||
  843. ring_num == WBM2SW_TXCOMP_RING4_NUM ||
  844. ring_num == WBM2_SW_PPE_REL_RING_ID)) {
  845. ring_params->intr_timer_thres_us =
  846. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  847. ring_params->intr_batch_cntr_thres_entries =
  848. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  849. } else if (ring_type == RXDMA_BUF) {
  850. rx_refill_lt_disable =
  851. wlan_cfg_get_dp_soc_rxdma_refill_lt_disable
  852. (soc->wlan_cfg_ctx);
  853. ring_params->intr_timer_thres_us =
  854. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  855. if (!rx_refill_lt_disable) {
  856. ring_params->low_threshold = num_entries >> 3;
  857. ring_params->flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  858. ring_params->intr_batch_cntr_thres_entries = 0;
  859. }
  860. } else {
  861. ring_params->intr_timer_thres_us =
  862. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  863. ring_params->intr_batch_cntr_thres_entries =
  864. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  865. }
  866. /* These rings donot require interrupt to host. Make them zero */
  867. switch (ring_type) {
  868. case REO_REINJECT:
  869. case REO_CMD:
  870. case TCL_DATA:
  871. case TCL_CMD_CREDIT:
  872. case TCL_STATUS:
  873. case WBM_IDLE_LINK:
  874. case SW2WBM_RELEASE:
  875. case SW2RXDMA_NEW:
  876. ring_params->intr_timer_thres_us = 0;
  877. ring_params->intr_batch_cntr_thres_entries = 0;
  878. break;
  879. case PPE2TCL:
  880. ring_params->intr_timer_thres_us =
  881. wlan_cfg_get_int_timer_threshold_ppe2tcl(soc->wlan_cfg_ctx);
  882. ring_params->intr_batch_cntr_thres_entries =
  883. wlan_cfg_get_int_batch_threshold_ppe2tcl(soc->wlan_cfg_ctx);
  884. break;
  885. case RXDMA_MONITOR_DST:
  886. ring_params->intr_timer_thres_us =
  887. wlan_cfg_get_int_timer_threshold_mon_dest(soc->wlan_cfg_ctx);
  888. ring_params->intr_batch_cntr_thres_entries =
  889. wlan_cfg_get_int_batch_threshold_mon_dest(soc->wlan_cfg_ctx);
  890. break;
  891. }
  892. /* Enable low threshold interrupts for rx buffer rings (regular and
  893. * monitor buffer rings.
  894. * TODO: See if this is required for any other ring
  895. */
  896. if ((ring_type == RXDMA_MONITOR_BUF) ||
  897. (ring_type == RXDMA_MONITOR_STATUS ||
  898. (ring_type == TX_MONITOR_BUF))) {
  899. /* TODO: Setting low threshold to 1/8th of ring size
  900. * see if this needs to be configurable
  901. */
  902. ring_params->low_threshold = num_entries >> 3;
  903. ring_params->intr_timer_thres_us =
  904. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  905. ring_params->flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  906. ring_params->intr_batch_cntr_thres_entries = 0;
  907. }
  908. /* During initialisation monitor rings are only filled with
  909. * MON_BUF_MIN_ENTRIES entries. So low threshold needs to be set to
  910. * a value less than that. Low threshold value is reconfigured again
  911. * to 1/8th of the ring size when monitor vap is created.
  912. */
  913. if (ring_type == RXDMA_MONITOR_BUF)
  914. ring_params->low_threshold = MON_BUF_MIN_ENTRIES >> 1;
  915. /* In case of PCI chipsets, we dont have PPDU end interrupts,
  916. * so MONITOR STATUS ring is reaped by receiving MSI from srng.
  917. * Keep batch threshold as 8 so that interrupt is received for
  918. * every 4 packets in MONITOR_STATUS ring
  919. */
  920. if ((ring_type == RXDMA_MONITOR_STATUS) &&
  921. (soc->intr_mode == DP_INTR_MSI))
  922. ring_params->intr_batch_cntr_thres_entries = 4;
  923. }
  924. #endif
  925. #ifdef DISABLE_MON_RING_MSI_CFG
  926. /**
  927. * dp_skip_msi_cfg() - Check if msi cfg has to be skipped for ring_type
  928. * @soc: DP SoC context
  929. * @ring_type: sring type
  930. *
  931. * Return: True if msi cfg should be skipped for srng type else false
  932. */
  933. static inline bool dp_skip_msi_cfg(struct dp_soc *soc, int ring_type)
  934. {
  935. if (ring_type == RXDMA_MONITOR_STATUS)
  936. return true;
  937. return false;
  938. }
  939. #else
  940. #ifdef DP_CON_MON_MSI_ENABLED
  941. static inline bool dp_skip_msi_cfg(struct dp_soc *soc, int ring_type)
  942. {
  943. if (soc->cdp_soc.ol_ops->get_con_mode &&
  944. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_MONITOR_MODE) {
  945. if (ring_type == REO_DST || ring_type == RXDMA_DST)
  946. return true;
  947. } else if (ring_type == RXDMA_MONITOR_STATUS &&
  948. !wlan_cfg_get_local_pkt_capture(soc->wlan_cfg_ctx)) {
  949. return true;
  950. }
  951. return false;
  952. }
  953. #else
  954. static inline bool dp_skip_msi_cfg(struct dp_soc *soc, int ring_type)
  955. {
  956. return false;
  957. }
  958. #endif /* DP_CON_MON_MSI_ENABLED */
  959. #endif /* DISABLE_MON_RING_MSI_CFG */
  960. QDF_STATUS dp_srng_init_idx(struct dp_soc *soc, struct dp_srng *srng,
  961. int ring_type, int ring_num, int mac_id,
  962. uint32_t idx)
  963. {
  964. bool idle_check;
  965. hal_soc_handle_t hal_soc = soc->hal_soc;
  966. struct hal_srng_params ring_params;
  967. if (srng->hal_srng) {
  968. dp_init_err("%pK: Ring type: %d, num:%d is already initialized",
  969. soc, ring_type, ring_num);
  970. return QDF_STATUS_SUCCESS;
  971. }
  972. /* memset the srng ring to zero */
  973. qdf_mem_zero(srng->base_vaddr_unaligned, srng->alloc_size);
  974. qdf_mem_zero(&ring_params, sizeof(struct hal_srng_params));
  975. ring_params.ring_base_paddr = srng->base_paddr_aligned;
  976. ring_params.ring_base_vaddr = srng->base_vaddr_aligned;
  977. ring_params.num_entries = srng->num_entries;
  978. dp_info("Ring type: %d, num:%d vaddr %pK paddr %pK entries %u",
  979. ring_type, ring_num,
  980. (void *)ring_params.ring_base_vaddr,
  981. (void *)ring_params.ring_base_paddr,
  982. ring_params.num_entries);
  983. if (soc->intr_mode == DP_INTR_MSI && !dp_skip_msi_cfg(soc, ring_type)) {
  984. dp_srng_msi_setup(soc, srng, &ring_params, ring_type, ring_num);
  985. dp_verbose_debug("Using MSI for ring_type: %d, ring_num %d",
  986. ring_type, ring_num);
  987. } else {
  988. ring_params.msi_data = 0;
  989. ring_params.msi_addr = 0;
  990. dp_srng_set_msi2_ring_params(soc, &ring_params, 0, 0);
  991. dp_verbose_debug("Skipping MSI for ring_type: %d, ring_num %d",
  992. ring_type, ring_num);
  993. }
  994. dp_srng_configure_interrupt_thresholds(soc, &ring_params,
  995. ring_type, ring_num,
  996. srng->num_entries);
  997. dp_srng_set_nf_thresholds(soc, srng, &ring_params);
  998. dp_srng_configure_pointer_update_thresholds(soc, &ring_params,
  999. ring_type, ring_num,
  1000. srng->num_entries);
  1001. if (srng->cached)
  1002. ring_params.flags |= HAL_SRNG_CACHED_DESC;
  1003. idle_check = dp_check_umac_reset_in_progress(soc);
  1004. srng->hal_srng = hal_srng_setup_idx(hal_soc, ring_type, ring_num,
  1005. mac_id, &ring_params, idle_check,
  1006. idx);
  1007. if (!srng->hal_srng) {
  1008. dp_srng_free(soc, srng);
  1009. return QDF_STATUS_E_FAILURE;
  1010. }
  1011. return QDF_STATUS_SUCCESS;
  1012. }
  1013. qdf_export_symbol(dp_srng_init_idx);
  1014. static int dp_process_rxdma_dst_ring(struct dp_soc *soc,
  1015. struct dp_intr *int_ctx,
  1016. int mac_for_pdev,
  1017. int total_budget)
  1018. {
  1019. uint32_t target_type;
  1020. target_type = hal_get_target_type(soc->hal_soc);
  1021. if (target_type == TARGET_TYPE_QCN9160)
  1022. return dp_monitor_process(soc, int_ctx,
  1023. mac_for_pdev, total_budget);
  1024. else
  1025. return dp_rxdma_err_process(int_ctx, soc, mac_for_pdev,
  1026. total_budget);
  1027. }
  1028. /**
  1029. * dp_process_lmac_rings() - Process LMAC rings
  1030. * @int_ctx: interrupt context
  1031. * @total_budget: budget of work which can be done
  1032. *
  1033. * Return: work done
  1034. */
  1035. static int dp_process_lmac_rings(struct dp_intr *int_ctx, int total_budget)
  1036. {
  1037. struct dp_intr_stats *intr_stats = &int_ctx->intr_stats;
  1038. struct dp_soc *soc = int_ctx->soc;
  1039. uint32_t remaining_quota = total_budget;
  1040. struct dp_pdev *pdev = NULL;
  1041. uint32_t work_done = 0;
  1042. int budget = total_budget;
  1043. int ring = 0;
  1044. bool rx_refill_lt_disable;
  1045. rx_refill_lt_disable =
  1046. wlan_cfg_get_dp_soc_rxdma_refill_lt_disable(soc->wlan_cfg_ctx);
  1047. /* Process LMAC interrupts */
  1048. for (ring = 0 ; ring < MAX_NUM_LMAC_HW; ring++) {
  1049. int mac_for_pdev = ring;
  1050. pdev = dp_get_pdev_for_lmac_id(soc, mac_for_pdev);
  1051. if (!pdev)
  1052. continue;
  1053. if (int_ctx->rx_mon_ring_mask & (1 << mac_for_pdev)) {
  1054. work_done = dp_monitor_process(soc, int_ctx,
  1055. mac_for_pdev,
  1056. remaining_quota);
  1057. if (work_done)
  1058. intr_stats->num_rx_mon_ring_masks++;
  1059. budget -= work_done;
  1060. if (budget <= 0)
  1061. goto budget_done;
  1062. remaining_quota = budget;
  1063. }
  1064. if (int_ctx->tx_mon_ring_mask & (1 << mac_for_pdev)) {
  1065. work_done = dp_tx_mon_process(soc, int_ctx,
  1066. mac_for_pdev,
  1067. remaining_quota);
  1068. if (work_done)
  1069. intr_stats->num_tx_mon_ring_masks++;
  1070. budget -= work_done;
  1071. if (budget <= 0)
  1072. goto budget_done;
  1073. remaining_quota = budget;
  1074. }
  1075. if (int_ctx->rxdma2host_ring_mask &
  1076. (1 << mac_for_pdev)) {
  1077. work_done = dp_process_rxdma_dst_ring(soc, int_ctx,
  1078. mac_for_pdev,
  1079. remaining_quota);
  1080. if (work_done)
  1081. intr_stats->num_rxdma2host_ring_masks++;
  1082. budget -= work_done;
  1083. if (budget <= 0)
  1084. goto budget_done;
  1085. remaining_quota = budget;
  1086. }
  1087. if (int_ctx->host2rxdma_ring_mask & (1 << mac_for_pdev)) {
  1088. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1089. union dp_rx_desc_list_elem_t *tail = NULL;
  1090. struct dp_srng *rx_refill_buf_ring;
  1091. struct rx_desc_pool *rx_desc_pool;
  1092. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  1093. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  1094. rx_refill_buf_ring =
  1095. &soc->rx_refill_buf_ring[mac_for_pdev];
  1096. else
  1097. rx_refill_buf_ring =
  1098. &soc->rx_refill_buf_ring[pdev->lmac_id];
  1099. intr_stats->num_host2rxdma_ring_masks++;
  1100. if (!rx_refill_lt_disable)
  1101. dp_rx_buffers_lt_replenish_simple(soc,
  1102. mac_for_pdev,
  1103. rx_refill_buf_ring,
  1104. rx_desc_pool,
  1105. 0,
  1106. &desc_list,
  1107. &tail);
  1108. }
  1109. }
  1110. if (int_ctx->host2rxdma_mon_ring_mask)
  1111. dp_rx_mon_buf_refill(int_ctx);
  1112. if (int_ctx->host2txmon_ring_mask)
  1113. dp_tx_mon_buf_refill(int_ctx);
  1114. budget_done:
  1115. return total_budget - budget;
  1116. }
  1117. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  1118. /**
  1119. * dp_service_near_full_srngs() - Bottom half handler to process the near
  1120. * full IRQ on a SRNG
  1121. * @dp_ctx: Datapath SoC handle
  1122. * @dp_budget: Number of SRNGs which can be processed in a single attempt
  1123. * without rescheduling
  1124. * @cpu: cpu id
  1125. *
  1126. * Return: remaining budget/quota for the soc device
  1127. */
  1128. static
  1129. uint32_t dp_service_near_full_srngs(void *dp_ctx, uint32_t dp_budget, int cpu)
  1130. {
  1131. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  1132. struct dp_soc *soc = int_ctx->soc;
  1133. /*
  1134. * dp_service_near_full_srngs arch ops should be initialized always
  1135. * if the NEAR FULL IRQ feature is enabled.
  1136. */
  1137. return soc->arch_ops.dp_service_near_full_srngs(soc, int_ctx,
  1138. dp_budget);
  1139. }
  1140. #endif
  1141. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1142. uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget, int cpu)
  1143. {
  1144. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  1145. struct dp_intr_stats *intr_stats = &int_ctx->intr_stats;
  1146. struct dp_soc *soc = int_ctx->soc;
  1147. int ring = 0;
  1148. int index;
  1149. uint32_t work_done = 0;
  1150. int budget = dp_budget;
  1151. uint32_t remaining_quota = dp_budget;
  1152. uint8_t tx_mask = 0;
  1153. uint8_t rx_mask = 0;
  1154. uint8_t rx_err_mask = 0;
  1155. uint8_t rx_wbm_rel_mask = 0;
  1156. uint8_t reo_status_mask = 0;
  1157. qdf_atomic_set_bit(cpu, &soc->service_rings_running);
  1158. tx_mask = int_ctx->tx_ring_mask;
  1159. rx_mask = int_ctx->rx_ring_mask;
  1160. rx_err_mask = int_ctx->rx_err_ring_mask;
  1161. rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  1162. reo_status_mask = int_ctx->reo_status_ring_mask;
  1163. dp_verbose_debug("tx %x rx %x rx_err %x rx_wbm_rel %x reo_status %x rx_mon_ring %x host2rxdma %x rxdma2host %x",
  1164. tx_mask, rx_mask, rx_err_mask, rx_wbm_rel_mask,
  1165. reo_status_mask,
  1166. int_ctx->rx_mon_ring_mask,
  1167. int_ctx->host2rxdma_ring_mask,
  1168. int_ctx->rxdma2host_ring_mask);
  1169. /* Process Tx completion interrupts first to return back buffers */
  1170. for (index = 0; index < soc->num_tx_comp_rings; index++) {
  1171. if (!(1 << wlan_cfg_get_wbm_ring_num_for_index(soc->wlan_cfg_ctx, index) & tx_mask))
  1172. continue;
  1173. work_done = dp_tx_comp_handler(int_ctx,
  1174. soc,
  1175. soc->tx_comp_ring[index].hal_srng,
  1176. index, remaining_quota);
  1177. if (work_done) {
  1178. intr_stats->num_tx_ring_masks[index]++;
  1179. dp_verbose_debug("tx mask 0x%x index %d, budget %d, work_done %d",
  1180. tx_mask, index, budget,
  1181. work_done);
  1182. }
  1183. budget -= work_done;
  1184. if (budget <= 0)
  1185. goto budget_done;
  1186. remaining_quota = budget;
  1187. }
  1188. /* Process REO Exception ring interrupt */
  1189. if (rx_err_mask) {
  1190. work_done = dp_rx_err_process(int_ctx, soc,
  1191. soc->reo_exception_ring.hal_srng,
  1192. remaining_quota);
  1193. if (work_done) {
  1194. intr_stats->num_rx_err_ring_masks++;
  1195. dp_verbose_debug("REO Exception Ring: work_done %d budget %d",
  1196. work_done, budget);
  1197. }
  1198. budget -= work_done;
  1199. if (budget <= 0) {
  1200. goto budget_done;
  1201. }
  1202. remaining_quota = budget;
  1203. }
  1204. /* Process Rx WBM release ring interrupt */
  1205. if (rx_wbm_rel_mask) {
  1206. work_done = dp_rx_wbm_err_process(int_ctx, soc,
  1207. soc->rx_rel_ring.hal_srng,
  1208. remaining_quota);
  1209. if (work_done) {
  1210. intr_stats->num_rx_wbm_rel_ring_masks++;
  1211. dp_verbose_debug("WBM Release Ring: work_done %d budget %d",
  1212. work_done, budget);
  1213. }
  1214. budget -= work_done;
  1215. if (budget <= 0) {
  1216. goto budget_done;
  1217. }
  1218. remaining_quota = budget;
  1219. }
  1220. /* Process Rx interrupts */
  1221. if (rx_mask) {
  1222. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  1223. if (!(rx_mask & (1 << ring)))
  1224. continue;
  1225. work_done = soc->arch_ops.dp_rx_process(int_ctx,
  1226. soc->reo_dest_ring[ring].hal_srng,
  1227. ring,
  1228. remaining_quota);
  1229. if (work_done) {
  1230. intr_stats->num_rx_ring_masks[ring]++;
  1231. dp_verbose_debug("rx mask 0x%x ring %d, work_done %d budget %d",
  1232. rx_mask, ring,
  1233. work_done, budget);
  1234. budget -= work_done;
  1235. if (budget <= 0)
  1236. goto budget_done;
  1237. remaining_quota = budget;
  1238. }
  1239. }
  1240. }
  1241. if (reo_status_mask) {
  1242. if (dp_reo_status_ring_handler(int_ctx, soc))
  1243. int_ctx->intr_stats.num_reo_status_ring_masks++;
  1244. }
  1245. if (qdf_unlikely(!dp_monitor_is_vdev_timer_running(soc))) {
  1246. work_done = dp_process_lmac_rings(int_ctx, remaining_quota);
  1247. if (work_done) {
  1248. budget -= work_done;
  1249. if (budget <= 0)
  1250. goto budget_done;
  1251. remaining_quota = budget;
  1252. }
  1253. }
  1254. qdf_lro_flush(int_ctx->lro_ctx);
  1255. intr_stats->num_masks++;
  1256. budget_done:
  1257. qdf_atomic_clear_bit(cpu, &soc->service_rings_running);
  1258. if (soc->notify_fw_callback)
  1259. soc->notify_fw_callback(soc);
  1260. return dp_budget - budget;
  1261. }
  1262. #else /* QCA_HOST_MODE_WIFI_DISABLED */
  1263. uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget, int cpu)
  1264. {
  1265. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  1266. struct dp_intr_stats *intr_stats = &int_ctx->intr_stats;
  1267. struct dp_soc *soc = int_ctx->soc;
  1268. uint32_t remaining_quota = dp_budget;
  1269. uint32_t work_done = 0;
  1270. int budget = dp_budget;
  1271. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  1272. if (reo_status_mask) {
  1273. if (dp_reo_status_ring_handler(int_ctx, soc))
  1274. int_ctx->intr_stats.num_reo_status_ring_masks++;
  1275. }
  1276. if (qdf_unlikely(!dp_monitor_is_vdev_timer_running(soc))) {
  1277. work_done = dp_process_lmac_rings(int_ctx, remaining_quota);
  1278. if (work_done) {
  1279. budget -= work_done;
  1280. if (budget <= 0)
  1281. goto budget_done;
  1282. remaining_quota = budget;
  1283. }
  1284. }
  1285. qdf_lro_flush(int_ctx->lro_ctx);
  1286. intr_stats->num_masks++;
  1287. budget_done:
  1288. return dp_budget - budget;
  1289. }
  1290. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1291. QDF_STATUS dp_soc_attach_poll(struct cdp_soc_t *txrx_soc)
  1292. {
  1293. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1294. int i;
  1295. int lmac_id = 0;
  1296. qdf_mem_set(&soc->mon_intr_id_lmac_map,
  1297. sizeof(soc->mon_intr_id_lmac_map), DP_MON_INVALID_LMAC_ID);
  1298. soc->intr_mode = DP_INTR_POLL;
  1299. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1300. soc->intr_ctx[i].dp_intr_id = i;
  1301. soc->intr_ctx[i].tx_ring_mask =
  1302. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1303. soc->intr_ctx[i].rx_ring_mask =
  1304. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1305. soc->intr_ctx[i].rx_mon_ring_mask =
  1306. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  1307. soc->intr_ctx[i].rx_err_ring_mask =
  1308. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1309. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  1310. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1311. soc->intr_ctx[i].reo_status_ring_mask =
  1312. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1313. soc->intr_ctx[i].rxdma2host_ring_mask =
  1314. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1315. soc->intr_ctx[i].soc = soc;
  1316. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1317. if (dp_is_mon_mask_valid(soc, &soc->intr_ctx[i])) {
  1318. hif_event_history_init(soc->hif_handle, i);
  1319. soc->mon_intr_id_lmac_map[lmac_id] = i;
  1320. lmac_id++;
  1321. }
  1322. }
  1323. qdf_timer_init(soc->osdev, &soc->int_timer,
  1324. dp_interrupt_timer, (void *)soc,
  1325. QDF_TIMER_TYPE_WAKE_APPS);
  1326. return QDF_STATUS_SUCCESS;
  1327. }
  1328. void dp_soc_set_interrupt_mode(struct dp_soc *soc)
  1329. {
  1330. uint32_t msi_base_data, msi_vector_start;
  1331. int msi_vector_count, ret;
  1332. soc->intr_mode = DP_INTR_INTEGRATED;
  1333. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  1334. (dp_is_monitor_mode_using_poll(soc) &&
  1335. soc->cdp_soc.ol_ops->get_con_mode &&
  1336. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_MONITOR_MODE)) {
  1337. soc->intr_mode = DP_INTR_POLL;
  1338. } else {
  1339. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  1340. &msi_vector_count,
  1341. &msi_base_data,
  1342. &msi_vector_start);
  1343. if (ret)
  1344. return;
  1345. soc->intr_mode = DP_INTR_MSI;
  1346. }
  1347. }
  1348. #ifdef QCA_SUPPORT_LEGACY_INTERRUPTS
  1349. /**
  1350. * dp_soc_interrupt_map_calculate_wifi3_pci_legacy() -
  1351. * Calculate interrupt map for legacy interrupts
  1352. * @soc: DP soc handle
  1353. * @intr_ctx_num: Interrupt context number
  1354. * @irq_id_map: IRQ map
  1355. * @num_irq_r: Number of interrupts assigned for this context
  1356. *
  1357. * Return: void
  1358. */
  1359. static void dp_soc_interrupt_map_calculate_wifi3_pci_legacy(struct dp_soc *soc,
  1360. int intr_ctx_num,
  1361. int *irq_id_map,
  1362. int *num_irq_r)
  1363. {
  1364. int j;
  1365. int num_irq = 0;
  1366. int tx_mask = wlan_cfg_get_tx_ring_mask(
  1367. soc->wlan_cfg_ctx, intr_ctx_num);
  1368. int rx_mask = wlan_cfg_get_rx_ring_mask(
  1369. soc->wlan_cfg_ctx, intr_ctx_num);
  1370. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  1371. soc->wlan_cfg_ctx, intr_ctx_num);
  1372. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1373. soc->wlan_cfg_ctx, intr_ctx_num);
  1374. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1375. soc->wlan_cfg_ctx, intr_ctx_num);
  1376. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1377. soc->wlan_cfg_ctx, intr_ctx_num);
  1378. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1379. soc->wlan_cfg_ctx, intr_ctx_num);
  1380. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  1381. soc->wlan_cfg_ctx, intr_ctx_num);
  1382. int host2rxdma_mon_ring_mask = wlan_cfg_get_host2rxdma_mon_ring_mask(
  1383. soc->wlan_cfg_ctx, intr_ctx_num);
  1384. int host2txmon_ring_mask = wlan_cfg_get_host2txmon_ring_mask(
  1385. soc->wlan_cfg_ctx, intr_ctx_num);
  1386. int txmon2host_mon_ring_mask = wlan_cfg_get_tx_mon_ring_mask(
  1387. soc->wlan_cfg_ctx, intr_ctx_num);
  1388. soc->intr_mode = DP_INTR_LEGACY_VIRTUAL_IRQ;
  1389. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  1390. if (tx_mask & (1 << j))
  1391. irq_id_map[num_irq++] = (wbm2sw0_release - j);
  1392. if (rx_mask & (1 << j))
  1393. irq_id_map[num_irq++] = (reo2sw1_intr - j);
  1394. if (rx_mon_mask & (1 << j))
  1395. irq_id_map[num_irq++] = (rxmon2sw_p0_dest0 - j);
  1396. if (rx_err_ring_mask & (1 << j))
  1397. irq_id_map[num_irq++] = (reo2sw0_intr - j);
  1398. if (rx_wbm_rel_ring_mask & (1 << j))
  1399. irq_id_map[num_irq++] = (wbm2sw5_release - j);
  1400. if (reo_status_ring_mask & (1 << j))
  1401. irq_id_map[num_irq++] = (reo_status - j);
  1402. if (rxdma2host_ring_mask & (1 << j))
  1403. irq_id_map[num_irq++] = (rxdma2sw_dst_ring0 - j);
  1404. if (host2rxdma_ring_mask & (1 << j))
  1405. irq_id_map[num_irq++] = (sw2rxdma_0 - j);
  1406. if (host2rxdma_mon_ring_mask & (1 << j))
  1407. irq_id_map[num_irq++] = (sw2rxmon_src_ring - j);
  1408. if (host2txmon_ring_mask & (1 << j))
  1409. irq_id_map[num_irq++] = sw2txmon_src_ring;
  1410. if (txmon2host_mon_ring_mask & (1 << j))
  1411. irq_id_map[num_irq++] = (txmon2sw_p0_dest0 - j);
  1412. }
  1413. *num_irq_r = num_irq;
  1414. }
  1415. #else
  1416. static void dp_soc_interrupt_map_calculate_wifi3_pci_legacy(struct dp_soc *soc,
  1417. int intr_ctx_num,
  1418. int *irq_id_map,
  1419. int *num_irq_r)
  1420. {
  1421. }
  1422. #endif
  1423. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  1424. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  1425. {
  1426. int j;
  1427. int num_irq = 0;
  1428. int tx_mask =
  1429. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1430. int rx_mask =
  1431. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1432. int rx_mon_mask =
  1433. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1434. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1435. soc->wlan_cfg_ctx, intr_ctx_num);
  1436. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1437. soc->wlan_cfg_ctx, intr_ctx_num);
  1438. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1439. soc->wlan_cfg_ctx, intr_ctx_num);
  1440. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1441. soc->wlan_cfg_ctx, intr_ctx_num);
  1442. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  1443. soc->wlan_cfg_ctx, intr_ctx_num);
  1444. int host2rxdma_mon_ring_mask = wlan_cfg_get_host2rxdma_mon_ring_mask(
  1445. soc->wlan_cfg_ctx, intr_ctx_num);
  1446. int host2txmon_ring_mask = wlan_cfg_get_host2txmon_ring_mask(
  1447. soc->wlan_cfg_ctx, intr_ctx_num);
  1448. int txmon2host_mon_ring_mask = wlan_cfg_get_tx_mon_ring_mask(
  1449. soc->wlan_cfg_ctx, intr_ctx_num);
  1450. soc->intr_mode = DP_INTR_INTEGRATED;
  1451. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  1452. if (tx_mask & (1 << j)) {
  1453. irq_id_map[num_irq++] =
  1454. (wbm2host_tx_completions_ring1 - j);
  1455. }
  1456. if (rx_mask & (1 << j)) {
  1457. irq_id_map[num_irq++] =
  1458. (reo2host_destination_ring1 - j);
  1459. }
  1460. if (rxdma2host_ring_mask & (1 << j)) {
  1461. irq_id_map[num_irq++] =
  1462. rxdma2host_destination_ring_mac1 - j;
  1463. }
  1464. if (host2rxdma_ring_mask & (1 << j)) {
  1465. irq_id_map[num_irq++] =
  1466. host2rxdma_host_buf_ring_mac1 - j;
  1467. }
  1468. if (host2rxdma_mon_ring_mask & (1 << j)) {
  1469. irq_id_map[num_irq++] =
  1470. host2rxdma_monitor_ring1 - j;
  1471. }
  1472. if (rx_mon_mask & (1 << j)) {
  1473. irq_id_map[num_irq++] =
  1474. ppdu_end_interrupts_mac1 - j;
  1475. irq_id_map[num_irq++] =
  1476. rxdma2host_monitor_status_ring_mac1 - j;
  1477. irq_id_map[num_irq++] =
  1478. rxdma2host_monitor_destination_mac1 - j;
  1479. }
  1480. if (rx_wbm_rel_ring_mask & (1 << j))
  1481. irq_id_map[num_irq++] = wbm2host_rx_release;
  1482. if (rx_err_ring_mask & (1 << j))
  1483. irq_id_map[num_irq++] = reo2host_exception;
  1484. if (reo_status_ring_mask & (1 << j))
  1485. irq_id_map[num_irq++] = reo2host_status;
  1486. if (host2txmon_ring_mask & (1 << j))
  1487. irq_id_map[num_irq++] = host2tx_monitor_ring1;
  1488. if (txmon2host_mon_ring_mask & (1 << j)) {
  1489. irq_id_map[num_irq++] =
  1490. (txmon2host_monitor_destination_mac1 - j);
  1491. }
  1492. }
  1493. *num_irq_r = num_irq;
  1494. }
  1495. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  1496. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  1497. int msi_vector_count, int msi_vector_start)
  1498. {
  1499. int tx_mask = wlan_cfg_get_tx_ring_mask(
  1500. soc->wlan_cfg_ctx, intr_ctx_num);
  1501. int rx_mask = wlan_cfg_get_rx_ring_mask(
  1502. soc->wlan_cfg_ctx, intr_ctx_num);
  1503. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  1504. soc->wlan_cfg_ctx, intr_ctx_num);
  1505. int tx_mon_mask = wlan_cfg_get_tx_mon_ring_mask(
  1506. soc->wlan_cfg_ctx, intr_ctx_num);
  1507. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1508. soc->wlan_cfg_ctx, intr_ctx_num);
  1509. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1510. soc->wlan_cfg_ctx, intr_ctx_num);
  1511. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1512. soc->wlan_cfg_ctx, intr_ctx_num);
  1513. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1514. soc->wlan_cfg_ctx, intr_ctx_num);
  1515. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  1516. soc->wlan_cfg_ctx, intr_ctx_num);
  1517. int host2rxdma_mon_ring_mask = wlan_cfg_get_host2rxdma_mon_ring_mask(
  1518. soc->wlan_cfg_ctx, intr_ctx_num);
  1519. int rx_near_full_grp_1_mask =
  1520. wlan_cfg_get_rx_near_full_grp_1_mask(soc->wlan_cfg_ctx,
  1521. intr_ctx_num);
  1522. int rx_near_full_grp_2_mask =
  1523. wlan_cfg_get_rx_near_full_grp_2_mask(soc->wlan_cfg_ctx,
  1524. intr_ctx_num);
  1525. int tx_ring_near_full_mask =
  1526. wlan_cfg_get_tx_ring_near_full_mask(soc->wlan_cfg_ctx,
  1527. intr_ctx_num);
  1528. int host2txmon_ring_mask =
  1529. wlan_cfg_get_host2txmon_ring_mask(soc->wlan_cfg_ctx,
  1530. intr_ctx_num);
  1531. unsigned int vector =
  1532. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  1533. int num_irq = 0;
  1534. soc->intr_mode = DP_INTR_MSI;
  1535. if (tx_mask | rx_mask | rx_mon_mask | tx_mon_mask | rx_err_ring_mask |
  1536. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask |
  1537. host2rxdma_ring_mask | host2rxdma_mon_ring_mask |
  1538. rx_near_full_grp_1_mask | rx_near_full_grp_2_mask |
  1539. tx_ring_near_full_mask | host2txmon_ring_mask)
  1540. irq_id_map[num_irq++] =
  1541. pld_get_msi_irq(soc->osdev->dev, vector);
  1542. *num_irq_r = num_irq;
  1543. }
  1544. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  1545. int *irq_id_map, int *num_irq)
  1546. {
  1547. int msi_vector_count, ret;
  1548. uint32_t msi_base_data, msi_vector_start;
  1549. if (pld_get_enable_intx(soc->osdev->dev)) {
  1550. return dp_soc_interrupt_map_calculate_wifi3_pci_legacy(soc,
  1551. intr_ctx_num, irq_id_map, num_irq);
  1552. }
  1553. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  1554. &msi_vector_count,
  1555. &msi_base_data,
  1556. &msi_vector_start);
  1557. if (ret)
  1558. return dp_soc_interrupt_map_calculate_integrated(soc,
  1559. intr_ctx_num, irq_id_map, num_irq);
  1560. else
  1561. dp_soc_interrupt_map_calculate_msi(soc,
  1562. intr_ctx_num, irq_id_map, num_irq,
  1563. msi_vector_count, msi_vector_start);
  1564. }
  1565. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  1566. /**
  1567. * dp_soc_near_full_interrupt_attach() - Register handler for DP near fill irq
  1568. * @soc: DP soc handle
  1569. * @num_irq: IRQ number
  1570. * @irq_id_map: IRQ map
  1571. * @intr_id: interrupt context ID
  1572. *
  1573. * Return: 0 for success. nonzero for failure.
  1574. */
  1575. static inline int
  1576. dp_soc_near_full_interrupt_attach(struct dp_soc *soc, int num_irq,
  1577. int irq_id_map[], int intr_id)
  1578. {
  1579. return hif_register_ext_group(soc->hif_handle,
  1580. num_irq, irq_id_map,
  1581. dp_service_near_full_srngs,
  1582. &soc->intr_ctx[intr_id], "dp_nf_intr",
  1583. HIF_EXEC_NAPI_TYPE,
  1584. QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1585. }
  1586. #else
  1587. static inline int
  1588. dp_soc_near_full_interrupt_attach(struct dp_soc *soc, int num_irq,
  1589. int *irq_id_map, int intr_id)
  1590. {
  1591. return 0;
  1592. }
  1593. #endif
  1594. #ifdef DP_CON_MON_MSI_SKIP_SET
  1595. static inline bool dp_skip_rx_mon_ring_mask_set(struct dp_soc *soc)
  1596. {
  1597. return !!(soc->cdp_soc.ol_ops->get_con_mode() !=
  1598. QDF_GLOBAL_MONITOR_MODE &&
  1599. !wlan_cfg_get_local_pkt_capture(soc->wlan_cfg_ctx));
  1600. }
  1601. #else
  1602. static inline bool dp_skip_rx_mon_ring_mask_set(struct dp_soc *soc)
  1603. {
  1604. return false;
  1605. }
  1606. #endif
  1607. void dp_soc_interrupt_detach(struct cdp_soc_t *txrx_soc)
  1608. {
  1609. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1610. int i;
  1611. if (soc->intr_mode == DP_INTR_POLL) {
  1612. qdf_timer_free(&soc->int_timer);
  1613. } else {
  1614. hif_deconfigure_ext_group_interrupts(soc->hif_handle);
  1615. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1616. hif_deregister_exec_group(soc->hif_handle, "dp_nf_intr");
  1617. }
  1618. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1619. soc->intr_ctx[i].tx_ring_mask = 0;
  1620. soc->intr_ctx[i].rx_ring_mask = 0;
  1621. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1622. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1623. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1624. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1625. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1626. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1627. soc->intr_ctx[i].host2rxdma_mon_ring_mask = 0;
  1628. soc->intr_ctx[i].rx_near_full_grp_1_mask = 0;
  1629. soc->intr_ctx[i].rx_near_full_grp_2_mask = 0;
  1630. soc->intr_ctx[i].tx_ring_near_full_mask = 0;
  1631. soc->intr_ctx[i].tx_mon_ring_mask = 0;
  1632. soc->intr_ctx[i].host2txmon_ring_mask = 0;
  1633. soc->intr_ctx[i].umac_reset_intr_mask = 0;
  1634. hif_event_history_deinit(soc->hif_handle, i);
  1635. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1636. }
  1637. qdf_mem_set(&soc->mon_intr_id_lmac_map,
  1638. sizeof(soc->mon_intr_id_lmac_map),
  1639. DP_MON_INVALID_LMAC_ID);
  1640. }
  1641. QDF_STATUS dp_soc_interrupt_attach(struct cdp_soc_t *txrx_soc)
  1642. {
  1643. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1644. int i = 0;
  1645. int num_irq = 0;
  1646. int rx_err_ring_intr_ctxt_id = HIF_MAX_GROUP;
  1647. int lmac_id = 0;
  1648. int napi_scale;
  1649. qdf_mem_set(&soc->mon_intr_id_lmac_map,
  1650. sizeof(soc->mon_intr_id_lmac_map), DP_MON_INVALID_LMAC_ID);
  1651. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1652. int ret = 0;
  1653. /* Map of IRQ ids registered with one interrupt context */
  1654. int irq_id_map[HIF_MAX_GRP_IRQ];
  1655. int tx_mask =
  1656. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1657. int rx_mask =
  1658. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1659. int rx_mon_mask =
  1660. dp_soc_get_mon_mask_for_interrupt_mode(soc, i);
  1661. int tx_mon_ring_mask =
  1662. wlan_cfg_get_tx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  1663. int rx_err_ring_mask =
  1664. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1665. int rx_wbm_rel_ring_mask =
  1666. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1667. int reo_status_ring_mask =
  1668. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1669. int rxdma2host_ring_mask =
  1670. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1671. int host2rxdma_ring_mask =
  1672. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  1673. int host2rxdma_mon_ring_mask =
  1674. wlan_cfg_get_host2rxdma_mon_ring_mask(
  1675. soc->wlan_cfg_ctx, i);
  1676. int rx_near_full_grp_1_mask =
  1677. wlan_cfg_get_rx_near_full_grp_1_mask(soc->wlan_cfg_ctx,
  1678. i);
  1679. int rx_near_full_grp_2_mask =
  1680. wlan_cfg_get_rx_near_full_grp_2_mask(soc->wlan_cfg_ctx,
  1681. i);
  1682. int tx_ring_near_full_mask =
  1683. wlan_cfg_get_tx_ring_near_full_mask(soc->wlan_cfg_ctx,
  1684. i);
  1685. int host2txmon_ring_mask =
  1686. wlan_cfg_get_host2txmon_ring_mask(soc->wlan_cfg_ctx, i);
  1687. int umac_reset_intr_mask =
  1688. wlan_cfg_get_umac_reset_intr_mask(soc->wlan_cfg_ctx, i);
  1689. if (dp_skip_rx_mon_ring_mask_set(soc))
  1690. rx_mon_mask = 0;
  1691. soc->intr_ctx[i].dp_intr_id = i;
  1692. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  1693. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  1694. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  1695. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  1696. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1697. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1698. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1699. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1700. soc->intr_ctx[i].host2rxdma_mon_ring_mask =
  1701. host2rxdma_mon_ring_mask;
  1702. soc->intr_ctx[i].rx_near_full_grp_1_mask =
  1703. rx_near_full_grp_1_mask;
  1704. soc->intr_ctx[i].rx_near_full_grp_2_mask =
  1705. rx_near_full_grp_2_mask;
  1706. soc->intr_ctx[i].tx_ring_near_full_mask =
  1707. tx_ring_near_full_mask;
  1708. soc->intr_ctx[i].tx_mon_ring_mask = tx_mon_ring_mask;
  1709. soc->intr_ctx[i].host2txmon_ring_mask = host2txmon_ring_mask;
  1710. soc->intr_ctx[i].umac_reset_intr_mask = umac_reset_intr_mask;
  1711. soc->intr_ctx[i].soc = soc;
  1712. num_irq = 0;
  1713. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1714. &num_irq);
  1715. if (rx_near_full_grp_1_mask | rx_near_full_grp_2_mask |
  1716. tx_ring_near_full_mask) {
  1717. dp_soc_near_full_interrupt_attach(soc, num_irq,
  1718. irq_id_map, i);
  1719. } else {
  1720. napi_scale = wlan_cfg_get_napi_scale_factor(
  1721. soc->wlan_cfg_ctx);
  1722. if (!napi_scale)
  1723. napi_scale = QCA_NAPI_DEF_SCALE_BIN_SHIFT;
  1724. ret = hif_register_ext_group(soc->hif_handle,
  1725. num_irq, irq_id_map, dp_service_srngs,
  1726. &soc->intr_ctx[i], "dp_intr",
  1727. HIF_EXEC_NAPI_TYPE, napi_scale);
  1728. }
  1729. dp_debug(" int ctx %u num_irq %u irq_id_map %u %u",
  1730. i, num_irq, irq_id_map[0], irq_id_map[1]);
  1731. if (ret) {
  1732. dp_init_err("%pK: failed, ret = %d", soc, ret);
  1733. dp_soc_interrupt_detach(txrx_soc);
  1734. return QDF_STATUS_E_FAILURE;
  1735. }
  1736. hif_event_history_init(soc->hif_handle, i);
  1737. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1738. if (rx_err_ring_mask)
  1739. rx_err_ring_intr_ctxt_id = i;
  1740. if (dp_is_mon_mask_valid(soc, &soc->intr_ctx[i])) {
  1741. soc->mon_intr_id_lmac_map[lmac_id] = i;
  1742. lmac_id++;
  1743. }
  1744. }
  1745. hif_configure_ext_group_interrupts(soc->hif_handle);
  1746. if (rx_err_ring_intr_ctxt_id != HIF_MAX_GROUP)
  1747. hif_config_irq_clear_cpu_affinity(soc->hif_handle,
  1748. rx_err_ring_intr_ctxt_id, 0);
  1749. return QDF_STATUS_SUCCESS;
  1750. }
  1751. #define AVG_MAX_MPDUS_PER_TID 128
  1752. #define AVG_TIDS_PER_CLIENT 2
  1753. #define AVG_FLOWS_PER_TID 2
  1754. #define AVG_MSDUS_PER_FLOW 128
  1755. #define AVG_MSDUS_PER_MPDU 4
  1756. void dp_hw_link_desc_pool_banks_free(struct dp_soc *soc, uint32_t mac_id)
  1757. {
  1758. struct qdf_mem_multi_page_t *pages;
  1759. if (mac_id != WLAN_INVALID_PDEV_ID) {
  1760. pages = dp_monitor_get_link_desc_pages(soc, mac_id);
  1761. } else {
  1762. pages = &soc->link_desc_pages;
  1763. }
  1764. if (!pages) {
  1765. dp_err("can not get link desc pages");
  1766. QDF_ASSERT(0);
  1767. return;
  1768. }
  1769. if (pages->dma_pages) {
  1770. wlan_minidump_remove((void *)
  1771. pages->dma_pages->page_v_addr_start,
  1772. pages->num_pages * pages->page_size,
  1773. soc->ctrl_psoc,
  1774. WLAN_MD_DP_SRNG_WBM_IDLE_LINK,
  1775. "hw_link_desc_bank");
  1776. dp_desc_multi_pages_mem_free(soc, QDF_DP_HW_LINK_DESC_TYPE,
  1777. pages, 0, false);
  1778. }
  1779. }
  1780. qdf_export_symbol(dp_hw_link_desc_pool_banks_free);
  1781. QDF_STATUS dp_hw_link_desc_pool_banks_alloc(struct dp_soc *soc, uint32_t mac_id)
  1782. {
  1783. hal_soc_handle_t hal_soc = soc->hal_soc;
  1784. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1785. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1786. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1787. uint32_t num_mpdus_per_link_desc = hal_num_mpdus_per_link_desc(hal_soc);
  1788. uint32_t num_msdus_per_link_desc = hal_num_msdus_per_link_desc(hal_soc);
  1789. uint32_t num_mpdu_links_per_queue_desc =
  1790. hal_num_mpdu_links_per_queue_desc(hal_soc);
  1791. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1792. uint32_t *total_link_descs, total_mem_size;
  1793. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1794. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1795. uint32_t num_entries;
  1796. struct qdf_mem_multi_page_t *pages;
  1797. struct dp_srng *dp_srng;
  1798. uint8_t minidump_str[MINIDUMP_STR_SIZE];
  1799. /* Only Tx queue descriptors are allocated from common link descriptor
  1800. * pool Rx queue descriptors are not included in this because (REO queue
  1801. * extension descriptors) they are expected to be allocated contiguously
  1802. * with REO queue descriptors
  1803. */
  1804. if (mac_id != WLAN_INVALID_PDEV_ID) {
  1805. pages = dp_monitor_get_link_desc_pages(soc, mac_id);
  1806. /* dp_monitor_get_link_desc_pages returns NULL only
  1807. * if monitor SOC is NULL
  1808. */
  1809. if (!pages) {
  1810. dp_err("can not get link desc pages");
  1811. QDF_ASSERT(0);
  1812. return QDF_STATUS_E_FAULT;
  1813. }
  1814. dp_srng = &soc->rxdma_mon_desc_ring[mac_id];
  1815. num_entries = dp_srng->alloc_size /
  1816. hal_srng_get_entrysize(soc->hal_soc,
  1817. RXDMA_MONITOR_DESC);
  1818. total_link_descs = dp_monitor_get_total_link_descs(soc, mac_id);
  1819. qdf_str_lcopy(minidump_str, "mon_link_desc_bank",
  1820. MINIDUMP_STR_SIZE);
  1821. } else {
  1822. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1823. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1824. num_mpdu_queue_descs = num_mpdu_link_descs /
  1825. num_mpdu_links_per_queue_desc;
  1826. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1827. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1828. num_msdus_per_link_desc;
  1829. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1830. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1831. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1832. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1833. pages = &soc->link_desc_pages;
  1834. total_link_descs = &soc->total_link_descs;
  1835. qdf_str_lcopy(minidump_str, "link_desc_bank",
  1836. MINIDUMP_STR_SIZE);
  1837. }
  1838. /* If link descriptor banks are allocated, return from here */
  1839. if (pages->num_pages)
  1840. return QDF_STATUS_SUCCESS;
  1841. /* Round up to power of 2 */
  1842. *total_link_descs = 1;
  1843. while (*total_link_descs < num_entries)
  1844. *total_link_descs <<= 1;
  1845. dp_init_info("%pK: total_link_descs: %u, link_desc_size: %d",
  1846. soc, *total_link_descs, link_desc_size);
  1847. total_mem_size = *total_link_descs * link_desc_size;
  1848. total_mem_size += link_desc_align;
  1849. dp_init_info("%pK: total_mem_size: %d",
  1850. soc, total_mem_size);
  1851. dp_set_max_page_size(pages, max_alloc_size);
  1852. dp_desc_multi_pages_mem_alloc(soc, QDF_DP_HW_LINK_DESC_TYPE,
  1853. pages,
  1854. link_desc_size,
  1855. *total_link_descs,
  1856. 0, false);
  1857. if (!pages->num_pages) {
  1858. dp_err("Multi page alloc fail for hw link desc pool");
  1859. return QDF_STATUS_E_FAULT;
  1860. }
  1861. wlan_minidump_log(pages->dma_pages->page_v_addr_start,
  1862. pages->num_pages * pages->page_size,
  1863. soc->ctrl_psoc,
  1864. WLAN_MD_DP_SRNG_WBM_IDLE_LINK,
  1865. "hw_link_desc_bank");
  1866. return QDF_STATUS_SUCCESS;
  1867. }
  1868. void dp_hw_link_desc_ring_free(struct dp_soc *soc)
  1869. {
  1870. uint32_t i;
  1871. uint32_t size = soc->wbm_idle_scatter_buf_size;
  1872. void *vaddr = soc->wbm_idle_link_ring.base_vaddr_unaligned;
  1873. qdf_dma_addr_t paddr;
  1874. if (soc->wbm_idle_scatter_buf_base_vaddr[0]) {
  1875. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1876. vaddr = soc->wbm_idle_scatter_buf_base_vaddr[i];
  1877. paddr = soc->wbm_idle_scatter_buf_base_paddr[i];
  1878. if (vaddr) {
  1879. qdf_mem_free_consistent(soc->osdev,
  1880. soc->osdev->dev,
  1881. size,
  1882. vaddr,
  1883. paddr,
  1884. 0);
  1885. vaddr = NULL;
  1886. }
  1887. }
  1888. } else {
  1889. wlan_minidump_remove(soc->wbm_idle_link_ring.base_vaddr_unaligned,
  1890. soc->wbm_idle_link_ring.alloc_size,
  1891. soc->ctrl_psoc,
  1892. WLAN_MD_DP_SRNG_WBM_IDLE_LINK,
  1893. "wbm_idle_link_ring");
  1894. dp_srng_free(soc, &soc->wbm_idle_link_ring);
  1895. }
  1896. }
  1897. QDF_STATUS dp_hw_link_desc_ring_alloc(struct dp_soc *soc)
  1898. {
  1899. uint32_t entry_size, i;
  1900. uint32_t total_mem_size;
  1901. qdf_dma_addr_t *baseaddr = NULL;
  1902. struct dp_srng *dp_srng;
  1903. uint32_t ring_type;
  1904. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1905. uint32_t tlds;
  1906. ring_type = WBM_IDLE_LINK;
  1907. dp_srng = &soc->wbm_idle_link_ring;
  1908. tlds = soc->total_link_descs;
  1909. entry_size = hal_srng_get_entrysize(soc->hal_soc, ring_type);
  1910. total_mem_size = entry_size * tlds;
  1911. if (total_mem_size <= max_alloc_size) {
  1912. if (dp_srng_alloc(soc, dp_srng, ring_type, tlds, 0)) {
  1913. dp_init_err("%pK: Link desc idle ring setup failed",
  1914. soc);
  1915. goto fail;
  1916. }
  1917. wlan_minidump_log(soc->wbm_idle_link_ring.base_vaddr_unaligned,
  1918. soc->wbm_idle_link_ring.alloc_size,
  1919. soc->ctrl_psoc,
  1920. WLAN_MD_DP_SRNG_WBM_IDLE_LINK,
  1921. "wbm_idle_link_ring");
  1922. } else {
  1923. uint32_t num_scatter_bufs;
  1924. uint32_t buf_size = 0;
  1925. soc->wbm_idle_scatter_buf_size =
  1926. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1927. hal_idle_scatter_buf_num_entries(
  1928. soc->hal_soc,
  1929. soc->wbm_idle_scatter_buf_size);
  1930. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1931. soc->hal_soc, total_mem_size,
  1932. soc->wbm_idle_scatter_buf_size);
  1933. if (num_scatter_bufs > MAX_IDLE_SCATTER_BUFS) {
  1934. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1935. FL("scatter bufs size out of bounds"));
  1936. goto fail;
  1937. }
  1938. for (i = 0; i < num_scatter_bufs; i++) {
  1939. baseaddr = &soc->wbm_idle_scatter_buf_base_paddr[i];
  1940. buf_size = soc->wbm_idle_scatter_buf_size;
  1941. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1942. qdf_mem_alloc_consistent(soc->osdev,
  1943. soc->osdev->dev,
  1944. buf_size,
  1945. baseaddr);
  1946. if (!soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1947. QDF_TRACE(QDF_MODULE_ID_DP,
  1948. QDF_TRACE_LEVEL_ERROR,
  1949. FL("Scatter lst memory alloc fail"));
  1950. goto fail;
  1951. }
  1952. }
  1953. soc->num_scatter_bufs = num_scatter_bufs;
  1954. }
  1955. return QDF_STATUS_SUCCESS;
  1956. fail:
  1957. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1958. void *vaddr = soc->wbm_idle_scatter_buf_base_vaddr[i];
  1959. qdf_dma_addr_t paddr = soc->wbm_idle_scatter_buf_base_paddr[i];
  1960. if (vaddr) {
  1961. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1962. soc->wbm_idle_scatter_buf_size,
  1963. vaddr,
  1964. paddr, 0);
  1965. vaddr = NULL;
  1966. }
  1967. }
  1968. return QDF_STATUS_E_NOMEM;
  1969. }
  1970. qdf_export_symbol(dp_hw_link_desc_pool_banks_alloc);
  1971. QDF_STATUS dp_hw_link_desc_ring_init(struct dp_soc *soc)
  1972. {
  1973. struct dp_srng *dp_srng = &soc->wbm_idle_link_ring;
  1974. if (dp_srng->base_vaddr_unaligned) {
  1975. if (dp_srng_init(soc, dp_srng, WBM_IDLE_LINK, 0, 0))
  1976. return QDF_STATUS_E_FAILURE;
  1977. }
  1978. return QDF_STATUS_SUCCESS;
  1979. }
  1980. void dp_hw_link_desc_ring_deinit(struct dp_soc *soc)
  1981. {
  1982. dp_srng_deinit(soc, &soc->wbm_idle_link_ring, WBM_IDLE_LINK, 0);
  1983. }
  1984. #ifdef IPA_OFFLOAD
  1985. #define USE_1_IPA_RX_REO_RING 1
  1986. #define USE_2_IPA_RX_REO_RINGS 2
  1987. #define REO_DST_RING_SIZE_QCA6290 1023
  1988. #ifndef CONFIG_WIFI_EMULATION_WIFI_3_0
  1989. #define REO_DST_RING_SIZE_QCA8074 1023
  1990. #define REO_DST_RING_SIZE_QCN9000 2048
  1991. #else
  1992. #define REO_DST_RING_SIZE_QCA8074 8
  1993. #define REO_DST_RING_SIZE_QCN9000 8
  1994. #endif /* CONFIG_WIFI_EMULATION_WIFI_3_0 */
  1995. #ifdef IPA_WDI3_TX_TWO_PIPES
  1996. #ifdef DP_MEMORY_OPT
  1997. static int dp_ipa_init_alt_tx_ring(struct dp_soc *soc)
  1998. {
  1999. return dp_init_tx_ring_pair_by_index(soc, IPA_TX_ALT_RING_IDX);
  2000. }
  2001. static void dp_ipa_deinit_alt_tx_ring(struct dp_soc *soc)
  2002. {
  2003. dp_deinit_tx_pair_by_index(soc, IPA_TX_ALT_RING_IDX);
  2004. }
  2005. static int dp_ipa_alloc_alt_tx_ring(struct dp_soc *soc)
  2006. {
  2007. return dp_alloc_tx_ring_pair_by_index(soc, IPA_TX_ALT_RING_IDX);
  2008. }
  2009. static void dp_ipa_free_alt_tx_ring(struct dp_soc *soc)
  2010. {
  2011. dp_free_tx_ring_pair_by_index(soc, IPA_TX_ALT_RING_IDX);
  2012. }
  2013. #else /* !DP_MEMORY_OPT */
  2014. static int dp_ipa_init_alt_tx_ring(struct dp_soc *soc)
  2015. {
  2016. return 0;
  2017. }
  2018. static void dp_ipa_deinit_alt_tx_ring(struct dp_soc *soc)
  2019. {
  2020. }
  2021. static int dp_ipa_alloc_alt_tx_ring(struct dp_soc *soc)
  2022. {
  2023. return 0;
  2024. }
  2025. static void dp_ipa_free_alt_tx_ring(struct dp_soc *soc)
  2026. {
  2027. }
  2028. #endif /* DP_MEMORY_OPT */
  2029. void dp_ipa_hal_tx_init_alt_data_ring(struct dp_soc *soc)
  2030. {
  2031. hal_tx_init_data_ring(soc->hal_soc,
  2032. soc->tcl_data_ring[IPA_TX_ALT_RING_IDX].hal_srng);
  2033. }
  2034. #else /* !IPA_WDI3_TX_TWO_PIPES */
  2035. static int dp_ipa_init_alt_tx_ring(struct dp_soc *soc)
  2036. {
  2037. return 0;
  2038. }
  2039. static void dp_ipa_deinit_alt_tx_ring(struct dp_soc *soc)
  2040. {
  2041. }
  2042. static int dp_ipa_alloc_alt_tx_ring(struct dp_soc *soc)
  2043. {
  2044. return 0;
  2045. }
  2046. static void dp_ipa_free_alt_tx_ring(struct dp_soc *soc)
  2047. {
  2048. }
  2049. void dp_ipa_hal_tx_init_alt_data_ring(struct dp_soc *soc)
  2050. {
  2051. }
  2052. #endif /* IPA_WDI3_TX_TWO_PIPES */
  2053. #else
  2054. #define REO_DST_RING_SIZE_QCA6290 1024
  2055. static int dp_ipa_init_alt_tx_ring(struct dp_soc *soc)
  2056. {
  2057. return 0;
  2058. }
  2059. static void dp_ipa_deinit_alt_tx_ring(struct dp_soc *soc)
  2060. {
  2061. }
  2062. static int dp_ipa_alloc_alt_tx_ring(struct dp_soc *soc)
  2063. {
  2064. return 0;
  2065. }
  2066. static void dp_ipa_free_alt_tx_ring(struct dp_soc *soc)
  2067. {
  2068. }
  2069. void dp_ipa_hal_tx_init_alt_data_ring(struct dp_soc *soc)
  2070. {
  2071. }
  2072. #endif /* IPA_OFFLOAD */
  2073. /**
  2074. * dp_soc_reset_cpu_ring_map() - Reset cpu ring map
  2075. * @soc: Datapath soc handler
  2076. *
  2077. * This api resets the default cpu ring map
  2078. */
  2079. void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  2080. {
  2081. uint8_t i;
  2082. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2083. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  2084. switch (nss_config) {
  2085. case dp_nss_cfg_first_radio:
  2086. /*
  2087. * Setting Tx ring map for one nss offloaded radio
  2088. */
  2089. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  2090. break;
  2091. case dp_nss_cfg_second_radio:
  2092. /*
  2093. * Setting Tx ring for two nss offloaded radios
  2094. */
  2095. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  2096. break;
  2097. case dp_nss_cfg_dbdc:
  2098. /*
  2099. * Setting Tx ring map for 2 nss offloaded radios
  2100. */
  2101. soc->tx_ring_map[i] =
  2102. dp_cpu_ring_map[DP_NSS_DBDC_OFFLOADED_MAP][i];
  2103. break;
  2104. case dp_nss_cfg_dbtc:
  2105. /*
  2106. * Setting Tx ring map for 3 nss offloaded radios
  2107. */
  2108. soc->tx_ring_map[i] =
  2109. dp_cpu_ring_map[DP_NSS_DBTC_OFFLOADED_MAP][i];
  2110. break;
  2111. default:
  2112. dp_err("tx_ring_map failed due to invalid nss cfg");
  2113. break;
  2114. }
  2115. }
  2116. }
  2117. /**
  2118. * dp_soc_disable_unused_mac_intr_mask() - reset interrupt mask for
  2119. * unused WMAC hw rings
  2120. * @soc: DP Soc handle
  2121. * @mac_num: wmac num
  2122. *
  2123. * Return: Return void
  2124. */
  2125. static void dp_soc_disable_unused_mac_intr_mask(struct dp_soc *soc,
  2126. int mac_num)
  2127. {
  2128. uint8_t *grp_mask = NULL;
  2129. int group_number;
  2130. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  2131. group_number = dp_srng_find_ring_in_mask(mac_num, grp_mask);
  2132. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  2133. group_number, 0x0);
  2134. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  2135. group_number = dp_srng_find_ring_in_mask(mac_num, grp_mask);
  2136. wlan_cfg_set_rx_mon_ring_mask(soc->wlan_cfg_ctx,
  2137. group_number, 0x0);
  2138. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  2139. group_number = dp_srng_find_ring_in_mask(mac_num, grp_mask);
  2140. wlan_cfg_set_rxdma2host_ring_mask(soc->wlan_cfg_ctx,
  2141. group_number, 0x0);
  2142. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_mon_ring_mask[0];
  2143. group_number = dp_srng_find_ring_in_mask(mac_num, grp_mask);
  2144. wlan_cfg_set_host2rxdma_mon_ring_mask(soc->wlan_cfg_ctx,
  2145. group_number, 0x0);
  2146. }
  2147. #ifdef IPA_OFFLOAD
  2148. #ifdef IPA_WDI3_VLAN_SUPPORT
  2149. /**
  2150. * dp_soc_reset_ipa_vlan_intr_mask() - reset interrupt mask for IPA offloaded
  2151. * ring for vlan tagged traffic
  2152. * @soc: DP Soc handle
  2153. *
  2154. * Return: Return void
  2155. */
  2156. void dp_soc_reset_ipa_vlan_intr_mask(struct dp_soc *soc)
  2157. {
  2158. uint8_t *grp_mask = NULL;
  2159. int group_number, mask;
  2160. if (!wlan_ipa_is_vlan_enabled())
  2161. return;
  2162. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  2163. group_number = dp_srng_find_ring_in_mask(IPA_ALT_REO_DEST_RING_IDX, grp_mask);
  2164. if (group_number < 0) {
  2165. dp_init_debug("%pK: ring not part of any group; ring_type: %d,ring_num %d",
  2166. soc, REO_DST, IPA_ALT_REO_DEST_RING_IDX);
  2167. return;
  2168. }
  2169. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  2170. /* reset the interrupt mask for offloaded ring */
  2171. mask &= (~(1 << IPA_ALT_REO_DEST_RING_IDX));
  2172. /*
  2173. * set the interrupt mask to zero for rx offloaded radio.
  2174. */
  2175. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  2176. }
  2177. #else
  2178. inline
  2179. void dp_soc_reset_ipa_vlan_intr_mask(struct dp_soc *soc)
  2180. { }
  2181. #endif /* IPA_WDI3_VLAN_SUPPORT */
  2182. #else
  2183. inline
  2184. void dp_soc_reset_ipa_vlan_intr_mask(struct dp_soc *soc)
  2185. { }
  2186. #endif /* IPA_OFFLOAD */
  2187. /**
  2188. * dp_soc_reset_intr_mask() - reset interrupt mask
  2189. * @soc: DP Soc handle
  2190. *
  2191. * Return: Return void
  2192. */
  2193. void dp_soc_reset_intr_mask(struct dp_soc *soc)
  2194. {
  2195. uint8_t j;
  2196. uint8_t *grp_mask = NULL;
  2197. int group_number, mask, num_ring;
  2198. /* number of tx ring */
  2199. num_ring = soc->num_tcl_data_rings;
  2200. /*
  2201. * group mask for tx completion ring.
  2202. */
  2203. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  2204. /* loop and reset the mask for only offloaded ring */
  2205. for (j = 0; j < WLAN_CFG_NUM_TCL_DATA_RINGS; j++) {
  2206. /*
  2207. * Group number corresponding to tx offloaded ring.
  2208. */
  2209. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2210. if (group_number < 0) {
  2211. dp_init_debug("%pK: ring not part of any group; ring_type: %d,ring_num %d",
  2212. soc, WBM2SW_RELEASE, j);
  2213. continue;
  2214. }
  2215. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  2216. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j) &&
  2217. (!mask)) {
  2218. continue;
  2219. }
  2220. /* reset the tx mask for offloaded ring */
  2221. mask &= (~(1 << j));
  2222. /*
  2223. * reset the interrupt mask for offloaded ring.
  2224. */
  2225. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  2226. }
  2227. /* number of rx rings */
  2228. num_ring = soc->num_reo_dest_rings;
  2229. /*
  2230. * group mask for reo destination ring.
  2231. */
  2232. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  2233. /* loop and reset the mask for only offloaded ring */
  2234. for (j = 0; j < WLAN_CFG_NUM_REO_DEST_RING; j++) {
  2235. /*
  2236. * Group number corresponding to rx offloaded ring.
  2237. */
  2238. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2239. if (group_number < 0) {
  2240. dp_init_debug("%pK: ring not part of any group; ring_type: %d,ring_num %d",
  2241. soc, REO_DST, j);
  2242. continue;
  2243. }
  2244. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  2245. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j) &&
  2246. (!mask)) {
  2247. continue;
  2248. }
  2249. /* reset the interrupt mask for offloaded ring */
  2250. mask &= (~(1 << j));
  2251. /*
  2252. * set the interrupt mask to zero for rx offloaded radio.
  2253. */
  2254. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  2255. }
  2256. /*
  2257. * group mask for Rx buffer refill ring
  2258. */
  2259. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  2260. /* loop and reset the mask for only offloaded ring */
  2261. for (j = 0; j < MAX_PDEV_CNT; j++) {
  2262. int lmac_id = wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  2263. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  2264. continue;
  2265. }
  2266. /*
  2267. * Group number corresponding to rx offloaded ring.
  2268. */
  2269. group_number = dp_srng_find_ring_in_mask(lmac_id, grp_mask);
  2270. if (group_number < 0) {
  2271. dp_init_debug("%pK: ring not part of any group; ring_type: %d,ring_num %d",
  2272. soc, REO_DST, lmac_id);
  2273. continue;
  2274. }
  2275. /* set the interrupt mask for offloaded ring */
  2276. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  2277. group_number);
  2278. mask &= (~(1 << lmac_id));
  2279. /*
  2280. * set the interrupt mask to zero for rx offloaded radio.
  2281. */
  2282. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  2283. group_number, mask);
  2284. }
  2285. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  2286. for (j = 0; j < num_ring; j++) {
  2287. if (!dp_soc_ring_if_nss_offloaded(soc, REO_EXCEPTION, j)) {
  2288. continue;
  2289. }
  2290. /*
  2291. * Group number corresponding to rx err ring.
  2292. */
  2293. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2294. if (group_number < 0) {
  2295. dp_init_debug("%pK: ring not part of any group; ring_type: %d,ring_num %d",
  2296. soc, REO_EXCEPTION, j);
  2297. continue;
  2298. }
  2299. wlan_cfg_set_rx_err_ring_mask(soc->wlan_cfg_ctx,
  2300. group_number, 0);
  2301. }
  2302. }
  2303. #ifdef IPA_OFFLOAD
  2304. bool dp_reo_remap_config(struct dp_soc *soc, uint32_t *remap0,
  2305. uint32_t *remap1, uint32_t *remap2)
  2306. {
  2307. uint32_t ring[WLAN_CFG_NUM_REO_DEST_RING_MAX] = {
  2308. REO_REMAP_SW1, REO_REMAP_SW2, REO_REMAP_SW3,
  2309. REO_REMAP_SW5, REO_REMAP_SW6, REO_REMAP_SW7};
  2310. switch (soc->arch_id) {
  2311. case CDP_ARCH_TYPE_BE:
  2312. hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
  2313. soc->num_reo_dest_rings -
  2314. USE_2_IPA_RX_REO_RINGS, remap1,
  2315. remap2);
  2316. break;
  2317. case CDP_ARCH_TYPE_LI:
  2318. if (wlan_ipa_is_vlan_enabled()) {
  2319. hal_compute_reo_remap_ix2_ix3(
  2320. soc->hal_soc, ring,
  2321. soc->num_reo_dest_rings -
  2322. USE_2_IPA_RX_REO_RINGS, remap1,
  2323. remap2);
  2324. } else {
  2325. hal_compute_reo_remap_ix2_ix3(
  2326. soc->hal_soc, ring,
  2327. soc->num_reo_dest_rings -
  2328. USE_1_IPA_RX_REO_RING, remap1,
  2329. remap2);
  2330. }
  2331. hal_compute_reo_remap_ix0(soc->hal_soc, remap0);
  2332. break;
  2333. default:
  2334. dp_err("unknown arch_id 0x%x", soc->arch_id);
  2335. QDF_BUG(0);
  2336. }
  2337. dp_debug("remap1 %x remap2 %x", *remap1, *remap2);
  2338. return true;
  2339. }
  2340. #ifdef IPA_WDI3_TX_TWO_PIPES
  2341. static bool dp_ipa_is_alt_tx_ring(int index)
  2342. {
  2343. return index == IPA_TX_ALT_RING_IDX;
  2344. }
  2345. static bool dp_ipa_is_alt_tx_comp_ring(int index)
  2346. {
  2347. return index == IPA_TX_ALT_COMP_RING_IDX;
  2348. }
  2349. #else /* !IPA_WDI3_TX_TWO_PIPES */
  2350. static bool dp_ipa_is_alt_tx_ring(int index)
  2351. {
  2352. return false;
  2353. }
  2354. static bool dp_ipa_is_alt_tx_comp_ring(int index)
  2355. {
  2356. return false;
  2357. }
  2358. #endif /* IPA_WDI3_TX_TWO_PIPES */
  2359. /**
  2360. * dp_ipa_get_tx_ring_size() - Get Tx ring size for IPA
  2361. *
  2362. * @tx_ring_num: Tx ring number
  2363. * @tx_ipa_ring_sz: Return param only updated for IPA.
  2364. * @soc_cfg_ctx: dp soc cfg context
  2365. *
  2366. * Return: None
  2367. */
  2368. static void dp_ipa_get_tx_ring_size(int tx_ring_num, int *tx_ipa_ring_sz,
  2369. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx)
  2370. {
  2371. if (!soc_cfg_ctx->ipa_enabled)
  2372. return;
  2373. if (tx_ring_num == IPA_TCL_DATA_RING_IDX)
  2374. *tx_ipa_ring_sz = wlan_cfg_ipa_tx_ring_size(soc_cfg_ctx);
  2375. else if (dp_ipa_is_alt_tx_ring(tx_ring_num))
  2376. *tx_ipa_ring_sz = wlan_cfg_ipa_tx_alt_ring_size(soc_cfg_ctx);
  2377. }
  2378. /**
  2379. * dp_ipa_get_tx_comp_ring_size() - Get Tx comp ring size for IPA
  2380. *
  2381. * @tx_comp_ring_num: Tx comp ring number
  2382. * @tx_comp_ipa_ring_sz: Return param only updated for IPA.
  2383. * @soc_cfg_ctx: dp soc cfg context
  2384. *
  2385. * Return: None
  2386. */
  2387. static void dp_ipa_get_tx_comp_ring_size(int tx_comp_ring_num,
  2388. int *tx_comp_ipa_ring_sz,
  2389. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx)
  2390. {
  2391. if (!soc_cfg_ctx->ipa_enabled)
  2392. return;
  2393. if (tx_comp_ring_num == IPA_TCL_DATA_RING_IDX)
  2394. *tx_comp_ipa_ring_sz =
  2395. wlan_cfg_ipa_tx_comp_ring_size(soc_cfg_ctx);
  2396. else if (dp_ipa_is_alt_tx_comp_ring(tx_comp_ring_num))
  2397. *tx_comp_ipa_ring_sz =
  2398. wlan_cfg_ipa_tx_alt_comp_ring_size(soc_cfg_ctx);
  2399. }
  2400. #else
  2401. static uint8_t dp_reo_ring_selection(uint32_t value, uint32_t *ring)
  2402. {
  2403. uint8_t num = 0;
  2404. switch (value) {
  2405. /* should we have all the different possible ring configs */
  2406. case 0xFF:
  2407. num = 8;
  2408. ring[0] = REO_REMAP_SW1;
  2409. ring[1] = REO_REMAP_SW2;
  2410. ring[2] = REO_REMAP_SW3;
  2411. ring[3] = REO_REMAP_SW4;
  2412. ring[4] = REO_REMAP_SW5;
  2413. ring[5] = REO_REMAP_SW6;
  2414. ring[6] = REO_REMAP_SW7;
  2415. ring[7] = REO_REMAP_SW8;
  2416. break;
  2417. case 0x3F:
  2418. num = 6;
  2419. ring[0] = REO_REMAP_SW1;
  2420. ring[1] = REO_REMAP_SW2;
  2421. ring[2] = REO_REMAP_SW3;
  2422. ring[3] = REO_REMAP_SW4;
  2423. ring[4] = REO_REMAP_SW5;
  2424. ring[5] = REO_REMAP_SW6;
  2425. break;
  2426. case 0xF:
  2427. num = 4;
  2428. ring[0] = REO_REMAP_SW1;
  2429. ring[1] = REO_REMAP_SW2;
  2430. ring[2] = REO_REMAP_SW3;
  2431. ring[3] = REO_REMAP_SW4;
  2432. break;
  2433. case 0xE:
  2434. num = 3;
  2435. ring[0] = REO_REMAP_SW2;
  2436. ring[1] = REO_REMAP_SW3;
  2437. ring[2] = REO_REMAP_SW4;
  2438. break;
  2439. case 0xD:
  2440. num = 3;
  2441. ring[0] = REO_REMAP_SW1;
  2442. ring[1] = REO_REMAP_SW3;
  2443. ring[2] = REO_REMAP_SW4;
  2444. break;
  2445. case 0xC:
  2446. num = 2;
  2447. ring[0] = REO_REMAP_SW3;
  2448. ring[1] = REO_REMAP_SW4;
  2449. break;
  2450. case 0xB:
  2451. num = 3;
  2452. ring[0] = REO_REMAP_SW1;
  2453. ring[1] = REO_REMAP_SW2;
  2454. ring[2] = REO_REMAP_SW4;
  2455. break;
  2456. case 0xA:
  2457. num = 2;
  2458. ring[0] = REO_REMAP_SW2;
  2459. ring[1] = REO_REMAP_SW4;
  2460. break;
  2461. case 0x9:
  2462. num = 2;
  2463. ring[0] = REO_REMAP_SW1;
  2464. ring[1] = REO_REMAP_SW4;
  2465. break;
  2466. case 0x8:
  2467. num = 1;
  2468. ring[0] = REO_REMAP_SW4;
  2469. break;
  2470. case 0x7:
  2471. num = 3;
  2472. ring[0] = REO_REMAP_SW1;
  2473. ring[1] = REO_REMAP_SW2;
  2474. ring[2] = REO_REMAP_SW3;
  2475. break;
  2476. case 0x6:
  2477. num = 2;
  2478. ring[0] = REO_REMAP_SW2;
  2479. ring[1] = REO_REMAP_SW3;
  2480. break;
  2481. case 0x5:
  2482. num = 2;
  2483. ring[0] = REO_REMAP_SW1;
  2484. ring[1] = REO_REMAP_SW3;
  2485. break;
  2486. case 0x4:
  2487. num = 1;
  2488. ring[0] = REO_REMAP_SW3;
  2489. break;
  2490. case 0x3:
  2491. num = 2;
  2492. ring[0] = REO_REMAP_SW1;
  2493. ring[1] = REO_REMAP_SW2;
  2494. break;
  2495. case 0x2:
  2496. num = 1;
  2497. ring[0] = REO_REMAP_SW2;
  2498. break;
  2499. case 0x1:
  2500. num = 1;
  2501. ring[0] = REO_REMAP_SW1;
  2502. break;
  2503. default:
  2504. dp_err("unknown reo ring map 0x%x", value);
  2505. QDF_BUG(0);
  2506. }
  2507. return num;
  2508. }
  2509. bool dp_reo_remap_config(struct dp_soc *soc,
  2510. uint32_t *remap0,
  2511. uint32_t *remap1,
  2512. uint32_t *remap2)
  2513. {
  2514. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2515. uint32_t reo_config = wlan_cfg_get_reo_rings_mapping(soc->wlan_cfg_ctx);
  2516. uint8_t num;
  2517. uint32_t ring[WLAN_CFG_NUM_REO_DEST_RING_MAX];
  2518. uint32_t value;
  2519. switch (offload_radio) {
  2520. case dp_nss_cfg_default:
  2521. value = reo_config & WLAN_CFG_NUM_REO_RINGS_MAP_MAX;
  2522. num = dp_reo_ring_selection(value, ring);
  2523. hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
  2524. num, remap1, remap2);
  2525. hal_compute_reo_remap_ix0(soc->hal_soc, remap0);
  2526. break;
  2527. case dp_nss_cfg_first_radio:
  2528. value = reo_config & 0xE;
  2529. num = dp_reo_ring_selection(value, ring);
  2530. hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
  2531. num, remap1, remap2);
  2532. break;
  2533. case dp_nss_cfg_second_radio:
  2534. value = reo_config & 0xD;
  2535. num = dp_reo_ring_selection(value, ring);
  2536. hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
  2537. num, remap1, remap2);
  2538. break;
  2539. case dp_nss_cfg_dbdc:
  2540. case dp_nss_cfg_dbtc:
  2541. /* return false if both or all are offloaded to NSS */
  2542. return false;
  2543. }
  2544. dp_debug("remap1 %x remap2 %x offload_radio %u",
  2545. *remap1, *remap2, offload_radio);
  2546. return true;
  2547. }
  2548. static void dp_ipa_get_tx_ring_size(int ring_num, int *tx_ipa_ring_sz,
  2549. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx)
  2550. {
  2551. }
  2552. static void dp_ipa_get_tx_comp_ring_size(int tx_comp_ring_num,
  2553. int *tx_comp_ipa_ring_sz,
  2554. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx)
  2555. {
  2556. }
  2557. #endif /* IPA_OFFLOAD */
  2558. /**
  2559. * dp_reo_frag_dst_set() - configure reo register to set the
  2560. * fragment destination ring
  2561. * @soc: Datapath soc
  2562. * @frag_dst_ring: output parameter to set fragment destination ring
  2563. *
  2564. * Based on offload_radio below fragment destination rings is selected
  2565. * 0 - TCL
  2566. * 1 - SW1
  2567. * 2 - SW2
  2568. * 3 - SW3
  2569. * 4 - SW4
  2570. * 5 - Release
  2571. * 6 - FW
  2572. * 7 - alternate select
  2573. *
  2574. * Return: void
  2575. */
  2576. void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  2577. {
  2578. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2579. switch (offload_radio) {
  2580. case dp_nss_cfg_default:
  2581. *frag_dst_ring = REO_REMAP_TCL;
  2582. break;
  2583. case dp_nss_cfg_first_radio:
  2584. /*
  2585. * This configuration is valid for single band radio which
  2586. * is also NSS offload.
  2587. */
  2588. case dp_nss_cfg_dbdc:
  2589. case dp_nss_cfg_dbtc:
  2590. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  2591. break;
  2592. default:
  2593. dp_init_err("%pK: dp_reo_frag_dst_set invalid offload radio config", soc);
  2594. break;
  2595. }
  2596. }
  2597. #ifdef WLAN_FEATURE_STATS_EXT
  2598. static inline void dp_create_ext_stats_event(struct dp_soc *soc)
  2599. {
  2600. qdf_event_create(&soc->rx_hw_stats_event);
  2601. }
  2602. #else
  2603. static inline void dp_create_ext_stats_event(struct dp_soc *soc)
  2604. {
  2605. }
  2606. #endif
  2607. static void dp_deinit_tx_pair_by_index(struct dp_soc *soc, int index)
  2608. {
  2609. int tcl_ring_num, wbm_ring_num;
  2610. wlan_cfg_get_tcl_wbm_ring_num_for_index(soc->wlan_cfg_ctx,
  2611. index,
  2612. &tcl_ring_num,
  2613. &wbm_ring_num);
  2614. if (tcl_ring_num == -1) {
  2615. dp_err("incorrect tcl ring num for index %u", index);
  2616. return;
  2617. }
  2618. wlan_minidump_remove(soc->tcl_data_ring[index].base_vaddr_unaligned,
  2619. soc->tcl_data_ring[index].alloc_size,
  2620. soc->ctrl_psoc,
  2621. WLAN_MD_DP_SRNG_TCL_DATA,
  2622. "tcl_data_ring");
  2623. dp_info("index %u tcl %u wbm %u", index, tcl_ring_num, wbm_ring_num);
  2624. dp_srng_deinit(soc, &soc->tcl_data_ring[index], TCL_DATA,
  2625. tcl_ring_num);
  2626. if (wbm_ring_num == INVALID_WBM_RING_NUM)
  2627. return;
  2628. wlan_minidump_remove(soc->tx_comp_ring[index].base_vaddr_unaligned,
  2629. soc->tx_comp_ring[index].alloc_size,
  2630. soc->ctrl_psoc,
  2631. WLAN_MD_DP_SRNG_TX_COMP,
  2632. "tcl_comp_ring");
  2633. dp_srng_deinit(soc, &soc->tx_comp_ring[index], WBM2SW_RELEASE,
  2634. wbm_ring_num);
  2635. }
  2636. /**
  2637. * dp_init_tx_ring_pair_by_index() - The function inits tcl data/wbm completion
  2638. * ring pair
  2639. * @soc: DP soc pointer
  2640. * @index: index of soc->tcl_data or soc->tx_comp to initialize
  2641. *
  2642. * Return: QDF_STATUS_SUCCESS on success, error code otherwise.
  2643. */
  2644. static QDF_STATUS dp_init_tx_ring_pair_by_index(struct dp_soc *soc,
  2645. uint8_t index)
  2646. {
  2647. int tcl_ring_num, wbm_ring_num;
  2648. uint8_t bm_id;
  2649. if (index >= MAX_TCL_DATA_RINGS) {
  2650. dp_err("unexpected index!");
  2651. QDF_BUG(0);
  2652. goto fail1;
  2653. }
  2654. wlan_cfg_get_tcl_wbm_ring_num_for_index(soc->wlan_cfg_ctx,
  2655. index,
  2656. &tcl_ring_num,
  2657. &wbm_ring_num);
  2658. if (tcl_ring_num == -1) {
  2659. dp_err("incorrect tcl ring num for index %u", index);
  2660. goto fail1;
  2661. }
  2662. dp_info("index %u tcl %u wbm %u", index, tcl_ring_num, wbm_ring_num);
  2663. if (dp_srng_init(soc, &soc->tcl_data_ring[index], TCL_DATA,
  2664. tcl_ring_num, 0)) {
  2665. dp_err("dp_srng_init failed for tcl_data_ring");
  2666. goto fail1;
  2667. }
  2668. wlan_minidump_log(soc->tcl_data_ring[index].base_vaddr_unaligned,
  2669. soc->tcl_data_ring[index].alloc_size,
  2670. soc->ctrl_psoc,
  2671. WLAN_MD_DP_SRNG_TCL_DATA,
  2672. "tcl_data_ring");
  2673. if (wbm_ring_num == INVALID_WBM_RING_NUM)
  2674. goto set_rbm;
  2675. if (dp_srng_init(soc, &soc->tx_comp_ring[index], WBM2SW_RELEASE,
  2676. wbm_ring_num, 0)) {
  2677. dp_err("dp_srng_init failed for tx_comp_ring");
  2678. goto fail1;
  2679. }
  2680. wlan_minidump_log(soc->tx_comp_ring[index].base_vaddr_unaligned,
  2681. soc->tx_comp_ring[index].alloc_size,
  2682. soc->ctrl_psoc,
  2683. WLAN_MD_DP_SRNG_TX_COMP,
  2684. "tcl_comp_ring");
  2685. set_rbm:
  2686. bm_id = wlan_cfg_get_rbm_id_for_index(soc->wlan_cfg_ctx, tcl_ring_num);
  2687. soc->arch_ops.tx_implicit_rbm_set(soc, tcl_ring_num, bm_id);
  2688. return QDF_STATUS_SUCCESS;
  2689. fail1:
  2690. return QDF_STATUS_E_FAILURE;
  2691. }
  2692. static void dp_free_tx_ring_pair_by_index(struct dp_soc *soc, uint8_t index)
  2693. {
  2694. dp_debug("index %u", index);
  2695. dp_srng_free(soc, &soc->tcl_data_ring[index]);
  2696. dp_srng_free(soc, &soc->tx_comp_ring[index]);
  2697. }
  2698. /**
  2699. * dp_alloc_tx_ring_pair_by_index() - The function allocs tcl data/wbm2sw
  2700. * ring pair for the given "index"
  2701. * @soc: DP soc pointer
  2702. * @index: index of soc->tcl_data or soc->tx_comp to initialize
  2703. *
  2704. * Return: QDF_STATUS_SUCCESS on success, error code otherwise.
  2705. */
  2706. static QDF_STATUS dp_alloc_tx_ring_pair_by_index(struct dp_soc *soc,
  2707. uint8_t index)
  2708. {
  2709. int tx_ring_size;
  2710. int tx_comp_ring_size;
  2711. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx = soc->wlan_cfg_ctx;
  2712. int cached = 0;
  2713. if (index >= MAX_TCL_DATA_RINGS) {
  2714. dp_err("unexpected index!");
  2715. QDF_BUG(0);
  2716. goto fail1;
  2717. }
  2718. dp_debug("index %u", index);
  2719. tx_ring_size = wlan_cfg_tx_ring_size(soc_cfg_ctx);
  2720. dp_ipa_get_tx_ring_size(index, &tx_ring_size, soc_cfg_ctx);
  2721. if (dp_srng_alloc(soc, &soc->tcl_data_ring[index], TCL_DATA,
  2722. tx_ring_size, cached)) {
  2723. dp_err("dp_srng_alloc failed for tcl_data_ring");
  2724. goto fail1;
  2725. }
  2726. tx_comp_ring_size = wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  2727. dp_ipa_get_tx_comp_ring_size(index, &tx_comp_ring_size, soc_cfg_ctx);
  2728. /* Enable cached TCL desc if NSS offload is disabled */
  2729. if (!wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx))
  2730. cached = WLAN_CFG_DST_RING_CACHED_DESC;
  2731. if (wlan_cfg_get_wbm_ring_num_for_index(soc->wlan_cfg_ctx, index) ==
  2732. INVALID_WBM_RING_NUM)
  2733. return QDF_STATUS_SUCCESS;
  2734. if (dp_srng_alloc(soc, &soc->tx_comp_ring[index], WBM2SW_RELEASE,
  2735. tx_comp_ring_size, cached)) {
  2736. dp_err("dp_srng_alloc failed for tx_comp_ring");
  2737. goto fail1;
  2738. }
  2739. return QDF_STATUS_SUCCESS;
  2740. fail1:
  2741. return QDF_STATUS_E_FAILURE;
  2742. }
  2743. /**
  2744. * dp_dscp_tid_map_setup() - Initialize the dscp-tid maps
  2745. * @pdev: DP_PDEV handle
  2746. *
  2747. * Return: void
  2748. */
  2749. void
  2750. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  2751. {
  2752. uint8_t map_id;
  2753. struct dp_soc *soc = pdev->soc;
  2754. if (!soc)
  2755. return;
  2756. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  2757. qdf_mem_copy(pdev->dscp_tid_map[map_id],
  2758. default_dscp_tid_map,
  2759. sizeof(default_dscp_tid_map));
  2760. }
  2761. for (map_id = 0; map_id < soc->num_hw_dscp_tid_map; map_id++) {
  2762. hal_tx_set_dscp_tid_map(soc->hal_soc,
  2763. default_dscp_tid_map,
  2764. map_id);
  2765. }
  2766. }
  2767. /**
  2768. * dp_pcp_tid_map_setup() - Initialize the pcp-tid maps
  2769. * @pdev: DP_PDEV handle
  2770. *
  2771. * Return: void
  2772. */
  2773. void
  2774. dp_pcp_tid_map_setup(struct dp_pdev *pdev)
  2775. {
  2776. struct dp_soc *soc = pdev->soc;
  2777. if (!soc)
  2778. return;
  2779. qdf_mem_copy(soc->pcp_tid_map, default_pcp_tid_map,
  2780. sizeof(default_pcp_tid_map));
  2781. hal_tx_set_pcp_tid_map_default(soc->hal_soc, default_pcp_tid_map);
  2782. }
  2783. #ifndef DP_UMAC_HW_RESET_SUPPORT
  2784. static inline
  2785. #endif
  2786. void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2787. {
  2788. struct reo_desc_list_node *desc;
  2789. struct dp_rx_tid *rx_tid;
  2790. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2791. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2792. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2793. rx_tid = &desc->rx_tid;
  2794. qdf_mem_unmap_nbytes_single(soc->osdev,
  2795. rx_tid->hw_qdesc_paddr,
  2796. QDF_DMA_BIDIRECTIONAL,
  2797. rx_tid->hw_qdesc_alloc_size);
  2798. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2799. qdf_mem_free(desc);
  2800. }
  2801. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2802. qdf_list_destroy(&soc->reo_desc_freelist);
  2803. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2804. }
  2805. #ifdef WLAN_DP_FEATURE_DEFERRED_REO_QDESC_DESTROY
  2806. /**
  2807. * dp_reo_desc_deferred_freelist_create() - Initialize the resources used
  2808. * for deferred reo desc list
  2809. * @soc: Datapath soc handle
  2810. *
  2811. * Return: void
  2812. */
  2813. static void dp_reo_desc_deferred_freelist_create(struct dp_soc *soc)
  2814. {
  2815. qdf_spinlock_create(&soc->reo_desc_deferred_freelist_lock);
  2816. qdf_list_create(&soc->reo_desc_deferred_freelist,
  2817. REO_DESC_DEFERRED_FREELIST_SIZE);
  2818. soc->reo_desc_deferred_freelist_init = true;
  2819. }
  2820. /**
  2821. * dp_reo_desc_deferred_freelist_destroy() - loop the deferred free list &
  2822. * free the leftover REO QDESCs
  2823. * @soc: Datapath soc handle
  2824. *
  2825. * Return: void
  2826. */
  2827. static void dp_reo_desc_deferred_freelist_destroy(struct dp_soc *soc)
  2828. {
  2829. struct reo_desc_deferred_freelist_node *desc;
  2830. qdf_spin_lock_bh(&soc->reo_desc_deferred_freelist_lock);
  2831. soc->reo_desc_deferred_freelist_init = false;
  2832. while (qdf_list_remove_front(&soc->reo_desc_deferred_freelist,
  2833. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2834. qdf_mem_unmap_nbytes_single(soc->osdev,
  2835. desc->hw_qdesc_paddr,
  2836. QDF_DMA_BIDIRECTIONAL,
  2837. desc->hw_qdesc_alloc_size);
  2838. qdf_mem_free(desc->hw_qdesc_vaddr_unaligned);
  2839. qdf_mem_free(desc);
  2840. }
  2841. qdf_spin_unlock_bh(&soc->reo_desc_deferred_freelist_lock);
  2842. qdf_list_destroy(&soc->reo_desc_deferred_freelist);
  2843. qdf_spinlock_destroy(&soc->reo_desc_deferred_freelist_lock);
  2844. }
  2845. #else
  2846. static inline void dp_reo_desc_deferred_freelist_create(struct dp_soc *soc)
  2847. {
  2848. }
  2849. static inline void dp_reo_desc_deferred_freelist_destroy(struct dp_soc *soc)
  2850. {
  2851. }
  2852. #endif /* !WLAN_DP_FEATURE_DEFERRED_REO_QDESC_DESTROY */
  2853. /**
  2854. * dp_soc_reset_txrx_ring_map() - reset tx ring map
  2855. * @soc: DP SOC handle
  2856. *
  2857. */
  2858. static void dp_soc_reset_txrx_ring_map(struct dp_soc *soc)
  2859. {
  2860. uint32_t i;
  2861. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++)
  2862. soc->tx_ring_map[i] = 0;
  2863. }
  2864. /**
  2865. * dp_soc_deinit() - Deinitialize txrx SOC
  2866. * @txrx_soc: Opaque DP SOC handle
  2867. *
  2868. * Return: None
  2869. */
  2870. void dp_soc_deinit(void *txrx_soc)
  2871. {
  2872. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2873. struct htt_soc *htt_soc = soc->htt_handle;
  2874. dp_monitor_soc_deinit(soc);
  2875. /* free peer tables & AST tables allocated during peer_map_attach */
  2876. if (soc->peer_map_attach_success) {
  2877. dp_peer_find_detach(soc);
  2878. soc->arch_ops.txrx_peer_map_detach(soc);
  2879. soc->peer_map_attach_success = FALSE;
  2880. }
  2881. qdf_flush_work(&soc->htt_stats.work);
  2882. qdf_disable_work(&soc->htt_stats.work);
  2883. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2884. dp_soc_reset_txrx_ring_map(soc);
  2885. dp_reo_desc_freelist_destroy(soc);
  2886. dp_reo_desc_deferred_freelist_destroy(soc);
  2887. DEINIT_RX_HW_STATS_LOCK(soc);
  2888. qdf_spinlock_destroy(&soc->ast_lock);
  2889. dp_peer_mec_spinlock_destroy(soc);
  2890. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2891. qdf_nbuf_queue_free(&soc->invalid_buf_queue);
  2892. qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock);
  2893. qdf_spinlock_destroy(&soc->vdev_map_lock);
  2894. dp_reo_cmdlist_destroy(soc);
  2895. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2896. dp_soc_tx_desc_sw_pools_deinit(soc);
  2897. dp_soc_srng_deinit(soc);
  2898. dp_hw_link_desc_ring_deinit(soc);
  2899. dp_soc_print_inactive_objects(soc);
  2900. qdf_spinlock_destroy(&soc->inactive_peer_list_lock);
  2901. qdf_spinlock_destroy(&soc->inactive_vdev_list_lock);
  2902. htt_soc_htc_dealloc(soc->htt_handle);
  2903. htt_soc_detach(htt_soc);
  2904. /* Free wbm sg list and reset flags in down path */
  2905. dp_rx_wbm_sg_list_deinit(soc);
  2906. wlan_minidump_remove(soc, sizeof(*soc), soc->ctrl_psoc,
  2907. WLAN_MD_DP_SOC, "dp_soc");
  2908. }
  2909. #ifdef QCA_HOST2FW_RXBUF_RING
  2910. void
  2911. dp_htt_setup_rxdma_err_dst_ring(struct dp_soc *soc, int mac_id,
  2912. int lmac_id)
  2913. {
  2914. if (soc->rxdma_err_dst_ring[lmac_id].hal_srng)
  2915. htt_srng_setup(soc->htt_handle, mac_id,
  2916. soc->rxdma_err_dst_ring[lmac_id].hal_srng,
  2917. RXDMA_DST);
  2918. }
  2919. #endif
  2920. void dp_vdev_get_default_reo_hash(struct dp_vdev *vdev,
  2921. enum cdp_host_reo_dest_ring *reo_dest,
  2922. bool *hash_based)
  2923. {
  2924. struct dp_soc *soc;
  2925. struct dp_pdev *pdev;
  2926. pdev = vdev->pdev;
  2927. soc = pdev->soc;
  2928. /*
  2929. * hash based steering is disabled for Radios which are offloaded
  2930. * to NSS
  2931. */
  2932. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  2933. *hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  2934. /*
  2935. * Below line of code will ensure the proper reo_dest ring is chosen
  2936. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  2937. */
  2938. *reo_dest = pdev->reo_dest;
  2939. }
  2940. #ifdef IPA_OFFLOAD
  2941. /**
  2942. * dp_is_vdev_subtype_p2p() - Check if the subtype for vdev is P2P
  2943. * @vdev: Virtual device
  2944. *
  2945. * Return: true if the vdev is of subtype P2P
  2946. * false if the vdev is of any other subtype
  2947. */
  2948. static inline bool dp_is_vdev_subtype_p2p(struct dp_vdev *vdev)
  2949. {
  2950. if (vdev->subtype == wlan_op_subtype_p2p_device ||
  2951. vdev->subtype == wlan_op_subtype_p2p_cli ||
  2952. vdev->subtype == wlan_op_subtype_p2p_go)
  2953. return true;
  2954. return false;
  2955. }
  2956. /**
  2957. * dp_peer_setup_get_reo_hash() - get reo dest ring and hash values for a peer
  2958. * @vdev: Datapath VDEV handle
  2959. * @setup_info:
  2960. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  2961. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  2962. * @lmac_peer_id_msb:
  2963. *
  2964. * If IPA is enabled in ini, for SAP mode, disable hash based
  2965. * steering, use default reo_dst ring for RX. Use config values for other modes.
  2966. *
  2967. * Return: None
  2968. */
  2969. static void dp_peer_setup_get_reo_hash(struct dp_vdev *vdev,
  2970. struct cdp_peer_setup_info *setup_info,
  2971. enum cdp_host_reo_dest_ring *reo_dest,
  2972. bool *hash_based,
  2973. uint8_t *lmac_peer_id_msb)
  2974. {
  2975. struct dp_soc *soc;
  2976. struct dp_pdev *pdev;
  2977. pdev = vdev->pdev;
  2978. soc = pdev->soc;
  2979. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  2980. /* For P2P-GO interfaces we do not need to change the REO
  2981. * configuration even if IPA config is enabled
  2982. */
  2983. if (dp_is_vdev_subtype_p2p(vdev))
  2984. return;
  2985. /*
  2986. * If IPA is enabled, disable hash-based flow steering and set
  2987. * reo_dest_ring_4 as the REO ring to receive packets on.
  2988. * IPA is configured to reap reo_dest_ring_4.
  2989. *
  2990. * Note - REO DST indexes are from 0 - 3, while cdp_host_reo_dest_ring
  2991. * value enum value is from 1 - 4.
  2992. * Hence, *reo_dest = IPA_REO_DEST_RING_IDX + 1
  2993. */
  2994. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  2995. if (dp_ipa_is_mdm_platform()) {
  2996. *reo_dest = IPA_REO_DEST_RING_IDX + 1;
  2997. if (vdev->opmode == wlan_op_mode_ap)
  2998. *hash_based = 0;
  2999. } else {
  3000. dp_debug("opt_dp: default HOST reo ring is set");
  3001. }
  3002. }
  3003. }
  3004. #else
  3005. /**
  3006. * dp_peer_setup_get_reo_hash() - get reo dest ring and hash values for a peer
  3007. * @vdev: Datapath VDEV handle
  3008. * @setup_info:
  3009. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  3010. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  3011. * @lmac_peer_id_msb:
  3012. *
  3013. * Use system config values for hash based steering.
  3014. * Return: None
  3015. */
  3016. static void dp_peer_setup_get_reo_hash(struct dp_vdev *vdev,
  3017. struct cdp_peer_setup_info *setup_info,
  3018. enum cdp_host_reo_dest_ring *reo_dest,
  3019. bool *hash_based,
  3020. uint8_t *lmac_peer_id_msb)
  3021. {
  3022. struct dp_soc *soc = vdev->pdev->soc;
  3023. soc->arch_ops.peer_get_reo_hash(vdev, setup_info, reo_dest, hash_based,
  3024. lmac_peer_id_msb);
  3025. }
  3026. #endif /* IPA_OFFLOAD */
  3027. /**
  3028. * dp_peer_setup_wifi3() - initialize the peer
  3029. * @soc_hdl: soc handle object
  3030. * @vdev_id: vdev_id of vdev object
  3031. * @peer_mac: Peer's mac address
  3032. * @setup_info: peer setup info for MLO
  3033. *
  3034. * Return: QDF_STATUS
  3035. */
  3036. QDF_STATUS
  3037. dp_peer_setup_wifi3(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3038. uint8_t *peer_mac,
  3039. struct cdp_peer_setup_info *setup_info)
  3040. {
  3041. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  3042. struct dp_pdev *pdev;
  3043. bool hash_based = 0;
  3044. enum cdp_host_reo_dest_ring reo_dest;
  3045. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3046. struct dp_vdev *vdev = NULL;
  3047. struct dp_peer *peer =
  3048. dp_peer_find_hash_find(soc, peer_mac, 0, vdev_id,
  3049. DP_MOD_ID_CDP);
  3050. struct dp_peer *mld_peer = NULL;
  3051. enum wlan_op_mode vdev_opmode;
  3052. uint8_t lmac_peer_id_msb = 0;
  3053. if (!peer)
  3054. return QDF_STATUS_E_FAILURE;
  3055. vdev = peer->vdev;
  3056. if (!vdev) {
  3057. status = QDF_STATUS_E_FAILURE;
  3058. goto fail;
  3059. }
  3060. /* save vdev related member in case vdev freed */
  3061. vdev_opmode = vdev->opmode;
  3062. pdev = vdev->pdev;
  3063. dp_peer_setup_get_reo_hash(vdev, setup_info,
  3064. &reo_dest, &hash_based,
  3065. &lmac_peer_id_msb);
  3066. dp_cfg_event_record_peer_setup_evt(soc, DP_CFG_EVENT_PEER_SETUP,
  3067. peer, vdev, vdev->vdev_id,
  3068. setup_info);
  3069. dp_info("pdev: %d vdev :%d opmode:%u peer %pK (" QDF_MAC_ADDR_FMT ") "
  3070. "hash-based-steering:%d default-reo_dest:%u",
  3071. pdev->pdev_id, vdev->vdev_id,
  3072. vdev->opmode, peer,
  3073. QDF_MAC_ADDR_REF(peer->mac_addr.raw), hash_based, reo_dest);
  3074. /*
  3075. * There are corner cases where the AD1 = AD2 = "VAPs address"
  3076. * i.e both the devices have same MAC address. In these
  3077. * cases we want such pkts to be processed in NULL Q handler
  3078. * which is REO2TCL ring. for this reason we should
  3079. * not setup reo_queues and default route for bss_peer.
  3080. */
  3081. if (!IS_MLO_DP_MLD_PEER(peer))
  3082. dp_monitor_peer_tx_init(pdev, peer);
  3083. if (!setup_info)
  3084. if (dp_peer_legacy_setup(soc, peer) !=
  3085. QDF_STATUS_SUCCESS) {
  3086. status = QDF_STATUS_E_RESOURCES;
  3087. goto fail;
  3088. }
  3089. if (peer->bss_peer && vdev->opmode == wlan_op_mode_ap) {
  3090. status = QDF_STATUS_E_FAILURE;
  3091. goto fail;
  3092. }
  3093. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  3094. /* TODO: Check the destination ring number to be passed to FW */
  3095. soc->cdp_soc.ol_ops->peer_set_default_routing(
  3096. soc->ctrl_psoc,
  3097. peer->vdev->pdev->pdev_id,
  3098. peer->mac_addr.raw,
  3099. peer->vdev->vdev_id, hash_based, reo_dest,
  3100. lmac_peer_id_msb);
  3101. }
  3102. qdf_atomic_set(&peer->is_default_route_set, 1);
  3103. status = dp_peer_mlo_setup(soc, peer, vdev->vdev_id, setup_info);
  3104. if (QDF_IS_STATUS_ERROR(status)) {
  3105. dp_peer_err("peer mlo setup failed");
  3106. qdf_assert_always(0);
  3107. }
  3108. if (vdev_opmode != wlan_op_mode_monitor) {
  3109. /* In case of MLD peer, switch peer to mld peer and
  3110. * do peer_rx_init.
  3111. */
  3112. if (hal_reo_shared_qaddr_is_enable(soc->hal_soc) &&
  3113. IS_MLO_DP_LINK_PEER(peer)) {
  3114. if (setup_info && setup_info->is_first_link) {
  3115. mld_peer = DP_GET_MLD_PEER_FROM_PEER(peer);
  3116. if (mld_peer)
  3117. dp_peer_rx_init(pdev, mld_peer);
  3118. else
  3119. dp_peer_err("MLD peer null. Primary link peer:%pK", peer);
  3120. }
  3121. } else {
  3122. dp_peer_rx_init(pdev, peer);
  3123. }
  3124. }
  3125. if (!IS_MLO_DP_MLD_PEER(peer))
  3126. dp_peer_ppdu_delayed_ba_init(peer);
  3127. fail:
  3128. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  3129. return status;
  3130. }
  3131. /**
  3132. * dp_set_ba_aging_timeout() - set ba aging timeout per AC
  3133. * @txrx_soc: cdp soc handle
  3134. * @ac: Access category
  3135. * @value: timeout value in millisec
  3136. *
  3137. * Return: void
  3138. */
  3139. void dp_set_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  3140. uint8_t ac, uint32_t value)
  3141. {
  3142. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3143. hal_set_ba_aging_timeout(soc->hal_soc, ac, value);
  3144. }
  3145. /**
  3146. * dp_get_ba_aging_timeout() - get ba aging timeout per AC
  3147. * @txrx_soc: cdp soc handle
  3148. * @ac: access category
  3149. * @value: timeout value in millisec
  3150. *
  3151. * Return: void
  3152. */
  3153. void dp_get_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  3154. uint8_t ac, uint32_t *value)
  3155. {
  3156. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3157. hal_get_ba_aging_timeout(soc->hal_soc, ac, value);
  3158. }
  3159. /**
  3160. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  3161. * @txrx_soc: cdp soc handle
  3162. * @pdev_id: id of physical device object
  3163. * @val: reo destination ring index (1 - 4)
  3164. *
  3165. * Return: QDF_STATUS
  3166. */
  3167. QDF_STATUS
  3168. dp_set_pdev_reo_dest(struct cdp_soc_t *txrx_soc, uint8_t pdev_id,
  3169. enum cdp_host_reo_dest_ring val)
  3170. {
  3171. struct dp_pdev *pdev =
  3172. dp_get_pdev_from_soc_pdev_id_wifi3((struct dp_soc *)txrx_soc,
  3173. pdev_id);
  3174. if (pdev) {
  3175. pdev->reo_dest = val;
  3176. return QDF_STATUS_SUCCESS;
  3177. }
  3178. return QDF_STATUS_E_FAILURE;
  3179. }
  3180. /**
  3181. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  3182. * @txrx_soc: cdp soc handle
  3183. * @pdev_id: id of physical device object
  3184. *
  3185. * Return: reo destination ring index
  3186. */
  3187. enum cdp_host_reo_dest_ring
  3188. dp_get_pdev_reo_dest(struct cdp_soc_t *txrx_soc, uint8_t pdev_id)
  3189. {
  3190. struct dp_pdev *pdev =
  3191. dp_get_pdev_from_soc_pdev_id_wifi3((struct dp_soc *)txrx_soc,
  3192. pdev_id);
  3193. if (pdev)
  3194. return pdev->reo_dest;
  3195. else
  3196. return cdp_host_reo_dest_ring_unknown;
  3197. }
  3198. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  3199. union hal_reo_status *reo_status)
  3200. {
  3201. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  3202. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  3203. if (!dp_check_pdev_exists(soc, pdev)) {
  3204. dp_err_rl("pdev doesn't exist");
  3205. return;
  3206. }
  3207. if (!qdf_atomic_read(&soc->cmn_init_done))
  3208. return;
  3209. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  3210. DP_PRINT_STATS("REO stats failure %d",
  3211. queue_status->header.status);
  3212. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  3213. return;
  3214. }
  3215. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  3216. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  3217. }
  3218. /**
  3219. * dp_dump_wbm_idle_hptp() - dump wbm idle ring, hw hp tp info.
  3220. * @soc: dp soc.
  3221. * @pdev: dp pdev.
  3222. *
  3223. * Return: None.
  3224. */
  3225. void
  3226. dp_dump_wbm_idle_hptp(struct dp_soc *soc, struct dp_pdev *pdev)
  3227. {
  3228. uint32_t hw_head;
  3229. uint32_t hw_tail;
  3230. struct dp_srng *srng;
  3231. if (!soc) {
  3232. dp_err("soc is NULL");
  3233. return;
  3234. }
  3235. if (!pdev) {
  3236. dp_err("pdev is NULL");
  3237. return;
  3238. }
  3239. srng = &pdev->soc->wbm_idle_link_ring;
  3240. if (!srng) {
  3241. dp_err("wbm_idle_link_ring srng is NULL");
  3242. return;
  3243. }
  3244. hal_get_hw_hptp(soc->hal_soc, srng->hal_srng, &hw_head,
  3245. &hw_tail, WBM_IDLE_LINK);
  3246. dp_debug("WBM_IDLE_LINK: HW hp: %d, HW tp: %d",
  3247. hw_head, hw_tail);
  3248. }
  3249. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  3250. static void dp_update_soft_irq_limits(struct dp_soc *soc, uint32_t tx_limit,
  3251. uint32_t rx_limit)
  3252. {
  3253. soc->wlan_cfg_ctx->tx_comp_loop_pkt_limit = tx_limit;
  3254. soc->wlan_cfg_ctx->rx_reap_loop_pkt_limit = rx_limit;
  3255. }
  3256. #else
  3257. static inline
  3258. void dp_update_soft_irq_limits(struct dp_soc *soc, uint32_t tx_limit,
  3259. uint32_t rx_limit)
  3260. {
  3261. }
  3262. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  3263. /**
  3264. * dp_display_srng_info() - Dump the srng HP TP info
  3265. * @soc_hdl: CDP Soc handle
  3266. *
  3267. * This function dumps the SW hp/tp values for the important rings.
  3268. * HW hp/tp values are not being dumped, since it can lead to
  3269. * READ NOC error when UMAC is in low power state. MCC does not have
  3270. * device force wake working yet.
  3271. *
  3272. * Return: none
  3273. */
  3274. void dp_display_srng_info(struct cdp_soc_t *soc_hdl)
  3275. {
  3276. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3277. hal_soc_handle_t hal_soc = soc->hal_soc;
  3278. uint32_t hp, tp, i;
  3279. dp_info("SRNG HP-TP data:");
  3280. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3281. hal_get_sw_hptp(hal_soc, soc->tcl_data_ring[i].hal_srng,
  3282. &tp, &hp);
  3283. dp_info("TCL DATA ring[%d]: hp=0x%x, tp=0x%x", i, hp, tp);
  3284. if (wlan_cfg_get_wbm_ring_num_for_index(soc->wlan_cfg_ctx, i) ==
  3285. INVALID_WBM_RING_NUM)
  3286. continue;
  3287. hal_get_sw_hptp(hal_soc, soc->tx_comp_ring[i].hal_srng,
  3288. &tp, &hp);
  3289. dp_info("TX comp ring[%d]: hp=0x%x, tp=0x%x", i, hp, tp);
  3290. }
  3291. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3292. hal_get_sw_hptp(hal_soc, soc->reo_dest_ring[i].hal_srng,
  3293. &tp, &hp);
  3294. dp_info("REO DST ring[%d]: hp=0x%x, tp=0x%x", i, hp, tp);
  3295. }
  3296. hal_get_sw_hptp(hal_soc, soc->reo_exception_ring.hal_srng, &tp, &hp);
  3297. dp_info("REO exception ring: hp=0x%x, tp=0x%x", hp, tp);
  3298. hal_get_sw_hptp(hal_soc, soc->rx_rel_ring.hal_srng, &tp, &hp);
  3299. dp_info("WBM RX release ring: hp=0x%x, tp=0x%x", hp, tp);
  3300. hal_get_sw_hptp(hal_soc, soc->wbm_desc_rel_ring.hal_srng, &tp, &hp);
  3301. dp_info("WBM desc release ring: hp=0x%x, tp=0x%x", hp, tp);
  3302. }
  3303. /**
  3304. * dp_set_pdev_pcp_tid_map_wifi3() - update pcp tid map in pdev
  3305. * @psoc: dp soc handle
  3306. * @pdev_id: id of DP_PDEV handle
  3307. * @pcp: pcp value
  3308. * @tid: tid value passed by the user
  3309. *
  3310. * Return: QDF_STATUS_SUCCESS on success
  3311. */
  3312. QDF_STATUS dp_set_pdev_pcp_tid_map_wifi3(ol_txrx_soc_handle psoc,
  3313. uint8_t pdev_id,
  3314. uint8_t pcp, uint8_t tid)
  3315. {
  3316. struct dp_soc *soc = (struct dp_soc *)psoc;
  3317. soc->pcp_tid_map[pcp] = tid;
  3318. hal_tx_update_pcp_tid_map(soc->hal_soc, pcp, tid);
  3319. return QDF_STATUS_SUCCESS;
  3320. }
  3321. /**
  3322. * dp_set_vdev_pcp_tid_map_wifi3() - update pcp tid map in vdev
  3323. * @soc_hdl: DP soc handle
  3324. * @vdev_id: id of DP_VDEV handle
  3325. * @pcp: pcp value
  3326. * @tid: tid value passed by the user
  3327. *
  3328. * Return: QDF_STATUS_SUCCESS on success
  3329. */
  3330. QDF_STATUS dp_set_vdev_pcp_tid_map_wifi3(struct cdp_soc_t *soc_hdl,
  3331. uint8_t vdev_id,
  3332. uint8_t pcp, uint8_t tid)
  3333. {
  3334. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3335. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  3336. DP_MOD_ID_CDP);
  3337. if (!vdev)
  3338. return QDF_STATUS_E_FAILURE;
  3339. vdev->pcp_tid_map[pcp] = tid;
  3340. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  3341. return QDF_STATUS_SUCCESS;
  3342. }
  3343. #if defined(FEATURE_RUNTIME_PM) || defined(DP_POWER_SAVE)
  3344. void dp_drain_txrx(struct cdp_soc_t *soc_handle)
  3345. {
  3346. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  3347. uint32_t cur_tx_limit, cur_rx_limit;
  3348. uint32_t budget = 0xffff;
  3349. uint32_t val;
  3350. int i;
  3351. int cpu = dp_srng_get_cpu();
  3352. cur_tx_limit = soc->wlan_cfg_ctx->tx_comp_loop_pkt_limit;
  3353. cur_rx_limit = soc->wlan_cfg_ctx->rx_reap_loop_pkt_limit;
  3354. /* Temporarily increase soft irq limits when going to drain
  3355. * the UMAC/LMAC SRNGs and restore them after polling.
  3356. * Though the budget is on higher side, the TX/RX reaping loops
  3357. * will not execute longer as both TX and RX would be suspended
  3358. * by the time this API is called.
  3359. */
  3360. dp_update_soft_irq_limits(soc, budget, budget);
  3361. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  3362. dp_service_srngs(&soc->intr_ctx[i], budget, cpu);
  3363. dp_update_soft_irq_limits(soc, cur_tx_limit, cur_rx_limit);
  3364. /* Do a dummy read at offset 0; this will ensure all
  3365. * pendings writes(HP/TP) are flushed before read returns.
  3366. */
  3367. val = HAL_REG_READ((struct hal_soc *)soc->hal_soc, 0);
  3368. dp_debug("Register value at offset 0: %u", val);
  3369. }
  3370. #endif
  3371. #if defined(DP_POWER_SAVE) || defined(FEATURE_RUNTIME_PM)
  3372. /**
  3373. * dp_flush_ring_hptp() - Update ring shadow
  3374. * register HP/TP address when runtime
  3375. * resume
  3376. * @soc: DP soc context
  3377. * @hal_srng: srng
  3378. *
  3379. * Return: None
  3380. */
  3381. static void dp_flush_ring_hptp(struct dp_soc *soc, hal_ring_handle_t hal_srng)
  3382. {
  3383. if (hal_srng && hal_srng_get_clear_event(hal_srng,
  3384. HAL_SRNG_FLUSH_EVENT)) {
  3385. /* Acquire the lock */
  3386. hal_srng_access_start(soc->hal_soc, hal_srng);
  3387. hal_srng_access_end(soc->hal_soc, hal_srng);
  3388. hal_srng_set_flush_last_ts(hal_srng);
  3389. dp_debug("flushed");
  3390. }
  3391. }
  3392. void dp_update_ring_hptp(struct dp_soc *soc, bool force_flush_tx)
  3393. {
  3394. uint8_t i;
  3395. if (force_flush_tx) {
  3396. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3397. hal_srng_set_event(soc->tcl_data_ring[i].hal_srng,
  3398. HAL_SRNG_FLUSH_EVENT);
  3399. dp_flush_ring_hptp(soc, soc->tcl_data_ring[i].hal_srng);
  3400. }
  3401. return;
  3402. }
  3403. for (i = 0; i < soc->num_tcl_data_rings; i++)
  3404. dp_flush_ring_hptp(soc, soc->tcl_data_ring[i].hal_srng);
  3405. dp_flush_ring_hptp(soc, soc->reo_cmd_ring.hal_srng);
  3406. }
  3407. #endif
  3408. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  3409. /*
  3410. * dp_flush_tcl_ring() - flush TCL ring hp
  3411. * @pdev: dp pdev
  3412. * @ring_id: TCL ring id
  3413. *
  3414. * Return: 0 on success and error code on failure
  3415. */
  3416. int dp_flush_tcl_ring(struct dp_pdev *pdev, int ring_id)
  3417. {
  3418. struct dp_soc *soc = pdev->soc;
  3419. hal_ring_handle_t hal_ring_hdl =
  3420. soc->tcl_data_ring[ring_id].hal_srng;
  3421. int ret;
  3422. ret = hal_srng_try_access_start(soc->hal_soc, hal_ring_hdl);
  3423. if (ret)
  3424. return ret;
  3425. ret = hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_DP);
  3426. if (ret) {
  3427. hal_srng_access_end_reap(soc->hal_soc, hal_ring_hdl);
  3428. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  3429. hal_srng_inc_flush_cnt(hal_ring_hdl);
  3430. return ret;
  3431. }
  3432. hal_srng_access_end(soc->hal_soc, hal_ring_hdl);
  3433. hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_DP);
  3434. return ret;
  3435. }
  3436. #else
  3437. int dp_flush_tcl_ring(struct dp_pdev *pdev, int ring_id)
  3438. {
  3439. return QDF_STATUS_SUCCESS;
  3440. }
  3441. #endif
  3442. #ifdef WLAN_FEATURE_STATS_EXT
  3443. /* rx hw stats event wait timeout in ms */
  3444. #define DP_REO_STATUS_STATS_TIMEOUT 100
  3445. /**
  3446. * dp_rx_hw_stats_cb() - request rx hw stats response callback
  3447. * @soc: soc handle
  3448. * @cb_ctxt: callback context
  3449. * @reo_status: reo command response status
  3450. *
  3451. * Return: None
  3452. */
  3453. static void dp_rx_hw_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  3454. union hal_reo_status *reo_status)
  3455. {
  3456. struct dp_req_rx_hw_stats_t *rx_hw_stats = cb_ctxt;
  3457. struct hal_reo_queue_status *queue_status = &reo_status->queue_status;
  3458. bool is_query_timeout;
  3459. qdf_spin_lock_bh(&soc->rx_hw_stats_lock);
  3460. is_query_timeout = rx_hw_stats->is_query_timeout;
  3461. /* free the cb_ctxt if all pending tid stats query is received */
  3462. if (qdf_atomic_dec_and_test(&rx_hw_stats->pending_tid_stats_cnt)) {
  3463. if (!is_query_timeout) {
  3464. qdf_event_set(&soc->rx_hw_stats_event);
  3465. soc->is_last_stats_ctx_init = false;
  3466. }
  3467. qdf_mem_free(rx_hw_stats);
  3468. }
  3469. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  3470. dp_info("REO stats failure %d",
  3471. queue_status->header.status);
  3472. qdf_spin_unlock_bh(&soc->rx_hw_stats_lock);
  3473. return;
  3474. }
  3475. if (!is_query_timeout) {
  3476. soc->ext_stats.rx_mpdu_received +=
  3477. queue_status->mpdu_frms_cnt;
  3478. soc->ext_stats.rx_mpdu_missed +=
  3479. queue_status->hole_cnt;
  3480. }
  3481. qdf_spin_unlock_bh(&soc->rx_hw_stats_lock);
  3482. }
  3483. /**
  3484. * dp_request_rx_hw_stats() - request rx hardware stats
  3485. * @soc_hdl: soc handle
  3486. * @vdev_id: vdev id
  3487. *
  3488. * Return: None
  3489. */
  3490. QDF_STATUS
  3491. dp_request_rx_hw_stats(struct cdp_soc_t *soc_hdl, uint8_t vdev_id)
  3492. {
  3493. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  3494. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  3495. DP_MOD_ID_CDP);
  3496. struct dp_peer *peer = NULL;
  3497. QDF_STATUS status;
  3498. struct dp_req_rx_hw_stats_t *rx_hw_stats;
  3499. int rx_stats_sent_cnt = 0;
  3500. uint32_t last_rx_mpdu_received;
  3501. uint32_t last_rx_mpdu_missed;
  3502. if (!vdev) {
  3503. dp_err("vdev is null for vdev_id: %u", vdev_id);
  3504. status = QDF_STATUS_E_INVAL;
  3505. goto out;
  3506. }
  3507. peer = dp_vdev_bss_peer_ref_n_get(soc, vdev, DP_MOD_ID_CDP);
  3508. if (!peer) {
  3509. dp_err("Peer is NULL");
  3510. status = QDF_STATUS_E_INVAL;
  3511. goto out;
  3512. }
  3513. rx_hw_stats = qdf_mem_malloc(sizeof(*rx_hw_stats));
  3514. if (!rx_hw_stats) {
  3515. dp_err("malloc failed for hw stats structure");
  3516. status = QDF_STATUS_E_INVAL;
  3517. goto out;
  3518. }
  3519. qdf_event_reset(&soc->rx_hw_stats_event);
  3520. qdf_spin_lock_bh(&soc->rx_hw_stats_lock);
  3521. /* save the last soc cumulative stats and reset it to 0 */
  3522. last_rx_mpdu_received = soc->ext_stats.rx_mpdu_received;
  3523. last_rx_mpdu_missed = soc->ext_stats.rx_mpdu_missed;
  3524. soc->ext_stats.rx_mpdu_received = 0;
  3525. soc->ext_stats.rx_mpdu_missed = 0;
  3526. dp_debug("HW stats query start");
  3527. rx_stats_sent_cnt =
  3528. dp_peer_rxtid_stats(peer, dp_rx_hw_stats_cb, rx_hw_stats);
  3529. if (!rx_stats_sent_cnt) {
  3530. dp_err("no tid stats sent successfully");
  3531. qdf_mem_free(rx_hw_stats);
  3532. qdf_spin_unlock_bh(&soc->rx_hw_stats_lock);
  3533. status = QDF_STATUS_E_INVAL;
  3534. goto out;
  3535. }
  3536. qdf_atomic_set(&rx_hw_stats->pending_tid_stats_cnt,
  3537. rx_stats_sent_cnt);
  3538. rx_hw_stats->is_query_timeout = false;
  3539. soc->is_last_stats_ctx_init = true;
  3540. qdf_spin_unlock_bh(&soc->rx_hw_stats_lock);
  3541. status = qdf_wait_single_event(&soc->rx_hw_stats_event,
  3542. DP_REO_STATUS_STATS_TIMEOUT);
  3543. dp_debug("HW stats query end with %d", rx_stats_sent_cnt);
  3544. qdf_spin_lock_bh(&soc->rx_hw_stats_lock);
  3545. if (status != QDF_STATUS_SUCCESS) {
  3546. dp_info("partial rx hw stats event collected with %d",
  3547. qdf_atomic_read(
  3548. &rx_hw_stats->pending_tid_stats_cnt));
  3549. if (soc->is_last_stats_ctx_init)
  3550. rx_hw_stats->is_query_timeout = true;
  3551. /*
  3552. * If query timeout happened, use the last saved stats
  3553. * for this time query.
  3554. */
  3555. soc->ext_stats.rx_mpdu_received = last_rx_mpdu_received;
  3556. soc->ext_stats.rx_mpdu_missed = last_rx_mpdu_missed;
  3557. DP_STATS_INC(soc, rx.rx_hw_stats_timeout, 1);
  3558. }
  3559. qdf_spin_unlock_bh(&soc->rx_hw_stats_lock);
  3560. out:
  3561. if (peer)
  3562. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  3563. if (vdev)
  3564. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  3565. DP_STATS_INC(soc, rx.rx_hw_stats_requested, 1);
  3566. return status;
  3567. }
  3568. /**
  3569. * dp_reset_rx_hw_ext_stats() - Reset rx hardware ext stats
  3570. * @soc_hdl: soc handle
  3571. *
  3572. * Return: None
  3573. */
  3574. void dp_reset_rx_hw_ext_stats(struct cdp_soc_t *soc_hdl)
  3575. {
  3576. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  3577. soc->ext_stats.rx_mpdu_received = 0;
  3578. soc->ext_stats.rx_mpdu_missed = 0;
  3579. }
  3580. #endif /* WLAN_FEATURE_STATS_EXT */
  3581. uint32_t dp_get_tx_rings_grp_bitmap(struct cdp_soc_t *soc_hdl)
  3582. {
  3583. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  3584. return soc->wlan_cfg_ctx->tx_rings_grp_bitmap;
  3585. }
  3586. void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  3587. {
  3588. uint32_t i;
  3589. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  3590. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_DEFAULT_MAP][i];
  3591. }
  3592. }
  3593. qdf_export_symbol(dp_soc_set_txrx_ring_map);
  3594. static void dp_soc_cfg_dump(struct dp_soc *soc, uint32_t target_type)
  3595. {
  3596. dp_init_info("DP soc Dump for Target = %d", target_type);
  3597. dp_init_info("ast_override_support = %d da_war_enabled = %d",
  3598. soc->ast_override_support, soc->da_war_enabled);
  3599. wlan_cfg_dp_soc_ctx_dump(soc->wlan_cfg_ctx);
  3600. }
  3601. /**
  3602. * dp_soc_cfg_init() - initialize target specific configuration
  3603. * during dp_soc_init
  3604. * @soc: dp soc handle
  3605. */
  3606. static void dp_soc_cfg_init(struct dp_soc *soc)
  3607. {
  3608. uint32_t target_type;
  3609. target_type = hal_get_target_type(soc->hal_soc);
  3610. switch (target_type) {
  3611. case TARGET_TYPE_QCA6290:
  3612. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  3613. REO_DST_RING_SIZE_QCA6290);
  3614. soc->ast_override_support = 1;
  3615. soc->da_war_enabled = false;
  3616. break;
  3617. case TARGET_TYPE_QCA6390:
  3618. case TARGET_TYPE_QCA6490:
  3619. case TARGET_TYPE_QCA6750:
  3620. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  3621. REO_DST_RING_SIZE_QCA6290);
  3622. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  3623. soc->ast_override_support = 1;
  3624. if (soc->cdp_soc.ol_ops->get_con_mode &&
  3625. soc->cdp_soc.ol_ops->get_con_mode() ==
  3626. QDF_GLOBAL_MONITOR_MODE) {
  3627. int int_ctx;
  3628. for (int_ctx = 0; int_ctx < WLAN_CFG_INT_NUM_CONTEXTS; int_ctx++) {
  3629. soc->wlan_cfg_ctx->int_rx_ring_mask[int_ctx] = 0;
  3630. soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[int_ctx] = 0;
  3631. }
  3632. }
  3633. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  3634. break;
  3635. case TARGET_TYPE_KIWI:
  3636. case TARGET_TYPE_MANGO:
  3637. case TARGET_TYPE_PEACH:
  3638. soc->ast_override_support = 1;
  3639. soc->per_tid_basize_max_tid = 8;
  3640. if (soc->cdp_soc.ol_ops->get_con_mode &&
  3641. soc->cdp_soc.ol_ops->get_con_mode() ==
  3642. QDF_GLOBAL_MONITOR_MODE) {
  3643. int int_ctx;
  3644. for (int_ctx = 0; int_ctx < WLAN_CFG_INT_NUM_CONTEXTS;
  3645. int_ctx++) {
  3646. soc->wlan_cfg_ctx->int_rx_ring_mask[int_ctx] = 0;
  3647. if (dp_is_monitor_mode_using_poll(soc))
  3648. soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[int_ctx] = 0;
  3649. }
  3650. }
  3651. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  3652. soc->wlan_cfg_ctx->num_rxdma_dst_rings_per_pdev = 1;
  3653. break;
  3654. case TARGET_TYPE_QCA8074:
  3655. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  3656. soc->da_war_enabled = true;
  3657. soc->is_rx_fse_full_cache_invalidate_war_enabled = true;
  3658. break;
  3659. case TARGET_TYPE_QCA8074V2:
  3660. case TARGET_TYPE_QCA6018:
  3661. case TARGET_TYPE_QCA9574:
  3662. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  3663. soc->ast_override_support = 1;
  3664. soc->per_tid_basize_max_tid = 8;
  3665. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS;
  3666. soc->da_war_enabled = false;
  3667. soc->is_rx_fse_full_cache_invalidate_war_enabled = true;
  3668. break;
  3669. case TARGET_TYPE_QCN9000:
  3670. soc->ast_override_support = 1;
  3671. soc->da_war_enabled = false;
  3672. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  3673. soc->per_tid_basize_max_tid = 8;
  3674. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS;
  3675. soc->lmac_polled_mode = 0;
  3676. soc->wbm_release_desc_rx_sg_support = 1;
  3677. soc->is_rx_fse_full_cache_invalidate_war_enabled = true;
  3678. break;
  3679. case TARGET_TYPE_QCA5018:
  3680. case TARGET_TYPE_QCN6122:
  3681. case TARGET_TYPE_QCN9160:
  3682. soc->ast_override_support = 1;
  3683. soc->da_war_enabled = false;
  3684. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  3685. soc->per_tid_basize_max_tid = 8;
  3686. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_MAPS_11AX;
  3687. soc->disable_mac1_intr = 1;
  3688. soc->disable_mac2_intr = 1;
  3689. soc->wbm_release_desc_rx_sg_support = 1;
  3690. break;
  3691. case TARGET_TYPE_QCN9224:
  3692. soc->umac_reset_supported = true;
  3693. soc->ast_override_support = 1;
  3694. soc->da_war_enabled = false;
  3695. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  3696. soc->per_tid_basize_max_tid = 8;
  3697. soc->wbm_release_desc_rx_sg_support = 1;
  3698. soc->rxdma2sw_rings_not_supported = 1;
  3699. soc->wbm_sg_last_msdu_war = 1;
  3700. soc->ast_offload_support = AST_OFFLOAD_ENABLE_STATUS;
  3701. soc->mec_fw_offload = FW_MEC_FW_OFFLOAD_ENABLED;
  3702. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS;
  3703. wlan_cfg_set_txmon_hw_support(soc->wlan_cfg_ctx, true);
  3704. soc->host_ast_db_enable = cfg_get(soc->ctrl_psoc,
  3705. CFG_DP_HOST_AST_DB_ENABLE);
  3706. soc->features.wds_ext_ast_override_enable = true;
  3707. break;
  3708. case TARGET_TYPE_QCA5332:
  3709. case TARGET_TYPE_QCN6432:
  3710. soc->umac_reset_supported = true;
  3711. soc->ast_override_support = 1;
  3712. soc->da_war_enabled = false;
  3713. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  3714. soc->per_tid_basize_max_tid = 8;
  3715. soc->wbm_release_desc_rx_sg_support = 1;
  3716. soc->rxdma2sw_rings_not_supported = 1;
  3717. soc->wbm_sg_last_msdu_war = 1;
  3718. soc->ast_offload_support = AST_OFFLOAD_ENABLE_STATUS;
  3719. soc->mec_fw_offload = FW_MEC_FW_OFFLOAD_ENABLED;
  3720. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS_5332;
  3721. wlan_cfg_set_txmon_hw_support(soc->wlan_cfg_ctx, true);
  3722. soc->host_ast_db_enable = cfg_get(soc->ctrl_psoc,
  3723. CFG_DP_HOST_AST_DB_ENABLE);
  3724. soc->features.wds_ext_ast_override_enable = true;
  3725. break;
  3726. default:
  3727. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  3728. qdf_assert_always(0);
  3729. break;
  3730. }
  3731. dp_soc_cfg_dump(soc, target_type);
  3732. }
  3733. /**
  3734. * dp_soc_get_ap_mld_mode() - store ap mld mode from ini
  3735. * @soc: Opaque DP SOC handle
  3736. *
  3737. * Return: none
  3738. */
  3739. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  3740. static inline void dp_soc_get_ap_mld_mode(struct dp_soc *soc)
  3741. {
  3742. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  3743. soc->mld_mode_ap =
  3744. soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  3745. CDP_CFG_MLD_NETDEV_MODE_AP);
  3746. }
  3747. qdf_info("DP mld_mode_ap-%u\n", soc->mld_mode_ap);
  3748. }
  3749. #else
  3750. static inline void dp_soc_get_ap_mld_mode(struct dp_soc *soc)
  3751. {
  3752. (void)soc;
  3753. }
  3754. #endif
  3755. /**
  3756. * dp_soc_init() - Initialize txrx SOC
  3757. * @soc: Opaque DP SOC handle
  3758. * @htc_handle: Opaque HTC handle
  3759. * @hif_handle: Opaque HIF handle
  3760. *
  3761. * Return: DP SOC handle on success, NULL on failure
  3762. */
  3763. void *dp_soc_init(struct dp_soc *soc, HTC_HANDLE htc_handle,
  3764. struct hif_opaque_softc *hif_handle)
  3765. {
  3766. struct htt_soc *htt_soc = (struct htt_soc *)soc->htt_handle;
  3767. bool is_monitor_mode = false;
  3768. uint8_t i;
  3769. int num_dp_msi;
  3770. bool ppeds_attached = false;
  3771. htt_soc = htt_soc_attach(soc, htc_handle);
  3772. if (!htt_soc)
  3773. goto fail1;
  3774. soc->htt_handle = htt_soc;
  3775. if (htt_soc_htc_prealloc(htt_soc) != QDF_STATUS_SUCCESS)
  3776. goto fail2;
  3777. htt_set_htc_handle(htt_soc, htc_handle);
  3778. dp_soc_cfg_init(soc);
  3779. dp_monitor_soc_cfg_init(soc);
  3780. /* Reset/Initialize wbm sg list and flags */
  3781. dp_rx_wbm_sg_list_reset(soc);
  3782. /* Note: Any SRNG ring initialization should happen only after
  3783. * Interrupt mode is set and followed by filling up the
  3784. * interrupt mask. IT SHOULD ALWAYS BE IN THIS ORDER.
  3785. */
  3786. dp_soc_set_interrupt_mode(soc);
  3787. if (soc->cdp_soc.ol_ops->get_con_mode &&
  3788. soc->cdp_soc.ol_ops->get_con_mode() ==
  3789. QDF_GLOBAL_MONITOR_MODE) {
  3790. is_monitor_mode = true;
  3791. soc->curr_rx_pkt_tlv_size = soc->rx_mon_pkt_tlv_size;
  3792. } else {
  3793. soc->curr_rx_pkt_tlv_size = soc->rx_pkt_tlv_size;
  3794. }
  3795. num_dp_msi = dp_get_num_msi_available(soc, soc->intr_mode);
  3796. if (num_dp_msi < 0) {
  3797. dp_init_err("%pK: dp_interrupt assignment failed", soc);
  3798. goto fail3;
  3799. }
  3800. if (soc->arch_ops.ppeds_handle_attached)
  3801. ppeds_attached = soc->arch_ops.ppeds_handle_attached(soc);
  3802. wlan_cfg_fill_interrupt_mask(soc->wlan_cfg_ctx, num_dp_msi,
  3803. soc->intr_mode, is_monitor_mode,
  3804. ppeds_attached,
  3805. soc->umac_reset_supported);
  3806. /* initialize WBM_IDLE_LINK ring */
  3807. if (dp_hw_link_desc_ring_init(soc)) {
  3808. dp_init_err("%pK: dp_hw_link_desc_ring_init failed", soc);
  3809. goto fail3;
  3810. }
  3811. dp_link_desc_ring_replenish(soc, WLAN_INVALID_PDEV_ID);
  3812. if (dp_soc_srng_init(soc)) {
  3813. dp_init_err("%pK: dp_soc_srng_init failed", soc);
  3814. goto fail4;
  3815. }
  3816. if (htt_soc_initialize(soc->htt_handle, soc->ctrl_psoc,
  3817. htt_get_htc_handle(htt_soc),
  3818. soc->hal_soc, soc->osdev) == NULL)
  3819. goto fail5;
  3820. /* Initialize descriptors in TCL Rings */
  3821. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3822. hal_tx_init_data_ring(soc->hal_soc,
  3823. soc->tcl_data_ring[i].hal_srng);
  3824. }
  3825. if (dp_soc_tx_desc_sw_pools_init(soc)) {
  3826. dp_init_err("%pK: dp_tx_soc_attach failed", soc);
  3827. goto fail6;
  3828. }
  3829. if (soc->arch_ops.txrx_soc_ppeds_start) {
  3830. if (soc->arch_ops.txrx_soc_ppeds_start(soc)) {
  3831. dp_init_err("%pK: ppeds start failed", soc);
  3832. goto fail7;
  3833. }
  3834. }
  3835. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx,
  3836. cfg_get(soc->ctrl_psoc, CFG_DP_RX_HASH));
  3837. #ifdef WLAN_SUPPORT_RX_FLOW_TAG
  3838. wlan_cfg_set_rx_rr(soc->wlan_cfg_ctx,
  3839. cfg_get(soc->ctrl_psoc, CFG_DP_RX_RR));
  3840. #endif
  3841. soc->cce_disable = false;
  3842. soc->max_ast_ageout_count = MAX_AST_AGEOUT_COUNT;
  3843. soc->sta_mode_search_policy = DP_TX_ADDR_SEARCH_ADDR_POLICY;
  3844. qdf_mem_zero(&soc->vdev_id_map, sizeof(soc->vdev_id_map));
  3845. qdf_spinlock_create(&soc->vdev_map_lock);
  3846. qdf_atomic_init(&soc->num_tx_outstanding);
  3847. qdf_atomic_init(&soc->num_tx_exception);
  3848. soc->num_tx_allowed =
  3849. wlan_cfg_get_dp_soc_tx_device_limit(soc->wlan_cfg_ctx);
  3850. soc->num_tx_spl_allowed =
  3851. wlan_cfg_get_dp_soc_tx_spl_device_limit(soc->wlan_cfg_ctx);
  3852. soc->num_reg_tx_allowed = soc->num_tx_allowed - soc->num_tx_spl_allowed;
  3853. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  3854. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  3855. CDP_CFG_MAX_PEER_ID);
  3856. if (ret != -EINVAL)
  3857. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  3858. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  3859. CDP_CFG_CCE_DISABLE);
  3860. if (ret == 1)
  3861. soc->cce_disable = true;
  3862. }
  3863. /*
  3864. * Skip registering hw ring interrupts for WMAC2 on IPQ6018
  3865. * and IPQ5018 WMAC2 is not there in these platforms.
  3866. */
  3867. if (hal_get_target_type(soc->hal_soc) == TARGET_TYPE_QCA6018 ||
  3868. soc->disable_mac2_intr)
  3869. dp_soc_disable_unused_mac_intr_mask(soc, 0x2);
  3870. /*
  3871. * Skip registering hw ring interrupts for WMAC1 on IPQ5018
  3872. * WMAC1 is not there in this platform.
  3873. */
  3874. if (soc->disable_mac1_intr)
  3875. dp_soc_disable_unused_mac_intr_mask(soc, 0x1);
  3876. /* setup the global rx defrag waitlist */
  3877. TAILQ_INIT(&soc->rx.defrag.waitlist);
  3878. soc->rx.defrag.timeout_ms =
  3879. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  3880. soc->rx.defrag.next_flush_ms = 0;
  3881. soc->rx.flags.defrag_timeout_check =
  3882. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  3883. qdf_spinlock_create(&soc->rx.defrag.defrag_lock);
  3884. dp_monitor_soc_init(soc);
  3885. qdf_atomic_set(&soc->cmn_init_done, 1);
  3886. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  3887. qdf_spinlock_create(&soc->ast_lock);
  3888. dp_peer_mec_spinlock_create(soc);
  3889. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  3890. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  3891. INIT_RX_HW_STATS_LOCK(soc);
  3892. qdf_nbuf_queue_init(&soc->invalid_buf_queue);
  3893. /* fill the tx/rx cpu ring map*/
  3894. dp_soc_set_txrx_ring_map(soc);
  3895. TAILQ_INIT(&soc->inactive_peer_list);
  3896. qdf_spinlock_create(&soc->inactive_peer_list_lock);
  3897. TAILQ_INIT(&soc->inactive_vdev_list);
  3898. qdf_spinlock_create(&soc->inactive_vdev_list_lock);
  3899. qdf_spinlock_create(&soc->htt_stats.lock);
  3900. /* initialize work queue for stats processing */
  3901. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  3902. dp_reo_desc_deferred_freelist_create(soc);
  3903. dp_info("Mem stats: DMA = %u HEAP = %u SKB = %u",
  3904. qdf_dma_mem_stats_read(),
  3905. qdf_heap_mem_stats_read(),
  3906. qdf_skb_total_mem_stats_read());
  3907. soc->vdev_stats_id_map = 0;
  3908. dp_soc_get_ap_mld_mode(soc);
  3909. return soc;
  3910. fail7:
  3911. dp_soc_tx_desc_sw_pools_deinit(soc);
  3912. fail6:
  3913. htt_soc_htc_dealloc(soc->htt_handle);
  3914. fail5:
  3915. dp_soc_srng_deinit(soc);
  3916. fail4:
  3917. dp_hw_link_desc_ring_deinit(soc);
  3918. fail3:
  3919. htt_htc_pkt_pool_free(htt_soc);
  3920. fail2:
  3921. htt_soc_detach(htt_soc);
  3922. fail1:
  3923. return NULL;
  3924. }
  3925. #ifndef WLAN_DP_DISABLE_TCL_CMD_CRED_SRNG
  3926. static inline QDF_STATUS dp_soc_tcl_cmd_cred_srng_init(struct dp_soc *soc)
  3927. {
  3928. QDF_STATUS status;
  3929. if (soc->init_tcl_cmd_cred_ring) {
  3930. status = dp_srng_init(soc, &soc->tcl_cmd_credit_ring,
  3931. TCL_CMD_CREDIT, 0, 0);
  3932. if (QDF_IS_STATUS_ERROR(status))
  3933. return status;
  3934. wlan_minidump_log(soc->tcl_cmd_credit_ring.base_vaddr_unaligned,
  3935. soc->tcl_cmd_credit_ring.alloc_size,
  3936. soc->ctrl_psoc,
  3937. WLAN_MD_DP_SRNG_TCL_CMD,
  3938. "wbm_desc_rel_ring");
  3939. }
  3940. return QDF_STATUS_SUCCESS;
  3941. }
  3942. static inline void dp_soc_tcl_cmd_cred_srng_deinit(struct dp_soc *soc)
  3943. {
  3944. if (soc->init_tcl_cmd_cred_ring) {
  3945. wlan_minidump_remove(soc->tcl_cmd_credit_ring.base_vaddr_unaligned,
  3946. soc->tcl_cmd_credit_ring.alloc_size,
  3947. soc->ctrl_psoc, WLAN_MD_DP_SRNG_TCL_CMD,
  3948. "wbm_desc_rel_ring");
  3949. dp_srng_deinit(soc, &soc->tcl_cmd_credit_ring,
  3950. TCL_CMD_CREDIT, 0);
  3951. }
  3952. }
  3953. static inline QDF_STATUS dp_soc_tcl_cmd_cred_srng_alloc(struct dp_soc *soc)
  3954. {
  3955. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx = soc->wlan_cfg_ctx;
  3956. uint32_t entries;
  3957. QDF_STATUS status;
  3958. entries = wlan_cfg_get_dp_soc_tcl_cmd_credit_ring_size(soc_cfg_ctx);
  3959. if (soc->init_tcl_cmd_cred_ring) {
  3960. status = dp_srng_alloc(soc, &soc->tcl_cmd_credit_ring,
  3961. TCL_CMD_CREDIT, entries, 0);
  3962. if (QDF_IS_STATUS_ERROR(status))
  3963. return status;
  3964. }
  3965. return QDF_STATUS_SUCCESS;
  3966. }
  3967. static inline void dp_soc_tcl_cmd_cred_srng_free(struct dp_soc *soc)
  3968. {
  3969. if (soc->init_tcl_cmd_cred_ring)
  3970. dp_srng_free(soc, &soc->tcl_cmd_credit_ring);
  3971. }
  3972. inline void dp_tx_init_cmd_credit_ring(struct dp_soc *soc)
  3973. {
  3974. if (soc->init_tcl_cmd_cred_ring)
  3975. hal_tx_init_cmd_credit_ring(soc->hal_soc,
  3976. soc->tcl_cmd_credit_ring.hal_srng);
  3977. }
  3978. #else
  3979. static inline QDF_STATUS dp_soc_tcl_cmd_cred_srng_init(struct dp_soc *soc)
  3980. {
  3981. return QDF_STATUS_SUCCESS;
  3982. }
  3983. static inline void dp_soc_tcl_cmd_cred_srng_deinit(struct dp_soc *soc)
  3984. {
  3985. }
  3986. static inline QDF_STATUS dp_soc_tcl_cmd_cred_srng_alloc(struct dp_soc *soc)
  3987. {
  3988. return QDF_STATUS_SUCCESS;
  3989. }
  3990. static inline void dp_soc_tcl_cmd_cred_srng_free(struct dp_soc *soc)
  3991. {
  3992. }
  3993. inline void dp_tx_init_cmd_credit_ring(struct dp_soc *soc)
  3994. {
  3995. }
  3996. #endif
  3997. #ifndef WLAN_DP_DISABLE_TCL_STATUS_SRNG
  3998. static inline QDF_STATUS dp_soc_tcl_status_srng_init(struct dp_soc *soc)
  3999. {
  4000. QDF_STATUS status;
  4001. status = dp_srng_init(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0);
  4002. if (QDF_IS_STATUS_ERROR(status))
  4003. return status;
  4004. wlan_minidump_log(soc->tcl_status_ring.base_vaddr_unaligned,
  4005. soc->tcl_status_ring.alloc_size,
  4006. soc->ctrl_psoc,
  4007. WLAN_MD_DP_SRNG_TCL_STATUS,
  4008. "wbm_desc_rel_ring");
  4009. return QDF_STATUS_SUCCESS;
  4010. }
  4011. static inline void dp_soc_tcl_status_srng_deinit(struct dp_soc *soc)
  4012. {
  4013. wlan_minidump_remove(soc->tcl_status_ring.base_vaddr_unaligned,
  4014. soc->tcl_status_ring.alloc_size,
  4015. soc->ctrl_psoc, WLAN_MD_DP_SRNG_TCL_STATUS,
  4016. "wbm_desc_rel_ring");
  4017. dp_srng_deinit(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  4018. }
  4019. static inline QDF_STATUS dp_soc_tcl_status_srng_alloc(struct dp_soc *soc)
  4020. {
  4021. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx = soc->wlan_cfg_ctx;
  4022. uint32_t entries;
  4023. QDF_STATUS status = QDF_STATUS_SUCCESS;
  4024. entries = wlan_cfg_get_dp_soc_tcl_status_ring_size(soc_cfg_ctx);
  4025. status = dp_srng_alloc(soc, &soc->tcl_status_ring,
  4026. TCL_STATUS, entries, 0);
  4027. return status;
  4028. }
  4029. static inline void dp_soc_tcl_status_srng_free(struct dp_soc *soc)
  4030. {
  4031. dp_srng_free(soc, &soc->tcl_status_ring);
  4032. }
  4033. #else
  4034. static inline QDF_STATUS dp_soc_tcl_status_srng_init(struct dp_soc *soc)
  4035. {
  4036. return QDF_STATUS_SUCCESS;
  4037. }
  4038. static inline void dp_soc_tcl_status_srng_deinit(struct dp_soc *soc)
  4039. {
  4040. }
  4041. static inline QDF_STATUS dp_soc_tcl_status_srng_alloc(struct dp_soc *soc)
  4042. {
  4043. return QDF_STATUS_SUCCESS;
  4044. }
  4045. static inline void dp_soc_tcl_status_srng_free(struct dp_soc *soc)
  4046. {
  4047. }
  4048. #endif
  4049. /**
  4050. * dp_soc_srng_deinit() - de-initialize soc srng rings
  4051. * @soc: Datapath soc handle
  4052. *
  4053. */
  4054. void dp_soc_srng_deinit(struct dp_soc *soc)
  4055. {
  4056. uint32_t i;
  4057. if (soc->arch_ops.txrx_soc_srng_deinit)
  4058. soc->arch_ops.txrx_soc_srng_deinit(soc);
  4059. /* Free the ring memories */
  4060. /* Common rings */
  4061. wlan_minidump_remove(soc->wbm_desc_rel_ring.base_vaddr_unaligned,
  4062. soc->wbm_desc_rel_ring.alloc_size,
  4063. soc->ctrl_psoc, WLAN_MD_DP_SRNG_WBM_DESC_REL,
  4064. "wbm_desc_rel_ring");
  4065. dp_srng_deinit(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  4066. /* Tx data rings */
  4067. for (i = 0; i < soc->num_tcl_data_rings; i++)
  4068. dp_deinit_tx_pair_by_index(soc, i);
  4069. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  4070. dp_deinit_tx_pair_by_index(soc, IPA_TCL_DATA_RING_IDX);
  4071. dp_ipa_deinit_alt_tx_ring(soc);
  4072. }
  4073. /* TCL command and status rings */
  4074. dp_soc_tcl_cmd_cred_srng_deinit(soc);
  4075. dp_soc_tcl_status_srng_deinit(soc);
  4076. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  4077. /* TODO: Get number of rings and ring sizes
  4078. * from wlan_cfg
  4079. */
  4080. wlan_minidump_remove(soc->reo_dest_ring[i].base_vaddr_unaligned,
  4081. soc->reo_dest_ring[i].alloc_size,
  4082. soc->ctrl_psoc, WLAN_MD_DP_SRNG_REO_DEST,
  4083. "reo_dest_ring");
  4084. dp_srng_deinit(soc, &soc->reo_dest_ring[i], REO_DST, i);
  4085. }
  4086. /* REO reinjection ring */
  4087. wlan_minidump_remove(soc->reo_reinject_ring.base_vaddr_unaligned,
  4088. soc->reo_reinject_ring.alloc_size,
  4089. soc->ctrl_psoc, WLAN_MD_DP_SRNG_REO_REINJECT,
  4090. "reo_reinject_ring");
  4091. dp_srng_deinit(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  4092. /* Rx release ring */
  4093. wlan_minidump_remove(soc->rx_rel_ring.base_vaddr_unaligned,
  4094. soc->rx_rel_ring.alloc_size,
  4095. soc->ctrl_psoc, WLAN_MD_DP_SRNG_RX_REL,
  4096. "reo_release_ring");
  4097. dp_srng_deinit(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  4098. /* Rx exception ring */
  4099. /* TODO: Better to store ring_type and ring_num in
  4100. * dp_srng during setup
  4101. */
  4102. wlan_minidump_remove(soc->reo_exception_ring.base_vaddr_unaligned,
  4103. soc->reo_exception_ring.alloc_size,
  4104. soc->ctrl_psoc, WLAN_MD_DP_SRNG_REO_EXCEPTION,
  4105. "reo_exception_ring");
  4106. dp_srng_deinit(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  4107. /* REO command and status rings */
  4108. wlan_minidump_remove(soc->reo_cmd_ring.base_vaddr_unaligned,
  4109. soc->reo_cmd_ring.alloc_size,
  4110. soc->ctrl_psoc, WLAN_MD_DP_SRNG_REO_CMD,
  4111. "reo_cmd_ring");
  4112. dp_srng_deinit(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  4113. wlan_minidump_remove(soc->reo_status_ring.base_vaddr_unaligned,
  4114. soc->reo_status_ring.alloc_size,
  4115. soc->ctrl_psoc, WLAN_MD_DP_SRNG_REO_STATUS,
  4116. "reo_status_ring");
  4117. dp_srng_deinit(soc, &soc->reo_status_ring, REO_STATUS, 0);
  4118. }
  4119. /**
  4120. * dp_soc_srng_init() - Initialize soc level srng rings
  4121. * @soc: Datapath soc handle
  4122. *
  4123. * Return: QDF_STATUS_SUCCESS on success
  4124. * QDF_STATUS_E_FAILURE on failure
  4125. */
  4126. QDF_STATUS dp_soc_srng_init(struct dp_soc *soc)
  4127. {
  4128. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  4129. uint8_t i;
  4130. uint8_t wbm2_sw_rx_rel_ring_id;
  4131. soc_cfg_ctx = soc->wlan_cfg_ctx;
  4132. dp_enable_verbose_debug(soc);
  4133. /* WBM descriptor release ring */
  4134. if (dp_srng_init(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0)) {
  4135. dp_init_err("%pK: dp_srng_init failed for wbm_desc_rel_ring", soc);
  4136. goto fail1;
  4137. }
  4138. wlan_minidump_log(soc->wbm_desc_rel_ring.base_vaddr_unaligned,
  4139. soc->wbm_desc_rel_ring.alloc_size,
  4140. soc->ctrl_psoc,
  4141. WLAN_MD_DP_SRNG_WBM_DESC_REL,
  4142. "wbm_desc_rel_ring");
  4143. /* TCL command and status rings */
  4144. if (dp_soc_tcl_cmd_cred_srng_init(soc)) {
  4145. dp_init_err("%pK: dp_srng_init failed for tcl_cmd_ring", soc);
  4146. goto fail1;
  4147. }
  4148. if (dp_soc_tcl_status_srng_init(soc)) {
  4149. dp_init_err("%pK: dp_srng_init failed for tcl_status_ring", soc);
  4150. goto fail1;
  4151. }
  4152. /* REO reinjection ring */
  4153. if (dp_srng_init(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0)) {
  4154. dp_init_err("%pK: dp_srng_init failed for reo_reinject_ring", soc);
  4155. goto fail1;
  4156. }
  4157. wlan_minidump_log(soc->reo_reinject_ring.base_vaddr_unaligned,
  4158. soc->reo_reinject_ring.alloc_size,
  4159. soc->ctrl_psoc,
  4160. WLAN_MD_DP_SRNG_REO_REINJECT,
  4161. "reo_reinject_ring");
  4162. wbm2_sw_rx_rel_ring_id = wlan_cfg_get_rx_rel_ring_id(soc_cfg_ctx);
  4163. /* Rx release ring */
  4164. if (dp_srng_init(soc, &soc->rx_rel_ring, WBM2SW_RELEASE,
  4165. wbm2_sw_rx_rel_ring_id, 0)) {
  4166. dp_init_err("%pK: dp_srng_init failed for rx_rel_ring", soc);
  4167. goto fail1;
  4168. }
  4169. wlan_minidump_log(soc->rx_rel_ring.base_vaddr_unaligned,
  4170. soc->rx_rel_ring.alloc_size,
  4171. soc->ctrl_psoc,
  4172. WLAN_MD_DP_SRNG_RX_REL,
  4173. "reo_release_ring");
  4174. /* Rx exception ring */
  4175. if (dp_srng_init(soc, &soc->reo_exception_ring,
  4176. REO_EXCEPTION, 0, MAX_REO_DEST_RINGS)) {
  4177. dp_init_err("%pK: dp_srng_init failed - reo_exception", soc);
  4178. goto fail1;
  4179. }
  4180. wlan_minidump_log(soc->reo_exception_ring.base_vaddr_unaligned,
  4181. soc->reo_exception_ring.alloc_size,
  4182. soc->ctrl_psoc,
  4183. WLAN_MD_DP_SRNG_REO_EXCEPTION,
  4184. "reo_exception_ring");
  4185. /* REO command and status rings */
  4186. if (dp_srng_init(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0)) {
  4187. dp_init_err("%pK: dp_srng_init failed for reo_cmd_ring", soc);
  4188. goto fail1;
  4189. }
  4190. wlan_minidump_log(soc->reo_cmd_ring.base_vaddr_unaligned,
  4191. soc->reo_cmd_ring.alloc_size,
  4192. soc->ctrl_psoc,
  4193. WLAN_MD_DP_SRNG_REO_CMD,
  4194. "reo_cmd_ring");
  4195. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  4196. TAILQ_INIT(&soc->rx.reo_cmd_list);
  4197. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  4198. if (dp_srng_init(soc, &soc->reo_status_ring, REO_STATUS, 0, 0)) {
  4199. dp_init_err("%pK: dp_srng_init failed for reo_status_ring", soc);
  4200. goto fail1;
  4201. }
  4202. wlan_minidump_log(soc->reo_status_ring.base_vaddr_unaligned,
  4203. soc->reo_status_ring.alloc_size,
  4204. soc->ctrl_psoc,
  4205. WLAN_MD_DP_SRNG_REO_STATUS,
  4206. "reo_status_ring");
  4207. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  4208. if (dp_init_tx_ring_pair_by_index(soc, i))
  4209. goto fail1;
  4210. }
  4211. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  4212. if (dp_init_tx_ring_pair_by_index(soc, IPA_TCL_DATA_RING_IDX))
  4213. goto fail1;
  4214. if (dp_ipa_init_alt_tx_ring(soc))
  4215. goto fail1;
  4216. }
  4217. dp_create_ext_stats_event(soc);
  4218. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  4219. /* Initialize REO destination ring */
  4220. if (dp_srng_init(soc, &soc->reo_dest_ring[i], REO_DST, i, 0)) {
  4221. dp_init_err("%pK: dp_srng_init failed for reo_dest_ringn", soc);
  4222. goto fail1;
  4223. }
  4224. wlan_minidump_log(soc->reo_dest_ring[i].base_vaddr_unaligned,
  4225. soc->reo_dest_ring[i].alloc_size,
  4226. soc->ctrl_psoc,
  4227. WLAN_MD_DP_SRNG_REO_DEST,
  4228. "reo_dest_ring");
  4229. }
  4230. if (soc->arch_ops.txrx_soc_srng_init) {
  4231. if (soc->arch_ops.txrx_soc_srng_init(soc)) {
  4232. dp_init_err("%pK: dp_srng_init failed for arch rings",
  4233. soc);
  4234. goto fail1;
  4235. }
  4236. }
  4237. return QDF_STATUS_SUCCESS;
  4238. fail1:
  4239. /*
  4240. * Cleanup will be done as part of soc_detach, which will
  4241. * be called on pdev attach failure
  4242. */
  4243. dp_soc_srng_deinit(soc);
  4244. return QDF_STATUS_E_FAILURE;
  4245. }
  4246. /**
  4247. * dp_soc_srng_free() - free soc level srng rings
  4248. * @soc: Datapath soc handle
  4249. *
  4250. */
  4251. void dp_soc_srng_free(struct dp_soc *soc)
  4252. {
  4253. uint32_t i;
  4254. if (soc->arch_ops.txrx_soc_srng_free)
  4255. soc->arch_ops.txrx_soc_srng_free(soc);
  4256. dp_srng_free(soc, &soc->wbm_desc_rel_ring);
  4257. for (i = 0; i < soc->num_tcl_data_rings; i++)
  4258. dp_free_tx_ring_pair_by_index(soc, i);
  4259. /* Free IPA rings for TCL_TX and TCL_COMPL ring */
  4260. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  4261. dp_free_tx_ring_pair_by_index(soc, IPA_TCL_DATA_RING_IDX);
  4262. dp_ipa_free_alt_tx_ring(soc);
  4263. }
  4264. dp_soc_tcl_cmd_cred_srng_free(soc);
  4265. dp_soc_tcl_status_srng_free(soc);
  4266. for (i = 0; i < soc->num_reo_dest_rings; i++)
  4267. dp_srng_free(soc, &soc->reo_dest_ring[i]);
  4268. dp_srng_free(soc, &soc->reo_reinject_ring);
  4269. dp_srng_free(soc, &soc->rx_rel_ring);
  4270. dp_srng_free(soc, &soc->reo_exception_ring);
  4271. dp_srng_free(soc, &soc->reo_cmd_ring);
  4272. dp_srng_free(soc, &soc->reo_status_ring);
  4273. }
  4274. /**
  4275. * dp_soc_srng_alloc() - Allocate memory for soc level srng rings
  4276. * @soc: Datapath soc handle
  4277. *
  4278. * Return: QDF_STATUS_SUCCESS on success
  4279. * QDF_STATUS_E_NOMEM on failure
  4280. */
  4281. QDF_STATUS dp_soc_srng_alloc(struct dp_soc *soc)
  4282. {
  4283. uint32_t entries;
  4284. uint32_t i;
  4285. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  4286. uint32_t cached = WLAN_CFG_DST_RING_CACHED_DESC;
  4287. uint32_t reo_dst_ring_size;
  4288. soc_cfg_ctx = soc->wlan_cfg_ctx;
  4289. /* sw2wbm link descriptor release ring */
  4290. entries = wlan_cfg_get_dp_soc_wbm_release_ring_size(soc_cfg_ctx);
  4291. if (dp_srng_alloc(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE,
  4292. entries, 0)) {
  4293. dp_init_err("%pK: dp_srng_alloc failed for wbm_desc_rel_ring", soc);
  4294. goto fail1;
  4295. }
  4296. /* TCL command and status rings */
  4297. if (dp_soc_tcl_cmd_cred_srng_alloc(soc)) {
  4298. dp_init_err("%pK: dp_srng_alloc failed for tcl_cmd_ring", soc);
  4299. goto fail1;
  4300. }
  4301. if (dp_soc_tcl_status_srng_alloc(soc)) {
  4302. dp_init_err("%pK: dp_srng_alloc failed for tcl_status_ring", soc);
  4303. goto fail1;
  4304. }
  4305. /* REO reinjection ring */
  4306. entries = wlan_cfg_get_dp_soc_reo_reinject_ring_size(soc_cfg_ctx);
  4307. if (dp_srng_alloc(soc, &soc->reo_reinject_ring, REO_REINJECT,
  4308. entries, 0)) {
  4309. dp_init_err("%pK: dp_srng_alloc failed for reo_reinject_ring", soc);
  4310. goto fail1;
  4311. }
  4312. /* Rx release ring */
  4313. entries = wlan_cfg_get_dp_soc_rx_release_ring_size(soc_cfg_ctx);
  4314. if (dp_srng_alloc(soc, &soc->rx_rel_ring, WBM2SW_RELEASE,
  4315. entries, 0)) {
  4316. dp_init_err("%pK: dp_srng_alloc failed for rx_rel_ring", soc);
  4317. goto fail1;
  4318. }
  4319. /* Rx exception ring */
  4320. entries = wlan_cfg_get_dp_soc_reo_exception_ring_size(soc_cfg_ctx);
  4321. if (dp_srng_alloc(soc, &soc->reo_exception_ring, REO_EXCEPTION,
  4322. entries, 0)) {
  4323. dp_init_err("%pK: dp_srng_alloc failed - reo_exception", soc);
  4324. goto fail1;
  4325. }
  4326. /* REO command and status rings */
  4327. entries = wlan_cfg_get_dp_soc_reo_cmd_ring_size(soc_cfg_ctx);
  4328. if (dp_srng_alloc(soc, &soc->reo_cmd_ring, REO_CMD, entries, 0)) {
  4329. dp_init_err("%pK: dp_srng_alloc failed for reo_cmd_ring", soc);
  4330. goto fail1;
  4331. }
  4332. entries = wlan_cfg_get_dp_soc_reo_status_ring_size(soc_cfg_ctx);
  4333. if (dp_srng_alloc(soc, &soc->reo_status_ring, REO_STATUS,
  4334. entries, 0)) {
  4335. dp_init_err("%pK: dp_srng_alloc failed for reo_status_ring", soc);
  4336. goto fail1;
  4337. }
  4338. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc_cfg_ctx);
  4339. /* Disable cached desc if NSS offload is enabled */
  4340. if (wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx))
  4341. cached = 0;
  4342. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  4343. if (dp_alloc_tx_ring_pair_by_index(soc, i))
  4344. goto fail1;
  4345. }
  4346. /* IPA rings for TCL_TX and TX_COMP will be allocated here */
  4347. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  4348. if (dp_alloc_tx_ring_pair_by_index(soc, IPA_TCL_DATA_RING_IDX))
  4349. goto fail1;
  4350. if (dp_ipa_alloc_alt_tx_ring(soc))
  4351. goto fail1;
  4352. }
  4353. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  4354. /* Setup REO destination ring */
  4355. if (dp_srng_alloc(soc, &soc->reo_dest_ring[i], REO_DST,
  4356. reo_dst_ring_size, cached)) {
  4357. dp_init_err("%pK: dp_srng_alloc failed for reo_dest_ring", soc);
  4358. goto fail1;
  4359. }
  4360. }
  4361. if (soc->arch_ops.txrx_soc_srng_alloc) {
  4362. if (soc->arch_ops.txrx_soc_srng_alloc(soc)) {
  4363. dp_init_err("%pK: dp_srng_alloc failed for arch rings",
  4364. soc);
  4365. goto fail1;
  4366. }
  4367. }
  4368. return QDF_STATUS_SUCCESS;
  4369. fail1:
  4370. dp_soc_srng_free(soc);
  4371. return QDF_STATUS_E_NOMEM;
  4372. }
  4373. /**
  4374. * dp_soc_cfg_attach() - set target specific configuration in
  4375. * dp soc cfg.
  4376. * @soc: dp soc handle
  4377. */
  4378. void dp_soc_cfg_attach(struct dp_soc *soc)
  4379. {
  4380. int target_type;
  4381. int nss_cfg = 0;
  4382. target_type = hal_get_target_type(soc->hal_soc);
  4383. switch (target_type) {
  4384. case TARGET_TYPE_QCA6290:
  4385. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  4386. REO_DST_RING_SIZE_QCA6290);
  4387. break;
  4388. case TARGET_TYPE_QCA6390:
  4389. case TARGET_TYPE_QCA6490:
  4390. case TARGET_TYPE_QCA6750:
  4391. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  4392. REO_DST_RING_SIZE_QCA6290);
  4393. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  4394. break;
  4395. case TARGET_TYPE_KIWI:
  4396. case TARGET_TYPE_MANGO:
  4397. case TARGET_TYPE_PEACH:
  4398. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  4399. break;
  4400. case TARGET_TYPE_QCA8074:
  4401. wlan_cfg_set_tso_desc_attach_defer(soc->wlan_cfg_ctx, 1);
  4402. break;
  4403. case TARGET_TYPE_QCA8074V2:
  4404. case TARGET_TYPE_QCA6018:
  4405. case TARGET_TYPE_QCA9574:
  4406. case TARGET_TYPE_QCN6122:
  4407. case TARGET_TYPE_QCA5018:
  4408. wlan_cfg_set_tso_desc_attach_defer(soc->wlan_cfg_ctx, 1);
  4409. wlan_cfg_set_rxdma1_enable(soc->wlan_cfg_ctx);
  4410. break;
  4411. case TARGET_TYPE_QCN9160:
  4412. wlan_cfg_set_tso_desc_attach_defer(soc->wlan_cfg_ctx, 1);
  4413. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  4414. break;
  4415. case TARGET_TYPE_QCN9000:
  4416. wlan_cfg_set_tso_desc_attach_defer(soc->wlan_cfg_ctx, 1);
  4417. wlan_cfg_set_rxdma1_enable(soc->wlan_cfg_ctx);
  4418. break;
  4419. case TARGET_TYPE_QCN9224:
  4420. case TARGET_TYPE_QCA5332:
  4421. case TARGET_TYPE_QCN6432:
  4422. wlan_cfg_set_tso_desc_attach_defer(soc->wlan_cfg_ctx, 1);
  4423. wlan_cfg_set_rxdma1_enable(soc->wlan_cfg_ctx);
  4424. break;
  4425. default:
  4426. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  4427. qdf_assert_always(0);
  4428. break;
  4429. }
  4430. if (soc->cdp_soc.ol_ops->get_soc_nss_cfg)
  4431. nss_cfg = soc->cdp_soc.ol_ops->get_soc_nss_cfg(soc->ctrl_psoc);
  4432. wlan_cfg_set_dp_soc_nss_cfg(soc->wlan_cfg_ctx, nss_cfg);
  4433. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  4434. wlan_cfg_set_num_tx_desc_pool(soc->wlan_cfg_ctx, 0);
  4435. wlan_cfg_set_num_tx_ext_desc_pool(soc->wlan_cfg_ctx, 0);
  4436. wlan_cfg_set_num_tx_desc(soc->wlan_cfg_ctx, 0);
  4437. wlan_cfg_set_num_tx_ext_desc(soc->wlan_cfg_ctx, 0);
  4438. soc->init_tcl_cmd_cred_ring = false;
  4439. soc->num_tcl_data_rings =
  4440. wlan_cfg_num_nss_tcl_data_rings(soc->wlan_cfg_ctx);
  4441. soc->num_reo_dest_rings =
  4442. wlan_cfg_num_nss_reo_dest_rings(soc->wlan_cfg_ctx);
  4443. } else {
  4444. soc->init_tcl_cmd_cred_ring = true;
  4445. soc->num_tx_comp_rings =
  4446. wlan_cfg_num_tx_comp_rings(soc->wlan_cfg_ctx);
  4447. soc->num_tcl_data_rings =
  4448. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  4449. soc->num_reo_dest_rings =
  4450. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  4451. }
  4452. }
  4453. void dp_pdev_set_default_reo(struct dp_pdev *pdev)
  4454. {
  4455. struct dp_soc *soc = pdev->soc;
  4456. switch (pdev->pdev_id) {
  4457. case 0:
  4458. pdev->reo_dest =
  4459. wlan_cfg_radio0_default_reo_get(soc->wlan_cfg_ctx);
  4460. break;
  4461. case 1:
  4462. pdev->reo_dest =
  4463. wlan_cfg_radio1_default_reo_get(soc->wlan_cfg_ctx);
  4464. break;
  4465. case 2:
  4466. pdev->reo_dest =
  4467. wlan_cfg_radio2_default_reo_get(soc->wlan_cfg_ctx);
  4468. break;
  4469. default:
  4470. dp_init_err("%pK: Invalid pdev_id %d for reo selection",
  4471. soc, pdev->pdev_id);
  4472. break;
  4473. }
  4474. }