dp_rx.h 44 KB

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  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _DP_RX_H
  19. #define _DP_RX_H
  20. #include "hal_rx.h"
  21. #include "dp_tx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #ifdef RXDMA_OPTIMIZATION
  25. #ifndef RX_DATA_BUFFER_ALIGNMENT
  26. #define RX_DATA_BUFFER_ALIGNMENT 128
  27. #endif
  28. #ifndef RX_MONITOR_BUFFER_ALIGNMENT
  29. #define RX_MONITOR_BUFFER_ALIGNMENT 128
  30. #endif
  31. #else /* RXDMA_OPTIMIZATION */
  32. #define RX_DATA_BUFFER_ALIGNMENT 4
  33. #define RX_MONITOR_BUFFER_ALIGNMENT 4
  34. #endif /* RXDMA_OPTIMIZATION */
  35. #ifdef QCA_HOST2FW_RXBUF_RING
  36. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW1_BM
  37. /* RBM value used for re-injecting defragmented packets into REO */
  38. #define DP_DEFRAG_RBM HAL_RX_BUF_RBM_SW3_BM
  39. #else
  40. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW3_BM
  41. #define DP_DEFRAG_RBM DP_WBM2SW_RBM
  42. #endif /* QCA_HOST2FW_RXBUF_RING */
  43. #define RX_BUFFER_RESERVATION 0
  44. #define DP_PEER_METADATA_PEER_ID_MASK 0x0000ffff
  45. #define DP_PEER_METADATA_PEER_ID_SHIFT 0
  46. #define DP_PEER_METADATA_VDEV_ID_MASK 0x003f0000
  47. #define DP_PEER_METADATA_VDEV_ID_SHIFT 16
  48. #define DP_PEER_METADATA_PEER_ID_GET(_peer_metadata) \
  49. (((_peer_metadata) & DP_PEER_METADATA_PEER_ID_MASK) \
  50. >> DP_PEER_METADATA_PEER_ID_SHIFT)
  51. #define DP_PEER_METADATA_VDEV_ID_GET(_peer_metadata) \
  52. (((_peer_metadata) & DP_PEER_METADATA_VDEV_ID_MASK) \
  53. >> DP_PEER_METADATA_VDEV_ID_SHIFT)
  54. #define DP_RX_DESC_MAGIC 0xdec0de
  55. /**
  56. * enum dp_rx_desc_state
  57. *
  58. * @RX_DESC_REPLENISH: rx desc replenished
  59. * @RX_DESC_FREELIST: rx desc in freelist
  60. */
  61. enum dp_rx_desc_state {
  62. RX_DESC_REPLENISHED,
  63. RX_DESC_IN_FREELIST,
  64. };
  65. /**
  66. * struct dp_rx_desc_dbg_info
  67. *
  68. * @freelist_caller: name of the function that put the
  69. * the rx desc in freelist
  70. * @freelist_ts: timestamp when the rx desc is put in
  71. * a freelist
  72. * @replenish_caller: name of the function that last
  73. * replenished the rx desc
  74. * @replenish_ts: last replenish timestamp
  75. */
  76. struct dp_rx_desc_dbg_info {
  77. char freelist_caller[QDF_MEM_FUNC_NAME_SIZE];
  78. uint64_t freelist_ts;
  79. char replenish_caller[QDF_MEM_FUNC_NAME_SIZE];
  80. uint64_t replenish_ts;
  81. };
  82. /**
  83. * struct dp_rx_desc
  84. *
  85. * @nbuf : VA of the "skb" posted
  86. * @rx_buf_start : VA of the original Rx buffer, before
  87. * movement of any skb->data pointer
  88. * @paddr_buf_start : PA of the original Rx buffer, before
  89. * movement of any frag pointer
  90. * @cookie : index into the sw array which holds
  91. * the sw Rx descriptors
  92. * Cookie space is 21 bits:
  93. * lower 18 bits -- index
  94. * upper 3 bits -- pool_id
  95. * @pool_id : pool Id for which this allocated.
  96. * Can only be used if there is no flow
  97. * steering
  98. * @in_use rx_desc is in use
  99. * @unmapped used to mark rx_desc an unmapped if the corresponding
  100. * nbuf is already unmapped
  101. * @in_err_state : Nbuf sanity failed for this descriptor.
  102. */
  103. struct dp_rx_desc {
  104. qdf_nbuf_t nbuf;
  105. uint8_t *rx_buf_start;
  106. qdf_dma_addr_t paddr_buf_start;
  107. uint32_t cookie;
  108. uint8_t pool_id;
  109. #ifdef RX_DESC_DEBUG_CHECK
  110. uint32_t magic;
  111. struct dp_rx_desc_dbg_info *dbg_info;
  112. #endif
  113. uint8_t in_use:1,
  114. unmapped:1,
  115. in_err_state:1;
  116. };
  117. /* RX Descriptor Multi Page memory alloc related */
  118. #define DP_RX_DESC_OFFSET_NUM_BITS 8
  119. #define DP_RX_DESC_PAGE_ID_NUM_BITS 8
  120. #define DP_RX_DESC_POOL_ID_NUM_BITS 4
  121. #define DP_RX_DESC_PAGE_ID_SHIFT DP_RX_DESC_OFFSET_NUM_BITS
  122. #define DP_RX_DESC_POOL_ID_SHIFT \
  123. (DP_RX_DESC_OFFSET_NUM_BITS + DP_RX_DESC_PAGE_ID_NUM_BITS)
  124. #define RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK \
  125. (((1 << DP_RX_DESC_POOL_ID_NUM_BITS) - 1) << DP_RX_DESC_POOL_ID_SHIFT)
  126. #define RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK \
  127. (((1 << DP_RX_DESC_PAGE_ID_NUM_BITS) - 1) << \
  128. DP_RX_DESC_PAGE_ID_SHIFT)
  129. #define RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK \
  130. ((1 << DP_RX_DESC_OFFSET_NUM_BITS) - 1)
  131. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(_cookie) \
  132. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK) >> \
  133. DP_RX_DESC_POOL_ID_SHIFT)
  134. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(_cookie) \
  135. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK) >> \
  136. DP_RX_DESC_PAGE_ID_SHIFT)
  137. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(_cookie) \
  138. ((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK)
  139. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  140. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  141. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  142. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  143. #define DP_RX_DESC_COOKIE_MAX \
  144. (RX_DESC_COOKIE_INDEX_MASK | RX_DESC_COOKIE_POOL_ID_MASK)
  145. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  146. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  147. RX_DESC_COOKIE_POOL_ID_SHIFT)
  148. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  149. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  150. RX_DESC_COOKIE_INDEX_SHIFT)
  151. #define FRAME_MASK_IPV4_ARP 1
  152. #define FRAME_MASK_IPV4_DHCP 2
  153. #define FRAME_MASK_IPV4_EAPOL 4
  154. #define FRAME_MASK_IPV6_DHCP 8
  155. #define dp_rx_add_to_free_desc_list(head, tail, new) \
  156. __dp_rx_add_to_free_desc_list(head, tail, new, __func__)
  157. #define dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  158. num_buffers, desc_list, tail) \
  159. __dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  160. num_buffers, desc_list, tail, __func__)
  161. #ifdef DP_RX_SPECIAL_FRAME_NEED
  162. /**
  163. * dp_rx_is_special_frame() - check is RX frame special needed
  164. *
  165. * @nbuf: RX skb pointer
  166. * @frame_mask: the mask for speical frame needed
  167. *
  168. * Check is RX frame wanted matched with mask
  169. *
  170. * Return: true - special frame needed, false - no
  171. */
  172. static inline
  173. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  174. {
  175. if (((frame_mask & FRAME_MASK_IPV4_ARP) &&
  176. qdf_nbuf_is_ipv4_arp_pkt(nbuf)) ||
  177. ((frame_mask & FRAME_MASK_IPV4_DHCP) &&
  178. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) ||
  179. ((frame_mask & FRAME_MASK_IPV4_EAPOL) &&
  180. qdf_nbuf_is_ipv4_eapol_pkt(nbuf)) ||
  181. ((frame_mask & FRAME_MASK_IPV6_DHCP) &&
  182. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf)))
  183. return true;
  184. return false;
  185. }
  186. /**
  187. * dp_rx_deliver_special_frame() - Deliver the RX special frame to stack
  188. * if matches mask
  189. *
  190. * @soc: Datapath soc handler
  191. * @peer: pointer to DP peer
  192. * @nbuf: pointer to the skb of RX frame
  193. * @frame_mask: the mask for speical frame needed
  194. * @rx_tlv_hdr: start of rx tlv header
  195. *
  196. * note: Msdu_len must have been stored in QDF_NBUF_CB_RX_PKT_LEN(nbuf) and
  197. * single nbuf is expected.
  198. *
  199. * return: true - nbuf has been delivered to stack, false - not.
  200. */
  201. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  202. qdf_nbuf_t nbuf, uint32_t frame_mask,
  203. uint8_t *rx_tlv_hdr);
  204. #else
  205. static inline
  206. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  207. {
  208. return false;
  209. }
  210. static inline
  211. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  212. qdf_nbuf_t nbuf, uint32_t frame_mask,
  213. uint8_t *rx_tlv_hdr)
  214. {
  215. return false;
  216. }
  217. #endif
  218. /* DOC: Offset to obtain LLC hdr
  219. *
  220. * In the case of Wifi parse error
  221. * to reach LLC header from beginning
  222. * of VLAN tag we need to skip 8 bytes.
  223. * Vlan_tag(4)+length(2)+length added
  224. * by HW(2) = 8 bytes.
  225. */
  226. #define DP_SKIP_VLAN 8
  227. /**
  228. * struct dp_rx_cached_buf - rx cached buffer
  229. * @list: linked list node
  230. * @buf: skb buffer
  231. */
  232. struct dp_rx_cached_buf {
  233. qdf_list_node_t node;
  234. qdf_nbuf_t buf;
  235. };
  236. /*
  237. *dp_rx_xor_block() - xor block of data
  238. *@b: destination data block
  239. *@a: source data block
  240. *@len: length of the data to process
  241. *
  242. *Returns: None
  243. */
  244. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  245. {
  246. qdf_size_t i;
  247. for (i = 0; i < len; i++)
  248. b[i] ^= a[i];
  249. }
  250. /*
  251. *dp_rx_rotl() - rotate the bits left
  252. *@val: unsigned integer input value
  253. *@bits: number of bits
  254. *
  255. *Returns: Integer with left rotated by number of 'bits'
  256. */
  257. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  258. {
  259. return (val << bits) | (val >> (32 - bits));
  260. }
  261. /*
  262. *dp_rx_rotr() - rotate the bits right
  263. *@val: unsigned integer input value
  264. *@bits: number of bits
  265. *
  266. *Returns: Integer with right rotated by number of 'bits'
  267. */
  268. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  269. {
  270. return (val >> bits) | (val << (32 - bits));
  271. }
  272. /*
  273. * dp_set_rx_queue() - set queue_mapping in skb
  274. * @nbuf: skb
  275. * @queue_id: rx queue_id
  276. *
  277. * Return: void
  278. */
  279. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  280. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  281. {
  282. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  283. return;
  284. }
  285. #else
  286. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  287. {
  288. }
  289. #endif
  290. /*
  291. *dp_rx_xswap() - swap the bits left
  292. *@val: unsigned integer input value
  293. *
  294. *Returns: Integer with bits swapped
  295. */
  296. static inline uint32_t dp_rx_xswap(uint32_t val)
  297. {
  298. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  299. }
  300. /*
  301. *dp_rx_get_le32_split() - get little endian 32 bits split
  302. *@b0: byte 0
  303. *@b1: byte 1
  304. *@b2: byte 2
  305. *@b3: byte 3
  306. *
  307. *Returns: Integer with split little endian 32 bits
  308. */
  309. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  310. uint8_t b3)
  311. {
  312. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  313. }
  314. /*
  315. *dp_rx_get_le32() - get little endian 32 bits
  316. *@b0: byte 0
  317. *@b1: byte 1
  318. *@b2: byte 2
  319. *@b3: byte 3
  320. *
  321. *Returns: Integer with little endian 32 bits
  322. */
  323. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  324. {
  325. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  326. }
  327. /*
  328. * dp_rx_put_le32() - put little endian 32 bits
  329. * @p: destination char array
  330. * @v: source 32-bit integer
  331. *
  332. * Returns: None
  333. */
  334. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  335. {
  336. p[0] = (v) & 0xff;
  337. p[1] = (v >> 8) & 0xff;
  338. p[2] = (v >> 16) & 0xff;
  339. p[3] = (v >> 24) & 0xff;
  340. }
  341. /* Extract michal mic block of data */
  342. #define dp_rx_michael_block(l, r) \
  343. do { \
  344. r ^= dp_rx_rotl(l, 17); \
  345. l += r; \
  346. r ^= dp_rx_xswap(l); \
  347. l += r; \
  348. r ^= dp_rx_rotl(l, 3); \
  349. l += r; \
  350. r ^= dp_rx_rotr(l, 2); \
  351. l += r; \
  352. } while (0)
  353. /**
  354. * struct dp_rx_desc_list_elem_t
  355. *
  356. * @next : Next pointer to form free list
  357. * @rx_desc : DP Rx descriptor
  358. */
  359. union dp_rx_desc_list_elem_t {
  360. union dp_rx_desc_list_elem_t *next;
  361. struct dp_rx_desc rx_desc;
  362. };
  363. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  364. /**
  365. * dp_rx_desc_find() - find dp rx descriptor from page ID and offset
  366. * @page_id: Page ID
  367. * @offset: Offset of the descriptor element
  368. *
  369. * Return: RX descriptor element
  370. */
  371. union dp_rx_desc_list_elem_t *dp_rx_desc_find(uint16_t page_id, uint16_t offset,
  372. struct rx_desc_pool *rx_pool);
  373. static inline
  374. struct dp_rx_desc *dp_get_rx_desc_from_cookie(struct dp_soc *soc,
  375. struct rx_desc_pool *pool,
  376. uint32_t cookie)
  377. {
  378. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  379. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  380. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  381. struct rx_desc_pool *rx_desc_pool;
  382. union dp_rx_desc_list_elem_t *rx_desc_elem;
  383. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  384. return NULL;
  385. rx_desc_pool = &pool[pool_id];
  386. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  387. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  388. rx_desc_pool->elem_size * offset);
  389. return &rx_desc_elem->rx_desc;
  390. }
  391. /**
  392. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  393. * the Rx descriptor on Rx DMA source ring buffer
  394. * @soc: core txrx main context
  395. * @cookie: cookie used to lookup virtual address
  396. *
  397. * Return: Pointer to the Rx descriptor
  398. */
  399. static inline
  400. struct dp_rx_desc *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc,
  401. uint32_t cookie)
  402. {
  403. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_buf[0], cookie);
  404. }
  405. /**
  406. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  407. * the Rx descriptor on monitor ring buffer
  408. * @soc: core txrx main context
  409. * @cookie: cookie used to lookup virtual address
  410. *
  411. * Return: Pointer to the Rx descriptor
  412. */
  413. static inline
  414. struct dp_rx_desc *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc,
  415. uint32_t cookie)
  416. {
  417. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_mon[0], cookie);
  418. }
  419. /**
  420. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  421. * the Rx descriptor on monitor status ring buffer
  422. * @soc: core txrx main context
  423. * @cookie: cookie used to lookup virtual address
  424. *
  425. * Return: Pointer to the Rx descriptor
  426. */
  427. static inline
  428. struct dp_rx_desc *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc,
  429. uint32_t cookie)
  430. {
  431. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_status[0], cookie);
  432. }
  433. #else
  434. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  435. uint32_t pool_size,
  436. struct rx_desc_pool *rx_desc_pool);
  437. /**
  438. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  439. * the Rx descriptor on Rx DMA source ring buffer
  440. * @soc: core txrx main context
  441. * @cookie: cookie used to lookup virtual address
  442. *
  443. * Return: void *: Virtual Address of the Rx descriptor
  444. */
  445. static inline
  446. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  447. {
  448. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  449. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  450. struct rx_desc_pool *rx_desc_pool;
  451. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  452. return NULL;
  453. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  454. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  455. return NULL;
  456. return &(soc->rx_desc_buf[pool_id].array[index].rx_desc);
  457. }
  458. /**
  459. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  460. * the Rx descriptor on monitor ring buffer
  461. * @soc: core txrx main context
  462. * @cookie: cookie used to lookup virtual address
  463. *
  464. * Return: void *: Virtual Address of the Rx descriptor
  465. */
  466. static inline
  467. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  468. {
  469. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  470. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  471. /* TODO */
  472. /* Add sanity for pool_id & index */
  473. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  474. }
  475. /**
  476. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  477. * the Rx descriptor on monitor status ring buffer
  478. * @soc: core txrx main context
  479. * @cookie: cookie used to lookup virtual address
  480. *
  481. * Return: void *: Virtual Address of the Rx descriptor
  482. */
  483. static inline
  484. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  485. {
  486. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  487. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  488. /* TODO */
  489. /* Add sanity for pool_id & index */
  490. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  491. }
  492. #endif /* RX_DESC_MULTI_PAGE_ALLOC */
  493. #ifdef DP_RX_DESC_COOKIE_INVALIDATE
  494. static inline QDF_STATUS
  495. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  496. {
  497. if (qdf_unlikely(HAL_RX_REO_BUF_COOKIE_INVALID_GET(ring_desc)))
  498. return QDF_STATUS_E_FAILURE;
  499. HAL_RX_REO_BUF_COOKIE_INVALID_SET(ring_desc);
  500. return QDF_STATUS_SUCCESS;
  501. }
  502. #else
  503. static inline QDF_STATUS
  504. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  505. {
  506. return QDF_STATUS_SUCCESS;
  507. }
  508. #endif
  509. QDF_STATUS dp_rx_desc_pool_is_allocated(struct rx_desc_pool *rx_desc_pool);
  510. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc,
  511. uint32_t pool_size,
  512. struct rx_desc_pool *rx_desc_pool);
  513. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  514. uint32_t pool_size,
  515. struct rx_desc_pool *rx_desc_pool);
  516. void dp_rx_pdev_mon_buf_buffers_free(struct dp_pdev *pdev, uint32_t mac_id);
  517. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  518. union dp_rx_desc_list_elem_t **local_desc_list,
  519. union dp_rx_desc_list_elem_t **tail,
  520. uint16_t pool_id,
  521. struct rx_desc_pool *rx_desc_pool);
  522. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  523. struct rx_desc_pool *rx_desc_pool,
  524. uint16_t num_descs,
  525. union dp_rx_desc_list_elem_t **desc_list,
  526. union dp_rx_desc_list_elem_t **tail);
  527. QDF_STATUS dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev);
  528. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev);
  529. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev);
  530. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev);
  531. void dp_rx_desc_pool_deinit(struct dp_soc *soc,
  532. struct rx_desc_pool *rx_desc_pool);
  533. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  534. QDF_STATUS dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev);
  535. void dp_rx_pdev_buffers_free(struct dp_pdev *pdev);
  536. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  537. void dp_print_napi_stats(struct dp_soc *soc);
  538. /**
  539. * dp_rx_vdev_detach() - detach vdev from dp rx
  540. * @vdev: virtual device instance
  541. *
  542. * Return: QDF_STATUS_SUCCESS: success
  543. * QDF_STATUS_E_RESOURCES: Error return
  544. */
  545. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev);
  546. uint32_t
  547. dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  548. uint8_t reo_ring_num,
  549. uint32_t quota);
  550. /**
  551. * dp_rx_err_process() - Processes error frames routed to REO error ring
  552. * @int_ctx: pointer to DP interrupt context
  553. * @soc: core txrx main context
  554. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  555. * @quota: No. of units (packets) that can be serviced in one shot.
  556. *
  557. * This function implements error processing and top level demultiplexer
  558. * for all the frames routed to REO error ring.
  559. *
  560. * Return: uint32_t: No. of elements processed
  561. */
  562. uint32_t dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  563. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  564. /**
  565. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  566. * @int_ctx: pointer to DP interrupt context
  567. * @soc: core txrx main context
  568. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  569. * @quota: No. of units (packets) that can be serviced in one shot.
  570. *
  571. * This function implements error processing and top level demultiplexer
  572. * for all the frames routed to WBM2HOST sw release ring.
  573. *
  574. * Return: uint32_t: No. of elements processed
  575. */
  576. uint32_t
  577. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  578. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  579. /**
  580. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  581. * multiple nbufs.
  582. * @nbuf: pointer to the first msdu of an amsdu.
  583. *
  584. * This function implements the creation of RX frag_list for cases
  585. * where an MSDU is spread across multiple nbufs.
  586. *
  587. * Return: returns the head nbuf which contains complete frag_list.
  588. */
  589. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf);
  590. /*
  591. * dp_rx_desc_nbuf_and_pool_free() - free the sw rx desc pool called during
  592. * de-initialization of wifi module.
  593. *
  594. * @soc: core txrx main context
  595. * @pool_id: pool_id which is one of 3 mac_ids
  596. * @rx_desc_pool: rx descriptor pool pointer
  597. *
  598. * Return: None
  599. */
  600. void dp_rx_desc_nbuf_and_pool_free(struct dp_soc *soc, uint32_t pool_id,
  601. struct rx_desc_pool *rx_desc_pool);
  602. /*
  603. * dp_rx_desc_nbuf_free() - free the sw rx desc nbufs called during
  604. * de-initialization of wifi module.
  605. *
  606. * @soc: core txrx main context
  607. * @pool_id: pool_id which is one of 3 mac_ids
  608. * @rx_desc_pool: rx descriptor pool pointer
  609. *
  610. * Return: None
  611. */
  612. void dp_rx_desc_nbuf_free(struct dp_soc *soc,
  613. struct rx_desc_pool *rx_desc_pool);
  614. #ifdef DP_RX_MON_MEM_FRAG
  615. /*
  616. * dp_rx_desc_frag_free() - free the sw rx desc frag called during
  617. * de-initialization of wifi module.
  618. *
  619. * @soc: core txrx main context
  620. * @rx_desc_pool: rx descriptor pool pointer
  621. *
  622. * Return: None
  623. */
  624. void dp_rx_desc_frag_free(struct dp_soc *soc,
  625. struct rx_desc_pool *rx_desc_pool);
  626. #else
  627. static inline
  628. void dp_rx_desc_frag_free(struct dp_soc *soc,
  629. struct rx_desc_pool *rx_desc_pool)
  630. {
  631. }
  632. #endif
  633. /*
  634. * dp_rx_desc_pool_free() - free the sw rx desc array called during
  635. * de-initialization of wifi module.
  636. *
  637. * @soc: core txrx main context
  638. * @rx_desc_pool: rx descriptor pool pointer
  639. *
  640. * Return: None
  641. */
  642. void dp_rx_desc_pool_free(struct dp_soc *soc,
  643. struct rx_desc_pool *rx_desc_pool);
  644. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  645. struct dp_peer *peer);
  646. #ifdef RX_DESC_DEBUG_CHECK
  647. /**
  648. * dp_rx_desc_paddr_sanity_check() - paddr sanity for ring desc vs rx_desc
  649. * @rx_desc: rx descriptor
  650. * @ring_paddr: paddr obatined from the ring
  651. *
  652. * Returns: QDF_STATUS
  653. */
  654. static inline
  655. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  656. uint64_t ring_paddr)
  657. {
  658. return (ring_paddr == qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  659. }
  660. /*
  661. * dp_rx_desc_alloc_dbg_info() - Alloc memory for rx descriptor debug
  662. * structure
  663. * @rx_desc: rx descriptor pointer
  664. *
  665. * Return: None
  666. */
  667. static inline
  668. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  669. {
  670. rx_desc->dbg_info = qdf_mem_malloc(sizeof(struct dp_rx_desc_dbg_info));
  671. }
  672. /*
  673. * dp_rx_desc_free_dbg_info() - Free rx descriptor debug
  674. * structure memory
  675. * @rx_desc: rx descriptor pointer
  676. *
  677. * Return: None
  678. */
  679. static inline
  680. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  681. {
  682. qdf_mem_free(rx_desc->dbg_info);
  683. }
  684. /*
  685. * dp_rx_desc_update_dbg_info() - Update rx descriptor debug info
  686. * structure memory
  687. * @rx_desc: rx descriptor pointer
  688. *
  689. * Return: None
  690. */
  691. static
  692. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  693. const char *func_name, uint8_t flag)
  694. {
  695. struct dp_rx_desc_dbg_info *info = rx_desc->dbg_info;
  696. if (!info)
  697. return;
  698. if (flag == RX_DESC_REPLENISHED) {
  699. qdf_str_lcopy(info->replenish_caller, func_name,
  700. QDF_MEM_FUNC_NAME_SIZE);
  701. info->replenish_ts = qdf_get_log_timestamp();
  702. } else {
  703. qdf_str_lcopy(info->freelist_caller, func_name,
  704. QDF_MEM_FUNC_NAME_SIZE);
  705. info->freelist_ts = qdf_get_log_timestamp();
  706. }
  707. }
  708. #else
  709. static inline
  710. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  711. uint64_t ring_paddr)
  712. {
  713. return true;
  714. }
  715. static inline
  716. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  717. {
  718. }
  719. static inline
  720. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  721. {
  722. }
  723. static inline
  724. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  725. const char *func_name, uint8_t flag)
  726. {
  727. }
  728. #endif /* RX_DESC_DEBUG_CHECK */
  729. /**
  730. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  731. *
  732. * @head: pointer to the head of local free list
  733. * @tail: pointer to the tail of local free list
  734. * @new: new descriptor that is added to the free list
  735. * @func_name: caller func name
  736. *
  737. * Return: void:
  738. */
  739. static inline
  740. void __dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  741. union dp_rx_desc_list_elem_t **tail,
  742. struct dp_rx_desc *new, const char *func_name)
  743. {
  744. qdf_assert(head && new);
  745. new->nbuf = NULL;
  746. new->in_use = 0;
  747. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  748. *head = (union dp_rx_desc_list_elem_t *)new;
  749. /* reset tail if head->next is NULL */
  750. if (!*tail || !(*head)->next)
  751. *tail = *head;
  752. dp_rx_desc_update_dbg_info(new, func_name, RX_DESC_IN_FREELIST);
  753. }
  754. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  755. uint8_t mac_id);
  756. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  757. qdf_nbuf_t mpdu, bool mpdu_done, uint8_t mac_id);
  758. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  759. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  760. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  761. uint16_t peer_id, uint8_t tid);
  762. #define DP_RX_LIST_APPEND(head, tail, elem) \
  763. do { \
  764. if (!(head)) { \
  765. (head) = (elem); \
  766. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head) = 1;\
  767. } else { \
  768. qdf_nbuf_set_next((tail), (elem)); \
  769. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head)++; \
  770. } \
  771. (tail) = (elem); \
  772. qdf_nbuf_set_next((tail), NULL); \
  773. } while (0)
  774. #define DP_RX_MERGE_TWO_LIST(phead, ptail, chead, ctail) \
  775. do { \
  776. if (!(phead)) { \
  777. (phead) = (chead); \
  778. } else { \
  779. qdf_nbuf_set_next((ptail), (chead)); \
  780. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(phead) += \
  781. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(chead); \
  782. } \
  783. (ptail) = (ctail); \
  784. qdf_nbuf_set_next((ptail), NULL); \
  785. } while (0)
  786. /*for qcn9000 emulation the pcie is complete phy and no address restrictions*/
  787. #if !defined(BUILD_X86) || defined(QCA_WIFI_QCN9000)
  788. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  789. qdf_dma_addr_t *paddr, struct rx_desc_pool *rx_desc_pool)
  790. {
  791. return QDF_STATUS_SUCCESS;
  792. }
  793. #else
  794. #define MAX_RETRY 100
  795. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  796. qdf_dma_addr_t *paddr, struct rx_desc_pool *rx_desc_pool)
  797. {
  798. uint32_t nbuf_retry = 0;
  799. int32_t ret;
  800. const uint32_t x86_phy_addr = 0x50000000;
  801. /*
  802. * in M2M emulation platforms (x86) the memory below 0x50000000
  803. * is reserved for target use, so any memory allocated in this
  804. * region should not be used by host
  805. */
  806. do {
  807. if (qdf_likely(*paddr > x86_phy_addr))
  808. return QDF_STATUS_SUCCESS;
  809. else {
  810. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  811. "phy addr %pK exceeded 0x50000000 trying again",
  812. paddr);
  813. nbuf_retry++;
  814. if ((*rx_netbuf)) {
  815. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  816. QDF_DMA_FROM_DEVICE);
  817. /* Not freeing buffer intentionally.
  818. * Observed that same buffer is getting
  819. * re-allocated resulting in longer load time
  820. * WMI init timeout.
  821. * This buffer is anyway not useful so skip it.
  822. **/
  823. }
  824. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  825. rx_desc_pool->buf_size,
  826. RX_BUFFER_RESERVATION,
  827. rx_desc_pool->buf_alignment,
  828. FALSE);
  829. if (qdf_unlikely(!(*rx_netbuf)))
  830. return QDF_STATUS_E_FAILURE;
  831. ret = qdf_nbuf_map_single(dp_soc->osdev, *rx_netbuf,
  832. QDF_DMA_FROM_DEVICE);
  833. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  834. qdf_nbuf_free(*rx_netbuf);
  835. *rx_netbuf = NULL;
  836. continue;
  837. }
  838. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  839. }
  840. } while (nbuf_retry < MAX_RETRY);
  841. if ((*rx_netbuf)) {
  842. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  843. QDF_DMA_FROM_DEVICE);
  844. qdf_nbuf_free(*rx_netbuf);
  845. }
  846. return QDF_STATUS_E_FAILURE;
  847. }
  848. #endif
  849. /**
  850. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  851. * the MSDU Link Descriptor
  852. * @soc: core txrx main context
  853. * @buf_info: buf_info includes cookie that is used to lookup
  854. * virtual address of link descriptor after deriving the page id
  855. * and the offset or index of the desc on the associatde page.
  856. *
  857. * This is the VA of the link descriptor, that HAL layer later uses to
  858. * retrieve the list of MSDU's for a given MPDU.
  859. *
  860. * Return: void *: Virtual Address of the Rx descriptor
  861. */
  862. static inline
  863. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  864. struct hal_buf_info *buf_info)
  865. {
  866. void *link_desc_va;
  867. struct qdf_mem_multi_page_t *pages;
  868. uint16_t page_id = LINK_DESC_COOKIE_PAGE_ID(buf_info->sw_cookie);
  869. pages = &soc->link_desc_pages;
  870. if (!pages)
  871. return NULL;
  872. if (qdf_unlikely(page_id >= pages->num_pages))
  873. return NULL;
  874. link_desc_va = pages->dma_pages[page_id].page_v_addr_start +
  875. (buf_info->paddr - pages->dma_pages[page_id].page_p_addr);
  876. return link_desc_va;
  877. }
  878. /**
  879. * dp_rx_cookie_2_mon_link_desc_va() - Converts cookie to a virtual address of
  880. * the MSDU Link Descriptor
  881. * @pdev: core txrx pdev context
  882. * @buf_info: buf_info includes cookie that used to lookup virtual address of
  883. * link descriptor. Normally this is just an index into a per pdev array.
  884. *
  885. * This is the VA of the link descriptor in monitor mode destination ring,
  886. * that HAL layer later uses to retrieve the list of MSDU's for a given MPDU.
  887. *
  888. * Return: void *: Virtual Address of the Rx descriptor
  889. */
  890. static inline
  891. void *dp_rx_cookie_2_mon_link_desc_va(struct dp_pdev *pdev,
  892. struct hal_buf_info *buf_info,
  893. int mac_id)
  894. {
  895. void *link_desc_va;
  896. struct qdf_mem_multi_page_t *pages;
  897. uint16_t page_id = LINK_DESC_COOKIE_PAGE_ID(buf_info->sw_cookie);
  898. pages = &pdev->soc->mon_link_desc_pages[mac_id];
  899. if (!pages)
  900. return NULL;
  901. if (qdf_unlikely(page_id >= pages->num_pages))
  902. return NULL;
  903. link_desc_va = pages->dma_pages[page_id].page_v_addr_start +
  904. (buf_info->paddr - pages->dma_pages[page_id].page_p_addr);
  905. return link_desc_va;
  906. }
  907. /**
  908. * dp_rx_defrag_concat() - Concatenate the fragments
  909. *
  910. * @dst: destination pointer to the buffer
  911. * @src: source pointer from where the fragment payload is to be copied
  912. *
  913. * Return: QDF_STATUS
  914. */
  915. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  916. {
  917. /*
  918. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  919. * to provide space for src, the headroom portion is copied from
  920. * the original dst buffer to the larger new dst buffer.
  921. * (This is needed, because the headroom of the dst buffer
  922. * contains the rx desc.)
  923. */
  924. if (!qdf_nbuf_cat(dst, src)) {
  925. /*
  926. * qdf_nbuf_cat does not free the src memory.
  927. * Free src nbuf before returning
  928. * For failure case the caller takes of freeing the nbuf
  929. */
  930. qdf_nbuf_free(src);
  931. return QDF_STATUS_SUCCESS;
  932. }
  933. return QDF_STATUS_E_DEFRAG_ERROR;
  934. }
  935. #ifndef FEATURE_WDS
  936. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  937. {
  938. return QDF_STATUS_SUCCESS;
  939. }
  940. static inline void
  941. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  942. uint8_t *rx_tlv_hdr,
  943. struct dp_peer *ta_peer,
  944. qdf_nbuf_t nbuf,
  945. struct hal_rx_msdu_metadata msdu_metadata)
  946. {
  947. }
  948. #endif
  949. /*
  950. * dp_rx_desc_dump() - dump the sw rx descriptor
  951. *
  952. * @rx_desc: sw rx descriptor
  953. */
  954. static inline void dp_rx_desc_dump(struct dp_rx_desc *rx_desc)
  955. {
  956. dp_info("rx_desc->nbuf: %pK, rx_desc->cookie: %d, rx_desc->pool_id: %d, rx_desc->in_use: %d, rx_desc->unmapped: %d",
  957. rx_desc->nbuf, rx_desc->cookie, rx_desc->pool_id,
  958. rx_desc->in_use, rx_desc->unmapped);
  959. }
  960. /*
  961. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  962. * In qwrap mode, packets originated from
  963. * any vdev should not loopback and
  964. * should be dropped.
  965. * @vdev: vdev on which rx packet is received
  966. * @nbuf: rx pkt
  967. *
  968. */
  969. #if ATH_SUPPORT_WRAP
  970. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  971. qdf_nbuf_t nbuf)
  972. {
  973. struct dp_vdev *psta_vdev;
  974. struct dp_pdev *pdev = vdev->pdev;
  975. uint8_t *data = qdf_nbuf_data(nbuf);
  976. if (qdf_unlikely(vdev->proxysta_vdev)) {
  977. /* In qwrap isolation mode, allow loopback packets as all
  978. * packets go to RootAP and Loopback on the mpsta.
  979. */
  980. if (vdev->isolation_vdev)
  981. return false;
  982. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  983. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  984. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  985. &data[QDF_MAC_ADDR_SIZE],
  986. QDF_MAC_ADDR_SIZE))) {
  987. /* Drop packet if source address is equal to
  988. * any of the vdev addresses.
  989. */
  990. return true;
  991. }
  992. }
  993. }
  994. return false;
  995. }
  996. #else
  997. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  998. qdf_nbuf_t nbuf)
  999. {
  1000. return false;
  1001. }
  1002. #endif
  1003. #if defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) ||\
  1004. defined(WLAN_SUPPORT_RX_TAG_STATISTICS) ||\
  1005. defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1006. #include "dp_rx_tag.h"
  1007. #endif
  1008. #ifndef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  1009. /**
  1010. * dp_rx_update_protocol_tag() - Reads CCE metadata from the RX MSDU end TLV
  1011. * and set the corresponding tag in QDF packet
  1012. * @soc: core txrx main context
  1013. * @vdev: vdev on which the packet is received
  1014. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1015. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1016. * @ring_index: REO ring number, not used for error & monitor ring
  1017. * @is_reo_exception: flag to indicate if rx from REO ring or exception ring
  1018. * @is_update_stats: flag to indicate whether to update stats or not
  1019. * Return: void
  1020. */
  1021. static inline void
  1022. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1023. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  1024. uint16_t ring_index,
  1025. bool is_reo_exception, bool is_update_stats)
  1026. {
  1027. }
  1028. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  1029. #ifndef WLAN_SUPPORT_RX_FLOW_TAG
  1030. /**
  1031. * dp_rx_update_flow_tag() - Reads FSE metadata from the RX MSDU end TLV
  1032. * and set the corresponding tag in QDF packet
  1033. * @soc: core txrx main context
  1034. * @vdev: vdev on which the packet is received
  1035. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1036. * @rx_tlv_hdr: base address where the RX TLVs starts
  1037. * @is_update_stats: flag to indicate whether to update stats or not
  1038. *
  1039. * Return: void
  1040. */
  1041. static inline void
  1042. dp_rx_update_flow_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1043. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr, bool update_stats)
  1044. {
  1045. }
  1046. #endif /* WLAN_SUPPORT_RX_FLOW_TAG */
  1047. #if !defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) &&\
  1048. !defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1049. /**
  1050. * dp_rx_mon_update_protocol_flow_tag() - Performs necessary checks for monitor
  1051. * mode and then tags appropriate packets
  1052. * @soc: core txrx main context
  1053. * @vdev: pdev on which packet is received
  1054. * @msdu: QDF packet buffer on which the protocol tag should be set
  1055. * @rx_desc: base address where the RX TLVs start
  1056. * Return: void
  1057. */
  1058. static inline
  1059. void dp_rx_mon_update_protocol_flow_tag(struct dp_soc *soc,
  1060. struct dp_pdev *dp_pdev,
  1061. qdf_nbuf_t msdu, void *rx_desc)
  1062. {
  1063. }
  1064. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG || WLAN_SUPPORT_RX_FLOW_TAG */
  1065. /*
  1066. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  1067. * called during dp rx initialization
  1068. * and at the end of dp_rx_process.
  1069. *
  1070. * @soc: core txrx main context
  1071. * @mac_id: mac_id which is one of 3 mac_ids
  1072. * @dp_rxdma_srng: dp rxdma circular ring
  1073. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1074. * @num_req_buffers: number of buffer to be replenished
  1075. * @desc_list: list of descs if called from dp_rx_process
  1076. * or NULL during dp rx initialization or out of buffer
  1077. * interrupt.
  1078. * @tail: tail of descs list
  1079. * @func_name: name of the caller function
  1080. * Return: return success or failure
  1081. */
  1082. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1083. struct dp_srng *dp_rxdma_srng,
  1084. struct rx_desc_pool *rx_desc_pool,
  1085. uint32_t num_req_buffers,
  1086. union dp_rx_desc_list_elem_t **desc_list,
  1087. union dp_rx_desc_list_elem_t **tail,
  1088. const char *func_name);
  1089. /*
  1090. * dp_pdev_rx_buffers_attach() - replenish rxdma ring with rx nbufs
  1091. * called during dp rx initialization
  1092. *
  1093. * @soc: core txrx main context
  1094. * @mac_id: mac_id which is one of 3 mac_ids
  1095. * @dp_rxdma_srng: dp rxdma circular ring
  1096. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1097. * @num_req_buffers: number of buffer to be replenished
  1098. *
  1099. * Return: return success or failure
  1100. */
  1101. QDF_STATUS
  1102. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1103. struct dp_srng *dp_rxdma_srng,
  1104. struct rx_desc_pool *rx_desc_pool,
  1105. uint32_t num_req_buffers);
  1106. /**
  1107. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  1108. * (WBM), following error handling
  1109. *
  1110. * @soc: core DP main context
  1111. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  1112. * @buf_addr_info: void pointer to the buffer_addr_info
  1113. * @bm_action: put to idle_list or release to msdu_list
  1114. *
  1115. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1116. */
  1117. QDF_STATUS
  1118. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  1119. uint8_t bm_action);
  1120. /**
  1121. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  1122. * (WBM) by address
  1123. *
  1124. * @soc: core DP main context
  1125. * @link_desc_addr: link descriptor addr
  1126. *
  1127. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1128. */
  1129. QDF_STATUS
  1130. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  1131. hal_buff_addrinfo_t link_desc_addr,
  1132. uint8_t bm_action);
  1133. /**
  1134. * dp_rxdma_err_process() - RxDMA error processing functionality
  1135. * @soc: core txrx main contex
  1136. * @mac_id: mac id which is one of 3 mac_ids
  1137. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1138. * @quota: No. of units (packets) that can be serviced in one shot.
  1139. *
  1140. * Return: num of buffers processed
  1141. */
  1142. uint32_t
  1143. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1144. uint32_t mac_id, uint32_t quota);
  1145. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1146. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  1147. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1148. uint8_t *rx_tlv_hdr);
  1149. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  1150. struct dp_peer *peer);
  1151. /*
  1152. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  1153. *
  1154. * @soc: core txrx main context
  1155. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1156. * @ring_desc: opaque pointer to the RX ring descriptor
  1157. * @rx_desc: host rs descriptor
  1158. *
  1159. * Return: void
  1160. */
  1161. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  1162. hal_ring_handle_t hal_ring_hdl,
  1163. hal_ring_desc_t ring_desc,
  1164. struct dp_rx_desc *rx_desc);
  1165. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  1166. #ifdef QCA_PEER_EXT_STATS
  1167. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1168. qdf_nbuf_t nbuf);
  1169. #endif /* QCA_PEER_EXT_STATS */
  1170. #ifdef RX_DESC_DEBUG_CHECK
  1171. /**
  1172. * dp_rx_desc_check_magic() - check the magic value in dp_rx_desc
  1173. * @rx_desc: rx descriptor pointer
  1174. *
  1175. * Return: true, if magic is correct, else false.
  1176. */
  1177. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1178. {
  1179. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC))
  1180. return false;
  1181. rx_desc->magic = 0;
  1182. return true;
  1183. }
  1184. /**
  1185. * dp_rx_desc_prep() - prepare rx desc
  1186. * @rx_desc: rx descriptor pointer to be prepared
  1187. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1188. *
  1189. * Note: assumption is that we are associating a nbuf which is mapped
  1190. *
  1191. * Return: none
  1192. */
  1193. static inline
  1194. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1195. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1196. {
  1197. rx_desc->magic = DP_RX_DESC_MAGIC;
  1198. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1199. rx_desc->unmapped = 0;
  1200. }
  1201. /**
  1202. * dp_rx_desc_frag_prep() - prepare rx desc
  1203. * @rx_desc: rx descriptor pointer to be prepared
  1204. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1205. *
  1206. * Note: assumption is that we frag address is mapped
  1207. *
  1208. * Return: none
  1209. */
  1210. #ifdef DP_RX_MON_MEM_FRAG
  1211. static inline
  1212. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1213. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1214. {
  1215. rx_desc->magic = DP_RX_DESC_MAGIC;
  1216. rx_desc->rx_buf_start =
  1217. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1218. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1219. rx_desc->unmapped = 0;
  1220. }
  1221. #else
  1222. static inline
  1223. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1224. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1225. {
  1226. }
  1227. #endif /* DP_RX_MON_MEM_FRAG */
  1228. #else
  1229. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1230. {
  1231. return true;
  1232. }
  1233. static inline
  1234. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1235. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1236. {
  1237. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1238. rx_desc->unmapped = 0;
  1239. }
  1240. #ifdef DP_RX_MON_MEM_FRAG
  1241. static inline
  1242. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1243. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1244. {
  1245. rx_desc->rx_buf_start =
  1246. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1247. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1248. rx_desc->unmapped = 0;
  1249. }
  1250. #else
  1251. static inline
  1252. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1253. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1254. {
  1255. }
  1256. #endif /* DP_RX_MON_MEM_FRAG */
  1257. #endif /* RX_DESC_DEBUG_CHECK */
  1258. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  1259. bool is_mon_dest_desc);
  1260. void dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1261. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  1262. uint8_t err_code, uint8_t mac_id);
  1263. #ifndef QCA_MULTIPASS_SUPPORT
  1264. static inline
  1265. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf, uint8_t tid)
  1266. {
  1267. return false;
  1268. }
  1269. #else
  1270. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf,
  1271. uint8_t tid);
  1272. #endif
  1273. #ifndef WLAN_RX_PKT_CAPTURE_ENH
  1274. static inline
  1275. QDF_STATUS dp_peer_set_rx_capture_enabled(struct dp_pdev *pdev,
  1276. struct dp_peer *peer_handle,
  1277. bool value, uint8_t *mac_addr)
  1278. {
  1279. return QDF_STATUS_SUCCESS;
  1280. }
  1281. #endif
  1282. /**
  1283. * dp_rx_deliver_to_stack() - deliver pkts to network stack
  1284. * Caller to hold peer refcount and check for valid peer
  1285. * @soc: soc
  1286. * @vdev: vdev
  1287. * @peer: peer
  1288. * @nbuf_head: skb list head
  1289. * @nbuf_tail: skb list tail
  1290. *
  1291. * Return: None
  1292. */
  1293. void dp_rx_deliver_to_stack(struct dp_soc *soc,
  1294. struct dp_vdev *vdev,
  1295. struct dp_peer *peer,
  1296. qdf_nbuf_t nbuf_head,
  1297. qdf_nbuf_t nbuf_tail);
  1298. #ifdef QCA_OL_RX_LOCK_LESS_ACCESS
  1299. /*
  1300. * dp_rx_ring_access_start()- Wrapper function to log access start of a hal ring
  1301. * @int_ctx: pointer to DP interrupt context
  1302. * @dp_soc - DP soc structure pointer
  1303. * @hal_ring_hdl - HAL ring handle
  1304. *
  1305. * Return: 0 on success; error on failure
  1306. */
  1307. static inline int
  1308. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1309. hal_ring_handle_t hal_ring_hdl)
  1310. {
  1311. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  1312. }
  1313. /*
  1314. * dp_rx_ring_access_end()- Wrapper function to log access end of a hal ring
  1315. * @int_ctx: pointer to DP interrupt context
  1316. * @dp_soc - DP soc structure pointer
  1317. * @hal_ring_hdl - HAL ring handle
  1318. *
  1319. * Return - None
  1320. */
  1321. static inline void
  1322. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1323. hal_ring_handle_t hal_ring_hdl)
  1324. {
  1325. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  1326. }
  1327. #else
  1328. static inline int
  1329. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1330. hal_ring_handle_t hal_ring_hdl)
  1331. {
  1332. return dp_srng_access_start(int_ctx, soc, hal_ring_hdl);
  1333. }
  1334. static inline void
  1335. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1336. hal_ring_handle_t hal_ring_hdl)
  1337. {
  1338. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1339. }
  1340. #endif
  1341. /*
  1342. * dp_rx_wbm_sg_list_reset() - Initialize sg list
  1343. *
  1344. * This api should be called at soc init and afterevery sg processing.
  1345. *@soc: DP SOC handle
  1346. */
  1347. static inline void dp_rx_wbm_sg_list_reset(struct dp_soc *soc)
  1348. {
  1349. if (soc) {
  1350. soc->wbm_sg_param.wbm_is_first_msdu_in_sg = false;
  1351. soc->wbm_sg_param.wbm_sg_nbuf_head = NULL;
  1352. soc->wbm_sg_param.wbm_sg_nbuf_tail = NULL;
  1353. soc->wbm_sg_param.wbm_sg_desc_msdu_len = 0;
  1354. }
  1355. }
  1356. /*
  1357. * dp_rx_wbm_sg_list_deinit() - De-initialize sg list
  1358. *
  1359. * This api should be called in down path, to avoid any leak.
  1360. *@soc: DP SOC handle
  1361. */
  1362. static inline void dp_rx_wbm_sg_list_deinit(struct dp_soc *soc)
  1363. {
  1364. if (soc) {
  1365. if (soc->wbm_sg_param.wbm_sg_nbuf_head)
  1366. qdf_nbuf_list_free(soc->wbm_sg_param.wbm_sg_nbuf_head);
  1367. dp_rx_wbm_sg_list_reset(soc);
  1368. }
  1369. }
  1370. #ifdef WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL
  1371. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1372. do { \
  1373. if (!soc->rx_buff_pool[rx_desc->pool_id].is_initialized) { \
  1374. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf); \
  1375. break; \
  1376. } \
  1377. DP_RX_LIST_APPEND(ebuf_head, ebuf_tail, rx_desc->nbuf); \
  1378. if (!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)) { \
  1379. if (!dp_rx_buffer_pool_refill(soc, ebuf_head, \
  1380. rx_desc->pool_id)) \
  1381. DP_RX_MERGE_TWO_LIST(head, tail, \
  1382. ebuf_head, ebuf_tail);\
  1383. ebuf_head = NULL; \
  1384. ebuf_tail = NULL; \
  1385. } \
  1386. } while (0)
  1387. #else
  1388. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1389. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf)
  1390. #endif /* WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL */
  1391. /*
  1392. * dp_rx_link_desc_refill_duplicate_check() - check if link desc duplicate
  1393. to refill
  1394. * @soc: DP SOC handle
  1395. * @buf_info: the last link desc buf info
  1396. * @ring_buf_info: current buf address pointor including link desc
  1397. *
  1398. * return: none.
  1399. */
  1400. void dp_rx_link_desc_refill_duplicate_check(
  1401. struct dp_soc *soc,
  1402. struct hal_buf_info *buf_info,
  1403. hal_buff_addrinfo_t ring_buf_info);
  1404. #endif /* _DP_RX_H */