dp_panel.h 5.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229
  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef _DP_PANEL_H_
  6. #define _DP_PANEL_H_
  7. #include <drm/msm_drm.h>
  8. #include "dp_aux.h"
  9. #include "dp_link.h"
  10. #include "dp_usbpd.h"
  11. #include "sde_edid_parser.h"
  12. #include "sde_connector.h"
  13. #include "msm_drv.h"
  14. #define DP_RECEIVER_DSC_CAP_SIZE 15
  15. #define DP_RECEIVER_FEC_STATUS_SIZE 3
  16. /*
  17. * A source initiated power down flag is set
  18. * when the DP is powered off while physical
  19. * DP cable is still connected i.e. without
  20. * HPD or not initiated by sink like HPD_IRQ.
  21. * This can happen if framework reboots or
  22. * device suspends.
  23. */
  24. #define DP_PANEL_SRC_INITIATED_POWER_DOWN BIT(0)
  25. enum dp_lane_count {
  26. DP_LANE_COUNT_1 = 1,
  27. DP_LANE_COUNT_2 = 2,
  28. DP_LANE_COUNT_4 = 4,
  29. };
  30. #define DP_MAX_DOWNSTREAM_PORTS 0x10
  31. struct dp_panel_info {
  32. u32 h_active;
  33. u32 v_active;
  34. u32 h_back_porch;
  35. u32 h_front_porch;
  36. u32 h_sync_width;
  37. u32 h_active_low;
  38. u32 v_back_porch;
  39. u32 v_front_porch;
  40. u32 v_sync_width;
  41. u32 v_active_low;
  42. u32 h_skew;
  43. u32 refresh_rate;
  44. u32 pixel_clk_khz;
  45. u32 bpp;
  46. bool widebus_en;
  47. struct msm_compression_info comp_info;
  48. s64 dsc_overhead_fp;
  49. };
  50. struct dp_display_mode {
  51. struct dp_panel_info timing;
  52. u32 capabilities;
  53. s64 fec_overhead_fp;
  54. s64 dsc_overhead_fp;
  55. };
  56. struct dp_panel;
  57. struct dp_panel_in {
  58. struct device *dev;
  59. struct dp_aux *aux;
  60. struct dp_link *link;
  61. struct dp_catalog_panel *catalog;
  62. struct drm_connector *connector;
  63. struct dp_panel *base_panel;
  64. struct dp_parser *parser;
  65. };
  66. struct dp_dsc_caps {
  67. bool dsc_capable;
  68. u8 version;
  69. bool block_pred_en;
  70. };
  71. struct dp_audio;
  72. #define DP_PANEL_CAPS_DSC BIT(0)
  73. struct dp_panel {
  74. /* dpcd raw data */
  75. u8 dpcd[DP_RECEIVER_CAP_SIZE + 1];
  76. u8 ds_ports[DP_MAX_DOWNSTREAM_PORTS];
  77. u8 dsc_dpcd[DP_RECEIVER_DSC_CAP_SIZE + 1];
  78. u8 fec_dpcd;
  79. u8 fec_sts_dpcd[DP_RECEIVER_FEC_STATUS_SIZE + 1];
  80. struct drm_dp_link link_info;
  81. struct sde_edid_ctrl *edid_ctrl;
  82. struct dp_panel_info pinfo;
  83. bool video_test;
  84. bool spd_enabled;
  85. u32 vic;
  86. u32 max_pclk_khz;
  87. s64 mst_target_sc;
  88. /* debug */
  89. u32 max_bw_code;
  90. /* By default, stream_id is assigned to DP_INVALID_STREAM.
  91. * Client sets the stream id value using set_stream_id interface.
  92. */
  93. enum dp_stream_id stream_id;
  94. int vcpi;
  95. u32 channel_start_slot;
  96. u32 channel_total_slots;
  97. u32 pbn;
  98. u32 tot_dsc_blks_in_use;
  99. /* DRM connector assosiated with this panel */
  100. struct drm_connector *connector;
  101. struct dp_audio *audio;
  102. bool audio_supported;
  103. struct dp_dsc_caps sink_dsc_caps;
  104. bool dsc_feature_enable;
  105. bool fec_feature_enable;
  106. bool dsc_en;
  107. bool fec_en;
  108. bool widebus_en;
  109. bool mst_state;
  110. s64 fec_overhead_fp;
  111. int (*init)(struct dp_panel *dp_panel);
  112. int (*deinit)(struct dp_panel *dp_panel, u32 flags);
  113. int (*hw_cfg)(struct dp_panel *dp_panel, bool enable);
  114. int (*read_sink_caps)(struct dp_panel *dp_panel,
  115. struct drm_connector *connector, bool multi_func);
  116. u32 (*get_min_req_link_rate)(struct dp_panel *dp_panel);
  117. u32 (*get_mode_bpp)(struct dp_panel *dp_panel, u32 mode_max_bpp,
  118. u32 mode_pclk_khz);
  119. int (*get_modes)(struct dp_panel *dp_panel,
  120. struct drm_connector *connector, struct dp_display_mode *mode);
  121. void (*handle_sink_request)(struct dp_panel *dp_panel);
  122. int (*set_edid)(struct dp_panel *dp_panel, u8 *edid);
  123. int (*set_dpcd)(struct dp_panel *dp_panel, u8 *dpcd);
  124. int (*setup_hdr)(struct dp_panel *dp_panel,
  125. struct drm_msm_ext_hdr_metadata *hdr_meta,
  126. bool dhdr_update, u64 core_clk_rate);
  127. void (*tpg_config)(struct dp_panel *dp_panel, bool enable);
  128. int (*spd_config)(struct dp_panel *dp_panel);
  129. bool (*hdr_supported)(struct dp_panel *dp_panel);
  130. int (*set_stream_info)(struct dp_panel *dp_panel,
  131. enum dp_stream_id stream_id, u32 ch_start_slot,
  132. u32 ch_tot_slots, u32 pbn, int vcpi);
  133. int (*read_sink_status)(struct dp_panel *dp_panel, u8 *sts, u32 size);
  134. int (*update_edid)(struct dp_panel *dp_panel, struct edid *edid);
  135. bool (*read_mst_cap)(struct dp_panel *dp_panel);
  136. void (*convert_to_dp_mode)(struct dp_panel *dp_panel,
  137. const struct drm_display_mode *drm_mode,
  138. struct dp_display_mode *dp_mode);
  139. void (*update_pps)(struct dp_panel *dp_panel, char *pps_cmd);
  140. };
  141. struct dp_tu_calc_input {
  142. u64 lclk; /* 162, 270, 540 and 810 */
  143. u64 pclk_khz; /* in KHz */
  144. u64 hactive; /* active h-width */
  145. u64 hporch; /* bp + fp + pulse */
  146. int nlanes; /* no.of.lanes */
  147. int bpp; /* bits */
  148. int pixel_enc; /* 444, 420, 422 */
  149. int dsc_en; /* dsc on/off */
  150. int async_en; /* async mode */
  151. int fec_en; /* fec */
  152. int compress_ratio; /* 2:1 = 200, 3:1 = 300, 3.75:1 = 375 */
  153. int num_of_dsc_slices; /* number of slices per line */
  154. };
  155. struct dp_vc_tu_mapping_table {
  156. u32 vic;
  157. u8 lanes;
  158. u8 lrate; /* DP_LINK_RATE -> 162(6), 270(10), 540(20), 810 (30) */
  159. u8 bpp;
  160. u32 valid_boundary_link;
  161. u32 delay_start_link;
  162. bool boundary_moderation_en;
  163. u32 valid_lower_boundary_link;
  164. u32 upper_boundary_count;
  165. u32 lower_boundary_count;
  166. u32 tu_size_minus1;
  167. };
  168. /**
  169. * is_link_rate_valid() - validates the link rate
  170. * @lane_rate: link rate requested by the sink
  171. *
  172. * Returns true if the requested link rate is supported.
  173. */
  174. static inline bool is_link_rate_valid(u32 bw_code)
  175. {
  176. return ((bw_code == DP_LINK_BW_1_62) ||
  177. (bw_code == DP_LINK_BW_2_7) ||
  178. (bw_code == DP_LINK_BW_5_4) ||
  179. (bw_code == DP_LINK_BW_8_1));
  180. }
  181. /**
  182. * dp_link_is_lane_count_valid() - validates the lane count
  183. * @lane_count: lane count requested by the sink
  184. *
  185. * Returns true if the requested lane count is supported.
  186. */
  187. static inline bool is_lane_count_valid(u32 lane_count)
  188. {
  189. return (lane_count == DP_LANE_COUNT_1) ||
  190. (lane_count == DP_LANE_COUNT_2) ||
  191. (lane_count == DP_LANE_COUNT_4);
  192. }
  193. struct dp_panel *dp_panel_get(struct dp_panel_in *in);
  194. void dp_panel_put(struct dp_panel *dp_panel);
  195. void dp_panel_calc_tu_test(struct dp_tu_calc_input *in,
  196. struct dp_vc_tu_mapping_table *tu_table);
  197. #endif /* _DP_PANEL_H_ */