qcedev.c 70 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * QTI CE device driver.
  4. *
  5. * Copyright (c) 2010-2021, The Linux Foundation. All rights reserved.
  6. */
  7. #include <linux/mman.h>
  8. #include <linux/module.h>
  9. #include <linux/device.h>
  10. #include <linux/types.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/dma-mapping.h>
  13. #include <linux/kernel.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/init.h>
  18. #include <linux/module.h>
  19. #include <linux/fs.h>
  20. #include <linux/uaccess.h>
  21. #include <linux/debugfs.h>
  22. #include <linux/scatterlist.h>
  23. #include <linux/crypto.h>
  24. #include "linux/platform_data/qcom_crypto_device.h"
  25. #include "linux/qcedev.h"
  26. #include <linux/interconnect.h>
  27. #include <crypto/hash.h>
  28. #include "qcedevi.h"
  29. #include "qce.h"
  30. #include "qcedev_smmu.h"
  31. #include "compat_qcedev.h"
  32. #include <linux/compat.h>
  33. #define CACHE_LINE_SIZE 64
  34. #define CE_SHA_BLOCK_SIZE SHA256_BLOCK_SIZE
  35. #define MAX_CEHW_REQ_TRANSFER_SIZE (128*32*1024)
  36. /* Max wait time once a crypt o request is done */
  37. #define MAX_CRYPTO_WAIT_TIME 1500
  38. static uint8_t _std_init_vector_sha1_uint8[] = {
  39. 0x67, 0x45, 0x23, 0x01, 0xEF, 0xCD, 0xAB, 0x89,
  40. 0x98, 0xBA, 0xDC, 0xFE, 0x10, 0x32, 0x54, 0x76,
  41. 0xC3, 0xD2, 0xE1, 0xF0
  42. };
  43. /* standard initialization vector for SHA-256, source: FIPS 180-2 */
  44. static uint8_t _std_init_vector_sha256_uint8[] = {
  45. 0x6A, 0x09, 0xE6, 0x67, 0xBB, 0x67, 0xAE, 0x85,
  46. 0x3C, 0x6E, 0xF3, 0x72, 0xA5, 0x4F, 0xF5, 0x3A,
  47. 0x51, 0x0E, 0x52, 0x7F, 0x9B, 0x05, 0x68, 0x8C,
  48. 0x1F, 0x83, 0xD9, 0xAB, 0x5B, 0xE0, 0xCD, 0x19
  49. };
  50. #define QCEDEV_CTX_KEY_MASK 0x000000ff
  51. #define QCEDEV_CTX_USE_HW_KEY 0x00000001
  52. #define QCEDEV_CTX_USE_PIPE_KEY 0x00000002
  53. #define QCEDEV_PIPE_KEY_TIMER1_EXPIRED_VEC_MASK 0x000000FF
  54. #define QCEDEV_PIPE_KEY_TIMER2_EXPIRED_VEC_MASK 0x00000003
  55. static DEFINE_MUTEX(send_cmd_lock);
  56. static DEFINE_MUTEX(qcedev_sent_bw_req);
  57. static DEFINE_MUTEX(hash_access_lock);
  58. static dev_t qcedev_device_no;
  59. static struct class *driver_class;
  60. static struct device *class_dev;
  61. static const struct of_device_id qcedev_match[] = {
  62. { .compatible = "qcom,qcedev"},
  63. { .compatible = "qcom,qcedev,context-bank"},
  64. {}
  65. };
  66. MODULE_DEVICE_TABLE(of, qcedev_match);
  67. static int qcedev_control_clocks(struct qcedev_control *podev, bool enable)
  68. {
  69. unsigned int control_flag;
  70. int ret = 0;
  71. if (podev->ce_support.req_bw_before_clk) {
  72. if (enable)
  73. control_flag = QCE_BW_REQUEST_FIRST;
  74. else
  75. control_flag = QCE_CLK_DISABLE_FIRST;
  76. } else {
  77. if (enable)
  78. control_flag = QCE_CLK_ENABLE_FIRST;
  79. else
  80. control_flag = QCE_BW_REQUEST_RESET_FIRST;
  81. }
  82. switch (control_flag) {
  83. case QCE_CLK_ENABLE_FIRST:
  84. ret = qce_enable_clk(podev->qce);
  85. if (ret) {
  86. pr_err("%s Unable enable clk\n", __func__);
  87. return ret;
  88. }
  89. ret = icc_set_bw(podev->icc_path,
  90. CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  91. if (ret) {
  92. pr_err("%s Unable to set high bw\n", __func__);
  93. ret = qce_disable_clk(podev->qce);
  94. if (ret)
  95. pr_err("%s Unable disable clk\n", __func__);
  96. return ret;
  97. }
  98. break;
  99. case QCE_BW_REQUEST_FIRST:
  100. ret = icc_set_bw(podev->icc_path,
  101. CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  102. if (ret) {
  103. pr_err("%s Unable to set high bw\n", __func__);
  104. return ret;
  105. }
  106. ret = qce_enable_clk(podev->qce);
  107. if (ret) {
  108. pr_err("%s Unable enable clk\n", __func__);
  109. ret = icc_set_bw(podev->icc_path, 0, 0);
  110. if (ret)
  111. pr_err("%s Unable to set low bw\n", __func__);
  112. return ret;
  113. }
  114. break;
  115. case QCE_CLK_DISABLE_FIRST:
  116. ret = qce_disable_clk(podev->qce);
  117. if (ret) {
  118. pr_err("%s Unable to disable clk\n", __func__);
  119. return ret;
  120. }
  121. ret = icc_set_bw(podev->icc_path, 0, 0);
  122. if (ret) {
  123. pr_err("%s Unable to set low bw\n", __func__);
  124. ret = qce_enable_clk(podev->qce);
  125. if (ret)
  126. pr_err("%s Unable enable clk\n", __func__);
  127. return ret;
  128. }
  129. break;
  130. case QCE_BW_REQUEST_RESET_FIRST:
  131. ret = icc_set_bw(podev->icc_path, 0, 0);
  132. if (ret) {
  133. pr_err("%s Unable to set low bw\n", __func__);
  134. return ret;
  135. }
  136. ret = qce_disable_clk(podev->qce);
  137. if (ret) {
  138. pr_err("%s Unable to disable clk\n", __func__);
  139. ret = icc_set_bw(podev->icc_path,
  140. CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  141. if (ret)
  142. pr_err("%s Unable to set high bw\n", __func__);
  143. return ret;
  144. }
  145. break;
  146. default:
  147. return -ENOENT;
  148. }
  149. return 0;
  150. }
  151. static void qcedev_ce_high_bw_req(struct qcedev_control *podev,
  152. bool high_bw_req)
  153. {
  154. int ret = 0;
  155. mutex_lock(&qcedev_sent_bw_req);
  156. if (high_bw_req) {
  157. if (podev->high_bw_req_count == 0) {
  158. ret = qcedev_control_clocks(podev, true);
  159. if (ret)
  160. goto exit_unlock_mutex;
  161. }
  162. podev->high_bw_req_count++;
  163. } else {
  164. if (podev->high_bw_req_count == 1) {
  165. ret = qcedev_control_clocks(podev, false);
  166. if (ret)
  167. goto exit_unlock_mutex;
  168. }
  169. podev->high_bw_req_count--;
  170. }
  171. exit_unlock_mutex:
  172. mutex_unlock(&qcedev_sent_bw_req);
  173. }
  174. #define QCEDEV_MAGIC 0x56434544 /* "qced" */
  175. static int qcedev_open(struct inode *inode, struct file *file);
  176. static int qcedev_release(struct inode *inode, struct file *file);
  177. static int start_cipher_req(struct qcedev_control *podev,
  178. int *current_req_info);
  179. static int start_offload_cipher_req(struct qcedev_control *podev,
  180. int *current_req_info);
  181. static int start_sha_req(struct qcedev_control *podev,
  182. int *current_req_info);
  183. static const struct file_operations qcedev_fops = {
  184. .owner = THIS_MODULE,
  185. .unlocked_ioctl = qcedev_ioctl,
  186. #ifdef CONFIG_COMPAT
  187. .compat_ioctl = compat_qcedev_ioctl,
  188. #endif
  189. .open = qcedev_open,
  190. .release = qcedev_release,
  191. };
  192. static struct qcedev_control qce_dev[] = {
  193. {
  194. .magic = QCEDEV_MAGIC,
  195. },
  196. };
  197. #define MAX_QCE_DEVICE ARRAY_SIZE(qce_dev)
  198. #define DEBUG_MAX_FNAME 16
  199. #define DEBUG_MAX_RW_BUF 1024
  200. struct qcedev_stat {
  201. u32 qcedev_dec_success;
  202. u32 qcedev_dec_fail;
  203. u32 qcedev_enc_success;
  204. u32 qcedev_enc_fail;
  205. u32 qcedev_sha_success;
  206. u32 qcedev_sha_fail;
  207. };
  208. static struct qcedev_stat _qcedev_stat;
  209. static struct dentry *_debug_dent;
  210. static char _debug_read_buf[DEBUG_MAX_RW_BUF];
  211. static int _debug_qcedev;
  212. static struct qcedev_control *qcedev_minor_to_control(unsigned int n)
  213. {
  214. int i;
  215. for (i = 0; i < MAX_QCE_DEVICE; i++) {
  216. if (qce_dev[i].minor == n)
  217. return &qce_dev[n];
  218. }
  219. return NULL;
  220. }
  221. static int qcedev_open(struct inode *inode, struct file *file)
  222. {
  223. struct qcedev_handle *handle;
  224. struct qcedev_control *podev;
  225. podev = qcedev_minor_to_control(MINOR(inode->i_rdev));
  226. if (podev == NULL) {
  227. pr_err("%s: no such device %d\n", __func__,
  228. MINOR(inode->i_rdev));
  229. return -ENOENT;
  230. }
  231. handle = kzalloc(sizeof(struct qcedev_handle), GFP_KERNEL);
  232. if (handle == NULL)
  233. return -ENOMEM;
  234. handle->cntl = podev;
  235. file->private_data = handle;
  236. mutex_init(&handle->registeredbufs.lock);
  237. INIT_LIST_HEAD(&handle->registeredbufs.list);
  238. return 0;
  239. }
  240. static int qcedev_release(struct inode *inode, struct file *file)
  241. {
  242. struct qcedev_control *podev;
  243. struct qcedev_handle *handle;
  244. handle = file->private_data;
  245. podev = handle->cntl;
  246. if (podev != NULL && podev->magic != QCEDEV_MAGIC) {
  247. pr_err("%s: invalid handle %pK\n",
  248. __func__, podev);
  249. }
  250. if (qcedev_unmap_all_buffers(handle))
  251. pr_err("%s: failed to unmap all ion buffers\n", __func__);
  252. kfree_sensitive(handle);
  253. file->private_data = NULL;
  254. return 0;
  255. }
  256. static void req_done(unsigned long data)
  257. {
  258. struct qcedev_control *podev = (struct qcedev_control *)data;
  259. struct qcedev_async_req *areq;
  260. unsigned long flags = 0;
  261. struct qcedev_async_req *new_req = NULL;
  262. int ret = 0;
  263. int current_req_info = 0;
  264. spin_lock_irqsave(&podev->lock, flags);
  265. areq = podev->active_command;
  266. podev->active_command = NULL;
  267. again:
  268. if (!list_empty(&podev->ready_commands)) {
  269. new_req = container_of(podev->ready_commands.next,
  270. struct qcedev_async_req, list);
  271. list_del(&new_req->list);
  272. podev->active_command = new_req;
  273. new_req->err = 0;
  274. if (new_req->op_type == QCEDEV_CRYPTO_OPER_CIPHER)
  275. ret = start_cipher_req(podev, &current_req_info);
  276. else if (new_req->op_type == QCEDEV_CRYPTO_OPER_OFFLOAD_CIPHER)
  277. ret = start_offload_cipher_req(podev, &current_req_info);
  278. else
  279. ret = start_sha_req(podev, &current_req_info);
  280. }
  281. spin_unlock_irqrestore(&podev->lock, flags);
  282. if (areq)
  283. complete(&areq->complete);
  284. if (new_req && ret) {
  285. complete(&new_req->complete);
  286. spin_lock_irqsave(&podev->lock, flags);
  287. podev->active_command = NULL;
  288. areq = NULL;
  289. ret = 0;
  290. new_req = NULL;
  291. goto again;
  292. }
  293. }
  294. void qcedev_sha_req_cb(void *cookie, unsigned char *digest,
  295. unsigned char *authdata, int ret)
  296. {
  297. struct qcedev_sha_req *areq;
  298. struct qcedev_control *pdev;
  299. struct qcedev_handle *handle;
  300. uint32_t *auth32 = (uint32_t *)authdata;
  301. areq = (struct qcedev_sha_req *) cookie;
  302. handle = (struct qcedev_handle *) areq->cookie;
  303. pdev = handle->cntl;
  304. if (digest)
  305. memcpy(&handle->sha_ctxt.digest[0], digest, 32);
  306. if (authdata) {
  307. handle->sha_ctxt.auth_data[0] = auth32[0];
  308. handle->sha_ctxt.auth_data[1] = auth32[1];
  309. }
  310. tasklet_schedule(&pdev->done_tasklet);
  311. };
  312. void qcedev_cipher_req_cb(void *cookie, unsigned char *icv,
  313. unsigned char *iv, int ret)
  314. {
  315. struct qcedev_cipher_req *areq;
  316. struct qcedev_handle *handle;
  317. struct qcedev_control *podev;
  318. struct qcedev_async_req *qcedev_areq;
  319. areq = (struct qcedev_cipher_req *) cookie;
  320. handle = (struct qcedev_handle *) areq->cookie;
  321. podev = handle->cntl;
  322. qcedev_areq = podev->active_command;
  323. if (iv)
  324. memcpy(&qcedev_areq->cipher_op_req.iv[0], iv,
  325. qcedev_areq->cipher_op_req.ivlen);
  326. tasklet_schedule(&podev->done_tasklet);
  327. };
  328. static int start_cipher_req(struct qcedev_control *podev,
  329. int *current_req_info)
  330. {
  331. struct qcedev_async_req *qcedev_areq;
  332. struct qce_req creq;
  333. int ret = 0;
  334. /* start the command on the podev->active_command */
  335. qcedev_areq = podev->active_command;
  336. qcedev_areq->cipher_req.cookie = qcedev_areq->handle;
  337. if (qcedev_areq->cipher_op_req.use_pmem == QCEDEV_USE_PMEM) {
  338. pr_err("%s: Use of PMEM is not supported\n", __func__);
  339. goto unsupported;
  340. }
  341. creq.pmem = NULL;
  342. switch (qcedev_areq->cipher_op_req.alg) {
  343. case QCEDEV_ALG_DES:
  344. creq.alg = CIPHER_ALG_DES;
  345. break;
  346. case QCEDEV_ALG_3DES:
  347. creq.alg = CIPHER_ALG_3DES;
  348. break;
  349. case QCEDEV_ALG_AES:
  350. creq.alg = CIPHER_ALG_AES;
  351. break;
  352. default:
  353. return -EINVAL;
  354. }
  355. switch (qcedev_areq->cipher_op_req.mode) {
  356. case QCEDEV_AES_MODE_CBC:
  357. case QCEDEV_DES_MODE_CBC:
  358. creq.mode = QCE_MODE_CBC;
  359. break;
  360. case QCEDEV_AES_MODE_ECB:
  361. case QCEDEV_DES_MODE_ECB:
  362. creq.mode = QCE_MODE_ECB;
  363. break;
  364. case QCEDEV_AES_MODE_CTR:
  365. creq.mode = QCE_MODE_CTR;
  366. break;
  367. case QCEDEV_AES_MODE_XTS:
  368. creq.mode = QCE_MODE_XTS;
  369. break;
  370. default:
  371. return -EINVAL;
  372. }
  373. if ((creq.alg == CIPHER_ALG_AES) &&
  374. (creq.mode == QCE_MODE_CTR)) {
  375. creq.dir = QCE_ENCRYPT;
  376. } else {
  377. if (qcedev_areq->cipher_op_req.op == QCEDEV_OPER_ENC)
  378. creq.dir = QCE_ENCRYPT;
  379. else
  380. creq.dir = QCE_DECRYPT;
  381. }
  382. creq.iv = &qcedev_areq->cipher_op_req.iv[0];
  383. creq.ivsize = qcedev_areq->cipher_op_req.ivlen;
  384. creq.enckey = &qcedev_areq->cipher_op_req.enckey[0];
  385. creq.encklen = qcedev_areq->cipher_op_req.encklen;
  386. creq.cryptlen = qcedev_areq->cipher_op_req.data_len;
  387. if (qcedev_areq->cipher_op_req.encklen == 0) {
  388. if ((qcedev_areq->cipher_op_req.op == QCEDEV_OPER_ENC_NO_KEY)
  389. || (qcedev_areq->cipher_op_req.op ==
  390. QCEDEV_OPER_DEC_NO_KEY))
  391. creq.op = QCE_REQ_ABLK_CIPHER_NO_KEY;
  392. else {
  393. int i;
  394. for (i = 0; i < QCEDEV_MAX_KEY_SIZE; i++) {
  395. if (qcedev_areq->cipher_op_req.enckey[i] != 0)
  396. break;
  397. }
  398. if ((podev->platform_support.hw_key_support == 1) &&
  399. (i == QCEDEV_MAX_KEY_SIZE))
  400. creq.op = QCE_REQ_ABLK_CIPHER;
  401. else {
  402. ret = -EINVAL;
  403. goto unsupported;
  404. }
  405. }
  406. } else {
  407. creq.op = QCE_REQ_ABLK_CIPHER;
  408. }
  409. creq.qce_cb = qcedev_cipher_req_cb;
  410. creq.areq = (void *)&qcedev_areq->cipher_req;
  411. creq.flags = 0;
  412. creq.offload_op = 0;
  413. ret = qce_ablk_cipher_req(podev->qce, &creq);
  414. *current_req_info = creq.current_req_info;
  415. unsupported:
  416. qcedev_areq->err = ret ? -ENXIO : 0
  417. return ret;
  418. };
  419. void qcedev_offload_cipher_req_cb(void *cookie, unsigned char *icv,
  420. unsigned char *iv, int ret)
  421. {
  422. struct qcedev_cipher_req *areq;
  423. struct qcedev_handle *handle;
  424. struct qcedev_control *podev;
  425. struct qcedev_async_req *qcedev_areq;
  426. areq = (struct qcedev_cipher_req *) cookie;
  427. handle = (struct qcedev_handle *) areq->cookie;
  428. podev = handle->cntl;
  429. qcedev_areq = podev->active_command;
  430. if (iv)
  431. memcpy(&qcedev_areq->offload_cipher_op_req.iv[0], iv,
  432. qcedev_areq->offload_cipher_op_req.ivlen);
  433. tasklet_schedule(&podev->done_tasklet);
  434. }
  435. static int start_offload_cipher_req(struct qcedev_control *podev,
  436. int *current_req_info)
  437. {
  438. struct qcedev_async_req *qcedev_areq;
  439. struct qce_req creq;
  440. u8 patt_sz = 0, proc_data_sz = 0;
  441. int ret = 0;
  442. /* Start the command on the podev->active_command */
  443. qcedev_areq = podev->active_command;
  444. qcedev_areq->cipher_req.cookie = qcedev_areq->handle;
  445. switch (qcedev_areq->offload_cipher_op_req.alg) {
  446. case QCEDEV_ALG_AES:
  447. creq.alg = CIPHER_ALG_AES;
  448. break;
  449. default:
  450. return -EINVAL;
  451. }
  452. switch (qcedev_areq->offload_cipher_op_req.mode) {
  453. case QCEDEV_AES_MODE_CBC:
  454. creq.mode = QCE_MODE_CBC;
  455. break;
  456. case QCEDEV_AES_MODE_CTR:
  457. creq.mode = QCE_MODE_CTR;
  458. break;
  459. default:
  460. return -EINVAL;
  461. }
  462. if (qcedev_areq->offload_cipher_op_req.is_copy_op) {
  463. creq.dir = QCE_ENCRYPT;
  464. } else {
  465. switch(qcedev_areq->offload_cipher_op_req.op) {
  466. case QCEDEV_OFFLOAD_HLOS_HLOS:
  467. case QCEDEV_OFFLOAD_HLOS_CPB:
  468. creq.dir = QCE_DECRYPT;
  469. break;
  470. case QCEDEV_OFFLOAD_CPB_HLOS:
  471. creq.dir = QCE_ENCRYPT;
  472. break;
  473. default:
  474. return -EINVAL;
  475. }
  476. }
  477. creq.iv = &qcedev_areq->offload_cipher_op_req.iv[0];
  478. creq.ivsize = qcedev_areq->offload_cipher_op_req.ivlen;
  479. creq.iv_ctr_size = qcedev_areq->offload_cipher_op_req.iv_ctr_size;
  480. creq.encklen = qcedev_areq->offload_cipher_op_req.encklen;
  481. /* OFFLOAD use cases use PIPE keys so no need to set keys */
  482. creq.flags = QCEDEV_CTX_USE_PIPE_KEY;
  483. creq.op = QCE_REQ_ABLK_CIPHER_NO_KEY;
  484. creq.offload_op = (int)qcedev_areq->offload_cipher_op_req.op;
  485. if (qcedev_areq->offload_cipher_op_req.is_copy_op)
  486. creq.is_copy_op = true;
  487. creq.cryptlen = qcedev_areq->offload_cipher_op_req.data_len;
  488. creq.qce_cb = qcedev_offload_cipher_req_cb;
  489. creq.areq = (void *)&qcedev_areq->cipher_req;
  490. patt_sz = qcedev_areq->offload_cipher_op_req.pattern_info.patt_sz;
  491. proc_data_sz =
  492. qcedev_areq->offload_cipher_op_req.pattern_info.proc_data_sz;
  493. creq.is_pattern_valid =
  494. qcedev_areq->offload_cipher_op_req.is_pattern_valid;
  495. if (creq.is_pattern_valid) {
  496. creq.pattern_info = 0x1;
  497. if (patt_sz)
  498. creq.pattern_info |= (patt_sz - 1) << 4;
  499. if (proc_data_sz)
  500. creq.pattern_info |= (proc_data_sz - 1) << 8;
  501. creq.pattern_info |=
  502. qcedev_areq->offload_cipher_op_req.pattern_info.patt_offset << 12;
  503. }
  504. creq.block_offset = qcedev_areq->offload_cipher_op_req.block_offset;
  505. ret = qce_ablk_cipher_req(podev->qce, &creq);
  506. *current_req_info = creq.current_req_info;
  507. qcedev_areq->err = ret ? -ENXIO : 0
  508. return ret;
  509. }
  510. static int start_sha_req(struct qcedev_control *podev,
  511. int *current_req_info)
  512. {
  513. struct qcedev_async_req *qcedev_areq;
  514. struct qce_sha_req sreq;
  515. int ret = 0;
  516. struct qcedev_handle *handle;
  517. /* start the command on the podev->active_command */
  518. qcedev_areq = podev->active_command;
  519. handle = qcedev_areq->handle;
  520. switch (qcedev_areq->sha_op_req.alg) {
  521. case QCEDEV_ALG_SHA1:
  522. sreq.alg = QCE_HASH_SHA1;
  523. break;
  524. case QCEDEV_ALG_SHA256:
  525. sreq.alg = QCE_HASH_SHA256;
  526. break;
  527. case QCEDEV_ALG_SHA1_HMAC:
  528. if (podev->ce_support.sha_hmac) {
  529. sreq.alg = QCE_HASH_SHA1_HMAC;
  530. sreq.authkey = &handle->sha_ctxt.authkey[0];
  531. sreq.authklen = QCEDEV_MAX_SHA_BLOCK_SIZE;
  532. } else {
  533. sreq.alg = QCE_HASH_SHA1;
  534. sreq.authkey = NULL;
  535. }
  536. break;
  537. case QCEDEV_ALG_SHA256_HMAC:
  538. if (podev->ce_support.sha_hmac) {
  539. sreq.alg = QCE_HASH_SHA256_HMAC;
  540. sreq.authkey = &handle->sha_ctxt.authkey[0];
  541. sreq.authklen = QCEDEV_MAX_SHA_BLOCK_SIZE;
  542. } else {
  543. sreq.alg = QCE_HASH_SHA256;
  544. sreq.authkey = NULL;
  545. }
  546. break;
  547. case QCEDEV_ALG_AES_CMAC:
  548. sreq.alg = QCE_HASH_AES_CMAC;
  549. sreq.authkey = &handle->sha_ctxt.authkey[0];
  550. sreq.authklen = qcedev_areq->sha_op_req.authklen;
  551. break;
  552. default:
  553. pr_err("Algorithm %d not supported, exiting\n",
  554. qcedev_areq->sha_op_req.alg);
  555. return -EINVAL;
  556. }
  557. qcedev_areq->sha_req.cookie = handle;
  558. sreq.qce_cb = qcedev_sha_req_cb;
  559. if (qcedev_areq->sha_op_req.alg != QCEDEV_ALG_AES_CMAC) {
  560. sreq.auth_data[0] = handle->sha_ctxt.auth_data[0];
  561. sreq.auth_data[1] = handle->sha_ctxt.auth_data[1];
  562. sreq.auth_data[2] = handle->sha_ctxt.auth_data[2];
  563. sreq.auth_data[3] = handle->sha_ctxt.auth_data[3];
  564. sreq.digest = &handle->sha_ctxt.digest[0];
  565. sreq.first_blk = handle->sha_ctxt.first_blk;
  566. sreq.last_blk = handle->sha_ctxt.last_blk;
  567. }
  568. sreq.size = qcedev_areq->sha_req.sreq.nbytes;
  569. sreq.src = qcedev_areq->sha_req.sreq.src;
  570. sreq.areq = (void *)&qcedev_areq->sha_req;
  571. sreq.flags = 0;
  572. ret = qce_process_sha_req(podev->qce, &sreq);
  573. *current_req_info = sreq.current_req_info;
  574. qcedev_areq->err = ret ? -ENXIO : 0
  575. return ret;
  576. };
  577. static void qcedev_check_crypto_status(
  578. struct qcedev_async_req *qcedev_areq, void *handle,
  579. bool print_err)
  580. {
  581. unsigned int s1, s2, s3, s4, s5, s6;
  582. qcedev_areq->offload_cipher_op_req.err = QCEDEV_OFFLOAD_NO_ERROR;
  583. qce_get_crypto_status(handle, &s1, &s2, &s3, &s4, &s5, &s6);
  584. if (print_err) {
  585. pr_err("%s: sts = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", __func__,
  586. s1, s2, s3, s4, s5, s6);
  587. }
  588. if ((s6 & QCEDEV_PIPE_KEY_TIMER2_EXPIRED_VEC_MASK) ||
  589. (s3 & QCEDEV_PIPE_KEY_TIMER1_EXPIRED_VEC_MASK)) {
  590. pr_info("%s: crypto timer expired\n", __func__);
  591. pr_info("%s: sts = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", __func__,
  592. s1, s2, s3, s4, s5, s6);
  593. qcedev_areq->offload_cipher_op_req.err =
  594. QCEDEV_OFFLOAD_TIMER_ERROR;
  595. }
  596. return;
  597. }
  598. static int submit_req(struct qcedev_async_req *qcedev_areq,
  599. struct qcedev_handle *handle)
  600. {
  601. struct qcedev_control *podev;
  602. unsigned long flags = 0;
  603. int ret = 0;
  604. struct qcedev_stat *pstat;
  605. int current_req_info = 0;
  606. int wait = 0;
  607. bool print_sts = false;
  608. qcedev_areq->err = 0;
  609. podev = handle->cntl;
  610. qcedev_check_crypto_status(qcedev_areq, podev->qce, print_sts);
  611. if (qcedev_areq->offload_cipher_op_req.err != QCEDEV_OFFLOAD_NO_ERROR)
  612. return 0;
  613. spin_lock_irqsave(&podev->lock, flags);
  614. if (podev->active_command == NULL) {
  615. podev->active_command = qcedev_areq;
  616. if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_CIPHER)
  617. ret = start_cipher_req(podev, &current_req_info);
  618. else if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_OFFLOAD_CIPHER)
  619. ret = start_offload_cipher_req(podev, &current_req_info);
  620. else
  621. ret = start_sha_req(podev, &current_req_info);
  622. } else {
  623. list_add_tail(&qcedev_areq->list, &podev->ready_commands);
  624. }
  625. if (ret != 0)
  626. podev->active_command = NULL;
  627. spin_unlock_irqrestore(&podev->lock, flags);
  628. if (ret == 0)
  629. wait = wait_for_completion_timeout(&qcedev_areq->complete,
  630. msecs_to_jiffies(MAX_CRYPTO_WAIT_TIME));
  631. if (!wait) {
  632. /*
  633. * This means wait timed out, and the callback routine was not
  634. * exercised. The callback sequence does some housekeeping which
  635. * would be missed here, hence having a call to qce here to do
  636. * that.
  637. */
  638. pr_err("%s: wait timed out, req info = %d\n", __func__,
  639. current_req_info);
  640. print_sts = true;
  641. qcedev_check_crypto_status(qcedev_areq, podev->qce, print_sts);
  642. qce_manage_timeout(podev->qce, current_req_info);
  643. }
  644. if (ret)
  645. qcedev_areq->err = -EIO;
  646. qcedev_check_crypto_status(qcedev_areq, podev->qce, print_sts);
  647. if (qcedev_areq->offload_cipher_op_req.err != QCEDEV_OFFLOAD_NO_ERROR)
  648. return 0;
  649. pstat = &_qcedev_stat;
  650. if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_CIPHER) {
  651. switch (qcedev_areq->cipher_op_req.op) {
  652. case QCEDEV_OPER_DEC:
  653. if (qcedev_areq->err)
  654. pstat->qcedev_dec_fail++;
  655. else
  656. pstat->qcedev_dec_success++;
  657. break;
  658. case QCEDEV_OPER_ENC:
  659. if (qcedev_areq->err)
  660. pstat->qcedev_enc_fail++;
  661. else
  662. pstat->qcedev_enc_success++;
  663. break;
  664. default:
  665. break;
  666. }
  667. } else if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_OFFLOAD_CIPHER) {
  668. //Do nothing
  669. } else {
  670. if (qcedev_areq->err)
  671. pstat->qcedev_sha_fail++;
  672. else
  673. pstat->qcedev_sha_success++;
  674. }
  675. return qcedev_areq->err;
  676. }
  677. static int qcedev_sha_init(struct qcedev_async_req *areq,
  678. struct qcedev_handle *handle)
  679. {
  680. struct qcedev_sha_ctxt *sha_ctxt = &handle->sha_ctxt;
  681. memset(sha_ctxt, 0, sizeof(struct qcedev_sha_ctxt));
  682. sha_ctxt->first_blk = 1;
  683. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
  684. (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)) {
  685. memcpy(&sha_ctxt->digest[0],
  686. &_std_init_vector_sha1_uint8[0], SHA1_DIGEST_SIZE);
  687. sha_ctxt->diglen = SHA1_DIGEST_SIZE;
  688. } else {
  689. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA256) ||
  690. (areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC)) {
  691. memcpy(&sha_ctxt->digest[0],
  692. &_std_init_vector_sha256_uint8[0],
  693. SHA256_DIGEST_SIZE);
  694. sha_ctxt->diglen = SHA256_DIGEST_SIZE;
  695. }
  696. }
  697. sha_ctxt->init_done = true;
  698. return 0;
  699. }
  700. static int qcedev_sha_update_max_xfer(struct qcedev_async_req *qcedev_areq,
  701. struct qcedev_handle *handle,
  702. struct scatterlist *sg_src)
  703. {
  704. int err = 0;
  705. int i = 0;
  706. uint32_t total;
  707. uint8_t *user_src = NULL;
  708. uint8_t *k_src = NULL;
  709. uint8_t *k_buf_src = NULL;
  710. uint8_t *k_align_src = NULL;
  711. uint32_t sha_pad_len = 0;
  712. uint32_t trailing_buf_len = 0;
  713. uint32_t t_buf = handle->sha_ctxt.trailing_buf_len;
  714. uint32_t sha_block_size;
  715. total = qcedev_areq->sha_op_req.data_len + t_buf;
  716. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1)
  717. sha_block_size = SHA1_BLOCK_SIZE;
  718. else
  719. sha_block_size = SHA256_BLOCK_SIZE;
  720. if (total <= sha_block_size) {
  721. uint32_t len = qcedev_areq->sha_op_req.data_len;
  722. i = 0;
  723. k_src = &handle->sha_ctxt.trailing_buf[t_buf];
  724. /* Copy data from user src(s) */
  725. while (len > 0) {
  726. user_src = qcedev_areq->sha_op_req.data[i].vaddr;
  727. if (user_src && copy_from_user(k_src,
  728. (void __user *)user_src,
  729. qcedev_areq->sha_op_req.data[i].len))
  730. return -EFAULT;
  731. len -= qcedev_areq->sha_op_req.data[i].len;
  732. k_src += qcedev_areq->sha_op_req.data[i].len;
  733. i++;
  734. }
  735. handle->sha_ctxt.trailing_buf_len = total;
  736. return 0;
  737. }
  738. k_buf_src = kmalloc(total + CACHE_LINE_SIZE * 2,
  739. GFP_KERNEL);
  740. if (k_buf_src == NULL)
  741. return -ENOMEM;
  742. k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
  743. CACHE_LINE_SIZE);
  744. k_src = k_align_src;
  745. /* check for trailing buffer from previous updates and append it */
  746. if (t_buf > 0) {
  747. memcpy(k_src, &handle->sha_ctxt.trailing_buf[0],
  748. t_buf);
  749. k_src += t_buf;
  750. }
  751. /* Copy data from user src(s) */
  752. user_src = qcedev_areq->sha_op_req.data[0].vaddr;
  753. if (user_src && copy_from_user(k_src,
  754. (void __user *)user_src,
  755. qcedev_areq->sha_op_req.data[0].len)) {
  756. memset(k_buf_src, 0, ksize((void *)k_buf_src));
  757. kfree(k_buf_src);
  758. return -EFAULT;
  759. }
  760. k_src += qcedev_areq->sha_op_req.data[0].len;
  761. for (i = 1; i < qcedev_areq->sha_op_req.entries; i++) {
  762. user_src = qcedev_areq->sha_op_req.data[i].vaddr;
  763. if (user_src && copy_from_user(k_src,
  764. (void __user *)user_src,
  765. qcedev_areq->sha_op_req.data[i].len)) {
  766. memset(k_buf_src, 0, ksize((void *)k_buf_src));
  767. kfree(k_buf_src);
  768. return -EFAULT;
  769. }
  770. k_src += qcedev_areq->sha_op_req.data[i].len;
  771. }
  772. /* get new trailing buffer */
  773. sha_pad_len = ALIGN(total, CE_SHA_BLOCK_SIZE) - total;
  774. trailing_buf_len = CE_SHA_BLOCK_SIZE - sha_pad_len;
  775. qcedev_areq->sha_req.sreq.src = sg_src;
  776. sg_init_one(qcedev_areq->sha_req.sreq.src, k_align_src,
  777. total-trailing_buf_len);
  778. qcedev_areq->sha_req.sreq.nbytes = total - trailing_buf_len;
  779. /* update sha_ctxt trailing buf content to new trailing buf */
  780. if (trailing_buf_len > 0) {
  781. memset(&handle->sha_ctxt.trailing_buf[0], 0, 64);
  782. memcpy(&handle->sha_ctxt.trailing_buf[0],
  783. (k_src - trailing_buf_len),
  784. trailing_buf_len);
  785. }
  786. handle->sha_ctxt.trailing_buf_len = trailing_buf_len;
  787. err = submit_req(qcedev_areq, handle);
  788. handle->sha_ctxt.last_blk = 0;
  789. handle->sha_ctxt.first_blk = 0;
  790. memset(k_buf_src, 0, ksize((void *)k_buf_src));
  791. kfree(k_buf_src);
  792. return err;
  793. }
  794. static int qcedev_sha_update(struct qcedev_async_req *qcedev_areq,
  795. struct qcedev_handle *handle,
  796. struct scatterlist *sg_src)
  797. {
  798. int err = 0;
  799. int i = 0;
  800. int j = 0;
  801. int k = 0;
  802. int num_entries = 0;
  803. uint32_t total = 0;
  804. if (!handle->sha_ctxt.init_done) {
  805. pr_err("%s Init was not called\n", __func__);
  806. return -EINVAL;
  807. }
  808. if (qcedev_areq->sha_op_req.data_len > QCE_MAX_OPER_DATA) {
  809. struct qcedev_sha_op_req *saved_req;
  810. struct qcedev_sha_op_req req;
  811. struct qcedev_sha_op_req *sreq = &qcedev_areq->sha_op_req;
  812. /* save the original req structure */
  813. saved_req =
  814. kmalloc(sizeof(struct qcedev_sha_op_req), GFP_KERNEL);
  815. if (saved_req == NULL) {
  816. pr_err("%s:Can't Allocate mem:saved_req 0x%lx\n",
  817. __func__, (uintptr_t)saved_req);
  818. return -ENOMEM;
  819. }
  820. memcpy(&req, sreq, sizeof(struct qcedev_sha_op_req));
  821. memcpy(saved_req, sreq, sizeof(struct qcedev_sha_op_req));
  822. i = 0;
  823. /* Address 32 KB at a time */
  824. while ((i < req.entries) && (err == 0)) {
  825. if (sreq->data[i].len > QCE_MAX_OPER_DATA) {
  826. sreq->data[0].len = QCE_MAX_OPER_DATA;
  827. if (i > 0) {
  828. sreq->data[0].vaddr =
  829. sreq->data[i].vaddr;
  830. }
  831. sreq->data_len = QCE_MAX_OPER_DATA;
  832. sreq->entries = 1;
  833. err = qcedev_sha_update_max_xfer(qcedev_areq,
  834. handle, sg_src);
  835. sreq->data[i].len = req.data[i].len -
  836. QCE_MAX_OPER_DATA;
  837. sreq->data[i].vaddr = req.data[i].vaddr +
  838. QCE_MAX_OPER_DATA;
  839. req.data[i].vaddr = sreq->data[i].vaddr;
  840. req.data[i].len = sreq->data[i].len;
  841. } else {
  842. total = 0;
  843. for (j = i; j < req.entries; j++) {
  844. num_entries++;
  845. if ((total + sreq->data[j].len) >=
  846. QCE_MAX_OPER_DATA) {
  847. sreq->data[j].len =
  848. (QCE_MAX_OPER_DATA - total);
  849. total = QCE_MAX_OPER_DATA;
  850. break;
  851. }
  852. total += sreq->data[j].len;
  853. }
  854. sreq->data_len = total;
  855. if (i > 0)
  856. for (k = 0; k < num_entries; k++) {
  857. sreq->data[k].len =
  858. sreq->data[i+k].len;
  859. sreq->data[k].vaddr =
  860. sreq->data[i+k].vaddr;
  861. }
  862. sreq->entries = num_entries;
  863. i = j;
  864. err = qcedev_sha_update_max_xfer(qcedev_areq,
  865. handle, sg_src);
  866. num_entries = 0;
  867. sreq->data[i].vaddr = req.data[i].vaddr +
  868. sreq->data[i].len;
  869. sreq->data[i].len = req.data[i].len -
  870. sreq->data[i].len;
  871. req.data[i].vaddr = sreq->data[i].vaddr;
  872. req.data[i].len = sreq->data[i].len;
  873. if (sreq->data[i].len == 0)
  874. i++;
  875. }
  876. } /* end of while ((i < req.entries) && (err == 0)) */
  877. /* Restore the original req structure */
  878. for (i = 0; i < saved_req->entries; i++) {
  879. sreq->data[i].len = saved_req->data[i].len;
  880. sreq->data[i].vaddr = saved_req->data[i].vaddr;
  881. }
  882. sreq->entries = saved_req->entries;
  883. sreq->data_len = saved_req->data_len;
  884. memset(saved_req, 0, ksize((void *)saved_req));
  885. kfree(saved_req);
  886. } else
  887. err = qcedev_sha_update_max_xfer(qcedev_areq, handle, sg_src);
  888. return err;
  889. }
  890. static int qcedev_sha_final(struct qcedev_async_req *qcedev_areq,
  891. struct qcedev_handle *handle)
  892. {
  893. int err = 0;
  894. struct scatterlist sg_src;
  895. uint32_t total;
  896. uint8_t *k_buf_src = NULL;
  897. uint8_t *k_align_src = NULL;
  898. if (!handle->sha_ctxt.init_done) {
  899. pr_err("%s Init was not called\n", __func__);
  900. return -EINVAL;
  901. }
  902. handle->sha_ctxt.last_blk = 1;
  903. total = handle->sha_ctxt.trailing_buf_len;
  904. k_buf_src = kmalloc(total + CACHE_LINE_SIZE * 2,
  905. GFP_KERNEL);
  906. if (k_buf_src == NULL)
  907. return -ENOMEM;
  908. k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
  909. CACHE_LINE_SIZE);
  910. memcpy(k_align_src, &handle->sha_ctxt.trailing_buf[0], total);
  911. qcedev_areq->sha_req.sreq.src = (struct scatterlist *) &sg_src;
  912. sg_init_one(qcedev_areq->sha_req.sreq.src, k_align_src, total);
  913. qcedev_areq->sha_req.sreq.nbytes = total;
  914. err = submit_req(qcedev_areq, handle);
  915. handle->sha_ctxt.first_blk = 0;
  916. handle->sha_ctxt.last_blk = 0;
  917. handle->sha_ctxt.auth_data[0] = 0;
  918. handle->sha_ctxt.auth_data[1] = 0;
  919. handle->sha_ctxt.trailing_buf_len = 0;
  920. handle->sha_ctxt.init_done = false;
  921. memset(&handle->sha_ctxt.trailing_buf[0], 0, 64);
  922. memset(k_buf_src, 0, ksize((void *)k_buf_src));
  923. kfree(k_buf_src);
  924. qcedev_areq->sha_req.sreq.src = NULL;
  925. return err;
  926. }
  927. static int qcedev_hash_cmac(struct qcedev_async_req *qcedev_areq,
  928. struct qcedev_handle *handle,
  929. struct scatterlist *sg_src)
  930. {
  931. int err = 0;
  932. int i = 0;
  933. uint32_t total;
  934. uint8_t *user_src = NULL;
  935. uint8_t *k_src = NULL;
  936. uint8_t *k_buf_src = NULL;
  937. total = qcedev_areq->sha_op_req.data_len;
  938. if ((qcedev_areq->sha_op_req.authklen != QCEDEV_AES_KEY_128) &&
  939. (qcedev_areq->sha_op_req.authklen != QCEDEV_AES_KEY_256)) {
  940. pr_err("%s: unsupported key length\n", __func__);
  941. return -EINVAL;
  942. }
  943. if (copy_from_user(&handle->sha_ctxt.authkey[0],
  944. (void __user *)qcedev_areq->sha_op_req.authkey,
  945. qcedev_areq->sha_op_req.authklen))
  946. return -EFAULT;
  947. if (total > U32_MAX - CACHE_LINE_SIZE * 2)
  948. return -EINVAL;
  949. k_buf_src = kmalloc(total + CACHE_LINE_SIZE * 2, GFP_KERNEL);
  950. if (k_buf_src == NULL)
  951. return -ENOMEM;
  952. k_src = k_buf_src;
  953. /* Copy data from user src(s) */
  954. user_src = qcedev_areq->sha_op_req.data[0].vaddr;
  955. for (i = 0; i < qcedev_areq->sha_op_req.entries; i++) {
  956. user_src = qcedev_areq->sha_op_req.data[i].vaddr;
  957. if (user_src && copy_from_user(k_src, (void __user *)user_src,
  958. qcedev_areq->sha_op_req.data[i].len)) {
  959. memset(k_buf_src, 0, ksize((void *)k_buf_src));
  960. kfree(k_buf_src);
  961. return -EFAULT;
  962. }
  963. k_src += qcedev_areq->sha_op_req.data[i].len;
  964. }
  965. qcedev_areq->sha_req.sreq.src = sg_src;
  966. sg_init_one(qcedev_areq->sha_req.sreq.src, k_buf_src, total);
  967. qcedev_areq->sha_req.sreq.nbytes = total;
  968. handle->sha_ctxt.diglen = qcedev_areq->sha_op_req.diglen;
  969. err = submit_req(qcedev_areq, handle);
  970. memset(k_buf_src, 0, ksize((void *)k_buf_src));
  971. kfree(k_buf_src);
  972. return err;
  973. }
  974. static int qcedev_set_hmac_auth_key(struct qcedev_async_req *areq,
  975. struct qcedev_handle *handle,
  976. struct scatterlist *sg_src)
  977. {
  978. int err = 0;
  979. if (areq->sha_op_req.authklen <= QCEDEV_MAX_KEY_SIZE) {
  980. qcedev_sha_init(areq, handle);
  981. if (copy_from_user(&handle->sha_ctxt.authkey[0],
  982. (void __user *)areq->sha_op_req.authkey,
  983. areq->sha_op_req.authklen))
  984. return -EFAULT;
  985. } else {
  986. struct qcedev_async_req authkey_areq;
  987. uint8_t authkey[QCEDEV_MAX_SHA_BLOCK_SIZE];
  988. init_completion(&authkey_areq.complete);
  989. authkey_areq.sha_op_req.entries = 1;
  990. authkey_areq.sha_op_req.data[0].vaddr =
  991. areq->sha_op_req.authkey;
  992. authkey_areq.sha_op_req.data[0].len = areq->sha_op_req.authklen;
  993. authkey_areq.sha_op_req.data_len = areq->sha_op_req.authklen;
  994. authkey_areq.sha_op_req.diglen = 0;
  995. authkey_areq.handle = handle;
  996. memset(&authkey_areq.sha_op_req.digest[0], 0,
  997. QCEDEV_MAX_SHA_DIGEST);
  998. if (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)
  999. authkey_areq.sha_op_req.alg = QCEDEV_ALG_SHA1;
  1000. if (areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC)
  1001. authkey_areq.sha_op_req.alg = QCEDEV_ALG_SHA256;
  1002. authkey_areq.op_type = QCEDEV_CRYPTO_OPER_SHA;
  1003. qcedev_sha_init(&authkey_areq, handle);
  1004. err = qcedev_sha_update(&authkey_areq, handle, sg_src);
  1005. if (!err)
  1006. err = qcedev_sha_final(&authkey_areq, handle);
  1007. else
  1008. return err;
  1009. memcpy(&authkey[0], &handle->sha_ctxt.digest[0],
  1010. handle->sha_ctxt.diglen);
  1011. qcedev_sha_init(areq, handle);
  1012. memcpy(&handle->sha_ctxt.authkey[0], &authkey[0],
  1013. handle->sha_ctxt.diglen);
  1014. }
  1015. return err;
  1016. }
  1017. static int qcedev_hmac_get_ohash(struct qcedev_async_req *qcedev_areq,
  1018. struct qcedev_handle *handle)
  1019. {
  1020. int err = 0;
  1021. struct scatterlist sg_src;
  1022. uint8_t *k_src = NULL;
  1023. uint32_t sha_block_size = 0;
  1024. uint32_t sha_digest_size = 0;
  1025. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC) {
  1026. sha_digest_size = SHA1_DIGEST_SIZE;
  1027. sha_block_size = SHA1_BLOCK_SIZE;
  1028. } else {
  1029. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC) {
  1030. sha_digest_size = SHA256_DIGEST_SIZE;
  1031. sha_block_size = SHA256_BLOCK_SIZE;
  1032. }
  1033. }
  1034. k_src = kmalloc(sha_block_size, GFP_KERNEL);
  1035. if (k_src == NULL)
  1036. return -ENOMEM;
  1037. /* check for trailing buffer from previous updates and append it */
  1038. memcpy(k_src, &handle->sha_ctxt.trailing_buf[0],
  1039. handle->sha_ctxt.trailing_buf_len);
  1040. qcedev_areq->sha_req.sreq.src = (struct scatterlist *) &sg_src;
  1041. sg_init_one(qcedev_areq->sha_req.sreq.src, k_src, sha_block_size);
  1042. qcedev_areq->sha_req.sreq.nbytes = sha_block_size;
  1043. memset(&handle->sha_ctxt.trailing_buf[0], 0, sha_block_size);
  1044. memcpy(&handle->sha_ctxt.trailing_buf[0], &handle->sha_ctxt.digest[0],
  1045. sha_digest_size);
  1046. handle->sha_ctxt.trailing_buf_len = sha_digest_size;
  1047. handle->sha_ctxt.first_blk = 1;
  1048. handle->sha_ctxt.last_blk = 0;
  1049. handle->sha_ctxt.auth_data[0] = 0;
  1050. handle->sha_ctxt.auth_data[1] = 0;
  1051. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC) {
  1052. memcpy(&handle->sha_ctxt.digest[0],
  1053. &_std_init_vector_sha1_uint8[0], SHA1_DIGEST_SIZE);
  1054. handle->sha_ctxt.diglen = SHA1_DIGEST_SIZE;
  1055. }
  1056. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC) {
  1057. memcpy(&handle->sha_ctxt.digest[0],
  1058. &_std_init_vector_sha256_uint8[0], SHA256_DIGEST_SIZE);
  1059. handle->sha_ctxt.diglen = SHA256_DIGEST_SIZE;
  1060. }
  1061. err = submit_req(qcedev_areq, handle);
  1062. handle->sha_ctxt.last_blk = 0;
  1063. handle->sha_ctxt.first_blk = 0;
  1064. memset(k_src, 0, ksize((void *)k_src));
  1065. kfree(k_src);
  1066. qcedev_areq->sha_req.sreq.src = NULL;
  1067. return err;
  1068. }
  1069. static int qcedev_hmac_update_iokey(struct qcedev_async_req *areq,
  1070. struct qcedev_handle *handle, bool ikey)
  1071. {
  1072. int i;
  1073. uint32_t constant;
  1074. uint32_t sha_block_size;
  1075. if (ikey)
  1076. constant = 0x36;
  1077. else
  1078. constant = 0x5c;
  1079. if (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)
  1080. sha_block_size = SHA1_BLOCK_SIZE;
  1081. else
  1082. sha_block_size = SHA256_BLOCK_SIZE;
  1083. memset(&handle->sha_ctxt.trailing_buf[0], 0, sha_block_size);
  1084. for (i = 0; i < sha_block_size; i++)
  1085. handle->sha_ctxt.trailing_buf[i] =
  1086. (handle->sha_ctxt.authkey[i] ^ constant);
  1087. handle->sha_ctxt.trailing_buf_len = sha_block_size;
  1088. return 0;
  1089. }
  1090. static int qcedev_hmac_init(struct qcedev_async_req *areq,
  1091. struct qcedev_handle *handle,
  1092. struct scatterlist *sg_src)
  1093. {
  1094. int err;
  1095. struct qcedev_control *podev = handle->cntl;
  1096. err = qcedev_set_hmac_auth_key(areq, handle, sg_src);
  1097. if (err)
  1098. return err;
  1099. if (!podev->ce_support.sha_hmac)
  1100. qcedev_hmac_update_iokey(areq, handle, true);
  1101. return 0;
  1102. }
  1103. static int qcedev_hmac_final(struct qcedev_async_req *areq,
  1104. struct qcedev_handle *handle)
  1105. {
  1106. int err;
  1107. struct qcedev_control *podev = handle->cntl;
  1108. err = qcedev_sha_final(areq, handle);
  1109. if (podev->ce_support.sha_hmac)
  1110. return err;
  1111. qcedev_hmac_update_iokey(areq, handle, false);
  1112. err = qcedev_hmac_get_ohash(areq, handle);
  1113. if (err)
  1114. return err;
  1115. err = qcedev_sha_final(areq, handle);
  1116. return err;
  1117. }
  1118. static int qcedev_hash_init(struct qcedev_async_req *areq,
  1119. struct qcedev_handle *handle,
  1120. struct scatterlist *sg_src)
  1121. {
  1122. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
  1123. (areq->sha_op_req.alg == QCEDEV_ALG_SHA256))
  1124. return qcedev_sha_init(areq, handle);
  1125. else
  1126. return qcedev_hmac_init(areq, handle, sg_src);
  1127. }
  1128. static int qcedev_hash_update(struct qcedev_async_req *qcedev_areq,
  1129. struct qcedev_handle *handle,
  1130. struct scatterlist *sg_src)
  1131. {
  1132. return qcedev_sha_update(qcedev_areq, handle, sg_src);
  1133. }
  1134. static int qcedev_hash_final(struct qcedev_async_req *areq,
  1135. struct qcedev_handle *handle)
  1136. {
  1137. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
  1138. (areq->sha_op_req.alg == QCEDEV_ALG_SHA256))
  1139. return qcedev_sha_final(areq, handle);
  1140. else
  1141. return qcedev_hmac_final(areq, handle);
  1142. }
  1143. static int qcedev_vbuf_ablk_cipher_max_xfer(struct qcedev_async_req *areq,
  1144. int *di, struct qcedev_handle *handle,
  1145. uint8_t *k_align_src)
  1146. {
  1147. int err = 0;
  1148. int i = 0;
  1149. int dst_i = *di;
  1150. struct scatterlist sg_src;
  1151. uint32_t byteoffset = 0;
  1152. uint8_t *user_src = NULL;
  1153. uint8_t *k_align_dst = k_align_src;
  1154. struct qcedev_cipher_op_req *creq = &areq->cipher_op_req;
  1155. if (areq->cipher_op_req.mode == QCEDEV_AES_MODE_CTR)
  1156. byteoffset = areq->cipher_op_req.byteoffset;
  1157. user_src = areq->cipher_op_req.vbuf.src[0].vaddr;
  1158. if (user_src && copy_from_user((k_align_src + byteoffset),
  1159. (void __user *)user_src,
  1160. areq->cipher_op_req.vbuf.src[0].len))
  1161. return -EFAULT;
  1162. k_align_src += byteoffset + areq->cipher_op_req.vbuf.src[0].len;
  1163. for (i = 1; i < areq->cipher_op_req.entries; i++) {
  1164. user_src = areq->cipher_op_req.vbuf.src[i].vaddr;
  1165. if (user_src && copy_from_user(k_align_src,
  1166. (void __user *)user_src,
  1167. areq->cipher_op_req.vbuf.src[i].len)) {
  1168. return -EFAULT;
  1169. }
  1170. k_align_src += areq->cipher_op_req.vbuf.src[i].len;
  1171. }
  1172. /* restore src beginning */
  1173. k_align_src = k_align_dst;
  1174. areq->cipher_op_req.data_len += byteoffset;
  1175. areq->cipher_req.creq.src = (struct scatterlist *) &sg_src;
  1176. areq->cipher_req.creq.dst = (struct scatterlist *) &sg_src;
  1177. /* In place encryption/decryption */
  1178. sg_init_one(areq->cipher_req.creq.src,
  1179. k_align_dst,
  1180. areq->cipher_op_req.data_len);
  1181. areq->cipher_req.creq.cryptlen = areq->cipher_op_req.data_len;
  1182. areq->cipher_req.creq.iv = areq->cipher_op_req.iv;
  1183. areq->cipher_op_req.entries = 1;
  1184. err = submit_req(areq, handle);
  1185. /* copy data to destination buffer*/
  1186. creq->data_len -= byteoffset;
  1187. while (creq->data_len > 0) {
  1188. if (creq->vbuf.dst[dst_i].len <= creq->data_len) {
  1189. if (err == 0 && copy_to_user(
  1190. (void __user *)creq->vbuf.dst[dst_i].vaddr,
  1191. (k_align_dst + byteoffset),
  1192. creq->vbuf.dst[dst_i].len)) {
  1193. err = -EFAULT;
  1194. goto exit;
  1195. }
  1196. k_align_dst += creq->vbuf.dst[dst_i].len;
  1197. creq->data_len -= creq->vbuf.dst[dst_i].len;
  1198. dst_i++;
  1199. } else {
  1200. if (err == 0 && copy_to_user(
  1201. (void __user *)creq->vbuf.dst[dst_i].vaddr,
  1202. (k_align_dst + byteoffset),
  1203. creq->data_len)) {
  1204. err = -EFAULT;
  1205. goto exit;
  1206. }
  1207. k_align_dst += creq->data_len;
  1208. creq->vbuf.dst[dst_i].len -= creq->data_len;
  1209. creq->vbuf.dst[dst_i].vaddr += creq->data_len;
  1210. creq->data_len = 0;
  1211. }
  1212. }
  1213. *di = dst_i;
  1214. exit:
  1215. areq->cipher_req.creq.src = NULL;
  1216. areq->cipher_req.creq.dst = NULL;
  1217. return err;
  1218. };
  1219. static int qcedev_vbuf_ablk_cipher(struct qcedev_async_req *areq,
  1220. struct qcedev_handle *handle)
  1221. {
  1222. int err = 0;
  1223. int di = 0;
  1224. int i = 0;
  1225. int j = 0;
  1226. int k = 0;
  1227. uint32_t byteoffset = 0;
  1228. int num_entries = 0;
  1229. uint32_t total = 0;
  1230. uint32_t len;
  1231. uint8_t *k_buf_src = NULL;
  1232. uint8_t *k_align_src = NULL;
  1233. uint32_t max_data_xfer;
  1234. struct qcedev_cipher_op_req *saved_req;
  1235. struct qcedev_cipher_op_req *creq = &areq->cipher_op_req;
  1236. total = 0;
  1237. if (areq->cipher_op_req.mode == QCEDEV_AES_MODE_CTR)
  1238. byteoffset = areq->cipher_op_req.byteoffset;
  1239. k_buf_src = kmalloc(QCE_MAX_OPER_DATA + CACHE_LINE_SIZE * 2,
  1240. GFP_KERNEL);
  1241. if (k_buf_src == NULL)
  1242. return -ENOMEM;
  1243. k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
  1244. CACHE_LINE_SIZE);
  1245. max_data_xfer = QCE_MAX_OPER_DATA - byteoffset;
  1246. saved_req = kmemdup(creq, sizeof(struct qcedev_cipher_op_req),
  1247. GFP_KERNEL);
  1248. if (saved_req == NULL) {
  1249. memset(k_buf_src, 0, ksize((void *)k_buf_src));
  1250. kfree(k_buf_src);
  1251. return -ENOMEM;
  1252. }
  1253. if (areq->cipher_op_req.data_len > max_data_xfer) {
  1254. struct qcedev_cipher_op_req req;
  1255. /* save the original req structure */
  1256. memcpy(&req, creq, sizeof(struct qcedev_cipher_op_req));
  1257. i = 0;
  1258. /* Address 32 KB at a time */
  1259. while ((i < req.entries) && (err == 0)) {
  1260. if (creq->vbuf.src[i].len > max_data_xfer) {
  1261. creq->vbuf.src[0].len = max_data_xfer;
  1262. if (i > 0) {
  1263. creq->vbuf.src[0].vaddr =
  1264. creq->vbuf.src[i].vaddr;
  1265. }
  1266. creq->data_len = max_data_xfer;
  1267. creq->entries = 1;
  1268. err = qcedev_vbuf_ablk_cipher_max_xfer(areq,
  1269. &di, handle, k_align_src);
  1270. if (err < 0) {
  1271. memset(saved_req, 0,
  1272. ksize((void *)saved_req));
  1273. memset(k_buf_src, 0,
  1274. ksize((void *)k_buf_src));
  1275. kfree(k_buf_src);
  1276. kfree(saved_req);
  1277. return err;
  1278. }
  1279. creq->vbuf.src[i].len = req.vbuf.src[i].len -
  1280. max_data_xfer;
  1281. creq->vbuf.src[i].vaddr =
  1282. req.vbuf.src[i].vaddr +
  1283. max_data_xfer;
  1284. req.vbuf.src[i].vaddr =
  1285. creq->vbuf.src[i].vaddr;
  1286. req.vbuf.src[i].len = creq->vbuf.src[i].len;
  1287. } else {
  1288. total = areq->cipher_op_req.byteoffset;
  1289. for (j = i; j < req.entries; j++) {
  1290. num_entries++;
  1291. if ((total + creq->vbuf.src[j].len)
  1292. >= max_data_xfer) {
  1293. creq->vbuf.src[j].len =
  1294. max_data_xfer - total;
  1295. total = max_data_xfer;
  1296. break;
  1297. }
  1298. total += creq->vbuf.src[j].len;
  1299. }
  1300. creq->data_len = total;
  1301. if (i > 0)
  1302. for (k = 0; k < num_entries; k++) {
  1303. creq->vbuf.src[k].len =
  1304. creq->vbuf.src[i+k].len;
  1305. creq->vbuf.src[k].vaddr =
  1306. creq->vbuf.src[i+k].vaddr;
  1307. }
  1308. creq->entries = num_entries;
  1309. i = j;
  1310. err = qcedev_vbuf_ablk_cipher_max_xfer(areq,
  1311. &di, handle, k_align_src);
  1312. if (err < 0) {
  1313. memset(saved_req, 0,
  1314. ksize((void *)saved_req));
  1315. memset(k_buf_src, 0,
  1316. ksize((void *)k_buf_src));
  1317. kfree(k_buf_src);
  1318. kfree(saved_req);
  1319. return err;
  1320. }
  1321. num_entries = 0;
  1322. areq->cipher_op_req.byteoffset = 0;
  1323. creq->vbuf.src[i].vaddr = req.vbuf.src[i].vaddr
  1324. + creq->vbuf.src[i].len;
  1325. creq->vbuf.src[i].len = req.vbuf.src[i].len -
  1326. creq->vbuf.src[i].len;
  1327. req.vbuf.src[i].vaddr =
  1328. creq->vbuf.src[i].vaddr;
  1329. req.vbuf.src[i].len = creq->vbuf.src[i].len;
  1330. if (creq->vbuf.src[i].len == 0)
  1331. i++;
  1332. }
  1333. areq->cipher_op_req.byteoffset = 0;
  1334. max_data_xfer = QCE_MAX_OPER_DATA;
  1335. byteoffset = 0;
  1336. } /* end of while ((i < req.entries) && (err == 0)) */
  1337. } else
  1338. err = qcedev_vbuf_ablk_cipher_max_xfer(areq, &di, handle,
  1339. k_align_src);
  1340. /* Restore the original req structure */
  1341. for (i = 0; i < saved_req->entries; i++) {
  1342. creq->vbuf.src[i].len = saved_req->vbuf.src[i].len;
  1343. creq->vbuf.src[i].vaddr = saved_req->vbuf.src[i].vaddr;
  1344. }
  1345. for (len = 0, i = 0; len < saved_req->data_len; i++) {
  1346. creq->vbuf.dst[i].len = saved_req->vbuf.dst[i].len;
  1347. creq->vbuf.dst[i].vaddr = saved_req->vbuf.dst[i].vaddr;
  1348. len += saved_req->vbuf.dst[i].len;
  1349. }
  1350. creq->entries = saved_req->entries;
  1351. creq->data_len = saved_req->data_len;
  1352. creq->byteoffset = saved_req->byteoffset;
  1353. memset(saved_req, 0, ksize((void *)saved_req));
  1354. memset(k_buf_src, 0, ksize((void *)k_buf_src));
  1355. kfree(saved_req);
  1356. kfree(k_buf_src);
  1357. return err;
  1358. }
  1359. static int qcedev_smmu_ablk_offload_cipher(struct qcedev_async_req *areq,
  1360. struct qcedev_handle *handle)
  1361. {
  1362. int i = 0;
  1363. int err = 0;
  1364. size_t byteoffset = 0;
  1365. size_t transfer_data_len = 0;
  1366. size_t pending_data_len = 0;
  1367. size_t max_data_xfer = MAX_CEHW_REQ_TRANSFER_SIZE - byteoffset;
  1368. uint8_t *user_src = NULL;
  1369. uint8_t *user_dst = NULL;
  1370. struct scatterlist sg_src;
  1371. struct scatterlist sg_dst;
  1372. if (areq->offload_cipher_op_req.mode == QCEDEV_AES_MODE_CTR)
  1373. byteoffset = areq->offload_cipher_op_req.byteoffset;
  1374. /*
  1375. * areq has two components:
  1376. * a) Request that comes from userspace i.e. offload_cipher_op_req
  1377. * b) Request that QCE understands - skcipher i.e. cipher_req.creq
  1378. * skcipher has sglist pointers src and dest that would carry
  1379. * data to/from CE.
  1380. */
  1381. areq->cipher_req.creq.src = &sg_src;
  1382. areq->cipher_req.creq.dst = &sg_dst;
  1383. sg_init_table(&sg_src, 1);
  1384. sg_init_table(&sg_dst, 1);
  1385. for (i = 0; i < areq->offload_cipher_op_req.entries; i++) {
  1386. transfer_data_len = 0;
  1387. pending_data_len = areq->offload_cipher_op_req.vbuf.src[i].len;
  1388. user_src = areq->offload_cipher_op_req.vbuf.src[i].vaddr;
  1389. user_src += byteoffset;
  1390. user_dst = areq->offload_cipher_op_req.vbuf.dst[i].vaddr;
  1391. user_dst += byteoffset;
  1392. areq->cipher_req.creq.iv = areq->offload_cipher_op_req.iv;
  1393. while (pending_data_len) {
  1394. transfer_data_len = min(max_data_xfer,
  1395. pending_data_len);
  1396. sg_src.dma_address = (dma_addr_t)user_src;
  1397. sg_dst.dma_address = (dma_addr_t)user_dst;
  1398. areq->cipher_req.creq.cryptlen = transfer_data_len;
  1399. sg_src.length = transfer_data_len;
  1400. sg_dst.length = transfer_data_len;
  1401. err = submit_req(areq, handle);
  1402. if (err) {
  1403. pr_err("%s: Error processing req, err = %d\n",
  1404. __func__, err);
  1405. goto exit;
  1406. }
  1407. /* update data len to be processed */
  1408. pending_data_len -= transfer_data_len;
  1409. user_src += transfer_data_len;
  1410. user_dst += transfer_data_len;
  1411. }
  1412. }
  1413. exit:
  1414. return err;
  1415. }
  1416. static int qcedev_check_cipher_key(struct qcedev_cipher_op_req *req,
  1417. struct qcedev_control *podev)
  1418. {
  1419. /* if intending to use HW key make sure key fields are set
  1420. * correctly and HW key is indeed supported in target
  1421. */
  1422. if (req->encklen == 0) {
  1423. int i;
  1424. for (i = 0; i < QCEDEV_MAX_KEY_SIZE; i++) {
  1425. if (req->enckey[i]) {
  1426. pr_err("%s: Invalid key: non-zero key input\n",
  1427. __func__);
  1428. goto error;
  1429. }
  1430. }
  1431. if ((req->op != QCEDEV_OPER_ENC_NO_KEY) &&
  1432. (req->op != QCEDEV_OPER_DEC_NO_KEY))
  1433. if (!podev->platform_support.hw_key_support) {
  1434. pr_err("%s: Invalid op %d\n", __func__,
  1435. (uint32_t)req->op);
  1436. goto error;
  1437. }
  1438. } else {
  1439. if (req->encklen == QCEDEV_AES_KEY_192) {
  1440. if (!podev->ce_support.aes_key_192) {
  1441. pr_err("%s: AES-192 not supported\n", __func__);
  1442. goto error;
  1443. }
  1444. } else {
  1445. /* if not using HW key make sure key
  1446. * length is valid
  1447. */
  1448. if (req->mode == QCEDEV_AES_MODE_XTS) {
  1449. if ((req->encklen != QCEDEV_AES_KEY_128*2) &&
  1450. (req->encklen != QCEDEV_AES_KEY_256*2)) {
  1451. pr_err("%s: unsupported key size: %d\n",
  1452. __func__, req->encklen);
  1453. goto error;
  1454. }
  1455. } else {
  1456. if ((req->encklen != QCEDEV_AES_KEY_128) &&
  1457. (req->encklen != QCEDEV_AES_KEY_256)) {
  1458. pr_err("%s: unsupported key size %d\n",
  1459. __func__, req->encklen);
  1460. goto error;
  1461. }
  1462. }
  1463. }
  1464. }
  1465. return 0;
  1466. error:
  1467. return -EINVAL;
  1468. }
  1469. static int qcedev_check_cipher_params(struct qcedev_cipher_op_req *req,
  1470. struct qcedev_control *podev)
  1471. {
  1472. uint32_t total = 0;
  1473. uint32_t i;
  1474. if (req->use_pmem) {
  1475. pr_err("%s: Use of PMEM is not supported\n", __func__);
  1476. goto error;
  1477. }
  1478. if ((req->entries == 0) || (req->data_len == 0) ||
  1479. (req->entries > QCEDEV_MAX_BUFFERS)) {
  1480. pr_err("%s: Invalid cipher length/entries\n", __func__);
  1481. goto error;
  1482. }
  1483. if ((req->alg >= QCEDEV_ALG_LAST) ||
  1484. (req->mode >= QCEDEV_AES_DES_MODE_LAST)) {
  1485. pr_err("%s: Invalid algorithm %d\n", __func__,
  1486. (uint32_t)req->alg);
  1487. goto error;
  1488. }
  1489. if ((req->mode == QCEDEV_AES_MODE_XTS) &&
  1490. (!podev->ce_support.aes_xts)) {
  1491. pr_err("%s: XTS algorithm is not supported\n", __func__);
  1492. goto error;
  1493. }
  1494. if (req->alg == QCEDEV_ALG_AES) {
  1495. if (qcedev_check_cipher_key(req, podev))
  1496. goto error;
  1497. }
  1498. /* if using a byteoffset, make sure it is CTR mode using vbuf */
  1499. if (req->byteoffset) {
  1500. if (req->mode != QCEDEV_AES_MODE_CTR) {
  1501. pr_err("%s: Operation on byte offset not supported\n",
  1502. __func__);
  1503. goto error;
  1504. }
  1505. if (req->byteoffset >= AES_CE_BLOCK_SIZE) {
  1506. pr_err("%s: Invalid byte offset\n", __func__);
  1507. goto error;
  1508. }
  1509. total = req->byteoffset;
  1510. for (i = 0; i < req->entries; i++) {
  1511. if (total > U32_MAX - req->vbuf.src[i].len) {
  1512. pr_err("%s:Integer overflow on total src len\n",
  1513. __func__);
  1514. goto error;
  1515. }
  1516. total += req->vbuf.src[i].len;
  1517. }
  1518. }
  1519. if (req->data_len < req->byteoffset) {
  1520. pr_err("%s: req data length %u is less than byteoffset %u\n",
  1521. __func__, req->data_len, req->byteoffset);
  1522. goto error;
  1523. }
  1524. /* Ensure IV size */
  1525. if (req->ivlen > QCEDEV_MAX_IV_SIZE) {
  1526. pr_err("%s: ivlen is not correct: %u\n", __func__, req->ivlen);
  1527. goto error;
  1528. }
  1529. /* Ensure Key size */
  1530. if (req->encklen > QCEDEV_MAX_KEY_SIZE) {
  1531. pr_err("%s: Klen is not correct: %u\n", __func__, req->encklen);
  1532. goto error;
  1533. }
  1534. /* Ensure zer ivlen for ECB mode */
  1535. if (req->ivlen > 0) {
  1536. if ((req->mode == QCEDEV_AES_MODE_ECB) ||
  1537. (req->mode == QCEDEV_DES_MODE_ECB)) {
  1538. pr_err("%s: Expecting a zero length IV\n", __func__);
  1539. goto error;
  1540. }
  1541. } else {
  1542. if ((req->mode != QCEDEV_AES_MODE_ECB) &&
  1543. (req->mode != QCEDEV_DES_MODE_ECB)) {
  1544. pr_err("%s: Expecting a non-zero ength IV\n", __func__);
  1545. goto error;
  1546. }
  1547. }
  1548. /* Check for sum of all dst length is equal to data_len */
  1549. for (i = 0, total = 0; i < req->entries; i++) {
  1550. if (!req->vbuf.dst[i].vaddr && req->vbuf.dst[i].len) {
  1551. pr_err("%s: NULL req dst vbuf[%d] with length %d\n",
  1552. __func__, i, req->vbuf.dst[i].len);
  1553. goto error;
  1554. }
  1555. if (req->vbuf.dst[i].len >= U32_MAX - total) {
  1556. pr_err("%s: Integer overflow on total req dst vbuf length\n",
  1557. __func__);
  1558. goto error;
  1559. }
  1560. total += req->vbuf.dst[i].len;
  1561. }
  1562. if (total != req->data_len) {
  1563. pr_err("%s: Total (i=%d) dst(%d) buf size != data_len (%d)\n",
  1564. __func__, i, total, req->data_len);
  1565. goto error;
  1566. }
  1567. /* Check for sum of all src length is equal to data_len */
  1568. for (i = 0, total = 0; i < req->entries; i++) {
  1569. if (!req->vbuf.src[i].vaddr && req->vbuf.src[i].len) {
  1570. pr_err("%s: NULL req src vbuf[%d] with length %d\n",
  1571. __func__, i, req->vbuf.src[i].len);
  1572. goto error;
  1573. }
  1574. if (req->vbuf.src[i].len > U32_MAX - total) {
  1575. pr_err("%s: Integer overflow on total req src vbuf length\n",
  1576. __func__);
  1577. goto error;
  1578. }
  1579. total += req->vbuf.src[i].len;
  1580. }
  1581. if (total != req->data_len) {
  1582. pr_err("%s: Total src(%d) buf size != data_len (%d)\n",
  1583. __func__, total, req->data_len);
  1584. goto error;
  1585. }
  1586. return 0;
  1587. error:
  1588. return -EINVAL;
  1589. }
  1590. static int qcedev_check_sha_params(struct qcedev_sha_op_req *req,
  1591. struct qcedev_control *podev)
  1592. {
  1593. uint32_t total = 0;
  1594. uint32_t i;
  1595. if ((req->alg == QCEDEV_ALG_AES_CMAC) &&
  1596. (!podev->ce_support.cmac)) {
  1597. pr_err("%s: CMAC not supported\n", __func__);
  1598. goto sha_error;
  1599. }
  1600. if ((!req->entries) || (req->entries > QCEDEV_MAX_BUFFERS)) {
  1601. pr_err("%s: Invalid num entries (%d)\n",
  1602. __func__, req->entries);
  1603. goto sha_error;
  1604. }
  1605. if (req->alg >= QCEDEV_ALG_SHA_ALG_LAST) {
  1606. pr_err("%s: Invalid algorithm (%d)\n", __func__, req->alg);
  1607. goto sha_error;
  1608. }
  1609. if ((req->alg == QCEDEV_ALG_SHA1_HMAC) ||
  1610. (req->alg == QCEDEV_ALG_SHA256_HMAC)) {
  1611. if (req->authkey == NULL) {
  1612. pr_err("%s: Invalid authkey pointer\n", __func__);
  1613. goto sha_error;
  1614. }
  1615. if (req->authklen <= 0) {
  1616. pr_err("%s: Invalid authkey length (%d)\n",
  1617. __func__, req->authklen);
  1618. goto sha_error;
  1619. }
  1620. }
  1621. if (req->alg == QCEDEV_ALG_AES_CMAC) {
  1622. if ((req->authklen != QCEDEV_AES_KEY_128) &&
  1623. (req->authklen != QCEDEV_AES_KEY_256)) {
  1624. pr_err("%s: unsupported key length\n", __func__);
  1625. goto sha_error;
  1626. }
  1627. }
  1628. /* Check for sum of all src length is equal to data_len */
  1629. for (i = 0, total = 0; i < req->entries; i++) {
  1630. if (req->data[i].len > U32_MAX - total) {
  1631. pr_err("%s: Integer overflow on total req buf length\n",
  1632. __func__);
  1633. goto sha_error;
  1634. }
  1635. total += req->data[i].len;
  1636. }
  1637. if (total != req->data_len) {
  1638. pr_err("%s: Total src(%d) buf size != data_len (%d)\n",
  1639. __func__, total, req->data_len);
  1640. goto sha_error;
  1641. }
  1642. return 0;
  1643. sha_error:
  1644. return -EINVAL;
  1645. }
  1646. static int qcedev_check_offload_cipher_key(struct qcedev_offload_cipher_op_req *req,
  1647. struct qcedev_control *podev)
  1648. {
  1649. if (req->encklen == 0)
  1650. return -EINVAL;
  1651. /* AES-192 is not a valid option for OFFLOAD use case */
  1652. if ((req->encklen != QCEDEV_AES_KEY_128) &&
  1653. (req->encklen != QCEDEV_AES_KEY_256)) {
  1654. pr_err("%s: unsupported key size %d\n",
  1655. __func__, req->encklen);
  1656. goto error;
  1657. }
  1658. return 0;
  1659. error:
  1660. return -EINVAL;
  1661. }
  1662. static int qcedev_check_offload_cipher_params(struct qcedev_offload_cipher_op_req *req,
  1663. struct qcedev_control *podev)
  1664. {
  1665. uint32_t total = 0;
  1666. int i = 0;
  1667. if ((req->entries == 0) || (req->data_len == 0) ||
  1668. (req->entries > QCEDEV_MAX_BUFFERS)) {
  1669. pr_err("%s: Invalid cipher length/entries\n", __func__);
  1670. goto error;
  1671. }
  1672. if ((req->alg != QCEDEV_ALG_AES) ||
  1673. (req->mode > QCEDEV_AES_MODE_CTR)) {
  1674. pr_err("%s: Invalid algorithm %d\n", __func__,
  1675. (uint32_t)req->alg);
  1676. goto error;
  1677. }
  1678. if (qcedev_check_offload_cipher_key(req, podev))
  1679. goto error;
  1680. if (req->block_offset >= AES_CE_BLOCK_SIZE)
  1681. goto error;
  1682. /* if using a byteoffset, make sure it is CTR mode using vbuf */
  1683. if (req->byteoffset) {
  1684. if (req->mode != QCEDEV_AES_MODE_CTR) {
  1685. pr_err("%s: Operation on byte offset not supported\n",
  1686. __func__);
  1687. goto error;
  1688. }
  1689. if (req->byteoffset >= AES_CE_BLOCK_SIZE) {
  1690. pr_err("%s: Invalid byte offset\n", __func__);
  1691. goto error;
  1692. }
  1693. total = req->byteoffset;
  1694. for (i = 0; i < req->entries; i++) {
  1695. if (total > U32_MAX - req->vbuf.src[i].len) {
  1696. pr_err("%s:Int overflow on total src len\n",
  1697. __func__);
  1698. goto error;
  1699. }
  1700. total += req->vbuf.src[i].len;
  1701. }
  1702. }
  1703. if (req->data_len < req->byteoffset) {
  1704. pr_err("%s: req data length %u is less than byteoffset %u\n",
  1705. __func__, req->data_len, req->byteoffset);
  1706. goto error;
  1707. }
  1708. /* Ensure IV size */
  1709. if (req->ivlen > QCEDEV_MAX_IV_SIZE) {
  1710. pr_err("%s: ivlen is not correct: %u\n", __func__, req->ivlen);
  1711. goto error;
  1712. }
  1713. /* Ensure Key size */
  1714. if (req->encklen > QCEDEV_MAX_KEY_SIZE) {
  1715. pr_err("%s: Klen is not correct: %u\n", __func__,
  1716. req->encklen);
  1717. goto error;
  1718. }
  1719. /* Check for sum of all dst length is equal to data_len */
  1720. for (i = 0, total = 0; i < req->entries; i++) {
  1721. if (!req->vbuf.dst[i].vaddr && req->vbuf.dst[i].len) {
  1722. pr_err("%s: NULL req dst vbuf[%d] with length %d\n",
  1723. __func__, i, req->vbuf.dst[i].len);
  1724. goto error;
  1725. }
  1726. if (req->vbuf.dst[i].len >= U32_MAX - total) {
  1727. pr_err("%s: Int overflow on total req dst vbuf len\n",
  1728. __func__);
  1729. goto error;
  1730. }
  1731. total += req->vbuf.dst[i].len;
  1732. }
  1733. if (total != req->data_len) {
  1734. pr_err("%s: Total (i=%d) dst(%d) buf size != data_len (%d)\n",
  1735. __func__, i, total, req->data_len);
  1736. goto error;
  1737. }
  1738. /* Check for sum of all src length is equal to data_len */
  1739. for (i = 0, total = 0; i < req->entries; i++) {
  1740. if (!req->vbuf.src[i].vaddr && req->vbuf.src[i].len) {
  1741. pr_err("%s: NULL req src vbuf[%d] with length %d\n",
  1742. __func__, i, req->vbuf.src[i].len);
  1743. goto error;
  1744. }
  1745. if (req->vbuf.src[i].len > U32_MAX - total) {
  1746. pr_err("%s: Int overflow on total req src vbuf len\n",
  1747. __func__);
  1748. goto error;
  1749. }
  1750. total += req->vbuf.src[i].len;
  1751. }
  1752. if (total != req->data_len) {
  1753. pr_err("%s: Total src(%d) buf size != data_len (%d)\n",
  1754. __func__, total, req->data_len);
  1755. goto error;
  1756. }
  1757. return 0;
  1758. error:
  1759. return -EINVAL;
  1760. }
  1761. long qcedev_ioctl(struct file *file,
  1762. unsigned int cmd, unsigned long arg)
  1763. {
  1764. int err = 0;
  1765. struct qcedev_handle *handle;
  1766. struct qcedev_control *podev;
  1767. struct qcedev_async_req *qcedev_areq;
  1768. struct qcedev_stat *pstat;
  1769. qcedev_areq = kzalloc(sizeof(struct qcedev_async_req), GFP_KERNEL);
  1770. if (!qcedev_areq)
  1771. return -ENOMEM;
  1772. handle = file->private_data;
  1773. podev = handle->cntl;
  1774. qcedev_areq->handle = handle;
  1775. if (podev == NULL || podev->magic != QCEDEV_MAGIC) {
  1776. pr_err("%s: invalid handle %pK\n",
  1777. __func__, podev);
  1778. err = -ENOENT;
  1779. goto exit_free_qcedev_areq;
  1780. }
  1781. /* Verify user arguments. */
  1782. if (_IOC_TYPE(cmd) != QCEDEV_IOC_MAGIC) {
  1783. err = -ENOTTY;
  1784. goto exit_free_qcedev_areq;
  1785. }
  1786. init_completion(&qcedev_areq->complete);
  1787. pstat = &_qcedev_stat;
  1788. if (cmd != QCEDEV_IOCTL_MAP_BUF_REQ &&
  1789. cmd != QCEDEV_IOCTL_UNMAP_BUF_REQ)
  1790. qcedev_ce_high_bw_req(podev, true);
  1791. switch (cmd) {
  1792. case QCEDEV_IOCTL_ENC_REQ:
  1793. case QCEDEV_IOCTL_DEC_REQ:
  1794. if (copy_from_user(&qcedev_areq->cipher_op_req,
  1795. (void __user *)arg,
  1796. sizeof(struct qcedev_cipher_op_req))) {
  1797. err = -EFAULT;
  1798. goto exit_free_qcedev_areq;
  1799. }
  1800. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_CIPHER;
  1801. if (qcedev_check_cipher_params(&qcedev_areq->cipher_op_req,
  1802. podev)) {
  1803. err = -EINVAL;
  1804. goto exit_free_qcedev_areq;
  1805. }
  1806. err = qcedev_vbuf_ablk_cipher(qcedev_areq, handle);
  1807. if (err)
  1808. goto exit_free_qcedev_areq;
  1809. if (copy_to_user((void __user *)arg,
  1810. &qcedev_areq->cipher_op_req,
  1811. sizeof(struct qcedev_cipher_op_req))) {
  1812. err = -EFAULT;
  1813. goto exit_free_qcedev_areq;
  1814. }
  1815. break;
  1816. case QCEDEV_IOCTL_OFFLOAD_OP_REQ:
  1817. if (copy_from_user(&qcedev_areq->offload_cipher_op_req,
  1818. (void __user *)arg,
  1819. sizeof(struct qcedev_offload_cipher_op_req))) {
  1820. err = -EFAULT;
  1821. goto exit_free_qcedev_areq;
  1822. }
  1823. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_OFFLOAD_CIPHER;
  1824. if (qcedev_check_offload_cipher_params(
  1825. &qcedev_areq->offload_cipher_op_req, podev)) {
  1826. err = -EINVAL;
  1827. goto exit_free_qcedev_areq;
  1828. }
  1829. err = qcedev_smmu_ablk_offload_cipher(qcedev_areq, handle);
  1830. if (err)
  1831. goto exit_free_qcedev_areq;
  1832. if (copy_to_user((void __user *)arg,
  1833. &qcedev_areq->offload_cipher_op_req,
  1834. sizeof(struct qcedev_offload_cipher_op_req))) {
  1835. err = -EFAULT;
  1836. goto exit_free_qcedev_areq;
  1837. }
  1838. break;
  1839. case QCEDEV_IOCTL_SHA_INIT_REQ:
  1840. {
  1841. struct scatterlist sg_src;
  1842. if (copy_from_user(&qcedev_areq->sha_op_req,
  1843. (void __user *)arg,
  1844. sizeof(struct qcedev_sha_op_req))) {
  1845. err = -EFAULT;
  1846. goto exit_free_qcedev_areq;
  1847. }
  1848. mutex_lock(&hash_access_lock);
  1849. if (qcedev_check_sha_params(&qcedev_areq->sha_op_req, podev)) {
  1850. mutex_unlock(&hash_access_lock);
  1851. err = -EINVAL;
  1852. goto exit_free_qcedev_areq;
  1853. }
  1854. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_SHA;
  1855. err = qcedev_hash_init(qcedev_areq, handle, &sg_src);
  1856. if (err) {
  1857. mutex_unlock(&hash_access_lock);
  1858. goto exit_free_qcedev_areq;
  1859. }
  1860. mutex_unlock(&hash_access_lock);
  1861. if (copy_to_user((void __user *)arg, &qcedev_areq->sha_op_req,
  1862. sizeof(struct qcedev_sha_op_req))) {
  1863. err = -EFAULT;
  1864. goto exit_free_qcedev_areq;
  1865. }
  1866. handle->sha_ctxt.init_done = true;
  1867. }
  1868. break;
  1869. case QCEDEV_IOCTL_GET_CMAC_REQ:
  1870. if (!podev->ce_support.cmac) {
  1871. err = -ENOTTY;
  1872. goto exit_free_qcedev_areq;
  1873. }
  1874. /* Fall-through */
  1875. case QCEDEV_IOCTL_SHA_UPDATE_REQ:
  1876. {
  1877. struct scatterlist sg_src;
  1878. if (copy_from_user(&qcedev_areq->sha_op_req,
  1879. (void __user *)arg,
  1880. sizeof(struct qcedev_sha_op_req))) {
  1881. err = -EFAULT;
  1882. goto exit_free_qcedev_areq;
  1883. }
  1884. mutex_lock(&hash_access_lock);
  1885. if (qcedev_check_sha_params(&qcedev_areq->sha_op_req, podev)) {
  1886. mutex_unlock(&hash_access_lock);
  1887. err = -EINVAL;
  1888. goto exit_free_qcedev_areq;
  1889. }
  1890. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_SHA;
  1891. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_AES_CMAC) {
  1892. err = qcedev_hash_cmac(qcedev_areq, handle, &sg_src);
  1893. if (err) {
  1894. mutex_unlock(&hash_access_lock);
  1895. goto exit_free_qcedev_areq;
  1896. }
  1897. } else {
  1898. if (!handle->sha_ctxt.init_done) {
  1899. pr_err("%s Init was not called\n", __func__);
  1900. mutex_unlock(&hash_access_lock);
  1901. err = -EINVAL;
  1902. goto exit_free_qcedev_areq;
  1903. }
  1904. err = qcedev_hash_update(qcedev_areq, handle, &sg_src);
  1905. if (err) {
  1906. mutex_unlock(&hash_access_lock);
  1907. goto exit_free_qcedev_areq;
  1908. }
  1909. }
  1910. if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) {
  1911. pr_err("Invalid sha_ctxt.diglen %d\n",
  1912. handle->sha_ctxt.diglen);
  1913. mutex_unlock(&hash_access_lock);
  1914. err = -EINVAL;
  1915. goto exit_free_qcedev_areq;
  1916. }
  1917. memcpy(&qcedev_areq->sha_op_req.digest[0],
  1918. &handle->sha_ctxt.digest[0],
  1919. handle->sha_ctxt.diglen);
  1920. mutex_unlock(&hash_access_lock);
  1921. if (copy_to_user((void __user *)arg, &qcedev_areq->sha_op_req,
  1922. sizeof(struct qcedev_sha_op_req))) {
  1923. err = -EFAULT;
  1924. goto exit_free_qcedev_areq;
  1925. }
  1926. }
  1927. break;
  1928. case QCEDEV_IOCTL_SHA_FINAL_REQ:
  1929. if (!handle->sha_ctxt.init_done) {
  1930. pr_err("%s Init was not called\n", __func__);
  1931. err = -EINVAL;
  1932. goto exit_free_qcedev_areq;
  1933. }
  1934. if (copy_from_user(&qcedev_areq->sha_op_req,
  1935. (void __user *)arg,
  1936. sizeof(struct qcedev_sha_op_req))) {
  1937. err = -EFAULT;
  1938. goto exit_free_qcedev_areq;
  1939. }
  1940. mutex_lock(&hash_access_lock);
  1941. if (qcedev_check_sha_params(&qcedev_areq->sha_op_req, podev)) {
  1942. mutex_unlock(&hash_access_lock);
  1943. err = -EINVAL;
  1944. goto exit_free_qcedev_areq;
  1945. }
  1946. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_SHA;
  1947. err = qcedev_hash_final(qcedev_areq, handle);
  1948. if (err) {
  1949. mutex_unlock(&hash_access_lock);
  1950. goto exit_free_qcedev_areq;
  1951. }
  1952. if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) {
  1953. pr_err("Invalid sha_ctxt.diglen %d\n",
  1954. handle->sha_ctxt.diglen);
  1955. mutex_unlock(&hash_access_lock);
  1956. err = -EINVAL;
  1957. goto exit_free_qcedev_areq;
  1958. }
  1959. qcedev_areq->sha_op_req.diglen = handle->sha_ctxt.diglen;
  1960. memcpy(&qcedev_areq->sha_op_req.digest[0],
  1961. &handle->sha_ctxt.digest[0],
  1962. handle->sha_ctxt.diglen);
  1963. mutex_unlock(&hash_access_lock);
  1964. if (copy_to_user((void __user *)arg, &qcedev_areq->sha_op_req,
  1965. sizeof(struct qcedev_sha_op_req))) {
  1966. err = -EFAULT;
  1967. goto exit_free_qcedev_areq;
  1968. }
  1969. handle->sha_ctxt.init_done = false;
  1970. break;
  1971. case QCEDEV_IOCTL_GET_SHA_REQ:
  1972. {
  1973. struct scatterlist sg_src;
  1974. if (copy_from_user(&qcedev_areq->sha_op_req,
  1975. (void __user *)arg,
  1976. sizeof(struct qcedev_sha_op_req))) {
  1977. err = -EFAULT;
  1978. goto exit_free_qcedev_areq;
  1979. }
  1980. mutex_lock(&hash_access_lock);
  1981. if (qcedev_check_sha_params(&qcedev_areq->sha_op_req, podev)) {
  1982. mutex_unlock(&hash_access_lock);
  1983. err = -EINVAL;
  1984. goto exit_free_qcedev_areq;
  1985. }
  1986. qcedev_areq->op_type = QCEDEV_CRYPTO_OPER_SHA;
  1987. qcedev_hash_init(qcedev_areq, handle, &sg_src);
  1988. err = qcedev_hash_update(qcedev_areq, handle, &sg_src);
  1989. if (err) {
  1990. mutex_unlock(&hash_access_lock);
  1991. goto exit_free_qcedev_areq;
  1992. }
  1993. err = qcedev_hash_final(qcedev_areq, handle);
  1994. if (err) {
  1995. mutex_unlock(&hash_access_lock);
  1996. goto exit_free_qcedev_areq;
  1997. }
  1998. if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) {
  1999. pr_err("Invalid sha_ctxt.diglen %d\n",
  2000. handle->sha_ctxt.diglen);
  2001. mutex_unlock(&hash_access_lock);
  2002. err = -EINVAL;
  2003. goto exit_free_qcedev_areq;
  2004. }
  2005. qcedev_areq->sha_op_req.diglen = handle->sha_ctxt.diglen;
  2006. memcpy(&qcedev_areq->sha_op_req.digest[0],
  2007. &handle->sha_ctxt.digest[0],
  2008. handle->sha_ctxt.diglen);
  2009. mutex_unlock(&hash_access_lock);
  2010. if (copy_to_user((void __user *)arg, &qcedev_areq->sha_op_req,
  2011. sizeof(struct qcedev_sha_op_req))) {
  2012. err = -EFAULT;
  2013. goto exit_free_qcedev_areq;
  2014. }
  2015. }
  2016. break;
  2017. case QCEDEV_IOCTL_MAP_BUF_REQ:
  2018. {
  2019. unsigned long long vaddr = 0;
  2020. struct qcedev_map_buf_req map_buf = { {0} };
  2021. int i = 0;
  2022. if (copy_from_user(&map_buf,
  2023. (void __user *)arg, sizeof(map_buf))) {
  2024. err = -EFAULT;
  2025. goto exit_free_qcedev_areq;
  2026. }
  2027. if (map_buf.num_fds > QCEDEV_MAX_BUFFERS) {
  2028. err = -EINVAL;
  2029. goto exit_free_qcedev_areq;
  2030. }
  2031. for (i = 0; i < map_buf.num_fds; i++) {
  2032. err = qcedev_check_and_map_buffer(handle,
  2033. map_buf.fd[i],
  2034. map_buf.fd_offset[i],
  2035. map_buf.fd_size[i],
  2036. &vaddr);
  2037. if (err) {
  2038. pr_err(
  2039. "%s: err: failed to map fd(%d) - %d\n",
  2040. __func__, map_buf.fd[i], err);
  2041. goto exit_free_qcedev_areq;
  2042. }
  2043. map_buf.buf_vaddr[i] = vaddr;
  2044. pr_info("%s: info: vaddr = %llx\n, fd = %d",
  2045. __func__, vaddr, map_buf.fd[i]);
  2046. }
  2047. if (copy_to_user((void __user *)arg, &map_buf,
  2048. sizeof(map_buf))) {
  2049. err = -EFAULT;
  2050. goto exit_free_qcedev_areq;
  2051. }
  2052. break;
  2053. }
  2054. case QCEDEV_IOCTL_UNMAP_BUF_REQ:
  2055. {
  2056. struct qcedev_unmap_buf_req unmap_buf = { { 0 } };
  2057. int i = 0;
  2058. if (copy_from_user(&unmap_buf,
  2059. (void __user *)arg, sizeof(unmap_buf))) {
  2060. err = -EFAULT;
  2061. goto exit_free_qcedev_areq;
  2062. }
  2063. for (i = 0; i < unmap_buf.num_fds; i++) {
  2064. err = qcedev_check_and_unmap_buffer(handle,
  2065. unmap_buf.fd[i]);
  2066. if (err) {
  2067. pr_err(
  2068. "%s: err: failed to unmap fd(%d) - %d\n",
  2069. __func__,
  2070. unmap_buf.fd[i], err);
  2071. goto exit_free_qcedev_areq;
  2072. }
  2073. }
  2074. break;
  2075. }
  2076. default:
  2077. err = -ENOTTY;
  2078. goto exit_free_qcedev_areq;
  2079. }
  2080. exit_free_qcedev_areq:
  2081. if (cmd != QCEDEV_IOCTL_MAP_BUF_REQ &&
  2082. cmd != QCEDEV_IOCTL_UNMAP_BUF_REQ && podev != NULL)
  2083. qcedev_ce_high_bw_req(podev, false);
  2084. kfree(qcedev_areq);
  2085. return err;
  2086. }
  2087. static int qcedev_probe_device(struct platform_device *pdev)
  2088. {
  2089. void *handle = NULL;
  2090. int rc = 0;
  2091. struct qcedev_control *podev;
  2092. struct msm_ce_hw_support *platform_support;
  2093. podev = &qce_dev[0];
  2094. rc = alloc_chrdev_region(&qcedev_device_no, 0, 1, QCEDEV_DEV);
  2095. if (rc < 0) {
  2096. pr_err("alloc_chrdev_region failed %d\n", rc);
  2097. return rc;
  2098. }
  2099. driver_class = class_create(THIS_MODULE, QCEDEV_DEV);
  2100. if (IS_ERR(driver_class)) {
  2101. rc = -ENOMEM;
  2102. pr_err("class_create failed %d\n", rc);
  2103. goto exit_unreg_chrdev_region;
  2104. }
  2105. class_dev = device_create(driver_class, NULL, qcedev_device_no, NULL,
  2106. QCEDEV_DEV);
  2107. if (IS_ERR(class_dev)) {
  2108. pr_err("class_device_create failed %d\n", rc);
  2109. rc = -ENOMEM;
  2110. goto exit_destroy_class;
  2111. }
  2112. cdev_init(&podev->cdev, &qcedev_fops);
  2113. podev->cdev.owner = THIS_MODULE;
  2114. rc = cdev_add(&podev->cdev, MKDEV(MAJOR(qcedev_device_no), 0), 1);
  2115. if (rc < 0) {
  2116. pr_err("cdev_add failed %d\n", rc);
  2117. goto exit_destroy_device;
  2118. }
  2119. podev->minor = 0;
  2120. podev->high_bw_req_count = 0;
  2121. INIT_LIST_HEAD(&podev->ready_commands);
  2122. podev->active_command = NULL;
  2123. INIT_LIST_HEAD(&podev->context_banks);
  2124. spin_lock_init(&podev->lock);
  2125. tasklet_init(&podev->done_tasklet, req_done, (unsigned long)podev);
  2126. podev->icc_path = of_icc_get(&pdev->dev, "data_path");
  2127. if (IS_ERR(podev->icc_path)) {
  2128. rc = PTR_ERR(podev->icc_path);
  2129. pr_err("%s Failed to get icc path with error %d\n",
  2130. __func__, rc);
  2131. goto exit_del_cdev;
  2132. }
  2133. rc = icc_set_bw(podev->icc_path, CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  2134. if (rc) {
  2135. pr_err("%s Unable to set high bandwidth\n", __func__);
  2136. goto exit_unregister_bus_scale;
  2137. }
  2138. handle = qce_open(pdev, &rc);
  2139. if (handle == NULL) {
  2140. rc = -ENODEV;
  2141. goto exit_scale_busbandwidth;
  2142. }
  2143. rc = icc_set_bw(podev->icc_path, 0, 0);
  2144. if (rc) {
  2145. pr_err("%s Unable to set to low bandwidth\n", __func__);
  2146. goto exit_qce_close;
  2147. }
  2148. podev->qce = handle;
  2149. podev->pdev = pdev;
  2150. platform_set_drvdata(pdev, podev);
  2151. qce_hw_support(podev->qce, &podev->ce_support);
  2152. if (podev->ce_support.bam) {
  2153. podev->platform_support.ce_shared = 0;
  2154. podev->platform_support.shared_ce_resource = 0;
  2155. podev->platform_support.hw_key_support =
  2156. podev->ce_support.hw_key;
  2157. podev->platform_support.sha_hmac = 1;
  2158. } else {
  2159. platform_support =
  2160. (struct msm_ce_hw_support *)pdev->dev.platform_data;
  2161. podev->platform_support.ce_shared = platform_support->ce_shared;
  2162. podev->platform_support.shared_ce_resource =
  2163. platform_support->shared_ce_resource;
  2164. podev->platform_support.hw_key_support =
  2165. platform_support->hw_key_support;
  2166. podev->platform_support.sha_hmac = platform_support->sha_hmac;
  2167. }
  2168. podev->mem_client = qcedev_mem_new_client(MEM_ION);
  2169. if (!podev->mem_client) {
  2170. pr_err("%s: err: qcedev_mem_new_client failed\n", __func__);
  2171. goto exit_qce_close;
  2172. }
  2173. rc = of_platform_populate(pdev->dev.of_node, qcedev_match,
  2174. NULL, &pdev->dev);
  2175. if (rc) {
  2176. pr_err("%s: err: of_platform_populate failed: %d\n",
  2177. __func__, rc);
  2178. goto exit_mem_new_client;
  2179. }
  2180. return 0;
  2181. exit_mem_new_client:
  2182. if (podev->mem_client)
  2183. qcedev_mem_delete_client(podev->mem_client);
  2184. podev->mem_client = NULL;
  2185. exit_qce_close:
  2186. if (handle)
  2187. qce_close(handle);
  2188. exit_scale_busbandwidth:
  2189. icc_set_bw(podev->icc_path, 0, 0);
  2190. exit_unregister_bus_scale:
  2191. if (podev->icc_path)
  2192. icc_put(podev->icc_path);
  2193. exit_del_cdev:
  2194. cdev_del(&podev->cdev);
  2195. exit_destroy_device:
  2196. device_destroy(driver_class, qcedev_device_no);
  2197. exit_destroy_class:
  2198. class_destroy(driver_class);
  2199. exit_unreg_chrdev_region:
  2200. unregister_chrdev_region(qcedev_device_no, 1);
  2201. podev->icc_path = NULL;
  2202. platform_set_drvdata(pdev, NULL);
  2203. podev->pdev = NULL;
  2204. podev->qce = NULL;
  2205. return rc;
  2206. }
  2207. static int qcedev_probe(struct platform_device *pdev)
  2208. {
  2209. if (of_device_is_compatible(pdev->dev.of_node, "qcom,qcedev"))
  2210. return qcedev_probe_device(pdev);
  2211. else if (of_device_is_compatible(pdev->dev.of_node,
  2212. "qcom,qcedev,context-bank"))
  2213. return qcedev_parse_context_bank(pdev);
  2214. return -EINVAL;
  2215. };
  2216. static int qcedev_remove(struct platform_device *pdev)
  2217. {
  2218. struct qcedev_control *podev;
  2219. podev = platform_get_drvdata(pdev);
  2220. if (!podev)
  2221. return 0;
  2222. if (podev->qce)
  2223. qce_close(podev->qce);
  2224. if (podev->icc_path)
  2225. icc_put(podev->icc_path);
  2226. tasklet_kill(&podev->done_tasklet);
  2227. cdev_del(&podev->cdev);
  2228. device_destroy(driver_class, qcedev_device_no);
  2229. class_destroy(driver_class);
  2230. unregister_chrdev_region(qcedev_device_no, 1);
  2231. return 0;
  2232. };
  2233. static int qcedev_suspend(struct platform_device *pdev, pm_message_t state)
  2234. {
  2235. struct qcedev_control *podev;
  2236. int ret;
  2237. podev = platform_get_drvdata(pdev);
  2238. if (!podev)
  2239. return 0;
  2240. mutex_lock(&qcedev_sent_bw_req);
  2241. if (podev->high_bw_req_count) {
  2242. ret = qcedev_control_clocks(podev, false);
  2243. if (ret)
  2244. goto suspend_exit;
  2245. }
  2246. suspend_exit:
  2247. mutex_unlock(&qcedev_sent_bw_req);
  2248. return 0;
  2249. }
  2250. static int qcedev_resume(struct platform_device *pdev)
  2251. {
  2252. struct qcedev_control *podev;
  2253. int ret;
  2254. podev = platform_get_drvdata(pdev);
  2255. if (!podev)
  2256. return 0;
  2257. mutex_lock(&qcedev_sent_bw_req);
  2258. if (podev->high_bw_req_count) {
  2259. ret = qcedev_control_clocks(podev, true);
  2260. if (ret)
  2261. goto resume_exit;
  2262. }
  2263. resume_exit:
  2264. mutex_unlock(&qcedev_sent_bw_req);
  2265. return 0;
  2266. }
  2267. static struct platform_driver qcedev_plat_driver = {
  2268. .probe = qcedev_probe,
  2269. .remove = qcedev_remove,
  2270. .suspend = qcedev_suspend,
  2271. .resume = qcedev_resume,
  2272. .driver = {
  2273. .name = "qce",
  2274. .of_match_table = qcedev_match,
  2275. },
  2276. };
  2277. static int _disp_stats(int id)
  2278. {
  2279. struct qcedev_stat *pstat;
  2280. int len = 0;
  2281. pstat = &_qcedev_stat;
  2282. len = scnprintf(_debug_read_buf, DEBUG_MAX_RW_BUF - 1,
  2283. "\nQTI QCE dev driver %d Statistics:\n",
  2284. id + 1);
  2285. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  2286. " Encryption operation success : %d\n",
  2287. pstat->qcedev_enc_success);
  2288. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  2289. " Encryption operation fail : %d\n",
  2290. pstat->qcedev_enc_fail);
  2291. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  2292. " Decryption operation success : %d\n",
  2293. pstat->qcedev_dec_success);
  2294. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  2295. " Encryption operation fail : %d\n",
  2296. pstat->qcedev_dec_fail);
  2297. return len;
  2298. }
  2299. static ssize_t _debug_stats_read(struct file *file, char __user *buf,
  2300. size_t count, loff_t *ppos)
  2301. {
  2302. ssize_t rc = -EINVAL;
  2303. int qcedev = *((int *) file->private_data);
  2304. int len;
  2305. len = _disp_stats(qcedev);
  2306. if (len <= count)
  2307. rc = simple_read_from_buffer((void __user *) buf, len,
  2308. ppos, (void *) _debug_read_buf, len);
  2309. return rc;
  2310. }
  2311. static ssize_t _debug_stats_write(struct file *file, const char __user *buf,
  2312. size_t count, loff_t *ppos)
  2313. {
  2314. memset((char *)&_qcedev_stat, 0, sizeof(struct qcedev_stat));
  2315. return count;
  2316. };
  2317. static const struct file_operations _debug_stats_ops = {
  2318. .open = simple_open,
  2319. .read = _debug_stats_read,
  2320. .write = _debug_stats_write,
  2321. };
  2322. static int _qcedev_debug_init(void)
  2323. {
  2324. int rc;
  2325. char name[DEBUG_MAX_FNAME];
  2326. struct dentry *dent;
  2327. _debug_dent = debugfs_create_dir("qcedev", NULL);
  2328. if (IS_ERR(_debug_dent)) {
  2329. pr_debug("qcedev debugfs_create_dir fail, error %ld\n",
  2330. PTR_ERR(_debug_dent));
  2331. return PTR_ERR(_debug_dent);
  2332. }
  2333. snprintf(name, DEBUG_MAX_FNAME-1, "stats-%d", 1);
  2334. _debug_qcedev = 0;
  2335. dent = debugfs_create_file(name, 0644, _debug_dent,
  2336. &_debug_qcedev, &_debug_stats_ops);
  2337. if (dent == NULL) {
  2338. pr_debug("qcedev debugfs_create_file fail, error %ld\n",
  2339. PTR_ERR(dent));
  2340. rc = PTR_ERR(dent);
  2341. goto err;
  2342. }
  2343. return 0;
  2344. err:
  2345. debugfs_remove_recursive(_debug_dent);
  2346. return rc;
  2347. }
  2348. static int qcedev_init(void)
  2349. {
  2350. _qcedev_debug_init();
  2351. return platform_driver_register(&qcedev_plat_driver);
  2352. }
  2353. static void qcedev_exit(void)
  2354. {
  2355. debugfs_remove_recursive(_debug_dent);
  2356. platform_driver_unregister(&qcedev_plat_driver);
  2357. }
  2358. MODULE_LICENSE("GPL v2");
  2359. MODULE_DESCRIPTION("QTI DEV Crypto driver");
  2360. module_init(qcedev_init);
  2361. module_exit(qcedev_exit);