main.c 127 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/thermal.h>
  20. #include <linux/version.h>
  21. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  22. #include <linux/panic_notifier.h>
  23. #endif
  24. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  25. #include <soc/qcom/minidump.h>
  26. #endif
  27. #include "cnss_plat_ipc_qmi.h"
  28. #include "cnss_utils.h"
  29. #include "main.h"
  30. #include "bus.h"
  31. #include "debug.h"
  32. #include "genl.h"
  33. #include "reg.h"
  34. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  35. #include "smcinvoke.h"
  36. #include "smcinvoke_object.h"
  37. #include "IClientEnv.h"
  38. #define HW_STATE_UID 0x108
  39. #define HW_OP_GET_STATE 1
  40. #define HW_WIFI_UID 0x508
  41. #define FEATURE_NOT_SUPPORTED 12
  42. #define PERIPHERAL_NOT_FOUND 10
  43. #endif
  44. #define CNSS_DUMP_FORMAT_VER 0x11
  45. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  46. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  47. #define CNSS_DUMP_NAME "CNSS_WLAN"
  48. #define CNSS_DUMP_DESC_SIZE 0x1000
  49. #define CNSS_DUMP_SEG_VER 0x1
  50. #define FILE_SYSTEM_READY 1
  51. #define FW_READY_TIMEOUT 20000
  52. #define FW_ASSERT_TIMEOUT 5000
  53. #define CNSS_EVENT_PENDING 2989
  54. #define POWER_RESET_MIN_DELAY_MS 100
  55. #define CNSS_QUIRKS_DEFAULT 0
  56. #ifdef CONFIG_CNSS_EMULATION
  57. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  58. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  59. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  60. #else
  61. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  62. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  63. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  64. #endif
  65. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  66. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  67. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  68. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  69. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  70. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  71. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  72. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  73. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  74. enum cnss_cal_db_op {
  75. CNSS_CAL_DB_UPLOAD,
  76. CNSS_CAL_DB_DOWNLOAD,
  77. CNSS_CAL_DB_INVALID_OP,
  78. };
  79. enum cnss_recovery_type {
  80. CNSS_WLAN_RECOVERY = 0x1,
  81. CNSS_PCSS_RECOVERY = 0x2,
  82. };
  83. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  84. #define CNSS_MAX_DEV_NUM 2
  85. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  86. static int plat_env_count;
  87. #else
  88. static struct cnss_plat_data *plat_env;
  89. #endif
  90. static bool cnss_allow_driver_loading;
  91. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  92. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  93. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  94. };
  95. static struct cnss_fw_files FW_FILES_DEFAULT = {
  96. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  97. "utfbd.bin", "epping.bin", "evicted.bin"
  98. };
  99. struct cnss_driver_event {
  100. struct list_head list;
  101. enum cnss_driver_event_type type;
  102. bool sync;
  103. struct completion complete;
  104. int ret;
  105. void *data;
  106. };
  107. bool cnss_check_driver_loading_allowed(void)
  108. {
  109. return cnss_allow_driver_loading;
  110. }
  111. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  112. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  113. struct cnss_plat_data *plat_priv)
  114. {
  115. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  116. if (plat_priv) {
  117. plat_priv->plat_idx = plat_env_count;
  118. plat_env[plat_priv->plat_idx] = plat_priv;
  119. plat_env_count++;
  120. }
  121. }
  122. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  123. *plat_dev)
  124. {
  125. int i;
  126. if (!plat_dev)
  127. return NULL;
  128. for (i = 0; i < plat_env_count; i++) {
  129. if (plat_env[i]->plat_dev == plat_dev)
  130. return plat_env[i];
  131. }
  132. return NULL;
  133. }
  134. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  135. {
  136. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  137. plat_env[plat_priv->plat_idx] = NULL;
  138. plat_env_count--;
  139. }
  140. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  141. {
  142. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  143. "wlan_%d", plat_priv->plat_idx);
  144. return 0;
  145. }
  146. static int cnss_plat_env_available(void)
  147. {
  148. int ret = 0;
  149. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  150. cnss_pr_err("ERROR: No space to store plat_priv\n");
  151. ret = -ENOMEM;
  152. }
  153. return ret;
  154. }
  155. int cnss_get_plat_env_count(void)
  156. {
  157. return plat_env_count;
  158. }
  159. struct cnss_plat_data *cnss_get_plat_env(int index)
  160. {
  161. return plat_env[index];
  162. }
  163. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  164. {
  165. int i;
  166. for (i = 0; i < plat_env_count; i++) {
  167. if (plat_env[i]->rc_num == rc_num)
  168. return plat_env[i];
  169. }
  170. return NULL;
  171. }
  172. static inline int
  173. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  174. {
  175. return of_property_read_u32(plat_priv->dev_node,
  176. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  177. }
  178. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  179. {
  180. int ret = 0;
  181. ret = cnss_get_qrtr_node_id(plat_priv);
  182. if (ret) {
  183. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  184. plat_priv->qrtr_node_id = 0;
  185. plat_priv->wlfw_service_instance_id = 0;
  186. } else {
  187. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  188. QRTR_NODE_FW_ID_BASE;
  189. cnss_pr_dbg("service_instance_id=0x%x\n",
  190. plat_priv->wlfw_service_instance_id);
  191. }
  192. }
  193. static inline int
  194. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  195. {
  196. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  197. "qcom,pld_bus_ops_name",
  198. &plat_priv->pld_bus_ops_name);
  199. }
  200. #else
  201. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  202. struct cnss_plat_data *plat_priv)
  203. {
  204. plat_env = plat_priv;
  205. }
  206. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  207. {
  208. return plat_env;
  209. }
  210. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  211. {
  212. plat_env = NULL;
  213. }
  214. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  215. {
  216. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  217. "wlan");
  218. return 0;
  219. }
  220. static int cnss_plat_env_available(void)
  221. {
  222. return 0;
  223. }
  224. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  225. {
  226. return cnss_bus_dev_to_plat_priv(NULL);
  227. }
  228. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  229. {
  230. }
  231. static int
  232. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  233. {
  234. return 0;
  235. }
  236. #endif
  237. static inline int
  238. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  239. {
  240. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  241. "qcom,wlan-rc-num", &plat_priv->rc_num);
  242. }
  243. bool cnss_is_dual_wlan_enabled(void)
  244. {
  245. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  246. }
  247. /**
  248. * cnss_get_mem_seg_count - Get segment count of memory
  249. * @type: memory type
  250. * @seg: segment count
  251. *
  252. * Return: 0 on success, negative value on failure
  253. */
  254. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  255. {
  256. struct cnss_plat_data *plat_priv;
  257. plat_priv = cnss_get_plat_priv(NULL);
  258. if (!plat_priv)
  259. return -ENODEV;
  260. switch (type) {
  261. case CNSS_REMOTE_MEM_TYPE_FW:
  262. *seg = plat_priv->fw_mem_seg_len;
  263. break;
  264. case CNSS_REMOTE_MEM_TYPE_QDSS:
  265. *seg = plat_priv->qdss_mem_seg_len;
  266. break;
  267. default:
  268. return -EINVAL;
  269. }
  270. return 0;
  271. }
  272. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  273. /**
  274. * cnss_get_wifi_kobject -return wifi kobject
  275. * Return: Null, to maintain driver comnpatibilty
  276. */
  277. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  278. {
  279. struct cnss_plat_data *plat_priv;
  280. plat_priv = cnss_get_plat_priv(NULL);
  281. if (!plat_priv)
  282. return NULL;
  283. return plat_priv->wifi_kobj;
  284. }
  285. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  286. /**
  287. * cnss_get_mem_segment_info - Get memory info of different type
  288. * @type: memory type
  289. * @segment: array to save the segment info
  290. * @seg: segment count
  291. *
  292. * Return: 0 on success, negative value on failure
  293. */
  294. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  295. struct cnss_mem_segment segment[],
  296. u32 segment_count)
  297. {
  298. struct cnss_plat_data *plat_priv;
  299. u32 i;
  300. plat_priv = cnss_get_plat_priv(NULL);
  301. if (!plat_priv)
  302. return -ENODEV;
  303. switch (type) {
  304. case CNSS_REMOTE_MEM_TYPE_FW:
  305. if (segment_count > plat_priv->fw_mem_seg_len)
  306. segment_count = plat_priv->fw_mem_seg_len;
  307. for (i = 0; i < segment_count; i++) {
  308. segment[i].size = plat_priv->fw_mem[i].size;
  309. segment[i].va = plat_priv->fw_mem[i].va;
  310. segment[i].pa = plat_priv->fw_mem[i].pa;
  311. }
  312. break;
  313. case CNSS_REMOTE_MEM_TYPE_QDSS:
  314. if (segment_count > plat_priv->qdss_mem_seg_len)
  315. segment_count = plat_priv->qdss_mem_seg_len;
  316. for (i = 0; i < segment_count; i++) {
  317. segment[i].size = plat_priv->qdss_mem[i].size;
  318. segment[i].va = plat_priv->qdss_mem[i].va;
  319. segment[i].pa = plat_priv->qdss_mem[i].pa;
  320. }
  321. break;
  322. default:
  323. return -EINVAL;
  324. }
  325. return 0;
  326. }
  327. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  328. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  329. {
  330. struct device_node *audio_ion_node;
  331. struct platform_device *audio_ion_pdev;
  332. audio_ion_node = of_find_compatible_node(NULL, NULL,
  333. "qcom,msm-audio-ion");
  334. if (!audio_ion_node) {
  335. cnss_pr_err("Unable to get Audio ion node");
  336. return -EINVAL;
  337. }
  338. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  339. of_node_put(audio_ion_node);
  340. if (!audio_ion_pdev) {
  341. cnss_pr_err("Unable to get Audio ion platform device");
  342. return -EINVAL;
  343. }
  344. plat_priv->audio_iommu_domain =
  345. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  346. put_device(&audio_ion_pdev->dev);
  347. if (!plat_priv->audio_iommu_domain) {
  348. cnss_pr_err("Unable to get Audio ion iommu domain");
  349. return -EINVAL;
  350. }
  351. return 0;
  352. }
  353. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  354. enum cnss_feature_v01 feature)
  355. {
  356. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  357. return -EINVAL;
  358. plat_priv->feature_list |= 1 << feature;
  359. return 0;
  360. }
  361. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  362. enum cnss_feature_v01 feature)
  363. {
  364. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  365. return -EINVAL;
  366. plat_priv->feature_list &= ~(1 << feature);
  367. return 0;
  368. }
  369. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  370. u64 *feature_list)
  371. {
  372. if (unlikely(!plat_priv))
  373. return -EINVAL;
  374. *feature_list = plat_priv->feature_list;
  375. return 0;
  376. }
  377. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  378. {
  379. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  380. return;
  381. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  382. plat_priv->driver_state,
  383. atomic_read(&plat_priv->pm_count));
  384. pm_stay_awake(&plat_priv->plat_dev->dev);
  385. }
  386. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  387. {
  388. int r = atomic_dec_return(&plat_priv->pm_count);
  389. WARN_ON(r < 0);
  390. if (r != 0)
  391. return;
  392. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  393. plat_priv->driver_state,
  394. atomic_read(&plat_priv->pm_count));
  395. pm_relax(&plat_priv->plat_dev->dev);
  396. }
  397. int cnss_get_fw_files_for_target(struct device *dev,
  398. struct cnss_fw_files *pfw_files,
  399. u32 target_type, u32 target_version)
  400. {
  401. if (!pfw_files)
  402. return -ENODEV;
  403. switch (target_version) {
  404. case QCA6174_REV3_VERSION:
  405. case QCA6174_REV3_2_VERSION:
  406. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  407. break;
  408. default:
  409. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  410. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  411. target_type, target_version);
  412. break;
  413. }
  414. return 0;
  415. }
  416. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  417. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  418. {
  419. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  420. if (!plat_priv)
  421. return -ENODEV;
  422. if (!cap)
  423. return -EINVAL;
  424. *cap = plat_priv->cap;
  425. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  426. return 0;
  427. }
  428. EXPORT_SYMBOL(cnss_get_platform_cap);
  429. /**
  430. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  431. * @dev: Device
  432. * @fw_cap: FW Capability which needs to be checked
  433. *
  434. * Return: TRUE if supported, FALSE on failure or if not supported
  435. */
  436. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  437. {
  438. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  439. bool is_supported = false;
  440. if (!plat_priv)
  441. return is_supported;
  442. if (!plat_priv->fw_caps)
  443. return is_supported;
  444. switch (fw_cap) {
  445. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  446. is_supported = !!(plat_priv->fw_caps &
  447. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  448. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  449. is_supported = false;
  450. break;
  451. default:
  452. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  453. }
  454. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  455. is_supported ? "supported" : "not supported");
  456. return is_supported;
  457. }
  458. EXPORT_SYMBOL(cnss_get_fw_cap);
  459. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  460. {
  461. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  462. if (!plat_priv)
  463. return;
  464. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  465. }
  466. EXPORT_SYMBOL(cnss_request_pm_qos);
  467. void cnss_remove_pm_qos(struct device *dev)
  468. {
  469. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  470. if (!plat_priv)
  471. return;
  472. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  473. }
  474. EXPORT_SYMBOL(cnss_remove_pm_qos);
  475. int cnss_wlan_enable(struct device *dev,
  476. struct cnss_wlan_enable_cfg *config,
  477. enum cnss_driver_mode mode,
  478. const char *host_version)
  479. {
  480. int ret = 0;
  481. struct cnss_plat_data *plat_priv;
  482. if (!dev) {
  483. cnss_pr_err("Invalid dev pointer\n");
  484. return -EINVAL;
  485. }
  486. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  487. if (!plat_priv)
  488. return -ENODEV;
  489. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  490. return 0;
  491. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  492. return 0;
  493. if (!config || !host_version) {
  494. cnss_pr_err("Invalid config or host_version pointer\n");
  495. return -EINVAL;
  496. }
  497. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  498. mode, config, host_version);
  499. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  500. goto skip_cfg;
  501. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  502. config->send_msi_ce = true;
  503. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  504. if (ret)
  505. goto out;
  506. skip_cfg:
  507. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  508. out:
  509. return ret;
  510. }
  511. EXPORT_SYMBOL(cnss_wlan_enable);
  512. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  513. {
  514. int ret = 0;
  515. struct cnss_plat_data *plat_priv;
  516. if (!dev) {
  517. cnss_pr_err("Invalid dev pointer\n");
  518. return -EINVAL;
  519. }
  520. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  521. if (!plat_priv)
  522. return -ENODEV;
  523. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  524. return 0;
  525. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  526. return 0;
  527. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  528. cnss_bus_free_qdss_mem(plat_priv);
  529. return ret;
  530. }
  531. EXPORT_SYMBOL(cnss_wlan_disable);
  532. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  533. dma_addr_t iova, size_t size)
  534. {
  535. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  536. uint32_t page_offset;
  537. if (!plat_priv)
  538. return -ENODEV;
  539. if (!plat_priv->audio_iommu_domain)
  540. return -EINVAL;
  541. page_offset = iova & (PAGE_SIZE - 1);
  542. if (page_offset + size > PAGE_SIZE)
  543. size += PAGE_SIZE;
  544. iova -= page_offset;
  545. paddr -= page_offset;
  546. return iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  547. roundup(size, PAGE_SIZE), IOMMU_READ | IOMMU_WRITE |
  548. IOMMU_CACHE);
  549. }
  550. EXPORT_SYMBOL(cnss_audio_smmu_map);
  551. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  552. {
  553. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  554. uint32_t page_offset;
  555. if (!plat_priv)
  556. return;
  557. if (!plat_priv->audio_iommu_domain)
  558. return;
  559. page_offset = iova & (PAGE_SIZE - 1);
  560. if (page_offset + size > PAGE_SIZE)
  561. size += PAGE_SIZE;
  562. iova -= page_offset;
  563. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  564. roundup(size, PAGE_SIZE));
  565. }
  566. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  567. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  568. u32 data_len, u8 *output)
  569. {
  570. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  571. int ret = 0;
  572. if (!plat_priv) {
  573. cnss_pr_err("plat_priv is NULL!\n");
  574. return -EINVAL;
  575. }
  576. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  577. return 0;
  578. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  579. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  580. plat_priv->driver_state);
  581. ret = -EINVAL;
  582. goto out;
  583. }
  584. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  585. data_len, output);
  586. out:
  587. return ret;
  588. }
  589. EXPORT_SYMBOL(cnss_athdiag_read);
  590. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  591. u32 data_len, u8 *input)
  592. {
  593. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  594. int ret = 0;
  595. if (!plat_priv) {
  596. cnss_pr_err("plat_priv is NULL!\n");
  597. return -EINVAL;
  598. }
  599. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  600. return 0;
  601. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  602. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  603. plat_priv->driver_state);
  604. ret = -EINVAL;
  605. goto out;
  606. }
  607. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  608. data_len, input);
  609. out:
  610. return ret;
  611. }
  612. EXPORT_SYMBOL(cnss_athdiag_write);
  613. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  614. {
  615. struct cnss_plat_data *plat_priv;
  616. if (!dev) {
  617. cnss_pr_err("Invalid dev pointer\n");
  618. return -EINVAL;
  619. }
  620. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  621. if (!plat_priv)
  622. return -ENODEV;
  623. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  624. return 0;
  625. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  626. }
  627. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  628. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  629. {
  630. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  631. if (!plat_priv)
  632. return -EINVAL;
  633. if (!plat_priv->fw_pcie_gen_switch) {
  634. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  635. return -EOPNOTSUPP;
  636. }
  637. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  638. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  639. return -EINVAL;
  640. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  641. plat_priv->pcie_gen_speed = pcie_gen_speed;
  642. return 0;
  643. }
  644. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  645. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  646. {
  647. int ret = 0;
  648. if (!plat_priv)
  649. return -ENODEV;
  650. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  651. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  652. if (ret)
  653. goto out;
  654. if (plat_priv->hds_enabled)
  655. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  656. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  657. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  658. plat_priv->ctrl_params.bdf_type = CNSS_BDF_BIN;
  659. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  660. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  661. plat_priv->ctrl_params.bdf_type);
  662. if (ret)
  663. goto out;
  664. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  665. return 0;
  666. ret = cnss_bus_load_m3(plat_priv);
  667. if (ret)
  668. goto out;
  669. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  670. if (ret)
  671. goto out;
  672. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  673. return 0;
  674. out:
  675. return ret;
  676. }
  677. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  678. {
  679. int ret = 0;
  680. if (!plat_priv->antenna) {
  681. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  682. if (ret)
  683. goto out;
  684. }
  685. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  686. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  687. if (ret)
  688. goto out;
  689. }
  690. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  691. if (ret)
  692. goto out;
  693. return 0;
  694. out:
  695. return ret;
  696. }
  697. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  698. {
  699. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  700. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  701. }
  702. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  703. {
  704. u32 i;
  705. int ret = 0;
  706. struct cnss_plat_ipc_daemon_config *cfg;
  707. ret = cnss_qmi_get_dms_mac(plat_priv);
  708. if (ret == 0 && plat_priv->dms.mac_valid)
  709. goto qmi_send;
  710. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  711. * Thus assert on failure to get MAC from DMS even after retries
  712. */
  713. if (plat_priv->use_nv_mac) {
  714. /* Check if Daemon says platform support DMS MAC provisioning */
  715. cfg = cnss_plat_ipc_qmi_daemon_config();
  716. if (cfg) {
  717. if (!cfg->dms_mac_addr_supported) {
  718. cnss_pr_err("DMS MAC address not supported\n");
  719. CNSS_ASSERT(0);
  720. return -EINVAL;
  721. }
  722. }
  723. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  724. if (plat_priv->dms.mac_valid)
  725. break;
  726. ret = cnss_qmi_get_dms_mac(plat_priv);
  727. if (ret == 0)
  728. break;
  729. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  730. }
  731. if (!plat_priv->dms.mac_valid) {
  732. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  733. CNSS_ASSERT(0);
  734. return -EINVAL;
  735. }
  736. }
  737. qmi_send:
  738. if (plat_priv->dms.mac_valid)
  739. ret =
  740. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  741. ARRAY_SIZE(plat_priv->dms.mac));
  742. return ret;
  743. }
  744. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  745. enum cnss_cal_db_op op, u32 *size)
  746. {
  747. int ret = 0;
  748. u32 timeout = cnss_get_timeout(plat_priv,
  749. CNSS_TIMEOUT_DAEMON_CONNECTION);
  750. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  751. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  752. if (op >= CNSS_CAL_DB_INVALID_OP)
  753. return -EINVAL;
  754. if (!plat_priv->cbc_file_download) {
  755. cnss_pr_info("CAL DB file not required as per BDF\n");
  756. return 0;
  757. }
  758. if (*size == 0) {
  759. cnss_pr_err("Invalid cal file size\n");
  760. return -EINVAL;
  761. }
  762. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  763. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  764. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  765. msecs_to_jiffies(timeout));
  766. if (!ret) {
  767. cnss_pr_err("Daemon not yet connected\n");
  768. CNSS_ASSERT(0);
  769. return ret;
  770. }
  771. }
  772. if (!plat_priv->cal_mem->va) {
  773. cnss_pr_err("CAL DB Memory not setup for FW\n");
  774. return -EINVAL;
  775. }
  776. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  777. if (op == CNSS_CAL_DB_DOWNLOAD) {
  778. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  779. ret = cnss_plat_ipc_qmi_file_download(client_id,
  780. CNSS_CAL_DB_FILE_NAME,
  781. plat_priv->cal_mem->va,
  782. size);
  783. } else {
  784. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  785. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  786. CNSS_CAL_DB_FILE_NAME,
  787. plat_priv->cal_mem->va,
  788. *size);
  789. }
  790. if (ret)
  791. cnss_pr_err("Cal DB file %s %s failure\n",
  792. CNSS_CAL_DB_FILE_NAME,
  793. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  794. else
  795. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  796. CNSS_CAL_DB_FILE_NAME,
  797. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  798. *size);
  799. return ret;
  800. }
  801. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  802. {
  803. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  804. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  805. return -EINVAL;
  806. }
  807. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  808. &plat_priv->cal_file_size);
  809. }
  810. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  811. u32 *cal_file_size)
  812. {
  813. /* To download pass the total size of cal DB mem allocated.
  814. * After cal file is download to mem, its size is updated in
  815. * return pointer
  816. */
  817. *cal_file_size = plat_priv->cal_mem->size;
  818. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  819. cal_file_size);
  820. }
  821. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  822. {
  823. int ret = 0;
  824. u32 cal_file_size = 0;
  825. if (!plat_priv)
  826. return -ENODEV;
  827. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  828. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  829. return -EINVAL;
  830. }
  831. cnss_pr_dbg("Processing FW Init Done..\n");
  832. del_timer(&plat_priv->fw_boot_timer);
  833. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  834. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  835. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  836. cnss_send_subsys_restart_level_msg(plat_priv);
  837. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  838. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  839. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  840. }
  841. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  842. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  843. CNSS_WALTEST);
  844. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  845. cnss_request_antenna_sharing(plat_priv);
  846. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  847. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  848. plat_priv->cal_time = jiffies;
  849. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  850. CNSS_CALIBRATION);
  851. } else {
  852. ret = cnss_setup_dms_mac(plat_priv);
  853. ret = cnss_bus_call_driver_probe(plat_priv);
  854. }
  855. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  856. goto out;
  857. else if (ret)
  858. goto shutdown;
  859. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  860. return 0;
  861. shutdown:
  862. cnss_bus_dev_shutdown(plat_priv);
  863. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  864. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  865. out:
  866. return ret;
  867. }
  868. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  869. {
  870. switch (type) {
  871. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  872. return "SERVER_ARRIVE";
  873. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  874. return "SERVER_EXIT";
  875. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  876. return "REQUEST_MEM";
  877. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  878. return "FW_MEM_READY";
  879. case CNSS_DRIVER_EVENT_FW_READY:
  880. return "FW_READY";
  881. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  882. return "COLD_BOOT_CAL_START";
  883. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  884. return "COLD_BOOT_CAL_DONE";
  885. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  886. return "REGISTER_DRIVER";
  887. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  888. return "UNREGISTER_DRIVER";
  889. case CNSS_DRIVER_EVENT_RECOVERY:
  890. return "RECOVERY";
  891. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  892. return "FORCE_FW_ASSERT";
  893. case CNSS_DRIVER_EVENT_POWER_UP:
  894. return "POWER_UP";
  895. case CNSS_DRIVER_EVENT_POWER_DOWN:
  896. return "POWER_DOWN";
  897. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  898. return "IDLE_RESTART";
  899. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  900. return "IDLE_SHUTDOWN";
  901. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  902. return "IMS_WFC_CALL_IND";
  903. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  904. return "WLFW_TWC_CFG_IND";
  905. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  906. return "QDSS_TRACE_REQ_MEM";
  907. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  908. return "FW_MEM_FILE_SAVE";
  909. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  910. return "QDSS_TRACE_FREE";
  911. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  912. return "QDSS_TRACE_REQ_DATA";
  913. case CNSS_DRIVER_EVENT_MAX:
  914. return "EVENT_MAX";
  915. }
  916. return "UNKNOWN";
  917. };
  918. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  919. enum cnss_driver_event_type type,
  920. u32 flags, void *data)
  921. {
  922. struct cnss_driver_event *event;
  923. unsigned long irq_flags;
  924. int gfp = GFP_KERNEL;
  925. int ret = 0;
  926. if (!plat_priv)
  927. return -ENODEV;
  928. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  929. cnss_driver_event_to_str(type), type,
  930. flags ? "-sync" : "", plat_priv->driver_state, flags);
  931. if (type >= CNSS_DRIVER_EVENT_MAX) {
  932. cnss_pr_err("Invalid Event type: %d, can't post", type);
  933. return -EINVAL;
  934. }
  935. if (in_interrupt() || irqs_disabled())
  936. gfp = GFP_ATOMIC;
  937. event = kzalloc(sizeof(*event), gfp);
  938. if (!event)
  939. return -ENOMEM;
  940. cnss_pm_stay_awake(plat_priv);
  941. event->type = type;
  942. event->data = data;
  943. init_completion(&event->complete);
  944. event->ret = CNSS_EVENT_PENDING;
  945. event->sync = !!(flags & CNSS_EVENT_SYNC);
  946. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  947. list_add_tail(&event->list, &plat_priv->event_list);
  948. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  949. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  950. if (!(flags & CNSS_EVENT_SYNC))
  951. goto out;
  952. if (flags & CNSS_EVENT_UNKILLABLE)
  953. wait_for_completion(&event->complete);
  954. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  955. ret = wait_for_completion_killable(&event->complete);
  956. else
  957. ret = wait_for_completion_interruptible(&event->complete);
  958. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  959. cnss_driver_event_to_str(type), type,
  960. plat_priv->driver_state, ret, event->ret);
  961. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  962. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  963. event->sync = false;
  964. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  965. ret = -EINTR;
  966. goto out;
  967. }
  968. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  969. ret = event->ret;
  970. kfree(event);
  971. out:
  972. cnss_pm_relax(plat_priv);
  973. return ret;
  974. }
  975. /**
  976. * cnss_get_timeout - Get timeout for corresponding type.
  977. * @plat_priv: Pointer to platform driver context.
  978. * @cnss_timeout_type: Timeout type.
  979. *
  980. * Return: Timeout in milliseconds.
  981. */
  982. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  983. enum cnss_timeout_type timeout_type)
  984. {
  985. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  986. switch (timeout_type) {
  987. case CNSS_TIMEOUT_QMI:
  988. return qmi_timeout;
  989. case CNSS_TIMEOUT_POWER_UP:
  990. return (qmi_timeout << 2);
  991. case CNSS_TIMEOUT_IDLE_RESTART:
  992. /* In idle restart power up sequence, we have fw_boot_timer to
  993. * handle FW initialization failure.
  994. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  995. * account for FW dump collection and FW re-initialization on
  996. * retry.
  997. */
  998. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  999. case CNSS_TIMEOUT_CALIBRATION:
  1000. /* Similar to mission mode, in CBC if FW init fails
  1001. * fw recovery is tried. Thus return 2x the CBC timeout.
  1002. */
  1003. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  1004. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  1005. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  1006. case CNSS_TIMEOUT_RDDM:
  1007. return CNSS_RDDM_TIMEOUT_MS;
  1008. case CNSS_TIMEOUT_RECOVERY:
  1009. return RECOVERY_TIMEOUT;
  1010. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1011. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1012. default:
  1013. return qmi_timeout;
  1014. }
  1015. }
  1016. unsigned int cnss_get_boot_timeout(struct device *dev)
  1017. {
  1018. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1019. if (!plat_priv) {
  1020. cnss_pr_err("plat_priv is NULL\n");
  1021. return 0;
  1022. }
  1023. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1024. }
  1025. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1026. int cnss_power_up(struct device *dev)
  1027. {
  1028. int ret = 0;
  1029. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1030. unsigned int timeout;
  1031. if (!plat_priv) {
  1032. cnss_pr_err("plat_priv is NULL\n");
  1033. return -ENODEV;
  1034. }
  1035. cnss_pr_dbg("Powering up device\n");
  1036. ret = cnss_driver_event_post(plat_priv,
  1037. CNSS_DRIVER_EVENT_POWER_UP,
  1038. CNSS_EVENT_SYNC, NULL);
  1039. if (ret)
  1040. goto out;
  1041. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1042. goto out;
  1043. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1044. reinit_completion(&plat_priv->power_up_complete);
  1045. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1046. msecs_to_jiffies(timeout));
  1047. if (!ret) {
  1048. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1049. timeout);
  1050. ret = -EAGAIN;
  1051. goto out;
  1052. }
  1053. return 0;
  1054. out:
  1055. return ret;
  1056. }
  1057. EXPORT_SYMBOL(cnss_power_up);
  1058. int cnss_power_down(struct device *dev)
  1059. {
  1060. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1061. if (!plat_priv) {
  1062. cnss_pr_err("plat_priv is NULL\n");
  1063. return -ENODEV;
  1064. }
  1065. cnss_pr_dbg("Powering down device\n");
  1066. return cnss_driver_event_post(plat_priv,
  1067. CNSS_DRIVER_EVENT_POWER_DOWN,
  1068. CNSS_EVENT_SYNC, NULL);
  1069. }
  1070. EXPORT_SYMBOL(cnss_power_down);
  1071. int cnss_idle_restart(struct device *dev)
  1072. {
  1073. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1074. unsigned int timeout;
  1075. int ret = 0;
  1076. if (!plat_priv) {
  1077. cnss_pr_err("plat_priv is NULL\n");
  1078. return -ENODEV;
  1079. }
  1080. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1081. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1082. return -EBUSY;
  1083. }
  1084. cnss_pr_dbg("Doing idle restart\n");
  1085. reinit_completion(&plat_priv->power_up_complete);
  1086. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1087. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1088. ret = -EINVAL;
  1089. goto out;
  1090. }
  1091. ret = cnss_driver_event_post(plat_priv,
  1092. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1093. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1094. if (ret)
  1095. goto out;
  1096. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1097. ret = cnss_bus_call_driver_probe(plat_priv);
  1098. goto out;
  1099. }
  1100. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1101. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1102. msecs_to_jiffies(timeout));
  1103. if (plat_priv->power_up_error) {
  1104. ret = plat_priv->power_up_error;
  1105. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1106. cnss_pr_dbg("Power up error:%d, exiting\n",
  1107. plat_priv->power_up_error);
  1108. goto out;
  1109. }
  1110. if (!ret) {
  1111. /* This exception occurs after attempting retry of FW recovery.
  1112. * Thus we can safely power off the device.
  1113. */
  1114. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1115. timeout);
  1116. ret = -ETIMEDOUT;
  1117. cnss_power_down(dev);
  1118. CNSS_ASSERT(0);
  1119. goto out;
  1120. }
  1121. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1122. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1123. del_timer(&plat_priv->fw_boot_timer);
  1124. ret = -EINVAL;
  1125. goto out;
  1126. }
  1127. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1128. * non-DRV is supported only once after device reboots and before wifi
  1129. * is turned on. We do not allow switching back to DRV.
  1130. * To bring device back into DRV, user needs to reboot device.
  1131. */
  1132. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1133. cnss_pr_dbg("DRV is disabled\n");
  1134. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1135. }
  1136. mutex_unlock(&plat_priv->driver_ops_lock);
  1137. return 0;
  1138. out:
  1139. mutex_unlock(&plat_priv->driver_ops_lock);
  1140. return ret;
  1141. }
  1142. EXPORT_SYMBOL(cnss_idle_restart);
  1143. int cnss_idle_shutdown(struct device *dev)
  1144. {
  1145. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1146. if (!plat_priv) {
  1147. cnss_pr_err("plat_priv is NULL\n");
  1148. return -ENODEV;
  1149. }
  1150. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1151. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1152. return -EAGAIN;
  1153. }
  1154. cnss_pr_dbg("Doing idle shutdown\n");
  1155. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) ||
  1156. test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state)) {
  1157. cnss_pr_dbg("Recovery in progress. Ignore IDLE Shutdown\n");
  1158. return -EBUSY;
  1159. }
  1160. return cnss_driver_event_post(plat_priv,
  1161. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1162. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1163. }
  1164. EXPORT_SYMBOL(cnss_idle_shutdown);
  1165. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1166. {
  1167. int ret = 0;
  1168. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1169. if (ret < 0) {
  1170. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1171. goto out;
  1172. }
  1173. ret = cnss_get_clk(plat_priv);
  1174. if (ret) {
  1175. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1176. goto put_vreg;
  1177. }
  1178. ret = cnss_get_pinctrl(plat_priv);
  1179. if (ret) {
  1180. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1181. goto put_clk;
  1182. }
  1183. return 0;
  1184. put_clk:
  1185. cnss_put_clk(plat_priv);
  1186. put_vreg:
  1187. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1188. out:
  1189. return ret;
  1190. }
  1191. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1192. {
  1193. cnss_put_clk(plat_priv);
  1194. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1195. }
  1196. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1197. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1198. unsigned long code,
  1199. void *ss_handle)
  1200. {
  1201. struct cnss_plat_data *plat_priv =
  1202. container_of(nb, struct cnss_plat_data, modem_nb);
  1203. struct cnss_esoc_info *esoc_info;
  1204. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1205. if (!plat_priv)
  1206. return NOTIFY_DONE;
  1207. esoc_info = &plat_priv->esoc_info;
  1208. if (code == SUBSYS_AFTER_POWERUP)
  1209. esoc_info->modem_current_status = 1;
  1210. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1211. esoc_info->modem_current_status = 0;
  1212. else
  1213. return NOTIFY_DONE;
  1214. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1215. esoc_info->modem_current_status))
  1216. return NOTIFY_DONE;
  1217. return NOTIFY_OK;
  1218. }
  1219. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1220. {
  1221. int ret = 0;
  1222. struct device *dev;
  1223. struct cnss_esoc_info *esoc_info;
  1224. struct esoc_desc *esoc_desc;
  1225. const char *client_desc;
  1226. dev = &plat_priv->plat_dev->dev;
  1227. esoc_info = &plat_priv->esoc_info;
  1228. esoc_info->notify_modem_status =
  1229. of_property_read_bool(dev->of_node,
  1230. "qcom,notify-modem-status");
  1231. if (!esoc_info->notify_modem_status)
  1232. goto out;
  1233. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1234. &client_desc);
  1235. if (ret) {
  1236. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1237. } else {
  1238. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1239. if (IS_ERR_OR_NULL(esoc_desc)) {
  1240. ret = PTR_RET(esoc_desc);
  1241. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1242. ret);
  1243. goto out;
  1244. }
  1245. esoc_info->esoc_desc = esoc_desc;
  1246. }
  1247. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1248. esoc_info->modem_current_status = 0;
  1249. esoc_info->modem_notify_handler =
  1250. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1251. esoc_info->esoc_desc->name :
  1252. "modem", &plat_priv->modem_nb);
  1253. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1254. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1255. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1256. ret);
  1257. goto unreg_esoc;
  1258. }
  1259. return 0;
  1260. unreg_esoc:
  1261. if (esoc_info->esoc_desc)
  1262. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1263. out:
  1264. return ret;
  1265. }
  1266. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1267. {
  1268. struct device *dev;
  1269. struct cnss_esoc_info *esoc_info;
  1270. dev = &plat_priv->plat_dev->dev;
  1271. esoc_info = &plat_priv->esoc_info;
  1272. if (esoc_info->notify_modem_status)
  1273. subsys_notif_unregister_notifier
  1274. (esoc_info->modem_notify_handler,
  1275. &plat_priv->modem_nb);
  1276. if (esoc_info->esoc_desc)
  1277. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1278. }
  1279. #else
  1280. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1281. {
  1282. return 0;
  1283. }
  1284. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1285. #endif
  1286. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1287. {
  1288. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1289. int ret = 0;
  1290. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1291. return 0;
  1292. enable_irq(sol_gpio->dev_sol_irq);
  1293. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1294. if (ret)
  1295. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1296. ret);
  1297. return ret;
  1298. }
  1299. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1300. {
  1301. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1302. int ret = 0;
  1303. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1304. return 0;
  1305. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1306. if (ret)
  1307. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1308. ret);
  1309. disable_irq(sol_gpio->dev_sol_irq);
  1310. return ret;
  1311. }
  1312. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1313. {
  1314. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1315. if (sol_gpio->dev_sol_gpio < 0)
  1316. return -EINVAL;
  1317. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1318. }
  1319. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1320. {
  1321. struct cnss_plat_data *plat_priv = data;
  1322. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1323. sol_gpio->dev_sol_counter++;
  1324. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1325. irq, sol_gpio->dev_sol_counter);
  1326. /* Make sure abort current suspend */
  1327. cnss_pm_stay_awake(plat_priv);
  1328. cnss_pm_relax(plat_priv);
  1329. pm_system_wakeup();
  1330. cnss_bus_handle_dev_sol_irq(plat_priv);
  1331. return IRQ_HANDLED;
  1332. }
  1333. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1334. {
  1335. struct device *dev = &plat_priv->plat_dev->dev;
  1336. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1337. int ret = 0;
  1338. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1339. "wlan-dev-sol-gpio", 0);
  1340. if (sol_gpio->dev_sol_gpio < 0)
  1341. goto out;
  1342. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1343. sol_gpio->dev_sol_gpio);
  1344. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1345. if (ret) {
  1346. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1347. ret);
  1348. goto out;
  1349. }
  1350. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1351. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1352. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1353. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1354. if (ret) {
  1355. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1356. goto free_gpio;
  1357. }
  1358. return 0;
  1359. free_gpio:
  1360. gpio_free(sol_gpio->dev_sol_gpio);
  1361. out:
  1362. return ret;
  1363. }
  1364. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1365. {
  1366. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1367. if (sol_gpio->dev_sol_gpio < 0)
  1368. return;
  1369. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1370. gpio_free(sol_gpio->dev_sol_gpio);
  1371. }
  1372. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1373. {
  1374. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1375. if (sol_gpio->host_sol_gpio < 0)
  1376. return -EINVAL;
  1377. if (value)
  1378. cnss_pr_dbg("Assert host SOL GPIO\n");
  1379. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1380. return 0;
  1381. }
  1382. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1383. {
  1384. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1385. if (sol_gpio->host_sol_gpio < 0)
  1386. return -EINVAL;
  1387. return gpio_get_value(sol_gpio->host_sol_gpio);
  1388. }
  1389. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1390. {
  1391. struct device *dev = &plat_priv->plat_dev->dev;
  1392. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1393. int ret = 0;
  1394. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1395. "wlan-host-sol-gpio", 0);
  1396. if (sol_gpio->host_sol_gpio < 0)
  1397. goto out;
  1398. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1399. sol_gpio->host_sol_gpio);
  1400. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1401. if (ret) {
  1402. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1403. ret);
  1404. goto out;
  1405. }
  1406. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1407. return 0;
  1408. out:
  1409. return ret;
  1410. }
  1411. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1412. {
  1413. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1414. if (sol_gpio->host_sol_gpio < 0)
  1415. return;
  1416. gpio_free(sol_gpio->host_sol_gpio);
  1417. }
  1418. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1419. {
  1420. int ret;
  1421. ret = cnss_init_dev_sol_gpio(plat_priv);
  1422. if (ret)
  1423. goto out;
  1424. ret = cnss_init_host_sol_gpio(plat_priv);
  1425. if (ret)
  1426. goto deinit_dev_sol;
  1427. return 0;
  1428. deinit_dev_sol:
  1429. cnss_deinit_dev_sol_gpio(plat_priv);
  1430. out:
  1431. return ret;
  1432. }
  1433. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1434. {
  1435. cnss_deinit_host_sol_gpio(plat_priv);
  1436. cnss_deinit_dev_sol_gpio(plat_priv);
  1437. }
  1438. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1439. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1440. {
  1441. struct cnss_plat_data *plat_priv;
  1442. int ret = 0;
  1443. if (!subsys_desc->dev) {
  1444. cnss_pr_err("dev from subsys_desc is NULL\n");
  1445. return -ENODEV;
  1446. }
  1447. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1448. if (!plat_priv) {
  1449. cnss_pr_err("plat_priv is NULL\n");
  1450. return -ENODEV;
  1451. }
  1452. if (!plat_priv->driver_state) {
  1453. cnss_pr_dbg("subsys powerup is ignored\n");
  1454. return 0;
  1455. }
  1456. ret = cnss_bus_dev_powerup(plat_priv);
  1457. if (ret)
  1458. __pm_relax(plat_priv->recovery_ws);
  1459. return ret;
  1460. }
  1461. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1462. bool force_stop)
  1463. {
  1464. struct cnss_plat_data *plat_priv;
  1465. if (!subsys_desc->dev) {
  1466. cnss_pr_err("dev from subsys_desc is NULL\n");
  1467. return -ENODEV;
  1468. }
  1469. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1470. if (!plat_priv) {
  1471. cnss_pr_err("plat_priv is NULL\n");
  1472. return -ENODEV;
  1473. }
  1474. if (!plat_priv->driver_state) {
  1475. cnss_pr_dbg("subsys shutdown is ignored\n");
  1476. return 0;
  1477. }
  1478. return cnss_bus_dev_shutdown(plat_priv);
  1479. }
  1480. void cnss_device_crashed(struct device *dev)
  1481. {
  1482. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1483. struct cnss_subsys_info *subsys_info;
  1484. if (!plat_priv)
  1485. return;
  1486. subsys_info = &plat_priv->subsys_info;
  1487. if (subsys_info->subsys_device) {
  1488. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1489. subsys_set_crash_status(subsys_info->subsys_device, true);
  1490. subsystem_restart_dev(subsys_info->subsys_device);
  1491. }
  1492. }
  1493. EXPORT_SYMBOL(cnss_device_crashed);
  1494. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1495. {
  1496. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1497. if (!plat_priv) {
  1498. cnss_pr_err("plat_priv is NULL\n");
  1499. return;
  1500. }
  1501. cnss_bus_dev_crash_shutdown(plat_priv);
  1502. }
  1503. static int cnss_subsys_ramdump(int enable,
  1504. const struct subsys_desc *subsys_desc)
  1505. {
  1506. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1507. if (!plat_priv) {
  1508. cnss_pr_err("plat_priv is NULL\n");
  1509. return -ENODEV;
  1510. }
  1511. if (!enable)
  1512. return 0;
  1513. return cnss_bus_dev_ramdump(plat_priv);
  1514. }
  1515. static void cnss_recovery_work_handler(struct work_struct *work)
  1516. {
  1517. }
  1518. #else
  1519. static void cnss_recovery_work_handler(struct work_struct *work)
  1520. {
  1521. int ret;
  1522. struct cnss_plat_data *plat_priv =
  1523. container_of(work, struct cnss_plat_data, recovery_work);
  1524. if (!plat_priv->recovery_enabled)
  1525. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1526. cnss_bus_dev_shutdown(plat_priv);
  1527. cnss_bus_dev_ramdump(plat_priv);
  1528. msleep(POWER_RESET_MIN_DELAY_MS);
  1529. ret = cnss_bus_dev_powerup(plat_priv);
  1530. if (ret)
  1531. __pm_relax(plat_priv->recovery_ws);
  1532. return;
  1533. }
  1534. void cnss_device_crashed(struct device *dev)
  1535. {
  1536. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1537. if (!plat_priv)
  1538. return;
  1539. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1540. schedule_work(&plat_priv->recovery_work);
  1541. }
  1542. EXPORT_SYMBOL(cnss_device_crashed);
  1543. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1544. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1545. {
  1546. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1547. struct cnss_ramdump_info *ramdump_info;
  1548. if (!plat_priv)
  1549. return NULL;
  1550. ramdump_info = &plat_priv->ramdump_info;
  1551. *size = ramdump_info->ramdump_size;
  1552. return ramdump_info->ramdump_va;
  1553. }
  1554. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1555. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1556. {
  1557. switch (reason) {
  1558. case CNSS_REASON_DEFAULT:
  1559. return "DEFAULT";
  1560. case CNSS_REASON_LINK_DOWN:
  1561. return "LINK_DOWN";
  1562. case CNSS_REASON_RDDM:
  1563. return "RDDM";
  1564. case CNSS_REASON_TIMEOUT:
  1565. return "TIMEOUT";
  1566. }
  1567. return "UNKNOWN";
  1568. };
  1569. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1570. enum cnss_recovery_reason reason)
  1571. {
  1572. plat_priv->recovery_count++;
  1573. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1574. goto self_recovery;
  1575. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1576. cnss_pr_dbg("Skip device recovery\n");
  1577. return 0;
  1578. }
  1579. /* FW recovery sequence has multiple steps and firmware load requires
  1580. * linux PM in awake state. Thus hold the cnss wake source until
  1581. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1582. * time taken in this process.
  1583. */
  1584. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1585. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1586. true);
  1587. switch (reason) {
  1588. case CNSS_REASON_LINK_DOWN:
  1589. if (!cnss_bus_check_link_status(plat_priv)) {
  1590. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1591. return 0;
  1592. }
  1593. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1594. &plat_priv->ctrl_params.quirks))
  1595. goto self_recovery;
  1596. if (!cnss_bus_recover_link_down(plat_priv)) {
  1597. /* clear recovery bit here to avoid skipping
  1598. * the recovery work for RDDM later
  1599. */
  1600. clear_bit(CNSS_DRIVER_RECOVERY,
  1601. &plat_priv->driver_state);
  1602. return 0;
  1603. }
  1604. break;
  1605. case CNSS_REASON_RDDM:
  1606. cnss_bus_collect_dump_info(plat_priv, false);
  1607. break;
  1608. case CNSS_REASON_DEFAULT:
  1609. case CNSS_REASON_TIMEOUT:
  1610. break;
  1611. default:
  1612. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1613. cnss_recovery_reason_to_str(reason), reason);
  1614. break;
  1615. }
  1616. cnss_bus_device_crashed(plat_priv);
  1617. return 0;
  1618. self_recovery:
  1619. cnss_pr_dbg("Going for self recovery\n");
  1620. cnss_bus_dev_shutdown(plat_priv);
  1621. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1622. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1623. &plat_priv->ctrl_params.quirks);
  1624. cnss_bus_dev_powerup(plat_priv);
  1625. return 0;
  1626. }
  1627. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1628. void *data)
  1629. {
  1630. struct cnss_recovery_data *recovery_data = data;
  1631. int ret = 0;
  1632. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1633. cnss_recovery_reason_to_str(recovery_data->reason),
  1634. recovery_data->reason);
  1635. if (!plat_priv->driver_state) {
  1636. cnss_pr_err("Improper driver state, ignore recovery\n");
  1637. ret = -EINVAL;
  1638. goto out;
  1639. }
  1640. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1641. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1642. ret = -EINVAL;
  1643. goto out;
  1644. }
  1645. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1646. cnss_pr_err("Recovery is already in progress\n");
  1647. CNSS_ASSERT(0);
  1648. ret = -EINVAL;
  1649. goto out;
  1650. }
  1651. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1652. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1653. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1654. ret = -EINVAL;
  1655. goto out;
  1656. }
  1657. switch (plat_priv->device_id) {
  1658. case QCA6174_DEVICE_ID:
  1659. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1660. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1661. &plat_priv->driver_state)) {
  1662. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1663. ret = -EINVAL;
  1664. goto out;
  1665. }
  1666. break;
  1667. default:
  1668. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1669. set_bit(CNSS_FW_BOOT_RECOVERY,
  1670. &plat_priv->driver_state);
  1671. }
  1672. break;
  1673. }
  1674. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1675. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1676. out:
  1677. kfree(data);
  1678. return ret;
  1679. }
  1680. int cnss_self_recovery(struct device *dev,
  1681. enum cnss_recovery_reason reason)
  1682. {
  1683. cnss_schedule_recovery(dev, reason);
  1684. return 0;
  1685. }
  1686. EXPORT_SYMBOL(cnss_self_recovery);
  1687. void cnss_schedule_recovery(struct device *dev,
  1688. enum cnss_recovery_reason reason)
  1689. {
  1690. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1691. struct cnss_recovery_data *data;
  1692. int gfp = GFP_KERNEL;
  1693. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1694. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1695. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1696. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1697. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1698. return;
  1699. }
  1700. if (in_interrupt() || irqs_disabled())
  1701. gfp = GFP_ATOMIC;
  1702. data = kzalloc(sizeof(*data), gfp);
  1703. if (!data)
  1704. return;
  1705. data->reason = reason;
  1706. cnss_driver_event_post(plat_priv,
  1707. CNSS_DRIVER_EVENT_RECOVERY,
  1708. 0, data);
  1709. }
  1710. EXPORT_SYMBOL(cnss_schedule_recovery);
  1711. int cnss_force_fw_assert(struct device *dev)
  1712. {
  1713. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1714. if (!plat_priv) {
  1715. cnss_pr_err("plat_priv is NULL\n");
  1716. return -ENODEV;
  1717. }
  1718. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1719. cnss_pr_info("Forced FW assert is not supported\n");
  1720. return -EOPNOTSUPP;
  1721. }
  1722. if (cnss_bus_is_device_down(plat_priv)) {
  1723. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1724. return 0;
  1725. }
  1726. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1727. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1728. return 0;
  1729. }
  1730. if (in_interrupt() || irqs_disabled())
  1731. cnss_driver_event_post(plat_priv,
  1732. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1733. 0, NULL);
  1734. else
  1735. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1736. return 0;
  1737. }
  1738. EXPORT_SYMBOL(cnss_force_fw_assert);
  1739. int cnss_force_collect_rddm(struct device *dev)
  1740. {
  1741. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1742. unsigned int timeout;
  1743. int ret = 0;
  1744. if (!plat_priv) {
  1745. cnss_pr_err("plat_priv is NULL\n");
  1746. return -ENODEV;
  1747. }
  1748. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1749. cnss_pr_info("Force collect rddm is not supported\n");
  1750. return -EOPNOTSUPP;
  1751. }
  1752. if (cnss_bus_is_device_down(plat_priv)) {
  1753. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1754. goto wait_rddm;
  1755. }
  1756. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1757. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1758. goto wait_rddm;
  1759. }
  1760. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1761. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1762. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1763. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1764. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1765. return 0;
  1766. }
  1767. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1768. if (ret)
  1769. return ret;
  1770. wait_rddm:
  1771. reinit_completion(&plat_priv->rddm_complete);
  1772. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1773. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1774. msecs_to_jiffies(timeout));
  1775. if (!ret) {
  1776. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1777. timeout);
  1778. ret = -ETIMEDOUT;
  1779. } else if (ret > 0) {
  1780. ret = 0;
  1781. }
  1782. return ret;
  1783. }
  1784. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1785. int cnss_qmi_send_get(struct device *dev)
  1786. {
  1787. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1788. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1789. return 0;
  1790. return cnss_bus_qmi_send_get(plat_priv);
  1791. }
  1792. EXPORT_SYMBOL(cnss_qmi_send_get);
  1793. int cnss_qmi_send_put(struct device *dev)
  1794. {
  1795. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1796. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1797. return 0;
  1798. return cnss_bus_qmi_send_put(plat_priv);
  1799. }
  1800. EXPORT_SYMBOL(cnss_qmi_send_put);
  1801. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1802. int cmd_len, void *cb_ctx,
  1803. int (*cb)(void *ctx, void *event, int event_len))
  1804. {
  1805. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1806. int ret;
  1807. if (!plat_priv)
  1808. return -ENODEV;
  1809. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1810. return -EINVAL;
  1811. plat_priv->get_info_cb = cb;
  1812. plat_priv->get_info_cb_ctx = cb_ctx;
  1813. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1814. if (ret) {
  1815. plat_priv->get_info_cb = NULL;
  1816. plat_priv->get_info_cb_ctx = NULL;
  1817. }
  1818. return ret;
  1819. }
  1820. EXPORT_SYMBOL(cnss_qmi_send);
  1821. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1822. {
  1823. int ret = 0;
  1824. u32 retry = 0, timeout;
  1825. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1826. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1827. goto out;
  1828. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1829. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1830. goto out;
  1831. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1832. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1833. goto out;
  1834. }
  1835. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1836. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1837. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1838. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1839. CNSS_ASSERT(0);
  1840. return -EINVAL;
  1841. }
  1842. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1843. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1844. break;
  1845. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1846. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1847. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1848. CNSS_ASSERT(0);
  1849. ret = -EINVAL;
  1850. goto mark_cal_fail;
  1851. }
  1852. }
  1853. switch (plat_priv->device_id) {
  1854. case QCA6290_DEVICE_ID:
  1855. case QCA6390_DEVICE_ID:
  1856. case QCA6490_DEVICE_ID:
  1857. case KIWI_DEVICE_ID:
  1858. case MANGO_DEVICE_ID:
  1859. case PEACH_DEVICE_ID:
  1860. break;
  1861. default:
  1862. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1863. plat_priv->device_id);
  1864. ret = -EINVAL;
  1865. goto mark_cal_fail;
  1866. }
  1867. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1868. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1869. timeout = cnss_get_timeout(plat_priv,
  1870. CNSS_TIMEOUT_CALIBRATION);
  1871. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1872. timeout / 1000);
  1873. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1874. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1875. msecs_to_jiffies(timeout));
  1876. }
  1877. reinit_completion(&plat_priv->cal_complete);
  1878. ret = cnss_bus_dev_powerup(plat_priv);
  1879. mark_cal_fail:
  1880. if (ret) {
  1881. complete(&plat_priv->cal_complete);
  1882. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1883. /* Set CBC done in driver state to mark attempt and note error
  1884. * since calibration cannot be retried at boot.
  1885. */
  1886. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1887. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1888. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  1889. plat_priv->device_id == QCN7605_DEVICE_ID) {
  1890. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1891. goto out;
  1892. cnss_pr_info("Schedule WLAN driver load\n");
  1893. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1894. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1895. 0);
  1896. }
  1897. }
  1898. out:
  1899. return ret;
  1900. }
  1901. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1902. void *data)
  1903. {
  1904. struct cnss_cal_info *cal_info = data;
  1905. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1906. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1907. goto out;
  1908. switch (cal_info->cal_status) {
  1909. case CNSS_CAL_DONE:
  1910. cnss_pr_dbg("Calibration completed successfully\n");
  1911. plat_priv->cal_done = true;
  1912. break;
  1913. case CNSS_CAL_TIMEOUT:
  1914. case CNSS_CAL_FAILURE:
  1915. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1916. cal_info->cal_status);
  1917. break;
  1918. default:
  1919. cnss_pr_err("Unknown calibration status: %u\n",
  1920. cal_info->cal_status);
  1921. break;
  1922. }
  1923. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1924. cnss_bus_free_qdss_mem(plat_priv);
  1925. cnss_release_antenna_sharing(plat_priv);
  1926. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  1927. goto skip_shutdown;
  1928. cnss_bus_dev_shutdown(plat_priv);
  1929. msleep(POWER_RESET_MIN_DELAY_MS);
  1930. skip_shutdown:
  1931. complete(&plat_priv->cal_complete);
  1932. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1933. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1934. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1935. cnss_cal_mem_upload_to_file(plat_priv);
  1936. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1937. goto out;
  1938. cnss_pr_dbg("Schedule WLAN driver load\n");
  1939. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1940. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1941. 0);
  1942. }
  1943. out:
  1944. kfree(data);
  1945. return 0;
  1946. }
  1947. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1948. {
  1949. int ret;
  1950. ret = cnss_bus_dev_powerup(plat_priv);
  1951. if (ret)
  1952. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1953. return ret;
  1954. }
  1955. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1956. {
  1957. cnss_bus_dev_shutdown(plat_priv);
  1958. return 0;
  1959. }
  1960. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1961. {
  1962. int ret = 0;
  1963. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1964. if (ret < 0)
  1965. return ret;
  1966. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1967. }
  1968. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1969. u32 mem_seg_len, u64 pa, u32 size)
  1970. {
  1971. int i = 0;
  1972. u64 offset = 0;
  1973. void *va = NULL;
  1974. u64 local_pa;
  1975. u32 local_size;
  1976. for (i = 0; i < mem_seg_len; i++) {
  1977. local_pa = (u64)fw_mem[i].pa;
  1978. local_size = (u32)fw_mem[i].size;
  1979. if (pa == local_pa && size <= local_size) {
  1980. va = fw_mem[i].va;
  1981. break;
  1982. }
  1983. if (pa > local_pa &&
  1984. pa < local_pa + local_size &&
  1985. pa + size <= local_pa + local_size) {
  1986. offset = pa - local_pa;
  1987. va = fw_mem[i].va + offset;
  1988. break;
  1989. }
  1990. }
  1991. return va;
  1992. }
  1993. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1994. void *data)
  1995. {
  1996. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1997. struct cnss_fw_mem *fw_mem_seg;
  1998. int ret = 0L;
  1999. void *va = NULL;
  2000. u32 i, fw_mem_seg_len;
  2001. switch (event_data->mem_type) {
  2002. case QMI_WLFW_MEM_TYPE_DDR_V01:
  2003. if (!plat_priv->fw_mem_seg_len)
  2004. goto invalid_mem_save;
  2005. fw_mem_seg = plat_priv->fw_mem;
  2006. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  2007. break;
  2008. case QMI_WLFW_MEM_QDSS_V01:
  2009. if (!plat_priv->qdss_mem_seg_len)
  2010. goto invalid_mem_save;
  2011. fw_mem_seg = plat_priv->qdss_mem;
  2012. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2013. break;
  2014. default:
  2015. goto invalid_mem_save;
  2016. }
  2017. for (i = 0; i < event_data->mem_seg_len; i++) {
  2018. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2019. event_data->mem_seg[i].addr,
  2020. event_data->mem_seg[i].size);
  2021. if (!va) {
  2022. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2023. &event_data->mem_seg[i].addr,
  2024. event_data->mem_type);
  2025. ret = -EINVAL;
  2026. break;
  2027. }
  2028. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2029. event_data->file_name,
  2030. event_data->mem_seg[i].size);
  2031. if (ret < 0) {
  2032. cnss_pr_err("Fail to save fw mem data: %d\n",
  2033. ret);
  2034. break;
  2035. }
  2036. }
  2037. kfree(data);
  2038. return ret;
  2039. invalid_mem_save:
  2040. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2041. event_data->mem_type);
  2042. kfree(data);
  2043. return -EINVAL;
  2044. }
  2045. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2046. {
  2047. cnss_bus_free_qdss_mem(plat_priv);
  2048. return 0;
  2049. }
  2050. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2051. void *data)
  2052. {
  2053. int ret = 0;
  2054. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2055. if (!plat_priv)
  2056. return -ENODEV;
  2057. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2058. event_data->total_size);
  2059. kfree(data);
  2060. return ret;
  2061. }
  2062. static void cnss_driver_event_work(struct work_struct *work)
  2063. {
  2064. struct cnss_plat_data *plat_priv =
  2065. container_of(work, struct cnss_plat_data, event_work);
  2066. struct cnss_driver_event *event;
  2067. unsigned long flags;
  2068. int ret = 0;
  2069. if (!plat_priv) {
  2070. cnss_pr_err("plat_priv is NULL!\n");
  2071. return;
  2072. }
  2073. cnss_pm_stay_awake(plat_priv);
  2074. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2075. while (!list_empty(&plat_priv->event_list)) {
  2076. event = list_first_entry(&plat_priv->event_list,
  2077. struct cnss_driver_event, list);
  2078. list_del(&event->list);
  2079. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2080. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2081. cnss_driver_event_to_str(event->type),
  2082. event->sync ? "-sync" : "", event->type,
  2083. plat_priv->driver_state);
  2084. switch (event->type) {
  2085. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2086. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2087. break;
  2088. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2089. ret = cnss_wlfw_server_exit(plat_priv);
  2090. break;
  2091. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2092. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2093. if (ret)
  2094. break;
  2095. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2096. break;
  2097. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2098. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2099. break;
  2100. case CNSS_DRIVER_EVENT_FW_READY:
  2101. ret = cnss_fw_ready_hdlr(plat_priv);
  2102. break;
  2103. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2104. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2105. break;
  2106. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2107. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2108. event->data);
  2109. break;
  2110. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2111. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2112. event->data);
  2113. break;
  2114. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2115. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2116. break;
  2117. case CNSS_DRIVER_EVENT_RECOVERY:
  2118. ret = cnss_driver_recovery_hdlr(plat_priv,
  2119. event->data);
  2120. break;
  2121. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2122. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2123. break;
  2124. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2125. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2126. &plat_priv->driver_state);
  2127. fallthrough;
  2128. case CNSS_DRIVER_EVENT_POWER_UP:
  2129. ret = cnss_power_up_hdlr(plat_priv);
  2130. break;
  2131. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2132. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2133. &plat_priv->driver_state);
  2134. fallthrough;
  2135. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2136. ret = cnss_power_down_hdlr(plat_priv);
  2137. break;
  2138. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2139. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2140. event->data);
  2141. break;
  2142. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2143. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2144. event->data);
  2145. break;
  2146. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2147. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2148. break;
  2149. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2150. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2151. event->data);
  2152. break;
  2153. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2154. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2155. break;
  2156. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2157. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2158. event->data);
  2159. break;
  2160. default:
  2161. cnss_pr_err("Invalid driver event type: %d",
  2162. event->type);
  2163. kfree(event);
  2164. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2165. continue;
  2166. }
  2167. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2168. if (event->sync) {
  2169. event->ret = ret;
  2170. complete(&event->complete);
  2171. continue;
  2172. }
  2173. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2174. kfree(event);
  2175. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2176. }
  2177. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2178. cnss_pm_relax(plat_priv);
  2179. }
  2180. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2181. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2182. {
  2183. int ret = 0;
  2184. struct cnss_subsys_info *subsys_info;
  2185. subsys_info = &plat_priv->subsys_info;
  2186. subsys_info->subsys_desc.name = plat_priv->device_name;
  2187. subsys_info->subsys_desc.owner = THIS_MODULE;
  2188. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2189. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2190. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2191. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2192. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2193. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2194. if (IS_ERR(subsys_info->subsys_device)) {
  2195. ret = PTR_ERR(subsys_info->subsys_device);
  2196. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2197. goto out;
  2198. }
  2199. subsys_info->subsys_handle =
  2200. subsystem_get(subsys_info->subsys_desc.name);
  2201. if (!subsys_info->subsys_handle) {
  2202. cnss_pr_err("Failed to get subsys_handle!\n");
  2203. ret = -EINVAL;
  2204. goto unregister_subsys;
  2205. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2206. ret = PTR_ERR(subsys_info->subsys_handle);
  2207. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2208. goto unregister_subsys;
  2209. }
  2210. return 0;
  2211. unregister_subsys:
  2212. subsys_unregister(subsys_info->subsys_device);
  2213. out:
  2214. return ret;
  2215. }
  2216. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2217. {
  2218. struct cnss_subsys_info *subsys_info;
  2219. subsys_info = &plat_priv->subsys_info;
  2220. subsystem_put(subsys_info->subsys_handle);
  2221. subsys_unregister(subsys_info->subsys_device);
  2222. }
  2223. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2224. {
  2225. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2226. return create_ramdump_device(subsys_info->subsys_desc.name,
  2227. subsys_info->subsys_desc.dev);
  2228. }
  2229. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2230. void *ramdump_dev)
  2231. {
  2232. destroy_ramdump_device(ramdump_dev);
  2233. }
  2234. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2235. {
  2236. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2237. struct ramdump_segment segment;
  2238. memset(&segment, 0, sizeof(segment));
  2239. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2240. segment.size = ramdump_info->ramdump_size;
  2241. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2242. }
  2243. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2244. {
  2245. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2246. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2247. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2248. struct ramdump_segment *ramdump_segs, *s;
  2249. struct cnss_dump_meta_info meta_info = {0};
  2250. int i, ret = 0;
  2251. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2252. sizeof(*ramdump_segs),
  2253. GFP_KERNEL);
  2254. if (!ramdump_segs)
  2255. return -ENOMEM;
  2256. s = ramdump_segs + 1;
  2257. for (i = 0; i < dump_data->nentries; i++) {
  2258. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2259. cnss_pr_err("Unsupported dump type: %d",
  2260. dump_seg->type);
  2261. continue;
  2262. }
  2263. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2264. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2265. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2266. }
  2267. meta_info.entry[dump_seg->type].entry_num++;
  2268. s->address = dump_seg->address;
  2269. s->v_address = (void __iomem *)dump_seg->v_address;
  2270. s->size = dump_seg->size;
  2271. s++;
  2272. dump_seg++;
  2273. }
  2274. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2275. meta_info.version = CNSS_RAMDUMP_VERSION;
  2276. meta_info.chipset = plat_priv->device_id;
  2277. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2278. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2279. ramdump_segs->size = sizeof(meta_info);
  2280. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2281. dump_data->nentries + 1);
  2282. kfree(ramdump_segs);
  2283. return ret;
  2284. }
  2285. #else
  2286. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2287. void *data)
  2288. {
  2289. struct cnss_plat_data *plat_priv =
  2290. container_of(nb, struct cnss_plat_data, panic_nb);
  2291. cnss_bus_dev_crash_shutdown(plat_priv);
  2292. return NOTIFY_DONE;
  2293. }
  2294. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2295. {
  2296. int ret;
  2297. if (!plat_priv)
  2298. return -ENODEV;
  2299. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2300. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2301. &plat_priv->panic_nb);
  2302. if (ret) {
  2303. cnss_pr_err("Failed to register panic handler\n");
  2304. return -EINVAL;
  2305. }
  2306. return 0;
  2307. }
  2308. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2309. {
  2310. int ret;
  2311. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2312. &plat_priv->panic_nb);
  2313. if (ret)
  2314. cnss_pr_err("Failed to unregister panic handler\n");
  2315. }
  2316. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2317. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2318. {
  2319. return &plat_priv->plat_dev->dev;
  2320. }
  2321. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2322. void *ramdump_dev)
  2323. {
  2324. }
  2325. #endif
  2326. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2327. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2328. {
  2329. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2330. struct qcom_dump_segment segment;
  2331. struct list_head head;
  2332. INIT_LIST_HEAD(&head);
  2333. memset(&segment, 0, sizeof(segment));
  2334. segment.va = ramdump_info->ramdump_va;
  2335. segment.size = ramdump_info->ramdump_size;
  2336. list_add(&segment.node, &head);
  2337. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2338. }
  2339. #else
  2340. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2341. {
  2342. return 0;
  2343. }
  2344. /* Using completion event inside dynamically allocated ramdump_desc
  2345. * may result a race between freeing the event after setting it to
  2346. * complete inside dev coredump free callback and the thread that is
  2347. * waiting for completion.
  2348. */
  2349. DECLARE_COMPLETION(dump_done);
  2350. #define TIMEOUT_SAVE_DUMP_MS 30000
  2351. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2352. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2353. { \
  2354. if (class == ELFCLASS32) \
  2355. return sizeof(struct elf32_##__xhdr); \
  2356. else \
  2357. return sizeof(struct elf64_##__xhdr); \
  2358. }
  2359. SIZEOF_ELF_STRUCT(phdr)
  2360. SIZEOF_ELF_STRUCT(hdr)
  2361. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2362. do { \
  2363. if (class == ELFCLASS32) \
  2364. ((struct elf32_##__xhdr *)arg)->member = value; \
  2365. else \
  2366. ((struct elf64_##__xhdr *)arg)->member = value; \
  2367. } while (0)
  2368. #define set_ehdr_property(arg, class, member, value) \
  2369. set_xhdr_property(hdr, arg, class, member, value)
  2370. #define set_phdr_property(arg, class, member, value) \
  2371. set_xhdr_property(phdr, arg, class, member, value)
  2372. /* These replace qcom_ramdump driver APIs called from common API
  2373. * cnss_do_elf_dump() by the ones defined here.
  2374. */
  2375. #define qcom_dump_segment cnss_qcom_dump_segment
  2376. #define qcom_elf_dump cnss_qcom_elf_dump
  2377. #define dump_enabled cnss_dump_enabled
  2378. struct cnss_qcom_dump_segment {
  2379. struct list_head node;
  2380. dma_addr_t da;
  2381. void *va;
  2382. size_t size;
  2383. };
  2384. struct cnss_qcom_ramdump_desc {
  2385. void *data;
  2386. struct completion dump_done;
  2387. };
  2388. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2389. void *data, size_t datalen)
  2390. {
  2391. struct cnss_qcom_ramdump_desc *desc = data;
  2392. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2393. datalen);
  2394. }
  2395. static void cnss_qcom_devcd_freev(void *data)
  2396. {
  2397. struct cnss_qcom_ramdump_desc *desc = data;
  2398. cnss_pr_dbg("Free dump data for dev coredump\n");
  2399. complete(&dump_done);
  2400. vfree(desc->data);
  2401. kfree(desc);
  2402. }
  2403. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2404. gfp_t gfp)
  2405. {
  2406. struct cnss_qcom_ramdump_desc *desc;
  2407. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2408. int ret;
  2409. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2410. if (!desc)
  2411. return -ENOMEM;
  2412. desc->data = data;
  2413. reinit_completion(&dump_done);
  2414. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2415. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2416. ret = wait_for_completion_timeout(&dump_done,
  2417. msecs_to_jiffies(timeout));
  2418. if (!ret)
  2419. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2420. timeout);
  2421. return ret ? 0 : -ETIMEDOUT;
  2422. }
  2423. /* Since the elf32 and elf64 identification is identical apart from
  2424. * the class, use elf32 by default.
  2425. */
  2426. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2427. {
  2428. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2429. ehdr->e_ident[EI_CLASS] = class;
  2430. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2431. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2432. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2433. }
  2434. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2435. unsigned char class)
  2436. {
  2437. struct cnss_qcom_dump_segment *segment;
  2438. void *phdr, *ehdr;
  2439. size_t data_size, offset;
  2440. int phnum = 0;
  2441. void *data;
  2442. void __iomem *ptr;
  2443. if (!segs || list_empty(segs))
  2444. return -EINVAL;
  2445. data_size = sizeof_elf_hdr(class);
  2446. list_for_each_entry(segment, segs, node) {
  2447. data_size += sizeof_elf_phdr(class) + segment->size;
  2448. phnum++;
  2449. }
  2450. data = vmalloc(data_size);
  2451. if (!data)
  2452. return -ENOMEM;
  2453. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2454. ehdr = data;
  2455. memset(ehdr, 0, sizeof_elf_hdr(class));
  2456. init_elf_identification(ehdr, class);
  2457. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2458. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2459. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2460. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2461. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2462. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2463. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2464. phdr = data + sizeof_elf_hdr(class);
  2465. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2466. list_for_each_entry(segment, segs, node) {
  2467. memset(phdr, 0, sizeof_elf_phdr(class));
  2468. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2469. set_phdr_property(phdr, class, p_offset, offset);
  2470. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2471. set_phdr_property(phdr, class, p_paddr, segment->da);
  2472. set_phdr_property(phdr, class, p_filesz, segment->size);
  2473. set_phdr_property(phdr, class, p_memsz, segment->size);
  2474. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2475. set_phdr_property(phdr, class, p_align, 0);
  2476. if (segment->va) {
  2477. memcpy(data + offset, segment->va, segment->size);
  2478. } else {
  2479. ptr = devm_ioremap(dev, segment->da, segment->size);
  2480. if (!ptr) {
  2481. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2482. &segment->da, segment->size);
  2483. memset(data + offset, 0xff, segment->size);
  2484. } else {
  2485. memcpy_fromio(data + offset, ptr,
  2486. segment->size);
  2487. }
  2488. }
  2489. offset += segment->size;
  2490. phdr += sizeof_elf_phdr(class);
  2491. }
  2492. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2493. }
  2494. /* Saving dump to file system is always needed in this case. */
  2495. static bool cnss_dump_enabled(void)
  2496. {
  2497. return true;
  2498. }
  2499. #endif /* CONFIG_QCOM_RAMDUMP */
  2500. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2501. {
  2502. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2503. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2504. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2505. struct qcom_dump_segment *seg;
  2506. struct cnss_dump_meta_info meta_info = {0};
  2507. struct list_head head;
  2508. int i, ret = 0;
  2509. if (!dump_enabled()) {
  2510. cnss_pr_info("Dump collection is not enabled\n");
  2511. return ret;
  2512. }
  2513. INIT_LIST_HEAD(&head);
  2514. for (i = 0; i < dump_data->nentries; i++) {
  2515. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2516. cnss_pr_err("Unsupported dump type: %d",
  2517. dump_seg->type);
  2518. continue;
  2519. }
  2520. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2521. if (!seg) {
  2522. cnss_pr_err("%s: Failed to allocate mem for seg %d\n",
  2523. __func__, i);
  2524. continue;
  2525. }
  2526. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2527. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2528. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2529. }
  2530. meta_info.entry[dump_seg->type].entry_num++;
  2531. seg->da = dump_seg->address;
  2532. seg->va = dump_seg->v_address;
  2533. seg->size = dump_seg->size;
  2534. list_add_tail(&seg->node, &head);
  2535. dump_seg++;
  2536. }
  2537. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2538. if (!seg) {
  2539. cnss_pr_err("%s: Failed to allocate mem for elf ramdump seg\n",
  2540. __func__);
  2541. goto skip_elf_dump;
  2542. }
  2543. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2544. meta_info.version = CNSS_RAMDUMP_VERSION;
  2545. meta_info.chipset = plat_priv->device_id;
  2546. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2547. seg->va = &meta_info;
  2548. seg->size = sizeof(meta_info);
  2549. list_add(&seg->node, &head);
  2550. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2551. skip_elf_dump:
  2552. while (!list_empty(&head)) {
  2553. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2554. list_del(&seg->node);
  2555. kfree(seg);
  2556. }
  2557. return ret;
  2558. }
  2559. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2560. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2561. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2562. size_t num_entries_loaded)
  2563. {
  2564. struct qcom_dump_segment *seg;
  2565. struct cnss_host_dump_meta_info meta_info = {0};
  2566. struct list_head head;
  2567. int dev_ret = 0;
  2568. struct device *new_device;
  2569. static const char * const wlan_str[] = {
  2570. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2571. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2572. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2573. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2574. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2575. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2576. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2577. [CNSS_HOST_WMI_HANG_DATA] = "wmi_hang_data",
  2578. [CNSS_HOST_CE_HANG_EVT] = "ce_hang_evt",
  2579. [CNSS_HOST_PEER_MAC_ADDR_HANG_DATA] = "peer_mac_addr_hang_data",
  2580. [CNSS_HOST_CP_VDEV_INFO] = "cp_vdev_info",
  2581. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2582. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2583. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2584. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2585. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2586. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2587. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2588. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx"
  2589. };
  2590. int i, j;
  2591. int ret = 0;
  2592. if (!dump_enabled()) {
  2593. cnss_pr_info("Dump collection is not enabled\n");
  2594. return ret;
  2595. }
  2596. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2597. if (!new_device) {
  2598. cnss_pr_err("Failed to alloc device mem\n");
  2599. return -ENOMEM;
  2600. }
  2601. device_initialize(new_device);
  2602. dev_set_name(new_device, "wlan_driver");
  2603. dev_ret = device_add(new_device);
  2604. if (dev_ret) {
  2605. cnss_pr_err("Failed to add new device\n");
  2606. goto put_device;
  2607. }
  2608. INIT_LIST_HEAD(&head);
  2609. for (i = 0; i < num_entries_loaded; i++) {
  2610. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2611. if (!seg) {
  2612. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2613. continue;
  2614. }
  2615. seg->va = ssr_entry[i].buffer_pointer;
  2616. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2617. seg->size = ssr_entry[i].buffer_size;
  2618. for (j = 0; j < ARRAY_SIZE(wlan_str); j++) {
  2619. if (strncmp(ssr_entry[i].region_name, wlan_str[j],
  2620. strlen(wlan_str[j])) == 0) {
  2621. meta_info.entry[i].type = j;
  2622. }
  2623. }
  2624. meta_info.entry[i].entry_start = i + 1;
  2625. meta_info.entry[i].entry_num++;
  2626. list_add_tail(&seg->node, &head);
  2627. }
  2628. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2629. if (!seg) {
  2630. cnss_pr_err("%s: Failed to allocate mem for host dump seg\n",
  2631. __func__);
  2632. goto skip_host_dump;
  2633. }
  2634. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2635. meta_info.version = CNSS_RAMDUMP_VERSION;
  2636. meta_info.chipset = plat_priv->device_id;
  2637. meta_info.total_entries = num_entries_loaded;
  2638. seg->va = &meta_info;
  2639. seg->da = (dma_addr_t)&meta_info;
  2640. seg->size = sizeof(meta_info);
  2641. list_add(&seg->node, &head);
  2642. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2643. skip_host_dump:
  2644. while (!list_empty(&head)) {
  2645. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2646. list_del(&seg->node);
  2647. kfree(seg);
  2648. }
  2649. device_del(new_device);
  2650. put_device:
  2651. put_device(new_device);
  2652. kfree(new_device);
  2653. return ret;
  2654. }
  2655. #endif
  2656. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2657. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2658. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2659. {
  2660. struct cnss_ramdump_info *ramdump_info;
  2661. struct msm_dump_entry dump_entry;
  2662. ramdump_info = &plat_priv->ramdump_info;
  2663. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2664. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2665. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2666. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2667. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2668. sizeof(ramdump_info->dump_data.name));
  2669. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2670. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2671. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2672. &dump_entry);
  2673. }
  2674. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2675. {
  2676. int ret = 0;
  2677. struct device *dev;
  2678. struct cnss_ramdump_info *ramdump_info;
  2679. u32 ramdump_size = 0;
  2680. dev = &plat_priv->plat_dev->dev;
  2681. ramdump_info = &plat_priv->ramdump_info;
  2682. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2683. /* dt type: legacy or converged */
  2684. ret = of_property_read_u32(dev->of_node,
  2685. "qcom,wlan-ramdump-dynamic",
  2686. &ramdump_size);
  2687. } else {
  2688. ret = of_property_read_u32(plat_priv->dev_node,
  2689. "qcom,wlan-ramdump-dynamic",
  2690. &ramdump_size);
  2691. }
  2692. if (ret == 0) {
  2693. ramdump_info->ramdump_va =
  2694. dma_alloc_coherent(dev, ramdump_size,
  2695. &ramdump_info->ramdump_pa,
  2696. GFP_KERNEL);
  2697. if (ramdump_info->ramdump_va)
  2698. ramdump_info->ramdump_size = ramdump_size;
  2699. }
  2700. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2701. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2702. if (ramdump_info->ramdump_size == 0) {
  2703. cnss_pr_info("Ramdump will not be collected");
  2704. goto out;
  2705. }
  2706. ret = cnss_init_dump_entry(plat_priv);
  2707. if (ret) {
  2708. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2709. goto free_ramdump;
  2710. }
  2711. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2712. if (!ramdump_info->ramdump_dev) {
  2713. cnss_pr_err("Failed to create ramdump device!");
  2714. ret = -ENOMEM;
  2715. goto free_ramdump;
  2716. }
  2717. return 0;
  2718. free_ramdump:
  2719. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2720. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2721. out:
  2722. return ret;
  2723. }
  2724. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2725. {
  2726. struct device *dev;
  2727. struct cnss_ramdump_info *ramdump_info;
  2728. dev = &plat_priv->plat_dev->dev;
  2729. ramdump_info = &plat_priv->ramdump_info;
  2730. if (ramdump_info->ramdump_dev)
  2731. cnss_destroy_ramdump_device(plat_priv,
  2732. ramdump_info->ramdump_dev);
  2733. if (ramdump_info->ramdump_va)
  2734. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2735. ramdump_info->ramdump_va,
  2736. ramdump_info->ramdump_pa);
  2737. }
  2738. /**
  2739. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2740. * @ret: Error returned by msm_dump_data_register_nominidump
  2741. *
  2742. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2743. * ignore failure.
  2744. *
  2745. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2746. */
  2747. static int cnss_ignore_dump_data_reg_fail(int ret)
  2748. {
  2749. return ret;
  2750. }
  2751. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2752. {
  2753. int ret = 0;
  2754. struct cnss_ramdump_info_v2 *info_v2;
  2755. struct cnss_dump_data *dump_data;
  2756. struct msm_dump_entry dump_entry;
  2757. struct device *dev = &plat_priv->plat_dev->dev;
  2758. u32 ramdump_size = 0;
  2759. info_v2 = &plat_priv->ramdump_info_v2;
  2760. dump_data = &info_v2->dump_data;
  2761. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2762. /* dt type: legacy or converged */
  2763. ret = of_property_read_u32(dev->of_node,
  2764. "qcom,wlan-ramdump-dynamic",
  2765. &ramdump_size);
  2766. } else {
  2767. ret = of_property_read_u32(plat_priv->dev_node,
  2768. "qcom,wlan-ramdump-dynamic",
  2769. &ramdump_size);
  2770. }
  2771. if (ret == 0)
  2772. info_v2->ramdump_size = ramdump_size;
  2773. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2774. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2775. if (!info_v2->dump_data_vaddr)
  2776. return -ENOMEM;
  2777. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2778. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2779. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2780. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2781. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2782. sizeof(dump_data->name));
  2783. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2784. dump_entry.addr = virt_to_phys(dump_data);
  2785. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2786. &dump_entry);
  2787. if (ret) {
  2788. ret = cnss_ignore_dump_data_reg_fail(ret);
  2789. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2790. ret ? "Error" : "Ignoring", ret);
  2791. goto free_ramdump;
  2792. }
  2793. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2794. if (!info_v2->ramdump_dev) {
  2795. cnss_pr_err("Failed to create ramdump device!\n");
  2796. ret = -ENOMEM;
  2797. goto free_ramdump;
  2798. }
  2799. return 0;
  2800. free_ramdump:
  2801. kfree(info_v2->dump_data_vaddr);
  2802. info_v2->dump_data_vaddr = NULL;
  2803. return ret;
  2804. }
  2805. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2806. {
  2807. struct cnss_ramdump_info_v2 *info_v2;
  2808. info_v2 = &plat_priv->ramdump_info_v2;
  2809. if (info_v2->ramdump_dev)
  2810. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2811. kfree(info_v2->dump_data_vaddr);
  2812. info_v2->dump_data_vaddr = NULL;
  2813. info_v2->dump_data_valid = false;
  2814. }
  2815. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2816. {
  2817. int ret = 0;
  2818. switch (plat_priv->device_id) {
  2819. case QCA6174_DEVICE_ID:
  2820. ret = cnss_register_ramdump_v1(plat_priv);
  2821. break;
  2822. case QCA6290_DEVICE_ID:
  2823. case QCA6390_DEVICE_ID:
  2824. case QCN7605_DEVICE_ID:
  2825. case QCA6490_DEVICE_ID:
  2826. case KIWI_DEVICE_ID:
  2827. case MANGO_DEVICE_ID:
  2828. case PEACH_DEVICE_ID:
  2829. ret = cnss_register_ramdump_v2(plat_priv);
  2830. break;
  2831. default:
  2832. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2833. ret = -ENODEV;
  2834. break;
  2835. }
  2836. return ret;
  2837. }
  2838. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2839. {
  2840. switch (plat_priv->device_id) {
  2841. case QCA6174_DEVICE_ID:
  2842. cnss_unregister_ramdump_v1(plat_priv);
  2843. break;
  2844. case QCA6290_DEVICE_ID:
  2845. case QCA6390_DEVICE_ID:
  2846. case QCN7605_DEVICE_ID:
  2847. case QCA6490_DEVICE_ID:
  2848. case KIWI_DEVICE_ID:
  2849. case MANGO_DEVICE_ID:
  2850. case PEACH_DEVICE_ID:
  2851. cnss_unregister_ramdump_v2(plat_priv);
  2852. break;
  2853. default:
  2854. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2855. break;
  2856. }
  2857. }
  2858. #else
  2859. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2860. {
  2861. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2862. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2863. struct device *dev = &plat_priv->plat_dev->dev;
  2864. u32 ramdump_size = 0;
  2865. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2866. &ramdump_size) == 0)
  2867. info_v2->ramdump_size = ramdump_size;
  2868. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2869. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2870. if (!info_v2->dump_data_vaddr)
  2871. return -ENOMEM;
  2872. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2873. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2874. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2875. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2876. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2877. sizeof(dump_data->name));
  2878. info_v2->ramdump_dev = dev;
  2879. return 0;
  2880. }
  2881. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2882. {
  2883. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2884. info_v2->ramdump_dev = NULL;
  2885. kfree(info_v2->dump_data_vaddr);
  2886. info_v2->dump_data_vaddr = NULL;
  2887. info_v2->dump_data_valid = false;
  2888. }
  2889. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2890. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2891. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2892. phys_addr_t *pa, unsigned long attrs)
  2893. {
  2894. struct sg_table sgt;
  2895. int ret;
  2896. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2897. if (ret) {
  2898. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2899. va, &dma, size, attrs);
  2900. return -EINVAL;
  2901. }
  2902. *pa = page_to_phys(sg_page(sgt.sgl));
  2903. sg_free_table(&sgt);
  2904. return 0;
  2905. }
  2906. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2907. enum cnss_fw_dump_type type, int seg_no,
  2908. void *va, phys_addr_t pa, size_t size)
  2909. {
  2910. struct md_region md_entry;
  2911. int ret;
  2912. switch (type) {
  2913. case CNSS_FW_IMAGE:
  2914. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2915. seg_no);
  2916. break;
  2917. case CNSS_FW_RDDM:
  2918. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2919. seg_no);
  2920. break;
  2921. case CNSS_FW_REMOTE_HEAP:
  2922. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2923. seg_no);
  2924. break;
  2925. default:
  2926. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2927. return -EINVAL;
  2928. }
  2929. md_entry.phys_addr = pa;
  2930. md_entry.virt_addr = (uintptr_t)va;
  2931. md_entry.size = size;
  2932. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2933. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2934. md_entry.name, va, &pa, size);
  2935. ret = msm_minidump_add_region(&md_entry);
  2936. if (ret < 0)
  2937. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2938. return ret;
  2939. }
  2940. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2941. enum cnss_fw_dump_type type, int seg_no,
  2942. void *va, phys_addr_t pa, size_t size)
  2943. {
  2944. struct md_region md_entry;
  2945. int ret;
  2946. switch (type) {
  2947. case CNSS_FW_IMAGE:
  2948. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2949. seg_no);
  2950. break;
  2951. case CNSS_FW_RDDM:
  2952. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2953. seg_no);
  2954. break;
  2955. case CNSS_FW_REMOTE_HEAP:
  2956. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2957. seg_no);
  2958. break;
  2959. default:
  2960. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2961. return -EINVAL;
  2962. }
  2963. md_entry.phys_addr = pa;
  2964. md_entry.virt_addr = (uintptr_t)va;
  2965. md_entry.size = size;
  2966. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2967. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2968. md_entry.name, va, &pa, size);
  2969. ret = msm_minidump_remove_region(&md_entry);
  2970. if (ret)
  2971. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2972. ret);
  2973. return ret;
  2974. }
  2975. #else
  2976. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2977. phys_addr_t *pa, unsigned long attrs)
  2978. {
  2979. return 0;
  2980. }
  2981. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2982. enum cnss_fw_dump_type type, int seg_no,
  2983. void *va, phys_addr_t pa, size_t size)
  2984. {
  2985. return 0;
  2986. }
  2987. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2988. enum cnss_fw_dump_type type, int seg_no,
  2989. void *va, phys_addr_t pa, size_t size)
  2990. {
  2991. return 0;
  2992. }
  2993. #endif /* CONFIG_QCOM_MINIDUMP */
  2994. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2995. const struct firmware **fw_entry,
  2996. const char *filename)
  2997. {
  2998. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2999. return request_firmware_direct(fw_entry, filename,
  3000. &plat_priv->plat_dev->dev);
  3001. else
  3002. return firmware_request_nowarn(fw_entry, filename,
  3003. &plat_priv->plat_dev->dev);
  3004. }
  3005. #if IS_ENABLED(CONFIG_INTERCONNECT)
  3006. /**
  3007. * cnss_register_bus_scale() - Setup interconnect voting data
  3008. * @plat_priv: Platform data structure
  3009. *
  3010. * For different interconnect path configured in device tree setup voting data
  3011. * for list of bandwidth requirements.
  3012. *
  3013. * Result: 0 for success. -EINVAL if not configured
  3014. */
  3015. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3016. {
  3017. int ret = -EINVAL;
  3018. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  3019. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3020. struct device *dev = &plat_priv->plat_dev->dev;
  3021. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  3022. ret = of_property_read_u32(dev->of_node,
  3023. "qcom,icc-path-count",
  3024. &plat_priv->icc.path_count);
  3025. if (ret) {
  3026. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3027. return 0;
  3028. }
  3029. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3030. "qcom,bus-bw-cfg-count",
  3031. &plat_priv->icc.bus_bw_cfg_count);
  3032. if (ret) {
  3033. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3034. goto cleanup;
  3035. }
  3036. cfg_arr_size = plat_priv->icc.path_count *
  3037. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3038. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3039. if (!cfg_arr) {
  3040. cnss_pr_err("Failed to alloc cfg table mem\n");
  3041. ret = -ENOMEM;
  3042. goto cleanup;
  3043. }
  3044. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3045. "qcom,bus-bw-cfg", cfg_arr,
  3046. cfg_arr_size);
  3047. if (ret) {
  3048. cnss_pr_err("Invalid Bus BW Config Table\n");
  3049. goto cleanup;
  3050. }
  3051. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3052. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3053. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3054. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3055. GFP_KERNEL);
  3056. if (!bus_bw_info) {
  3057. ret = -ENOMEM;
  3058. goto out;
  3059. }
  3060. ret = of_property_read_string_index(dev->of_node,
  3061. "interconnect-names", idx,
  3062. &bus_bw_info->icc_name);
  3063. if (ret)
  3064. goto out;
  3065. bus_bw_info->icc_path =
  3066. of_icc_get(&plat_priv->plat_dev->dev,
  3067. bus_bw_info->icc_name);
  3068. if (IS_ERR(bus_bw_info->icc_path)) {
  3069. ret = PTR_ERR(bus_bw_info->icc_path);
  3070. if (ret != -EPROBE_DEFER) {
  3071. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3072. bus_bw_info->icc_name, ret);
  3073. goto out;
  3074. }
  3075. }
  3076. bus_bw_info->cfg_table =
  3077. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3078. sizeof(*bus_bw_info->cfg_table),
  3079. GFP_KERNEL);
  3080. if (!bus_bw_info->cfg_table) {
  3081. ret = -ENOMEM;
  3082. goto out;
  3083. }
  3084. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3085. bus_bw_info->icc_name);
  3086. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3087. CNSS_ICC_VOTE_MAX);
  3088. i < plat_priv->icc.bus_bw_cfg_count;
  3089. i++, j += 2) {
  3090. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3091. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3092. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3093. i, bus_bw_info->cfg_table[i].avg_bw,
  3094. bus_bw_info->cfg_table[i].peak_bw);
  3095. }
  3096. list_add_tail(&bus_bw_info->list,
  3097. &plat_priv->icc.list_head);
  3098. }
  3099. kfree(cfg_arr);
  3100. return 0;
  3101. out:
  3102. list_for_each_entry_safe(bus_bw_info, tmp,
  3103. &plat_priv->icc.list_head, list) {
  3104. list_del(&bus_bw_info->list);
  3105. }
  3106. cleanup:
  3107. kfree(cfg_arr);
  3108. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3109. return ret;
  3110. }
  3111. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3112. {
  3113. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3114. list_for_each_entry_safe(bus_bw_info, tmp,
  3115. &plat_priv->icc.list_head, list) {
  3116. list_del(&bus_bw_info->list);
  3117. if (bus_bw_info->icc_path)
  3118. icc_put(bus_bw_info->icc_path);
  3119. }
  3120. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3121. }
  3122. #else
  3123. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3124. {
  3125. return 0;
  3126. }
  3127. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3128. #endif /* CONFIG_INTERCONNECT */
  3129. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3130. {
  3131. struct cnss_plat_data *plat_priv = cb_ctx;
  3132. if (!plat_priv) {
  3133. cnss_pr_err("%s: Invalid context\n", __func__);
  3134. return;
  3135. }
  3136. if (status) {
  3137. cnss_pr_info("CNSS Daemon connected\n");
  3138. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3139. complete(&plat_priv->daemon_connected);
  3140. } else {
  3141. cnss_pr_info("CNSS Daemon disconnected\n");
  3142. reinit_completion(&plat_priv->daemon_connected);
  3143. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3144. }
  3145. }
  3146. static ssize_t enable_hds_store(struct device *dev,
  3147. struct device_attribute *attr,
  3148. const char *buf, size_t count)
  3149. {
  3150. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3151. unsigned int enable_hds = 0;
  3152. if (!plat_priv)
  3153. return -ENODEV;
  3154. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3155. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3156. return -EINVAL;
  3157. }
  3158. if (enable_hds)
  3159. plat_priv->hds_enabled = true;
  3160. else
  3161. plat_priv->hds_enabled = false;
  3162. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3163. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3164. return count;
  3165. }
  3166. static ssize_t recovery_show(struct device *dev,
  3167. struct device_attribute *attr,
  3168. char *buf)
  3169. {
  3170. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3171. u32 buf_size = PAGE_SIZE;
  3172. u32 curr_len = 0;
  3173. u32 buf_written = 0;
  3174. if (!plat_priv)
  3175. return -ENODEV;
  3176. buf_written = scnprintf(buf, buf_size,
  3177. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3178. "BIT0 -- wlan fw recovery\n"
  3179. "BIT1 -- wlan pcss recovery\n"
  3180. "---------------------------------\n");
  3181. curr_len += buf_written;
  3182. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3183. "WLAN recovery %s[%d]\n",
  3184. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3185. plat_priv->recovery_enabled);
  3186. curr_len += buf_written;
  3187. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3188. "WLAN PCSS recovery %s[%d]\n",
  3189. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3190. plat_priv->recovery_pcss_enabled);
  3191. curr_len += buf_written;
  3192. /*
  3193. * Now size of curr_len is not over page size for sure,
  3194. * later if new item or none-fixed size item added, need
  3195. * add check to make sure curr_len is not over page size.
  3196. */
  3197. return curr_len;
  3198. }
  3199. static ssize_t time_sync_period_show(struct device *dev,
  3200. struct device_attribute *attr,
  3201. char *buf)
  3202. {
  3203. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3204. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3205. plat_priv->ctrl_params.time_sync_period);
  3206. }
  3207. static ssize_t time_sync_period_store(struct device *dev,
  3208. struct device_attribute *attr,
  3209. const char *buf, size_t count)
  3210. {
  3211. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3212. unsigned int time_sync_period = 0;
  3213. if (!plat_priv)
  3214. return -ENODEV;
  3215. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3216. cnss_pr_err("Invalid time sync sysfs command\n");
  3217. return -EINVAL;
  3218. }
  3219. if (time_sync_period >= CNSS_MIN_TIME_SYNC_PERIOD)
  3220. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3221. return count;
  3222. }
  3223. static ssize_t recovery_store(struct device *dev,
  3224. struct device_attribute *attr,
  3225. const char *buf, size_t count)
  3226. {
  3227. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3228. unsigned int recovery = 0;
  3229. if (!plat_priv)
  3230. return -ENODEV;
  3231. if (sscanf(buf, "%du", &recovery) != 1) {
  3232. cnss_pr_err("Invalid recovery sysfs command\n");
  3233. return -EINVAL;
  3234. }
  3235. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3236. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3237. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3238. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3239. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3240. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3241. cnss_send_subsys_restart_level_msg(plat_priv);
  3242. return count;
  3243. }
  3244. static ssize_t shutdown_store(struct device *dev,
  3245. struct device_attribute *attr,
  3246. const char *buf, size_t count)
  3247. {
  3248. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3249. if (plat_priv) {
  3250. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3251. del_timer(&plat_priv->fw_boot_timer);
  3252. complete_all(&plat_priv->power_up_complete);
  3253. complete_all(&plat_priv->cal_complete);
  3254. }
  3255. cnss_pr_dbg("Received shutdown notification\n");
  3256. return count;
  3257. }
  3258. static ssize_t fs_ready_store(struct device *dev,
  3259. struct device_attribute *attr,
  3260. const char *buf, size_t count)
  3261. {
  3262. int fs_ready = 0;
  3263. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3264. if (sscanf(buf, "%du", &fs_ready) != 1)
  3265. return -EINVAL;
  3266. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3267. fs_ready, count);
  3268. if (!plat_priv) {
  3269. cnss_pr_err("plat_priv is NULL\n");
  3270. return count;
  3271. }
  3272. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3273. cnss_pr_dbg("QMI is bypassed\n");
  3274. return count;
  3275. }
  3276. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3277. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3278. cnss_driver_event_post(plat_priv,
  3279. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3280. 0, NULL);
  3281. }
  3282. return count;
  3283. }
  3284. static ssize_t qdss_trace_start_store(struct device *dev,
  3285. struct device_attribute *attr,
  3286. const char *buf, size_t count)
  3287. {
  3288. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3289. wlfw_qdss_trace_start(plat_priv);
  3290. cnss_pr_dbg("Received QDSS start command\n");
  3291. return count;
  3292. }
  3293. static ssize_t qdss_trace_stop_store(struct device *dev,
  3294. struct device_attribute *attr,
  3295. const char *buf, size_t count)
  3296. {
  3297. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3298. u32 option = 0;
  3299. if (sscanf(buf, "%du", &option) != 1)
  3300. return -EINVAL;
  3301. wlfw_qdss_trace_stop(plat_priv, option);
  3302. cnss_pr_dbg("Received QDSS stop command\n");
  3303. return count;
  3304. }
  3305. static ssize_t qdss_conf_download_store(struct device *dev,
  3306. struct device_attribute *attr,
  3307. const char *buf, size_t count)
  3308. {
  3309. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3310. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3311. cnss_pr_dbg("Received QDSS download config command\n");
  3312. return count;
  3313. }
  3314. static ssize_t hw_trace_override_store(struct device *dev,
  3315. struct device_attribute *attr,
  3316. const char *buf, size_t count)
  3317. {
  3318. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3319. int tmp = 0;
  3320. if (sscanf(buf, "%du", &tmp) != 1)
  3321. return -EINVAL;
  3322. plat_priv->hw_trc_override = tmp;
  3323. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3324. return count;
  3325. }
  3326. static ssize_t charger_mode_store(struct device *dev,
  3327. struct device_attribute *attr,
  3328. const char *buf, size_t count)
  3329. {
  3330. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3331. int tmp = 0;
  3332. if (sscanf(buf, "%du", &tmp) != 1)
  3333. return -EINVAL;
  3334. plat_priv->charger_mode = tmp;
  3335. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3336. return count;
  3337. }
  3338. static DEVICE_ATTR_WO(fs_ready);
  3339. static DEVICE_ATTR_WO(shutdown);
  3340. static DEVICE_ATTR_RW(recovery);
  3341. static DEVICE_ATTR_WO(enable_hds);
  3342. static DEVICE_ATTR_WO(qdss_trace_start);
  3343. static DEVICE_ATTR_WO(qdss_trace_stop);
  3344. static DEVICE_ATTR_WO(qdss_conf_download);
  3345. static DEVICE_ATTR_WO(hw_trace_override);
  3346. static DEVICE_ATTR_WO(charger_mode);
  3347. static DEVICE_ATTR_RW(time_sync_period);
  3348. static struct attribute *cnss_attrs[] = {
  3349. &dev_attr_fs_ready.attr,
  3350. &dev_attr_shutdown.attr,
  3351. &dev_attr_recovery.attr,
  3352. &dev_attr_enable_hds.attr,
  3353. &dev_attr_qdss_trace_start.attr,
  3354. &dev_attr_qdss_trace_stop.attr,
  3355. &dev_attr_qdss_conf_download.attr,
  3356. &dev_attr_hw_trace_override.attr,
  3357. &dev_attr_charger_mode.attr,
  3358. &dev_attr_time_sync_period.attr,
  3359. NULL,
  3360. };
  3361. static struct attribute_group cnss_attr_group = {
  3362. .attrs = cnss_attrs,
  3363. };
  3364. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3365. {
  3366. struct device *dev = &plat_priv->plat_dev->dev;
  3367. int ret;
  3368. char cnss_name[CNSS_FS_NAME_SIZE];
  3369. char shutdown_name[32];
  3370. if (cnss_is_dual_wlan_enabled()) {
  3371. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3372. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3373. snprintf(shutdown_name, sizeof(shutdown_name),
  3374. "shutdown_wlan_%d", plat_priv->plat_idx);
  3375. } else {
  3376. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3377. snprintf(shutdown_name, sizeof(shutdown_name),
  3378. "shutdown_wlan");
  3379. }
  3380. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3381. if (ret) {
  3382. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3383. ret);
  3384. goto out;
  3385. }
  3386. /* This is only for backward compatibility. */
  3387. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3388. if (ret) {
  3389. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3390. ret);
  3391. goto rm_cnss_link;
  3392. }
  3393. return 0;
  3394. rm_cnss_link:
  3395. sysfs_remove_link(kernel_kobj, cnss_name);
  3396. out:
  3397. return ret;
  3398. }
  3399. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3400. {
  3401. char cnss_name[CNSS_FS_NAME_SIZE];
  3402. char shutdown_name[32];
  3403. if (cnss_is_dual_wlan_enabled()) {
  3404. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3405. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3406. snprintf(shutdown_name, sizeof(shutdown_name),
  3407. "shutdown_wlan_%d", plat_priv->plat_idx);
  3408. } else {
  3409. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3410. snprintf(shutdown_name, sizeof(shutdown_name),
  3411. "shutdown_wlan");
  3412. }
  3413. sysfs_remove_link(kernel_kobj, shutdown_name);
  3414. sysfs_remove_link(kernel_kobj, cnss_name);
  3415. }
  3416. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3417. {
  3418. int ret = 0;
  3419. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3420. &cnss_attr_group);
  3421. if (ret) {
  3422. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3423. ret);
  3424. goto out;
  3425. }
  3426. cnss_create_sysfs_link(plat_priv);
  3427. return 0;
  3428. out:
  3429. return ret;
  3430. }
  3431. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3432. {
  3433. cnss_remove_sysfs_link(plat_priv);
  3434. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3435. }
  3436. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3437. {
  3438. spin_lock_init(&plat_priv->event_lock);
  3439. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3440. WQ_UNBOUND, 1);
  3441. if (!plat_priv->event_wq) {
  3442. cnss_pr_err("Failed to create event workqueue!\n");
  3443. return -EFAULT;
  3444. }
  3445. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3446. INIT_LIST_HEAD(&plat_priv->event_list);
  3447. return 0;
  3448. }
  3449. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3450. {
  3451. destroy_workqueue(plat_priv->event_wq);
  3452. }
  3453. static int cnss_reboot_notifier(struct notifier_block *nb,
  3454. unsigned long action,
  3455. void *data)
  3456. {
  3457. struct cnss_plat_data *plat_priv =
  3458. container_of(nb, struct cnss_plat_data, reboot_nb);
  3459. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3460. del_timer(&plat_priv->fw_boot_timer);
  3461. complete_all(&plat_priv->power_up_complete);
  3462. complete_all(&plat_priv->cal_complete);
  3463. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3464. return NOTIFY_DONE;
  3465. }
  3466. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3467. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3468. {
  3469. struct Object client_env;
  3470. struct Object app_object;
  3471. u32 wifi_uid = HW_WIFI_UID;
  3472. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3473. int ret;
  3474. u8 state = 0;
  3475. /* Once this flag is set, secure peripheral feature
  3476. * will not be supported till next reboot
  3477. */
  3478. if (plat_priv->sec_peri_feature_disable)
  3479. return 0;
  3480. /* get rootObj */
  3481. ret = get_client_env_object(&client_env);
  3482. if (ret) {
  3483. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3484. goto end;
  3485. }
  3486. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3487. if (ret) {
  3488. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3489. if (ret == FEATURE_NOT_SUPPORTED) {
  3490. ret = 0; /* Do not Assert */
  3491. plat_priv->sec_peri_feature_disable = true;
  3492. cnss_pr_dbg("Secure HW feature not supported\n");
  3493. }
  3494. goto exit_release_clientenv;
  3495. }
  3496. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3497. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3498. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3499. ObjectCounts_pack(1, 1, 0, 0));
  3500. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3501. if (ret) {
  3502. if (ret == PERIPHERAL_NOT_FOUND) {
  3503. ret = 0; /* Do not Assert */
  3504. plat_priv->sec_peri_feature_disable = true;
  3505. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3506. }
  3507. goto exit_release_app_obj;
  3508. }
  3509. if (state == 1)
  3510. set_bit(CNSS_WLAN_HW_DISABLED,
  3511. &plat_priv->driver_state);
  3512. else
  3513. clear_bit(CNSS_WLAN_HW_DISABLED,
  3514. &plat_priv->driver_state);
  3515. exit_release_app_obj:
  3516. Object_release(app_object);
  3517. exit_release_clientenv:
  3518. Object_release(client_env);
  3519. end:
  3520. if (ret) {
  3521. cnss_pr_err("Unable to get HW disable status\n");
  3522. CNSS_ASSERT(0);
  3523. }
  3524. return ret;
  3525. }
  3526. #else
  3527. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3528. {
  3529. return 0;
  3530. }
  3531. #endif
  3532. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3533. {
  3534. int ret;
  3535. ret = cnss_init_sol_gpio(plat_priv);
  3536. if (ret)
  3537. return ret;
  3538. timer_setup(&plat_priv->fw_boot_timer,
  3539. cnss_bus_fw_boot_timeout_hdlr, 0);
  3540. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3541. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3542. if (ret)
  3543. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3544. ret);
  3545. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3546. if (ret)
  3547. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3548. ret);
  3549. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3550. init_completion(&plat_priv->power_up_complete);
  3551. init_completion(&plat_priv->cal_complete);
  3552. init_completion(&plat_priv->rddm_complete);
  3553. init_completion(&plat_priv->recovery_complete);
  3554. init_completion(&plat_priv->daemon_connected);
  3555. mutex_init(&plat_priv->dev_lock);
  3556. mutex_init(&plat_priv->driver_ops_lock);
  3557. plat_priv->recovery_ws =
  3558. wakeup_source_register(&plat_priv->plat_dev->dev,
  3559. "CNSS_FW_RECOVERY");
  3560. if (!plat_priv->recovery_ws)
  3561. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3562. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3563. cnss_daemon_connection_update_cb,
  3564. plat_priv);
  3565. if (ret)
  3566. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3567. ret);
  3568. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3569. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3570. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3571. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3572. "qcom,rc-ep-short-channel"))
  3573. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  3574. return 0;
  3575. }
  3576. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3577. {
  3578. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3579. plat_priv);
  3580. complete_all(&plat_priv->recovery_complete);
  3581. complete_all(&plat_priv->rddm_complete);
  3582. complete_all(&plat_priv->cal_complete);
  3583. complete_all(&plat_priv->power_up_complete);
  3584. complete_all(&plat_priv->daemon_connected);
  3585. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3586. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3587. del_timer(&plat_priv->fw_boot_timer);
  3588. wakeup_source_unregister(plat_priv->recovery_ws);
  3589. cnss_deinit_sol_gpio(plat_priv);
  3590. kfree(plat_priv->sram_dump);
  3591. kfree(plat_priv->on_chip_pmic_board_ids);
  3592. }
  3593. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3594. {
  3595. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3596. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3597. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3598. "qcom,wlan-cbc-enabled");
  3599. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3600. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3601. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3602. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3603. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3604. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3605. * enabled by default
  3606. */
  3607. plat_priv->adsp_pc_enabled = true;
  3608. }
  3609. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3610. {
  3611. struct device *dev = &plat_priv->plat_dev->dev;
  3612. plat_priv->use_pm_domain =
  3613. of_property_read_bool(dev->of_node, "use-pm-domain");
  3614. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3615. }
  3616. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3617. {
  3618. struct device *dev = &plat_priv->plat_dev->dev;
  3619. plat_priv->set_wlaon_pwr_ctrl =
  3620. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3621. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3622. plat_priv->set_wlaon_pwr_ctrl);
  3623. }
  3624. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3625. {
  3626. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3627. "qcom,converged-dt") ||
  3628. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3629. "qcom,same-dt-multi-dev") ||
  3630. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3631. "qcom,multi-wlan-exchg"));
  3632. }
  3633. static const struct platform_device_id cnss_platform_id_table[] = {
  3634. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3635. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3636. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3637. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3638. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3639. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3640. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  3641. { .name = "qcaconv", .driver_data = 0, },
  3642. { },
  3643. };
  3644. static const struct of_device_id cnss_of_match_table[] = {
  3645. {
  3646. .compatible = "qcom,cnss",
  3647. .data = (void *)&cnss_platform_id_table[0]},
  3648. {
  3649. .compatible = "qcom,cnss-qca6290",
  3650. .data = (void *)&cnss_platform_id_table[1]},
  3651. {
  3652. .compatible = "qcom,cnss-qca6390",
  3653. .data = (void *)&cnss_platform_id_table[2]},
  3654. {
  3655. .compatible = "qcom,cnss-qca6490",
  3656. .data = (void *)&cnss_platform_id_table[3]},
  3657. {
  3658. .compatible = "qcom,cnss-kiwi",
  3659. .data = (void *)&cnss_platform_id_table[4]},
  3660. {
  3661. .compatible = "qcom,cnss-mango",
  3662. .data = (void *)&cnss_platform_id_table[5]},
  3663. {
  3664. .compatible = "qcom,cnss-peach",
  3665. .data = (void *)&cnss_platform_id_table[6]},
  3666. {
  3667. .compatible = "qcom,cnss-qca-converged",
  3668. .data = (void *)&cnss_platform_id_table[7]},
  3669. { },
  3670. };
  3671. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3672. static inline bool
  3673. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3674. {
  3675. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3676. "use-nv-mac");
  3677. }
  3678. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3679. {
  3680. struct device_node *child;
  3681. u32 id, i;
  3682. int id_n, device_identifier_gpio, ret;
  3683. u8 gpio_value;
  3684. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  3685. return 0;
  3686. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3687. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3688. if (ret) {
  3689. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3690. return ret;
  3691. }
  3692. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3693. gpio_value = gpio_get_value(device_identifier_gpio);
  3694. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3695. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3696. child) {
  3697. if (strcmp(child->name, "chip_cfg"))
  3698. continue;
  3699. id_n = of_property_count_u32_elems(child, "supported-ids");
  3700. if (id_n <= 0) {
  3701. cnss_pr_err("Device id is NOT set\n");
  3702. return -EINVAL;
  3703. }
  3704. for (i = 0; i < id_n; i++) {
  3705. ret = of_property_read_u32_index(child,
  3706. "supported-ids",
  3707. i, &id);
  3708. if (ret) {
  3709. cnss_pr_err("Failed to read supported ids\n");
  3710. return -EINVAL;
  3711. }
  3712. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3713. plat_priv->plat_dev->dev.of_node = child;
  3714. plat_priv->device_id = QCA6490_DEVICE_ID;
  3715. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3716. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3717. child->name, i, id);
  3718. return 0;
  3719. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3720. plat_priv->plat_dev->dev.of_node = child;
  3721. plat_priv->device_id = KIWI_DEVICE_ID;
  3722. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3723. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3724. child->name, i, id);
  3725. return 0;
  3726. }
  3727. }
  3728. }
  3729. return -EINVAL;
  3730. }
  3731. static inline u32
  3732. cnss_dt_type(struct cnss_plat_data *plat_priv)
  3733. {
  3734. bool is_converged_dt = of_property_read_bool(
  3735. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  3736. bool is_multi_wlan_xchg;
  3737. if (is_converged_dt)
  3738. return CNSS_DTT_CONVERGED;
  3739. is_multi_wlan_xchg = of_property_read_bool(
  3740. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  3741. if (is_multi_wlan_xchg)
  3742. return CNSS_DTT_MULTIEXCHG;
  3743. return CNSS_DTT_LEGACY;
  3744. }
  3745. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3746. {
  3747. int ret = 0;
  3748. int retry = 0;
  3749. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3750. return 0;
  3751. retry:
  3752. ret = cnss_power_on_device(plat_priv, true);
  3753. if (ret)
  3754. goto end;
  3755. ret = cnss_bus_init(plat_priv);
  3756. if (ret) {
  3757. if ((ret != -EPROBE_DEFER) &&
  3758. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3759. cnss_power_off_device(plat_priv);
  3760. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3761. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3762. goto retry;
  3763. }
  3764. goto power_off;
  3765. }
  3766. return 0;
  3767. power_off:
  3768. cnss_power_off_device(plat_priv);
  3769. end:
  3770. return ret;
  3771. }
  3772. int cnss_wlan_hw_enable(void)
  3773. {
  3774. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3775. int ret = 0;
  3776. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3777. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  3778. goto register_driver;
  3779. ret = cnss_wlan_device_init(plat_priv);
  3780. if (ret) {
  3781. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  3782. CNSS_ASSERT(0);
  3783. return ret;
  3784. }
  3785. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  3786. cnss_driver_event_post(plat_priv,
  3787. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3788. 0, NULL);
  3789. register_driver:
  3790. if (plat_priv->driver_ops)
  3791. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  3792. return ret;
  3793. }
  3794. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  3795. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  3796. {
  3797. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3798. int ret = 0;
  3799. if (!plat_priv)
  3800. return -ENODEV;
  3801. /* If IMS server is connected, return success without QMI send */
  3802. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  3803. cnss_pr_dbg("Ignore host request as IMS server is connected");
  3804. return ret;
  3805. }
  3806. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  3807. return ret;
  3808. }
  3809. EXPORT_SYMBOL(cnss_set_wfc_mode);
  3810. static int cnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  3811. unsigned long *thermal_state)
  3812. {
  3813. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3814. if (!tcdev || !tcdev->devdata) {
  3815. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3816. return -EINVAL;
  3817. }
  3818. cnss_tcdev = tcdev->devdata;
  3819. *thermal_state = cnss_tcdev->max_thermal_state;
  3820. return 0;
  3821. }
  3822. static int cnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  3823. unsigned long *thermal_state)
  3824. {
  3825. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3826. if (!tcdev || !tcdev->devdata) {
  3827. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3828. return -EINVAL;
  3829. }
  3830. cnss_tcdev = tcdev->devdata;
  3831. *thermal_state = cnss_tcdev->curr_thermal_state;
  3832. return 0;
  3833. }
  3834. static int cnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  3835. unsigned long thermal_state)
  3836. {
  3837. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3838. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3839. int ret = 0;
  3840. if (!tcdev || !tcdev->devdata) {
  3841. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3842. return -EINVAL;
  3843. }
  3844. cnss_tcdev = tcdev->devdata;
  3845. if (thermal_state > cnss_tcdev->max_thermal_state)
  3846. return -EINVAL;
  3847. cnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  3848. thermal_state, cnss_tcdev->tcdev_id);
  3849. mutex_lock(&plat_priv->tcdev_lock);
  3850. ret = cnss_bus_set_therm_cdev_state(plat_priv,
  3851. thermal_state,
  3852. cnss_tcdev->tcdev_id);
  3853. if (!ret)
  3854. cnss_tcdev->curr_thermal_state = thermal_state;
  3855. mutex_unlock(&plat_priv->tcdev_lock);
  3856. if (ret) {
  3857. cnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  3858. ret, cnss_tcdev->tcdev_id);
  3859. return ret;
  3860. }
  3861. return 0;
  3862. }
  3863. static struct thermal_cooling_device_ops cnss_cooling_ops = {
  3864. .get_max_state = cnss_tcdev_get_max_state,
  3865. .get_cur_state = cnss_tcdev_get_cur_state,
  3866. .set_cur_state = cnss_tcdev_set_cur_state,
  3867. };
  3868. int cnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  3869. int tcdev_id)
  3870. {
  3871. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  3872. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3873. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  3874. struct device_node *dev_node;
  3875. int ret = 0;
  3876. if (!priv) {
  3877. cnss_pr_err("Platform driver is not initialized!\n");
  3878. return -ENODEV;
  3879. }
  3880. cnss_tcdev = kzalloc(sizeof(*cnss_tcdev), GFP_KERNEL);
  3881. if (!cnss_tcdev) {
  3882. cnss_pr_err("Failed to allocate cnss_tcdev object!\n");
  3883. return -ENOMEM;
  3884. }
  3885. cnss_tcdev->tcdev_id = tcdev_id;
  3886. cnss_tcdev->max_thermal_state = max_state;
  3887. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  3888. "qcom,cnss_cdev%d", tcdev_id);
  3889. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  3890. if (!dev_node) {
  3891. cnss_pr_err("Failed to get cooling device node\n");
  3892. kfree(cnss_tcdev);
  3893. return -EINVAL;
  3894. }
  3895. cnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  3896. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  3897. cnss_tcdev->tcdev = thermal_of_cooling_device_register(dev_node,
  3898. cdev_node_name,
  3899. cnss_tcdev,
  3900. &cnss_cooling_ops);
  3901. if (IS_ERR_OR_NULL(cnss_tcdev->tcdev)) {
  3902. ret = PTR_ERR(cnss_tcdev->tcdev);
  3903. cnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  3904. ret, cnss_tcdev->tcdev_id);
  3905. kfree(cnss_tcdev);
  3906. } else {
  3907. cnss_pr_dbg("Cooling device registered for cdev id %d",
  3908. cnss_tcdev->tcdev_id);
  3909. mutex_lock(&priv->tcdev_lock);
  3910. list_add(&cnss_tcdev->tcdev_list,
  3911. &priv->cnss_tcdev_list);
  3912. mutex_unlock(&priv->tcdev_lock);
  3913. }
  3914. } else {
  3915. cnss_pr_dbg("Cooling device registration not supported");
  3916. kfree(cnss_tcdev);
  3917. ret = -EOPNOTSUPP;
  3918. }
  3919. return ret;
  3920. }
  3921. EXPORT_SYMBOL(cnss_thermal_cdev_register);
  3922. void cnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  3923. {
  3924. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  3925. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3926. if (!priv) {
  3927. cnss_pr_err("Platform driver is not initialized!\n");
  3928. return;
  3929. }
  3930. mutex_lock(&priv->tcdev_lock);
  3931. while (!list_empty(&priv->cnss_tcdev_list)) {
  3932. cnss_tcdev = list_first_entry(&priv->cnss_tcdev_list,
  3933. struct cnss_thermal_cdev,
  3934. tcdev_list);
  3935. thermal_cooling_device_unregister(cnss_tcdev->tcdev);
  3936. list_del(&cnss_tcdev->tcdev_list);
  3937. kfree(cnss_tcdev);
  3938. }
  3939. mutex_unlock(&priv->tcdev_lock);
  3940. }
  3941. EXPORT_SYMBOL(cnss_thermal_cdev_unregister);
  3942. int cnss_get_curr_therm_cdev_state(struct device *dev,
  3943. unsigned long *thermal_state,
  3944. int tcdev_id)
  3945. {
  3946. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  3947. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3948. if (!priv) {
  3949. cnss_pr_err("Platform driver is not initialized!\n");
  3950. return -ENODEV;
  3951. }
  3952. mutex_lock(&priv->tcdev_lock);
  3953. list_for_each_entry(cnss_tcdev, &priv->cnss_tcdev_list, tcdev_list) {
  3954. if (cnss_tcdev->tcdev_id != tcdev_id)
  3955. continue;
  3956. *thermal_state = cnss_tcdev->curr_thermal_state;
  3957. mutex_unlock(&priv->tcdev_lock);
  3958. cnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  3959. cnss_tcdev->curr_thermal_state, tcdev_id);
  3960. return 0;
  3961. }
  3962. mutex_unlock(&priv->tcdev_lock);
  3963. cnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  3964. return -EINVAL;
  3965. }
  3966. EXPORT_SYMBOL(cnss_get_curr_therm_cdev_state);
  3967. static int cnss_probe(struct platform_device *plat_dev)
  3968. {
  3969. int ret = 0;
  3970. struct cnss_plat_data *plat_priv;
  3971. const struct of_device_id *of_id;
  3972. const struct platform_device_id *device_id;
  3973. if (cnss_get_plat_priv(plat_dev)) {
  3974. cnss_pr_err("Driver is already initialized!\n");
  3975. ret = -EEXIST;
  3976. goto out;
  3977. }
  3978. ret = cnss_plat_env_available();
  3979. if (ret)
  3980. goto out;
  3981. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  3982. if (!of_id || !of_id->data) {
  3983. cnss_pr_err("Failed to find of match device!\n");
  3984. ret = -ENODEV;
  3985. goto out;
  3986. }
  3987. device_id = of_id->data;
  3988. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  3989. GFP_KERNEL);
  3990. if (!plat_priv) {
  3991. ret = -ENOMEM;
  3992. goto out;
  3993. }
  3994. plat_priv->plat_dev = plat_dev;
  3995. plat_priv->dev_node = NULL;
  3996. plat_priv->device_id = device_id->driver_data;
  3997. plat_priv->dt_type = cnss_dt_type(plat_priv);
  3998. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  3999. plat_priv->dt_type);
  4000. plat_priv->use_fw_path_with_prefix =
  4001. cnss_use_fw_path_with_prefix(plat_priv);
  4002. ret = cnss_get_dev_cfg_node(plat_priv);
  4003. if (ret) {
  4004. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  4005. goto reset_plat_dev;
  4006. }
  4007. ret = cnss_get_pld_bus_ops_name(plat_priv);
  4008. if (ret)
  4009. cnss_pr_err("Failed to find bus ops name, err = %d\n",
  4010. ret);
  4011. ret = cnss_get_rc_num(plat_priv);
  4012. if (ret)
  4013. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  4014. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  4015. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  4016. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  4017. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  4018. cnss_set_plat_priv(plat_dev, plat_priv);
  4019. cnss_set_device_name(plat_priv);
  4020. platform_set_drvdata(plat_dev, plat_priv);
  4021. INIT_LIST_HEAD(&plat_priv->vreg_list);
  4022. INIT_LIST_HEAD(&plat_priv->clk_list);
  4023. cnss_get_pm_domain_info(plat_priv);
  4024. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  4025. cnss_power_misc_params_init(plat_priv);
  4026. cnss_get_tcs_info(plat_priv);
  4027. cnss_get_cpr_info(plat_priv);
  4028. cnss_aop_mbox_init(plat_priv);
  4029. cnss_init_control_params(plat_priv);
  4030. ret = cnss_get_resources(plat_priv);
  4031. if (ret)
  4032. goto reset_ctx;
  4033. ret = cnss_register_esoc(plat_priv);
  4034. if (ret)
  4035. goto free_res;
  4036. ret = cnss_register_bus_scale(plat_priv);
  4037. if (ret)
  4038. goto unreg_esoc;
  4039. ret = cnss_create_sysfs(plat_priv);
  4040. if (ret)
  4041. goto unreg_bus_scale;
  4042. ret = cnss_event_work_init(plat_priv);
  4043. if (ret)
  4044. goto remove_sysfs;
  4045. ret = cnss_dms_init(plat_priv);
  4046. if (ret)
  4047. goto deinit_event_work;
  4048. ret = cnss_debugfs_create(plat_priv);
  4049. if (ret)
  4050. goto deinit_dms;
  4051. ret = cnss_misc_init(plat_priv);
  4052. if (ret)
  4053. goto destroy_debugfs;
  4054. ret = cnss_wlan_hw_disable_check(plat_priv);
  4055. if (ret)
  4056. goto deinit_misc;
  4057. /* Make sure all platform related init are done before
  4058. * device power on and bus init.
  4059. */
  4060. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  4061. ret = cnss_wlan_device_init(plat_priv);
  4062. if (ret)
  4063. goto deinit_misc;
  4064. } else {
  4065. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  4066. }
  4067. cnss_register_coex_service(plat_priv);
  4068. cnss_register_ims_service(plat_priv);
  4069. mutex_init(&plat_priv->tcdev_lock);
  4070. INIT_LIST_HEAD(&plat_priv->cnss_tcdev_list);
  4071. cnss_pr_info("Platform driver probed successfully.\n");
  4072. return 0;
  4073. deinit_misc:
  4074. cnss_misc_deinit(plat_priv);
  4075. destroy_debugfs:
  4076. cnss_debugfs_destroy(plat_priv);
  4077. deinit_dms:
  4078. cnss_dms_deinit(plat_priv);
  4079. deinit_event_work:
  4080. cnss_event_work_deinit(plat_priv);
  4081. remove_sysfs:
  4082. cnss_remove_sysfs(plat_priv);
  4083. unreg_bus_scale:
  4084. cnss_unregister_bus_scale(plat_priv);
  4085. unreg_esoc:
  4086. cnss_unregister_esoc(plat_priv);
  4087. free_res:
  4088. cnss_put_resources(plat_priv);
  4089. reset_ctx:
  4090. platform_set_drvdata(plat_dev, NULL);
  4091. reset_plat_dev:
  4092. cnss_clear_plat_priv(plat_priv);
  4093. out:
  4094. return ret;
  4095. }
  4096. static int cnss_remove(struct platform_device *plat_dev)
  4097. {
  4098. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  4099. plat_priv->audio_iommu_domain = NULL;
  4100. cnss_genl_exit();
  4101. cnss_unregister_ims_service(plat_priv);
  4102. cnss_unregister_coex_service(plat_priv);
  4103. cnss_bus_deinit(plat_priv);
  4104. cnss_misc_deinit(plat_priv);
  4105. cnss_debugfs_destroy(plat_priv);
  4106. cnss_dms_deinit(plat_priv);
  4107. cnss_qmi_deinit(plat_priv);
  4108. cnss_event_work_deinit(plat_priv);
  4109. cnss_cancel_dms_work();
  4110. cnss_remove_sysfs(plat_priv);
  4111. cnss_unregister_bus_scale(plat_priv);
  4112. cnss_unregister_esoc(plat_priv);
  4113. cnss_put_resources(plat_priv);
  4114. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  4115. mbox_free_channel(plat_priv->mbox_chan);
  4116. platform_set_drvdata(plat_dev, NULL);
  4117. cnss_clear_plat_priv(plat_priv);
  4118. return 0;
  4119. }
  4120. static struct platform_driver cnss_platform_driver = {
  4121. .probe = cnss_probe,
  4122. .remove = cnss_remove,
  4123. .driver = {
  4124. .name = "cnss2",
  4125. .of_match_table = cnss_of_match_table,
  4126. #ifdef CONFIG_CNSS_ASYNC
  4127. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4128. #endif
  4129. },
  4130. };
  4131. static bool cnss_check_compatible_node(void)
  4132. {
  4133. struct device_node *dn = NULL;
  4134. for_each_matching_node(dn, cnss_of_match_table) {
  4135. if (of_device_is_available(dn)) {
  4136. cnss_allow_driver_loading = true;
  4137. return true;
  4138. }
  4139. }
  4140. return false;
  4141. }
  4142. /**
  4143. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  4144. *
  4145. * Valid device tree node means a node with "compatible" property from the
  4146. * device match table and "status" property is not disabled.
  4147. *
  4148. * Return: true if valid device tree node found, false if not found
  4149. */
  4150. static bool cnss_is_valid_dt_node_found(void)
  4151. {
  4152. struct device_node *dn = NULL;
  4153. for_each_matching_node(dn, cnss_of_match_table) {
  4154. if (of_device_is_available(dn))
  4155. break;
  4156. }
  4157. if (dn)
  4158. return true;
  4159. return false;
  4160. }
  4161. static int __init cnss_initialize(void)
  4162. {
  4163. int ret = 0;
  4164. if (!cnss_is_valid_dt_node_found())
  4165. return -ENODEV;
  4166. if (!cnss_check_compatible_node())
  4167. return ret;
  4168. cnss_debug_init();
  4169. ret = platform_driver_register(&cnss_platform_driver);
  4170. if (ret)
  4171. cnss_debug_deinit();
  4172. ret = cnss_genl_init();
  4173. if (ret < 0)
  4174. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4175. return ret;
  4176. }
  4177. static void __exit cnss_exit(void)
  4178. {
  4179. cnss_genl_exit();
  4180. platform_driver_unregister(&cnss_platform_driver);
  4181. cnss_debug_deinit();
  4182. }
  4183. module_init(cnss_initialize);
  4184. module_exit(cnss_exit);
  4185. MODULE_LICENSE("GPL v2");
  4186. MODULE_DESCRIPTION("CNSS2 Platform Driver");