main.c 121 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #include <linux/soc/qcom/slatecom_interface.h>
  47. #include "main.h"
  48. #include "qmi.h"
  49. #include "debug.h"
  50. #include "power.h"
  51. #include "genl.h"
  52. #define MAX_PROP_SIZE 32
  53. #define NUM_LOG_PAGES 10
  54. #define NUM_LOG_LONG_PAGES 4
  55. #define ICNSS_MAGIC 0x5abc5abc
  56. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  57. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  58. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  59. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  60. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  61. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  62. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  63. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  64. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  65. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  66. #define ICNSS_MAX_PROBE_CNT 2
  67. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  68. #define PROBE_TIMEOUT 15000
  69. #define SMP2P_SOC_WAKE_TIMEOUT 500
  70. #ifdef CONFIG_ICNSS2_DEBUG
  71. static unsigned long qmi_timeout = 3000;
  72. module_param(qmi_timeout, ulong, 0600);
  73. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  74. #else
  75. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  76. #endif
  77. #define ICNSS_RECOVERY_TIMEOUT 60000
  78. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  79. #define ICNSS_CAL_TIMEOUT 40000
  80. static struct icnss_priv *penv;
  81. static struct work_struct wpss_loader;
  82. static struct work_struct wpss_ssr_work;
  83. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  84. #define ICNSS_EVENT_PENDING 2989
  85. #define ICNSS_EVENT_SYNC BIT(0)
  86. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  87. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  88. ICNSS_EVENT_SYNC)
  89. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  90. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  91. #define SMP2P_GET_MAX_RETRY 4
  92. #define SMP2P_GET_RETRY_DELAY_MS 500
  93. #define RAMDUMP_NUM_DEVICES 256
  94. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  95. #define WLAN_EN_TEMP_THRESHOLD 5000
  96. #define WLAN_EN_DELAY 500
  97. #define ICNSS_RPROC_LEN 10
  98. static DEFINE_IDA(rd_minor_id);
  99. enum icnss_pdr_cause_index {
  100. ICNSS_FW_CRASH,
  101. ICNSS_ROOT_PD_CRASH,
  102. ICNSS_ROOT_PD_SHUTDOWN,
  103. ICNSS_HOST_ERROR,
  104. };
  105. static const char * const icnss_pdr_cause[] = {
  106. [ICNSS_FW_CRASH] = "FW crash",
  107. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  108. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  109. [ICNSS_HOST_ERROR] = "Host error",
  110. };
  111. static void icnss_set_plat_priv(struct icnss_priv *priv)
  112. {
  113. penv = priv;
  114. }
  115. static struct icnss_priv *icnss_get_plat_priv(void)
  116. {
  117. return penv;
  118. }
  119. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  120. {
  121. if (priv && priv->rproc) {
  122. rproc_shutdown(priv->rproc);
  123. rproc_put(priv->rproc);
  124. priv->rproc = NULL;
  125. }
  126. }
  127. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  128. struct kobj_attribute *attr,
  129. const char *buf, size_t count)
  130. {
  131. struct icnss_priv *priv = icnss_get_plat_priv();
  132. if (!priv)
  133. return count;
  134. icnss_pr_dbg("Received shutdown indication");
  135. atomic_set(&priv->is_shutdown, true);
  136. if (priv->wpss_supported && priv->device_id == ADRASTEA_DEVICE_ID)
  137. icnss_wpss_unload(priv);
  138. return count;
  139. }
  140. static struct kobj_attribute icnss_sysfs_attribute =
  141. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  142. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  143. {
  144. if (atomic_inc_return(&priv->pm_count) != 1)
  145. return;
  146. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  147. atomic_read(&priv->pm_count));
  148. pm_stay_awake(&priv->pdev->dev);
  149. priv->stats.pm_stay_awake++;
  150. }
  151. static void icnss_pm_relax(struct icnss_priv *priv)
  152. {
  153. int r = atomic_dec_return(&priv->pm_count);
  154. WARN_ON(r < 0);
  155. if (r != 0)
  156. return;
  157. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  158. atomic_read(&priv->pm_count));
  159. pm_relax(&priv->pdev->dev);
  160. priv->stats.pm_relax++;
  161. }
  162. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  163. {
  164. switch (type) {
  165. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  166. return "SERVER_ARRIVE";
  167. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  168. return "SERVER_EXIT";
  169. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  170. return "FW_READY";
  171. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  172. return "REGISTER_DRIVER";
  173. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  174. return "UNREGISTER_DRIVER";
  175. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  176. return "PD_SERVICE_DOWN";
  177. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  178. return "FW_EARLY_CRASH_IND";
  179. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  180. return "IDLE_SHUTDOWN";
  181. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  182. return "IDLE_RESTART";
  183. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  184. return "FW_INIT_DONE";
  185. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  186. return "QDSS_TRACE_REQ_MEM";
  187. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  188. return "QDSS_TRACE_SAVE";
  189. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  190. return "QDSS_TRACE_FREE";
  191. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  192. return "M3_DUMP_UPLOAD";
  193. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  194. return "QDSS_TRACE_REQ_DATA";
  195. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  196. return "SUBSYS_RESTART_LEVEL";
  197. case ICNSS_DRIVER_EVENT_MAX:
  198. return "EVENT_MAX";
  199. }
  200. return "UNKNOWN";
  201. };
  202. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  203. {
  204. switch (type) {
  205. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  206. return "SOC_WAKE_REQUEST";
  207. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  208. return "SOC_WAKE_RELEASE";
  209. case ICNSS_SOC_WAKE_EVENT_MAX:
  210. return "SOC_EVENT_MAX";
  211. }
  212. return "UNKNOWN";
  213. };
  214. int icnss_driver_event_post(struct icnss_priv *priv,
  215. enum icnss_driver_event_type type,
  216. u32 flags, void *data)
  217. {
  218. struct icnss_driver_event *event;
  219. unsigned long irq_flags;
  220. int gfp = GFP_KERNEL;
  221. int ret = 0;
  222. if (!priv)
  223. return -ENODEV;
  224. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  225. icnss_driver_event_to_str(type), type, current->comm,
  226. flags, priv->state);
  227. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  228. icnss_pr_err("Invalid Event type: %d, can't post", type);
  229. return -EINVAL;
  230. }
  231. if (in_interrupt() || irqs_disabled())
  232. gfp = GFP_ATOMIC;
  233. event = kzalloc(sizeof(*event), gfp);
  234. if (event == NULL)
  235. return -ENOMEM;
  236. icnss_pm_stay_awake(priv);
  237. event->type = type;
  238. event->data = data;
  239. init_completion(&event->complete);
  240. event->ret = ICNSS_EVENT_PENDING;
  241. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  242. spin_lock_irqsave(&priv->event_lock, irq_flags);
  243. list_add_tail(&event->list, &priv->event_list);
  244. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  245. priv->stats.events[type].posted++;
  246. queue_work(priv->event_wq, &priv->event_work);
  247. if (!(flags & ICNSS_EVENT_SYNC))
  248. goto out;
  249. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  250. wait_for_completion(&event->complete);
  251. else
  252. ret = wait_for_completion_interruptible(&event->complete);
  253. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  254. icnss_driver_event_to_str(type), type, priv->state, ret,
  255. event->ret);
  256. spin_lock_irqsave(&priv->event_lock, irq_flags);
  257. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  258. event->sync = false;
  259. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  260. ret = -EINTR;
  261. goto out;
  262. }
  263. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  264. ret = event->ret;
  265. kfree(event);
  266. out:
  267. icnss_pm_relax(priv);
  268. return ret;
  269. }
  270. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  271. enum icnss_soc_wake_event_type type,
  272. u32 flags, void *data)
  273. {
  274. struct icnss_soc_wake_event *event;
  275. unsigned long irq_flags;
  276. int gfp = GFP_KERNEL;
  277. int ret = 0;
  278. if (!priv)
  279. return -ENODEV;
  280. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  281. icnss_soc_wake_event_to_str(type),
  282. type, current->comm, flags, priv->state);
  283. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  284. icnss_pr_err("Invalid Event type: %d, can't post", type);
  285. return -EINVAL;
  286. }
  287. if (in_interrupt() || irqs_disabled())
  288. gfp = GFP_ATOMIC;
  289. event = kzalloc(sizeof(*event), gfp);
  290. if (!event)
  291. return -ENOMEM;
  292. icnss_pm_stay_awake(priv);
  293. event->type = type;
  294. event->data = data;
  295. init_completion(&event->complete);
  296. event->ret = ICNSS_EVENT_PENDING;
  297. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  298. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  299. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  300. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  301. priv->stats.soc_wake_events[type].posted++;
  302. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  303. if (!(flags & ICNSS_EVENT_SYNC))
  304. goto out;
  305. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  306. wait_for_completion(&event->complete);
  307. else
  308. ret = wait_for_completion_interruptible(&event->complete);
  309. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  310. icnss_soc_wake_event_to_str(type),
  311. type, priv->state, ret, event->ret);
  312. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  313. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  314. event->sync = false;
  315. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  316. ret = -EINTR;
  317. goto out;
  318. }
  319. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  320. ret = event->ret;
  321. kfree(event);
  322. out:
  323. icnss_pm_relax(priv);
  324. return ret;
  325. }
  326. bool icnss_is_fw_ready(void)
  327. {
  328. if (!penv)
  329. return false;
  330. else
  331. return test_bit(ICNSS_FW_READY, &penv->state);
  332. }
  333. EXPORT_SYMBOL(icnss_is_fw_ready);
  334. void icnss_block_shutdown(bool status)
  335. {
  336. if (!penv)
  337. return;
  338. if (status) {
  339. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  340. reinit_completion(&penv->unblock_shutdown);
  341. } else {
  342. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  343. complete(&penv->unblock_shutdown);
  344. }
  345. }
  346. EXPORT_SYMBOL(icnss_block_shutdown);
  347. bool icnss_is_fw_down(void)
  348. {
  349. struct icnss_priv *priv = icnss_get_plat_priv();
  350. if (!priv)
  351. return false;
  352. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  353. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  354. test_bit(ICNSS_REJUVENATE, &priv->state);
  355. }
  356. EXPORT_SYMBOL(icnss_is_fw_down);
  357. unsigned long icnss_get_device_config(void)
  358. {
  359. struct icnss_priv *priv = icnss_get_plat_priv();
  360. if (!priv)
  361. return 0;
  362. return priv->device_config;
  363. }
  364. EXPORT_SYMBOL(icnss_get_device_config);
  365. bool icnss_is_rejuvenate(void)
  366. {
  367. if (!penv)
  368. return false;
  369. else
  370. return test_bit(ICNSS_REJUVENATE, &penv->state);
  371. }
  372. EXPORT_SYMBOL(icnss_is_rejuvenate);
  373. bool icnss_is_pdr(void)
  374. {
  375. if (!penv)
  376. return false;
  377. else
  378. return test_bit(ICNSS_PDR, &penv->state);
  379. }
  380. EXPORT_SYMBOL(icnss_is_pdr);
  381. static int icnss_send_smp2p(struct icnss_priv *priv,
  382. enum icnss_smp2p_msg_id msg_id,
  383. enum smp2p_out_entry smp2p_entry)
  384. {
  385. unsigned int value = 0;
  386. int ret;
  387. if (!priv || IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  388. return -EINVAL;
  389. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  390. if (msg_id == ICNSS_RESET_MSG) {
  391. priv->smp2p_info[smp2p_entry].seq = 0;
  392. ret = qcom_smem_state_update_bits(
  393. priv->smp2p_info[smp2p_entry].smem_state,
  394. ICNSS_SMEM_VALUE_MASK,
  395. 0);
  396. if (ret)
  397. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  398. ret, icnss_smp2p_str[smp2p_entry]);
  399. return ret;
  400. }
  401. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  402. return -ENODEV;
  403. value |= priv->smp2p_info[smp2p_entry].seq++;
  404. value <<= ICNSS_SMEM_SEQ_NO_POS;
  405. value |= msg_id;
  406. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  407. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  408. reinit_completion(&penv->smp2p_soc_wake_wait);
  409. ret = qcom_smem_state_update_bits(
  410. priv->smp2p_info[smp2p_entry].smem_state,
  411. ICNSS_SMEM_VALUE_MASK,
  412. value);
  413. if (ret) {
  414. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  415. icnss_smp2p_str[smp2p_entry]);
  416. } else {
  417. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  418. msg_id == ICNSS_SOC_WAKE_REL) {
  419. if (!wait_for_completion_timeout(
  420. &priv->smp2p_soc_wake_wait,
  421. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  422. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  423. icnss_smp2p_str[smp2p_entry]);
  424. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  425. ICNSS_ASSERT(0);
  426. }
  427. }
  428. }
  429. return ret;
  430. }
  431. bool icnss_is_low_power(void)
  432. {
  433. if (!penv)
  434. return false;
  435. else
  436. return test_bit(ICNSS_LOW_POWER, &penv->state);
  437. }
  438. EXPORT_SYMBOL(icnss_is_low_power);
  439. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  440. {
  441. struct icnss_priv *priv = ctx;
  442. if (priv)
  443. priv->force_err_fatal = true;
  444. icnss_pr_err("Received force error fatal request from FW\n");
  445. return IRQ_HANDLED;
  446. }
  447. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  448. {
  449. struct icnss_priv *priv = ctx;
  450. struct icnss_uevent_fw_down_data fw_down_data = {0};
  451. icnss_pr_err("Received early crash indication from FW\n");
  452. if (priv) {
  453. if (priv->wpss_self_recovery_enabled)
  454. mod_timer(&priv->wpss_ssr_timer,
  455. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  456. set_bit(ICNSS_FW_DOWN, &priv->state);
  457. icnss_ignore_fw_timeout(true);
  458. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  459. clear_bit(ICNSS_FW_READY, &priv->state);
  460. fw_down_data.crashed = true;
  461. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  462. &fw_down_data);
  463. }
  464. }
  465. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  466. 0, NULL);
  467. return IRQ_HANDLED;
  468. }
  469. static void register_fw_error_notifications(struct device *dev)
  470. {
  471. struct icnss_priv *priv = dev_get_drvdata(dev);
  472. struct device_node *dev_node;
  473. int irq = 0, ret = 0;
  474. if (!priv)
  475. return;
  476. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  477. if (!dev_node) {
  478. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  479. return;
  480. }
  481. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  482. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  483. ret = irq = of_irq_get_byname(dev_node,
  484. "qcom,smp2p-force-fatal-error");
  485. if (ret < 0) {
  486. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  487. irq);
  488. return;
  489. }
  490. }
  491. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  492. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  493. "wlanfw-err", priv);
  494. if (ret < 0) {
  495. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  496. irq, ret);
  497. return;
  498. }
  499. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  500. priv->fw_error_fatal_irq = irq;
  501. }
  502. static void register_early_crash_notifications(struct device *dev)
  503. {
  504. struct icnss_priv *priv = dev_get_drvdata(dev);
  505. struct device_node *dev_node;
  506. int irq = 0, ret = 0;
  507. if (!priv)
  508. return;
  509. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  510. if (!dev_node) {
  511. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  512. return;
  513. }
  514. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  515. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  516. ret = irq = of_irq_get_byname(dev_node,
  517. "qcom,smp2p-early-crash-ind");
  518. if (ret < 0) {
  519. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  520. irq);
  521. return;
  522. }
  523. }
  524. ret = devm_request_threaded_irq(dev, irq, NULL,
  525. fw_crash_indication_handler,
  526. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  527. "wlanfw-early-crash-ind", priv);
  528. if (ret < 0) {
  529. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  530. irq, ret);
  531. return;
  532. }
  533. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  534. priv->fw_early_crash_irq = irq;
  535. }
  536. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  537. {
  538. struct thermal_zone_device *thermal_dev;
  539. const char *tsens;
  540. int ret;
  541. ret = of_property_read_string(priv->pdev->dev.of_node,
  542. "tsens",
  543. &tsens);
  544. if (ret)
  545. return ret;
  546. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  547. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  548. if (IS_ERR(thermal_dev)) {
  549. icnss_pr_err("Fail to get thermal zone. ret: %d",
  550. PTR_ERR(thermal_dev));
  551. return PTR_ERR(thermal_dev);
  552. }
  553. ret = thermal_zone_get_temp(thermal_dev, temp);
  554. if (ret)
  555. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  556. return ret;
  557. }
  558. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  559. {
  560. struct icnss_priv *priv = ctx;
  561. if (priv)
  562. complete(&priv->smp2p_soc_wake_wait);
  563. return IRQ_HANDLED;
  564. }
  565. static void register_soc_wake_notif(struct device *dev)
  566. {
  567. struct icnss_priv *priv = dev_get_drvdata(dev);
  568. struct device_node *dev_node;
  569. int irq = 0, ret = 0;
  570. if (!priv)
  571. return;
  572. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  573. if (!dev_node) {
  574. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  575. return;
  576. }
  577. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  578. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  579. ret = irq = of_irq_get_byname(dev_node,
  580. "qcom,smp2p-soc-wake-ack");
  581. if (ret < 0) {
  582. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  583. irq);
  584. return;
  585. }
  586. }
  587. ret = devm_request_threaded_irq(dev, irq, NULL,
  588. fw_soc_wake_ack_handler,
  589. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  590. IRQF_TRIGGER_FALLING,
  591. "wlanfw-soc-wake-ack", priv);
  592. if (ret < 0) {
  593. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  594. irq, ret);
  595. return;
  596. }
  597. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  598. priv->fw_soc_wake_ack_irq = irq;
  599. }
  600. int icnss_call_driver_uevent(struct icnss_priv *priv,
  601. enum icnss_uevent uevent, void *data)
  602. {
  603. struct icnss_uevent_data uevent_data;
  604. if (!priv->ops || !priv->ops->uevent)
  605. return 0;
  606. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  607. priv->state, uevent);
  608. uevent_data.uevent = uevent;
  609. uevent_data.data = data;
  610. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  611. }
  612. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  613. {
  614. int i;
  615. int ret = 0;
  616. ret = icnss_qmi_get_dms_mac(priv);
  617. if (ret == 0 && priv->dms.mac_valid)
  618. goto qmi_send;
  619. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  620. * Thus assert on failure to get MAC from DMS even after retries
  621. */
  622. if (priv->use_nv_mac) {
  623. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  624. if (priv->dms.mac_valid)
  625. break;
  626. ret = icnss_qmi_get_dms_mac(priv);
  627. if (ret != -EAGAIN)
  628. break;
  629. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  630. }
  631. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  632. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  633. ICNSS_ASSERT(0);
  634. return -EINVAL;
  635. }
  636. }
  637. qmi_send:
  638. if (priv->dms.mac_valid)
  639. ret =
  640. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  641. ARRAY_SIZE(priv->dms.mac));
  642. return ret;
  643. }
  644. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  645. enum smp2p_out_entry smp2p_entry)
  646. {
  647. int retry = 0;
  648. int error;
  649. if (priv->smp2p_info[smp2p_entry].smem_state)
  650. return;
  651. retry:
  652. priv->smp2p_info[smp2p_entry].smem_state =
  653. qcom_smem_state_get(&priv->pdev->dev,
  654. icnss_smp2p_str[smp2p_entry],
  655. &priv->smp2p_info[smp2p_entry].smem_bit);
  656. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  657. if (retry++ < SMP2P_GET_MAX_RETRY) {
  658. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  659. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  660. error, icnss_smp2p_str[smp2p_entry]);
  661. msleep(SMP2P_GET_RETRY_DELAY_MS);
  662. goto retry;
  663. }
  664. ICNSS_ASSERT(0);
  665. return;
  666. }
  667. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  668. }
  669. static inline
  670. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  671. {
  672. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  673. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  674. } else {
  675. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  676. }
  677. }
  678. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  679. {
  680. switch (val) {
  681. case WLAN_RF_SLATE:
  682. return WLFW_WLAN_RF_SLATE_V01;
  683. case WLAN_RF_APACHE:
  684. return WLFW_WLAN_RF_APACHE_V01;
  685. default:
  686. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  687. }
  688. }
  689. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  690. void *data)
  691. {
  692. int ret = 0;
  693. int temp = 0;
  694. bool ignore_assert = false;
  695. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  696. if (!priv)
  697. return -ENODEV;
  698. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  699. clear_bit(ICNSS_FW_DOWN, &priv->state);
  700. clear_bit(ICNSS_FW_READY, &priv->state);
  701. icnss_ignore_fw_timeout(false);
  702. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  703. icnss_pr_err("QMI Server already in Connected State\n");
  704. ICNSS_ASSERT(0);
  705. }
  706. ret = icnss_connect_to_fw_server(priv, data);
  707. if (ret)
  708. goto fail;
  709. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  710. if (priv->is_slate_rfa) {
  711. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  712. reinit_completion(&priv->slate_boot_complete);
  713. icnss_pr_dbg("Waiting for slate boot up notification, 0x%lx\n",
  714. priv->state);
  715. wait_for_completion(&priv->slate_boot_complete);
  716. }
  717. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  718. icnss_pr_info("sent wlan boot init command\n");
  719. }
  720. ret = wlfw_ind_register_send_sync_msg(priv);
  721. if (ret < 0) {
  722. if (ret == -EALREADY) {
  723. ret = 0;
  724. goto qmi_registered;
  725. }
  726. ignore_assert = true;
  727. goto fail;
  728. }
  729. if (priv->is_rf_subtype_valid) {
  730. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  731. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  732. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  733. if (ret < 0)
  734. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  735. ret);
  736. } else {
  737. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  738. priv->rf_subtype);
  739. }
  740. }
  741. if (priv->device_id == WCN6750_DEVICE_ID ||
  742. priv->device_id == WCN6450_DEVICE_ID) {
  743. if (!icnss_get_temperature(priv, &temp)) {
  744. icnss_pr_dbg("Temperature: %d\n", temp);
  745. if (temp < WLAN_EN_TEMP_THRESHOLD)
  746. icnss_set_wlan_en_delay(priv);
  747. }
  748. ret = wlfw_host_cap_send_sync(priv);
  749. if (ret < 0)
  750. goto fail;
  751. }
  752. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  753. if (!priv->msa_va) {
  754. icnss_pr_err("Invalid MSA address\n");
  755. ret = -EINVAL;
  756. goto fail;
  757. }
  758. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  759. if (ret < 0) {
  760. ignore_assert = true;
  761. goto fail;
  762. }
  763. ret = wlfw_msa_ready_send_sync_msg(priv);
  764. if (ret < 0) {
  765. ignore_assert = true;
  766. goto fail;
  767. }
  768. }
  769. if (priv->device_id == WCN6450_DEVICE_ID)
  770. icnss_hw_power_off(priv);
  771. ret = wlfw_cap_send_sync_msg(priv);
  772. if (ret < 0) {
  773. ignore_assert = true;
  774. goto fail;
  775. }
  776. ret = icnss_hw_power_on(priv);
  777. if (ret)
  778. goto fail;
  779. if (priv->device_id == WCN6750_DEVICE_ID ||
  780. priv->device_id == WCN6450_DEVICE_ID) {
  781. ret = wlfw_device_info_send_msg(priv);
  782. if (ret < 0) {
  783. ignore_assert = true;
  784. goto device_info_failure;
  785. }
  786. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  787. priv->mem_base_pa,
  788. priv->mem_base_size);
  789. if (!priv->mem_base_va) {
  790. icnss_pr_err("Ioremap failed for bar address\n");
  791. goto device_info_failure;
  792. }
  793. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  794. &priv->mem_base_pa,
  795. priv->mem_base_va);
  796. if (priv->mhi_state_info_pa)
  797. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  798. priv->mhi_state_info_pa,
  799. PAGE_SIZE);
  800. if (!priv->mhi_state_info_va)
  801. icnss_pr_err("Ioremap failed for MHI info address\n");
  802. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  803. &priv->mhi_state_info_pa,
  804. priv->mhi_state_info_va);
  805. }
  806. if (priv->bdf_download_support) {
  807. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  808. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  809. priv->ctrl_params.bdf_type);
  810. if (ret < 0)
  811. goto device_info_failure;
  812. }
  813. if (priv->device_id == WCN6450_DEVICE_ID) {
  814. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  815. if (ret < 0)
  816. icnss_pr_info("Failed to download qdss config file for WCN6450, ret = %d\n",
  817. ret);
  818. }
  819. if (priv->device_id == WCN6750_DEVICE_ID ||
  820. priv->device_id == WCN6450_DEVICE_ID) {
  821. if (!priv->fw_soc_wake_ack_irq)
  822. register_soc_wake_notif(&priv->pdev->dev);
  823. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  824. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  825. }
  826. if (priv->wpss_supported)
  827. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  828. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  829. if (priv->bdf_download_support) {
  830. ret = wlfw_cal_report_req(priv);
  831. if (ret < 0)
  832. goto device_info_failure;
  833. }
  834. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  835. dynamic_feature_mask);
  836. }
  837. if (!priv->fw_error_fatal_irq)
  838. register_fw_error_notifications(&priv->pdev->dev);
  839. if (!priv->fw_early_crash_irq)
  840. register_early_crash_notifications(&priv->pdev->dev);
  841. if (priv->psf_supported)
  842. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  843. return ret;
  844. device_info_failure:
  845. icnss_hw_power_off(priv);
  846. fail:
  847. ICNSS_ASSERT(ignore_assert);
  848. qmi_registered:
  849. return ret;
  850. }
  851. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  852. {
  853. if (!priv)
  854. return -ENODEV;
  855. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  856. icnss_clear_server(priv);
  857. if (priv->psf_supported)
  858. priv->last_updated_voltage = 0;
  859. return 0;
  860. }
  861. static int icnss_call_driver_probe(struct icnss_priv *priv)
  862. {
  863. int ret = 0;
  864. int probe_cnt = 0;
  865. if (!priv->ops || !priv->ops->probe)
  866. return 0;
  867. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  868. return -EINVAL;
  869. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  870. icnss_hw_power_on(priv);
  871. icnss_block_shutdown(true);
  872. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  873. ret = priv->ops->probe(&priv->pdev->dev);
  874. probe_cnt++;
  875. if (ret != -EPROBE_DEFER)
  876. break;
  877. }
  878. if (ret < 0) {
  879. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  880. ret, priv->state, probe_cnt);
  881. icnss_block_shutdown(false);
  882. goto out;
  883. }
  884. icnss_block_shutdown(false);
  885. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  886. return 0;
  887. out:
  888. icnss_hw_power_off(priv);
  889. return ret;
  890. }
  891. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  892. {
  893. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  894. goto out;
  895. if (!priv->ops || !priv->ops->shutdown)
  896. goto out;
  897. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  898. goto out;
  899. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  900. priv->ops->shutdown(&priv->pdev->dev);
  901. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  902. out:
  903. return 0;
  904. }
  905. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  906. {
  907. int ret = 0;
  908. icnss_pm_relax(priv);
  909. icnss_call_driver_shutdown(priv);
  910. clear_bit(ICNSS_PDR, &priv->state);
  911. clear_bit(ICNSS_REJUVENATE, &priv->state);
  912. clear_bit(ICNSS_PD_RESTART, &priv->state);
  913. clear_bit(ICNSS_LOW_POWER, &priv->state);
  914. priv->early_crash_ind = false;
  915. priv->is_ssr = false;
  916. if (!priv->ops || !priv->ops->reinit)
  917. goto out;
  918. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  919. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  920. priv->state);
  921. goto out;
  922. }
  923. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  924. goto call_probe;
  925. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  926. icnss_hw_power_on(priv);
  927. icnss_block_shutdown(true);
  928. ret = priv->ops->reinit(&priv->pdev->dev);
  929. if (ret < 0) {
  930. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  931. ret, priv->state);
  932. if (!priv->allow_recursive_recovery)
  933. ICNSS_ASSERT(false);
  934. icnss_block_shutdown(false);
  935. goto out_power_off;
  936. }
  937. icnss_block_shutdown(false);
  938. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  939. return 0;
  940. call_probe:
  941. return icnss_call_driver_probe(priv);
  942. out_power_off:
  943. icnss_hw_power_off(priv);
  944. out:
  945. return ret;
  946. }
  947. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  948. {
  949. int ret = 0;
  950. if (!priv)
  951. return -ENODEV;
  952. del_timer(&priv->recovery_timer);
  953. set_bit(ICNSS_FW_READY, &priv->state);
  954. clear_bit(ICNSS_MODE_ON, &priv->state);
  955. atomic_set(&priv->soc_wake_ref_count, 0);
  956. if (priv->device_id == WCN6750_DEVICE_ID ||
  957. priv->device_id == WCN6450_DEVICE_ID)
  958. icnss_free_qdss_mem(priv);
  959. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  960. icnss_hw_power_off(priv);
  961. if (!priv->pdev) {
  962. icnss_pr_err("Device is not ready\n");
  963. ret = -ENODEV;
  964. goto out;
  965. }
  966. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state)) {
  967. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  968. icnss_pr_info("sent wlan boot complete command\n");
  969. }
  970. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  971. ret = icnss_pd_restart_complete(priv);
  972. } else {
  973. if (priv->wpss_supported)
  974. icnss_setup_dms_mac(priv);
  975. ret = icnss_call_driver_probe(priv);
  976. }
  977. icnss_vreg_unvote(priv);
  978. out:
  979. return ret;
  980. }
  981. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  982. {
  983. int ret = 0;
  984. if (!priv)
  985. return -ENODEV;
  986. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  987. if (priv->device_id == WCN6750_DEVICE_ID) {
  988. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  989. if (ret < 0)
  990. icnss_pr_info("Failed to download qdss config file for WCN6750, ret = %d\n",
  991. ret);
  992. }
  993. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  994. mod_timer(&priv->recovery_timer,
  995. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  996. ret = wlfw_wlan_mode_send_sync_msg(priv,
  997. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  998. } else {
  999. icnss_driver_event_fw_ready_ind(priv, NULL);
  1000. }
  1001. return ret;
  1002. }
  1003. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  1004. {
  1005. struct platform_device *pdev = priv->pdev;
  1006. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1007. int i, j;
  1008. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1009. if (!qdss_mem[i].va && qdss_mem[i].size) {
  1010. qdss_mem[i].va =
  1011. dma_alloc_coherent(&pdev->dev,
  1012. qdss_mem[i].size,
  1013. &qdss_mem[i].pa,
  1014. GFP_KERNEL);
  1015. if (!qdss_mem[i].va) {
  1016. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1017. qdss_mem[i].size,
  1018. qdss_mem[i].type, i);
  1019. break;
  1020. }
  1021. }
  1022. }
  1023. /* Best-effort allocation for QDSS trace */
  1024. if (i < priv->qdss_mem_seg_len) {
  1025. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1026. qdss_mem[j].type = 0;
  1027. qdss_mem[j].size = 0;
  1028. }
  1029. priv->qdss_mem_seg_len = i;
  1030. }
  1031. return 0;
  1032. }
  1033. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1034. {
  1035. struct platform_device *pdev = priv->pdev;
  1036. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1037. int i;
  1038. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1039. if (qdss_mem[i].va && qdss_mem[i].size) {
  1040. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1041. &qdss_mem[i].pa, qdss_mem[i].size,
  1042. qdss_mem[i].type);
  1043. dma_free_coherent(&pdev->dev,
  1044. qdss_mem[i].size, qdss_mem[i].va,
  1045. qdss_mem[i].pa);
  1046. qdss_mem[i].va = NULL;
  1047. qdss_mem[i].pa = 0;
  1048. qdss_mem[i].size = 0;
  1049. qdss_mem[i].type = 0;
  1050. }
  1051. }
  1052. priv->qdss_mem_seg_len = 0;
  1053. }
  1054. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1055. {
  1056. int ret = 0;
  1057. ret = icnss_alloc_qdss_mem(priv);
  1058. if (ret < 0)
  1059. return ret;
  1060. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1061. }
  1062. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1063. u64 pa, u32 size, int *seg_id)
  1064. {
  1065. int i = 0;
  1066. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1067. u64 offset = 0;
  1068. void *va = NULL;
  1069. u64 local_pa;
  1070. u32 local_size;
  1071. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1072. local_pa = (u64)qdss_mem[i].pa;
  1073. local_size = (u32)qdss_mem[i].size;
  1074. if (pa == local_pa && size <= local_size) {
  1075. va = qdss_mem[i].va;
  1076. break;
  1077. }
  1078. if (pa > local_pa &&
  1079. pa < local_pa + local_size &&
  1080. pa + size <= local_pa + local_size) {
  1081. offset = pa - local_pa;
  1082. va = qdss_mem[i].va + offset;
  1083. break;
  1084. }
  1085. }
  1086. *seg_id = i;
  1087. return va;
  1088. }
  1089. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1090. void *data)
  1091. {
  1092. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1093. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1094. int ret = 0;
  1095. int i;
  1096. void *va = NULL;
  1097. u64 pa;
  1098. u32 size;
  1099. int seg_id = 0;
  1100. if (!priv->qdss_mem_seg_len) {
  1101. icnss_pr_err("Memory for QDSS trace is not available\n");
  1102. return -ENOMEM;
  1103. }
  1104. if (event_data->mem_seg_len == 0) {
  1105. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1106. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1107. ICNSS_GENL_MSG_TYPE_QDSS,
  1108. event_data->file_name,
  1109. qdss_mem[i].size);
  1110. if (ret < 0) {
  1111. icnss_pr_err("Fail to save QDSS data: %d\n",
  1112. ret);
  1113. break;
  1114. }
  1115. }
  1116. } else {
  1117. for (i = 0; i < event_data->mem_seg_len; i++) {
  1118. pa = event_data->mem_seg[i].addr;
  1119. size = event_data->mem_seg[i].size;
  1120. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1121. size, &seg_id);
  1122. if (!va) {
  1123. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1124. &pa);
  1125. ret = -EINVAL;
  1126. break;
  1127. }
  1128. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1129. event_data->file_name, size);
  1130. if (ret < 0) {
  1131. icnss_pr_err("Fail to save QDSS data: %d\n",
  1132. ret);
  1133. break;
  1134. }
  1135. }
  1136. }
  1137. kfree(data);
  1138. return ret;
  1139. }
  1140. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1141. {
  1142. int dec, c = atomic_read(v);
  1143. do {
  1144. dec = c - 1;
  1145. if (unlikely(dec < 1))
  1146. break;
  1147. } while (!atomic_try_cmpxchg(v, &c, dec));
  1148. return dec;
  1149. }
  1150. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1151. void *data)
  1152. {
  1153. int ret = 0;
  1154. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1155. if (!priv)
  1156. return -ENODEV;
  1157. if (!data)
  1158. return -EINVAL;
  1159. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1160. event_data->total_size);
  1161. kfree(data);
  1162. return ret;
  1163. }
  1164. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1165. {
  1166. int ret = 0;
  1167. if (!priv)
  1168. return -ENODEV;
  1169. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1170. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1171. atomic_read(&priv->soc_wake_ref_count));
  1172. return 0;
  1173. }
  1174. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1175. ICNSS_SMP2P_OUT_SOC_WAKE);
  1176. if (!ret)
  1177. atomic_inc(&priv->soc_wake_ref_count);
  1178. return ret;
  1179. }
  1180. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1181. {
  1182. int ret = 0;
  1183. if (!priv)
  1184. return -ENODEV;
  1185. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1186. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1187. priv->soc_wake_ref_count);
  1188. return 0;
  1189. }
  1190. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1191. ICNSS_SMP2P_OUT_SOC_WAKE);
  1192. return ret;
  1193. }
  1194. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1195. void *data)
  1196. {
  1197. int ret = 0;
  1198. int probe_cnt = 0;
  1199. if (priv->ops)
  1200. return -EEXIST;
  1201. priv->ops = data;
  1202. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1203. set_bit(ICNSS_FW_READY, &priv->state);
  1204. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1205. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1206. priv->state);
  1207. return -ENODEV;
  1208. }
  1209. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1210. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1211. priv->state);
  1212. goto out;
  1213. }
  1214. ret = icnss_hw_power_on(priv);
  1215. if (ret)
  1216. goto out;
  1217. icnss_block_shutdown(true);
  1218. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1219. ret = priv->ops->probe(&priv->pdev->dev);
  1220. probe_cnt++;
  1221. if (ret != -EPROBE_DEFER)
  1222. break;
  1223. }
  1224. if (ret) {
  1225. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1226. ret, priv->state, probe_cnt);
  1227. icnss_block_shutdown(false);
  1228. goto power_off;
  1229. }
  1230. icnss_block_shutdown(false);
  1231. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1232. return 0;
  1233. power_off:
  1234. icnss_hw_power_off(priv);
  1235. out:
  1236. return ret;
  1237. }
  1238. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1239. void *data)
  1240. {
  1241. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1242. priv->ops = NULL;
  1243. goto out;
  1244. }
  1245. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1246. icnss_block_shutdown(true);
  1247. if (priv->ops)
  1248. priv->ops->remove(&priv->pdev->dev);
  1249. icnss_block_shutdown(false);
  1250. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1251. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1252. priv->ops = NULL;
  1253. icnss_hw_power_off(priv);
  1254. out:
  1255. return 0;
  1256. }
  1257. static int icnss_fw_crashed(struct icnss_priv *priv,
  1258. struct icnss_event_pd_service_down_data *event_data)
  1259. {
  1260. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1261. set_bit(ICNSS_PD_RESTART, &priv->state);
  1262. clear_bit(ICNSS_FW_READY, &priv->state);
  1263. icnss_pm_stay_awake(priv);
  1264. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1265. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1266. if (event_data && event_data->fw_rejuvenate)
  1267. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1268. return 0;
  1269. }
  1270. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1271. struct icnss_uevent_hang_data *hang_data)
  1272. {
  1273. if (!priv->hang_event_data_va)
  1274. return -EINVAL;
  1275. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1276. priv->hang_event_data_len,
  1277. GFP_ATOMIC);
  1278. if (!priv->hang_event_data)
  1279. return -ENOMEM;
  1280. // Update the hang event params
  1281. hang_data->hang_event_data = priv->hang_event_data;
  1282. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1283. return 0;
  1284. }
  1285. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1286. {
  1287. struct icnss_uevent_hang_data hang_data = {0};
  1288. int ret = 0xFF;
  1289. if (priv->early_crash_ind) {
  1290. ret = icnss_update_hang_event_data(priv, &hang_data);
  1291. if (ret)
  1292. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1293. }
  1294. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1295. &hang_data);
  1296. if (!ret) {
  1297. kfree(priv->hang_event_data);
  1298. priv->hang_event_data = NULL;
  1299. }
  1300. return 0;
  1301. }
  1302. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1303. void *data)
  1304. {
  1305. struct icnss_event_pd_service_down_data *event_data = data;
  1306. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1307. icnss_ignore_fw_timeout(false);
  1308. goto out;
  1309. }
  1310. if (priv->force_err_fatal)
  1311. ICNSS_ASSERT(0);
  1312. if (priv->device_id == WCN6750_DEVICE_ID ||
  1313. priv->device_id == WCN6450_DEVICE_ID) {
  1314. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1315. ICNSS_SMP2P_OUT_SOC_WAKE);
  1316. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1317. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1318. }
  1319. if (priv->wpss_supported)
  1320. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1321. ICNSS_SMP2P_OUT_POWER_SAVE);
  1322. icnss_send_hang_event_data(priv);
  1323. if (priv->early_crash_ind) {
  1324. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1325. event_data->crashed, priv->state);
  1326. goto out;
  1327. }
  1328. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1329. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1330. event_data->crashed, priv->state);
  1331. if (!priv->allow_recursive_recovery)
  1332. ICNSS_ASSERT(0);
  1333. goto out;
  1334. }
  1335. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1336. icnss_fw_crashed(priv, event_data);
  1337. out:
  1338. kfree(data);
  1339. return 0;
  1340. }
  1341. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1342. void *data)
  1343. {
  1344. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1345. icnss_ignore_fw_timeout(false);
  1346. goto out;
  1347. }
  1348. priv->early_crash_ind = true;
  1349. icnss_fw_crashed(priv, NULL);
  1350. out:
  1351. kfree(data);
  1352. return 0;
  1353. }
  1354. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1355. void *data)
  1356. {
  1357. int ret = 0;
  1358. if (!priv->ops || !priv->ops->idle_shutdown)
  1359. return 0;
  1360. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1361. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1362. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1363. ret = -EBUSY;
  1364. } else {
  1365. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1366. priv->state);
  1367. icnss_block_shutdown(true);
  1368. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1369. icnss_block_shutdown(false);
  1370. }
  1371. return ret;
  1372. }
  1373. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1374. void *data)
  1375. {
  1376. int ret = 0;
  1377. if (!priv->ops || !priv->ops->idle_restart)
  1378. return 0;
  1379. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1380. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1381. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1382. ret = -EBUSY;
  1383. } else {
  1384. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1385. priv->state);
  1386. icnss_block_shutdown(true);
  1387. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1388. icnss_block_shutdown(false);
  1389. }
  1390. return ret;
  1391. }
  1392. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1393. {
  1394. icnss_free_qdss_mem(priv);
  1395. return 0;
  1396. }
  1397. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1398. void *data)
  1399. {
  1400. struct icnss_m3_upload_segments_req_data *event_data = data;
  1401. struct qcom_dump_segment segment;
  1402. int i, status = 0, ret = 0;
  1403. struct list_head head;
  1404. if (!dump_enabled()) {
  1405. icnss_pr_info("Dump collection is not enabled\n");
  1406. return ret;
  1407. }
  1408. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1409. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1410. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1411. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1412. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1413. return ret;
  1414. INIT_LIST_HEAD(&head);
  1415. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1416. memset(&segment, 0, sizeof(segment));
  1417. segment.va = devm_ioremap(&priv->pdev->dev,
  1418. event_data->m3_segment[i].addr,
  1419. event_data->m3_segment[i].size);
  1420. if (!segment.va) {
  1421. icnss_pr_err("Failed to ioremap M3 Dump region");
  1422. ret = -ENOMEM;
  1423. goto send_resp;
  1424. }
  1425. segment.size = event_data->m3_segment[i].size;
  1426. list_add(&segment.node, &head);
  1427. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1428. event_data->m3_segment[i].name);
  1429. switch (event_data->m3_segment[i].type) {
  1430. case QMI_M3_SEGMENT_PHYAREG_V01:
  1431. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1432. break;
  1433. case QMI_M3_SEGMENT_PHYDBG_V01:
  1434. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1435. break;
  1436. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1437. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1438. break;
  1439. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1440. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1441. break;
  1442. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1443. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1444. break;
  1445. default:
  1446. icnss_pr_err("Invalid Segment type: %d",
  1447. event_data->m3_segment[i].type);
  1448. }
  1449. if (ret) {
  1450. status = ret;
  1451. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1452. event_data->m3_segment[i].name, ret);
  1453. }
  1454. list_del(&segment.node);
  1455. }
  1456. send_resp:
  1457. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1458. status);
  1459. return ret;
  1460. }
  1461. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1462. {
  1463. int ret = 0;
  1464. struct icnss_subsys_restart_level_data *event_data = data;
  1465. if (!priv)
  1466. return -ENODEV;
  1467. if (!data)
  1468. return -EINVAL;
  1469. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1470. kfree(data);
  1471. return ret;
  1472. }
  1473. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1474. {
  1475. int ret;
  1476. struct icnss_priv *priv = icnss_get_plat_priv();
  1477. rproc_shutdown(priv->rproc);
  1478. ret = rproc_boot(priv->rproc);
  1479. if (ret) {
  1480. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1481. rproc_put(priv->rproc);
  1482. }
  1483. }
  1484. static void icnss_driver_event_work(struct work_struct *work)
  1485. {
  1486. struct icnss_priv *priv =
  1487. container_of(work, struct icnss_priv, event_work);
  1488. struct icnss_driver_event *event;
  1489. unsigned long flags;
  1490. int ret;
  1491. icnss_pm_stay_awake(priv);
  1492. spin_lock_irqsave(&priv->event_lock, flags);
  1493. while (!list_empty(&priv->event_list)) {
  1494. event = list_first_entry(&priv->event_list,
  1495. struct icnss_driver_event, list);
  1496. list_del(&event->list);
  1497. spin_unlock_irqrestore(&priv->event_lock, flags);
  1498. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1499. icnss_driver_event_to_str(event->type),
  1500. event->sync ? "-sync" : "", event->type,
  1501. priv->state);
  1502. switch (event->type) {
  1503. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1504. ret = icnss_driver_event_server_arrive(priv,
  1505. event->data);
  1506. break;
  1507. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1508. ret = icnss_driver_event_server_exit(priv);
  1509. break;
  1510. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1511. ret = icnss_driver_event_fw_ready_ind(priv,
  1512. event->data);
  1513. break;
  1514. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1515. ret = icnss_driver_event_register_driver(priv,
  1516. event->data);
  1517. break;
  1518. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1519. ret = icnss_driver_event_unregister_driver(priv,
  1520. event->data);
  1521. break;
  1522. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1523. ret = icnss_driver_event_pd_service_down(priv,
  1524. event->data);
  1525. break;
  1526. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1527. ret = icnss_driver_event_early_crash_ind(priv,
  1528. event->data);
  1529. break;
  1530. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1531. ret = icnss_driver_event_idle_shutdown(priv,
  1532. event->data);
  1533. break;
  1534. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1535. ret = icnss_driver_event_idle_restart(priv,
  1536. event->data);
  1537. break;
  1538. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1539. ret = icnss_driver_event_fw_init_done(priv,
  1540. event->data);
  1541. break;
  1542. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1543. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1544. break;
  1545. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1546. ret = icnss_qdss_trace_save_hdlr(priv,
  1547. event->data);
  1548. break;
  1549. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1550. ret = icnss_qdss_trace_free_hdlr(priv);
  1551. break;
  1552. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1553. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1554. break;
  1555. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1556. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1557. event->data);
  1558. break;
  1559. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1560. ret = icnss_subsys_restart_level(priv, event->data);
  1561. break;
  1562. default:
  1563. icnss_pr_err("Invalid Event type: %d", event->type);
  1564. kfree(event);
  1565. continue;
  1566. }
  1567. priv->stats.events[event->type].processed++;
  1568. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1569. icnss_driver_event_to_str(event->type),
  1570. event->sync ? "-sync" : "", event->type, ret,
  1571. priv->state);
  1572. spin_lock_irqsave(&priv->event_lock, flags);
  1573. if (event->sync) {
  1574. event->ret = ret;
  1575. complete(&event->complete);
  1576. continue;
  1577. }
  1578. spin_unlock_irqrestore(&priv->event_lock, flags);
  1579. kfree(event);
  1580. spin_lock_irqsave(&priv->event_lock, flags);
  1581. }
  1582. spin_unlock_irqrestore(&priv->event_lock, flags);
  1583. icnss_pm_relax(priv);
  1584. }
  1585. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1586. {
  1587. struct icnss_priv *priv =
  1588. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1589. struct icnss_soc_wake_event *event;
  1590. unsigned long flags;
  1591. int ret;
  1592. icnss_pm_stay_awake(priv);
  1593. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1594. while (!list_empty(&priv->soc_wake_msg_list)) {
  1595. event = list_first_entry(&priv->soc_wake_msg_list,
  1596. struct icnss_soc_wake_event, list);
  1597. list_del(&event->list);
  1598. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1599. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1600. icnss_soc_wake_event_to_str(event->type),
  1601. event->sync ? "-sync" : "", event->type,
  1602. priv->state);
  1603. switch (event->type) {
  1604. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1605. ret = icnss_event_soc_wake_request(priv,
  1606. event->data);
  1607. break;
  1608. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1609. ret = icnss_event_soc_wake_release(priv,
  1610. event->data);
  1611. break;
  1612. default:
  1613. icnss_pr_err("Invalid Event type: %d", event->type);
  1614. kfree(event);
  1615. continue;
  1616. }
  1617. priv->stats.soc_wake_events[event->type].processed++;
  1618. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1619. icnss_soc_wake_event_to_str(event->type),
  1620. event->sync ? "-sync" : "", event->type, ret,
  1621. priv->state);
  1622. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1623. if (event->sync) {
  1624. event->ret = ret;
  1625. complete(&event->complete);
  1626. continue;
  1627. }
  1628. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1629. kfree(event);
  1630. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1631. }
  1632. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1633. icnss_pm_relax(priv);
  1634. }
  1635. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1636. {
  1637. int ret = 0;
  1638. struct qcom_dump_segment segment;
  1639. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1640. struct list_head head;
  1641. if (!dump_enabled()) {
  1642. icnss_pr_info("Dump collection is not enabled\n");
  1643. return ret;
  1644. }
  1645. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1646. return ret;
  1647. INIT_LIST_HEAD(&head);
  1648. memset(&segment, 0, sizeof(segment));
  1649. segment.va = priv->msa_va;
  1650. segment.size = priv->msa_mem_size;
  1651. list_add(&segment.node, &head);
  1652. if (!msa0_dump_dev->dev) {
  1653. icnss_pr_err("Created Dump Device not found\n");
  1654. return 0;
  1655. }
  1656. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1657. if (ret) {
  1658. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1659. return ret;
  1660. }
  1661. list_del(&segment.node);
  1662. return ret;
  1663. }
  1664. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1665. void *data)
  1666. {
  1667. struct qcom_ssr_notify_data *notif = data;
  1668. int ret = 0;
  1669. if (!notif->crashed) {
  1670. if (atomic_read(&priv->is_shutdown)) {
  1671. atomic_set(&priv->is_shutdown, false);
  1672. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1673. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1674. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1675. clear_bit(ICNSS_FW_READY, &priv->state);
  1676. icnss_driver_event_post(priv,
  1677. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1678. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1679. NULL);
  1680. }
  1681. }
  1682. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1683. if (!wait_for_completion_timeout(
  1684. &priv->unblock_shutdown,
  1685. msecs_to_jiffies(PROBE_TIMEOUT)))
  1686. icnss_pr_err("modem block shutdown timeout\n");
  1687. }
  1688. ret = wlfw_send_modem_shutdown_msg(priv);
  1689. if (ret < 0)
  1690. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1691. ret);
  1692. }
  1693. }
  1694. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1695. {
  1696. switch (code) {
  1697. case QCOM_SSR_BEFORE_POWERUP:
  1698. return "BEFORE_POWERUP";
  1699. case QCOM_SSR_AFTER_POWERUP:
  1700. return "AFTER_POWERUP";
  1701. case QCOM_SSR_BEFORE_SHUTDOWN:
  1702. return "BEFORE_SHUTDOWN";
  1703. case QCOM_SSR_AFTER_SHUTDOWN:
  1704. return "AFTER_SHUTDOWN";
  1705. default:
  1706. return "UNKNOWN";
  1707. }
  1708. };
  1709. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1710. unsigned long code,
  1711. void *data)
  1712. {
  1713. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1714. wpss_early_ssr_nb);
  1715. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1716. icnss_qcom_ssr_notify_state_to_str(code), code);
  1717. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1718. set_bit(ICNSS_FW_DOWN, &priv->state);
  1719. icnss_ignore_fw_timeout(true);
  1720. }
  1721. return NOTIFY_DONE;
  1722. }
  1723. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1724. unsigned long code,
  1725. void *data)
  1726. {
  1727. struct icnss_event_pd_service_down_data *event_data;
  1728. struct qcom_ssr_notify_data *notif = data;
  1729. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1730. wpss_ssr_nb);
  1731. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1732. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1733. icnss_qcom_ssr_notify_state_to_str(code), code);
  1734. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1735. icnss_pr_info("Collecting msa0 segment dump\n");
  1736. icnss_msa0_ramdump(priv);
  1737. goto out;
  1738. }
  1739. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1740. goto out;
  1741. if (priv->wpss_self_recovery_enabled)
  1742. del_timer(&priv->wpss_ssr_timer);
  1743. priv->is_ssr = true;
  1744. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1745. priv->state, notif->crashed);
  1746. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1747. icnss_update_state_send_modem_shutdown(priv, data);
  1748. set_bit(ICNSS_FW_DOWN, &priv->state);
  1749. icnss_ignore_fw_timeout(true);
  1750. if (notif->crashed)
  1751. priv->stats.recovery.root_pd_crash++;
  1752. else
  1753. priv->stats.recovery.root_pd_shutdown++;
  1754. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1755. if (event_data == NULL)
  1756. return notifier_from_errno(-ENOMEM);
  1757. event_data->crashed = notif->crashed;
  1758. fw_down_data.crashed = !!notif->crashed;
  1759. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1760. clear_bit(ICNSS_FW_READY, &priv->state);
  1761. fw_down_data.crashed = !!notif->crashed;
  1762. icnss_call_driver_uevent(priv,
  1763. ICNSS_UEVENT_FW_DOWN,
  1764. &fw_down_data);
  1765. }
  1766. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1767. ICNSS_EVENT_SYNC, event_data);
  1768. if (notif->crashed)
  1769. mod_timer(&priv->recovery_timer,
  1770. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1771. out:
  1772. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1773. return NOTIFY_OK;
  1774. }
  1775. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1776. unsigned long code,
  1777. void *data)
  1778. {
  1779. struct icnss_event_pd_service_down_data *event_data;
  1780. struct qcom_ssr_notify_data *notif = data;
  1781. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1782. modem_ssr_nb);
  1783. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1784. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1785. icnss_qcom_ssr_notify_state_to_str(code), code);
  1786. switch (code) {
  1787. case QCOM_SSR_BEFORE_SHUTDOWN:
  1788. if (!notif->crashed &&
  1789. priv->low_power_support) { /* Hibernate */
  1790. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1791. icnss_driver_event_post(
  1792. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1793. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1794. set_bit(ICNSS_LOW_POWER, &priv->state);
  1795. }
  1796. break;
  1797. case QCOM_SSR_AFTER_SHUTDOWN:
  1798. /* Collect ramdump only when there was a crash. */
  1799. if (notif->crashed) {
  1800. icnss_pr_info("Collecting msa0 segment dump\n");
  1801. icnss_msa0_ramdump(priv);
  1802. }
  1803. goto out;
  1804. default:
  1805. goto out;
  1806. }
  1807. priv->is_ssr = true;
  1808. if (notif->crashed) {
  1809. priv->stats.recovery.root_pd_crash++;
  1810. priv->root_pd_shutdown = false;
  1811. } else {
  1812. priv->stats.recovery.root_pd_shutdown++;
  1813. priv->root_pd_shutdown = true;
  1814. }
  1815. icnss_update_state_send_modem_shutdown(priv, data);
  1816. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1817. set_bit(ICNSS_FW_DOWN, &priv->state);
  1818. icnss_ignore_fw_timeout(true);
  1819. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1820. clear_bit(ICNSS_FW_READY, &priv->state);
  1821. fw_down_data.crashed = !!notif->crashed;
  1822. icnss_call_driver_uevent(priv,
  1823. ICNSS_UEVENT_FW_DOWN,
  1824. &fw_down_data);
  1825. }
  1826. goto out;
  1827. }
  1828. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1829. priv->state, notif->crashed);
  1830. set_bit(ICNSS_FW_DOWN, &priv->state);
  1831. icnss_ignore_fw_timeout(true);
  1832. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1833. if (event_data == NULL)
  1834. return notifier_from_errno(-ENOMEM);
  1835. event_data->crashed = notif->crashed;
  1836. fw_down_data.crashed = !!notif->crashed;
  1837. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1838. clear_bit(ICNSS_FW_READY, &priv->state);
  1839. fw_down_data.crashed = !!notif->crashed;
  1840. icnss_call_driver_uevent(priv,
  1841. ICNSS_UEVENT_FW_DOWN,
  1842. &fw_down_data);
  1843. }
  1844. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1845. ICNSS_EVENT_SYNC, event_data);
  1846. if (notif->crashed)
  1847. mod_timer(&priv->recovery_timer,
  1848. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1849. out:
  1850. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1851. return NOTIFY_OK;
  1852. }
  1853. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1854. {
  1855. int ret = 0;
  1856. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1857. priv->wpss_early_notify_handler =
  1858. qcom_register_early_ssr_notifier("wpss",
  1859. &priv->wpss_early_ssr_nb);
  1860. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1861. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1862. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1863. }
  1864. return ret;
  1865. }
  1866. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1867. {
  1868. int ret = 0;
  1869. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1870. /*
  1871. * Assign priority of icnss wpss notifier callback over IPA
  1872. * modem notifier callback which is 0
  1873. */
  1874. priv->wpss_ssr_nb.priority = 1;
  1875. priv->wpss_notify_handler =
  1876. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1877. if (IS_ERR(priv->wpss_notify_handler)) {
  1878. ret = PTR_ERR(priv->wpss_notify_handler);
  1879. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1880. }
  1881. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1882. return ret;
  1883. }
  1884. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1885. unsigned long code,
  1886. void *data)
  1887. {
  1888. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1889. slate_ssr_nb);
  1890. int ret = 0;
  1891. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1892. if (code == QCOM_SSR_AFTER_POWERUP) {
  1893. set_bit(ICNSS_SLATE_UP, &priv->state);
  1894. complete(&priv->slate_boot_complete);
  1895. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1896. priv->state);
  1897. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1898. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1899. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1900. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1901. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1902. priv->state);
  1903. goto skip_pdr;
  1904. }
  1905. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1906. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1907. if (ret < 0) {
  1908. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1909. ret, priv->state);
  1910. goto skip_pdr;
  1911. }
  1912. }
  1913. skip_pdr:
  1914. return NOTIFY_OK;
  1915. }
  1916. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  1917. {
  1918. int ret = 0;
  1919. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  1920. priv->slate_notify_handler =
  1921. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  1922. if (IS_ERR(priv->slate_notify_handler)) {
  1923. ret = PTR_ERR(priv->slate_notify_handler);
  1924. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  1925. }
  1926. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  1927. return ret;
  1928. }
  1929. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  1930. {
  1931. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  1932. return 0;
  1933. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  1934. &priv->slate_ssr_nb);
  1935. priv->slate_notify_handler = NULL;
  1936. return 0;
  1937. }
  1938. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1939. {
  1940. int ret = 0;
  1941. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1942. /*
  1943. * Assign priority of icnss modem notifier callback over IPA
  1944. * modem notifier callback which is 0
  1945. */
  1946. priv->modem_ssr_nb.priority = 1;
  1947. priv->modem_notify_handler =
  1948. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  1949. if (IS_ERR(priv->modem_notify_handler)) {
  1950. ret = PTR_ERR(priv->modem_notify_handler);
  1951. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1952. }
  1953. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1954. return ret;
  1955. }
  1956. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1957. {
  1958. if (IS_ERR(priv->wpss_early_notify_handler))
  1959. return;
  1960. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1961. &priv->wpss_early_ssr_nb);
  1962. priv->wpss_early_notify_handler = NULL;
  1963. }
  1964. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1965. {
  1966. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1967. return 0;
  1968. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1969. &priv->wpss_ssr_nb);
  1970. priv->wpss_notify_handler = NULL;
  1971. return 0;
  1972. }
  1973. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1974. {
  1975. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1976. return 0;
  1977. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1978. &priv->modem_ssr_nb);
  1979. priv->modem_notify_handler = NULL;
  1980. return 0;
  1981. }
  1982. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1983. {
  1984. struct icnss_priv *priv = priv_cb;
  1985. struct icnss_event_pd_service_down_data *event_data;
  1986. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1987. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1988. if (!priv)
  1989. return;
  1990. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1991. state, priv->state);
  1992. switch (state) {
  1993. case SERVREG_SERVICE_STATE_DOWN:
  1994. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1995. if (!event_data)
  1996. return;
  1997. event_data->crashed = true;
  1998. if (!priv->is_ssr) {
  1999. set_bit(ICNSS_PDR, &penv->state);
  2000. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  2001. cause = ICNSS_HOST_ERROR;
  2002. priv->stats.recovery.pdr_host_error++;
  2003. } else {
  2004. cause = ICNSS_FW_CRASH;
  2005. priv->stats.recovery.pdr_fw_crash++;
  2006. }
  2007. } else if (priv->root_pd_shutdown) {
  2008. cause = ICNSS_ROOT_PD_SHUTDOWN;
  2009. event_data->crashed = false;
  2010. }
  2011. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2012. priv->state, icnss_pdr_cause[cause]);
  2013. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2014. set_bit(ICNSS_FW_DOWN, &priv->state);
  2015. icnss_ignore_fw_timeout(true);
  2016. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2017. clear_bit(ICNSS_FW_READY, &priv->state);
  2018. fw_down_data.crashed = event_data->crashed;
  2019. icnss_call_driver_uevent(priv,
  2020. ICNSS_UEVENT_FW_DOWN,
  2021. &fw_down_data);
  2022. }
  2023. }
  2024. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2025. if (event_data->crashed)
  2026. mod_timer(&priv->recovery_timer,
  2027. jiffies +
  2028. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2029. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2030. ICNSS_EVENT_SYNC, event_data);
  2031. break;
  2032. case SERVREG_SERVICE_STATE_UP:
  2033. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2034. break;
  2035. default:
  2036. break;
  2037. }
  2038. return;
  2039. }
  2040. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2041. {
  2042. struct pdr_handle *handle = NULL;
  2043. struct pdr_service *service = NULL;
  2044. int err = 0;
  2045. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2046. if (IS_ERR_OR_NULL(handle)) {
  2047. err = PTR_ERR(handle);
  2048. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2049. goto out;
  2050. }
  2051. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2052. if (IS_ERR_OR_NULL(service)) {
  2053. err = PTR_ERR(service);
  2054. icnss_pr_err("Failed to add lookup, err %d", err);
  2055. goto out;
  2056. }
  2057. priv->pdr_handle = handle;
  2058. priv->pdr_service = service;
  2059. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2060. icnss_pr_info("PDR registration happened");
  2061. out:
  2062. return err;
  2063. }
  2064. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2065. {
  2066. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2067. return;
  2068. pdr_handle_release(priv->pdr_handle);
  2069. }
  2070. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2071. {
  2072. int ret = 0;
  2073. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2074. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2075. ret = PTR_ERR(priv->icnss_ramdump_class);
  2076. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2077. return ret;
  2078. }
  2079. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2080. ICNSS_RAMDUMP_NAME);
  2081. if (ret < 0) {
  2082. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2083. goto fail_alloc_major;
  2084. }
  2085. return 0;
  2086. fail_alloc_major:
  2087. class_destroy(priv->icnss_ramdump_class);
  2088. return ret;
  2089. }
  2090. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2091. {
  2092. int ret = 0;
  2093. struct icnss_ramdump_info *ramdump_info;
  2094. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2095. if (!ramdump_info)
  2096. return ERR_PTR(-ENOMEM);
  2097. if (!dev_name) {
  2098. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2099. return NULL;
  2100. }
  2101. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2102. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2103. if (ramdump_info->minor < 0) {
  2104. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2105. ramdump_info->minor);
  2106. ret = -ENODEV;
  2107. goto fail_out_of_minors;
  2108. }
  2109. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2110. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2111. ramdump_info->minor),
  2112. ramdump_info, ramdump_info->name);
  2113. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2114. ret = PTR_ERR(ramdump_info->dev);
  2115. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2116. ramdump_info->name, ret);
  2117. goto fail_device_create;
  2118. }
  2119. return (void *)ramdump_info;
  2120. fail_device_create:
  2121. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2122. fail_out_of_minors:
  2123. kfree(ramdump_info);
  2124. return ERR_PTR(ret);
  2125. }
  2126. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2127. {
  2128. int ret = 0;
  2129. if (!priv || !priv->pdev) {
  2130. icnss_pr_err("Platform priv or pdev is NULL\n");
  2131. return -EINVAL;
  2132. }
  2133. ret = icnss_ramdump_devnode_init(priv);
  2134. if (ret)
  2135. return ret;
  2136. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2137. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2138. icnss_pr_err("Failed to create msa0 dump device!");
  2139. return -ENOMEM;
  2140. }
  2141. if (priv->device_id == WCN6750_DEVICE_ID ||
  2142. priv->device_id == WCN6450_DEVICE_ID) {
  2143. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2144. ICNSS_M3_SEGMENT(
  2145. ICNSS_M3_SEGMENT_PHYAREG));
  2146. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2147. !priv->m3_dump_phyareg->dev) {
  2148. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2149. return -ENOMEM;
  2150. }
  2151. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2152. ICNSS_M3_SEGMENT(
  2153. ICNSS_M3_SEGMENT_PHYA));
  2154. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2155. !priv->m3_dump_phydbg->dev) {
  2156. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2157. return -ENOMEM;
  2158. }
  2159. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2160. ICNSS_M3_SEGMENT(
  2161. ICNSS_M3_SEGMENT_WMACREG));
  2162. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2163. !priv->m3_dump_wmac0reg->dev) {
  2164. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2165. return -ENOMEM;
  2166. }
  2167. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2168. ICNSS_M3_SEGMENT(
  2169. ICNSS_M3_SEGMENT_WCSSDBG));
  2170. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2171. !priv->m3_dump_wcssdbg->dev) {
  2172. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2173. return -ENOMEM;
  2174. }
  2175. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2176. ICNSS_M3_SEGMENT(
  2177. ICNSS_M3_SEGMENT_PHYAM3));
  2178. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2179. !priv->m3_dump_phyapdmem->dev) {
  2180. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2181. return -ENOMEM;
  2182. }
  2183. }
  2184. return 0;
  2185. }
  2186. static int icnss_enable_recovery(struct icnss_priv *priv)
  2187. {
  2188. int ret;
  2189. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2190. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2191. return 0;
  2192. }
  2193. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2194. icnss_pr_dbg("SSR disabled through module parameter\n");
  2195. goto enable_pdr;
  2196. }
  2197. ret = icnss_register_ramdump_devices(priv);
  2198. if (ret)
  2199. return ret;
  2200. if (priv->wpss_supported) {
  2201. icnss_wpss_early_ssr_register_notifier(priv);
  2202. icnss_wpss_ssr_register_notifier(priv);
  2203. return 0;
  2204. }
  2205. icnss_modem_ssr_register_notifier(priv);
  2206. if (priv->is_slate_rfa)
  2207. icnss_slate_ssr_register_notifier(priv);
  2208. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2209. icnss_pr_dbg("PDR disabled through module parameter\n");
  2210. return 0;
  2211. }
  2212. enable_pdr:
  2213. ret = icnss_pd_restart_enable(priv);
  2214. if (ret)
  2215. return ret;
  2216. return 0;
  2217. }
  2218. static int icnss_dev_id_match(struct icnss_priv *priv,
  2219. struct device_info *dev_info)
  2220. {
  2221. while (dev_info->device_id) {
  2222. if (priv->device_id == dev_info->device_id)
  2223. return 1;
  2224. dev_info++;
  2225. }
  2226. return 0;
  2227. }
  2228. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2229. unsigned long *thermal_state)
  2230. {
  2231. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2232. *thermal_state = icnss_tcdev->max_thermal_state;
  2233. return 0;
  2234. }
  2235. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2236. unsigned long *thermal_state)
  2237. {
  2238. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2239. *thermal_state = icnss_tcdev->curr_thermal_state;
  2240. return 0;
  2241. }
  2242. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2243. unsigned long thermal_state)
  2244. {
  2245. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2246. struct device *dev = &penv->pdev->dev;
  2247. int ret = 0;
  2248. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2249. return 0;
  2250. if (thermal_state > icnss_tcdev->max_thermal_state)
  2251. return -EINVAL;
  2252. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2253. thermal_state, icnss_tcdev->tcdev_id);
  2254. mutex_lock(&penv->tcdev_lock);
  2255. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2256. icnss_tcdev->tcdev_id);
  2257. if (!ret)
  2258. icnss_tcdev->curr_thermal_state = thermal_state;
  2259. mutex_unlock(&penv->tcdev_lock);
  2260. if (ret) {
  2261. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2262. ret, icnss_tcdev->tcdev_id);
  2263. return ret;
  2264. }
  2265. return 0;
  2266. }
  2267. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2268. .get_max_state = icnss_tcdev_get_max_state,
  2269. .get_cur_state = icnss_tcdev_get_cur_state,
  2270. .set_cur_state = icnss_tcdev_set_cur_state,
  2271. };
  2272. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2273. int tcdev_id)
  2274. {
  2275. struct icnss_priv *priv = dev_get_drvdata(dev);
  2276. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2277. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2278. struct device_node *dev_node;
  2279. int ret = 0;
  2280. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2281. if (!icnss_tcdev)
  2282. return -ENOMEM;
  2283. icnss_tcdev->tcdev_id = tcdev_id;
  2284. icnss_tcdev->max_thermal_state = max_state;
  2285. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2286. "qcom,icnss_cdev%d", tcdev_id);
  2287. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2288. if (!dev_node) {
  2289. icnss_pr_err("Failed to get cooling device node\n");
  2290. return -EINVAL;
  2291. }
  2292. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2293. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2294. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2295. dev_node,
  2296. cdev_node_name, icnss_tcdev,
  2297. &icnss_cooling_ops);
  2298. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2299. ret = PTR_ERR(icnss_tcdev->tcdev);
  2300. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2301. ret, icnss_tcdev->tcdev_id);
  2302. } else {
  2303. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2304. icnss_tcdev->tcdev_id);
  2305. list_add(&icnss_tcdev->tcdev_list,
  2306. &priv->icnss_tcdev_list);
  2307. }
  2308. } else {
  2309. icnss_pr_dbg("Cooling device registration not supported");
  2310. ret = -EOPNOTSUPP;
  2311. }
  2312. return ret;
  2313. }
  2314. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2315. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2316. {
  2317. struct icnss_priv *priv = dev_get_drvdata(dev);
  2318. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2319. while (!list_empty(&priv->icnss_tcdev_list)) {
  2320. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2321. struct icnss_thermal_cdev,
  2322. tcdev_list);
  2323. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2324. list_del(&icnss_tcdev->tcdev_list);
  2325. kfree(icnss_tcdev);
  2326. }
  2327. }
  2328. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2329. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2330. unsigned long *thermal_state,
  2331. int tcdev_id)
  2332. {
  2333. struct icnss_priv *priv = dev_get_drvdata(dev);
  2334. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2335. mutex_lock(&priv->tcdev_lock);
  2336. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2337. if (icnss_tcdev->tcdev_id != tcdev_id)
  2338. continue;
  2339. *thermal_state = icnss_tcdev->curr_thermal_state;
  2340. mutex_unlock(&priv->tcdev_lock);
  2341. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2342. icnss_tcdev->curr_thermal_state, tcdev_id);
  2343. return 0;
  2344. }
  2345. mutex_unlock(&priv->tcdev_lock);
  2346. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2347. return -EINVAL;
  2348. }
  2349. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2350. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2351. int cmd_len, void *cb_ctx,
  2352. int (*cb)(void *ctx, void *event, int event_len))
  2353. {
  2354. struct icnss_priv *priv = icnss_get_plat_priv();
  2355. int ret;
  2356. if (!priv)
  2357. return -ENODEV;
  2358. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2359. return -EINVAL;
  2360. priv->get_info_cb = cb;
  2361. priv->get_info_cb_ctx = cb_ctx;
  2362. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2363. if (ret) {
  2364. priv->get_info_cb = NULL;
  2365. priv->get_info_cb_ctx = NULL;
  2366. }
  2367. return ret;
  2368. }
  2369. EXPORT_SYMBOL(icnss_qmi_send);
  2370. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2371. struct module *owner, const char *mod_name)
  2372. {
  2373. int ret = 0;
  2374. struct icnss_priv *priv = icnss_get_plat_priv();
  2375. if (!priv || !priv->pdev) {
  2376. ret = -ENODEV;
  2377. goto out;
  2378. }
  2379. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2380. if (priv->ops) {
  2381. icnss_pr_err("Driver already registered\n");
  2382. ret = -EEXIST;
  2383. goto out;
  2384. }
  2385. if (!ops->dev_info) {
  2386. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2387. return -EINVAL;
  2388. }
  2389. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2390. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2391. ops->dev_info->name);
  2392. return -ENODEV;
  2393. }
  2394. if (!ops->probe || !ops->remove) {
  2395. ret = -EINVAL;
  2396. goto out;
  2397. }
  2398. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2399. 0, ops);
  2400. if (ret == -EINTR)
  2401. ret = 0;
  2402. out:
  2403. return ret;
  2404. }
  2405. EXPORT_SYMBOL(__icnss_register_driver);
  2406. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2407. {
  2408. int ret;
  2409. struct icnss_priv *priv = icnss_get_plat_priv();
  2410. if (!priv || !priv->pdev) {
  2411. ret = -ENODEV;
  2412. goto out;
  2413. }
  2414. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2415. if (!priv->ops) {
  2416. icnss_pr_err("Driver not registered\n");
  2417. ret = -ENOENT;
  2418. goto out;
  2419. }
  2420. ret = icnss_driver_event_post(priv,
  2421. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2422. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2423. out:
  2424. return ret;
  2425. }
  2426. EXPORT_SYMBOL(icnss_unregister_driver);
  2427. static struct icnss_msi_config msi_config_wcn6750 = {
  2428. .total_vectors = 28,
  2429. .total_users = 2,
  2430. .users = (struct icnss_msi_user[]) {
  2431. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2432. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2433. },
  2434. };
  2435. static struct icnss_msi_config msi_config_wcn6450 = {
  2436. .total_vectors = 10,
  2437. .total_users = 1,
  2438. .users = (struct icnss_msi_user[]) {
  2439. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2440. },
  2441. };
  2442. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2443. {
  2444. if (priv->device_id == WCN6750_DEVICE_ID)
  2445. priv->msi_config = &msi_config_wcn6750;
  2446. else
  2447. priv->msi_config = &msi_config_wcn6450;
  2448. return 0;
  2449. }
  2450. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2451. int *num_vectors, u32 *user_base_data,
  2452. u32 *base_vector)
  2453. {
  2454. struct icnss_priv *priv = dev_get_drvdata(dev);
  2455. struct icnss_msi_config *msi_config;
  2456. int idx;
  2457. if (!priv)
  2458. return -ENODEV;
  2459. msi_config = priv->msi_config;
  2460. if (!msi_config) {
  2461. icnss_pr_err("MSI is not supported.\n");
  2462. return -EINVAL;
  2463. }
  2464. for (idx = 0; idx < msi_config->total_users; idx++) {
  2465. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2466. *num_vectors = msi_config->users[idx].num_vectors;
  2467. *user_base_data = msi_config->users[idx].base_vector
  2468. + priv->msi_base_data;
  2469. *base_vector = msi_config->users[idx].base_vector;
  2470. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2471. user_name, *num_vectors, *user_base_data,
  2472. *base_vector);
  2473. return 0;
  2474. }
  2475. }
  2476. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2477. return -EINVAL;
  2478. }
  2479. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2480. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2481. {
  2482. struct icnss_priv *priv = dev_get_drvdata(dev);
  2483. int irq_num;
  2484. irq_num = priv->srng_irqs[vector];
  2485. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2486. irq_num, vector);
  2487. return irq_num;
  2488. }
  2489. EXPORT_SYMBOL(icnss_get_msi_irq);
  2490. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2491. u32 *msi_addr_high)
  2492. {
  2493. struct icnss_priv *priv = dev_get_drvdata(dev);
  2494. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2495. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2496. }
  2497. EXPORT_SYMBOL(icnss_get_msi_address);
  2498. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2499. irqreturn_t (*handler)(int, void *),
  2500. unsigned long flags, const char *name, void *ctx)
  2501. {
  2502. int ret = 0;
  2503. unsigned int irq;
  2504. struct ce_irq_list *irq_entry;
  2505. struct icnss_priv *priv = dev_get_drvdata(dev);
  2506. if (!priv || !priv->pdev) {
  2507. ret = -ENODEV;
  2508. goto out;
  2509. }
  2510. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2511. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2512. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2513. ret = -EINVAL;
  2514. goto out;
  2515. }
  2516. irq = priv->ce_irqs[ce_id];
  2517. irq_entry = &priv->ce_irq_list[ce_id];
  2518. if (irq_entry->handler || irq_entry->irq) {
  2519. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2520. irq, ce_id);
  2521. ret = -EEXIST;
  2522. goto out;
  2523. }
  2524. ret = request_irq(irq, handler, flags, name, ctx);
  2525. if (ret) {
  2526. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2527. irq, ce_id, ret);
  2528. goto out;
  2529. }
  2530. irq_entry->irq = irq;
  2531. irq_entry->handler = handler;
  2532. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2533. penv->stats.ce_irqs[ce_id].request++;
  2534. out:
  2535. return ret;
  2536. }
  2537. EXPORT_SYMBOL(icnss_ce_request_irq);
  2538. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2539. {
  2540. int ret = 0;
  2541. unsigned int irq;
  2542. struct ce_irq_list *irq_entry;
  2543. if (!penv || !penv->pdev || !dev) {
  2544. ret = -ENODEV;
  2545. goto out;
  2546. }
  2547. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2548. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2549. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2550. ret = -EINVAL;
  2551. goto out;
  2552. }
  2553. irq = penv->ce_irqs[ce_id];
  2554. irq_entry = &penv->ce_irq_list[ce_id];
  2555. if (!irq_entry->handler || !irq_entry->irq) {
  2556. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2557. ret = -EEXIST;
  2558. goto out;
  2559. }
  2560. free_irq(irq, ctx);
  2561. irq_entry->irq = 0;
  2562. irq_entry->handler = NULL;
  2563. penv->stats.ce_irqs[ce_id].free++;
  2564. out:
  2565. return ret;
  2566. }
  2567. EXPORT_SYMBOL(icnss_ce_free_irq);
  2568. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2569. {
  2570. unsigned int irq;
  2571. if (!penv || !penv->pdev || !dev) {
  2572. icnss_pr_err("Platform driver not initialized\n");
  2573. return;
  2574. }
  2575. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2576. penv->state);
  2577. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2578. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2579. return;
  2580. }
  2581. penv->stats.ce_irqs[ce_id].enable++;
  2582. irq = penv->ce_irqs[ce_id];
  2583. enable_irq(irq);
  2584. }
  2585. EXPORT_SYMBOL(icnss_enable_irq);
  2586. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2587. {
  2588. unsigned int irq;
  2589. if (!penv || !penv->pdev || !dev) {
  2590. icnss_pr_err("Platform driver not initialized\n");
  2591. return;
  2592. }
  2593. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2594. penv->state);
  2595. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2596. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2597. ce_id);
  2598. return;
  2599. }
  2600. irq = penv->ce_irqs[ce_id];
  2601. disable_irq(irq);
  2602. penv->stats.ce_irqs[ce_id].disable++;
  2603. }
  2604. EXPORT_SYMBOL(icnss_disable_irq);
  2605. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2606. {
  2607. char *fw_build_timestamp = NULL;
  2608. struct icnss_priv *priv = dev_get_drvdata(dev);
  2609. if (!priv) {
  2610. icnss_pr_err("Platform driver not initialized\n");
  2611. return -EINVAL;
  2612. }
  2613. info->v_addr = priv->mem_base_va;
  2614. info->p_addr = priv->mem_base_pa;
  2615. info->chip_id = priv->chip_info.chip_id;
  2616. info->chip_family = priv->chip_info.chip_family;
  2617. info->board_id = priv->board_id;
  2618. info->soc_id = priv->soc_id;
  2619. info->fw_version = priv->fw_version_info.fw_version;
  2620. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2621. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2622. strlcpy(info->fw_build_timestamp,
  2623. priv->fw_version_info.fw_build_timestamp,
  2624. WLFW_MAX_TIMESTAMP_LEN + 1);
  2625. strlcpy(info->fw_build_id, priv->fw_build_id,
  2626. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2627. return 0;
  2628. }
  2629. EXPORT_SYMBOL(icnss_get_soc_info);
  2630. int icnss_get_mhi_state(struct device *dev)
  2631. {
  2632. struct icnss_priv *priv = dev_get_drvdata(dev);
  2633. if (!priv) {
  2634. icnss_pr_err("Platform driver not initialized\n");
  2635. return -EINVAL;
  2636. }
  2637. if (!priv->mhi_state_info_va)
  2638. return -ENOMEM;
  2639. return ioread32(priv->mhi_state_info_va);
  2640. }
  2641. EXPORT_SYMBOL(icnss_get_mhi_state);
  2642. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2643. {
  2644. int ret;
  2645. struct icnss_priv *priv;
  2646. if (!dev)
  2647. return -ENODEV;
  2648. priv = dev_get_drvdata(dev);
  2649. if (!priv) {
  2650. icnss_pr_err("Platform driver not initialized\n");
  2651. return -EINVAL;
  2652. }
  2653. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2654. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2655. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2656. priv->state);
  2657. return -EINVAL;
  2658. }
  2659. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2660. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2661. if (ret)
  2662. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2663. ret, fw_log_mode);
  2664. return ret;
  2665. }
  2666. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2667. int icnss_force_wake_request(struct device *dev)
  2668. {
  2669. struct icnss_priv *priv;
  2670. if (!dev)
  2671. return -ENODEV;
  2672. priv = dev_get_drvdata(dev);
  2673. if (!priv) {
  2674. icnss_pr_err("Platform driver not initialized\n");
  2675. return -EINVAL;
  2676. }
  2677. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2678. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2679. atomic_read(&priv->soc_wake_ref_count));
  2680. return 0;
  2681. }
  2682. icnss_pr_soc_wake("Calling SOC Wake request");
  2683. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2684. 0, NULL);
  2685. return 0;
  2686. }
  2687. EXPORT_SYMBOL(icnss_force_wake_request);
  2688. int icnss_force_wake_release(struct device *dev)
  2689. {
  2690. struct icnss_priv *priv;
  2691. if (!dev)
  2692. return -ENODEV;
  2693. priv = dev_get_drvdata(dev);
  2694. if (!priv) {
  2695. icnss_pr_err("Platform driver not initialized\n");
  2696. return -EINVAL;
  2697. }
  2698. icnss_pr_soc_wake("Calling SOC Wake response");
  2699. if (atomic_read(&priv->soc_wake_ref_count) &&
  2700. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2701. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2702. atomic_read(&priv->soc_wake_ref_count));
  2703. return 0;
  2704. }
  2705. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2706. 0, NULL);
  2707. return 0;
  2708. }
  2709. EXPORT_SYMBOL(icnss_force_wake_release);
  2710. int icnss_is_device_awake(struct device *dev)
  2711. {
  2712. struct icnss_priv *priv = dev_get_drvdata(dev);
  2713. if (!priv) {
  2714. icnss_pr_err("Platform driver not initialized\n");
  2715. return -EINVAL;
  2716. }
  2717. return atomic_read(&priv->soc_wake_ref_count);
  2718. }
  2719. EXPORT_SYMBOL(icnss_is_device_awake);
  2720. int icnss_is_pci_ep_awake(struct device *dev)
  2721. {
  2722. struct icnss_priv *priv = dev_get_drvdata(dev);
  2723. if (!priv) {
  2724. icnss_pr_err("Platform driver not initialized\n");
  2725. return -EINVAL;
  2726. }
  2727. if (!priv->mhi_state_info_va)
  2728. return -ENOMEM;
  2729. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2730. }
  2731. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2732. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2733. uint32_t mem_type, uint32_t data_len,
  2734. uint8_t *output)
  2735. {
  2736. int ret = 0;
  2737. struct icnss_priv *priv = dev_get_drvdata(dev);
  2738. if (priv->magic != ICNSS_MAGIC) {
  2739. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2740. dev, priv, priv->magic);
  2741. return -EINVAL;
  2742. }
  2743. if (!output || data_len == 0
  2744. || data_len > WLFW_MAX_DATA_SIZE) {
  2745. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2746. output, data_len);
  2747. ret = -EINVAL;
  2748. goto out;
  2749. }
  2750. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2751. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2752. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2753. priv->state);
  2754. ret = -EINVAL;
  2755. goto out;
  2756. }
  2757. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2758. data_len, output);
  2759. out:
  2760. return ret;
  2761. }
  2762. EXPORT_SYMBOL(icnss_athdiag_read);
  2763. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2764. uint32_t mem_type, uint32_t data_len,
  2765. uint8_t *input)
  2766. {
  2767. int ret = 0;
  2768. struct icnss_priv *priv = dev_get_drvdata(dev);
  2769. if (priv->magic != ICNSS_MAGIC) {
  2770. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2771. dev, priv, priv->magic);
  2772. return -EINVAL;
  2773. }
  2774. if (!input || data_len == 0
  2775. || data_len > WLFW_MAX_DATA_SIZE) {
  2776. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2777. input, data_len);
  2778. ret = -EINVAL;
  2779. goto out;
  2780. }
  2781. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2782. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2783. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2784. priv->state);
  2785. ret = -EINVAL;
  2786. goto out;
  2787. }
  2788. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2789. data_len, input);
  2790. out:
  2791. return ret;
  2792. }
  2793. EXPORT_SYMBOL(icnss_athdiag_write);
  2794. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2795. enum icnss_driver_mode mode,
  2796. const char *host_version)
  2797. {
  2798. struct icnss_priv *priv = dev_get_drvdata(dev);
  2799. int temp = 0, ret = 0;
  2800. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2801. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2802. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2803. priv->state);
  2804. return -EINVAL;
  2805. }
  2806. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2807. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2808. priv->state);
  2809. return -EINVAL;
  2810. }
  2811. if (priv->wpss_supported &&
  2812. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2813. icnss_setup_dms_mac(priv);
  2814. if (priv->device_id == WCN6750_DEVICE_ID) {
  2815. if (!icnss_get_temperature(priv, &temp)) {
  2816. icnss_pr_dbg("Temperature: %d\n", temp);
  2817. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2818. icnss_set_wlan_en_delay(priv);
  2819. }
  2820. }
  2821. if (priv->device_id == WCN6450_DEVICE_ID)
  2822. icnss_hw_power_off(priv);
  2823. ret = icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2824. if (priv->device_id == WCN6450_DEVICE_ID)
  2825. icnss_hw_power_on(priv);
  2826. return ret;
  2827. }
  2828. EXPORT_SYMBOL(icnss_wlan_enable);
  2829. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2830. {
  2831. struct icnss_priv *priv = dev_get_drvdata(dev);
  2832. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2833. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2834. priv->state);
  2835. return 0;
  2836. }
  2837. return icnss_send_wlan_disable_to_fw(priv);
  2838. }
  2839. EXPORT_SYMBOL(icnss_wlan_disable);
  2840. bool icnss_is_qmi_disable(struct device *dev)
  2841. {
  2842. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2843. }
  2844. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2845. int icnss_get_ce_id(struct device *dev, int irq)
  2846. {
  2847. int i;
  2848. if (!penv || !penv->pdev || !dev)
  2849. return -ENODEV;
  2850. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2851. if (penv->ce_irqs[i] == irq)
  2852. return i;
  2853. }
  2854. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2855. return -EINVAL;
  2856. }
  2857. EXPORT_SYMBOL(icnss_get_ce_id);
  2858. int icnss_get_irq(struct device *dev, int ce_id)
  2859. {
  2860. int irq;
  2861. if (!penv || !penv->pdev || !dev)
  2862. return -ENODEV;
  2863. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2864. return -EINVAL;
  2865. irq = penv->ce_irqs[ce_id];
  2866. return irq;
  2867. }
  2868. EXPORT_SYMBOL(icnss_get_irq);
  2869. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2870. {
  2871. struct icnss_priv *priv = dev_get_drvdata(dev);
  2872. if (!priv) {
  2873. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2874. return NULL;
  2875. }
  2876. return priv->iommu_domain;
  2877. }
  2878. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2879. int icnss_smmu_map(struct device *dev,
  2880. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2881. {
  2882. struct icnss_priv *priv = dev_get_drvdata(dev);
  2883. int flag = IOMMU_READ | IOMMU_WRITE;
  2884. bool dma_coherent = false;
  2885. unsigned long iova;
  2886. int prop_len = 0;
  2887. size_t len;
  2888. int ret = 0;
  2889. if (!priv) {
  2890. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2891. dev, priv);
  2892. return -EINVAL;
  2893. }
  2894. if (!iova_addr) {
  2895. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2896. &paddr, size);
  2897. return -EINVAL;
  2898. }
  2899. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2900. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2901. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2902. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2903. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2904. iova,
  2905. &priv->smmu_iova_ipa_start,
  2906. priv->smmu_iova_ipa_len);
  2907. return -ENOMEM;
  2908. }
  2909. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2910. icnss_pr_dbg("dma-coherent is %s\n",
  2911. dma_coherent ? "enabled" : "disabled");
  2912. if (dma_coherent)
  2913. flag |= IOMMU_CACHE;
  2914. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2915. ret = iommu_map(priv->iommu_domain, iova,
  2916. rounddown(paddr, PAGE_SIZE), len,
  2917. flag);
  2918. if (ret) {
  2919. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2920. return ret;
  2921. }
  2922. priv->smmu_iova_ipa_current = iova + len;
  2923. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2924. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2925. return 0;
  2926. }
  2927. EXPORT_SYMBOL(icnss_smmu_map);
  2928. int icnss_smmu_unmap(struct device *dev,
  2929. uint32_t iova_addr, size_t size)
  2930. {
  2931. struct icnss_priv *priv = dev_get_drvdata(dev);
  2932. unsigned long iova;
  2933. size_t len, unmapped_len;
  2934. if (!priv) {
  2935. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2936. dev, priv);
  2937. return -EINVAL;
  2938. }
  2939. if (!iova_addr) {
  2940. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2941. size);
  2942. return -EINVAL;
  2943. }
  2944. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2945. PAGE_SIZE);
  2946. iova = rounddown(iova_addr, PAGE_SIZE);
  2947. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2948. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2949. iova,
  2950. &priv->smmu_iova_ipa_start,
  2951. priv->smmu_iova_ipa_len);
  2952. return -ENOMEM;
  2953. }
  2954. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2955. iova, len);
  2956. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2957. if (unmapped_len != len) {
  2958. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2959. return -EINVAL;
  2960. }
  2961. priv->smmu_iova_ipa_current = iova;
  2962. return 0;
  2963. }
  2964. EXPORT_SYMBOL(icnss_smmu_unmap);
  2965. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2966. {
  2967. return socinfo_get_serial_number();
  2968. }
  2969. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2970. int icnss_trigger_recovery(struct device *dev)
  2971. {
  2972. int ret = 0;
  2973. struct icnss_priv *priv = dev_get_drvdata(dev);
  2974. if (priv->magic != ICNSS_MAGIC) {
  2975. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2976. ret = -EINVAL;
  2977. goto out;
  2978. }
  2979. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2980. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2981. priv->state);
  2982. ret = -EPERM;
  2983. goto out;
  2984. }
  2985. if (priv->wpss_supported) {
  2986. icnss_pr_vdbg("Initiate Root PD restart");
  2987. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2988. ICNSS_SMP2P_OUT_POWER_SAVE);
  2989. if (!ret)
  2990. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2991. return ret;
  2992. }
  2993. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2994. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2995. priv->state);
  2996. ret = -EOPNOTSUPP;
  2997. goto out;
  2998. }
  2999. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  3000. priv->state);
  3001. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  3002. if (!ret)
  3003. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3004. out:
  3005. return ret;
  3006. }
  3007. EXPORT_SYMBOL(icnss_trigger_recovery);
  3008. int icnss_idle_shutdown(struct device *dev)
  3009. {
  3010. struct icnss_priv *priv = dev_get_drvdata(dev);
  3011. if (!priv) {
  3012. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3013. return -EINVAL;
  3014. }
  3015. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3016. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3017. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3018. return -EBUSY;
  3019. }
  3020. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3021. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3022. }
  3023. EXPORT_SYMBOL(icnss_idle_shutdown);
  3024. int icnss_idle_restart(struct device *dev)
  3025. {
  3026. struct icnss_priv *priv = dev_get_drvdata(dev);
  3027. if (!priv) {
  3028. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3029. return -EINVAL;
  3030. }
  3031. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3032. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3033. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3034. return -EBUSY;
  3035. }
  3036. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3037. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3038. }
  3039. EXPORT_SYMBOL(icnss_idle_restart);
  3040. int icnss_exit_power_save(struct device *dev)
  3041. {
  3042. struct icnss_priv *priv = dev_get_drvdata(dev);
  3043. icnss_pr_vdbg("Calling Exit Power Save\n");
  3044. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3045. !test_bit(ICNSS_MODE_ON, &priv->state))
  3046. return 0;
  3047. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3048. ICNSS_SMP2P_OUT_POWER_SAVE);
  3049. }
  3050. EXPORT_SYMBOL(icnss_exit_power_save);
  3051. int icnss_prevent_l1(struct device *dev)
  3052. {
  3053. struct icnss_priv *priv = dev_get_drvdata(dev);
  3054. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3055. !test_bit(ICNSS_MODE_ON, &priv->state))
  3056. return 0;
  3057. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3058. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3059. }
  3060. EXPORT_SYMBOL(icnss_prevent_l1);
  3061. void icnss_allow_l1(struct device *dev)
  3062. {
  3063. struct icnss_priv *priv = dev_get_drvdata(dev);
  3064. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3065. !test_bit(ICNSS_MODE_ON, &priv->state))
  3066. return;
  3067. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3068. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3069. }
  3070. EXPORT_SYMBOL(icnss_allow_l1);
  3071. void icnss_allow_recursive_recovery(struct device *dev)
  3072. {
  3073. struct icnss_priv *priv = dev_get_drvdata(dev);
  3074. priv->allow_recursive_recovery = true;
  3075. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3076. }
  3077. void icnss_disallow_recursive_recovery(struct device *dev)
  3078. {
  3079. struct icnss_priv *priv = dev_get_drvdata(dev);
  3080. priv->allow_recursive_recovery = false;
  3081. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3082. }
  3083. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3084. {
  3085. struct kobject *icnss_kobject;
  3086. int ret = 0;
  3087. atomic_set(&priv->is_shutdown, false);
  3088. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3089. if (!icnss_kobject) {
  3090. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3091. return -EINVAL;
  3092. }
  3093. priv->icnss_kobject = icnss_kobject;
  3094. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3095. if (ret) {
  3096. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3097. return ret;
  3098. }
  3099. return ret;
  3100. }
  3101. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3102. {
  3103. struct kobject *icnss_kobject;
  3104. icnss_kobject = priv->icnss_kobject;
  3105. if (icnss_kobject)
  3106. kobject_put(icnss_kobject);
  3107. }
  3108. static ssize_t qdss_tr_start_store(struct device *dev,
  3109. struct device_attribute *attr,
  3110. const char *buf, size_t count)
  3111. {
  3112. struct icnss_priv *priv = dev_get_drvdata(dev);
  3113. wlfw_qdss_trace_start(priv);
  3114. icnss_pr_dbg("Received QDSS start command\n");
  3115. return count;
  3116. }
  3117. static ssize_t qdss_tr_stop_store(struct device *dev,
  3118. struct device_attribute *attr,
  3119. const char *user_buf, size_t count)
  3120. {
  3121. struct icnss_priv *priv = dev_get_drvdata(dev);
  3122. u32 option = 0;
  3123. if (sscanf(user_buf, "%du", &option) != 1)
  3124. return -EINVAL;
  3125. wlfw_qdss_trace_stop(priv, option);
  3126. icnss_pr_dbg("Received QDSS stop command\n");
  3127. return count;
  3128. }
  3129. static ssize_t qdss_conf_download_store(struct device *dev,
  3130. struct device_attribute *attr,
  3131. const char *buf, size_t count)
  3132. {
  3133. struct icnss_priv *priv = dev_get_drvdata(dev);
  3134. icnss_wlfw_qdss_dnld_send_sync(priv);
  3135. icnss_pr_dbg("Received QDSS download config command\n");
  3136. return count;
  3137. }
  3138. static ssize_t hw_trc_override_store(struct device *dev,
  3139. struct device_attribute *attr,
  3140. const char *buf, size_t count)
  3141. {
  3142. struct icnss_priv *priv = dev_get_drvdata(dev);
  3143. int tmp = 0;
  3144. if (sscanf(buf, "%du", &tmp) != 1)
  3145. return -EINVAL;
  3146. priv->hw_trc_override = tmp;
  3147. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3148. return count;
  3149. }
  3150. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3151. {
  3152. struct icnss_priv *priv = icnss_get_plat_priv();
  3153. phandle rproc_phandle;
  3154. int ret;
  3155. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3156. &rproc_phandle)) {
  3157. icnss_pr_err("error reading rproc phandle\n");
  3158. return;
  3159. }
  3160. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3161. if (IS_ERR_OR_NULL(priv->rproc)) {
  3162. icnss_pr_err("rproc not found");
  3163. return;
  3164. }
  3165. ret = rproc_boot(priv->rproc);
  3166. if (ret) {
  3167. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3168. rproc_put(priv->rproc);
  3169. }
  3170. }
  3171. static ssize_t wpss_boot_store(struct device *dev,
  3172. struct device_attribute *attr,
  3173. const char *buf, size_t count)
  3174. {
  3175. struct icnss_priv *priv = dev_get_drvdata(dev);
  3176. int wpss_rproc = 0;
  3177. if (!priv->wpss_supported)
  3178. return count;
  3179. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3180. icnss_pr_err("Failed to read wpss rproc info");
  3181. return -EINVAL;
  3182. }
  3183. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3184. if (wpss_rproc == 1)
  3185. schedule_work(&wpss_loader);
  3186. else if (wpss_rproc == 0)
  3187. icnss_wpss_unload(priv);
  3188. return count;
  3189. }
  3190. static ssize_t wlan_en_delay_store(struct device *dev,
  3191. struct device_attribute *attr,
  3192. const char *buf, size_t count)
  3193. {
  3194. struct icnss_priv *priv = dev_get_drvdata(dev);
  3195. uint32_t wlan_en_delay = 0;
  3196. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3197. return count;
  3198. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3199. icnss_pr_err("Failed to read wlan_en_delay");
  3200. return -EINVAL;
  3201. }
  3202. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3203. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3204. return count;
  3205. }
  3206. static DEVICE_ATTR_WO(qdss_tr_start);
  3207. static DEVICE_ATTR_WO(qdss_tr_stop);
  3208. static DEVICE_ATTR_WO(qdss_conf_download);
  3209. static DEVICE_ATTR_WO(hw_trc_override);
  3210. static DEVICE_ATTR_WO(wpss_boot);
  3211. static DEVICE_ATTR_WO(wlan_en_delay);
  3212. static struct attribute *icnss_attrs[] = {
  3213. &dev_attr_qdss_tr_start.attr,
  3214. &dev_attr_qdss_tr_stop.attr,
  3215. &dev_attr_qdss_conf_download.attr,
  3216. &dev_attr_hw_trc_override.attr,
  3217. &dev_attr_wpss_boot.attr,
  3218. &dev_attr_wlan_en_delay.attr,
  3219. NULL,
  3220. };
  3221. static struct attribute_group icnss_attr_group = {
  3222. .attrs = icnss_attrs,
  3223. };
  3224. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3225. {
  3226. struct device *dev = &priv->pdev->dev;
  3227. int ret;
  3228. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3229. if (ret) {
  3230. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3231. ret);
  3232. goto out;
  3233. }
  3234. return 0;
  3235. out:
  3236. return ret;
  3237. }
  3238. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3239. {
  3240. sysfs_remove_link(kernel_kobj, "icnss");
  3241. }
  3242. static int icnss_sysfs_create(struct icnss_priv *priv)
  3243. {
  3244. int ret = 0;
  3245. ret = devm_device_add_group(&priv->pdev->dev,
  3246. &icnss_attr_group);
  3247. if (ret) {
  3248. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3249. ret);
  3250. goto out;
  3251. }
  3252. icnss_create_sysfs_link(priv);
  3253. ret = icnss_create_shutdown_sysfs(priv);
  3254. if (ret)
  3255. goto remove_icnss_group;
  3256. return 0;
  3257. remove_icnss_group:
  3258. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3259. out:
  3260. return ret;
  3261. }
  3262. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3263. {
  3264. icnss_destroy_shutdown_sysfs(priv);
  3265. icnss_remove_sysfs_link(priv);
  3266. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3267. }
  3268. static int icnss_resource_parse(struct icnss_priv *priv)
  3269. {
  3270. int ret = 0, i = 0;
  3271. struct platform_device *pdev = priv->pdev;
  3272. struct device *dev = &pdev->dev;
  3273. struct resource *res;
  3274. u32 int_prop;
  3275. ret = icnss_get_vreg(priv);
  3276. if (ret) {
  3277. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3278. goto out;
  3279. }
  3280. ret = icnss_get_clk(priv);
  3281. if (ret) {
  3282. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3283. goto put_vreg;
  3284. }
  3285. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3286. ret = icnss_get_psf_info(priv);
  3287. if (ret < 0)
  3288. goto out;
  3289. priv->psf_supported = true;
  3290. }
  3291. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3292. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3293. "membase");
  3294. if (!res) {
  3295. icnss_pr_err("Memory base not found in DT\n");
  3296. ret = -EINVAL;
  3297. goto put_clk;
  3298. }
  3299. priv->mem_base_pa = res->start;
  3300. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3301. resource_size(res));
  3302. if (!priv->mem_base_va) {
  3303. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3304. &priv->mem_base_pa);
  3305. ret = -EINVAL;
  3306. goto put_clk;
  3307. }
  3308. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3309. &priv->mem_base_pa,
  3310. priv->mem_base_va);
  3311. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3312. res = platform_get_resource(priv->pdev,
  3313. IORESOURCE_IRQ, i);
  3314. if (!res) {
  3315. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3316. ret = -ENODEV;
  3317. goto put_clk;
  3318. } else {
  3319. priv->ce_irqs[i] = res->start;
  3320. }
  3321. }
  3322. if (of_property_read_bool(pdev->dev.of_node,
  3323. "qcom,is_low_power")) {
  3324. priv->low_power_support = true;
  3325. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3326. }
  3327. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3328. &priv->rf_subtype) == 0) {
  3329. priv->is_rf_subtype_valid = true;
  3330. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3331. }
  3332. if (of_property_read_bool(pdev->dev.of_node,
  3333. "qcom,is_slate_rfa")) {
  3334. priv->is_slate_rfa = true;
  3335. icnss_pr_err("SLATE rfa is enabled\n");
  3336. }
  3337. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3338. priv->device_id == WCN6450_DEVICE_ID) {
  3339. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3340. "msi_addr");
  3341. if (!res) {
  3342. icnss_pr_err("MSI address not found in DT\n");
  3343. ret = -EINVAL;
  3344. goto put_clk;
  3345. }
  3346. priv->msi_addr_pa = res->start;
  3347. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3348. PAGE_SIZE,
  3349. DMA_FROM_DEVICE, 0);
  3350. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3351. icnss_pr_err("MSI: failed to map msi address\n");
  3352. priv->msi_addr_iova = 0;
  3353. ret = -ENOMEM;
  3354. goto put_clk;
  3355. }
  3356. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3357. &priv->msi_addr_pa,
  3358. priv->msi_addr_iova);
  3359. ret = of_property_read_u32_index(dev->of_node,
  3360. "interrupts",
  3361. 1,
  3362. &int_prop);
  3363. if (ret) {
  3364. icnss_pr_dbg("Read interrupt prop failed");
  3365. goto put_clk;
  3366. }
  3367. priv->msi_base_data = int_prop + 32;
  3368. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3369. priv->msi_base_data, int_prop);
  3370. icnss_get_msi_assignment(priv);
  3371. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3372. res = platform_get_resource(priv->pdev,
  3373. IORESOURCE_IRQ, i);
  3374. if (!res) {
  3375. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3376. ret = -ENODEV;
  3377. goto put_clk;
  3378. } else {
  3379. priv->srng_irqs[i] = res->start;
  3380. }
  3381. }
  3382. }
  3383. return 0;
  3384. put_clk:
  3385. icnss_put_clk(priv);
  3386. put_vreg:
  3387. icnss_put_vreg(priv);
  3388. out:
  3389. return ret;
  3390. }
  3391. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3392. {
  3393. int ret = 0;
  3394. struct platform_device *pdev = priv->pdev;
  3395. struct device *dev = &pdev->dev;
  3396. struct device_node *np = NULL;
  3397. u64 prop_size = 0;
  3398. const __be32 *addrp = NULL;
  3399. np = of_parse_phandle(dev->of_node,
  3400. "qcom,wlan-msa-fixed-region", 0);
  3401. if (np) {
  3402. addrp = of_get_address(np, 0, &prop_size, NULL);
  3403. if (!addrp) {
  3404. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3405. ret = -EINVAL;
  3406. of_node_put(np);
  3407. goto out;
  3408. }
  3409. priv->msa_pa = of_translate_address(np, addrp);
  3410. if (priv->msa_pa == OF_BAD_ADDR) {
  3411. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3412. ret = -EINVAL;
  3413. of_node_put(np);
  3414. goto out;
  3415. }
  3416. of_node_put(np);
  3417. priv->msa_va = memremap(priv->msa_pa,
  3418. (unsigned long)prop_size, MEMREMAP_WT);
  3419. if (!priv->msa_va) {
  3420. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3421. &priv->msa_pa);
  3422. ret = -EINVAL;
  3423. goto out;
  3424. }
  3425. priv->msa_mem_size = prop_size;
  3426. } else {
  3427. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3428. &priv->msa_mem_size);
  3429. if (ret || priv->msa_mem_size == 0) {
  3430. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3431. priv->msa_mem_size, ret);
  3432. goto out;
  3433. }
  3434. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3435. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3436. if (!priv->msa_va) {
  3437. icnss_pr_err("DMA alloc failed for MSA\n");
  3438. ret = -ENOMEM;
  3439. goto out;
  3440. }
  3441. }
  3442. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3443. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3444. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3445. "qcom,fw-prefix");
  3446. return 0;
  3447. out:
  3448. return ret;
  3449. }
  3450. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3451. struct device *dev, unsigned long iova,
  3452. int flags, void *handler_token)
  3453. {
  3454. struct icnss_priv *priv = handler_token;
  3455. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3456. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3457. if (!priv) {
  3458. icnss_pr_err("priv is NULL\n");
  3459. return -ENODEV;
  3460. }
  3461. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3462. fw_down_data.crashed = true;
  3463. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3464. &fw_down_data);
  3465. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3466. &fw_down_data);
  3467. }
  3468. icnss_trigger_recovery(&priv->pdev->dev);
  3469. /* IOMMU driver requires non-zero return value to print debug info. */
  3470. return -EINVAL;
  3471. }
  3472. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3473. {
  3474. int ret = 0;
  3475. struct platform_device *pdev = priv->pdev;
  3476. struct device *dev = &pdev->dev;
  3477. const char *iommu_dma_type;
  3478. struct resource *res;
  3479. u32 addr_win[2];
  3480. ret = of_property_read_u32_array(dev->of_node,
  3481. "qcom,iommu-dma-addr-pool",
  3482. addr_win,
  3483. ARRAY_SIZE(addr_win));
  3484. if (ret) {
  3485. icnss_pr_err("SMMU IOVA base not found\n");
  3486. } else {
  3487. priv->smmu_iova_start = addr_win[0];
  3488. priv->smmu_iova_len = addr_win[1];
  3489. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3490. &priv->smmu_iova_start,
  3491. priv->smmu_iova_len);
  3492. priv->iommu_domain =
  3493. iommu_get_domain_for_dev(&pdev->dev);
  3494. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3495. &iommu_dma_type);
  3496. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3497. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3498. priv->smmu_s1_enable = true;
  3499. if (priv->device_id == WCN6750_DEVICE_ID ||
  3500. priv->device_id == WCN6450_DEVICE_ID)
  3501. iommu_set_fault_handler(priv->iommu_domain,
  3502. icnss_smmu_fault_handler,
  3503. priv);
  3504. }
  3505. res = platform_get_resource_byname(pdev,
  3506. IORESOURCE_MEM,
  3507. "smmu_iova_ipa");
  3508. if (!res) {
  3509. icnss_pr_err("SMMU IOVA IPA not found\n");
  3510. } else {
  3511. priv->smmu_iova_ipa_start = res->start;
  3512. priv->smmu_iova_ipa_current = res->start;
  3513. priv->smmu_iova_ipa_len = resource_size(res);
  3514. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3515. &priv->smmu_iova_ipa_start,
  3516. priv->smmu_iova_ipa_len);
  3517. }
  3518. }
  3519. return 0;
  3520. }
  3521. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3522. {
  3523. if (!priv)
  3524. return -ENODEV;
  3525. if (!priv->smmu_iova_len)
  3526. return -EINVAL;
  3527. *addr = priv->smmu_iova_start;
  3528. *size = priv->smmu_iova_len;
  3529. return 0;
  3530. }
  3531. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3532. {
  3533. if (!priv)
  3534. return -ENODEV;
  3535. if (!priv->smmu_iova_ipa_len)
  3536. return -EINVAL;
  3537. *addr = priv->smmu_iova_ipa_start;
  3538. *size = priv->smmu_iova_ipa_len;
  3539. return 0;
  3540. }
  3541. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3542. char *name)
  3543. {
  3544. if (!priv)
  3545. return;
  3546. if (!priv->use_prefix_path) {
  3547. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3548. return;
  3549. }
  3550. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3551. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3552. ADRASTEA_PATH_PREFIX "%s", name);
  3553. else if (priv->device_id == WCN6750_DEVICE_ID)
  3554. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3555. QCA6750_PATH_PREFIX "%s", name);
  3556. else if (priv->device_id == WCN6450_DEVICE_ID)
  3557. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3558. WCN6450_PATH_PREFIX "%s", name);
  3559. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3560. }
  3561. static const struct platform_device_id icnss_platform_id_table[] = {
  3562. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3563. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3564. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3565. { },
  3566. };
  3567. static const struct of_device_id icnss_dt_match[] = {
  3568. {
  3569. .compatible = "qcom,wcn6750",
  3570. .data = (void *)&icnss_platform_id_table[0]},
  3571. {
  3572. .compatible = "qcom,icnss",
  3573. .data = (void *)&icnss_platform_id_table[1]},
  3574. {
  3575. .compatible = "qcom,wcn6450",
  3576. .data = (void *)&icnss_platform_id_table[2]},
  3577. { },
  3578. };
  3579. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3580. static void icnss_init_control_params(struct icnss_priv *priv)
  3581. {
  3582. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3583. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3584. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3585. if (priv->device_id == WCN6750_DEVICE_ID ||
  3586. of_property_read_bool(priv->pdev->dev.of_node,
  3587. "wpss-support-enable"))
  3588. priv->wpss_supported = true;
  3589. if (of_property_read_bool(priv->pdev->dev.of_node,
  3590. "bdf-download-support"))
  3591. priv->bdf_download_support = true;
  3592. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3593. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3594. }
  3595. static void icnss_read_device_configs(struct icnss_priv *priv)
  3596. {
  3597. if (of_property_read_bool(priv->pdev->dev.of_node,
  3598. "wlan-ipa-disabled")) {
  3599. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3600. }
  3601. if (of_property_read_bool(priv->pdev->dev.of_node,
  3602. "qcom,wpss-self-recovery"))
  3603. priv->wpss_self_recovery_enabled = true;
  3604. }
  3605. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3606. {
  3607. pm_runtime_get_sync(&priv->pdev->dev);
  3608. pm_runtime_forbid(&priv->pdev->dev);
  3609. pm_runtime_set_active(&priv->pdev->dev);
  3610. pm_runtime_enable(&priv->pdev->dev);
  3611. }
  3612. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3613. {
  3614. pm_runtime_disable(&priv->pdev->dev);
  3615. pm_runtime_allow(&priv->pdev->dev);
  3616. pm_runtime_put_sync(&priv->pdev->dev);
  3617. }
  3618. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3619. {
  3620. return of_property_read_bool(priv->pdev->dev.of_node,
  3621. "use-nv-mac");
  3622. }
  3623. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3624. {
  3625. struct icnss_subsys_restart_level_data *restart_level_data;
  3626. icnss_pr_info("rproc name: %s recovery disable: %d",
  3627. rproc->name, rproc->recovery_disabled);
  3628. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3629. if (!restart_level_data)
  3630. return;
  3631. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3632. if (rproc->recovery_disabled)
  3633. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3634. else
  3635. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3636. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3637. 0, restart_level_data);
  3638. }
  3639. }
  3640. static int icnss_probe(struct platform_device *pdev)
  3641. {
  3642. int ret = 0;
  3643. struct device *dev = &pdev->dev;
  3644. struct icnss_priv *priv;
  3645. const struct of_device_id *of_id;
  3646. const struct platform_device_id *device_id;
  3647. if (dev_get_drvdata(dev)) {
  3648. icnss_pr_err("Driver is already initialized\n");
  3649. return -EEXIST;
  3650. }
  3651. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3652. if (!of_id || !of_id->data) {
  3653. icnss_pr_err("Failed to find of match device!\n");
  3654. ret = -ENODEV;
  3655. goto out_reset_drvdata;
  3656. }
  3657. device_id = of_id->data;
  3658. icnss_pr_dbg("Platform driver probe\n");
  3659. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3660. if (!priv)
  3661. return -ENOMEM;
  3662. priv->magic = ICNSS_MAGIC;
  3663. dev_set_drvdata(dev, priv);
  3664. priv->pdev = pdev;
  3665. priv->device_id = device_id->driver_data;
  3666. priv->is_chain1_supported = true;
  3667. INIT_LIST_HEAD(&priv->vreg_list);
  3668. INIT_LIST_HEAD(&priv->clk_list);
  3669. icnss_allow_recursive_recovery(dev);
  3670. icnss_init_control_params(priv);
  3671. icnss_read_device_configs(priv);
  3672. ret = icnss_resource_parse(priv);
  3673. if (ret)
  3674. goto out_reset_drvdata;
  3675. ret = icnss_msa_dt_parse(priv);
  3676. if (ret)
  3677. goto out_free_resources;
  3678. ret = icnss_smmu_dt_parse(priv);
  3679. if (ret)
  3680. goto out_free_resources;
  3681. spin_lock_init(&priv->event_lock);
  3682. spin_lock_init(&priv->on_off_lock);
  3683. spin_lock_init(&priv->soc_wake_msg_lock);
  3684. mutex_init(&priv->dev_lock);
  3685. mutex_init(&priv->tcdev_lock);
  3686. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3687. if (!priv->event_wq) {
  3688. icnss_pr_err("Workqueue creation failed\n");
  3689. ret = -EFAULT;
  3690. goto smmu_cleanup;
  3691. }
  3692. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3693. INIT_LIST_HEAD(&priv->event_list);
  3694. ret = icnss_register_fw_service(priv);
  3695. if (ret < 0) {
  3696. icnss_pr_err("fw service registration failed: %d\n", ret);
  3697. goto out_destroy_wq;
  3698. }
  3699. icnss_enable_recovery(priv);
  3700. icnss_debugfs_create(priv);
  3701. icnss_sysfs_create(priv);
  3702. ret = device_init_wakeup(&priv->pdev->dev, true);
  3703. if (ret)
  3704. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3705. ret);
  3706. icnss_set_plat_priv(priv);
  3707. init_completion(&priv->unblock_shutdown);
  3708. if (priv->is_slate_rfa)
  3709. init_completion(&priv->slate_boot_complete);
  3710. if (priv->device_id == WCN6750_DEVICE_ID ||
  3711. priv->device_id == WCN6450_DEVICE_ID) {
  3712. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3713. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3714. if (!priv->soc_wake_wq) {
  3715. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3716. ret = -EFAULT;
  3717. goto out_unregister_fw_service;
  3718. }
  3719. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3720. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3721. ret = icnss_genl_init();
  3722. if (ret < 0)
  3723. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3724. init_completion(&priv->smp2p_soc_wake_wait);
  3725. icnss_runtime_pm_init(priv);
  3726. icnss_aop_mbox_init(priv);
  3727. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3728. priv->bdf_download_support = true;
  3729. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3730. }
  3731. if (priv->wpss_supported) {
  3732. ret = icnss_dms_init(priv);
  3733. if (ret)
  3734. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3735. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3736. icnss_pr_dbg("NV MAC feature is %s\n",
  3737. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3738. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3739. }
  3740. timer_setup(&priv->recovery_timer,
  3741. icnss_recovery_timeout_hdlr, 0);
  3742. if (priv->wpss_self_recovery_enabled) {
  3743. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3744. timer_setup(&priv->wpss_ssr_timer,
  3745. icnss_wpss_ssr_timeout_hdlr, 0);
  3746. }
  3747. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3748. icnss_pr_info("Platform driver probed successfully\n");
  3749. return 0;
  3750. out_unregister_fw_service:
  3751. icnss_unregister_fw_service(priv);
  3752. out_destroy_wq:
  3753. destroy_workqueue(priv->event_wq);
  3754. smmu_cleanup:
  3755. priv->iommu_domain = NULL;
  3756. out_free_resources:
  3757. icnss_put_resources(priv);
  3758. out_reset_drvdata:
  3759. dev_set_drvdata(dev, NULL);
  3760. return ret;
  3761. }
  3762. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3763. {
  3764. if (IS_ERR_OR_NULL(ramdump_info))
  3765. return;
  3766. device_unregister(ramdump_info->dev);
  3767. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3768. kfree(ramdump_info);
  3769. }
  3770. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3771. {
  3772. if (priv->batt_psy)
  3773. power_supply_put(penv->batt_psy);
  3774. if (priv->psf_supported) {
  3775. flush_workqueue(priv->soc_update_wq);
  3776. destroy_workqueue(priv->soc_update_wq);
  3777. power_supply_unreg_notifier(&priv->psf_nb);
  3778. }
  3779. }
  3780. static int icnss_remove(struct platform_device *pdev)
  3781. {
  3782. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3783. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3784. del_timer(&priv->recovery_timer);
  3785. if (priv->wpss_self_recovery_enabled)
  3786. del_timer(&priv->wpss_ssr_timer);
  3787. device_init_wakeup(&priv->pdev->dev, false);
  3788. icnss_debugfs_destroy(priv);
  3789. icnss_unregister_power_supply_notifier(penv);
  3790. icnss_sysfs_destroy(priv);
  3791. complete_all(&priv->unblock_shutdown);
  3792. if (priv->is_slate_rfa)
  3793. icnss_slate_ssr_unregister_notifier(priv);
  3794. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3795. if (priv->wpss_supported) {
  3796. icnss_dms_deinit(priv);
  3797. icnss_wpss_early_ssr_unregister_notifier(priv);
  3798. icnss_wpss_ssr_unregister_notifier(priv);
  3799. } else {
  3800. icnss_modem_ssr_unregister_notifier(priv);
  3801. icnss_pdr_unregister_notifier(priv);
  3802. }
  3803. if (priv->device_id == WCN6750_DEVICE_ID ||
  3804. priv->device_id == WCN6450_DEVICE_ID) {
  3805. icnss_genl_exit();
  3806. icnss_runtime_pm_deinit(priv);
  3807. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3808. mbox_free_channel(priv->mbox_chan);
  3809. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3810. complete_all(&priv->smp2p_soc_wake_wait);
  3811. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3812. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3813. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3814. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3815. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3816. if (priv->soc_wake_wq)
  3817. destroy_workqueue(priv->soc_wake_wq);
  3818. }
  3819. class_destroy(priv->icnss_ramdump_class);
  3820. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3821. icnss_unregister_fw_service(priv);
  3822. if (priv->event_wq)
  3823. destroy_workqueue(priv->event_wq);
  3824. priv->iommu_domain = NULL;
  3825. icnss_hw_power_off(priv);
  3826. icnss_put_resources(priv);
  3827. dev_set_drvdata(&pdev->dev, NULL);
  3828. return 0;
  3829. }
  3830. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  3831. {
  3832. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  3833. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  3834. ICNSS_ASSERT(0);
  3835. }
  3836. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  3837. {
  3838. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  3839. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  3840. priv->state);
  3841. schedule_work(&wpss_ssr_work);
  3842. }
  3843. #ifdef CONFIG_PM_SLEEP
  3844. static int icnss_pm_suspend(struct device *dev)
  3845. {
  3846. struct icnss_priv *priv = dev_get_drvdata(dev);
  3847. int ret = 0;
  3848. if (priv->magic != ICNSS_MAGIC) {
  3849. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3850. dev, priv, priv->magic);
  3851. return -EINVAL;
  3852. }
  3853. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3854. if (!priv->ops || !priv->ops->pm_suspend ||
  3855. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3856. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3857. return 0;
  3858. ret = priv->ops->pm_suspend(dev);
  3859. if (ret == 0) {
  3860. if (priv->device_id == WCN6750_DEVICE_ID ||
  3861. priv->device_id == WCN6450_DEVICE_ID) {
  3862. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3863. !test_bit(ICNSS_MODE_ON, &priv->state))
  3864. return 0;
  3865. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3866. ICNSS_SMP2P_OUT_POWER_SAVE);
  3867. }
  3868. priv->stats.pm_suspend++;
  3869. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3870. } else {
  3871. priv->stats.pm_suspend_err++;
  3872. }
  3873. return ret;
  3874. }
  3875. static int icnss_pm_resume(struct device *dev)
  3876. {
  3877. struct icnss_priv *priv = dev_get_drvdata(dev);
  3878. int ret = 0;
  3879. if (priv->magic != ICNSS_MAGIC) {
  3880. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3881. dev, priv, priv->magic);
  3882. return -EINVAL;
  3883. }
  3884. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3885. if (!priv->ops || !priv->ops->pm_resume ||
  3886. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3887. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3888. goto out;
  3889. ret = priv->ops->pm_resume(dev);
  3890. out:
  3891. if (ret == 0) {
  3892. priv->stats.pm_resume++;
  3893. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3894. } else {
  3895. priv->stats.pm_resume_err++;
  3896. }
  3897. return ret;
  3898. }
  3899. static int icnss_pm_suspend_noirq(struct device *dev)
  3900. {
  3901. struct icnss_priv *priv = dev_get_drvdata(dev);
  3902. int ret = 0;
  3903. if (priv->magic != ICNSS_MAGIC) {
  3904. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3905. dev, priv, priv->magic);
  3906. return -EINVAL;
  3907. }
  3908. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3909. if (!priv->ops || !priv->ops->suspend_noirq ||
  3910. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3911. goto out;
  3912. ret = priv->ops->suspend_noirq(dev);
  3913. out:
  3914. if (ret == 0) {
  3915. priv->stats.pm_suspend_noirq++;
  3916. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3917. } else {
  3918. priv->stats.pm_suspend_noirq_err++;
  3919. }
  3920. return ret;
  3921. }
  3922. static int icnss_pm_resume_noirq(struct device *dev)
  3923. {
  3924. struct icnss_priv *priv = dev_get_drvdata(dev);
  3925. int ret = 0;
  3926. if (priv->magic != ICNSS_MAGIC) {
  3927. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3928. dev, priv, priv->magic);
  3929. return -EINVAL;
  3930. }
  3931. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3932. if (!priv->ops || !priv->ops->resume_noirq ||
  3933. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3934. goto out;
  3935. ret = priv->ops->resume_noirq(dev);
  3936. out:
  3937. if (ret == 0) {
  3938. priv->stats.pm_resume_noirq++;
  3939. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3940. } else {
  3941. priv->stats.pm_resume_noirq_err++;
  3942. }
  3943. return ret;
  3944. }
  3945. static int icnss_pm_runtime_suspend(struct device *dev)
  3946. {
  3947. struct icnss_priv *priv = dev_get_drvdata(dev);
  3948. int ret = 0;
  3949. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3950. icnss_pr_err("Ignore runtime suspend:\n");
  3951. goto out;
  3952. }
  3953. if (priv->magic != ICNSS_MAGIC) {
  3954. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3955. dev, priv, priv->magic);
  3956. return -EINVAL;
  3957. }
  3958. if (!priv->ops || !priv->ops->runtime_suspend ||
  3959. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3960. goto out;
  3961. icnss_pr_vdbg("Runtime suspend\n");
  3962. ret = priv->ops->runtime_suspend(dev);
  3963. if (!ret) {
  3964. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3965. !test_bit(ICNSS_MODE_ON, &priv->state))
  3966. return 0;
  3967. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3968. ICNSS_SMP2P_OUT_POWER_SAVE);
  3969. }
  3970. out:
  3971. return ret;
  3972. }
  3973. static int icnss_pm_runtime_resume(struct device *dev)
  3974. {
  3975. struct icnss_priv *priv = dev_get_drvdata(dev);
  3976. int ret = 0;
  3977. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3978. icnss_pr_err("Ignore runtime resume\n");
  3979. goto out;
  3980. }
  3981. if (priv->magic != ICNSS_MAGIC) {
  3982. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3983. dev, priv, priv->magic);
  3984. return -EINVAL;
  3985. }
  3986. if (!priv->ops || !priv->ops->runtime_resume ||
  3987. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3988. goto out;
  3989. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3990. ret = priv->ops->runtime_resume(dev);
  3991. out:
  3992. return ret;
  3993. }
  3994. static int icnss_pm_runtime_idle(struct device *dev)
  3995. {
  3996. struct icnss_priv *priv = dev_get_drvdata(dev);
  3997. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3998. icnss_pr_err("Ignore runtime idle\n");
  3999. goto out;
  4000. }
  4001. icnss_pr_vdbg("Runtime idle\n");
  4002. pm_request_autosuspend(dev);
  4003. out:
  4004. return -EBUSY;
  4005. }
  4006. #endif
  4007. static const struct dev_pm_ops icnss_pm_ops = {
  4008. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  4009. icnss_pm_resume)
  4010. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  4011. icnss_pm_resume_noirq)
  4012. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  4013. icnss_pm_runtime_idle)
  4014. };
  4015. static struct platform_driver icnss_driver = {
  4016. .probe = icnss_probe,
  4017. .remove = icnss_remove,
  4018. .driver = {
  4019. .name = "icnss2",
  4020. .pm = &icnss_pm_ops,
  4021. .of_match_table = icnss_dt_match,
  4022. },
  4023. };
  4024. static int __init icnss_initialize(void)
  4025. {
  4026. icnss_debug_init();
  4027. return platform_driver_register(&icnss_driver);
  4028. }
  4029. static void __exit icnss_exit(void)
  4030. {
  4031. platform_driver_unregister(&icnss_driver);
  4032. icnss_debug_deinit();
  4033. }
  4034. module_init(icnss_initialize);
  4035. module_exit(icnss_exit);
  4036. MODULE_LICENSE("GPL v2");
  4037. MODULE_DESCRIPTION("iWCN CORE platform driver");