dp_rx_err.c 103 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_tx.h"
  23. #include "dp_peer.h"
  24. #include "dp_internal.h"
  25. #include "hal_api.h"
  26. #include "qdf_trace.h"
  27. #include "qdf_nbuf.h"
  28. #include "dp_rx_defrag.h"
  29. #include "dp_ipa.h"
  30. #ifdef WIFI_MONITOR_SUPPORT
  31. #include "dp_htt.h"
  32. #include <dp_mon.h>
  33. #endif
  34. #ifdef FEATURE_WDS
  35. #include "dp_txrx_wds.h"
  36. #endif
  37. #include <enet.h> /* LLC_SNAP_HDR_LEN */
  38. #include "qdf_net_types.h"
  39. #include "dp_rx_buffer_pool.h"
  40. #define dp_rx_err_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_RX_ERROR, params)
  41. #define dp_rx_err_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_RX_ERROR, params)
  42. #define dp_rx_err_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_RX_ERROR, params)
  43. #define dp_rx_err_info(params...) \
  44. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX_ERROR, ## params)
  45. #define dp_rx_err_info_rl(params...) \
  46. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX_ERROR, ## params)
  47. #define dp_rx_err_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_RX_ERROR, params)
  48. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  49. /* Max regular Rx packet routing error */
  50. #define DP_MAX_REG_RX_ROUTING_ERRS_THRESHOLD 20
  51. #define DP_MAX_REG_RX_ROUTING_ERRS_IN_TIMEOUT 10
  52. #define DP_RX_ERR_ROUTE_TIMEOUT_US (5 * 1000 * 1000) /* micro seconds */
  53. #ifdef FEATURE_MEC
  54. bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  55. struct dp_txrx_peer *txrx_peer,
  56. uint8_t *rx_tlv_hdr,
  57. qdf_nbuf_t nbuf)
  58. {
  59. struct dp_vdev *vdev = txrx_peer->vdev;
  60. struct dp_pdev *pdev = vdev->pdev;
  61. struct dp_mec_entry *mecentry = NULL;
  62. struct dp_ast_entry *ase = NULL;
  63. uint16_t sa_idx = 0;
  64. uint8_t *data;
  65. /*
  66. * Multicast Echo Check is required only if vdev is STA and
  67. * received pkt is a multicast/broadcast pkt. otherwise
  68. * skip the MEC check.
  69. */
  70. if (vdev->opmode != wlan_op_mode_sta)
  71. return false;
  72. if (!hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc, rx_tlv_hdr))
  73. return false;
  74. data = qdf_nbuf_data(nbuf);
  75. /*
  76. * if the received pkts src mac addr matches with vdev
  77. * mac address then drop the pkt as it is looped back
  78. */
  79. if (!(qdf_mem_cmp(&data[QDF_MAC_ADDR_SIZE],
  80. vdev->mac_addr.raw,
  81. QDF_MAC_ADDR_SIZE)))
  82. return true;
  83. /*
  84. * In case of qwrap isolation mode, donot drop loopback packets.
  85. * In isolation mode, all packets from the wired stations need to go
  86. * to rootap and loop back to reach the wireless stations and
  87. * vice-versa.
  88. */
  89. if (qdf_unlikely(vdev->isolation_vdev))
  90. return false;
  91. /*
  92. * if the received pkts src mac addr matches with the
  93. * wired PCs MAC addr which is behind the STA or with
  94. * wireless STAs MAC addr which are behind the Repeater,
  95. * then drop the pkt as it is looped back
  96. */
  97. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  98. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  99. if ((sa_idx < 0) ||
  100. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  101. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  102. "invalid sa_idx: %d", sa_idx);
  103. qdf_assert_always(0);
  104. }
  105. qdf_spin_lock_bh(&soc->ast_lock);
  106. ase = soc->ast_table[sa_idx];
  107. /*
  108. * this check was not needed since MEC is not dependent on AST,
  109. * but if we dont have this check SON has some issues in
  110. * dual backhaul scenario. in APS SON mode, client connected
  111. * to RE 2G and sends multicast packets. the RE sends it to CAP
  112. * over 5G backhaul. the CAP loopback it on 2G to RE.
  113. * On receiving in 2G STA vap, we assume that client has roamed
  114. * and kickout the client.
  115. */
  116. if (ase && (ase->peer_id != txrx_peer->peer_id)) {
  117. qdf_spin_unlock_bh(&soc->ast_lock);
  118. goto drop;
  119. }
  120. qdf_spin_unlock_bh(&soc->ast_lock);
  121. }
  122. qdf_spin_lock_bh(&soc->mec_lock);
  123. mecentry = dp_peer_mec_hash_find_by_pdevid(soc, pdev->pdev_id,
  124. &data[QDF_MAC_ADDR_SIZE]);
  125. if (!mecentry) {
  126. qdf_spin_unlock_bh(&soc->mec_lock);
  127. return false;
  128. }
  129. qdf_spin_unlock_bh(&soc->mec_lock);
  130. drop:
  131. dp_rx_err_info("%pK: received pkt with same src mac " QDF_MAC_ADDR_FMT,
  132. soc, QDF_MAC_ADDR_REF(&data[QDF_MAC_ADDR_SIZE]));
  133. return true;
  134. }
  135. #endif
  136. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  137. void dp_rx_link_desc_refill_duplicate_check(
  138. struct dp_soc *soc,
  139. struct hal_buf_info *buf_info,
  140. hal_buff_addrinfo_t ring_buf_info)
  141. {
  142. struct hal_buf_info current_link_desc_buf_info = { 0 };
  143. /* do duplicate link desc address check */
  144. hal_rx_buffer_addr_info_get_paddr(ring_buf_info,
  145. &current_link_desc_buf_info);
  146. /*
  147. * TODO - Check if the hal soc api call can be removed
  148. * since the cookie is just used for print.
  149. * buffer_addr_info is the first element of ring_desc
  150. */
  151. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  152. (uint32_t *)ring_buf_info,
  153. &current_link_desc_buf_info);
  154. if (qdf_unlikely(current_link_desc_buf_info.paddr ==
  155. buf_info->paddr)) {
  156. dp_info_rl("duplicate link desc addr: %llu, cookie: 0x%x",
  157. current_link_desc_buf_info.paddr,
  158. current_link_desc_buf_info.sw_cookie);
  159. DP_STATS_INC(soc, rx.err.dup_refill_link_desc, 1);
  160. }
  161. *buf_info = current_link_desc_buf_info;
  162. }
  163. /**
  164. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  165. * (WBM) by address
  166. *
  167. * @soc: core DP main context
  168. * @link_desc_addr: link descriptor addr
  169. *
  170. * Return: QDF_STATUS
  171. */
  172. QDF_STATUS
  173. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  174. hal_buff_addrinfo_t link_desc_addr,
  175. uint8_t bm_action)
  176. {
  177. struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
  178. hal_ring_handle_t wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
  179. hal_soc_handle_t hal_soc = soc->hal_soc;
  180. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  181. void *src_srng_desc;
  182. if (!wbm_rel_srng) {
  183. dp_rx_err_err("%pK: WBM RELEASE RING not initialized", soc);
  184. return status;
  185. }
  186. /* do duplicate link desc address check */
  187. dp_rx_link_desc_refill_duplicate_check(
  188. soc,
  189. &soc->last_op_info.wbm_rel_link_desc,
  190. link_desc_addr);
  191. if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
  192. /* TODO */
  193. /*
  194. * Need API to convert from hal_ring pointer to
  195. * Ring Type / Ring Id combo
  196. */
  197. dp_rx_err_err("%pK: HAL RING Access For WBM Release SRNG Failed - %pK",
  198. soc, wbm_rel_srng);
  199. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  200. goto done;
  201. }
  202. src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
  203. if (qdf_likely(src_srng_desc)) {
  204. /* Return link descriptor through WBM ring (SW2WBM)*/
  205. hal_rx_msdu_link_desc_set(hal_soc,
  206. src_srng_desc, link_desc_addr, bm_action);
  207. status = QDF_STATUS_SUCCESS;
  208. } else {
  209. struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
  210. DP_STATS_INC(soc, rx.err.hal_ring_access_full_fail, 1);
  211. dp_info_rl("WBM Release Ring (Id %d) Full(Fail CNT %u)",
  212. srng->ring_id,
  213. soc->stats.rx.err.hal_ring_access_full_fail);
  214. dp_info_rl("HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
  215. *srng->u.src_ring.hp_addr,
  216. srng->u.src_ring.reap_hp,
  217. *srng->u.src_ring.tp_addr,
  218. srng->u.src_ring.cached_tp);
  219. QDF_BUG(0);
  220. }
  221. done:
  222. hal_srng_access_end(hal_soc, wbm_rel_srng);
  223. return status;
  224. }
  225. qdf_export_symbol(dp_rx_link_desc_return_by_addr);
  226. /**
  227. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  228. * (WBM), following error handling
  229. *
  230. * @soc: core DP main context
  231. * @ring_desc: opaque pointer to the REO error ring descriptor
  232. *
  233. * Return: QDF_STATUS
  234. */
  235. QDF_STATUS
  236. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  237. uint8_t bm_action)
  238. {
  239. void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
  240. return dp_rx_link_desc_return_by_addr(soc, buf_addr_info, bm_action);
  241. }
  242. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  243. /**
  244. * dp_rx_msdus_drop() - Drops all MSDU's per MPDU
  245. *
  246. * @soc: core txrx main context
  247. * @ring_desc: opaque pointer to the REO error ring descriptor
  248. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  249. * @head: head of the local descriptor free-list
  250. * @tail: tail of the local descriptor free-list
  251. * @quota: No. of units (packets) that can be serviced in one shot.
  252. *
  253. * This function is used to drop all MSDU in an MPDU
  254. *
  255. * Return: uint32_t: No. of elements processed
  256. */
  257. static uint32_t
  258. dp_rx_msdus_drop(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  259. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  260. uint8_t *mac_id,
  261. uint32_t quota)
  262. {
  263. uint32_t rx_bufs_used = 0;
  264. void *link_desc_va;
  265. struct hal_buf_info buf_info;
  266. struct dp_pdev *pdev;
  267. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  268. int i;
  269. uint8_t *rx_tlv_hdr;
  270. uint32_t tid;
  271. struct rx_desc_pool *rx_desc_pool;
  272. struct dp_rx_desc *rx_desc;
  273. /* First field in REO Dst ring Desc is buffer_addr_info */
  274. void *buf_addr_info = ring_desc;
  275. struct buffer_addr_info cur_link_desc_addr_info = { 0 };
  276. struct buffer_addr_info next_link_desc_addr_info = { 0 };
  277. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &buf_info);
  278. /* buffer_addr_info is the first element of ring_desc */
  279. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  280. (uint32_t *)ring_desc,
  281. &buf_info);
  282. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  283. if (!link_desc_va) {
  284. dp_rx_err_debug("link desc va is null, soc %pk", soc);
  285. return rx_bufs_used;
  286. }
  287. more_msdu_link_desc:
  288. /* No UNMAP required -- this is "malloc_consistent" memory */
  289. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  290. &mpdu_desc_info->msdu_count);
  291. for (i = 0; (i < mpdu_desc_info->msdu_count); i++) {
  292. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  293. soc, msdu_list.sw_cookie[i]);
  294. qdf_assert_always(rx_desc);
  295. /* all buffers from a MSDU link link belong to same pdev */
  296. *mac_id = rx_desc->pool_id;
  297. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  298. if (!pdev) {
  299. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  300. soc, rx_desc->pool_id);
  301. return rx_bufs_used;
  302. }
  303. if (!dp_rx_desc_check_magic(rx_desc)) {
  304. dp_rx_err_err("%pK: Invalid rx_desc cookie=%d",
  305. soc, msdu_list.sw_cookie[i]);
  306. return rx_bufs_used;
  307. }
  308. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  309. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  310. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, rx_desc->nbuf);
  311. rx_desc->unmapped = 1;
  312. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  313. rx_desc->rx_buf_start = qdf_nbuf_data(rx_desc->nbuf);
  314. rx_bufs_used++;
  315. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  316. rx_desc->rx_buf_start);
  317. dp_rx_err_err("%pK: Packet received with PN error for tid :%d",
  318. soc, tid);
  319. rx_tlv_hdr = qdf_nbuf_data(rx_desc->nbuf);
  320. if (hal_rx_encryption_info_valid(soc->hal_soc, rx_tlv_hdr))
  321. hal_rx_print_pn(soc->hal_soc, rx_tlv_hdr);
  322. dp_rx_err_send_pktlog(soc, pdev, mpdu_desc_info,
  323. rx_desc->nbuf,
  324. QDF_TX_RX_STATUS_DROP, true);
  325. /* Just free the buffers */
  326. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf, *mac_id);
  327. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  328. &pdev->free_list_tail, rx_desc);
  329. }
  330. /*
  331. * If the msdu's are spread across multiple link-descriptors,
  332. * we cannot depend solely on the msdu_count(e.g., if msdu is
  333. * spread across multiple buffers).Hence, it is
  334. * necessary to check the next link_descriptor and release
  335. * all the msdu's that are part of it.
  336. */
  337. hal_rx_get_next_msdu_link_desc_buf_addr_info(
  338. link_desc_va,
  339. &next_link_desc_addr_info);
  340. if (hal_rx_is_buf_addr_info_valid(
  341. &next_link_desc_addr_info)) {
  342. /* Clear the next link desc info for the current link_desc */
  343. hal_rx_clear_next_msdu_link_desc_buf_addr_info(link_desc_va);
  344. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  345. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  346. hal_rx_buffer_addr_info_get_paddr(
  347. &next_link_desc_addr_info,
  348. &buf_info);
  349. /* buffer_addr_info is the first element of ring_desc */
  350. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  351. (uint32_t *)&next_link_desc_addr_info,
  352. &buf_info);
  353. cur_link_desc_addr_info = next_link_desc_addr_info;
  354. buf_addr_info = &cur_link_desc_addr_info;
  355. link_desc_va =
  356. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  357. goto more_msdu_link_desc;
  358. }
  359. quota--;
  360. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  361. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  362. return rx_bufs_used;
  363. }
  364. /**
  365. * dp_rx_pn_error_handle() - Handles PN check errors
  366. *
  367. * @soc: core txrx main context
  368. * @ring_desc: opaque pointer to the REO error ring descriptor
  369. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  370. * @head: head of the local descriptor free-list
  371. * @tail: tail of the local descriptor free-list
  372. * @quota: No. of units (packets) that can be serviced in one shot.
  373. *
  374. * This function implements PN error handling
  375. * If the peer is configured to ignore the PN check errors
  376. * or if DP feels, that this frame is still OK, the frame can be
  377. * re-injected back to REO to use some of the other features
  378. * of REO e.g. duplicate detection/routing to other cores
  379. *
  380. * Return: uint32_t: No. of elements processed
  381. */
  382. static uint32_t
  383. dp_rx_pn_error_handle(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  384. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  385. uint8_t *mac_id,
  386. uint32_t quota)
  387. {
  388. uint16_t peer_id;
  389. uint32_t rx_bufs_used = 0;
  390. struct dp_txrx_peer *txrx_peer;
  391. bool peer_pn_policy = false;
  392. dp_txrx_ref_handle txrx_ref_handle = NULL;
  393. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  394. mpdu_desc_info->peer_meta_data);
  395. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  396. &txrx_ref_handle,
  397. DP_MOD_ID_RX_ERR);
  398. if (qdf_likely(txrx_peer)) {
  399. /*
  400. * TODO: Check for peer specific policies & set peer_pn_policy
  401. */
  402. dp_err_rl("discard rx due to PN error for peer %pK",
  403. txrx_peer);
  404. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  405. }
  406. dp_rx_err_err("%pK: Packet received with PN error", soc);
  407. /* No peer PN policy -- definitely drop */
  408. if (!peer_pn_policy)
  409. rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
  410. mpdu_desc_info,
  411. mac_id, quota);
  412. return rx_bufs_used;
  413. }
  414. #ifdef DP_RX_DELIVER_ALL_OOR_FRAMES
  415. /**
  416. * dp_rx_deliver_oor_frame() - deliver OOR frames to stack
  417. * @soc: Datapath soc handler
  418. * @peer: pointer to DP peer
  419. * @nbuf: pointer to the skb of RX frame
  420. * @frame_mask: the mask for special frame needed
  421. * @rx_tlv_hdr: start of rx tlv header
  422. *
  423. * note: Msdu_len must have been stored in QDF_NBUF_CB_RX_PKT_LEN(nbuf) and
  424. * single nbuf is expected.
  425. *
  426. * return: true - nbuf has been delivered to stack, false - not.
  427. */
  428. static bool
  429. dp_rx_deliver_oor_frame(struct dp_soc *soc,
  430. struct dp_txrx_peer *txrx_peer,
  431. qdf_nbuf_t nbuf, uint32_t frame_mask,
  432. uint8_t *rx_tlv_hdr)
  433. {
  434. uint32_t l2_hdr_offset = 0;
  435. uint16_t msdu_len = 0;
  436. uint32_t skip_len;
  437. l2_hdr_offset =
  438. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  439. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  440. skip_len = l2_hdr_offset;
  441. } else {
  442. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  443. skip_len = l2_hdr_offset + soc->rx_pkt_tlv_size;
  444. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  445. }
  446. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  447. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  448. qdf_nbuf_pull_head(nbuf, skip_len);
  449. qdf_nbuf_set_exc_frame(nbuf, 1);
  450. dp_info_rl("OOR frame, mpdu sn 0x%x",
  451. hal_rx_get_rx_sequence(soc->hal_soc, rx_tlv_hdr));
  452. dp_rx_deliver_to_stack(soc, txrx_peer->vdev, txrx_peer, nbuf, NULL);
  453. return true;
  454. }
  455. #else
  456. static bool
  457. dp_rx_deliver_oor_frame(struct dp_soc *soc,
  458. struct dp_txrx_peer *txrx_peer,
  459. qdf_nbuf_t nbuf, uint32_t frame_mask,
  460. uint8_t *rx_tlv_hdr)
  461. {
  462. return dp_rx_deliver_special_frame(soc, txrx_peer, nbuf, frame_mask,
  463. rx_tlv_hdr);
  464. }
  465. #endif
  466. /**
  467. * dp_rx_oor_handle() - Handles the msdu which is OOR error
  468. *
  469. * @soc: core txrx main context
  470. * @nbuf: pointer to msdu skb
  471. * @peer_id: dp peer ID
  472. * @rx_tlv_hdr: start of rx tlv header
  473. *
  474. * This function process the msdu delivered from REO2TCL
  475. * ring with error type OOR
  476. *
  477. * Return: None
  478. */
  479. static void
  480. dp_rx_oor_handle(struct dp_soc *soc,
  481. qdf_nbuf_t nbuf,
  482. uint16_t peer_id,
  483. uint8_t *rx_tlv_hdr)
  484. {
  485. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  486. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  487. struct dp_txrx_peer *txrx_peer = NULL;
  488. dp_txrx_ref_handle txrx_ref_handle = NULL;
  489. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  490. &txrx_ref_handle,
  491. DP_MOD_ID_RX_ERR);
  492. if (!txrx_peer) {
  493. dp_info_rl("peer not found");
  494. goto free_nbuf;
  495. }
  496. if (dp_rx_deliver_oor_frame(soc, txrx_peer, nbuf, frame_mask,
  497. rx_tlv_hdr)) {
  498. DP_STATS_INC(soc, rx.err.reo_err_oor_to_stack, 1);
  499. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  500. return;
  501. }
  502. free_nbuf:
  503. if (txrx_peer)
  504. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  505. DP_STATS_INC(soc, rx.err.reo_err_oor_drop, 1);
  506. dp_rx_nbuf_free(nbuf);
  507. }
  508. /**
  509. * dp_rx_err_nbuf_pn_check() - Check if the PN number of this current packet
  510. * is a monotonous increment of packet number
  511. * from the previous successfully re-ordered
  512. * frame.
  513. * @soc: Datapath SOC handle
  514. * @ring_desc: REO ring descriptor
  515. * @nbuf: Current packet
  516. *
  517. * Return: QDF_STATUS_SUCCESS, if the pn check passes, else QDF_STATUS_E_FAILURE
  518. */
  519. static inline QDF_STATUS
  520. dp_rx_err_nbuf_pn_check(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  521. qdf_nbuf_t nbuf)
  522. {
  523. uint64_t prev_pn, curr_pn[2];
  524. if (!hal_rx_encryption_info_valid(soc->hal_soc, qdf_nbuf_data(nbuf)))
  525. return QDF_STATUS_SUCCESS;
  526. hal_rx_reo_prev_pn_get(soc->hal_soc, ring_desc, &prev_pn);
  527. hal_rx_tlv_get_pn_num(soc->hal_soc, qdf_nbuf_data(nbuf), curr_pn);
  528. if (curr_pn[0] > prev_pn)
  529. return QDF_STATUS_SUCCESS;
  530. return QDF_STATUS_E_FAILURE;
  531. }
  532. #ifdef WLAN_SKIP_BAR_UPDATE
  533. static
  534. void dp_rx_err_handle_bar(struct dp_soc *soc,
  535. struct dp_peer *peer,
  536. qdf_nbuf_t nbuf)
  537. {
  538. dp_info_rl("BAR update to H.W is skipped");
  539. DP_STATS_INC(soc, rx.err.bar_handle_fail_count, 1);
  540. }
  541. #else
  542. static
  543. void dp_rx_err_handle_bar(struct dp_soc *soc,
  544. struct dp_peer *peer,
  545. qdf_nbuf_t nbuf)
  546. {
  547. uint8_t *rx_tlv_hdr;
  548. unsigned char type, subtype;
  549. uint16_t start_seq_num;
  550. uint32_t tid;
  551. QDF_STATUS status;
  552. struct ieee80211_frame_bar *bar;
  553. /*
  554. * 1. Is this a BAR frame. If not Discard it.
  555. * 2. If it is, get the peer id, tid, ssn
  556. * 2a Do a tid update
  557. */
  558. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  559. bar = (struct ieee80211_frame_bar *)(rx_tlv_hdr + soc->rx_pkt_tlv_size);
  560. type = bar->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
  561. subtype = bar->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
  562. if (!(type == IEEE80211_FC0_TYPE_CTL &&
  563. subtype == QDF_IEEE80211_FC0_SUBTYPE_BAR)) {
  564. dp_err_rl("Not a BAR frame!");
  565. return;
  566. }
  567. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc, rx_tlv_hdr);
  568. qdf_assert_always(tid < DP_MAX_TIDS);
  569. start_seq_num = le16toh(bar->i_seq) >> IEEE80211_SEQ_SEQ_SHIFT;
  570. dp_info_rl("tid %u window_size %u start_seq_num %u",
  571. tid, peer->rx_tid[tid].ba_win_size, start_seq_num);
  572. status = dp_rx_tid_update_wifi3(peer, tid,
  573. peer->rx_tid[tid].ba_win_size,
  574. start_seq_num,
  575. true);
  576. if (status != QDF_STATUS_SUCCESS) {
  577. dp_err_rl("failed to handle bar frame update rx tid");
  578. DP_STATS_INC(soc, rx.err.bar_handle_fail_count, 1);
  579. } else {
  580. DP_STATS_INC(soc, rx.err.ssn_update_count, 1);
  581. }
  582. }
  583. #endif
  584. /**
  585. * _dp_rx_bar_frame_handle(): Core of the BAR frame handling
  586. * @soc: Datapath SoC handle
  587. * @nbuf: packet being processed
  588. * @mpdu_desc_info: mpdu desc info for the current packet
  589. * @tid: tid on which the packet arrived
  590. * @err_status: Flag to indicate if REO encountered an error while routing this
  591. * frame
  592. * @error_code: REO error code
  593. *
  594. * Return: None
  595. */
  596. static void
  597. _dp_rx_bar_frame_handle(struct dp_soc *soc, qdf_nbuf_t nbuf,
  598. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  599. uint32_t tid, uint8_t err_status, uint32_t error_code)
  600. {
  601. uint16_t peer_id;
  602. struct dp_peer *peer;
  603. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  604. mpdu_desc_info->peer_meta_data);
  605. peer = dp_peer_get_tgt_peer_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  606. if (!peer)
  607. return;
  608. dp_info_rl("BAR frame: "
  609. " peer_id = %d"
  610. " tid = %u"
  611. " SSN = %d"
  612. " error status = %d",
  613. peer->peer_id,
  614. tid,
  615. mpdu_desc_info->mpdu_seq,
  616. err_status);
  617. if (err_status == HAL_REO_ERROR_DETECTED) {
  618. switch (error_code) {
  619. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  620. case HAL_REO_ERR_BAR_FRAME_OOR:
  621. dp_rx_err_handle_bar(soc, peer, nbuf);
  622. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  623. break;
  624. default:
  625. DP_STATS_INC(soc, rx.bar_frame, 1);
  626. }
  627. }
  628. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  629. }
  630. /**
  631. * dp_rx_bar_frame_handle() - Function to handle err BAR frames
  632. * @soc: core DP main context
  633. * @ring_desc: Hal ring desc
  634. * @rx_desc: dp rx desc
  635. * @mpdu_desc_info: mpdu desc info
  636. *
  637. * Handle the error BAR frames received. Ensure the SOC level
  638. * stats are updated based on the REO error code. The BAR frames
  639. * are further processed by updating the Rx tids with the start
  640. * sequence number (SSN) and BA window size. Desc is returned
  641. * to the free desc list
  642. *
  643. * Return: none
  644. */
  645. static void
  646. dp_rx_bar_frame_handle(struct dp_soc *soc,
  647. hal_ring_desc_t ring_desc,
  648. struct dp_rx_desc *rx_desc,
  649. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  650. uint8_t err_status,
  651. uint32_t err_code)
  652. {
  653. qdf_nbuf_t nbuf;
  654. struct dp_pdev *pdev;
  655. struct rx_desc_pool *rx_desc_pool;
  656. uint8_t *rx_tlv_hdr;
  657. uint32_t tid;
  658. nbuf = rx_desc->nbuf;
  659. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  660. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  661. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  662. rx_desc->unmapped = 1;
  663. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  664. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  665. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  666. rx_tlv_hdr);
  667. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  668. if (!pdev) {
  669. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  670. soc, rx_desc->pool_id);
  671. return;
  672. }
  673. _dp_rx_bar_frame_handle(soc, nbuf, mpdu_desc_info, tid, err_status,
  674. err_code);
  675. dp_rx_err_send_pktlog(soc, pdev, mpdu_desc_info, nbuf,
  676. QDF_TX_RX_STATUS_DROP, true);
  677. dp_rx_link_desc_return(soc, ring_desc,
  678. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  679. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  680. rx_desc->pool_id);
  681. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  682. &pdev->free_list_tail,
  683. rx_desc);
  684. }
  685. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  686. /**
  687. * dp_2k_jump_handle() - Function to handle 2k jump exception
  688. * on WBM ring
  689. *
  690. * @soc: core DP main context
  691. * @nbuf: buffer pointer
  692. * @rx_tlv_hdr: start of rx tlv header
  693. * @peer_id: peer id of first msdu
  694. * @tid: Tid for which exception occurred
  695. *
  696. * This function handles 2k jump violations arising out
  697. * of receiving aggregates in non BA case. This typically
  698. * may happen if aggregates are received on a QOS enabled TID
  699. * while Rx window size is still initialized to value of 2. Or
  700. * it may also happen if negotiated window size is 1 but peer
  701. * sends aggregates.
  702. *
  703. */
  704. void
  705. dp_2k_jump_handle(struct dp_soc *soc,
  706. qdf_nbuf_t nbuf,
  707. uint8_t *rx_tlv_hdr,
  708. uint16_t peer_id,
  709. uint8_t tid)
  710. {
  711. struct dp_peer *peer = NULL;
  712. struct dp_rx_tid *rx_tid = NULL;
  713. uint32_t frame_mask = FRAME_MASK_IPV4_ARP;
  714. peer = dp_peer_get_ref_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  715. if (!peer) {
  716. dp_rx_err_info_rl("%pK: peer not found", soc);
  717. goto free_nbuf;
  718. }
  719. if (tid >= DP_MAX_TIDS) {
  720. dp_info_rl("invalid tid");
  721. goto nbuf_deliver;
  722. }
  723. rx_tid = &peer->rx_tid[tid];
  724. qdf_spin_lock_bh(&rx_tid->tid_lock);
  725. /* only if BA session is active, allow send Delba */
  726. if (rx_tid->ba_status != DP_RX_BA_ACTIVE) {
  727. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  728. goto nbuf_deliver;
  729. }
  730. if (!rx_tid->delba_tx_status) {
  731. rx_tid->delba_tx_retry++;
  732. rx_tid->delba_tx_status = 1;
  733. rx_tid->delba_rcode =
  734. IEEE80211_REASON_QOS_SETUP_REQUIRED;
  735. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  736. if (soc->cdp_soc.ol_ops->send_delba) {
  737. DP_STATS_INC(soc, rx.err.rx_2k_jump_delba_sent,
  738. 1);
  739. soc->cdp_soc.ol_ops->send_delba(
  740. peer->vdev->pdev->soc->ctrl_psoc,
  741. peer->vdev->vdev_id,
  742. peer->mac_addr.raw,
  743. tid,
  744. rx_tid->delba_rcode,
  745. CDP_DELBA_2K_JUMP);
  746. }
  747. } else {
  748. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  749. }
  750. nbuf_deliver:
  751. if (dp_rx_deliver_special_frame(soc, peer->txrx_peer, nbuf, frame_mask,
  752. rx_tlv_hdr)) {
  753. DP_STATS_INC(soc, rx.err.rx_2k_jump_to_stack, 1);
  754. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  755. return;
  756. }
  757. free_nbuf:
  758. if (peer)
  759. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  760. DP_STATS_INC(soc, rx.err.rx_2k_jump_drop, 1);
  761. dp_rx_nbuf_free(nbuf);
  762. }
  763. #if defined(QCA_WIFI_QCA6390) || defined(QCA_WIFI_QCA6490) || \
  764. defined(QCA_WIFI_QCA6750) || defined(QCA_WIFI_KIWI)
  765. /**
  766. * dp_rx_null_q_handle_invalid_peer_id_exception() - to find exception
  767. * @soc: pointer to dp_soc struct
  768. * @pool_id: Pool id to find dp_pdev
  769. * @rx_tlv_hdr: TLV header of received packet
  770. * @nbuf: SKB
  771. *
  772. * In certain types of packets if peer_id is not correct then
  773. * driver may not be able find. Try finding peer by addr_2 of
  774. * received MPDU. If you find the peer then most likely sw_peer_id &
  775. * ast_idx is corrupted.
  776. *
  777. * Return: True if you find the peer by addr_2 of received MPDU else false
  778. */
  779. static bool
  780. dp_rx_null_q_handle_invalid_peer_id_exception(struct dp_soc *soc,
  781. uint8_t pool_id,
  782. uint8_t *rx_tlv_hdr,
  783. qdf_nbuf_t nbuf)
  784. {
  785. struct dp_peer *peer = NULL;
  786. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  787. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  788. struct ieee80211_frame *wh = (struct ieee80211_frame *)rx_pkt_hdr;
  789. if (!pdev) {
  790. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  791. soc, pool_id);
  792. return false;
  793. }
  794. /*
  795. * WAR- In certain types of packets if peer_id is not correct then
  796. * driver may not be able find. Try finding peer by addr_2 of
  797. * received MPDU
  798. */
  799. if (wh)
  800. peer = dp_peer_find_hash_find(soc, wh->i_addr2, 0,
  801. DP_VDEV_ALL, DP_MOD_ID_RX_ERR);
  802. if (peer) {
  803. dp_verbose_debug("MPDU sw_peer_id & ast_idx is corrupted");
  804. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  805. QDF_TRACE_LEVEL_DEBUG);
  806. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer_id,
  807. 1, qdf_nbuf_len(nbuf));
  808. dp_rx_nbuf_free(nbuf);
  809. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  810. return true;
  811. }
  812. return false;
  813. }
  814. #else
  815. static inline bool
  816. dp_rx_null_q_handle_invalid_peer_id_exception(struct dp_soc *soc,
  817. uint8_t pool_id,
  818. uint8_t *rx_tlv_hdr,
  819. qdf_nbuf_t nbuf)
  820. {
  821. return false;
  822. }
  823. #endif
  824. /**
  825. * dp_rx_check_pkt_len() - Check for pktlen validity
  826. * @soc: DP SOC context
  827. * @pkt_len: computed length of the pkt from caller in bytes
  828. *
  829. * Return: true if pktlen > RX_BUFFER_SIZE, else return false
  830. *
  831. */
  832. static inline
  833. bool dp_rx_check_pkt_len(struct dp_soc *soc, uint32_t pkt_len)
  834. {
  835. if (qdf_unlikely(pkt_len > RX_DATA_BUFFER_SIZE)) {
  836. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_pkt_len,
  837. 1, pkt_len);
  838. return true;
  839. } else {
  840. return false;
  841. }
  842. }
  843. /*
  844. * dp_rx_deliver_to_osif_stack() - function to deliver rx pkts to stack
  845. * @soc: DP soc
  846. * @vdv: DP vdev handle
  847. * @txrx_peer: pointer to the txrx_peer object
  848. * @nbuf: skb list head
  849. * @tail: skb list tail
  850. * @is_eapol: eapol pkt check
  851. *
  852. * Return: None
  853. */
  854. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  855. static inline void
  856. dp_rx_deliver_to_osif_stack(struct dp_soc *soc,
  857. struct dp_vdev *vdev,
  858. struct dp_txrx_peer *txrx_peer,
  859. qdf_nbuf_t nbuf,
  860. qdf_nbuf_t tail,
  861. bool is_eapol)
  862. {
  863. if (is_eapol && soc->eapol_over_control_port)
  864. dp_rx_eapol_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  865. else
  866. dp_rx_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  867. }
  868. #else
  869. static inline void
  870. dp_rx_deliver_to_osif_stack(struct dp_soc *soc,
  871. struct dp_vdev *vdev,
  872. struct dp_txrx_peer *txrx_peer,
  873. qdf_nbuf_t nbuf,
  874. qdf_nbuf_t tail,
  875. bool is_eapol)
  876. {
  877. dp_rx_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  878. }
  879. #endif
  880. #ifdef WLAN_FEATURE_11BE_MLO
  881. /*
  882. * dp_rx_err_match_dhost() - function to check whether dest-mac is correct
  883. * @eh: Ethernet header of incoming packet
  884. * @vdev: dp_vdev object of the VAP on which this data packet is received
  885. *
  886. * Return: 1 if the destination mac is correct,
  887. * 0 if this frame is not correctly destined to this VAP/MLD
  888. */
  889. int dp_rx_err_match_dhost(qdf_ether_header_t *eh, struct dp_vdev *vdev)
  890. {
  891. return ((qdf_mem_cmp(eh->ether_dhost, &vdev->mac_addr.raw[0],
  892. QDF_MAC_ADDR_SIZE) == 0) ||
  893. (qdf_mem_cmp(eh->ether_dhost, &vdev->mld_mac_addr.raw[0],
  894. QDF_MAC_ADDR_SIZE) == 0));
  895. }
  896. #else
  897. int dp_rx_err_match_dhost(qdf_ether_header_t *eh, struct dp_vdev *vdev)
  898. {
  899. return (qdf_mem_cmp(eh->ether_dhost, &vdev->mac_addr.raw[0],
  900. QDF_MAC_ADDR_SIZE) == 0);
  901. }
  902. #endif
  903. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  904. /**
  905. * dp_rx_err_drop_3addr_mcast() - Check if feature drop_3ddr_mcast is enabled
  906. * If so, drop the multicast frame.
  907. * @vdev: datapath vdev
  908. * @rx_tlv_hdr: TLV header
  909. *
  910. * Return: true if packet is to be dropped,
  911. * false, if packet is not dropped.
  912. */
  913. static bool
  914. dp_rx_err_drop_3addr_mcast(struct dp_vdev *vdev, uint8_t *rx_tlv_hdr)
  915. {
  916. struct dp_soc *soc = vdev->pdev->soc;
  917. if (!vdev->drop_3addr_mcast)
  918. return false;
  919. if (vdev->opmode != wlan_op_mode_sta)
  920. return false;
  921. if (hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc, rx_tlv_hdr))
  922. return true;
  923. return false;
  924. }
  925. /**
  926. * dp_rx_err_is_pn_check_needed() - Check if the packet number check is needed
  927. * for this frame received in REO error ring.
  928. * @soc: Datapath SOC handle
  929. * @error: REO error detected or not
  930. * @error_code: Error code in case of REO error
  931. *
  932. * Return: true if pn check if needed in software,
  933. * false, if pn check if not needed.
  934. */
  935. static inline bool
  936. dp_rx_err_is_pn_check_needed(struct dp_soc *soc, uint8_t error,
  937. uint32_t error_code)
  938. {
  939. return (soc->features.pn_in_reo_dest &&
  940. (error == HAL_REO_ERROR_DETECTED &&
  941. (hal_rx_reo_is_2k_jump(error_code) ||
  942. hal_rx_reo_is_oor_error(error_code) ||
  943. hal_rx_reo_is_bar_oor_2k_jump(error_code))));
  944. }
  945. /**
  946. * dp_rx_null_q_desc_handle() - Function to handle NULL Queue
  947. * descriptor violation on either a
  948. * REO or WBM ring
  949. *
  950. * @soc: core DP main context
  951. * @nbuf: buffer pointer
  952. * @rx_tlv_hdr: start of rx tlv header
  953. * @pool_id: mac id
  954. * @txrx_peer: txrx peer handle
  955. *
  956. * This function handles NULL queue descriptor violations arising out
  957. * a missing REO queue for a given peer or a given TID. This typically
  958. * may happen if a packet is received on a QOS enabled TID before the
  959. * ADDBA negotiation for that TID, when the TID queue is setup. Or
  960. * it may also happen for MC/BC frames if they are not routed to the
  961. * non-QOS TID queue, in the absence of any other default TID queue.
  962. * This error can show up both in a REO destination or WBM release ring.
  963. *
  964. * Return: QDF_STATUS_SUCCESS, if nbuf handled successfully. QDF status code
  965. * if nbuf could not be handled or dropped.
  966. */
  967. static QDF_STATUS
  968. dp_rx_null_q_desc_handle(struct dp_soc *soc, qdf_nbuf_t nbuf,
  969. uint8_t *rx_tlv_hdr, uint8_t pool_id,
  970. struct dp_txrx_peer *txrx_peer)
  971. {
  972. uint32_t pkt_len;
  973. uint16_t msdu_len;
  974. struct dp_vdev *vdev;
  975. uint8_t tid;
  976. qdf_ether_header_t *eh;
  977. struct hal_rx_msdu_metadata msdu_metadata;
  978. uint16_t sa_idx = 0;
  979. bool is_eapol = 0;
  980. bool enh_flag;
  981. qdf_nbuf_set_rx_chfrag_start(nbuf,
  982. hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  983. rx_tlv_hdr));
  984. qdf_nbuf_set_rx_chfrag_end(nbuf,
  985. hal_rx_msdu_end_last_msdu_get(soc->hal_soc,
  986. rx_tlv_hdr));
  987. qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  988. rx_tlv_hdr));
  989. qdf_nbuf_set_da_valid(nbuf,
  990. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  991. rx_tlv_hdr));
  992. qdf_nbuf_set_sa_valid(nbuf,
  993. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  994. rx_tlv_hdr));
  995. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  996. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  997. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  998. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  999. if (dp_rx_check_pkt_len(soc, pkt_len))
  1000. goto drop_nbuf;
  1001. /* Set length in nbuf */
  1002. qdf_nbuf_set_pktlen(
  1003. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  1004. qdf_assert_always(nbuf->data == rx_tlv_hdr);
  1005. }
  1006. /*
  1007. * Check if DMA completed -- msdu_done is the last bit
  1008. * to be written
  1009. */
  1010. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1011. dp_err_rl("MSDU DONE failure");
  1012. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1013. QDF_TRACE_LEVEL_INFO);
  1014. qdf_assert(0);
  1015. }
  1016. if (!txrx_peer &&
  1017. dp_rx_null_q_handle_invalid_peer_id_exception(soc, pool_id,
  1018. rx_tlv_hdr, nbuf))
  1019. return QDF_STATUS_E_FAILURE;
  1020. if (!txrx_peer) {
  1021. bool mpdu_done = false;
  1022. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  1023. if (!pdev) {
  1024. dp_err_rl("pdev is null for pool_id = %d", pool_id);
  1025. return QDF_STATUS_E_FAILURE;
  1026. }
  1027. dp_err_rl("txrx_peer is NULL");
  1028. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1029. qdf_nbuf_len(nbuf));
  1030. /* QCN9000 has the support enabled */
  1031. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support)) {
  1032. mpdu_done = true;
  1033. nbuf->next = NULL;
  1034. /* Trigger invalid peer handler wrapper */
  1035. dp_rx_process_invalid_peer_wrapper(soc,
  1036. nbuf, mpdu_done, pool_id);
  1037. } else {
  1038. mpdu_done = soc->arch_ops.dp_rx_chain_msdus(soc, nbuf,
  1039. rx_tlv_hdr,
  1040. pool_id);
  1041. /* Trigger invalid peer handler wrapper */
  1042. dp_rx_process_invalid_peer_wrapper(soc,
  1043. pdev->invalid_peer_head_msdu,
  1044. mpdu_done, pool_id);
  1045. }
  1046. if (mpdu_done) {
  1047. pdev->invalid_peer_head_msdu = NULL;
  1048. pdev->invalid_peer_tail_msdu = NULL;
  1049. }
  1050. return QDF_STATUS_E_FAILURE;
  1051. }
  1052. vdev = txrx_peer->vdev;
  1053. if (!vdev) {
  1054. dp_err_rl("Null vdev!");
  1055. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1056. goto drop_nbuf;
  1057. }
  1058. /*
  1059. * Advance the packet start pointer by total size of
  1060. * pre-header TLV's
  1061. */
  1062. if (qdf_nbuf_is_frag(nbuf))
  1063. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1064. else
  1065. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1066. soc->rx_pkt_tlv_size));
  1067. DP_STATS_INC_PKT(vdev, rx_i.null_q_desc_pkt, 1, qdf_nbuf_len(nbuf));
  1068. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1069. if (dp_rx_err_drop_3addr_mcast(vdev, rx_tlv_hdr)) {
  1070. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.mcast_3addr_drop, 1);
  1071. goto drop_nbuf;
  1072. }
  1073. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  1074. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  1075. if ((sa_idx < 0) ||
  1076. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  1077. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1078. goto drop_nbuf;
  1079. }
  1080. }
  1081. if ((!soc->mec_fw_offload) &&
  1082. dp_rx_mcast_echo_check(soc, txrx_peer, rx_tlv_hdr, nbuf)) {
  1083. /* this is a looped back MCBC pkt, drop it */
  1084. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1085. qdf_nbuf_len(nbuf));
  1086. goto drop_nbuf;
  1087. }
  1088. /*
  1089. * In qwrap mode if the received packet matches with any of the vdev
  1090. * mac addresses, drop it. Donot receive multicast packets originated
  1091. * from any proxysta.
  1092. */
  1093. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  1094. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1095. qdf_nbuf_len(nbuf));
  1096. goto drop_nbuf;
  1097. }
  1098. if (qdf_unlikely(txrx_peer->nawds_enabled &&
  1099. hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1100. rx_tlv_hdr))) {
  1101. dp_err_rl("free buffer for multicast packet");
  1102. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.nawds_mcast_drop, 1);
  1103. goto drop_nbuf;
  1104. }
  1105. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  1106. dp_err_rl("mcast Policy Check Drop pkt");
  1107. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.policy_check_drop, 1);
  1108. goto drop_nbuf;
  1109. }
  1110. /* WDS Source Port Learning */
  1111. if (!soc->ast_offload_support &&
  1112. qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet &&
  1113. vdev->wds_enabled))
  1114. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, txrx_peer, nbuf,
  1115. msdu_metadata);
  1116. if (hal_rx_is_unicast(soc->hal_soc, rx_tlv_hdr)) {
  1117. struct dp_peer *peer;
  1118. struct dp_rx_tid *rx_tid;
  1119. tid = hal_rx_tid_get(soc->hal_soc, rx_tlv_hdr);
  1120. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1121. DP_MOD_ID_RX_ERR);
  1122. if (peer) {
  1123. rx_tid = &peer->rx_tid[tid];
  1124. qdf_spin_lock_bh(&rx_tid->tid_lock);
  1125. if (!peer->rx_tid[tid].hw_qdesc_vaddr_unaligned)
  1126. dp_rx_tid_setup_wifi3(peer, tid, 1,
  1127. IEEE80211_SEQ_MAX);
  1128. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  1129. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  1130. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  1131. }
  1132. }
  1133. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1134. if (!txrx_peer->authorize) {
  1135. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  1136. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  1137. if (is_eapol) {
  1138. if (!dp_rx_err_match_dhost(eh, vdev))
  1139. goto drop_nbuf;
  1140. } else {
  1141. goto drop_nbuf;
  1142. }
  1143. }
  1144. /*
  1145. * Drop packets in this path if cce_match is found. Packets will come
  1146. * in following path depending on whether tidQ is setup.
  1147. * 1. If tidQ is setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE and
  1148. * cce_match = 1
  1149. * Packets with WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE are already
  1150. * dropped.
  1151. * 2. If tidQ is not setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ERROR and
  1152. * cce_match = 1
  1153. * These packets need to be dropped and should not get delivered
  1154. * to stack.
  1155. */
  1156. if (qdf_unlikely(dp_rx_err_cce_drop(soc, vdev, nbuf, rx_tlv_hdr))) {
  1157. goto drop_nbuf;
  1158. }
  1159. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1160. qdf_nbuf_set_next(nbuf, NULL);
  1161. dp_rx_deliver_raw(vdev, nbuf, txrx_peer);
  1162. } else {
  1163. enh_flag = vdev->pdev->enhanced_stats_en;
  1164. qdf_nbuf_set_next(nbuf, NULL);
  1165. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1166. enh_flag);
  1167. /*
  1168. * Update the protocol tag in SKB based on
  1169. * CCE metadata
  1170. */
  1171. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1172. EXCEPTION_DEST_RING_ID,
  1173. true, true);
  1174. /* Update the flow tag in SKB based on FSE metadata */
  1175. dp_rx_update_flow_tag(soc, vdev, nbuf,
  1176. rx_tlv_hdr, true);
  1177. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(
  1178. soc->hal_soc, rx_tlv_hdr) &&
  1179. (vdev->rx_decap_type ==
  1180. htt_cmn_pkt_type_ethernet))) {
  1181. DP_PEER_MC_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1182. enh_flag);
  1183. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost))
  1184. DP_PEER_BC_INCC_PKT(txrx_peer, 1,
  1185. qdf_nbuf_len(nbuf),
  1186. enh_flag);
  1187. }
  1188. qdf_nbuf_set_exc_frame(nbuf, 1);
  1189. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf, NULL,
  1190. is_eapol);
  1191. }
  1192. return QDF_STATUS_SUCCESS;
  1193. drop_nbuf:
  1194. dp_rx_nbuf_free(nbuf);
  1195. return QDF_STATUS_E_FAILURE;
  1196. }
  1197. #ifdef DP_WAR_INVALID_FIRST_MSDU_FLAG
  1198. static inline void
  1199. dp_rx_err_populate_mpdu_desc_info(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1200. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  1201. bool first_msdu_in_mpdu_processed)
  1202. {
  1203. if (first_msdu_in_mpdu_processed) {
  1204. /*
  1205. * This is the 2nd indication of first_msdu in the same mpdu.
  1206. * Skip re-parsing the mdpu_desc_info and use the cached one,
  1207. * since this msdu is most probably from the current mpdu
  1208. * which is being processed
  1209. */
  1210. } else {
  1211. hal_rx_tlv_populate_mpdu_desc_info(soc->hal_soc,
  1212. qdf_nbuf_data(nbuf),
  1213. mpdu_desc_info);
  1214. }
  1215. }
  1216. #else
  1217. static inline void
  1218. dp_rx_err_populate_mpdu_desc_info(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1219. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  1220. bool first_msdu_in_mpdu_processed)
  1221. {
  1222. hal_rx_tlv_populate_mpdu_desc_info(soc->hal_soc, qdf_nbuf_data(nbuf),
  1223. mpdu_desc_info);
  1224. }
  1225. #endif
  1226. /**
  1227. * dp_rx_reo_err_entry_process() - Handles for REO error entry processing
  1228. *
  1229. * @soc: core txrx main context
  1230. * @ring_desc: opaque pointer to the REO error ring descriptor
  1231. * @mpdu_desc_info: pointer to mpdu level description info
  1232. * @link_desc_va: pointer to msdu_link_desc virtual address
  1233. * @err_code: reo error code fetched from ring entry
  1234. *
  1235. * Function to handle msdus fetched from msdu link desc, currently
  1236. * support REO error NULL queue, 2K jump, OOR.
  1237. *
  1238. * Return: msdu count processed
  1239. */
  1240. static uint32_t
  1241. dp_rx_reo_err_entry_process(struct dp_soc *soc,
  1242. void *ring_desc,
  1243. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  1244. void *link_desc_va,
  1245. enum hal_reo_error_code err_code)
  1246. {
  1247. uint32_t rx_bufs_used = 0;
  1248. struct dp_pdev *pdev;
  1249. int i;
  1250. uint8_t *rx_tlv_hdr_first;
  1251. uint8_t *rx_tlv_hdr_last;
  1252. uint32_t tid = DP_MAX_TIDS;
  1253. uint16_t peer_id;
  1254. struct dp_rx_desc *rx_desc;
  1255. struct rx_desc_pool *rx_desc_pool;
  1256. qdf_nbuf_t nbuf;
  1257. struct hal_buf_info buf_info;
  1258. struct hal_rx_msdu_list msdu_list;
  1259. uint16_t num_msdus;
  1260. struct buffer_addr_info cur_link_desc_addr_info = { 0 };
  1261. struct buffer_addr_info next_link_desc_addr_info = { 0 };
  1262. /* First field in REO Dst ring Desc is buffer_addr_info */
  1263. void *buf_addr_info = ring_desc;
  1264. qdf_nbuf_t head_nbuf = NULL;
  1265. qdf_nbuf_t tail_nbuf = NULL;
  1266. uint16_t msdu_processed = 0;
  1267. QDF_STATUS status;
  1268. bool ret, is_pn_check_needed;
  1269. uint8_t rx_desc_pool_id;
  1270. struct dp_txrx_peer *txrx_peer = NULL;
  1271. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1272. hal_ring_handle_t hal_ring_hdl = soc->reo_exception_ring.hal_srng;
  1273. bool first_msdu_in_mpdu_processed = false;
  1274. bool msdu_dropped = false;
  1275. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  1276. mpdu_desc_info->peer_meta_data);
  1277. is_pn_check_needed = dp_rx_err_is_pn_check_needed(soc,
  1278. HAL_REO_ERROR_DETECTED,
  1279. err_code);
  1280. more_msdu_link_desc:
  1281. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  1282. &num_msdus);
  1283. for (i = 0; i < num_msdus; i++) {
  1284. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  1285. soc,
  1286. msdu_list.sw_cookie[i]);
  1287. qdf_assert_always(rx_desc);
  1288. nbuf = rx_desc->nbuf;
  1289. /*
  1290. * this is a unlikely scenario where the host is reaping
  1291. * a descriptor which it already reaped just a while ago
  1292. * but is yet to replenish it back to HW.
  1293. * In this case host will dump the last 128 descriptors
  1294. * including the software descriptor rx_desc and assert.
  1295. */
  1296. if (qdf_unlikely(!rx_desc->in_use) ||
  1297. qdf_unlikely(!nbuf)) {
  1298. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1299. dp_info_rl("Reaping rx_desc not in use!");
  1300. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1301. ring_desc, rx_desc);
  1302. /* ignore duplicate RX desc and continue to process */
  1303. /* Pop out the descriptor */
  1304. msdu_dropped = true;
  1305. continue;
  1306. }
  1307. ret = dp_rx_desc_paddr_sanity_check(rx_desc,
  1308. msdu_list.paddr[i]);
  1309. if (!ret) {
  1310. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1311. rx_desc->in_err_state = 1;
  1312. msdu_dropped = true;
  1313. continue;
  1314. }
  1315. rx_desc_pool_id = rx_desc->pool_id;
  1316. /* all buffers from a MSDU link belong to same pdev */
  1317. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc_pool_id);
  1318. rx_desc_pool = &soc->rx_desc_buf[rx_desc_pool_id];
  1319. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1320. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  1321. rx_desc->unmapped = 1;
  1322. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1323. QDF_NBUF_CB_RX_PKT_LEN(nbuf) = msdu_list.msdu_info[i].msdu_len;
  1324. rx_bufs_used++;
  1325. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  1326. &pdev->free_list_tail, rx_desc);
  1327. DP_RX_LIST_APPEND(head_nbuf, tail_nbuf, nbuf);
  1328. if (qdf_unlikely(msdu_list.msdu_info[i].msdu_flags &
  1329. HAL_MSDU_F_MSDU_CONTINUATION))
  1330. continue;
  1331. if (dp_rx_buffer_pool_refill(soc, head_nbuf,
  1332. rx_desc_pool_id)) {
  1333. /* MSDU queued back to the pool */
  1334. msdu_dropped = true;
  1335. goto process_next_msdu;
  1336. }
  1337. if (is_pn_check_needed) {
  1338. if (msdu_list.msdu_info[i].msdu_flags &
  1339. HAL_MSDU_F_FIRST_MSDU_IN_MPDU) {
  1340. dp_rx_err_populate_mpdu_desc_info(soc, nbuf,
  1341. mpdu_desc_info,
  1342. first_msdu_in_mpdu_processed);
  1343. first_msdu_in_mpdu_processed = true;
  1344. } else {
  1345. if (!first_msdu_in_mpdu_processed) {
  1346. /*
  1347. * If no msdu in this mpdu was dropped
  1348. * due to failed sanity checks, then
  1349. * its not expected to hit this
  1350. * condition. Hence we assert here.
  1351. */
  1352. if (!msdu_dropped)
  1353. qdf_assert_always(0);
  1354. /*
  1355. * We do not have valid mpdu_desc_info
  1356. * to process this nbuf, hence drop it.
  1357. */
  1358. dp_rx_nbuf_free(nbuf);
  1359. /* TODO - Increment stats */
  1360. goto process_next_msdu;
  1361. }
  1362. /*
  1363. * DO NOTHING -
  1364. * Continue using the same mpdu_desc_info
  1365. * details populated from the first msdu in
  1366. * the mpdu.
  1367. */
  1368. }
  1369. status = dp_rx_err_nbuf_pn_check(soc, ring_desc, nbuf);
  1370. if (QDF_IS_STATUS_ERROR(status)) {
  1371. DP_STATS_INC(soc, rx.err.pn_in_dest_check_fail,
  1372. 1);
  1373. dp_rx_nbuf_free(nbuf);
  1374. goto process_next_msdu;
  1375. }
  1376. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  1377. mpdu_desc_info->peer_meta_data);
  1378. if (mpdu_desc_info->bar_frame)
  1379. _dp_rx_bar_frame_handle(soc, nbuf,
  1380. mpdu_desc_info, tid,
  1381. HAL_REO_ERROR_DETECTED,
  1382. err_code);
  1383. }
  1384. if (qdf_unlikely(mpdu_desc_info->mpdu_flags &
  1385. HAL_MPDU_F_RAW_AMPDU)) {
  1386. dp_err_rl("RAW ampdu in REO error not expected");
  1387. DP_STATS_INC(soc, rx.err.reo_err_raw_mpdu_drop, 1);
  1388. qdf_nbuf_list_free(head_nbuf);
  1389. goto process_next_msdu;
  1390. }
  1391. rx_tlv_hdr_first = qdf_nbuf_data(head_nbuf);
  1392. rx_tlv_hdr_last = qdf_nbuf_data(tail_nbuf);
  1393. if (qdf_unlikely(head_nbuf != tail_nbuf)) {
  1394. nbuf = dp_rx_sg_create(soc, head_nbuf);
  1395. qdf_nbuf_set_is_frag(nbuf, 1);
  1396. DP_STATS_INC(soc, rx.err.reo_err_oor_sg_count, 1);
  1397. }
  1398. switch (err_code) {
  1399. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  1400. case HAL_REO_ERR_2K_ERROR_HANDLING_FLAG_SET:
  1401. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  1402. /*
  1403. * only first msdu, mpdu start description tlv valid?
  1404. * and use it for following msdu.
  1405. */
  1406. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1407. rx_tlv_hdr_last))
  1408. tid = hal_rx_mpdu_start_tid_get(
  1409. soc->hal_soc,
  1410. rx_tlv_hdr_first);
  1411. dp_2k_jump_handle(soc, nbuf, rx_tlv_hdr_last,
  1412. peer_id, tid);
  1413. break;
  1414. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  1415. case HAL_REO_ERR_BAR_FRAME_OOR:
  1416. dp_rx_oor_handle(soc, nbuf, peer_id, rx_tlv_hdr_last);
  1417. break;
  1418. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  1419. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(
  1420. soc, peer_id,
  1421. &txrx_ref_handle,
  1422. DP_MOD_ID_RX_ERR);
  1423. if (!txrx_peer)
  1424. dp_info_rl("txrx_peer is null peer_id %u",
  1425. peer_id);
  1426. dp_rx_null_q_desc_handle(soc, nbuf, rx_tlv_hdr_last,
  1427. rx_desc_pool_id, txrx_peer);
  1428. if (txrx_peer)
  1429. dp_txrx_peer_unref_delete(txrx_ref_handle,
  1430. DP_MOD_ID_RX_ERR);
  1431. break;
  1432. default:
  1433. dp_err_rl("Non-support error code %d", err_code);
  1434. dp_rx_nbuf_free(nbuf);
  1435. }
  1436. process_next_msdu:
  1437. msdu_processed++;
  1438. head_nbuf = NULL;
  1439. tail_nbuf = NULL;
  1440. }
  1441. /*
  1442. * If the msdu's are spread across multiple link-descriptors,
  1443. * we cannot depend solely on the msdu_count(e.g., if msdu is
  1444. * spread across multiple buffers).Hence, it is
  1445. * necessary to check the next link_descriptor and release
  1446. * all the msdu's that are part of it.
  1447. */
  1448. hal_rx_get_next_msdu_link_desc_buf_addr_info(
  1449. link_desc_va,
  1450. &next_link_desc_addr_info);
  1451. if (hal_rx_is_buf_addr_info_valid(
  1452. &next_link_desc_addr_info)) {
  1453. /* Clear the next link desc info for the current link_desc */
  1454. hal_rx_clear_next_msdu_link_desc_buf_addr_info(link_desc_va);
  1455. dp_rx_link_desc_return_by_addr(
  1456. soc,
  1457. buf_addr_info,
  1458. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  1459. hal_rx_buffer_addr_info_get_paddr(
  1460. &next_link_desc_addr_info,
  1461. &buf_info);
  1462. /* buffer_addr_info is the first element of ring_desc */
  1463. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  1464. (uint32_t *)&next_link_desc_addr_info,
  1465. &buf_info);
  1466. link_desc_va =
  1467. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  1468. cur_link_desc_addr_info = next_link_desc_addr_info;
  1469. buf_addr_info = &cur_link_desc_addr_info;
  1470. goto more_msdu_link_desc;
  1471. }
  1472. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  1473. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  1474. if (qdf_unlikely(msdu_processed != mpdu_desc_info->msdu_count))
  1475. DP_STATS_INC(soc, rx.err.msdu_count_mismatch, 1);
  1476. return rx_bufs_used;
  1477. }
  1478. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1479. /**
  1480. * dp_rx_process_rxdma_err() - Function to deliver rxdma unencrypted_err
  1481. * frames to OS or wifi parse errors.
  1482. * @soc: core DP main context
  1483. * @nbuf: buffer pointer
  1484. * @rx_tlv_hdr: start of rx tlv header
  1485. * @txrx_peer: peer reference
  1486. * @err_code: rxdma err code
  1487. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  1488. * pool_id has same mapping)
  1489. *
  1490. * Return: None
  1491. */
  1492. void
  1493. dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1494. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  1495. uint8_t err_code, uint8_t mac_id)
  1496. {
  1497. uint32_t pkt_len, l2_hdr_offset;
  1498. uint16_t msdu_len;
  1499. struct dp_vdev *vdev;
  1500. qdf_ether_header_t *eh;
  1501. bool is_broadcast;
  1502. /*
  1503. * Check if DMA completed -- msdu_done is the last bit
  1504. * to be written
  1505. */
  1506. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1507. dp_err_rl("MSDU DONE failure");
  1508. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1509. QDF_TRACE_LEVEL_INFO);
  1510. qdf_assert(0);
  1511. }
  1512. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc,
  1513. rx_tlv_hdr);
  1514. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1515. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  1516. if (dp_rx_check_pkt_len(soc, pkt_len)) {
  1517. /* Drop & free packet */
  1518. dp_rx_nbuf_free(nbuf);
  1519. return;
  1520. }
  1521. /* Set length in nbuf */
  1522. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1523. qdf_nbuf_set_next(nbuf, NULL);
  1524. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1525. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1526. if (!txrx_peer) {
  1527. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP, "txrx_peer is NULL");
  1528. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1529. qdf_nbuf_len(nbuf));
  1530. /* Trigger invalid peer handler wrapper */
  1531. dp_rx_process_invalid_peer_wrapper(soc, nbuf, true, mac_id);
  1532. return;
  1533. }
  1534. vdev = txrx_peer->vdev;
  1535. if (!vdev) {
  1536. dp_rx_err_info_rl("%pK: INVALID vdev %pK OR osif_rx", soc,
  1537. vdev);
  1538. /* Drop & free packet */
  1539. dp_rx_nbuf_free(nbuf);
  1540. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1541. return;
  1542. }
  1543. /*
  1544. * Advance the packet start pointer by total size of
  1545. * pre-header TLV's
  1546. */
  1547. dp_rx_skip_tlvs(soc, nbuf, l2_hdr_offset);
  1548. if (err_code == HAL_RXDMA_ERR_WIFI_PARSE) {
  1549. uint8_t *pkt_type;
  1550. pkt_type = qdf_nbuf_data(nbuf) + (2 * QDF_MAC_ADDR_SIZE);
  1551. if (*(uint16_t *)pkt_type == htons(QDF_ETH_TYPE_8021Q)) {
  1552. if (*(uint16_t *)(pkt_type + DP_SKIP_VLAN) ==
  1553. htons(QDF_LLC_STP)) {
  1554. DP_STATS_INC(vdev->pdev, vlan_tag_stp_cnt, 1);
  1555. goto process_mesh;
  1556. } else {
  1557. goto process_rx;
  1558. }
  1559. }
  1560. }
  1561. if (vdev->rx_decap_type == htt_cmn_pkt_type_raw)
  1562. goto process_mesh;
  1563. /*
  1564. * WAPI cert AP sends rekey frames as unencrypted.
  1565. * Thus RXDMA will report unencrypted frame error.
  1566. * To pass WAPI cert case, SW needs to pass unencrypted
  1567. * rekey frame to stack.
  1568. */
  1569. if (qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1570. goto process_rx;
  1571. }
  1572. /*
  1573. * In dynamic WEP case rekey frames are not encrypted
  1574. * similar to WAPI. Allow EAPOL when 8021+wep is enabled and
  1575. * key install is already done
  1576. */
  1577. if ((vdev->sec_type == cdp_sec_type_wep104) &&
  1578. (qdf_nbuf_is_ipv4_eapol_pkt(nbuf)))
  1579. goto process_rx;
  1580. process_mesh:
  1581. if (!vdev->mesh_vdev && err_code == HAL_RXDMA_ERR_UNENCRYPTED) {
  1582. dp_rx_nbuf_free(nbuf);
  1583. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1584. return;
  1585. }
  1586. if (vdev->mesh_vdev) {
  1587. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1588. == QDF_STATUS_SUCCESS) {
  1589. dp_rx_err_info("%pK: mesh pkt filtered", soc);
  1590. DP_STATS_INC(vdev->pdev, dropped.mesh_filter, 1);
  1591. dp_rx_nbuf_free(nbuf);
  1592. return;
  1593. }
  1594. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, txrx_peer);
  1595. }
  1596. process_rx:
  1597. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1598. rx_tlv_hdr) &&
  1599. (vdev->rx_decap_type ==
  1600. htt_cmn_pkt_type_ethernet))) {
  1601. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1602. is_broadcast = (QDF_IS_ADDR_BROADCAST
  1603. (eh->ether_dhost)) ? 1 : 0 ;
  1604. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.multicast, 1,
  1605. qdf_nbuf_len(nbuf));
  1606. if (is_broadcast) {
  1607. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.bcast, 1,
  1608. qdf_nbuf_len(nbuf));
  1609. }
  1610. }
  1611. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1612. dp_rx_deliver_raw(vdev, nbuf, txrx_peer);
  1613. } else {
  1614. /* Update the protocol tag in SKB based on CCE metadata */
  1615. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1616. EXCEPTION_DEST_RING_ID, true, true);
  1617. /* Update the flow tag in SKB based on FSE metadata */
  1618. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  1619. DP_PEER_STATS_FLAT_INC(txrx_peer, to_stack.num, 1);
  1620. qdf_nbuf_set_exc_frame(nbuf, 1);
  1621. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf, NULL,
  1622. qdf_nbuf_is_ipv4_eapol_pkt(nbuf));
  1623. }
  1624. return;
  1625. }
  1626. /**
  1627. * dp_rx_process_mic_error(): Function to pass mic error indication to umac
  1628. * @soc: core DP main context
  1629. * @nbuf: buffer pointer
  1630. * @rx_tlv_hdr: start of rx tlv header
  1631. * @txrx_peer: txrx peer handle
  1632. *
  1633. * return: void
  1634. */
  1635. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1636. uint8_t *rx_tlv_hdr,
  1637. struct dp_txrx_peer *txrx_peer)
  1638. {
  1639. struct dp_vdev *vdev = NULL;
  1640. struct dp_pdev *pdev = NULL;
  1641. struct ol_if_ops *tops = NULL;
  1642. uint16_t rx_seq, fragno;
  1643. uint8_t is_raw;
  1644. unsigned int tid;
  1645. QDF_STATUS status;
  1646. struct cdp_rx_mic_err_info mic_failure_info;
  1647. if (!hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1648. rx_tlv_hdr))
  1649. return;
  1650. if (!txrx_peer) {
  1651. dp_info_rl("txrx_peer not found");
  1652. goto fail;
  1653. }
  1654. vdev = txrx_peer->vdev;
  1655. if (!vdev) {
  1656. dp_info_rl("VDEV not found");
  1657. goto fail;
  1658. }
  1659. pdev = vdev->pdev;
  1660. if (!pdev) {
  1661. dp_info_rl("PDEV not found");
  1662. goto fail;
  1663. }
  1664. is_raw = HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, qdf_nbuf_data(nbuf));
  1665. if (is_raw) {
  1666. fragno = dp_rx_frag_get_mpdu_frag_number(soc,
  1667. qdf_nbuf_data(nbuf));
  1668. /* Can get only last fragment */
  1669. if (fragno) {
  1670. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  1671. qdf_nbuf_data(nbuf));
  1672. rx_seq = hal_rx_get_rx_sequence(soc->hal_soc,
  1673. qdf_nbuf_data(nbuf));
  1674. status = dp_rx_defrag_add_last_frag(soc, txrx_peer,
  1675. tid, rx_seq, nbuf);
  1676. dp_info_rl("Frag pkt seq# %d frag# %d consumed "
  1677. "status %d !", rx_seq, fragno, status);
  1678. return;
  1679. }
  1680. }
  1681. if (hal_rx_mpdu_get_addr1(soc->hal_soc, qdf_nbuf_data(nbuf),
  1682. &mic_failure_info.da_mac_addr.bytes[0])) {
  1683. dp_err_rl("Failed to get da_mac_addr");
  1684. goto fail;
  1685. }
  1686. if (hal_rx_mpdu_get_addr2(soc->hal_soc, qdf_nbuf_data(nbuf),
  1687. &mic_failure_info.ta_mac_addr.bytes[0])) {
  1688. dp_err_rl("Failed to get ta_mac_addr");
  1689. goto fail;
  1690. }
  1691. mic_failure_info.key_id = 0;
  1692. mic_failure_info.multicast =
  1693. IEEE80211_IS_MULTICAST(mic_failure_info.da_mac_addr.bytes);
  1694. qdf_mem_zero(mic_failure_info.tsc, MIC_SEQ_CTR_SIZE);
  1695. mic_failure_info.frame_type = cdp_rx_frame_type_802_11;
  1696. mic_failure_info.data = NULL;
  1697. mic_failure_info.vdev_id = vdev->vdev_id;
  1698. tops = pdev->soc->cdp_soc.ol_ops;
  1699. if (tops->rx_mic_error)
  1700. tops->rx_mic_error(soc->ctrl_psoc, pdev->pdev_id,
  1701. &mic_failure_info);
  1702. fail:
  1703. dp_rx_nbuf_free(nbuf);
  1704. return;
  1705. }
  1706. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  1707. defined(WLAN_MCAST_MLO) && !defined(CONFIG_MLO_SINGLE_DEV)
  1708. static bool dp_rx_igmp_handler(struct dp_soc *soc,
  1709. struct dp_vdev *vdev,
  1710. struct dp_txrx_peer *peer,
  1711. qdf_nbuf_t nbuf)
  1712. {
  1713. if (soc->arch_ops.dp_rx_mcast_handler) {
  1714. if (soc->arch_ops.dp_rx_mcast_handler(soc, vdev, peer, nbuf))
  1715. return true;
  1716. }
  1717. return false;
  1718. }
  1719. #else
  1720. static bool dp_rx_igmp_handler(struct dp_soc *soc,
  1721. struct dp_vdev *vdev,
  1722. struct dp_txrx_peer *peer,
  1723. qdf_nbuf_t nbuf)
  1724. {
  1725. return false;
  1726. }
  1727. #endif
  1728. /**
  1729. * dp_rx_err_route_hdl() - Function to send EAPOL frames to stack
  1730. * Free any other packet which comes in
  1731. * this path.
  1732. *
  1733. * @soc: core DP main context
  1734. * @nbuf: buffer pointer
  1735. * @txrx_peer: txrx peer handle
  1736. * @rx_tlv_hdr: start of rx tlv header
  1737. * @err_src: rxdma/reo
  1738. *
  1739. * This function indicates EAPOL frame received in wbm error ring to stack.
  1740. * Any other frame should be dropped.
  1741. *
  1742. * Return: SUCCESS if delivered to stack
  1743. */
  1744. static void
  1745. dp_rx_err_route_hdl(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1746. struct dp_txrx_peer *txrx_peer, uint8_t *rx_tlv_hdr,
  1747. enum hal_rx_wbm_error_source err_src)
  1748. {
  1749. uint32_t pkt_len;
  1750. uint16_t msdu_len;
  1751. struct dp_vdev *vdev;
  1752. struct hal_rx_msdu_metadata msdu_metadata;
  1753. bool is_eapol;
  1754. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1755. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1756. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1757. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1758. if (dp_rx_check_pkt_len(soc, pkt_len))
  1759. goto drop_nbuf;
  1760. /* Set length in nbuf */
  1761. qdf_nbuf_set_pktlen(
  1762. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  1763. qdf_assert_always(nbuf->data == rx_tlv_hdr);
  1764. }
  1765. /*
  1766. * Check if DMA completed -- msdu_done is the last bit
  1767. * to be written
  1768. */
  1769. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1770. dp_err_rl("MSDU DONE failure");
  1771. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1772. QDF_TRACE_LEVEL_INFO);
  1773. qdf_assert(0);
  1774. }
  1775. if (!txrx_peer)
  1776. goto drop_nbuf;
  1777. vdev = txrx_peer->vdev;
  1778. if (!vdev) {
  1779. dp_err_rl("Null vdev!");
  1780. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1781. goto drop_nbuf;
  1782. }
  1783. /*
  1784. * Advance the packet start pointer by total size of
  1785. * pre-header TLV's
  1786. */
  1787. if (qdf_nbuf_is_frag(nbuf))
  1788. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1789. else
  1790. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1791. soc->rx_pkt_tlv_size));
  1792. if (dp_rx_igmp_handler(soc, vdev, txrx_peer, nbuf))
  1793. return;
  1794. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1795. /*
  1796. * Indicate EAPOL frame to stack only when vap mac address
  1797. * matches the destination address.
  1798. */
  1799. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf);
  1800. if (is_eapol || qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1801. qdf_ether_header_t *eh =
  1802. (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1803. if (dp_rx_err_match_dhost(eh, vdev)) {
  1804. DP_STATS_INC_PKT(vdev, rx_i.routed_eapol_pkt, 1,
  1805. qdf_nbuf_len(nbuf));
  1806. /*
  1807. * Update the protocol tag in SKB based on
  1808. * CCE metadata.
  1809. */
  1810. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1811. EXCEPTION_DEST_RING_ID,
  1812. true, true);
  1813. /* Update the flow tag in SKB based on FSE metadata */
  1814. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1815. true);
  1816. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1,
  1817. qdf_nbuf_len(nbuf),
  1818. vdev->pdev->enhanced_stats_en);
  1819. qdf_nbuf_set_exc_frame(nbuf, 1);
  1820. qdf_nbuf_set_next(nbuf, NULL);
  1821. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf,
  1822. NULL, is_eapol);
  1823. return;
  1824. }
  1825. }
  1826. drop_nbuf:
  1827. DP_STATS_INCC(soc, rx.reo2rel_route_drop, 1,
  1828. err_src == HAL_RX_WBM_ERR_SRC_REO);
  1829. DP_STATS_INCC(soc, rx.rxdma2rel_route_drop, 1,
  1830. err_src == HAL_RX_WBM_ERR_SRC_RXDMA);
  1831. dp_rx_nbuf_free(nbuf);
  1832. }
  1833. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1834. #ifdef DP_RX_DESC_COOKIE_INVALIDATE
  1835. /**
  1836. * dp_rx_link_cookie_check() - Validate link desc cookie
  1837. * @ring_desc: ring descriptor
  1838. *
  1839. * Return: qdf status
  1840. */
  1841. static inline QDF_STATUS
  1842. dp_rx_link_cookie_check(hal_ring_desc_t ring_desc)
  1843. {
  1844. if (qdf_unlikely(HAL_RX_REO_BUF_LINK_COOKIE_INVALID_GET(ring_desc)))
  1845. return QDF_STATUS_E_FAILURE;
  1846. return QDF_STATUS_SUCCESS;
  1847. }
  1848. /**
  1849. * dp_rx_link_cookie_invalidate() - Invalidate link desc cookie
  1850. * @ring_desc: ring descriptor
  1851. *
  1852. * Return: None
  1853. */
  1854. static inline void
  1855. dp_rx_link_cookie_invalidate(hal_ring_desc_t ring_desc)
  1856. {
  1857. HAL_RX_REO_BUF_LINK_COOKIE_INVALID_SET(ring_desc);
  1858. }
  1859. #else
  1860. static inline QDF_STATUS
  1861. dp_rx_link_cookie_check(hal_ring_desc_t ring_desc)
  1862. {
  1863. return QDF_STATUS_SUCCESS;
  1864. }
  1865. static inline void
  1866. dp_rx_link_cookie_invalidate(hal_ring_desc_t ring_desc)
  1867. {
  1868. }
  1869. #endif
  1870. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1871. /**
  1872. * dp_rx_err_ring_record_entry() - Record rx err ring history
  1873. * @soc: Datapath soc structure
  1874. * @paddr: paddr of the buffer in RX err ring
  1875. * @sw_cookie: SW cookie of the buffer in RX err ring
  1876. * @rbm: Return buffer manager of the buffer in RX err ring
  1877. *
  1878. * Returns: None
  1879. */
  1880. static inline void
  1881. dp_rx_err_ring_record_entry(struct dp_soc *soc, uint64_t paddr,
  1882. uint32_t sw_cookie, uint8_t rbm)
  1883. {
  1884. struct dp_buf_info_record *record;
  1885. uint32_t idx;
  1886. if (qdf_unlikely(!soc->rx_err_ring_history))
  1887. return;
  1888. idx = dp_history_get_next_index(&soc->rx_err_ring_history->index,
  1889. DP_RX_ERR_HIST_MAX);
  1890. /* No NULL check needed for record since its an array */
  1891. record = &soc->rx_err_ring_history->entry[idx];
  1892. record->timestamp = qdf_get_log_timestamp();
  1893. record->hbi.paddr = paddr;
  1894. record->hbi.sw_cookie = sw_cookie;
  1895. record->hbi.rbm = rbm;
  1896. }
  1897. #else
  1898. static inline void
  1899. dp_rx_err_ring_record_entry(struct dp_soc *soc, uint64_t paddr,
  1900. uint32_t sw_cookie, uint8_t rbm)
  1901. {
  1902. }
  1903. #endif
  1904. #ifdef HANDLE_RX_REROUTE_ERR
  1905. static int dp_rx_err_handle_msdu_buf(struct dp_soc *soc,
  1906. hal_ring_desc_t ring_desc)
  1907. {
  1908. int lmac_id = DP_INVALID_LMAC_ID;
  1909. struct dp_rx_desc *rx_desc;
  1910. struct hal_buf_info hbi;
  1911. struct dp_pdev *pdev;
  1912. struct rx_desc_pool *rx_desc_pool;
  1913. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  1914. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, hbi.sw_cookie);
  1915. /* sanity */
  1916. if (!rx_desc) {
  1917. DP_STATS_INC(soc, rx.err.reo_err_msdu_buf_invalid_cookie, 1);
  1918. goto assert_return;
  1919. }
  1920. if (!rx_desc->nbuf)
  1921. goto assert_return;
  1922. dp_rx_err_ring_record_entry(soc, hbi.paddr,
  1923. hbi.sw_cookie,
  1924. hal_rx_ret_buf_manager_get(soc->hal_soc,
  1925. ring_desc));
  1926. if (hbi.paddr != qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0)) {
  1927. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1928. rx_desc->in_err_state = 1;
  1929. goto assert_return;
  1930. }
  1931. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1932. /* After this point the rx_desc and nbuf are valid */
  1933. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1934. qdf_assert_always(!rx_desc->unmapped);
  1935. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, rx_desc->nbuf);
  1936. rx_desc->unmapped = 1;
  1937. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1938. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  1939. rx_desc->pool_id);
  1940. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  1941. lmac_id = rx_desc->pool_id;
  1942. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  1943. &pdev->free_list_tail,
  1944. rx_desc);
  1945. return lmac_id;
  1946. assert_return:
  1947. qdf_assert(0);
  1948. return lmac_id;
  1949. }
  1950. static int dp_rx_err_exception(struct dp_soc *soc, hal_ring_desc_t ring_desc)
  1951. {
  1952. int ret;
  1953. uint64_t cur_time_stamp;
  1954. DP_STATS_INC(soc, rx.err.reo_err_msdu_buf_rcved, 1);
  1955. /* Recover if overall error count exceeds threshold */
  1956. if (soc->stats.rx.err.reo_err_msdu_buf_rcved >
  1957. DP_MAX_REG_RX_ROUTING_ERRS_THRESHOLD) {
  1958. dp_err("pkt threshold breached! reo_err_msdu_buf_rcved %u first err pkt time_stamp %llu",
  1959. soc->stats.rx.err.reo_err_msdu_buf_rcved,
  1960. soc->rx_route_err_start_pkt_ts);
  1961. qdf_trigger_self_recovery(NULL, QDF_RX_REG_PKT_ROUTE_ERR);
  1962. }
  1963. cur_time_stamp = qdf_get_log_timestamp_usecs();
  1964. if (!soc->rx_route_err_start_pkt_ts)
  1965. soc->rx_route_err_start_pkt_ts = cur_time_stamp;
  1966. /* Recover if threshold number of packets received in threshold time */
  1967. if ((cur_time_stamp - soc->rx_route_err_start_pkt_ts) >
  1968. DP_RX_ERR_ROUTE_TIMEOUT_US) {
  1969. soc->rx_route_err_start_pkt_ts = cur_time_stamp;
  1970. if (soc->rx_route_err_in_window >
  1971. DP_MAX_REG_RX_ROUTING_ERRS_IN_TIMEOUT) {
  1972. qdf_trigger_self_recovery(NULL,
  1973. QDF_RX_REG_PKT_ROUTE_ERR);
  1974. dp_err("rate threshold breached! reo_err_msdu_buf_rcved %u first err pkt time_stamp %llu",
  1975. soc->stats.rx.err.reo_err_msdu_buf_rcved,
  1976. soc->rx_route_err_start_pkt_ts);
  1977. } else {
  1978. soc->rx_route_err_in_window = 1;
  1979. }
  1980. } else {
  1981. soc->rx_route_err_in_window++;
  1982. }
  1983. ret = dp_rx_err_handle_msdu_buf(soc, ring_desc);
  1984. return ret;
  1985. }
  1986. #else /* HANDLE_RX_REROUTE_ERR */
  1987. static int dp_rx_err_exception(struct dp_soc *soc, hal_ring_desc_t ring_desc)
  1988. {
  1989. qdf_assert_always(0);
  1990. return DP_INVALID_LMAC_ID;
  1991. }
  1992. #endif /* HANDLE_RX_REROUTE_ERR */
  1993. #ifdef WLAN_MLO_MULTI_CHIP
  1994. /*
  1995. * dp_idle_link_bm_id_check() - war for HW issue
  1996. *
  1997. * This is a war for HW issue where link descriptor
  1998. * of partner soc received due to packets wrongly
  1999. * interpreted as fragments
  2000. *
  2001. * @soc: DP SOC handle
  2002. * @rbm: idle link RBM value
  2003. * @ring_desc: reo error link descriptor
  2004. *
  2005. * returns: true in case link desc is consumed
  2006. * false in other cases
  2007. */
  2008. static bool dp_idle_link_bm_id_check(struct dp_soc *soc, uint8_t rbm,
  2009. void *ring_desc)
  2010. {
  2011. struct dp_soc *replenish_soc = NULL;
  2012. /* return ok incase of link desc of same soc */
  2013. if (rbm == soc->idle_link_bm_id)
  2014. return false;
  2015. if (soc->arch_ops.dp_soc_get_by_idle_bm_id)
  2016. replenish_soc =
  2017. soc->arch_ops.dp_soc_get_by_idle_bm_id(soc, rbm);
  2018. qdf_assert_always(replenish_soc);
  2019. /*
  2020. * For WIN usecase we should only get fragment packets in
  2021. * this ring as for MLO case fragmentation is not supported
  2022. * we should not see links from other soc.
  2023. *
  2024. * Drop all packets from partner soc and replenish the descriptors
  2025. */
  2026. dp_handle_wbm_internal_error(replenish_soc, ring_desc,
  2027. HAL_WBM_RELEASE_RING_2_DESC_TYPE);
  2028. return true;
  2029. }
  2030. #else
  2031. static bool dp_idle_link_bm_id_check(struct dp_soc *soc, uint8_t rbm,
  2032. void *ring_desc)
  2033. {
  2034. return false;
  2035. }
  2036. #endif
  2037. uint32_t
  2038. dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  2039. hal_ring_handle_t hal_ring_hdl, uint32_t quota)
  2040. {
  2041. hal_ring_desc_t ring_desc;
  2042. hal_soc_handle_t hal_soc;
  2043. uint32_t count = 0;
  2044. uint32_t rx_bufs_used = 0;
  2045. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  2046. uint8_t mac_id = 0;
  2047. uint8_t buf_type;
  2048. uint8_t err_status;
  2049. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  2050. struct hal_buf_info hbi;
  2051. struct dp_pdev *dp_pdev;
  2052. struct dp_srng *dp_rxdma_srng;
  2053. struct rx_desc_pool *rx_desc_pool;
  2054. void *link_desc_va;
  2055. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  2056. uint16_t num_msdus;
  2057. struct dp_rx_desc *rx_desc = NULL;
  2058. QDF_STATUS status;
  2059. bool ret;
  2060. uint32_t error_code = 0;
  2061. bool sw_pn_check_needed;
  2062. int max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  2063. int i, rx_bufs_reaped_total;
  2064. /* Debug -- Remove later */
  2065. qdf_assert(soc && hal_ring_hdl);
  2066. hal_soc = soc->hal_soc;
  2067. /* Debug -- Remove later */
  2068. qdf_assert(hal_soc);
  2069. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  2070. /* TODO */
  2071. /*
  2072. * Need API to convert from hal_ring pointer to
  2073. * Ring Type / Ring Id combo
  2074. */
  2075. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  2076. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK", soc,
  2077. hal_ring_hdl);
  2078. goto done;
  2079. }
  2080. while (qdf_likely(quota-- && (ring_desc =
  2081. hal_srng_dst_peek(hal_soc,
  2082. hal_ring_hdl)))) {
  2083. DP_STATS_INC(soc, rx.err_ring_pkts, 1);
  2084. err_status = hal_rx_err_status_get(hal_soc, ring_desc);
  2085. buf_type = hal_rx_reo_buf_type_get(hal_soc, ring_desc);
  2086. if (err_status == HAL_REO_ERROR_DETECTED)
  2087. error_code = hal_rx_get_reo_error_code(hal_soc,
  2088. ring_desc);
  2089. qdf_mem_set(&mpdu_desc_info, sizeof(mpdu_desc_info), 0);
  2090. sw_pn_check_needed = dp_rx_err_is_pn_check_needed(soc,
  2091. err_status,
  2092. error_code);
  2093. if (!sw_pn_check_needed) {
  2094. /*
  2095. * MPDU desc info will be present in the REO desc
  2096. * only in the below scenarios
  2097. * 1) pn_in_dest_disabled: always
  2098. * 2) pn_in_dest enabled: All cases except 2k-jup
  2099. * and OOR errors
  2100. */
  2101. hal_rx_mpdu_desc_info_get(hal_soc, ring_desc,
  2102. &mpdu_desc_info);
  2103. }
  2104. if (HAL_RX_REO_DESC_MSDU_COUNT_GET(ring_desc) == 0)
  2105. goto next_entry;
  2106. /*
  2107. * For REO error ring, only MSDU LINK DESC is expected.
  2108. * Handle HAL_RX_REO_MSDU_BUF_ADDR_TYPE exception case.
  2109. */
  2110. if (qdf_unlikely(buf_type != HAL_RX_REO_MSDU_LINK_DESC_TYPE)) {
  2111. int lmac_id;
  2112. lmac_id = dp_rx_err_exception(soc, ring_desc);
  2113. if (lmac_id >= 0)
  2114. rx_bufs_reaped[lmac_id] += 1;
  2115. goto next_entry;
  2116. }
  2117. hal_rx_buf_cookie_rbm_get(hal_soc, (uint32_t *)ring_desc,
  2118. &hbi);
  2119. /*
  2120. * check for the magic number in the sw cookie
  2121. */
  2122. qdf_assert_always((hbi.sw_cookie >> LINK_DESC_ID_SHIFT) &
  2123. soc->link_desc_id_start);
  2124. if (dp_idle_link_bm_id_check(soc, hbi.rbm, ring_desc)) {
  2125. DP_STATS_INC(soc, rx.err.invalid_link_cookie, 1);
  2126. goto next_entry;
  2127. }
  2128. status = dp_rx_link_cookie_check(ring_desc);
  2129. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  2130. DP_STATS_INC(soc, rx.err.invalid_link_cookie, 1);
  2131. break;
  2132. }
  2133. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  2134. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &hbi);
  2135. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  2136. &num_msdus);
  2137. if (!num_msdus ||
  2138. !dp_rx_is_sw_cookie_valid(soc, msdu_list.sw_cookie[0])) {
  2139. dp_rx_err_info_rl("Invalid MSDU info num_msdus %u cookie: 0x%x",
  2140. num_msdus, msdu_list.sw_cookie[0]);
  2141. dp_rx_link_desc_return(soc, ring_desc,
  2142. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  2143. goto next_entry;
  2144. }
  2145. dp_rx_err_ring_record_entry(soc, msdu_list.paddr[0],
  2146. msdu_list.sw_cookie[0],
  2147. msdu_list.rbm[0]);
  2148. // TODO - BE- Check if the RBM is to be checked for all chips
  2149. if (qdf_unlikely((msdu_list.rbm[0] !=
  2150. dp_rx_get_rx_bm_id(soc)) &&
  2151. (msdu_list.rbm[0] !=
  2152. soc->idle_link_bm_id) &&
  2153. (msdu_list.rbm[0] !=
  2154. dp_rx_get_defrag_bm_id(soc)))) {
  2155. /* TODO */
  2156. /* Call appropriate handler */
  2157. if (!wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  2158. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  2159. dp_rx_err_err("%pK: Invalid RBM %d",
  2160. soc, msdu_list.rbm[0]);
  2161. }
  2162. /* Return link descriptor through WBM ring (SW2WBM)*/
  2163. dp_rx_link_desc_return(soc, ring_desc,
  2164. HAL_BM_ACTION_RELEASE_MSDU_LIST);
  2165. goto next_entry;
  2166. }
  2167. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  2168. soc,
  2169. msdu_list.sw_cookie[0]);
  2170. qdf_assert_always(rx_desc);
  2171. mac_id = rx_desc->pool_id;
  2172. if (sw_pn_check_needed) {
  2173. goto process_reo_error_code;
  2174. }
  2175. if (mpdu_desc_info.bar_frame) {
  2176. qdf_assert_always(mpdu_desc_info.msdu_count == 1);
  2177. dp_rx_bar_frame_handle(soc, ring_desc, rx_desc,
  2178. &mpdu_desc_info, err_status,
  2179. error_code);
  2180. rx_bufs_reaped[mac_id] += 1;
  2181. goto next_entry;
  2182. }
  2183. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
  2184. /*
  2185. * We only handle one msdu per link desc for fragmented
  2186. * case. We drop the msdus and release the link desc
  2187. * back if there are more than one msdu in link desc.
  2188. */
  2189. if (qdf_unlikely(num_msdus > 1)) {
  2190. count = dp_rx_msdus_drop(soc, ring_desc,
  2191. &mpdu_desc_info,
  2192. &mac_id, quota);
  2193. rx_bufs_reaped[mac_id] += count;
  2194. goto next_entry;
  2195. }
  2196. /*
  2197. * this is a unlikely scenario where the host is reaping
  2198. * a descriptor which it already reaped just a while ago
  2199. * but is yet to replenish it back to HW.
  2200. * In this case host will dump the last 128 descriptors
  2201. * including the software descriptor rx_desc and assert.
  2202. */
  2203. if (qdf_unlikely(!rx_desc->in_use)) {
  2204. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  2205. dp_info_rl("Reaping rx_desc not in use!");
  2206. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  2207. ring_desc, rx_desc);
  2208. /* ignore duplicate RX desc and continue */
  2209. /* Pop out the descriptor */
  2210. goto next_entry;
  2211. }
  2212. ret = dp_rx_desc_paddr_sanity_check(rx_desc,
  2213. msdu_list.paddr[0]);
  2214. if (!ret) {
  2215. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  2216. rx_desc->in_err_state = 1;
  2217. goto next_entry;
  2218. }
  2219. count = dp_rx_frag_handle(soc,
  2220. ring_desc, &mpdu_desc_info,
  2221. rx_desc, &mac_id, quota);
  2222. rx_bufs_reaped[mac_id] += count;
  2223. DP_STATS_INC(soc, rx.rx_frags, 1);
  2224. goto next_entry;
  2225. }
  2226. process_reo_error_code:
  2227. /*
  2228. * Expect REO errors to be handled after this point
  2229. */
  2230. qdf_assert_always(err_status == HAL_REO_ERROR_DETECTED);
  2231. dp_info_rl("Got pkt with REO ERROR: %d", error_code);
  2232. switch (error_code) {
  2233. case HAL_REO_ERR_PN_CHECK_FAILED:
  2234. case HAL_REO_ERR_PN_ERROR_HANDLING_FLAG_SET:
  2235. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  2236. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2237. if (dp_pdev)
  2238. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  2239. count = dp_rx_pn_error_handle(soc,
  2240. ring_desc,
  2241. &mpdu_desc_info, &mac_id,
  2242. quota);
  2243. rx_bufs_reaped[mac_id] += count;
  2244. break;
  2245. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  2246. case HAL_REO_ERR_2K_ERROR_HANDLING_FLAG_SET:
  2247. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  2248. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  2249. case HAL_REO_ERR_BAR_FRAME_OOR:
  2250. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  2251. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  2252. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2253. if (dp_pdev)
  2254. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  2255. count = dp_rx_reo_err_entry_process(
  2256. soc,
  2257. ring_desc,
  2258. &mpdu_desc_info,
  2259. link_desc_va,
  2260. error_code);
  2261. rx_bufs_reaped[mac_id] += count;
  2262. break;
  2263. case HAL_REO_ERR_QUEUE_DESC_INVALID:
  2264. case HAL_REO_ERR_AMPDU_IN_NON_BA:
  2265. case HAL_REO_ERR_NON_BA_DUPLICATE:
  2266. case HAL_REO_ERR_BA_DUPLICATE:
  2267. case HAL_REO_ERR_BAR_FRAME_NO_BA_SESSION:
  2268. case HAL_REO_ERR_BAR_FRAME_SN_EQUALS_SSN:
  2269. case HAL_REO_ERR_QUEUE_DESC_BLOCKED_SET:
  2270. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  2271. count = dp_rx_msdus_drop(soc, ring_desc,
  2272. &mpdu_desc_info,
  2273. &mac_id, quota);
  2274. rx_bufs_reaped[mac_id] += count;
  2275. break;
  2276. default:
  2277. /* Assert if unexpected error type */
  2278. qdf_assert_always(0);
  2279. }
  2280. next_entry:
  2281. dp_rx_link_cookie_invalidate(ring_desc);
  2282. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2283. rx_bufs_reaped_total = 0;
  2284. for (i = 0; i < MAX_PDEV_CNT; i++)
  2285. rx_bufs_reaped_total += rx_bufs_reaped[i];
  2286. if (dp_rx_reap_loop_pkt_limit_hit(soc, rx_bufs_reaped_total,
  2287. max_reap_limit))
  2288. break;
  2289. }
  2290. done:
  2291. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  2292. if (soc->rx.flags.defrag_timeout_check) {
  2293. uint32_t now_ms =
  2294. qdf_system_ticks_to_msecs(qdf_system_ticks());
  2295. if (now_ms >= soc->rx.defrag.next_flush_ms)
  2296. dp_rx_defrag_waitlist_flush(soc);
  2297. }
  2298. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  2299. if (rx_bufs_reaped[mac_id]) {
  2300. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2301. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2302. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2303. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2304. rx_desc_pool,
  2305. rx_bufs_reaped[mac_id],
  2306. &dp_pdev->free_list_head,
  2307. &dp_pdev->free_list_tail,
  2308. false);
  2309. rx_bufs_used += rx_bufs_reaped[mac_id];
  2310. }
  2311. }
  2312. return rx_bufs_used; /* Assume no scale factor for now */
  2313. }
  2314. #ifdef DROP_RXDMA_DECRYPT_ERR
  2315. /**
  2316. * dp_handle_rxdma_decrypt_err() - Check if decrypt err frames can be handled
  2317. *
  2318. * Return: true if rxdma decrypt err frames are handled and false otherwise
  2319. */
  2320. static inline bool dp_handle_rxdma_decrypt_err(void)
  2321. {
  2322. return false;
  2323. }
  2324. #else
  2325. static inline bool dp_handle_rxdma_decrypt_err(void)
  2326. {
  2327. return true;
  2328. }
  2329. #endif
  2330. /*
  2331. * dp_rx_wbm_sg_list_last_msdu_war() - war for HW issue
  2332. *
  2333. * This is a war for HW issue where length is only valid in last msdu
  2334. *@soc: DP SOC handle
  2335. */
  2336. static inline void dp_rx_wbm_sg_list_last_msdu_war(struct dp_soc *soc)
  2337. {
  2338. if (soc->wbm_sg_last_msdu_war) {
  2339. uint32_t len;
  2340. qdf_nbuf_t temp = soc->wbm_sg_param.wbm_sg_nbuf_tail;
  2341. len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc,
  2342. qdf_nbuf_data(temp));
  2343. temp = soc->wbm_sg_param.wbm_sg_nbuf_head;
  2344. while (temp) {
  2345. QDF_NBUF_CB_RX_PKT_LEN(temp) = len;
  2346. temp = temp->next;
  2347. }
  2348. }
  2349. }
  2350. #ifdef RX_DESC_DEBUG_CHECK
  2351. /**
  2352. * dp_rx_wbm_desc_nbuf_sanity_check - Add sanity check to for WBM rx_desc paddr
  2353. * corruption
  2354. * @soc: core txrx main context
  2355. * @hal_ring_hdl: opaque pointer to the HAL Rx Error Ring
  2356. * @ring_desc: REO ring descriptor
  2357. * @rx_desc: Rx descriptor
  2358. *
  2359. * Return: NONE
  2360. */
  2361. static
  2362. QDF_STATUS dp_rx_wbm_desc_nbuf_sanity_check(struct dp_soc *soc,
  2363. hal_ring_handle_t hal_ring_hdl,
  2364. hal_ring_desc_t ring_desc,
  2365. struct dp_rx_desc *rx_desc)
  2366. {
  2367. struct hal_buf_info hbi;
  2368. hal_rx_wbm_rel_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  2369. /* Sanity check for possible buffer paddr corruption */
  2370. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  2371. return QDF_STATUS_SUCCESS;
  2372. hal_srng_dump_ring_desc(soc->hal_soc, hal_ring_hdl, ring_desc);
  2373. return QDF_STATUS_E_FAILURE;
  2374. }
  2375. #else
  2376. static
  2377. QDF_STATUS dp_rx_wbm_desc_nbuf_sanity_check(struct dp_soc *soc,
  2378. hal_ring_handle_t hal_ring_hdl,
  2379. hal_ring_desc_t ring_desc,
  2380. struct dp_rx_desc *rx_desc)
  2381. {
  2382. return QDF_STATUS_SUCCESS;
  2383. }
  2384. #endif
  2385. static inline bool
  2386. dp_rx_is_sg_formation_required(struct hal_wbm_err_desc_info *info)
  2387. {
  2388. /*
  2389. * Currently Null Queue and Unencrypted error handlers has support for
  2390. * SG. Other error handler do not deal with SG buffer.
  2391. */
  2392. if (((info->wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) &&
  2393. (info->reo_err_code == HAL_REO_ERR_QUEUE_DESC_ADDR_0)) ||
  2394. ((info->wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) &&
  2395. (info->rxdma_err_code == HAL_RXDMA_ERR_UNENCRYPTED)))
  2396. return true;
  2397. return false;
  2398. }
  2399. #ifdef QCA_DP_NBUF_FAST_RECYCLE_CHECK
  2400. static inline void dp_rx_err_tlv_invalidate(struct dp_soc *soc,
  2401. qdf_nbuf_t nbuf)
  2402. {
  2403. /*
  2404. * In case of fast recycle TX driver can avoid invalidate
  2405. * of buffer in case of SFE forward. We need to invalidate
  2406. * the TLV headers after writing to this location
  2407. */
  2408. qdf_nbuf_dma_inv_range_no_dsb((void *)nbuf->data,
  2409. (void *)(nbuf->data +
  2410. soc->rx_pkt_tlv_size +
  2411. L3_HEADER_PAD));
  2412. }
  2413. #else
  2414. static inline void dp_rx_err_tlv_invalidate(struct dp_soc *soc,
  2415. qdf_nbuf_t nbuf)
  2416. {
  2417. }
  2418. #endif
  2419. uint32_t
  2420. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  2421. hal_ring_handle_t hal_ring_hdl, uint32_t quota)
  2422. {
  2423. hal_ring_desc_t ring_desc;
  2424. hal_soc_handle_t hal_soc;
  2425. struct dp_rx_desc *rx_desc;
  2426. union dp_rx_desc_list_elem_t
  2427. *head[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { NULL } };
  2428. union dp_rx_desc_list_elem_t
  2429. *tail[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { NULL } };
  2430. uint32_t rx_bufs_used = 0;
  2431. uint32_t rx_bufs_reaped[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { 0 } };
  2432. uint8_t buf_type;
  2433. uint8_t mac_id;
  2434. struct dp_pdev *dp_pdev;
  2435. struct dp_srng *dp_rxdma_srng;
  2436. struct rx_desc_pool *rx_desc_pool;
  2437. uint8_t *rx_tlv_hdr;
  2438. bool is_tkip_mic_err;
  2439. qdf_nbuf_t nbuf_head = NULL;
  2440. qdf_nbuf_t nbuf_tail = NULL;
  2441. qdf_nbuf_t nbuf, next;
  2442. struct hal_wbm_err_desc_info wbm_err_info = { 0 };
  2443. uint8_t pool_id;
  2444. uint8_t tid = 0;
  2445. uint8_t msdu_continuation = 0;
  2446. bool process_sg_buf = false;
  2447. uint32_t wbm_err_src;
  2448. QDF_STATUS status;
  2449. struct dp_soc *replenish_soc;
  2450. uint8_t chip_id;
  2451. struct hal_rx_mpdu_desc_info mpdu_desc_info = { 0 };
  2452. /* Debug -- Remove later */
  2453. qdf_assert(soc && hal_ring_hdl);
  2454. hal_soc = soc->hal_soc;
  2455. /* Debug -- Remove later */
  2456. qdf_assert(hal_soc);
  2457. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  2458. /* TODO */
  2459. /*
  2460. * Need API to convert from hal_ring pointer to
  2461. * Ring Type / Ring Id combo
  2462. */
  2463. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK",
  2464. soc, hal_ring_hdl);
  2465. goto done;
  2466. }
  2467. while (qdf_likely(quota)) {
  2468. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2469. if (qdf_unlikely(!ring_desc))
  2470. break;
  2471. /* XXX */
  2472. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  2473. /*
  2474. * For WBM ring, expect only MSDU buffers
  2475. */
  2476. qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  2477. wbm_err_src = hal_rx_wbm_err_src_get(hal_soc, ring_desc);
  2478. qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  2479. (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
  2480. if (soc->arch_ops.dp_wbm_get_rx_desc_from_hal_desc(soc,
  2481. ring_desc,
  2482. &rx_desc)) {
  2483. dp_rx_err_err("get rx desc from hal_desc failed");
  2484. continue;
  2485. }
  2486. qdf_assert_always(rx_desc);
  2487. if (!dp_rx_desc_check_magic(rx_desc)) {
  2488. dp_rx_err_err("%pk: Invalid rx_desc %pk",
  2489. soc, rx_desc);
  2490. continue;
  2491. }
  2492. /*
  2493. * this is a unlikely scenario where the host is reaping
  2494. * a descriptor which it already reaped just a while ago
  2495. * but is yet to replenish it back to HW.
  2496. * In this case host will dump the last 128 descriptors
  2497. * including the software descriptor rx_desc and assert.
  2498. */
  2499. if (qdf_unlikely(!rx_desc->in_use)) {
  2500. DP_STATS_INC(soc, rx.err.hal_wbm_rel_dup, 1);
  2501. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  2502. ring_desc, rx_desc);
  2503. continue;
  2504. }
  2505. hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info, hal_soc);
  2506. nbuf = rx_desc->nbuf;
  2507. status = dp_rx_wbm_desc_nbuf_sanity_check(soc, hal_ring_hdl,
  2508. ring_desc, rx_desc);
  2509. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  2510. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  2511. dp_info_rl("Rx error Nbuf %pk sanity check failure!",
  2512. nbuf);
  2513. rx_desc->in_err_state = 1;
  2514. rx_desc->unmapped = 1;
  2515. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  2516. dp_rx_add_to_free_desc_list(
  2517. &head[rx_desc->chip_id][rx_desc->pool_id],
  2518. &tail[rx_desc->chip_id][rx_desc->pool_id],
  2519. rx_desc);
  2520. continue;
  2521. }
  2522. /* Get MPDU DESC info */
  2523. hal_rx_mpdu_desc_info_get(hal_soc, ring_desc, &mpdu_desc_info);
  2524. if (qdf_likely(mpdu_desc_info.mpdu_flags &
  2525. HAL_MPDU_F_QOS_CONTROL_VALID))
  2526. qdf_nbuf_set_tid_val(rx_desc->nbuf, mpdu_desc_info.tid);
  2527. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2528. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2529. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  2530. rx_desc->unmapped = 1;
  2531. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2532. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support &&
  2533. dp_rx_is_sg_formation_required(&wbm_err_info))) {
  2534. /* SG is detected from continuation bit */
  2535. msdu_continuation =
  2536. hal_rx_wbm_err_msdu_continuation_get(hal_soc,
  2537. ring_desc);
  2538. if (msdu_continuation &&
  2539. !(soc->wbm_sg_param.wbm_is_first_msdu_in_sg)) {
  2540. /* Update length from first buffer in SG */
  2541. soc->wbm_sg_param.wbm_sg_desc_msdu_len =
  2542. hal_rx_msdu_start_msdu_len_get(
  2543. soc->hal_soc,
  2544. qdf_nbuf_data(nbuf));
  2545. soc->wbm_sg_param.wbm_is_first_msdu_in_sg = true;
  2546. }
  2547. if (msdu_continuation) {
  2548. /* MSDU continued packets */
  2549. qdf_nbuf_set_rx_chfrag_cont(nbuf, 1);
  2550. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2551. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  2552. } else {
  2553. /* This is the terminal packet in SG */
  2554. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  2555. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  2556. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2557. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  2558. process_sg_buf = true;
  2559. }
  2560. }
  2561. /*
  2562. * save the wbm desc info in nbuf TLV. We will need this
  2563. * info when we do the actual nbuf processing
  2564. */
  2565. wbm_err_info.pool_id = rx_desc->pool_id;
  2566. hal_rx_priv_info_set_in_tlv(soc->hal_soc,
  2567. qdf_nbuf_data(nbuf),
  2568. (uint8_t *)&wbm_err_info,
  2569. sizeof(wbm_err_info));
  2570. dp_rx_err_tlv_invalidate(soc, nbuf);
  2571. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  2572. if (qdf_nbuf_is_rx_chfrag_cont(nbuf) || process_sg_buf) {
  2573. DP_RX_LIST_APPEND(soc->wbm_sg_param.wbm_sg_nbuf_head,
  2574. soc->wbm_sg_param.wbm_sg_nbuf_tail,
  2575. nbuf);
  2576. if (process_sg_buf) {
  2577. if (!dp_rx_buffer_pool_refill(
  2578. soc,
  2579. soc->wbm_sg_param.wbm_sg_nbuf_head,
  2580. rx_desc->pool_id))
  2581. DP_RX_MERGE_TWO_LIST(
  2582. nbuf_head, nbuf_tail,
  2583. soc->wbm_sg_param.wbm_sg_nbuf_head,
  2584. soc->wbm_sg_param.wbm_sg_nbuf_tail);
  2585. dp_rx_wbm_sg_list_last_msdu_war(soc);
  2586. dp_rx_wbm_sg_list_reset(soc);
  2587. process_sg_buf = false;
  2588. }
  2589. } else if (!dp_rx_buffer_pool_refill(soc, nbuf,
  2590. rx_desc->pool_id)) {
  2591. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, nbuf);
  2592. }
  2593. dp_rx_add_to_free_desc_list
  2594. (&head[rx_desc->chip_id][rx_desc->pool_id],
  2595. &tail[rx_desc->chip_id][rx_desc->pool_id], rx_desc);
  2596. /*
  2597. * if continuation bit is set then we have MSDU spread
  2598. * across multiple buffers, let us not decrement quota
  2599. * till we reap all buffers of that MSDU.
  2600. */
  2601. if (qdf_likely(!msdu_continuation))
  2602. quota -= 1;
  2603. }
  2604. done:
  2605. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  2606. for (chip_id = 0; chip_id < WLAN_MAX_MLO_CHIPS; chip_id++) {
  2607. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  2608. /*
  2609. * continue with next mac_id if no pkts were reaped
  2610. * from that pool
  2611. */
  2612. if (!rx_bufs_reaped[chip_id][mac_id])
  2613. continue;
  2614. replenish_soc =
  2615. soc->arch_ops.dp_rx_replenish_soc_get(soc, chip_id);
  2616. dp_rxdma_srng =
  2617. &replenish_soc->rx_refill_buf_ring[mac_id];
  2618. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  2619. dp_rx_buffers_replenish(replenish_soc, mac_id,
  2620. dp_rxdma_srng,
  2621. rx_desc_pool,
  2622. rx_bufs_reaped[chip_id][mac_id],
  2623. &head[chip_id][mac_id],
  2624. &tail[chip_id][mac_id], false);
  2625. rx_bufs_used += rx_bufs_reaped[chip_id][mac_id];
  2626. }
  2627. }
  2628. nbuf = nbuf_head;
  2629. while (nbuf) {
  2630. struct dp_txrx_peer *txrx_peer;
  2631. struct dp_peer *peer;
  2632. uint16_t peer_id;
  2633. uint8_t err_code;
  2634. uint8_t *tlv_hdr;
  2635. uint32_t peer_meta_data;
  2636. dp_txrx_ref_handle txrx_ref_handle = NULL;
  2637. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2638. /*
  2639. * retrieve the wbm desc info from nbuf TLV, so we can
  2640. * handle error cases appropriately
  2641. */
  2642. hal_rx_priv_info_get_from_tlv(soc->hal_soc, rx_tlv_hdr,
  2643. (uint8_t *)&wbm_err_info,
  2644. sizeof(wbm_err_info));
  2645. peer_meta_data = hal_rx_tlv_peer_meta_data_get(soc->hal_soc,
  2646. rx_tlv_hdr);
  2647. peer_id = dp_rx_peer_metadata_peer_id_get(soc, peer_meta_data);
  2648. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  2649. &txrx_ref_handle,
  2650. DP_MOD_ID_RX_ERR);
  2651. if (!txrx_peer)
  2652. dp_info_rl("peer is null peer_id %u err_src %u, "
  2653. "REO: push_rsn %u err_code %u, "
  2654. "RXDMA: push_rsn %u err_code %u",
  2655. peer_id, wbm_err_info.wbm_err_src,
  2656. wbm_err_info.reo_psh_rsn,
  2657. wbm_err_info.reo_err_code,
  2658. wbm_err_info.rxdma_psh_rsn,
  2659. wbm_err_info.rxdma_err_code);
  2660. /* Set queue_mapping in nbuf to 0 */
  2661. dp_set_rx_queue(nbuf, 0);
  2662. next = nbuf->next;
  2663. /*
  2664. * Form the SG for msdu continued buffers
  2665. * QCN9000 has this support
  2666. */
  2667. if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  2668. nbuf = dp_rx_sg_create(soc, nbuf);
  2669. next = nbuf->next;
  2670. /*
  2671. * SG error handling is not done correctly,
  2672. * drop SG frames for now.
  2673. */
  2674. dp_rx_nbuf_free(nbuf);
  2675. dp_info_rl("scattered msdu dropped");
  2676. nbuf = next;
  2677. if (txrx_peer)
  2678. dp_txrx_peer_unref_delete(txrx_ref_handle,
  2679. DP_MOD_ID_RX_ERR);
  2680. continue;
  2681. }
  2682. if (wbm_err_info.wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
  2683. if (wbm_err_info.reo_psh_rsn
  2684. == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
  2685. DP_STATS_INC(soc,
  2686. rx.err.reo_error
  2687. [wbm_err_info.reo_err_code], 1);
  2688. /* increment @pdev level */
  2689. pool_id = wbm_err_info.pool_id;
  2690. dp_pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  2691. if (dp_pdev)
  2692. DP_STATS_INC(dp_pdev, err.reo_error,
  2693. 1);
  2694. switch (wbm_err_info.reo_err_code) {
  2695. /*
  2696. * Handling for packets which have NULL REO
  2697. * queue descriptor
  2698. */
  2699. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  2700. pool_id = wbm_err_info.pool_id;
  2701. dp_rx_null_q_desc_handle(soc, nbuf,
  2702. rx_tlv_hdr,
  2703. pool_id,
  2704. txrx_peer);
  2705. break;
  2706. /* TODO */
  2707. /* Add per error code accounting */
  2708. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  2709. if (txrx_peer)
  2710. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2711. rx.err.jump_2k_err,
  2712. 1);
  2713. pool_id = wbm_err_info.pool_id;
  2714. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  2715. rx_tlv_hdr)) {
  2716. tid =
  2717. hal_rx_mpdu_start_tid_get(hal_soc, rx_tlv_hdr);
  2718. }
  2719. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2720. hal_rx_msdu_start_msdu_len_get(
  2721. soc->hal_soc, rx_tlv_hdr);
  2722. nbuf->next = NULL;
  2723. dp_2k_jump_handle(soc, nbuf,
  2724. rx_tlv_hdr,
  2725. peer_id, tid);
  2726. break;
  2727. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  2728. if (txrx_peer)
  2729. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2730. rx.err.oor_err,
  2731. 1);
  2732. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  2733. rx_tlv_hdr)) {
  2734. tid =
  2735. hal_rx_mpdu_start_tid_get(hal_soc, rx_tlv_hdr);
  2736. }
  2737. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2738. hal_rx_msdu_start_msdu_len_get(
  2739. soc->hal_soc, rx_tlv_hdr);
  2740. nbuf->next = NULL;
  2741. dp_rx_oor_handle(soc, nbuf,
  2742. peer_id,
  2743. rx_tlv_hdr);
  2744. break;
  2745. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  2746. case HAL_REO_ERR_BAR_FRAME_OOR:
  2747. peer = dp_peer_get_tgt_peer_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  2748. if (peer) {
  2749. dp_rx_err_handle_bar(soc, peer,
  2750. nbuf);
  2751. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  2752. }
  2753. dp_rx_nbuf_free(nbuf);
  2754. break;
  2755. case HAL_REO_ERR_PN_CHECK_FAILED:
  2756. case HAL_REO_ERR_PN_ERROR_HANDLING_FLAG_SET:
  2757. if (txrx_peer)
  2758. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2759. rx.err.pn_err,
  2760. 1);
  2761. dp_rx_nbuf_free(nbuf);
  2762. break;
  2763. default:
  2764. dp_info_rl("Got pkt with REO ERROR: %d",
  2765. wbm_err_info.reo_err_code);
  2766. dp_rx_nbuf_free(nbuf);
  2767. }
  2768. } else if (wbm_err_info.reo_psh_rsn
  2769. == HAL_RX_WBM_REO_PSH_RSN_ROUTE) {
  2770. dp_rx_err_route_hdl(soc, nbuf, txrx_peer,
  2771. rx_tlv_hdr,
  2772. HAL_RX_WBM_ERR_SRC_REO);
  2773. } else {
  2774. /* should not enter here */
  2775. dp_rx_err_alert("invalid reo push reason %u",
  2776. wbm_err_info.reo_psh_rsn);
  2777. dp_rx_nbuf_free(nbuf);
  2778. qdf_assert_always(0);
  2779. }
  2780. } else if (wbm_err_info.wbm_err_src ==
  2781. HAL_RX_WBM_ERR_SRC_RXDMA) {
  2782. if (wbm_err_info.rxdma_psh_rsn
  2783. == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  2784. DP_STATS_INC(soc,
  2785. rx.err.rxdma_error
  2786. [wbm_err_info.rxdma_err_code], 1);
  2787. /* increment @pdev level */
  2788. pool_id = wbm_err_info.pool_id;
  2789. dp_pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  2790. if (dp_pdev)
  2791. DP_STATS_INC(dp_pdev,
  2792. err.rxdma_error, 1);
  2793. switch (wbm_err_info.rxdma_err_code) {
  2794. case HAL_RXDMA_ERR_UNENCRYPTED:
  2795. case HAL_RXDMA_ERR_WIFI_PARSE:
  2796. if (txrx_peer)
  2797. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2798. rx.err.rxdma_wifi_parse_err,
  2799. 1);
  2800. pool_id = wbm_err_info.pool_id;
  2801. dp_rx_process_rxdma_err(soc, nbuf,
  2802. rx_tlv_hdr,
  2803. txrx_peer,
  2804. wbm_err_info.
  2805. rxdma_err_code,
  2806. pool_id);
  2807. break;
  2808. case HAL_RXDMA_ERR_TKIP_MIC:
  2809. dp_rx_process_mic_error(soc, nbuf,
  2810. rx_tlv_hdr,
  2811. txrx_peer);
  2812. if (txrx_peer)
  2813. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2814. rx.err.mic_err,
  2815. 1);
  2816. break;
  2817. case HAL_RXDMA_ERR_DECRYPT:
  2818. /* All the TKIP-MIC failures are treated as Decrypt Errors
  2819. * for QCN9224 Targets
  2820. */
  2821. is_tkip_mic_err = hal_rx_msdu_end_is_tkip_mic_err(hal_soc, rx_tlv_hdr);
  2822. if (is_tkip_mic_err && txrx_peer) {
  2823. dp_rx_process_mic_error(soc, nbuf,
  2824. rx_tlv_hdr,
  2825. txrx_peer);
  2826. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2827. rx.err.mic_err,
  2828. 1);
  2829. break;
  2830. }
  2831. if (txrx_peer) {
  2832. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2833. rx.err.decrypt_err,
  2834. 1);
  2835. dp_rx_nbuf_free(nbuf);
  2836. break;
  2837. }
  2838. if (!dp_handle_rxdma_decrypt_err()) {
  2839. dp_rx_nbuf_free(nbuf);
  2840. break;
  2841. }
  2842. pool_id = wbm_err_info.pool_id;
  2843. err_code = wbm_err_info.rxdma_err_code;
  2844. tlv_hdr = rx_tlv_hdr;
  2845. dp_rx_process_rxdma_err(soc, nbuf,
  2846. tlv_hdr, NULL,
  2847. err_code,
  2848. pool_id);
  2849. break;
  2850. case HAL_RXDMA_MULTICAST_ECHO:
  2851. if (txrx_peer)
  2852. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  2853. rx.mec_drop, 1,
  2854. qdf_nbuf_len(nbuf));
  2855. dp_rx_nbuf_free(nbuf);
  2856. break;
  2857. case HAL_RXDMA_UNAUTHORIZED_WDS:
  2858. pool_id = wbm_err_info.pool_id;
  2859. err_code = wbm_err_info.rxdma_err_code;
  2860. tlv_hdr = rx_tlv_hdr;
  2861. dp_rx_process_rxdma_err(soc, nbuf,
  2862. tlv_hdr,
  2863. txrx_peer,
  2864. err_code,
  2865. pool_id);
  2866. break;
  2867. default:
  2868. dp_rx_nbuf_free(nbuf);
  2869. dp_err_rl("RXDMA error %d",
  2870. wbm_err_info.rxdma_err_code);
  2871. }
  2872. } else if (wbm_err_info.rxdma_psh_rsn
  2873. == HAL_RX_WBM_RXDMA_PSH_RSN_ROUTE) {
  2874. dp_rx_err_route_hdl(soc, nbuf, txrx_peer,
  2875. rx_tlv_hdr,
  2876. HAL_RX_WBM_ERR_SRC_RXDMA);
  2877. } else if (wbm_err_info.rxdma_psh_rsn
  2878. == HAL_RX_WBM_RXDMA_PSH_RSN_FLUSH) {
  2879. dp_rx_err_err("rxdma push reason %u",
  2880. wbm_err_info.rxdma_psh_rsn);
  2881. DP_STATS_INC(soc, rx.err.rx_flush_count, 1);
  2882. dp_rx_nbuf_free(nbuf);
  2883. } else {
  2884. /* should not enter here */
  2885. dp_rx_err_alert("invalid rxdma push reason %u",
  2886. wbm_err_info.rxdma_psh_rsn);
  2887. dp_rx_nbuf_free(nbuf);
  2888. qdf_assert_always(0);
  2889. }
  2890. } else {
  2891. /* Should not come here */
  2892. qdf_assert(0);
  2893. }
  2894. if (txrx_peer)
  2895. dp_txrx_peer_unref_delete(txrx_ref_handle,
  2896. DP_MOD_ID_RX_ERR);
  2897. nbuf = next;
  2898. }
  2899. return rx_bufs_used; /* Assume no scale factor for now */
  2900. }
  2901. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2902. /**
  2903. * dup_desc_dbg() - dump and assert if duplicate rx desc found
  2904. *
  2905. * @soc: core DP main context
  2906. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  2907. * @rx_desc: void pointer to rx descriptor
  2908. *
  2909. * Return: void
  2910. */
  2911. static void dup_desc_dbg(struct dp_soc *soc,
  2912. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2913. void *rx_desc)
  2914. {
  2915. DP_STATS_INC(soc, rx.err.hal_rxdma_err_dup, 1);
  2916. dp_rx_dump_info_and_assert(
  2917. soc,
  2918. soc->rx_rel_ring.hal_srng,
  2919. hal_rxdma_desc_to_hal_ring_desc(rxdma_dst_ring_desc),
  2920. rx_desc);
  2921. }
  2922. /**
  2923. * dp_rx_err_mpdu_pop() - extract the MSDU's from link descs
  2924. *
  2925. * @soc: core DP main context
  2926. * @mac_id: mac id which is one of 3 mac_ids
  2927. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  2928. * @head: head of descs list to be freed
  2929. * @tail: tail of decs list to be freed
  2930. * Return: number of msdu in MPDU to be popped
  2931. */
  2932. static inline uint32_t
  2933. dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  2934. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2935. union dp_rx_desc_list_elem_t **head,
  2936. union dp_rx_desc_list_elem_t **tail)
  2937. {
  2938. void *rx_msdu_link_desc;
  2939. qdf_nbuf_t msdu;
  2940. qdf_nbuf_t last;
  2941. struct hal_rx_msdu_list msdu_list;
  2942. uint16_t num_msdus;
  2943. struct hal_buf_info buf_info;
  2944. uint32_t rx_bufs_used = 0;
  2945. uint32_t msdu_cnt;
  2946. uint32_t i;
  2947. uint8_t push_reason;
  2948. uint8_t rxdma_error_code = 0;
  2949. uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
  2950. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2951. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  2952. hal_rxdma_desc_t ring_desc;
  2953. struct rx_desc_pool *rx_desc_pool;
  2954. if (!pdev) {
  2955. dp_rx_err_debug("%pK: pdev is null for mac_id = %d",
  2956. soc, mac_id);
  2957. return rx_bufs_used;
  2958. }
  2959. msdu = 0;
  2960. last = NULL;
  2961. hal_rx_reo_ent_buf_paddr_get(soc->hal_soc, rxdma_dst_ring_desc,
  2962. &buf_info, &msdu_cnt);
  2963. push_reason =
  2964. hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc);
  2965. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  2966. rxdma_error_code =
  2967. hal_rx_reo_ent_rxdma_error_code_get(rxdma_dst_ring_desc);
  2968. }
  2969. do {
  2970. rx_msdu_link_desc =
  2971. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  2972. qdf_assert_always(rx_msdu_link_desc);
  2973. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  2974. &msdu_list, &num_msdus);
  2975. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  2976. /* if the msdus belongs to NSS offloaded radio &&
  2977. * the rbm is not SW1_BM then return the msdu_link
  2978. * descriptor without freeing the msdus (nbufs). let
  2979. * these buffers be given to NSS completion ring for
  2980. * NSS to free them.
  2981. * else iterate through the msdu link desc list and
  2982. * free each msdu in the list.
  2983. */
  2984. if (msdu_list.rbm[0] !=
  2985. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id) &&
  2986. wlan_cfg_get_dp_pdev_nss_enabled(
  2987. pdev->wlan_cfg_ctx))
  2988. bm_action = HAL_BM_ACTION_RELEASE_MSDU_LIST;
  2989. else {
  2990. for (i = 0; i < num_msdus; i++) {
  2991. struct dp_rx_desc *rx_desc =
  2992. soc->arch_ops.
  2993. dp_rx_desc_cookie_2_va(
  2994. soc,
  2995. msdu_list.sw_cookie[i]);
  2996. qdf_assert_always(rx_desc);
  2997. msdu = rx_desc->nbuf;
  2998. /*
  2999. * this is a unlikely scenario
  3000. * where the host is reaping
  3001. * a descriptor which
  3002. * it already reaped just a while ago
  3003. * but is yet to replenish
  3004. * it back to HW.
  3005. * In this case host will dump
  3006. * the last 128 descriptors
  3007. * including the software descriptor
  3008. * rx_desc and assert.
  3009. */
  3010. ring_desc = rxdma_dst_ring_desc;
  3011. if (qdf_unlikely(!rx_desc->in_use)) {
  3012. dup_desc_dbg(soc,
  3013. ring_desc,
  3014. rx_desc);
  3015. continue;
  3016. }
  3017. if (rx_desc->unmapped == 0) {
  3018. rx_desc_pool =
  3019. &soc->rx_desc_buf[rx_desc->pool_id];
  3020. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  3021. dp_rx_nbuf_unmap_pool(soc,
  3022. rx_desc_pool,
  3023. msdu);
  3024. rx_desc->unmapped = 1;
  3025. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  3026. }
  3027. dp_rx_err_debug("%pK: msdu_nbuf=%pK ",
  3028. soc, msdu);
  3029. dp_rx_buffer_pool_nbuf_free(soc, msdu,
  3030. rx_desc->pool_id);
  3031. rx_bufs_used++;
  3032. dp_rx_add_to_free_desc_list(head,
  3033. tail, rx_desc);
  3034. }
  3035. }
  3036. } else {
  3037. rxdma_error_code = HAL_RXDMA_ERR_WAR;
  3038. }
  3039. /*
  3040. * Store the current link buffer into to the local structure
  3041. * to be used for release purpose.
  3042. */
  3043. hal_rxdma_buff_addr_info_set(soc->hal_soc, rx_link_buf_info,
  3044. buf_info.paddr, buf_info.sw_cookie,
  3045. buf_info.rbm);
  3046. hal_rx_mon_next_link_desc_get(soc->hal_soc, rx_msdu_link_desc,
  3047. &buf_info);
  3048. dp_rx_link_desc_return_by_addr(soc,
  3049. (hal_buff_addrinfo_t)
  3050. rx_link_buf_info,
  3051. bm_action);
  3052. } while (buf_info.paddr);
  3053. DP_STATS_INC(soc, rx.err.rxdma_error[rxdma_error_code], 1);
  3054. if (pdev)
  3055. DP_STATS_INC(pdev, err.rxdma_error, 1);
  3056. if (rxdma_error_code == HAL_RXDMA_ERR_DECRYPT) {
  3057. dp_rx_err_err("%pK: Packet received with Decrypt error", soc);
  3058. }
  3059. return rx_bufs_used;
  3060. }
  3061. uint32_t
  3062. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  3063. uint32_t mac_id, uint32_t quota)
  3064. {
  3065. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  3066. hal_rxdma_desc_t rxdma_dst_ring_desc;
  3067. hal_soc_handle_t hal_soc;
  3068. void *err_dst_srng;
  3069. union dp_rx_desc_list_elem_t *head = NULL;
  3070. union dp_rx_desc_list_elem_t *tail = NULL;
  3071. struct dp_srng *dp_rxdma_srng;
  3072. struct rx_desc_pool *rx_desc_pool;
  3073. uint32_t work_done = 0;
  3074. uint32_t rx_bufs_used = 0;
  3075. if (!pdev)
  3076. return 0;
  3077. err_dst_srng = soc->rxdma_err_dst_ring[mac_id].hal_srng;
  3078. if (!err_dst_srng) {
  3079. dp_rx_err_err("%pK: HAL Monitor Destination Ring Init Failed -- %pK",
  3080. soc, err_dst_srng);
  3081. return 0;
  3082. }
  3083. hal_soc = soc->hal_soc;
  3084. qdf_assert(hal_soc);
  3085. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, err_dst_srng))) {
  3086. dp_rx_err_err("%pK: HAL Monitor Destination Ring Init Failed -- %pK",
  3087. soc, err_dst_srng);
  3088. return 0;
  3089. }
  3090. while (qdf_likely(quota-- && (rxdma_dst_ring_desc =
  3091. hal_srng_dst_get_next(hal_soc, err_dst_srng)))) {
  3092. rx_bufs_used += dp_rx_err_mpdu_pop(soc, mac_id,
  3093. rxdma_dst_ring_desc,
  3094. &head, &tail);
  3095. }
  3096. dp_srng_access_end(int_ctx, soc, err_dst_srng);
  3097. if (rx_bufs_used) {
  3098. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  3099. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  3100. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  3101. } else {
  3102. dp_rxdma_srng = &soc->rx_refill_buf_ring[pdev->lmac_id];
  3103. rx_desc_pool = &soc->rx_desc_buf[pdev->lmac_id];
  3104. }
  3105. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  3106. rx_desc_pool, rx_bufs_used, &head, &tail, false);
  3107. work_done += rx_bufs_used;
  3108. }
  3109. return work_done;
  3110. }
  3111. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  3112. static inline void
  3113. dp_wbm_int_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  3114. hal_rxdma_desc_t rxdma_dst_ring_desc,
  3115. union dp_rx_desc_list_elem_t **head,
  3116. union dp_rx_desc_list_elem_t **tail,
  3117. uint32_t *rx_bufs_used)
  3118. {
  3119. void *rx_msdu_link_desc;
  3120. qdf_nbuf_t msdu;
  3121. qdf_nbuf_t last;
  3122. struct hal_rx_msdu_list msdu_list;
  3123. uint16_t num_msdus;
  3124. struct hal_buf_info buf_info;
  3125. uint32_t msdu_cnt, i;
  3126. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  3127. struct rx_desc_pool *rx_desc_pool;
  3128. struct dp_rx_desc *rx_desc;
  3129. msdu = 0;
  3130. last = NULL;
  3131. hal_rx_reo_ent_buf_paddr_get(soc->hal_soc, rxdma_dst_ring_desc,
  3132. &buf_info, &msdu_cnt);
  3133. do {
  3134. rx_msdu_link_desc =
  3135. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  3136. if (!rx_msdu_link_desc) {
  3137. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_LINK_DESC], 1);
  3138. break;
  3139. }
  3140. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  3141. &msdu_list, &num_msdus);
  3142. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  3143. for (i = 0; i < num_msdus; i++) {
  3144. if (!dp_rx_is_sw_cookie_valid(soc, msdu_list.sw_cookie[i])) {
  3145. dp_rx_err_info_rl("Invalid MSDU info cookie: 0x%x",
  3146. msdu_list.sw_cookie[i]);
  3147. continue;
  3148. }
  3149. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  3150. soc,
  3151. msdu_list.sw_cookie[i]);
  3152. qdf_assert_always(rx_desc);
  3153. rx_desc_pool =
  3154. &soc->rx_desc_buf[rx_desc->pool_id];
  3155. msdu = rx_desc->nbuf;
  3156. /*
  3157. * this is a unlikely scenario where the host is reaping
  3158. * a descriptor which it already reaped just a while ago
  3159. * but is yet to replenish it back to HW.
  3160. */
  3161. if (qdf_unlikely(!rx_desc->in_use) ||
  3162. qdf_unlikely(!msdu)) {
  3163. dp_rx_err_info_rl("Reaping rx_desc not in use!");
  3164. continue;
  3165. }
  3166. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  3167. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, msdu);
  3168. rx_desc->unmapped = 1;
  3169. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  3170. dp_rx_buffer_pool_nbuf_free(soc, msdu,
  3171. rx_desc->pool_id);
  3172. rx_bufs_used[rx_desc->pool_id]++;
  3173. dp_rx_add_to_free_desc_list(head,
  3174. tail, rx_desc);
  3175. }
  3176. }
  3177. /*
  3178. * Store the current link buffer into to the local structure
  3179. * to be used for release purpose.
  3180. */
  3181. hal_rxdma_buff_addr_info_set(soc->hal_soc, rx_link_buf_info,
  3182. buf_info.paddr, buf_info.sw_cookie,
  3183. buf_info.rbm);
  3184. hal_rx_mon_next_link_desc_get(soc->hal_soc, rx_msdu_link_desc,
  3185. &buf_info);
  3186. dp_rx_link_desc_return_by_addr(soc, (hal_buff_addrinfo_t)
  3187. rx_link_buf_info,
  3188. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  3189. } while (buf_info.paddr);
  3190. }
  3191. /*
  3192. *
  3193. * dp_handle_wbm_internal_error() - handles wbm_internal_error case
  3194. *
  3195. * @soc: core DP main context
  3196. * @hal_desc: hal descriptor
  3197. * @buf_type: indicates if the buffer is of type link disc or msdu
  3198. * Return: None
  3199. *
  3200. * wbm_internal_error is seen in following scenarios :
  3201. *
  3202. * 1. Null pointers detected in WBM_RELEASE_RING descriptors
  3203. * 2. Null pointers detected during delinking process
  3204. *
  3205. * Some null pointer cases:
  3206. *
  3207. * a. MSDU buffer pointer is NULL
  3208. * b. Next_MSDU_Link_Desc pointer is NULL, with no last msdu flag
  3209. * c. MSDU buffer pointer is NULL or Next_Link_Desc pointer is NULL
  3210. */
  3211. void
  3212. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  3213. uint32_t buf_type)
  3214. {
  3215. struct hal_buf_info buf_info = {0};
  3216. struct dp_rx_desc *rx_desc = NULL;
  3217. struct rx_desc_pool *rx_desc_pool;
  3218. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = {0};
  3219. union dp_rx_desc_list_elem_t *head = NULL;
  3220. union dp_rx_desc_list_elem_t *tail = NULL;
  3221. uint8_t pool_id;
  3222. uint8_t mac_id;
  3223. hal_rx_reo_buf_paddr_get(soc->hal_soc, hal_desc, &buf_info);
  3224. if (!buf_info.paddr) {
  3225. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_BUFFER], 1);
  3226. return;
  3227. }
  3228. /* buffer_addr_info is the first element of ring_desc */
  3229. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)hal_desc,
  3230. &buf_info);
  3231. if (buf_type == HAL_WBM_RELEASE_RING_2_BUFFER_TYPE) {
  3232. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_MSDU_BUFF], 1);
  3233. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  3234. soc,
  3235. buf_info.sw_cookie);
  3236. if (rx_desc && rx_desc->nbuf) {
  3237. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  3238. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  3239. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool,
  3240. rx_desc->nbuf);
  3241. rx_desc->unmapped = 1;
  3242. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  3243. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  3244. rx_desc->pool_id);
  3245. dp_rx_add_to_free_desc_list(&head,
  3246. &tail,
  3247. rx_desc);
  3248. rx_bufs_reaped[rx_desc->pool_id]++;
  3249. }
  3250. } else if (buf_type == HAL_WBM_RELEASE_RING_2_DESC_TYPE) {
  3251. pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(buf_info.sw_cookie);
  3252. dp_wbm_int_err_mpdu_pop(soc, pool_id, hal_desc,
  3253. &head, &tail, rx_bufs_reaped);
  3254. }
  3255. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  3256. struct rx_desc_pool *rx_desc_pool;
  3257. struct dp_srng *dp_rxdma_srng;
  3258. if (!rx_bufs_reaped[mac_id])
  3259. continue;
  3260. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_BUFF_REAPED], 1);
  3261. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  3262. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  3263. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  3264. rx_desc_pool,
  3265. rx_bufs_reaped[mac_id],
  3266. &head, &tail, false);
  3267. }
  3268. }
  3269. #endif /* QCA_HOST_MODE_WIFI_DISABLED */