msm_cvp_internal.h 9.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #ifndef _MSM_CVP_INTERNAL_H_
  7. #define _MSM_CVP_INTERNAL_H_
  8. #include <linux/atomic.h>
  9. #include <linux/sched.h>
  10. #include <linux/list.h>
  11. #include <linux/time.h>
  12. #include <linux/types.h>
  13. #include <linux/completion.h>
  14. #include <linux/wait.h>
  15. #include <linux/workqueue.h>
  16. #include <linux/interconnect.h>
  17. #include <linux/kref.h>
  18. #include <linux/cdev.h>
  19. #include <linux/slab.h>
  20. #include <linux/kthread.h>
  21. #include <linux/dma-mapping.h>
  22. #include "msm_cvp_core.h"
  23. #include <media/msm_eva_private.h>
  24. #include "cvp_hfi_api.h"
  25. #include "cvp_hfi_helper.h"
  26. #define MAX_SUPPORTED_INSTANCES 16
  27. #define MAX_DEBUGFS_NAME 50
  28. #define MAX_DSP_INIT_ATTEMPTS 16
  29. #define FENCE_WAIT_SIGNAL_TIMEOUT 100
  30. #define FENCE_WAIT_SIGNAL_RETRY_TIMES 20
  31. #define FENCE_BIT (1ULL << 63)
  32. #define FENCE_DMM_ICA_ENABLED_IDX 0
  33. #define FENCE_DMM_DS_IDX 1
  34. #define FENCE_DMM_OUTPUT_IDX 7
  35. #define SYS_MSG_START HAL_SYS_INIT_DONE
  36. #define SYS_MSG_END HAL_SYS_ERROR
  37. #define SESSION_MSG_START HAL_SESSION_EVENT_CHANGE
  38. #define SESSION_MSG_END HAL_SESSION_ERROR
  39. #define SYS_MSG_INDEX(__msg) (__msg - SYS_MSG_START)
  40. #define SESSION_MSG_INDEX(__msg) (__msg - SESSION_MSG_START)
  41. #define ARP_BUF_SIZE 0x300000
  42. #define CVP_RT_PRIO_THRESHOLD 1
  43. struct msm_cvp_inst;
  44. enum cvp_core_state {
  45. CVP_CORE_UNINIT = 0,
  46. CVP_CORE_INIT,
  47. CVP_CORE_INIT_DONE,
  48. };
  49. enum instance_state {
  50. MSM_CVP_CORE_UNINIT_DONE = 0x0001,
  51. MSM_CVP_CORE_INIT,
  52. MSM_CVP_CORE_INIT_DONE,
  53. MSM_CVP_OPEN,
  54. MSM_CVP_OPEN_DONE,
  55. MSM_CVP_CLOSE,
  56. MSM_CVP_CLOSE_DONE,
  57. MSM_CVP_CORE_UNINIT,
  58. MSM_CVP_CORE_INVALID
  59. };
  60. enum dsp_state {
  61. DSP_INVALID,
  62. DSP_UNINIT,
  63. DSP_PROBED,
  64. DSP_READY,
  65. DSP_SUSPEND,
  66. DSP_INACTIVE,
  67. };
  68. struct msm_cvp_common_data {
  69. char key[128];
  70. int value;
  71. };
  72. enum sku_version {
  73. SKU_VERSION_0 = 0,
  74. SKU_VERSION_1,
  75. SKU_VERSION_2,
  76. };
  77. enum vpu_version {
  78. VPU_VERSION_4 = 1,
  79. VPU_VERSION_5,
  80. };
  81. struct msm_cvp_ubwc_config_data {
  82. struct {
  83. u32 max_channel_override : 1;
  84. u32 mal_length_override : 1;
  85. u32 hb_override : 1;
  86. u32 bank_swzl_level_override : 1;
  87. u32 bank_spreading_override : 1;
  88. u32 reserved : 27;
  89. } override_bit_info;
  90. u32 max_channels;
  91. u32 mal_length;
  92. u32 highest_bank_bit;
  93. u32 bank_swzl_level;
  94. u32 bank_spreading;
  95. };
  96. struct msm_cvp_qos_setting {
  97. u32 axi_qos;
  98. u32 prioritylut_low;
  99. u32 prioritylut_high;
  100. u32 urgency_low;
  101. u32 dangerlut_low;
  102. u32 safelut_low;
  103. };
  104. struct msm_cvp_platform_data {
  105. struct msm_cvp_common_data *common_data;
  106. unsigned int common_data_length;
  107. unsigned int sku_version;
  108. uint32_t vpu_ver;
  109. unsigned int vm_id; /* pvm: 1; tvm: 2 */
  110. struct msm_cvp_ubwc_config_data *ubwc_config;
  111. struct msm_cvp_qos_setting *noc_qos;
  112. };
  113. struct cvp_kmem_cache {
  114. struct kmem_cache *cache;
  115. atomic_t nr_objs;
  116. };
  117. struct msm_cvp_drv {
  118. struct mutex lock;
  119. struct msm_cvp_core *cvp_core;
  120. struct dentry *debugfs_root;
  121. int thermal_level;
  122. u32 sku_version;
  123. struct cvp_kmem_cache msg_cache;
  124. struct cvp_kmem_cache frame_cache;
  125. struct cvp_kmem_cache buf_cache;
  126. struct cvp_kmem_cache smem_cache;
  127. char fw_version[CVP_VERSION_LENGTH];
  128. };
  129. enum profiling_points {
  130. SYS_INIT = 0,
  131. SESSION_INIT,
  132. LOAD_RESOURCES,
  133. FRAME_PROCESSING,
  134. FW_IDLE,
  135. MAX_PROFILING_POINTS,
  136. };
  137. struct cvp_clock_data {
  138. int buffer_counter;
  139. int load;
  140. int load_low;
  141. int load_norm;
  142. int load_high;
  143. int min_threshold;
  144. int max_threshold;
  145. unsigned long bitrate;
  146. unsigned long min_freq;
  147. unsigned long curr_freq;
  148. u32 ddr_bw;
  149. u32 sys_cache_bw;
  150. u32 operating_rate;
  151. bool low_latency_mode;
  152. bool turbo_mode;
  153. };
  154. struct cvp_profile_data {
  155. int start;
  156. int stop;
  157. int cumulative;
  158. char name[64];
  159. int sampling;
  160. int average;
  161. };
  162. struct msm_cvp_debug {
  163. struct cvp_profile_data pdata[MAX_PROFILING_POINTS];
  164. int profile;
  165. int samples;
  166. };
  167. enum msm_cvp_modes {
  168. CVP_SECURE = BIT(0),
  169. CVP_TURBO = BIT(1),
  170. CVP_THUMBNAIL = BIT(2),
  171. CVP_LOW_POWER = BIT(3),
  172. CVP_REALTIME = BIT(4),
  173. };
  174. #define MAX_NUM_MSGS_PER_SESSION 128
  175. struct cvp_session_msg {
  176. struct list_head node;
  177. struct cvp_hfi_msg_session_hdr_ext pkt;
  178. };
  179. struct cvp_session_queue {
  180. spinlock_t lock;
  181. enum queue_state state;
  182. unsigned int msg_count;
  183. struct list_head msgs;
  184. wait_queue_head_t wq;
  185. };
  186. #define CVP_CYCLE_STAT_SIZE 8
  187. struct cvp_cycle_stat {
  188. u32 busy[CVP_CYCLE_STAT_SIZE];
  189. u32 total;
  190. u32 idx;
  191. u32 size;
  192. };
  193. struct cvp_cycle_info {
  194. u32 sum_fps[HFI_MAX_HW_THREADS];
  195. u32 hi_ctrl_lim[HFI_MAX_HW_THREADS];
  196. u32 lo_ctrl_lim[HFI_MAX_HW_THREADS];
  197. struct cvp_cycle_stat cycle[HFI_MAX_HW_THREADS];
  198. unsigned long conf_freq;
  199. };
  200. struct cvp_session_prop {
  201. u32 type;
  202. u32 kernel_mask;
  203. u32 priority;
  204. u32 is_secure;
  205. u32 dsp_mask;
  206. u32 fthread_nr;
  207. u32 cycles[HFI_MAX_HW_THREADS];
  208. u32 fw_cycles;
  209. u32 op_cycles[HFI_MAX_HW_THREADS];
  210. u32 fw_op_cycles;
  211. u32 ddr_bw;
  212. u32 ddr_op_bw;
  213. u32 ddr_cache;
  214. u32 ddr_op_cache;
  215. u32 fps[HFI_MAX_HW_THREADS];
  216. u32 dump_offset;
  217. u32 dump_size;
  218. };
  219. enum cvp_event_t {
  220. CVP_NO_EVENT,
  221. CVP_SSR_EVENT = 1,
  222. CVP_SYS_ERROR_EVENT,
  223. CVP_MAX_CLIENTS_EVENT,
  224. CVP_HW_UNSUPPORTED_EVENT,
  225. CVP_INVALID_EVENT,
  226. CVP_DUMP_EVENT,
  227. };
  228. struct cvp_session_event {
  229. spinlock_t lock;
  230. enum cvp_event_t event;
  231. wait_queue_head_t wq;
  232. };
  233. #define MAX_ENTRIES 64
  234. struct smem_data {
  235. u32 size;
  236. u32 flags;
  237. u32 device_addr;
  238. u32 bitmap_index;
  239. u32 refcount;
  240. u32 pkt_type;
  241. u32 buf_idx;
  242. };
  243. struct cvp_buf_data {
  244. u32 device_addr;
  245. u32 size;
  246. };
  247. struct inst_snapshot {
  248. void *session;
  249. u32 smem_index;
  250. u32 dsp_index;
  251. u32 persist_index;
  252. struct smem_data smem_log[MAX_ENTRIES];
  253. struct cvp_buf_data dsp_buf_log[MAX_ENTRIES];
  254. struct cvp_buf_data persist_buf_log[MAX_ENTRIES];
  255. };
  256. struct cvp_noc_log {
  257. u32 used;
  258. u32 err_ctrl_swid_low;
  259. u32 err_ctrl_swid_high;
  260. u32 err_ctrl_mainctl_low;
  261. u32 err_ctrl_errvld_low;
  262. u32 err_ctrl_errclr_low;
  263. u32 err_ctrl_errlog0_low;
  264. u32 err_ctrl_errlog0_high;
  265. u32 err_ctrl_errlog1_low;
  266. u32 err_ctrl_errlog1_high;
  267. u32 err_ctrl_errlog2_low;
  268. u32 err_ctrl_errlog2_high;
  269. u32 err_ctrl_errlog3_low;
  270. u32 err_ctrl_errlog3_high;
  271. u32 err_core_swid_low;
  272. u32 err_core_swid_high;
  273. u32 err_core_mainctl_low;
  274. u32 err_core_errvld_low;
  275. u32 err_core_errclr_low;
  276. u32 err_core_errlog0_low;
  277. u32 err_core_errlog0_high;
  278. u32 err_core_errlog1_low;
  279. u32 err_core_errlog1_high;
  280. u32 err_core_errlog2_low;
  281. u32 err_core_errlog2_high;
  282. u32 err_core_errlog3_low;
  283. u32 err_core_errlog3_high;
  284. u32 arp_test_bus[16];
  285. u32 dma_test_bus[512];
  286. };
  287. struct cvp_debug_log {
  288. struct cvp_noc_log noc_log;
  289. u32 snapshot_index;
  290. struct inst_snapshot snapshot[16];
  291. };
  292. struct msm_cvp_core {
  293. struct mutex lock;
  294. struct mutex clk_lock;
  295. dev_t dev_num;
  296. struct cdev cdev;
  297. struct class *class;
  298. struct device *dev;
  299. struct cvp_hfi_device *device;
  300. struct msm_cvp_platform_data *platform_data;
  301. struct msm_cvp_synx_ops *synx_ftbl;
  302. struct list_head instances;
  303. struct dentry *debugfs_root;
  304. enum cvp_core_state state;
  305. struct completion completions[SYS_MSG_END - SYS_MSG_START + 1];
  306. enum msm_cvp_hfi_type hfi_type;
  307. struct msm_cvp_platform_resources resources;
  308. struct msm_cvp_capability *capabilities;
  309. struct delayed_work fw_unload_work;
  310. struct work_struct ssr_work;
  311. enum hal_ssr_trigger_type ssr_type;
  312. u32 smmu_fault_count;
  313. u32 last_fault_addr;
  314. u32 ssr_count;
  315. u32 smem_leak_count;
  316. bool trigger_ssr;
  317. unsigned long curr_freq;
  318. unsigned long orig_core_sum;
  319. struct cvp_cycle_info dyn_clk;
  320. atomic64_t kernel_trans_id;
  321. struct cvp_debug_log log;
  322. };
  323. struct msm_cvp_inst {
  324. struct list_head list;
  325. struct list_head dsp_list;
  326. struct mutex sync_lock, lock;
  327. struct msm_cvp_core *core;
  328. enum session_type session_type;
  329. u32 dsp_handle;
  330. struct task_struct *task;
  331. atomic_t smem_count;
  332. struct cvp_session_queue session_queue;
  333. struct cvp_session_queue session_queue_fence;
  334. struct cvp_session_event event_handler;
  335. void *session;
  336. enum instance_state state;
  337. struct msm_cvp_list freqs;
  338. struct msm_cvp_list persistbufs;
  339. struct cvp_dmamap_cache dma_cache;
  340. struct msm_cvp_list cvpdspbufs;
  341. struct msm_cvp_list cvpwnccbufs;
  342. struct msm_cvp_list frames;
  343. struct cvp_frame_bufs last_frame;
  344. struct cvp_frame_bufs unused_dsp_bufs;
  345. struct cvp_frame_bufs unused_wncc_bufs;
  346. u32 cvpwnccbufs_num;
  347. struct msm_cvp_wncc_buffer* cvpwnccbufs_table;
  348. struct completion completions[SESSION_MSG_END - SESSION_MSG_START + 1];
  349. struct dentry *debugfs_root;
  350. struct msm_cvp_debug debug;
  351. struct cvp_clock_data clk_data;
  352. enum msm_cvp_modes flags;
  353. struct msm_cvp_capability capability;
  354. struct kref kref;
  355. struct cvp_session_prop prop;
  356. /* error_code will be cleared after being returned to user mode */
  357. u32 error_code;
  358. /* prev_error_code saves value of error_code before it's cleared */
  359. u32 prev_error_code;
  360. struct synx_session *synx_session_id;
  361. struct cvp_fence_queue fence_cmd_queue;
  362. char proc_name[TASK_COMM_LEN];
  363. };
  364. extern struct msm_cvp_drv *cvp_driver;
  365. void cvp_handle_cmd_response(enum hal_command_response cmd, void *data);
  366. int msm_cvp_trigger_ssr(struct msm_cvp_core *core,
  367. enum hal_ssr_trigger_type type);
  368. int msm_cvp_noc_error_info(struct msm_cvp_core *core);
  369. void msm_cvp_comm_handle_thermal_event(void);
  370. void msm_cvp_ssr_handler(struct work_struct *work);
  371. /*
  372. * XXX: normally should be in msm_cvp_core.h, but that's meant for public APIs,
  373. * whereas this is private
  374. */
  375. int msm_cvp_destroy(struct msm_cvp_inst *inst);
  376. void *cvp_get_drv_data(struct device *dev);
  377. void *cvp_kmem_cache_zalloc(struct cvp_kmem_cache *k, gfp_t flags);
  378. void cvp_kmem_cache_free(struct cvp_kmem_cache *k, void *obj);
  379. #endif