qmi.c 98 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define CONN_ROAM_FILE_NAME "wlan-connection-roaming"
  28. #define INI_EXT ".ini"
  29. #define INI_FILE_NAME_LEN 100
  30. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  31. #ifdef CONFIG_CNSS2_DEBUG
  32. #define QDSS_DEBUG_FILE_STR "debug_"
  33. #else
  34. #define QDSS_DEBUG_FILE_STR ""
  35. #endif
  36. #define HW_V1_NUMBER "v1"
  37. #define HW_V2_NUMBER "v2"
  38. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  39. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  40. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  41. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  42. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  43. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  44. #define DMS_QMI_MAX_MSG_LEN SZ_256
  45. #define MAX_SHADOW_REG_RESERVED 2
  46. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  47. MAX_SHADOW_REG_RESERVED)
  48. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  49. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  50. #ifdef CONFIG_CNSS2_DEBUG
  51. static bool ignore_qmi_failure;
  52. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  53. void cnss_ignore_qmi_failure(bool ignore)
  54. {
  55. ignore_qmi_failure = ignore;
  56. }
  57. #else
  58. #define CNSS_QMI_ASSERT() do { } while (0)
  59. void cnss_ignore_qmi_failure(bool ignore) { }
  60. #endif
  61. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  62. {
  63. switch (mode) {
  64. case CNSS_MISSION:
  65. return "MISSION";
  66. case CNSS_FTM:
  67. return "FTM";
  68. case CNSS_EPPING:
  69. return "EPPING";
  70. case CNSS_WALTEST:
  71. return "WALTEST";
  72. case CNSS_OFF:
  73. return "OFF";
  74. case CNSS_CCPM:
  75. return "CCPM";
  76. case CNSS_QVIT:
  77. return "QVIT";
  78. case CNSS_CALIBRATION:
  79. return "CALIBRATION";
  80. default:
  81. return "UNKNOWN";
  82. }
  83. }
  84. static int qmi_send_wait(struct qmi_handle *qmi, void *req, void *rsp,
  85. struct qmi_elem_info *req_ei,
  86. struct qmi_elem_info *rsp_ei,
  87. int req_id, size_t req_len,
  88. unsigned long timeout)
  89. {
  90. struct qmi_txn txn;
  91. int ret;
  92. char *err_msg;
  93. struct qmi_response_type_v01 *resp = rsp;
  94. ret = qmi_txn_init(qmi, &txn, rsp_ei, rsp);
  95. if (ret < 0) {
  96. err_msg = "Qmi fail: fail to init txn,";
  97. goto out;
  98. }
  99. ret = qmi_send_request(qmi, NULL, &txn, req_id,
  100. req_len, req_ei, req);
  101. if (ret < 0) {
  102. qmi_txn_cancel(&txn);
  103. err_msg = "Qmi fail: fail to send req,";
  104. goto out;
  105. }
  106. ret = qmi_txn_wait(&txn, timeout);
  107. if (ret < 0) {
  108. err_msg = "Qmi fail: wait timeout,";
  109. goto out;
  110. } else if (resp->result != QMI_RESULT_SUCCESS_V01) {
  111. err_msg = "Qmi fail: request rejected,";
  112. cnss_pr_err("Qmi fail: respons with error:%d\n",
  113. resp->error);
  114. ret = -resp->result;
  115. goto out;
  116. }
  117. cnss_pr_dbg("req %x success\n", req_id);
  118. return 0;
  119. out:
  120. cnss_pr_err("%s req %x, ret %d\n", err_msg, req_id, ret);
  121. return ret;
  122. }
  123. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  124. {
  125. struct wlfw_ind_register_req_msg_v01 *req;
  126. struct wlfw_ind_register_resp_msg_v01 *resp;
  127. struct qmi_txn txn;
  128. int ret = 0;
  129. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  130. plat_priv->driver_state);
  131. req = kzalloc(sizeof(*req), GFP_KERNEL);
  132. if (!req)
  133. return -ENOMEM;
  134. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  135. if (!resp) {
  136. kfree(req);
  137. return -ENOMEM;
  138. }
  139. req->client_id_valid = 1;
  140. req->client_id = WLFW_CLIENT_ID;
  141. req->request_mem_enable_valid = 1;
  142. req->request_mem_enable = 1;
  143. req->fw_mem_ready_enable_valid = 1;
  144. req->fw_mem_ready_enable = 1;
  145. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  146. req->fw_init_done_enable_valid = 1;
  147. req->fw_init_done_enable = 1;
  148. req->pin_connect_result_enable_valid = 1;
  149. req->pin_connect_result_enable = 1;
  150. req->cal_done_enable_valid = 1;
  151. req->cal_done_enable = 1;
  152. req->qdss_trace_req_mem_enable_valid = 1;
  153. req->qdss_trace_req_mem_enable = 1;
  154. req->qdss_trace_save_enable_valid = 1;
  155. req->qdss_trace_save_enable = 1;
  156. req->qdss_trace_free_enable_valid = 1;
  157. req->qdss_trace_free_enable = 1;
  158. req->respond_get_info_enable_valid = 1;
  159. req->respond_get_info_enable = 1;
  160. req->wfc_call_twt_config_enable_valid = 1;
  161. req->wfc_call_twt_config_enable = 1;
  162. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  163. wlfw_ind_register_resp_msg_v01_ei, resp);
  164. if (ret < 0) {
  165. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  166. ret);
  167. goto out;
  168. }
  169. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  170. QMI_WLFW_IND_REGISTER_REQ_V01,
  171. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  172. wlfw_ind_register_req_msg_v01_ei, req);
  173. if (ret < 0) {
  174. qmi_txn_cancel(&txn);
  175. cnss_pr_err("Failed to send indication register request, err: %d\n",
  176. ret);
  177. goto out;
  178. }
  179. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  180. if (ret < 0) {
  181. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  182. ret);
  183. goto out;
  184. }
  185. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  186. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  187. resp->resp.result, resp->resp.error);
  188. ret = -resp->resp.result;
  189. goto out;
  190. }
  191. if (resp->fw_status_valid) {
  192. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  193. ret = -EALREADY;
  194. goto qmi_registered;
  195. }
  196. }
  197. kfree(req);
  198. kfree(resp);
  199. return 0;
  200. out:
  201. CNSS_QMI_ASSERT();
  202. qmi_registered:
  203. kfree(req);
  204. kfree(resp);
  205. return ret;
  206. }
  207. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  208. struct wlfw_host_cap_req_msg_v01 *req)
  209. {
  210. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  211. plat_priv->device_id == MANGO_DEVICE_ID) {
  212. req->mlo_capable_valid = 1;
  213. req->mlo_capable = 1;
  214. req->mlo_chip_id_valid = 1;
  215. req->mlo_chip_id = 0;
  216. req->mlo_group_id_valid = 1;
  217. req->mlo_group_id = 0;
  218. req->max_mlo_peer_valid = 1;
  219. /* Max peer number generally won't change for the same device
  220. * but needs to be synced with host driver.
  221. */
  222. req->max_mlo_peer = 32;
  223. req->mlo_num_chips_valid = 1;
  224. req->mlo_num_chips = 1;
  225. req->mlo_chip_info_valid = 1;
  226. req->mlo_chip_info[0].chip_id = 0;
  227. req->mlo_chip_info[0].num_local_links = 2;
  228. req->mlo_chip_info[0].hw_link_id[0] = 0;
  229. req->mlo_chip_info[0].hw_link_id[1] = 1;
  230. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  231. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  232. }
  233. }
  234. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  235. {
  236. struct wlfw_host_cap_req_msg_v01 *req;
  237. struct wlfw_host_cap_resp_msg_v01 *resp;
  238. struct qmi_txn txn;
  239. int ret = 0;
  240. u64 iova_start = 0, iova_size = 0,
  241. iova_ipa_start = 0, iova_ipa_size = 0;
  242. u64 feature_list = 0;
  243. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  244. plat_priv->driver_state);
  245. req = kzalloc(sizeof(*req), GFP_KERNEL);
  246. if (!req)
  247. return -ENOMEM;
  248. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  249. if (!resp) {
  250. kfree(req);
  251. return -ENOMEM;
  252. }
  253. req->num_clients_valid = 1;
  254. req->num_clients = 1;
  255. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  256. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  257. if (req->wake_msi) {
  258. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  259. req->wake_msi_valid = 1;
  260. }
  261. req->bdf_support_valid = 1;
  262. req->bdf_support = 1;
  263. req->m3_support_valid = 1;
  264. req->m3_support = 1;
  265. req->m3_cache_support_valid = 1;
  266. req->m3_cache_support = 1;
  267. req->cal_done_valid = 1;
  268. req->cal_done = plat_priv->cal_done;
  269. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  270. if (cnss_bus_is_smmu_s1_enabled(plat_priv) &&
  271. !cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  272. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  273. &iova_ipa_size)) {
  274. req->ddr_range_valid = 1;
  275. req->ddr_range[0].start = iova_start;
  276. req->ddr_range[0].size = iova_size + iova_ipa_size;
  277. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  278. req->ddr_range[0].start, req->ddr_range[0].size);
  279. }
  280. req->host_build_type_valid = 1;
  281. req->host_build_type = cnss_get_host_build_type();
  282. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  283. ret = cnss_get_feature_list(plat_priv, &feature_list);
  284. if (!ret) {
  285. req->feature_list_valid = 1;
  286. req->feature_list = feature_list;
  287. cnss_pr_dbg("Sending feature list 0x%llx\n",
  288. req->feature_list);
  289. }
  290. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  291. wlfw_host_cap_resp_msg_v01_ei, resp);
  292. if (ret < 0) {
  293. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  294. ret);
  295. goto out;
  296. }
  297. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  298. QMI_WLFW_HOST_CAP_REQ_V01,
  299. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  300. wlfw_host_cap_req_msg_v01_ei, req);
  301. if (ret < 0) {
  302. qmi_txn_cancel(&txn);
  303. cnss_pr_err("Failed to send host capability request, err: %d\n",
  304. ret);
  305. goto out;
  306. }
  307. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  308. if (ret < 0) {
  309. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  310. ret);
  311. goto out;
  312. }
  313. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  314. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  315. resp->resp.result, resp->resp.error);
  316. ret = -resp->resp.result;
  317. goto out;
  318. }
  319. kfree(req);
  320. kfree(resp);
  321. return 0;
  322. out:
  323. CNSS_QMI_ASSERT();
  324. kfree(req);
  325. kfree(resp);
  326. return ret;
  327. }
  328. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  329. {
  330. struct wlfw_respond_mem_req_msg_v01 *req;
  331. struct wlfw_respond_mem_resp_msg_v01 *resp;
  332. struct qmi_txn txn;
  333. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  334. int ret = 0, i;
  335. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  336. plat_priv->driver_state);
  337. req = kzalloc(sizeof(*req), GFP_KERNEL);
  338. if (!req)
  339. return -ENOMEM;
  340. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  341. if (!resp) {
  342. kfree(req);
  343. return -ENOMEM;
  344. }
  345. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  346. for (i = 0; i < req->mem_seg_len; i++) {
  347. if (!fw_mem[i].pa || !fw_mem[i].size) {
  348. if (fw_mem[i].type == 0) {
  349. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  350. i);
  351. ret = -EINVAL;
  352. goto out;
  353. }
  354. cnss_pr_err("Memory for FW is not available for type: %u\n",
  355. fw_mem[i].type);
  356. ret = -ENOMEM;
  357. goto out;
  358. }
  359. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  360. fw_mem[i].va, &fw_mem[i].pa,
  361. fw_mem[i].size, fw_mem[i].type);
  362. req->mem_seg[i].addr = fw_mem[i].pa;
  363. req->mem_seg[i].size = fw_mem[i].size;
  364. req->mem_seg[i].type = fw_mem[i].type;
  365. }
  366. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  367. wlfw_respond_mem_resp_msg_v01_ei, resp);
  368. if (ret < 0) {
  369. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  370. ret);
  371. goto out;
  372. }
  373. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  374. QMI_WLFW_RESPOND_MEM_REQ_V01,
  375. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  376. wlfw_respond_mem_req_msg_v01_ei, req);
  377. if (ret < 0) {
  378. qmi_txn_cancel(&txn);
  379. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  380. ret);
  381. goto out;
  382. }
  383. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  384. if (ret < 0) {
  385. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  386. ret);
  387. goto out;
  388. }
  389. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  390. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  391. resp->resp.result, resp->resp.error);
  392. ret = -resp->resp.result;
  393. goto out;
  394. }
  395. kfree(req);
  396. kfree(resp);
  397. return 0;
  398. out:
  399. CNSS_QMI_ASSERT();
  400. kfree(req);
  401. kfree(resp);
  402. return ret;
  403. }
  404. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  405. {
  406. struct wlfw_cap_req_msg_v01 *req;
  407. struct wlfw_cap_resp_msg_v01 *resp;
  408. struct qmi_txn txn;
  409. char *fw_build_timestamp;
  410. int ret = 0, i;
  411. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  412. plat_priv->driver_state);
  413. req = kzalloc(sizeof(*req), GFP_KERNEL);
  414. if (!req)
  415. return -ENOMEM;
  416. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  417. if (!resp) {
  418. kfree(req);
  419. return -ENOMEM;
  420. }
  421. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  422. wlfw_cap_resp_msg_v01_ei, resp);
  423. if (ret < 0) {
  424. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  425. ret);
  426. goto out;
  427. }
  428. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  429. QMI_WLFW_CAP_REQ_V01,
  430. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  431. wlfw_cap_req_msg_v01_ei, req);
  432. if (ret < 0) {
  433. qmi_txn_cancel(&txn);
  434. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  435. ret);
  436. goto out;
  437. }
  438. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  439. if (ret < 0) {
  440. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  441. ret);
  442. goto out;
  443. }
  444. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  445. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  446. resp->resp.result, resp->resp.error);
  447. ret = -resp->resp.result;
  448. goto out;
  449. }
  450. if (resp->chip_info_valid) {
  451. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  452. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  453. }
  454. if (resp->board_info_valid)
  455. plat_priv->board_info.board_id = resp->board_info.board_id;
  456. else
  457. plat_priv->board_info.board_id = 0xFF;
  458. if (resp->soc_info_valid)
  459. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  460. if (resp->fw_version_info_valid) {
  461. plat_priv->fw_version_info.fw_version =
  462. resp->fw_version_info.fw_version;
  463. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  464. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  465. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  466. resp->fw_version_info.fw_build_timestamp,
  467. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  468. }
  469. if (resp->fw_build_id_valid) {
  470. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  471. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  472. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  473. }
  474. /* FW will send aop retention volatage for qca6490 */
  475. if (resp->voltage_mv_valid) {
  476. plat_priv->cpr_info.voltage = resp->voltage_mv;
  477. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  478. plat_priv->cpr_info.voltage);
  479. cnss_update_cpr_info(plat_priv);
  480. }
  481. if (resp->time_freq_hz_valid) {
  482. plat_priv->device_freq_hz = resp->time_freq_hz;
  483. cnss_pr_dbg("Device frequency is %d HZ\n",
  484. plat_priv->device_freq_hz);
  485. }
  486. if (resp->otp_version_valid)
  487. plat_priv->otp_version = resp->otp_version;
  488. if (resp->dev_mem_info_valid) {
  489. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  490. plat_priv->dev_mem_info[i].start =
  491. resp->dev_mem_info[i].start;
  492. plat_priv->dev_mem_info[i].size =
  493. resp->dev_mem_info[i].size;
  494. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  495. i, plat_priv->dev_mem_info[i].start,
  496. plat_priv->dev_mem_info[i].size);
  497. }
  498. }
  499. if (resp->fw_caps_valid) {
  500. plat_priv->fw_pcie_gen_switch =
  501. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  502. plat_priv->fw_caps = resp->fw_caps;
  503. }
  504. if (resp->hang_data_length_valid &&
  505. resp->hang_data_length &&
  506. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  507. plat_priv->hang_event_data_len = resp->hang_data_length;
  508. else
  509. plat_priv->hang_event_data_len = 0;
  510. if (resp->hang_data_addr_offset_valid)
  511. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  512. else
  513. plat_priv->hang_data_addr_offset = 0;
  514. if (resp->hwid_bitmap_valid)
  515. plat_priv->hwid_bitmap = resp->hwid_bitmap;
  516. if (resp->ol_cpr_cfg_valid)
  517. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  518. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  519. plat_priv->chip_info.chip_id,
  520. plat_priv->chip_info.chip_family,
  521. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  522. plat_priv->otp_version);
  523. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s, hwid_bitmap:0x%x\n",
  524. plat_priv->fw_version_info.fw_version,
  525. plat_priv->fw_version_info.fw_build_timestamp,
  526. plat_priv->fw_build_id,
  527. plat_priv->hwid_bitmap);
  528. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  529. plat_priv->hang_event_data_len,
  530. plat_priv->hang_data_addr_offset);
  531. kfree(req);
  532. kfree(resp);
  533. return 0;
  534. out:
  535. CNSS_QMI_ASSERT();
  536. kfree(req);
  537. kfree(resp);
  538. return ret;
  539. }
  540. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  541. u32 bdf_type, char *filename,
  542. u32 filename_len)
  543. {
  544. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  545. int ret = 0;
  546. switch (bdf_type) {
  547. case CNSS_BDF_ELF:
  548. /* Board ID will be equal or less than 0xFF in GF mask case */
  549. if (plat_priv->board_info.board_id == 0xFF) {
  550. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  551. snprintf(filename_tmp, filename_len,
  552. ELF_BDF_FILE_NAME_GF);
  553. else
  554. snprintf(filename_tmp, filename_len,
  555. ELF_BDF_FILE_NAME);
  556. } else if (plat_priv->board_info.board_id < 0xFF) {
  557. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  558. snprintf(filename_tmp, filename_len,
  559. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  560. plat_priv->board_info.board_id);
  561. else
  562. snprintf(filename_tmp, filename_len,
  563. ELF_BDF_FILE_NAME_PREFIX "%02x",
  564. plat_priv->board_info.board_id);
  565. } else {
  566. snprintf(filename_tmp, filename_len,
  567. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  568. plat_priv->board_info.board_id >> 8 & 0xFF,
  569. plat_priv->board_info.board_id & 0xFF);
  570. }
  571. break;
  572. case CNSS_BDF_BIN:
  573. if (plat_priv->board_info.board_id == 0xFF) {
  574. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  575. snprintf(filename_tmp, filename_len,
  576. BIN_BDF_FILE_NAME_GF);
  577. else
  578. snprintf(filename_tmp, filename_len,
  579. BIN_BDF_FILE_NAME);
  580. } else if (plat_priv->board_info.board_id < 0xFF) {
  581. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  582. snprintf(filename_tmp, filename_len,
  583. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  584. plat_priv->board_info.board_id);
  585. else
  586. snprintf(filename_tmp, filename_len,
  587. BIN_BDF_FILE_NAME_PREFIX "%02x",
  588. plat_priv->board_info.board_id);
  589. } else {
  590. snprintf(filename_tmp, filename_len,
  591. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  592. plat_priv->board_info.board_id >> 8 & 0xFF,
  593. plat_priv->board_info.board_id & 0xFF);
  594. }
  595. break;
  596. case CNSS_BDF_REGDB:
  597. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  598. break;
  599. case CNSS_BDF_HDS:
  600. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  601. break;
  602. default:
  603. cnss_pr_err("Invalid BDF type: %d\n",
  604. plat_priv->ctrl_params.bdf_type);
  605. ret = -EINVAL;
  606. break;
  607. }
  608. if (!ret)
  609. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  610. return ret;
  611. }
  612. int cnss_wlfw_ini_file_send_sync(struct cnss_plat_data *plat_priv,
  613. enum wlfw_ini_file_type_v01 file_type)
  614. {
  615. struct wlfw_ini_file_download_req_msg_v01 *req;
  616. struct wlfw_ini_file_download_resp_msg_v01 *resp;
  617. struct qmi_txn txn;
  618. int ret = 0;
  619. const struct firmware *fw;
  620. char filename[INI_FILE_NAME_LEN] = {0};
  621. char tmp_filename[INI_FILE_NAME_LEN] = {0};
  622. const u8 *temp;
  623. unsigned int remaining;
  624. bool backup_supported = false;
  625. cnss_pr_info("INI File %u download\n", file_type);
  626. req = kzalloc(sizeof(*req), GFP_KERNEL);
  627. if (!req)
  628. return -ENOMEM;
  629. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  630. if (!resp) {
  631. kfree(req);
  632. return -ENOMEM;
  633. }
  634. switch (file_type) {
  635. case WLFW_CONN_ROAM_INI_V01:
  636. snprintf(tmp_filename, sizeof(tmp_filename),
  637. CONN_ROAM_FILE_NAME);
  638. backup_supported = true;
  639. break;
  640. default:
  641. cnss_pr_err("Invalid file type: %u\n", file_type);
  642. ret = -EINVAL;
  643. goto err_req_fw;
  644. }
  645. snprintf(filename, sizeof(filename), "%s%s", tmp_filename, INI_EXT);
  646. /* Fetch the file */
  647. ret = firmware_request_nowarn(&fw, filename, &plat_priv->plat_dev->dev);
  648. if (ret) {
  649. cnss_pr_err("Failed to get INI file %s (%d), Backup file: %s",
  650. filename, ret,
  651. backup_supported ? "Supported" : "Not Supported");
  652. if (!backup_supported)
  653. goto err_req_fw;
  654. snprintf(filename, sizeof(filename),
  655. "%s-%s%s", tmp_filename, "backup", INI_EXT);
  656. ret = firmware_request_nowarn(&fw, filename,
  657. &plat_priv->plat_dev->dev);
  658. if (ret) {
  659. cnss_pr_err("Failed to get INI file %s (%d)", filename,
  660. ret);
  661. goto err_req_fw;
  662. }
  663. }
  664. temp = fw->data;
  665. remaining = fw->size;
  666. cnss_pr_dbg("Downloading INI file: %s, size: %u\n", filename,
  667. remaining);
  668. while (remaining) {
  669. req->file_type_valid = 1;
  670. req->file_type = file_type;
  671. req->total_size_valid = 1;
  672. req->total_size = remaining;
  673. req->seg_id_valid = 1;
  674. req->data_valid = 1;
  675. req->end_valid = 1;
  676. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  677. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  678. } else {
  679. req->data_len = remaining;
  680. req->end = 1;
  681. }
  682. memcpy(req->data, temp, req->data_len);
  683. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  684. wlfw_ini_file_download_resp_msg_v01_ei,
  685. resp);
  686. if (ret < 0) {
  687. cnss_pr_err("Failed to initialize txn for INI file download request, err: %d\n",
  688. ret);
  689. goto err;
  690. }
  691. ret = qmi_send_request
  692. (&plat_priv->qmi_wlfw, NULL, &txn,
  693. QMI_WLFW_INI_FILE_DOWNLOAD_REQ_V01,
  694. WLFW_INI_FILE_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  695. wlfw_ini_file_download_req_msg_v01_ei, req);
  696. if (ret < 0) {
  697. qmi_txn_cancel(&txn);
  698. cnss_pr_err("Failed to send INI File download request, err: %d\n",
  699. ret);
  700. goto err;
  701. }
  702. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  703. if (ret < 0) {
  704. cnss_pr_err("Failed to wait for response of INI File download request, err: %d\n",
  705. ret);
  706. goto err;
  707. }
  708. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  709. cnss_pr_err("INI file download request failed, result: %d, err: %d\n",
  710. resp->resp.result, resp->resp.error);
  711. ret = -resp->resp.result;
  712. goto err;
  713. }
  714. remaining -= req->data_len;
  715. temp += req->data_len;
  716. req->seg_id++;
  717. }
  718. release_firmware(fw);
  719. kfree(req);
  720. kfree(resp);
  721. return 0;
  722. err:
  723. release_firmware(fw);
  724. err_req_fw:
  725. kfree(req);
  726. kfree(resp);
  727. return ret;
  728. }
  729. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  730. u32 bdf_type)
  731. {
  732. struct wlfw_bdf_download_req_msg_v01 *req;
  733. struct wlfw_bdf_download_resp_msg_v01 *resp;
  734. struct qmi_txn txn;
  735. char filename[MAX_FIRMWARE_NAME_LEN];
  736. const struct firmware *fw_entry = NULL;
  737. const u8 *temp;
  738. unsigned int remaining;
  739. int ret = 0;
  740. cnss_pr_dbg("Sending BDF download message, state: 0x%lx, type: %d\n",
  741. plat_priv->driver_state, bdf_type);
  742. req = kzalloc(sizeof(*req), GFP_KERNEL);
  743. if (!req)
  744. return -ENOMEM;
  745. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  746. if (!resp) {
  747. kfree(req);
  748. return -ENOMEM;
  749. }
  750. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  751. filename, sizeof(filename));
  752. if (ret)
  753. goto err_req_fw;
  754. if (bdf_type == CNSS_BDF_REGDB)
  755. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  756. filename);
  757. else
  758. ret = firmware_request_nowarn(&fw_entry, filename,
  759. &plat_priv->plat_dev->dev);
  760. if (ret) {
  761. cnss_pr_err("Failed to load BDF: %s, ret: %d\n", filename, ret);
  762. goto err_req_fw;
  763. }
  764. temp = fw_entry->data;
  765. remaining = fw_entry->size;
  766. cnss_pr_dbg("Downloading BDF: %s, size: %u\n", filename, remaining);
  767. while (remaining) {
  768. req->valid = 1;
  769. req->file_id_valid = 1;
  770. req->file_id = plat_priv->board_info.board_id;
  771. req->total_size_valid = 1;
  772. req->total_size = remaining;
  773. req->seg_id_valid = 1;
  774. req->data_valid = 1;
  775. req->end_valid = 1;
  776. req->bdf_type_valid = 1;
  777. req->bdf_type = bdf_type;
  778. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  779. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  780. } else {
  781. req->data_len = remaining;
  782. req->end = 1;
  783. }
  784. memcpy(req->data, temp, req->data_len);
  785. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  786. wlfw_bdf_download_resp_msg_v01_ei, resp);
  787. if (ret < 0) {
  788. cnss_pr_err("Failed to initialize txn for BDF download request, err: %d\n",
  789. ret);
  790. goto err_send;
  791. }
  792. ret = qmi_send_request
  793. (&plat_priv->qmi_wlfw, NULL, &txn,
  794. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  795. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  796. wlfw_bdf_download_req_msg_v01_ei, req);
  797. if (ret < 0) {
  798. qmi_txn_cancel(&txn);
  799. cnss_pr_err("Failed to send respond BDF download request, err: %d\n",
  800. ret);
  801. goto err_send;
  802. }
  803. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  804. if (ret < 0) {
  805. cnss_pr_err("Failed to wait for response of BDF download request, err: %d\n",
  806. ret);
  807. goto err_send;
  808. }
  809. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  810. cnss_pr_err("BDF download request failed, result: %d, err: %d\n",
  811. resp->resp.result, resp->resp.error);
  812. ret = -resp->resp.result;
  813. goto err_send;
  814. }
  815. remaining -= req->data_len;
  816. temp += req->data_len;
  817. req->seg_id++;
  818. }
  819. release_firmware(fw_entry);
  820. if (resp->host_bdf_data_valid) {
  821. /* QCA6490 enable S3E regulator for IPA configuration only */
  822. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  823. cnss_enable_int_pow_amp_vreg(plat_priv);
  824. plat_priv->cbc_file_download =
  825. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  826. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  827. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  828. plat_priv->cbc_file_download);
  829. }
  830. kfree(req);
  831. kfree(resp);
  832. return 0;
  833. err_send:
  834. release_firmware(fw_entry);
  835. err_req_fw:
  836. if (!(bdf_type == CNSS_BDF_REGDB ||
  837. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  838. ret == -EAGAIN))
  839. CNSS_QMI_ASSERT();
  840. kfree(req);
  841. kfree(resp);
  842. return ret;
  843. }
  844. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  845. {
  846. struct wlfw_m3_info_req_msg_v01 *req;
  847. struct wlfw_m3_info_resp_msg_v01 *resp;
  848. struct qmi_txn txn;
  849. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  850. int ret = 0;
  851. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  852. plat_priv->driver_state);
  853. req = kzalloc(sizeof(*req), GFP_KERNEL);
  854. if (!req)
  855. return -ENOMEM;
  856. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  857. if (!resp) {
  858. kfree(req);
  859. return -ENOMEM;
  860. }
  861. if (!m3_mem->pa || !m3_mem->size) {
  862. cnss_pr_err("Memory for M3 is not available\n");
  863. ret = -ENOMEM;
  864. goto out;
  865. }
  866. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  867. m3_mem->va, &m3_mem->pa, m3_mem->size);
  868. req->addr = plat_priv->m3_mem.pa;
  869. req->size = plat_priv->m3_mem.size;
  870. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  871. wlfw_m3_info_resp_msg_v01_ei, resp);
  872. if (ret < 0) {
  873. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  874. ret);
  875. goto out;
  876. }
  877. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  878. QMI_WLFW_M3_INFO_REQ_V01,
  879. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  880. wlfw_m3_info_req_msg_v01_ei, req);
  881. if (ret < 0) {
  882. qmi_txn_cancel(&txn);
  883. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  884. ret);
  885. goto out;
  886. }
  887. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  888. if (ret < 0) {
  889. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  890. ret);
  891. goto out;
  892. }
  893. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  894. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  895. resp->resp.result, resp->resp.error);
  896. ret = -resp->resp.result;
  897. goto out;
  898. }
  899. kfree(req);
  900. kfree(resp);
  901. return 0;
  902. out:
  903. CNSS_QMI_ASSERT();
  904. kfree(req);
  905. kfree(resp);
  906. return ret;
  907. }
  908. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  909. u8 *mac, u32 mac_len)
  910. {
  911. struct wlfw_mac_addr_req_msg_v01 req;
  912. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  913. struct qmi_txn txn;
  914. int ret;
  915. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  916. return -EINVAL;
  917. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  918. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  919. if (ret < 0) {
  920. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  921. ret);
  922. ret = -EIO;
  923. goto out;
  924. }
  925. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  926. mac, plat_priv->driver_state);
  927. memcpy(req.mac_addr, mac, mac_len);
  928. req.mac_addr_valid = 1;
  929. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  930. QMI_WLFW_MAC_ADDR_REQ_V01,
  931. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  932. wlfw_mac_addr_req_msg_v01_ei, &req);
  933. if (ret < 0) {
  934. qmi_txn_cancel(&txn);
  935. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  936. ret = -EIO;
  937. goto out;
  938. }
  939. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  940. if (ret < 0) {
  941. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  942. ret);
  943. ret = -EIO;
  944. goto out;
  945. }
  946. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  947. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  948. resp.resp.result);
  949. ret = -resp.resp.result;
  950. }
  951. out:
  952. return ret;
  953. }
  954. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  955. u32 total_size)
  956. {
  957. int ret = 0;
  958. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  959. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  960. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  961. unsigned int remaining;
  962. struct qmi_txn txn;
  963. cnss_pr_dbg("%s\n", __func__);
  964. req = kzalloc(sizeof(*req), GFP_KERNEL);
  965. if (!req)
  966. return -ENOMEM;
  967. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  968. if (!resp) {
  969. kfree(req);
  970. return -ENOMEM;
  971. }
  972. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  973. if (!p_qdss_trace_data) {
  974. ret = ENOMEM;
  975. goto end;
  976. }
  977. remaining = total_size;
  978. p_qdss_trace_data_temp = p_qdss_trace_data;
  979. while (remaining && resp->end == 0) {
  980. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  981. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  982. if (ret < 0) {
  983. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  984. ret);
  985. goto fail;
  986. }
  987. ret = qmi_send_request
  988. (&plat_priv->qmi_wlfw, NULL, &txn,
  989. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  990. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  991. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  992. if (ret < 0) {
  993. qmi_txn_cancel(&txn);
  994. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  995. ret);
  996. goto fail;
  997. }
  998. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  999. if (ret < 0) {
  1000. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  1001. ret);
  1002. goto fail;
  1003. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1004. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  1005. resp->resp.result, resp->resp.error);
  1006. ret = -resp->resp.result;
  1007. goto fail;
  1008. } else {
  1009. ret = 0;
  1010. }
  1011. cnss_pr_dbg("%s: response total size %d data len %d",
  1012. __func__, resp->total_size, resp->data_len);
  1013. if ((resp->total_size_valid == 1 &&
  1014. resp->total_size == total_size) &&
  1015. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  1016. (resp->data_valid == 1 &&
  1017. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01)) {
  1018. memcpy(p_qdss_trace_data_temp,
  1019. resp->data, resp->data_len);
  1020. } else {
  1021. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  1022. __func__,
  1023. total_size, req->seg_id,
  1024. resp->total_size_valid,
  1025. resp->total_size,
  1026. resp->seg_id_valid,
  1027. resp->seg_id,
  1028. resp->data_valid,
  1029. resp->data_len);
  1030. ret = -1;
  1031. goto fail;
  1032. }
  1033. remaining -= resp->data_len;
  1034. p_qdss_trace_data_temp += resp->data_len;
  1035. req->seg_id++;
  1036. }
  1037. if (remaining == 0 && (resp->end_valid && resp->end)) {
  1038. ret = cnss_genl_send_msg(p_qdss_trace_data,
  1039. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  1040. total_size);
  1041. if (ret < 0) {
  1042. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  1043. ret);
  1044. ret = -1;
  1045. goto fail;
  1046. }
  1047. } else {
  1048. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  1049. __func__,
  1050. remaining, resp->end_valid, resp->end);
  1051. ret = -1;
  1052. goto fail;
  1053. }
  1054. fail:
  1055. kfree(p_qdss_trace_data);
  1056. end:
  1057. kfree(req);
  1058. kfree(resp);
  1059. return ret;
  1060. }
  1061. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  1062. char *filename, u32 filename_len)
  1063. {
  1064. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  1065. char *debug_str = QDSS_DEBUG_FILE_STR;
  1066. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  1067. plat_priv->device_id == MANGO_DEVICE_ID)
  1068. debug_str = "";
  1069. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  1070. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1071. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  1072. else
  1073. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1074. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  1075. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  1076. }
  1077. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1078. {
  1079. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  1080. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  1081. struct qmi_txn txn;
  1082. const struct firmware *fw_entry = NULL;
  1083. const u8 *temp;
  1084. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  1085. unsigned int remaining;
  1086. int ret = 0;
  1087. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  1088. plat_priv->driver_state);
  1089. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1090. if (!req)
  1091. return -ENOMEM;
  1092. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1093. if (!resp) {
  1094. kfree(req);
  1095. return -ENOMEM;
  1096. }
  1097. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  1098. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  1099. qdss_cfg_filename);
  1100. if (ret) {
  1101. cnss_pr_dbg("Unable to load %s\n",
  1102. qdss_cfg_filename);
  1103. goto err_req_fw;
  1104. }
  1105. temp = fw_entry->data;
  1106. remaining = fw_entry->size;
  1107. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  1108. qdss_cfg_filename, remaining);
  1109. while (remaining) {
  1110. req->total_size_valid = 1;
  1111. req->total_size = remaining;
  1112. req->seg_id_valid = 1;
  1113. req->data_valid = 1;
  1114. req->end_valid = 1;
  1115. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1116. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  1117. } else {
  1118. req->data_len = remaining;
  1119. req->end = 1;
  1120. }
  1121. memcpy(req->data, temp, req->data_len);
  1122. ret = qmi_txn_init
  1123. (&plat_priv->qmi_wlfw, &txn,
  1124. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  1125. resp);
  1126. if (ret < 0) {
  1127. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  1128. ret);
  1129. goto err_send;
  1130. }
  1131. ret = qmi_send_request
  1132. (&plat_priv->qmi_wlfw, NULL, &txn,
  1133. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  1134. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  1135. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  1136. if (ret < 0) {
  1137. qmi_txn_cancel(&txn);
  1138. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  1139. ret);
  1140. goto err_send;
  1141. }
  1142. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1143. if (ret < 0) {
  1144. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  1145. ret);
  1146. goto err_send;
  1147. }
  1148. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1149. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  1150. resp->resp.result, resp->resp.error);
  1151. ret = -resp->resp.result;
  1152. goto err_send;
  1153. }
  1154. remaining -= req->data_len;
  1155. temp += req->data_len;
  1156. req->seg_id++;
  1157. }
  1158. release_firmware(fw_entry);
  1159. kfree(req);
  1160. kfree(resp);
  1161. return 0;
  1162. err_send:
  1163. release_firmware(fw_entry);
  1164. err_req_fw:
  1165. kfree(req);
  1166. kfree(resp);
  1167. return ret;
  1168. }
  1169. static int wlfw_send_qdss_trace_mode_req
  1170. (struct cnss_plat_data *plat_priv,
  1171. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1172. unsigned long long option)
  1173. {
  1174. int rc = 0;
  1175. int tmp = 0;
  1176. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1177. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1178. struct qmi_txn txn;
  1179. if (!plat_priv)
  1180. return -ENODEV;
  1181. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1182. if (!req)
  1183. return -ENOMEM;
  1184. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1185. if (!resp) {
  1186. kfree(req);
  1187. return -ENOMEM;
  1188. }
  1189. req->mode_valid = 1;
  1190. req->mode = mode;
  1191. req->option_valid = 1;
  1192. req->option = option;
  1193. tmp = plat_priv->hw_trc_override;
  1194. req->hw_trc_disable_override_valid = 1;
  1195. req->hw_trc_disable_override =
  1196. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1197. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1198. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1199. __func__, mode, option, req->hw_trc_disable_override);
  1200. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1201. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1202. if (rc < 0) {
  1203. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1204. rc);
  1205. goto out;
  1206. }
  1207. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1208. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1209. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1210. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1211. if (rc < 0) {
  1212. qmi_txn_cancel(&txn);
  1213. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1214. goto out;
  1215. }
  1216. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1217. if (rc < 0) {
  1218. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1219. rc);
  1220. goto out;
  1221. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1222. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1223. resp->resp.result, resp->resp.error);
  1224. rc = -resp->resp.result;
  1225. goto out;
  1226. }
  1227. kfree(resp);
  1228. kfree(req);
  1229. return rc;
  1230. out:
  1231. kfree(resp);
  1232. kfree(req);
  1233. CNSS_QMI_ASSERT();
  1234. return rc;
  1235. }
  1236. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1237. {
  1238. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1239. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1240. }
  1241. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1242. {
  1243. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1244. option);
  1245. }
  1246. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1247. enum cnss_driver_mode mode)
  1248. {
  1249. struct wlfw_wlan_mode_req_msg_v01 *req;
  1250. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1251. struct qmi_txn txn;
  1252. int ret = 0;
  1253. if (!plat_priv)
  1254. return -ENODEV;
  1255. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1256. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1257. if (mode == CNSS_OFF &&
  1258. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1259. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1260. return 0;
  1261. }
  1262. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1263. if (!req)
  1264. return -ENOMEM;
  1265. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1266. if (!resp) {
  1267. kfree(req);
  1268. return -ENOMEM;
  1269. }
  1270. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1271. req->hw_debug_valid = 1;
  1272. req->hw_debug = 0;
  1273. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1274. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1275. if (ret < 0) {
  1276. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1277. cnss_qmi_mode_to_str(mode), mode, ret);
  1278. goto out;
  1279. }
  1280. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1281. QMI_WLFW_WLAN_MODE_REQ_V01,
  1282. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1283. wlfw_wlan_mode_req_msg_v01_ei, req);
  1284. if (ret < 0) {
  1285. qmi_txn_cancel(&txn);
  1286. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1287. cnss_qmi_mode_to_str(mode), mode, ret);
  1288. goto out;
  1289. }
  1290. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1291. if (ret < 0) {
  1292. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1293. cnss_qmi_mode_to_str(mode), mode, ret);
  1294. goto out;
  1295. }
  1296. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1297. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1298. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1299. resp->resp.error);
  1300. ret = -resp->resp.result;
  1301. goto out;
  1302. }
  1303. kfree(req);
  1304. kfree(resp);
  1305. return 0;
  1306. out:
  1307. if (mode == CNSS_OFF) {
  1308. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1309. ret = 0;
  1310. } else {
  1311. CNSS_QMI_ASSERT();
  1312. }
  1313. kfree(req);
  1314. kfree(resp);
  1315. return ret;
  1316. }
  1317. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1318. struct cnss_wlan_enable_cfg *config,
  1319. const char *host_version)
  1320. {
  1321. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1322. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1323. struct qmi_txn txn;
  1324. u32 i;
  1325. int ret = 0;
  1326. if (!plat_priv)
  1327. return -ENODEV;
  1328. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1329. plat_priv->driver_state);
  1330. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1331. if (!req)
  1332. return -ENOMEM;
  1333. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1334. if (!resp) {
  1335. kfree(req);
  1336. return -ENOMEM;
  1337. }
  1338. req->host_version_valid = 1;
  1339. strlcpy(req->host_version, host_version,
  1340. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1341. req->tgt_cfg_valid = 1;
  1342. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1343. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1344. else
  1345. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1346. for (i = 0; i < req->tgt_cfg_len; i++) {
  1347. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1348. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1349. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1350. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1351. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1352. }
  1353. req->svc_cfg_valid = 1;
  1354. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1355. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1356. else
  1357. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1358. for (i = 0; i < req->svc_cfg_len; i++) {
  1359. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1360. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1361. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1362. }
  1363. if (plat_priv->device_id != KIWI_DEVICE_ID &&
  1364. plat_priv->device_id != MANGO_DEVICE_ID) {
  1365. req->shadow_reg_v2_valid = 1;
  1366. if (config->num_shadow_reg_v2_cfg >
  1367. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1368. req->shadow_reg_v2_len = QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1369. else
  1370. req->shadow_reg_v2_len = config->num_shadow_reg_v2_cfg;
  1371. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1372. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01)
  1373. * req->shadow_reg_v2_len);
  1374. } else {
  1375. req->shadow_reg_v3_valid = 1;
  1376. if (config->num_shadow_reg_v3_cfg >
  1377. MAX_NUM_SHADOW_REG_V3)
  1378. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1379. else
  1380. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1381. plat_priv->num_shadow_regs_v3 = req->shadow_reg_v3_len;
  1382. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1383. plat_priv->num_shadow_regs_v3);
  1384. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1385. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01)
  1386. * req->shadow_reg_v3_len);
  1387. }
  1388. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1389. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1390. if (ret < 0) {
  1391. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1392. ret);
  1393. goto out;
  1394. }
  1395. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1396. QMI_WLFW_WLAN_CFG_REQ_V01,
  1397. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1398. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1399. if (ret < 0) {
  1400. qmi_txn_cancel(&txn);
  1401. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1402. ret);
  1403. goto out;
  1404. }
  1405. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1406. if (ret < 0) {
  1407. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1408. ret);
  1409. goto out;
  1410. }
  1411. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1412. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1413. resp->resp.result, resp->resp.error);
  1414. ret = -resp->resp.result;
  1415. goto out;
  1416. }
  1417. kfree(req);
  1418. kfree(resp);
  1419. return 0;
  1420. out:
  1421. CNSS_QMI_ASSERT();
  1422. kfree(req);
  1423. kfree(resp);
  1424. return ret;
  1425. }
  1426. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1427. u32 offset, u32 mem_type,
  1428. u32 data_len, u8 *data)
  1429. {
  1430. struct wlfw_athdiag_read_req_msg_v01 *req;
  1431. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1432. struct qmi_txn txn;
  1433. int ret = 0;
  1434. if (!plat_priv)
  1435. return -ENODEV;
  1436. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1437. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1438. data, data_len);
  1439. return -EINVAL;
  1440. }
  1441. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1442. plat_priv->driver_state, offset, mem_type, data_len);
  1443. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1444. if (!req)
  1445. return -ENOMEM;
  1446. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1447. if (!resp) {
  1448. kfree(req);
  1449. return -ENOMEM;
  1450. }
  1451. req->offset = offset;
  1452. req->mem_type = mem_type;
  1453. req->data_len = data_len;
  1454. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1455. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1456. if (ret < 0) {
  1457. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1458. ret);
  1459. goto out;
  1460. }
  1461. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1462. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1463. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1464. wlfw_athdiag_read_req_msg_v01_ei, req);
  1465. if (ret < 0) {
  1466. qmi_txn_cancel(&txn);
  1467. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1468. ret);
  1469. goto out;
  1470. }
  1471. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1472. if (ret < 0) {
  1473. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1474. ret);
  1475. goto out;
  1476. }
  1477. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1478. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1479. resp->resp.result, resp->resp.error);
  1480. ret = -resp->resp.result;
  1481. goto out;
  1482. }
  1483. if (!resp->data_valid || resp->data_len != data_len) {
  1484. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1485. resp->data_valid, resp->data_len);
  1486. ret = -EINVAL;
  1487. goto out;
  1488. }
  1489. memcpy(data, resp->data, resp->data_len);
  1490. kfree(req);
  1491. kfree(resp);
  1492. return 0;
  1493. out:
  1494. kfree(req);
  1495. kfree(resp);
  1496. return ret;
  1497. }
  1498. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1499. u32 offset, u32 mem_type,
  1500. u32 data_len, u8 *data)
  1501. {
  1502. struct wlfw_athdiag_write_req_msg_v01 *req;
  1503. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1504. struct qmi_txn txn;
  1505. int ret = 0;
  1506. if (!plat_priv)
  1507. return -ENODEV;
  1508. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1509. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1510. data, data_len);
  1511. return -EINVAL;
  1512. }
  1513. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1514. plat_priv->driver_state, offset, mem_type, data_len, data);
  1515. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1516. if (!req)
  1517. return -ENOMEM;
  1518. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1519. if (!resp) {
  1520. kfree(req);
  1521. return -ENOMEM;
  1522. }
  1523. req->offset = offset;
  1524. req->mem_type = mem_type;
  1525. req->data_len = data_len;
  1526. memcpy(req->data, data, data_len);
  1527. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1528. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1529. if (ret < 0) {
  1530. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1531. ret);
  1532. goto out;
  1533. }
  1534. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1535. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1536. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1537. wlfw_athdiag_write_req_msg_v01_ei, req);
  1538. if (ret < 0) {
  1539. qmi_txn_cancel(&txn);
  1540. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1541. ret);
  1542. goto out;
  1543. }
  1544. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1545. if (ret < 0) {
  1546. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1547. ret);
  1548. goto out;
  1549. }
  1550. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1551. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1552. resp->resp.result, resp->resp.error);
  1553. ret = -resp->resp.result;
  1554. goto out;
  1555. }
  1556. kfree(req);
  1557. kfree(resp);
  1558. return 0;
  1559. out:
  1560. kfree(req);
  1561. kfree(resp);
  1562. return ret;
  1563. }
  1564. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1565. u8 fw_log_mode)
  1566. {
  1567. struct wlfw_ini_req_msg_v01 *req;
  1568. struct wlfw_ini_resp_msg_v01 *resp;
  1569. struct qmi_txn txn;
  1570. int ret = 0;
  1571. if (!plat_priv)
  1572. return -ENODEV;
  1573. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1574. plat_priv->driver_state, fw_log_mode);
  1575. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1576. if (!req)
  1577. return -ENOMEM;
  1578. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1579. if (!resp) {
  1580. kfree(req);
  1581. return -ENOMEM;
  1582. }
  1583. req->enablefwlog_valid = 1;
  1584. req->enablefwlog = fw_log_mode;
  1585. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1586. wlfw_ini_resp_msg_v01_ei, resp);
  1587. if (ret < 0) {
  1588. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1589. fw_log_mode, ret);
  1590. goto out;
  1591. }
  1592. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1593. QMI_WLFW_INI_REQ_V01,
  1594. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1595. wlfw_ini_req_msg_v01_ei, req);
  1596. if (ret < 0) {
  1597. qmi_txn_cancel(&txn);
  1598. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1599. fw_log_mode, ret);
  1600. goto out;
  1601. }
  1602. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1603. if (ret < 0) {
  1604. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1605. fw_log_mode, ret);
  1606. goto out;
  1607. }
  1608. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1609. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1610. fw_log_mode, resp->resp.result, resp->resp.error);
  1611. ret = -resp->resp.result;
  1612. goto out;
  1613. }
  1614. kfree(req);
  1615. kfree(resp);
  1616. return 0;
  1617. out:
  1618. kfree(req);
  1619. kfree(resp);
  1620. return ret;
  1621. }
  1622. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1623. {
  1624. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1625. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1626. struct qmi_txn txn;
  1627. int ret = 0;
  1628. if (!plat_priv)
  1629. return -ENODEV;
  1630. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1631. !plat_priv->fw_pcie_gen_switch) {
  1632. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1633. return 0;
  1634. }
  1635. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1636. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1637. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1638. plat_priv->pcie_gen_speed;
  1639. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1640. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1641. if (ret < 0) {
  1642. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1643. ret);
  1644. goto out;
  1645. }
  1646. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1647. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1648. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1649. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1650. if (ret < 0) {
  1651. qmi_txn_cancel(&txn);
  1652. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1653. goto out;
  1654. }
  1655. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1656. if (ret < 0) {
  1657. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1658. ret);
  1659. goto out;
  1660. }
  1661. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1662. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1663. plat_priv->pcie_gen_speed, resp.resp.result,
  1664. resp.resp.error);
  1665. ret = -resp.resp.result;
  1666. }
  1667. out:
  1668. /* Reset PCIE Gen speed after one time use */
  1669. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1670. return ret;
  1671. }
  1672. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1673. {
  1674. struct wlfw_antenna_switch_req_msg_v01 *req;
  1675. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1676. struct qmi_txn txn;
  1677. int ret = 0;
  1678. if (!plat_priv)
  1679. return -ENODEV;
  1680. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1681. plat_priv->driver_state);
  1682. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1683. if (!req)
  1684. return -ENOMEM;
  1685. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1686. if (!resp) {
  1687. kfree(req);
  1688. return -ENOMEM;
  1689. }
  1690. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1691. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1692. if (ret < 0) {
  1693. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1694. ret);
  1695. goto out;
  1696. }
  1697. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1698. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1699. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1700. wlfw_antenna_switch_req_msg_v01_ei, req);
  1701. if (ret < 0) {
  1702. qmi_txn_cancel(&txn);
  1703. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1704. ret);
  1705. goto out;
  1706. }
  1707. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1708. if (ret < 0) {
  1709. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1710. ret);
  1711. goto out;
  1712. }
  1713. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1714. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1715. resp->resp.result, resp->resp.error);
  1716. ret = -resp->resp.result;
  1717. goto out;
  1718. }
  1719. if (resp->antenna_valid)
  1720. plat_priv->antenna = resp->antenna;
  1721. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1722. resp->antenna_valid, resp->antenna);
  1723. kfree(req);
  1724. kfree(resp);
  1725. return 0;
  1726. out:
  1727. kfree(req);
  1728. kfree(resp);
  1729. return ret;
  1730. }
  1731. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1732. {
  1733. struct wlfw_antenna_grant_req_msg_v01 *req;
  1734. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1735. struct qmi_txn txn;
  1736. int ret = 0;
  1737. if (!plat_priv)
  1738. return -ENODEV;
  1739. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1740. plat_priv->driver_state, plat_priv->grant);
  1741. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1742. if (!req)
  1743. return -ENOMEM;
  1744. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1745. if (!resp) {
  1746. kfree(req);
  1747. return -ENOMEM;
  1748. }
  1749. req->grant_valid = 1;
  1750. req->grant = plat_priv->grant;
  1751. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1752. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1753. if (ret < 0) {
  1754. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1755. ret);
  1756. goto out;
  1757. }
  1758. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1759. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1760. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1761. wlfw_antenna_grant_req_msg_v01_ei, req);
  1762. if (ret < 0) {
  1763. qmi_txn_cancel(&txn);
  1764. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1765. ret);
  1766. goto out;
  1767. }
  1768. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1769. if (ret < 0) {
  1770. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1771. ret);
  1772. goto out;
  1773. }
  1774. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1775. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1776. resp->resp.result, resp->resp.error);
  1777. ret = -resp->resp.result;
  1778. goto out;
  1779. }
  1780. kfree(req);
  1781. kfree(resp);
  1782. return 0;
  1783. out:
  1784. kfree(req);
  1785. kfree(resp);
  1786. return ret;
  1787. }
  1788. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1789. {
  1790. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1791. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1792. struct qmi_txn txn;
  1793. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1794. int ret = 0;
  1795. int i;
  1796. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1797. plat_priv->driver_state);
  1798. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1799. if (!req)
  1800. return -ENOMEM;
  1801. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1802. if (!resp) {
  1803. kfree(req);
  1804. return -ENOMEM;
  1805. }
  1806. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1807. for (i = 0; i < req->mem_seg_len; i++) {
  1808. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1809. qdss_mem[i].va, &qdss_mem[i].pa,
  1810. qdss_mem[i].size, qdss_mem[i].type);
  1811. req->mem_seg[i].addr = qdss_mem[i].pa;
  1812. req->mem_seg[i].size = qdss_mem[i].size;
  1813. req->mem_seg[i].type = qdss_mem[i].type;
  1814. }
  1815. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1816. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1817. if (ret < 0) {
  1818. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1819. ret);
  1820. goto out;
  1821. }
  1822. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1823. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1824. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1825. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1826. if (ret < 0) {
  1827. qmi_txn_cancel(&txn);
  1828. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1829. ret);
  1830. goto out;
  1831. }
  1832. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1833. if (ret < 0) {
  1834. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1835. ret);
  1836. goto out;
  1837. }
  1838. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1839. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  1840. resp->resp.result, resp->resp.error);
  1841. ret = -resp->resp.result;
  1842. goto out;
  1843. }
  1844. kfree(req);
  1845. kfree(resp);
  1846. return 0;
  1847. out:
  1848. kfree(req);
  1849. kfree(resp);
  1850. return ret;
  1851. }
  1852. static int cnss_wlfw_wfc_call_status_send_sync
  1853. (struct cnss_plat_data *plat_priv,
  1854. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  1855. {
  1856. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1857. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1858. struct qmi_txn txn;
  1859. int ret = 0;
  1860. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1861. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  1862. return -EINVAL;
  1863. }
  1864. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1865. if (!req)
  1866. return -ENOMEM;
  1867. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1868. if (!resp) {
  1869. kfree(req);
  1870. return -ENOMEM;
  1871. }
  1872. /**
  1873. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  1874. * But in r2 update QMI structure is expanded and as an effect qmi
  1875. * decoded structures have padding. Thus we cannot use buffer design.
  1876. * For backward compatibility for r1 design copy only wfc_call_active
  1877. * value in hex buffer.
  1878. */
  1879. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  1880. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  1881. /* wfc_call_active is mandatory in IMS indication */
  1882. req->wfc_call_active_valid = 1;
  1883. req->wfc_call_active = ind_msg->wfc_call_active;
  1884. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  1885. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  1886. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  1887. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  1888. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  1889. req->twt_ims_start = ind_msg->twt_ims_start;
  1890. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  1891. req->twt_ims_int = ind_msg->twt_ims_int;
  1892. req->media_quality_valid = ind_msg->media_quality_valid;
  1893. req->media_quality =
  1894. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  1895. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1896. plat_priv->driver_state);
  1897. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1898. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1899. if (ret < 0) {
  1900. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1901. ret);
  1902. goto out;
  1903. }
  1904. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1905. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1906. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1907. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1908. if (ret < 0) {
  1909. qmi_txn_cancel(&txn);
  1910. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1911. ret);
  1912. goto out;
  1913. }
  1914. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1915. if (ret < 0) {
  1916. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1917. ret);
  1918. goto out;
  1919. }
  1920. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1921. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1922. resp->resp.result, resp->resp.error);
  1923. ret = -resp->resp.result;
  1924. goto out;
  1925. }
  1926. ret = 0;
  1927. out:
  1928. kfree(req);
  1929. kfree(resp);
  1930. return ret;
  1931. }
  1932. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  1933. {
  1934. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  1935. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  1936. struct qmi_txn txn;
  1937. int ret = 0;
  1938. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  1939. plat_priv->dynamic_feature,
  1940. plat_priv->driver_state);
  1941. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1942. if (!req)
  1943. return -ENOMEM;
  1944. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1945. if (!resp) {
  1946. kfree(req);
  1947. return -ENOMEM;
  1948. }
  1949. req->mask_valid = 1;
  1950. req->mask = plat_priv->dynamic_feature;
  1951. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1952. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  1953. if (ret < 0) {
  1954. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  1955. ret);
  1956. goto out;
  1957. }
  1958. ret = qmi_send_request
  1959. (&plat_priv->qmi_wlfw, NULL, &txn,
  1960. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  1961. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  1962. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  1963. if (ret < 0) {
  1964. qmi_txn_cancel(&txn);
  1965. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  1966. ret);
  1967. goto out;
  1968. }
  1969. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1970. if (ret < 0) {
  1971. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  1972. ret);
  1973. goto out;
  1974. }
  1975. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1976. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  1977. resp->resp.result, resp->resp.error);
  1978. ret = -resp->resp.result;
  1979. goto out;
  1980. }
  1981. out:
  1982. kfree(req);
  1983. kfree(resp);
  1984. return ret;
  1985. }
  1986. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  1987. void *cmd, int cmd_len)
  1988. {
  1989. struct wlfw_get_info_req_msg_v01 *req;
  1990. struct wlfw_get_info_resp_msg_v01 *resp;
  1991. struct qmi_txn txn;
  1992. int ret = 0;
  1993. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  1994. type, cmd_len, plat_priv->driver_state);
  1995. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  1996. return -EINVAL;
  1997. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1998. if (!req)
  1999. return -ENOMEM;
  2000. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2001. if (!resp) {
  2002. kfree(req);
  2003. return -ENOMEM;
  2004. }
  2005. req->type = type;
  2006. req->data_len = cmd_len;
  2007. memcpy(req->data, cmd, req->data_len);
  2008. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2009. wlfw_get_info_resp_msg_v01_ei, resp);
  2010. if (ret < 0) {
  2011. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  2012. ret);
  2013. goto out;
  2014. }
  2015. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2016. QMI_WLFW_GET_INFO_REQ_V01,
  2017. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2018. wlfw_get_info_req_msg_v01_ei, req);
  2019. if (ret < 0) {
  2020. qmi_txn_cancel(&txn);
  2021. cnss_pr_err("Failed to send get info request, err: %d\n",
  2022. ret);
  2023. goto out;
  2024. }
  2025. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2026. if (ret < 0) {
  2027. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  2028. ret);
  2029. goto out;
  2030. }
  2031. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2032. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  2033. resp->resp.result, resp->resp.error);
  2034. ret = -resp->resp.result;
  2035. goto out;
  2036. }
  2037. kfree(req);
  2038. kfree(resp);
  2039. return 0;
  2040. out:
  2041. kfree(req);
  2042. kfree(resp);
  2043. return ret;
  2044. }
  2045. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  2046. {
  2047. return QMI_WLFW_TIMEOUT_MS;
  2048. }
  2049. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2050. struct sockaddr_qrtr *sq,
  2051. struct qmi_txn *txn, const void *data)
  2052. {
  2053. struct cnss_plat_data *plat_priv =
  2054. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2055. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  2056. int i;
  2057. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  2058. if (!txn) {
  2059. cnss_pr_err("Spurious indication\n");
  2060. return;
  2061. }
  2062. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  2063. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  2064. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  2065. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2066. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  2067. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  2068. if (!plat_priv->fw_mem[i].va &&
  2069. plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  2070. plat_priv->fw_mem[i].attrs |=
  2071. DMA_ATTR_FORCE_CONTIGUOUS;
  2072. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  2073. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  2074. }
  2075. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  2076. 0, NULL);
  2077. }
  2078. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2079. struct sockaddr_qrtr *sq,
  2080. struct qmi_txn *txn, const void *data)
  2081. {
  2082. struct cnss_plat_data *plat_priv =
  2083. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2084. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  2085. if (!txn) {
  2086. cnss_pr_err("Spurious indication\n");
  2087. return;
  2088. }
  2089. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  2090. 0, NULL);
  2091. }
  2092. /**
  2093. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  2094. *
  2095. * This event is not required for HST/ HSP as FW calibration done is
  2096. * provided in QMI_WLFW_CAL_DONE_IND_V01
  2097. */
  2098. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2099. struct sockaddr_qrtr *sq,
  2100. struct qmi_txn *txn, const void *data)
  2101. {
  2102. struct cnss_plat_data *plat_priv =
  2103. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2104. struct cnss_cal_info *cal_info;
  2105. if (!txn) {
  2106. cnss_pr_err("Spurious indication\n");
  2107. return;
  2108. }
  2109. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  2110. plat_priv->device_id == QCA6490_DEVICE_ID) {
  2111. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  2112. return;
  2113. }
  2114. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  2115. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2116. if (!cal_info)
  2117. return;
  2118. cal_info->cal_status = CNSS_CAL_DONE;
  2119. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2120. 0, cal_info);
  2121. }
  2122. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2123. struct sockaddr_qrtr *sq,
  2124. struct qmi_txn *txn, const void *data)
  2125. {
  2126. struct cnss_plat_data *plat_priv =
  2127. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2128. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  2129. if (!txn) {
  2130. cnss_pr_err("Spurious indication\n");
  2131. return;
  2132. }
  2133. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  2134. }
  2135. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  2136. struct sockaddr_qrtr *sq,
  2137. struct qmi_txn *txn, const void *data)
  2138. {
  2139. struct cnss_plat_data *plat_priv =
  2140. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2141. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  2142. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  2143. if (!txn) {
  2144. cnss_pr_err("Spurious indication\n");
  2145. return;
  2146. }
  2147. if (ind_msg->pwr_pin_result_valid)
  2148. plat_priv->pin_result.fw_pwr_pin_result =
  2149. ind_msg->pwr_pin_result;
  2150. if (ind_msg->phy_io_pin_result_valid)
  2151. plat_priv->pin_result.fw_phy_io_pin_result =
  2152. ind_msg->phy_io_pin_result;
  2153. if (ind_msg->rf_pin_result_valid)
  2154. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  2155. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  2156. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  2157. ind_msg->rf_pin_result);
  2158. }
  2159. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  2160. u32 cal_file_download_size)
  2161. {
  2162. struct wlfw_cal_report_req_msg_v01 req = {0};
  2163. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  2164. struct qmi_txn txn;
  2165. int ret = 0;
  2166. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  2167. cal_file_download_size, plat_priv->driver_state);
  2168. req.cal_file_download_size_valid = 1;
  2169. req.cal_file_download_size = cal_file_download_size;
  2170. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2171. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2172. if (ret < 0) {
  2173. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2174. ret);
  2175. goto out;
  2176. }
  2177. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2178. QMI_WLFW_CAL_REPORT_REQ_V01,
  2179. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2180. wlfw_cal_report_req_msg_v01_ei, &req);
  2181. if (ret < 0) {
  2182. qmi_txn_cancel(&txn);
  2183. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2184. ret);
  2185. goto out;
  2186. }
  2187. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2188. if (ret < 0) {
  2189. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2190. ret);
  2191. goto out;
  2192. }
  2193. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2194. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2195. resp.resp.result, resp.resp.error);
  2196. ret = -resp.resp.result;
  2197. goto out;
  2198. }
  2199. out:
  2200. return ret;
  2201. }
  2202. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2203. struct sockaddr_qrtr *sq,
  2204. struct qmi_txn *txn, const void *data)
  2205. {
  2206. struct cnss_plat_data *plat_priv =
  2207. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2208. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2209. struct cnss_cal_info *cal_info;
  2210. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2211. ind->cal_file_upload_size);
  2212. cnss_pr_info("Calibration took %d ms\n",
  2213. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2214. if (!txn) {
  2215. cnss_pr_err("Spurious indication\n");
  2216. return;
  2217. }
  2218. if (ind->cal_file_upload_size_valid)
  2219. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2220. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2221. if (!cal_info)
  2222. return;
  2223. cal_info->cal_status = CNSS_CAL_DONE;
  2224. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2225. 0, cal_info);
  2226. }
  2227. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2228. struct sockaddr_qrtr *sq,
  2229. struct qmi_txn *txn,
  2230. const void *data)
  2231. {
  2232. struct cnss_plat_data *plat_priv =
  2233. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2234. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2235. int i;
  2236. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2237. if (!txn) {
  2238. cnss_pr_err("Spurious indication\n");
  2239. return;
  2240. }
  2241. if (plat_priv->qdss_mem_seg_len) {
  2242. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2243. plat_priv->qdss_mem_seg_len);
  2244. return;
  2245. }
  2246. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2247. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2248. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2249. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2250. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2251. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2252. }
  2253. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2254. 0, NULL);
  2255. }
  2256. /**
  2257. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2258. *
  2259. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2260. * fw memory segment for dumping to file system. Only one type of mem can be
  2261. * saved per indication and is provided in mem seg index 0.
  2262. *
  2263. * Return: None
  2264. */
  2265. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2266. struct sockaddr_qrtr *sq,
  2267. struct qmi_txn *txn,
  2268. const void *data)
  2269. {
  2270. struct cnss_plat_data *plat_priv =
  2271. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2272. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2273. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2274. int i = 0;
  2275. if (!txn || !data) {
  2276. cnss_pr_err("Spurious indication\n");
  2277. return;
  2278. }
  2279. cnss_pr_dbg("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2280. ind_msg->source, ind_msg->mem_seg_valid,
  2281. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2282. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2283. if (!event_data)
  2284. return;
  2285. event_data->mem_type = ind_msg->mem_seg[0].type;
  2286. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2287. event_data->total_size = ind_msg->total_size;
  2288. if (ind_msg->mem_seg_valid) {
  2289. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2290. cnss_pr_err("Invalid seg len indication\n");
  2291. goto free_event_data;
  2292. }
  2293. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2294. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2295. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2296. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2297. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2298. goto free_event_data;
  2299. }
  2300. cnss_pr_dbg("seg-%d: addr 0x%llx size 0x%x\n",
  2301. i, ind_msg->mem_seg[i].addr,
  2302. ind_msg->mem_seg[i].size);
  2303. }
  2304. }
  2305. if (ind_msg->file_name_valid)
  2306. strlcpy(event_data->file_name, ind_msg->file_name,
  2307. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2308. if (ind_msg->source == 1) {
  2309. if (!ind_msg->file_name_valid)
  2310. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2311. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2312. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2313. 0, event_data);
  2314. } else {
  2315. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2316. if (!ind_msg->file_name_valid)
  2317. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2318. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2319. } else {
  2320. if (!ind_msg->file_name_valid)
  2321. strlcpy(event_data->file_name, "fw_mem_dump",
  2322. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2323. }
  2324. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2325. 0, event_data);
  2326. }
  2327. return;
  2328. free_event_data:
  2329. kfree(event_data);
  2330. }
  2331. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2332. struct sockaddr_qrtr *sq,
  2333. struct qmi_txn *txn,
  2334. const void *data)
  2335. {
  2336. struct cnss_plat_data *plat_priv =
  2337. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2338. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2339. 0, NULL);
  2340. }
  2341. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2342. struct sockaddr_qrtr *sq,
  2343. struct qmi_txn *txn,
  2344. const void *data)
  2345. {
  2346. struct cnss_plat_data *plat_priv =
  2347. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2348. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2349. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2350. if (!txn) {
  2351. cnss_pr_err("Spurious indication\n");
  2352. return;
  2353. }
  2354. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2355. ind_msg->data_len, ind_msg->type,
  2356. ind_msg->is_last, ind_msg->seq_no);
  2357. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2358. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2359. (void *)ind_msg->data,
  2360. ind_msg->data_len);
  2361. }
  2362. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2363. (struct cnss_plat_data *plat_priv,
  2364. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2365. {
  2366. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2367. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2368. struct qmi_txn txn;
  2369. int ret = 0;
  2370. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2371. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2372. return -EINVAL;
  2373. }
  2374. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2375. if (!req)
  2376. return -ENOMEM;
  2377. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2378. if (!resp) {
  2379. kfree(req);
  2380. return -ENOMEM;
  2381. }
  2382. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2383. req->twt_sta_start = ind_msg->twt_sta_start;
  2384. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2385. req->twt_sta_int = ind_msg->twt_sta_int;
  2386. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2387. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2388. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2389. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2390. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2391. req->twt_sta_dl = req->twt_sta_dl;
  2392. req->twt_sta_config_changed_valid =
  2393. ind_msg->twt_sta_config_changed_valid;
  2394. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2395. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2396. plat_priv->driver_state);
  2397. ret =
  2398. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2399. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2400. resp);
  2401. if (ret < 0) {
  2402. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2403. ret);
  2404. goto out;
  2405. }
  2406. ret =
  2407. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2408. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2409. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2410. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2411. if (ret < 0) {
  2412. qmi_txn_cancel(&txn);
  2413. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2414. goto out;
  2415. }
  2416. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2417. if (ret < 0) {
  2418. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2419. goto out;
  2420. }
  2421. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2422. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2423. resp->resp.result, resp->resp.error);
  2424. ret = -resp->resp.result;
  2425. goto out;
  2426. }
  2427. ret = 0;
  2428. out:
  2429. kfree(req);
  2430. kfree(resp);
  2431. return ret;
  2432. }
  2433. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2434. void *data)
  2435. {
  2436. int ret;
  2437. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2438. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2439. kfree(data);
  2440. return ret;
  2441. }
  2442. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2443. struct sockaddr_qrtr *sq,
  2444. struct qmi_txn *txn,
  2445. const void *data)
  2446. {
  2447. struct cnss_plat_data *plat_priv =
  2448. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2449. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2450. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2451. if (!txn) {
  2452. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2453. return;
  2454. }
  2455. if (!ind_msg) {
  2456. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2457. return;
  2458. }
  2459. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2460. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2461. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2462. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2463. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2464. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2465. ind_msg->twt_sta_config_changed_valid,
  2466. ind_msg->twt_sta_config_changed);
  2467. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2468. if (!event_data)
  2469. return;
  2470. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2471. event_data);
  2472. }
  2473. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2474. {
  2475. .type = QMI_INDICATION,
  2476. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2477. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2478. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2479. .fn = cnss_wlfw_request_mem_ind_cb
  2480. },
  2481. {
  2482. .type = QMI_INDICATION,
  2483. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2484. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2485. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2486. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2487. },
  2488. {
  2489. .type = QMI_INDICATION,
  2490. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2491. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2492. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2493. .fn = cnss_wlfw_fw_ready_ind_cb
  2494. },
  2495. {
  2496. .type = QMI_INDICATION,
  2497. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2498. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2499. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2500. .fn = cnss_wlfw_fw_init_done_ind_cb
  2501. },
  2502. {
  2503. .type = QMI_INDICATION,
  2504. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2505. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2506. .decoded_size =
  2507. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2508. .fn = cnss_wlfw_pin_result_ind_cb
  2509. },
  2510. {
  2511. .type = QMI_INDICATION,
  2512. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2513. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2514. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2515. .fn = cnss_wlfw_cal_done_ind_cb
  2516. },
  2517. {
  2518. .type = QMI_INDICATION,
  2519. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2520. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2521. .decoded_size =
  2522. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2523. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2524. },
  2525. {
  2526. .type = QMI_INDICATION,
  2527. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2528. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2529. .decoded_size =
  2530. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2531. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2532. },
  2533. {
  2534. .type = QMI_INDICATION,
  2535. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2536. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2537. .decoded_size =
  2538. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2539. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2540. },
  2541. {
  2542. .type = QMI_INDICATION,
  2543. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2544. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2545. .decoded_size =
  2546. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2547. .fn = cnss_wlfw_respond_get_info_ind_cb
  2548. },
  2549. {
  2550. .type = QMI_INDICATION,
  2551. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2552. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2553. .decoded_size =
  2554. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2555. .fn = cnss_wlfw_process_twt_cfg_ind
  2556. },
  2557. {}
  2558. };
  2559. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2560. void *data)
  2561. {
  2562. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2563. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2564. struct sockaddr_qrtr sq = { 0 };
  2565. int ret = 0;
  2566. if (!event_data)
  2567. return -EINVAL;
  2568. sq.sq_family = AF_QIPCRTR;
  2569. sq.sq_node = event_data->node;
  2570. sq.sq_port = event_data->port;
  2571. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2572. sizeof(sq), 0);
  2573. if (ret < 0) {
  2574. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2575. goto out;
  2576. }
  2577. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2578. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2579. plat_priv->driver_state);
  2580. kfree(data);
  2581. return 0;
  2582. out:
  2583. CNSS_QMI_ASSERT();
  2584. kfree(data);
  2585. return ret;
  2586. }
  2587. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2588. {
  2589. int ret = 0;
  2590. if (!plat_priv)
  2591. return -ENODEV;
  2592. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2593. cnss_pr_err("Unexpected WLFW server arrive\n");
  2594. CNSS_ASSERT(0);
  2595. return -EINVAL;
  2596. }
  2597. cnss_ignore_qmi_failure(false);
  2598. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2599. if (ret < 0)
  2600. goto out;
  2601. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2602. if (ret < 0) {
  2603. if (ret == -EALREADY)
  2604. ret = 0;
  2605. goto out;
  2606. }
  2607. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2608. if (ret < 0)
  2609. goto out;
  2610. return 0;
  2611. out:
  2612. return ret;
  2613. }
  2614. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2615. {
  2616. int ret;
  2617. if (!plat_priv)
  2618. return -ENODEV;
  2619. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2620. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2621. plat_priv->driver_state);
  2622. cnss_qmi_deinit(plat_priv);
  2623. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2624. ret = cnss_qmi_init(plat_priv);
  2625. if (ret < 0) {
  2626. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2627. CNSS_ASSERT(0);
  2628. }
  2629. return 0;
  2630. }
  2631. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2632. struct qmi_service *service)
  2633. {
  2634. struct cnss_plat_data *plat_priv =
  2635. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2636. struct cnss_qmi_event_server_arrive_data *event_data;
  2637. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2638. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2639. plat_priv->driver_state);
  2640. return 0;
  2641. }
  2642. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2643. service->node, service->port);
  2644. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2645. if (!event_data)
  2646. return -ENOMEM;
  2647. event_data->node = service->node;
  2648. event_data->port = service->port;
  2649. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2650. 0, event_data);
  2651. return 0;
  2652. }
  2653. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2654. struct qmi_service *service)
  2655. {
  2656. struct cnss_plat_data *plat_priv =
  2657. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2658. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2659. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2660. plat_priv->driver_state);
  2661. return;
  2662. }
  2663. cnss_pr_dbg("WLFW server exiting\n");
  2664. if (plat_priv) {
  2665. cnss_ignore_qmi_failure(true);
  2666. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2667. }
  2668. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2669. 0, NULL);
  2670. }
  2671. static struct qmi_ops qmi_wlfw_ops = {
  2672. .new_server = wlfw_new_server,
  2673. .del_server = wlfw_del_server,
  2674. };
  2675. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2676. {
  2677. int ret = 0;
  2678. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2679. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2680. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2681. if (ret < 0) {
  2682. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2683. ret);
  2684. goto out;
  2685. }
  2686. ret = qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2687. WLFW_SERVICE_VERS_V01, WLFW_SERVICE_INS_ID_V01);
  2688. if (ret < 0)
  2689. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2690. out:
  2691. return ret;
  2692. }
  2693. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2694. {
  2695. qmi_handle_release(&plat_priv->qmi_wlfw);
  2696. }
  2697. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2698. {
  2699. struct dms_get_mac_address_req_msg_v01 req;
  2700. struct dms_get_mac_address_resp_msg_v01 resp;
  2701. struct qmi_txn txn;
  2702. int ret = 0;
  2703. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2704. cnss_pr_err("DMS QMI connection not established\n");
  2705. return -EINVAL;
  2706. }
  2707. cnss_pr_dbg("Requesting DMS MAC address");
  2708. memset(&resp, 0, sizeof(resp));
  2709. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2710. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2711. if (ret < 0) {
  2712. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2713. ret);
  2714. goto out;
  2715. }
  2716. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2717. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2718. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2719. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2720. dms_get_mac_address_req_msg_v01_ei, &req);
  2721. if (ret < 0) {
  2722. qmi_txn_cancel(&txn);
  2723. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2724. ret);
  2725. goto out;
  2726. }
  2727. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2728. if (ret < 0) {
  2729. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2730. ret);
  2731. goto out;
  2732. }
  2733. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2734. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2735. resp.resp.result, resp.resp.error);
  2736. ret = -resp.resp.result;
  2737. goto out;
  2738. }
  2739. if (!resp.mac_address_valid ||
  2740. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2741. cnss_pr_err("Invalid MAC address received from DMS\n");
  2742. plat_priv->dms.mac_valid = false;
  2743. goto out;
  2744. }
  2745. plat_priv->dms.mac_valid = true;
  2746. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2747. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2748. out:
  2749. return ret;
  2750. }
  2751. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2752. unsigned int node, unsigned int port)
  2753. {
  2754. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2755. struct sockaddr_qrtr sq = {0};
  2756. int ret = 0;
  2757. sq.sq_family = AF_QIPCRTR;
  2758. sq.sq_node = node;
  2759. sq.sq_port = port;
  2760. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  2761. sizeof(sq), 0);
  2762. if (ret < 0) {
  2763. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  2764. node, port);
  2765. goto out;
  2766. }
  2767. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2768. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  2769. plat_priv->driver_state);
  2770. out:
  2771. return ret;
  2772. }
  2773. static int dms_new_server(struct qmi_handle *qmi_dms,
  2774. struct qmi_service *service)
  2775. {
  2776. struct cnss_plat_data *plat_priv =
  2777. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2778. if (!service)
  2779. return -EINVAL;
  2780. return cnss_dms_connect_to_server(plat_priv, service->node,
  2781. service->port);
  2782. }
  2783. static void cnss_dms_server_exit_work(struct work_struct *work)
  2784. {
  2785. int ret;
  2786. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  2787. cnss_dms_deinit(plat_priv);
  2788. cnss_pr_info("QMI DMS Server Exit");
  2789. clear_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2790. ret = cnss_dms_init(plat_priv);
  2791. if (ret < 0)
  2792. cnss_pr_err("QMI DMS service registraton failed, ret\n", ret);
  2793. }
  2794. static DECLARE_WORK(cnss_dms_del_work, cnss_dms_server_exit_work);
  2795. static void dms_del_server(struct qmi_handle *qmi_dms,
  2796. struct qmi_service *service)
  2797. {
  2798. struct cnss_plat_data *plat_priv =
  2799. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2800. if (!plat_priv)
  2801. return;
  2802. if (test_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state)) {
  2803. cnss_pr_info("DMS server delete or cnss remove in progress, Ignore server delete: 0x%lx\n",
  2804. plat_priv->driver_state);
  2805. return;
  2806. }
  2807. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2808. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2809. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  2810. plat_priv->driver_state);
  2811. schedule_work(&cnss_dms_del_work);
  2812. }
  2813. void cnss_cancel_dms_work(void)
  2814. {
  2815. cancel_work_sync(&cnss_dms_del_work);
  2816. }
  2817. static struct qmi_ops qmi_dms_ops = {
  2818. .new_server = dms_new_server,
  2819. .del_server = dms_del_server,
  2820. };
  2821. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  2822. {
  2823. int ret = 0;
  2824. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  2825. &qmi_dms_ops, NULL);
  2826. if (ret < 0) {
  2827. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  2828. goto out;
  2829. }
  2830. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  2831. DMS_SERVICE_VERS_V01, 0);
  2832. if (ret < 0)
  2833. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  2834. out:
  2835. return ret;
  2836. }
  2837. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  2838. {
  2839. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2840. qmi_handle_release(&plat_priv->qmi_dms);
  2841. }
  2842. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  2843. {
  2844. int ret;
  2845. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  2846. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  2847. struct qmi_txn txn;
  2848. if (!plat_priv)
  2849. return -ENODEV;
  2850. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  2851. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2852. if (!req)
  2853. return -ENOMEM;
  2854. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2855. if (!resp) {
  2856. kfree(req);
  2857. return -ENOMEM;
  2858. }
  2859. req->antenna = plat_priv->antenna;
  2860. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2861. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  2862. if (ret < 0) {
  2863. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  2864. ret);
  2865. goto out;
  2866. }
  2867. ret = qmi_send_request
  2868. (&plat_priv->coex_qmi, NULL, &txn,
  2869. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  2870. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  2871. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  2872. if (ret < 0) {
  2873. qmi_txn_cancel(&txn);
  2874. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  2875. ret);
  2876. goto out;
  2877. }
  2878. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2879. if (ret < 0) {
  2880. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  2881. ret);
  2882. goto out;
  2883. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2884. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  2885. resp->resp.result, resp->resp.error);
  2886. ret = -resp->resp.result;
  2887. goto out;
  2888. }
  2889. if (resp->grant_valid)
  2890. plat_priv->grant = resp->grant;
  2891. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  2892. kfree(resp);
  2893. kfree(req);
  2894. return 0;
  2895. out:
  2896. kfree(resp);
  2897. kfree(req);
  2898. return ret;
  2899. }
  2900. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  2901. {
  2902. int ret;
  2903. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  2904. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  2905. struct qmi_txn txn;
  2906. if (!plat_priv)
  2907. return -ENODEV;
  2908. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  2909. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2910. if (!req)
  2911. return -ENOMEM;
  2912. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2913. if (!resp) {
  2914. kfree(req);
  2915. return -ENOMEM;
  2916. }
  2917. req->antenna = plat_priv->antenna;
  2918. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2919. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  2920. if (ret < 0) {
  2921. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  2922. ret);
  2923. goto out;
  2924. }
  2925. ret = qmi_send_request
  2926. (&plat_priv->coex_qmi, NULL, &txn,
  2927. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  2928. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  2929. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  2930. if (ret < 0) {
  2931. qmi_txn_cancel(&txn);
  2932. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  2933. ret);
  2934. goto out;
  2935. }
  2936. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2937. if (ret < 0) {
  2938. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  2939. ret);
  2940. goto out;
  2941. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2942. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  2943. resp->resp.result, resp->resp.error);
  2944. ret = -resp->resp.result;
  2945. goto out;
  2946. }
  2947. kfree(resp);
  2948. kfree(req);
  2949. return 0;
  2950. out:
  2951. kfree(resp);
  2952. kfree(req);
  2953. return ret;
  2954. }
  2955. int cnss_send_subsys_restart_level_msg(struct cnss_plat_data *plat_priv)
  2956. {
  2957. int ret;
  2958. struct wlfw_subsys_restart_level_req_msg_v01 req;
  2959. struct wlfw_subsys_restart_level_resp_msg_v01 resp;
  2960. u8 pcss_enabled;
  2961. if (!plat_priv)
  2962. return -ENODEV;
  2963. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  2964. cnss_pr_err("Can't send pcss cmd before fw ready\n");
  2965. return -EINVAL;
  2966. }
  2967. pcss_enabled = plat_priv->recovery_pcss_enabled;
  2968. cnss_pr_dbg("Sending pcss recovery status: %d\n", pcss_enabled);
  2969. req.restart_level_type_valid = 1;
  2970. req.restart_level_type = pcss_enabled;
  2971. ret = qmi_send_wait(&plat_priv->qmi_wlfw, &req, &resp,
  2972. wlfw_subsys_restart_level_req_msg_v01_ei,
  2973. wlfw_subsys_restart_level_resp_msg_v01_ei,
  2974. QMI_WLFW_SUBSYS_RESTART_LEVEL_REQ_V01,
  2975. WLFW_SUBSYS_RESTART_LEVEL_REQ_MSG_V01_MAX_MSG_LEN,
  2976. QMI_WLFW_TIMEOUT_JF);
  2977. return ret;
  2978. }
  2979. static int coex_new_server(struct qmi_handle *qmi,
  2980. struct qmi_service *service)
  2981. {
  2982. struct cnss_plat_data *plat_priv =
  2983. container_of(qmi, struct cnss_plat_data, coex_qmi);
  2984. struct sockaddr_qrtr sq = { 0 };
  2985. int ret = 0;
  2986. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  2987. service->node, service->port);
  2988. sq.sq_family = AF_QIPCRTR;
  2989. sq.sq_node = service->node;
  2990. sq.sq_port = service->port;
  2991. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  2992. if (ret < 0) {
  2993. cnss_pr_err("Fail to connect to remote service port\n");
  2994. return ret;
  2995. }
  2996. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  2997. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  2998. plat_priv->driver_state);
  2999. return 0;
  3000. }
  3001. static void coex_del_server(struct qmi_handle *qmi,
  3002. struct qmi_service *service)
  3003. {
  3004. struct cnss_plat_data *plat_priv =
  3005. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3006. cnss_pr_dbg("COEX server exit\n");
  3007. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3008. }
  3009. static struct qmi_ops coex_qmi_ops = {
  3010. .new_server = coex_new_server,
  3011. .del_server = coex_del_server,
  3012. };
  3013. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  3014. { int ret;
  3015. ret = qmi_handle_init(&plat_priv->coex_qmi,
  3016. COEX_SERVICE_MAX_MSG_LEN,
  3017. &coex_qmi_ops, NULL);
  3018. if (ret < 0)
  3019. return ret;
  3020. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  3021. COEX_SERVICE_VERS_V01, 0);
  3022. return ret;
  3023. }
  3024. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  3025. {
  3026. qmi_handle_release(&plat_priv->coex_qmi);
  3027. }
  3028. /* IMS Service */
  3029. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  3030. {
  3031. int ret;
  3032. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  3033. struct qmi_txn *txn;
  3034. if (!plat_priv)
  3035. return -ENODEV;
  3036. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  3037. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3038. if (!req)
  3039. return -ENOMEM;
  3040. req->wfc_call_status_valid = 1;
  3041. req->wfc_call_status = 1;
  3042. txn = &plat_priv->txn;
  3043. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  3044. if (ret < 0) {
  3045. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  3046. ret);
  3047. goto out;
  3048. }
  3049. ret = qmi_send_request
  3050. (&plat_priv->ims_qmi, NULL, txn,
  3051. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3052. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  3053. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  3054. if (ret < 0) {
  3055. qmi_txn_cancel(txn);
  3056. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  3057. ret);
  3058. goto out;
  3059. }
  3060. kfree(req);
  3061. return 0;
  3062. out:
  3063. kfree(req);
  3064. return ret;
  3065. }
  3066. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  3067. struct sockaddr_qrtr *sq,
  3068. struct qmi_txn *txn,
  3069. const void *data)
  3070. {
  3071. const
  3072. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  3073. data;
  3074. cnss_pr_dbg("Received IMS subscribe indication response\n");
  3075. if (!txn) {
  3076. cnss_pr_err("spurious response\n");
  3077. return;
  3078. }
  3079. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3080. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  3081. resp->resp.result, resp->resp.error);
  3082. txn->result = -resp->resp.result;
  3083. }
  3084. }
  3085. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  3086. void *data)
  3087. {
  3088. int ret;
  3089. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3090. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  3091. kfree(data);
  3092. return ret;
  3093. }
  3094. static void
  3095. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  3096. struct sockaddr_qrtr *sq,
  3097. struct qmi_txn *txn, const void *data)
  3098. {
  3099. struct cnss_plat_data *plat_priv =
  3100. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  3101. const
  3102. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3103. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  3104. if (!txn) {
  3105. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  3106. return;
  3107. }
  3108. if (!ind_msg) {
  3109. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  3110. return;
  3111. }
  3112. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  3113. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  3114. ind_msg->all_wfc_calls_held,
  3115. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  3116. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  3117. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  3118. ind_msg->media_quality_valid, ind_msg->media_quality);
  3119. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  3120. if (!event_data)
  3121. return;
  3122. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  3123. 0, event_data);
  3124. }
  3125. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  3126. {
  3127. .type = QMI_RESPONSE,
  3128. .msg_id =
  3129. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3130. .ei =
  3131. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  3132. .decoded_size = sizeof(struct
  3133. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  3134. .fn = ims_subscribe_for_indication_resp_cb
  3135. },
  3136. {
  3137. .type = QMI_INDICATION,
  3138. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  3139. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  3140. .decoded_size =
  3141. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  3142. .fn = cnss_ims_process_wfc_call_ind_cb
  3143. },
  3144. {}
  3145. };
  3146. static int ims_new_server(struct qmi_handle *qmi,
  3147. struct qmi_service *service)
  3148. {
  3149. struct cnss_plat_data *plat_priv =
  3150. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3151. struct sockaddr_qrtr sq = { 0 };
  3152. int ret = 0;
  3153. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  3154. service->node, service->port);
  3155. sq.sq_family = AF_QIPCRTR;
  3156. sq.sq_node = service->node;
  3157. sq.sq_port = service->port;
  3158. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3159. if (ret < 0) {
  3160. cnss_pr_err("Fail to connect to remote service port\n");
  3161. return ret;
  3162. }
  3163. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3164. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  3165. plat_priv->driver_state);
  3166. ret = ims_subscribe_for_indication_send_async(plat_priv);
  3167. return ret;
  3168. }
  3169. static void ims_del_server(struct qmi_handle *qmi,
  3170. struct qmi_service *service)
  3171. {
  3172. struct cnss_plat_data *plat_priv =
  3173. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3174. cnss_pr_dbg("IMS server exit\n");
  3175. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3176. }
  3177. static struct qmi_ops ims_qmi_ops = {
  3178. .new_server = ims_new_server,
  3179. .del_server = ims_del_server,
  3180. };
  3181. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  3182. { int ret;
  3183. ret = qmi_handle_init(&plat_priv->ims_qmi,
  3184. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  3185. &ims_qmi_ops, qmi_ims_msg_handlers);
  3186. if (ret < 0)
  3187. return ret;
  3188. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  3189. IMSPRIVATE_SERVICE_VERS_V01, 0);
  3190. return ret;
  3191. }
  3192. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  3193. {
  3194. qmi_handle_release(&plat_priv->ims_qmi);
  3195. }