dsi_panel.c 108 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. /**
  15. * topology is currently defined by a set of following 3 values:
  16. * 1. num of layer mixers
  17. * 2. num of compression encoders
  18. * 3. num of interfaces
  19. */
  20. #define TOPOLOGY_SET_LEN 3
  21. #define MAX_TOPOLOGY 5
  22. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  23. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  24. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  25. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  26. #define MAX_PANEL_JITTER 10
  27. #define DEFAULT_PANEL_PREFILL_LINES 25
  28. #define MIN_PREFILL_LINES 35
  29. enum dsi_dsc_ratio_type {
  30. DSC_8BPC_8BPP,
  31. DSC_10BPC_8BPP,
  32. DSC_12BPC_8BPP,
  33. DSC_10BPC_10BPP,
  34. DSC_RATIO_TYPE_MAX
  35. };
  36. static u32 dsi_dsc_rc_buf_thresh[] = {0x0e, 0x1c, 0x2a, 0x38, 0x46, 0x54,
  37. 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b, 0x7d, 0x7e};
  38. /*
  39. * DSC 1.1
  40. * Rate control - Min QP values for each ratio type in dsi_dsc_ratio_type
  41. */
  42. static char dsi_dsc_rc_range_min_qp_1_1[][15] = {
  43. {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 7, 12},
  44. {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 17},
  45. {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 15, 21},
  46. {0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
  47. };
  48. /*
  49. * DSC 1.1 SCR
  50. * Rate control - Min QP values for each ratio type in dsi_dsc_ratio_type
  51. */
  52. static char dsi_dsc_rc_range_min_qp_1_1_scr1[][15] = {
  53. {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 9, 12},
  54. {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 13, 16},
  55. {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 17, 20},
  56. {0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
  57. };
  58. /*
  59. * DSC 1.1
  60. * Rate control - Max QP values for each ratio type in dsi_dsc_ratio_type
  61. */
  62. static char dsi_dsc_rc_range_max_qp_1_1[][15] = {
  63. {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 11, 12, 13, 13, 15},
  64. {4, 8, 9, 10, 11, 11, 11, 12, 13, 14, 15, 16, 17, 17, 19},
  65. {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 19, 20, 21, 21, 23},
  66. {7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
  67. };
  68. /*
  69. * DSC 1.1 SCR
  70. * Rate control - Max QP values for each ratio type in dsi_dsc_ratio_type
  71. */
  72. static char dsi_dsc_rc_range_max_qp_1_1_scr1[][15] = {
  73. {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 10, 11, 11, 12, 13},
  74. {8, 8, 9, 10, 11, 11, 11, 12, 13, 14, 14, 15, 15, 16, 17},
  75. {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 18, 19, 19, 20, 23},
  76. {7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
  77. };
  78. /*
  79. * DSC 1.1 and DSC 1.1 SCR
  80. * Rate control - bpg offset values
  81. */
  82. static char dsi_dsc_rc_range_bpg_offset[] = {2, 0, 0, -2, -4, -6, -8, -8,
  83. -8, -10, -10, -12, -12, -12, -12};
  84. int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc, char *buf,
  85. int pps_id)
  86. {
  87. char *bp;
  88. char data;
  89. int i, bpp;
  90. char *dbgbp;
  91. dbgbp = buf;
  92. bp = buf;
  93. /* First 7 bytes are cmd header */
  94. *bp++ = 0x0A;
  95. *bp++ = 1;
  96. *bp++ = 0;
  97. *bp++ = 0;
  98. *bp++ = dsc->pps_delay_ms;
  99. *bp++ = 0;
  100. *bp++ = 128;
  101. *bp++ = (dsc->version & 0xff); /* pps0 */
  102. *bp++ = (pps_id & 0xff); /* pps1 */
  103. bp++; /* pps2, reserved */
  104. data = dsc->line_buf_depth & 0x0f;
  105. data |= ((dsc->bpc & 0xf) << 4);
  106. *bp++ = data; /* pps3 */
  107. bpp = dsc->bpp;
  108. bpp <<= 4; /* 4 fraction bits */
  109. data = (bpp >> 8);
  110. data &= 0x03; /* upper two bits */
  111. data |= ((dsc->block_pred_enable & 0x1) << 5);
  112. data |= ((dsc->convert_rgb & 0x1) << 4);
  113. data |= ((dsc->enable_422 & 0x1) << 3);
  114. data |= ((dsc->vbr_enable & 0x1) << 2);
  115. *bp++ = data; /* pps4 */
  116. *bp++ = (bpp & 0xff); /* pps5 */
  117. *bp++ = ((dsc->pic_height >> 8) & 0xff); /* pps6 */
  118. *bp++ = (dsc->pic_height & 0x0ff); /* pps7 */
  119. *bp++ = ((dsc->pic_width >> 8) & 0xff); /* pps8 */
  120. *bp++ = (dsc->pic_width & 0x0ff); /* pps9 */
  121. *bp++ = ((dsc->slice_height >> 8) & 0xff);/* pps10 */
  122. *bp++ = (dsc->slice_height & 0x0ff); /* pps11 */
  123. *bp++ = ((dsc->slice_width >> 8) & 0xff); /* pps12 */
  124. *bp++ = (dsc->slice_width & 0x0ff); /* pps13 */
  125. *bp++ = ((dsc->chunk_size >> 8) & 0xff);/* pps14 */
  126. *bp++ = (dsc->chunk_size & 0x0ff); /* pps15 */
  127. *bp++ = (dsc->initial_xmit_delay >> 8) & 0x3; /* pps16, bit 0, 1 */
  128. *bp++ = (dsc->initial_xmit_delay & 0xff);/* pps17 */
  129. *bp++ = ((dsc->initial_dec_delay >> 8) & 0xff); /* pps18 */
  130. *bp++ = (dsc->initial_dec_delay & 0xff);/* pps19 */
  131. bp++; /* pps20, reserved */
  132. *bp++ = (dsc->initial_scale_value & 0x3f); /* pps21 */
  133. *bp++ = ((dsc->scale_increment_interval >> 8) & 0xff); /* pps22 */
  134. *bp++ = (dsc->scale_increment_interval & 0xff); /* pps23 */
  135. *bp++ = ((dsc->scale_decrement_interval >> 8) & 0xf); /* pps24 */
  136. *bp++ = (dsc->scale_decrement_interval & 0x0ff);/* pps25 */
  137. bp++; /* pps26, reserved */
  138. *bp++ = (dsc->first_line_bpg_offset & 0x1f);/* pps27 */
  139. *bp++ = ((dsc->nfl_bpg_offset >> 8) & 0xff);/* pps28 */
  140. *bp++ = (dsc->nfl_bpg_offset & 0x0ff); /* pps29 */
  141. *bp++ = ((dsc->slice_bpg_offset >> 8) & 0xff);/* pps30 */
  142. *bp++ = (dsc->slice_bpg_offset & 0x0ff);/* pps31 */
  143. *bp++ = ((dsc->initial_offset >> 8) & 0xff);/* pps32 */
  144. *bp++ = (dsc->initial_offset & 0x0ff); /* pps33 */
  145. *bp++ = ((dsc->final_offset >> 8) & 0xff);/* pps34 */
  146. *bp++ = (dsc->final_offset & 0x0ff); /* pps35 */
  147. *bp++ = (dsc->min_qp_flatness & 0x1f); /* pps36 */
  148. *bp++ = (dsc->max_qp_flatness & 0x1f); /* pps37 */
  149. *bp++ = ((dsc->rc_model_size >> 8) & 0xff);/* pps38 */
  150. *bp++ = (dsc->rc_model_size & 0x0ff); /* pps39 */
  151. *bp++ = (dsc->edge_factor & 0x0f); /* pps40 */
  152. *bp++ = (dsc->quant_incr_limit0 & 0x1f); /* pps41 */
  153. *bp++ = (dsc->quant_incr_limit1 & 0x1f); /* pps42 */
  154. data = ((dsc->tgt_offset_hi & 0xf) << 4);
  155. data |= (dsc->tgt_offset_lo & 0x0f);
  156. *bp++ = data; /* pps43 */
  157. for (i = 0; i < 14; i++)
  158. *bp++ = (dsc->buf_thresh[i] & 0xff); /* pps44 - pps57 */
  159. for (i = 0; i < 15; i++) { /* pps58 - pps87 */
  160. data = (dsc->range_min_qp[i] & 0x1f);
  161. data <<= 3;
  162. data |= ((dsc->range_max_qp[i] >> 2) & 0x07);
  163. *bp++ = data;
  164. data = (dsc->range_max_qp[i] & 0x03);
  165. data <<= 6;
  166. data |= (dsc->range_bpg_offset[i] & 0x3f);
  167. *bp++ = data;
  168. }
  169. return 128;
  170. }
  171. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  172. {
  173. int rc = 0;
  174. int i;
  175. struct regulator *vreg = NULL;
  176. for (i = 0; i < panel->power_info.count; i++) {
  177. vreg = devm_regulator_get(panel->parent,
  178. panel->power_info.vregs[i].vreg_name);
  179. rc = PTR_RET(vreg);
  180. if (rc) {
  181. DSI_ERR("failed to get %s regulator\n",
  182. panel->power_info.vregs[i].vreg_name);
  183. goto error_put;
  184. }
  185. panel->power_info.vregs[i].vreg = vreg;
  186. }
  187. return rc;
  188. error_put:
  189. for (i = i - 1; i >= 0; i--) {
  190. devm_regulator_put(panel->power_info.vregs[i].vreg);
  191. panel->power_info.vregs[i].vreg = NULL;
  192. }
  193. return rc;
  194. }
  195. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  196. {
  197. int rc = 0;
  198. int i;
  199. for (i = panel->power_info.count - 1; i >= 0; i--)
  200. devm_regulator_put(panel->power_info.vregs[i].vreg);
  201. return rc;
  202. }
  203. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  204. {
  205. int rc = 0;
  206. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  207. if (gpio_is_valid(r_config->reset_gpio)) {
  208. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  209. if (rc) {
  210. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  211. goto error;
  212. }
  213. }
  214. if (gpio_is_valid(r_config->disp_en_gpio)) {
  215. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  216. if (rc) {
  217. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  218. goto error_release_reset;
  219. }
  220. }
  221. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  222. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  223. if (rc) {
  224. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  225. goto error_release_disp_en;
  226. }
  227. }
  228. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  229. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  230. if (rc) {
  231. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  232. goto error_release_mode_sel;
  233. }
  234. }
  235. if (gpio_is_valid(panel->panel_test_gpio)) {
  236. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  237. if (rc) {
  238. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  239. rc);
  240. panel->panel_test_gpio = -1;
  241. rc = 0;
  242. }
  243. }
  244. goto error;
  245. error_release_mode_sel:
  246. if (gpio_is_valid(panel->bl_config.en_gpio))
  247. gpio_free(panel->bl_config.en_gpio);
  248. error_release_disp_en:
  249. if (gpio_is_valid(r_config->disp_en_gpio))
  250. gpio_free(r_config->disp_en_gpio);
  251. error_release_reset:
  252. if (gpio_is_valid(r_config->reset_gpio))
  253. gpio_free(r_config->reset_gpio);
  254. error:
  255. return rc;
  256. }
  257. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  258. {
  259. int rc = 0;
  260. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  261. if (gpio_is_valid(r_config->reset_gpio))
  262. gpio_free(r_config->reset_gpio);
  263. if (gpio_is_valid(r_config->disp_en_gpio))
  264. gpio_free(r_config->disp_en_gpio);
  265. if (gpio_is_valid(panel->bl_config.en_gpio))
  266. gpio_free(panel->bl_config.en_gpio);
  267. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  268. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  269. if (gpio_is_valid(panel->panel_test_gpio))
  270. gpio_free(panel->panel_test_gpio);
  271. return rc;
  272. }
  273. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  274. {
  275. struct dsi_panel_reset_config *r_config;
  276. if (!panel) {
  277. DSI_ERR("Invalid panel param\n");
  278. return -EINVAL;
  279. }
  280. r_config = &panel->reset_config;
  281. if (!r_config) {
  282. DSI_ERR("Invalid panel reset configuration\n");
  283. return -EINVAL;
  284. }
  285. if (gpio_is_valid(r_config->reset_gpio)) {
  286. gpio_set_value(r_config->reset_gpio, 0);
  287. DSI_INFO("GPIO pulled low to simulate ESD\n");
  288. return 0;
  289. }
  290. DSI_ERR("failed to pull down gpio\n");
  291. return -EINVAL;
  292. }
  293. static int dsi_panel_reset(struct dsi_panel *panel)
  294. {
  295. int rc = 0;
  296. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  297. int i;
  298. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  299. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  300. if (rc) {
  301. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  302. goto exit;
  303. }
  304. }
  305. if (r_config->count) {
  306. rc = gpio_direction_output(r_config->reset_gpio,
  307. r_config->sequence[0].level);
  308. if (rc) {
  309. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  310. goto exit;
  311. }
  312. }
  313. for (i = 0; i < r_config->count; i++) {
  314. gpio_set_value(r_config->reset_gpio,
  315. r_config->sequence[i].level);
  316. if (r_config->sequence[i].sleep_ms)
  317. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  318. (r_config->sequence[i].sleep_ms * 1000) + 100);
  319. }
  320. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  321. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  322. if (rc)
  323. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  324. }
  325. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  326. bool out = true;
  327. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  328. || (panel->reset_config.mode_sel_state
  329. == MODE_GPIO_LOW))
  330. out = false;
  331. else if ((panel->reset_config.mode_sel_state
  332. == MODE_SEL_SINGLE_PORT) ||
  333. (panel->reset_config.mode_sel_state
  334. == MODE_GPIO_HIGH))
  335. out = true;
  336. rc = gpio_direction_output(
  337. panel->reset_config.lcd_mode_sel_gpio, out);
  338. if (rc)
  339. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  340. }
  341. if (gpio_is_valid(panel->panel_test_gpio)) {
  342. rc = gpio_direction_input(panel->panel_test_gpio);
  343. if (rc)
  344. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  345. rc);
  346. }
  347. exit:
  348. return rc;
  349. }
  350. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  351. {
  352. int rc = 0;
  353. struct pinctrl_state *state;
  354. if (panel->host_config.ext_bridge_mode)
  355. return 0;
  356. if (enable)
  357. state = panel->pinctrl.active;
  358. else
  359. state = panel->pinctrl.suspend;
  360. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  361. if (rc)
  362. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  363. panel->name, rc);
  364. return rc;
  365. }
  366. static int dsi_panel_power_on(struct dsi_panel *panel)
  367. {
  368. int rc = 0;
  369. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  370. if (rc) {
  371. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  372. panel->name, rc);
  373. goto exit;
  374. }
  375. rc = dsi_panel_set_pinctrl_state(panel, true);
  376. if (rc) {
  377. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  378. goto error_disable_vregs;
  379. }
  380. rc = dsi_panel_reset(panel);
  381. if (rc) {
  382. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  383. goto error_disable_gpio;
  384. }
  385. goto exit;
  386. error_disable_gpio:
  387. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  388. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  389. if (gpio_is_valid(panel->bl_config.en_gpio))
  390. gpio_set_value(panel->bl_config.en_gpio, 0);
  391. (void)dsi_panel_set_pinctrl_state(panel, false);
  392. error_disable_vregs:
  393. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  394. exit:
  395. return rc;
  396. }
  397. static int dsi_panel_power_off(struct dsi_panel *panel)
  398. {
  399. int rc = 0;
  400. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  401. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  402. if (gpio_is_valid(panel->reset_config.reset_gpio))
  403. gpio_set_value(panel->reset_config.reset_gpio, 0);
  404. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  405. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  406. if (gpio_is_valid(panel->panel_test_gpio)) {
  407. rc = gpio_direction_input(panel->panel_test_gpio);
  408. if (rc)
  409. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  410. rc);
  411. }
  412. rc = dsi_panel_set_pinctrl_state(panel, false);
  413. if (rc) {
  414. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  415. rc);
  416. }
  417. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  418. if (rc)
  419. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  420. panel->name, rc);
  421. return rc;
  422. }
  423. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  424. enum dsi_cmd_set_type type)
  425. {
  426. int rc = 0, i = 0;
  427. ssize_t len;
  428. struct dsi_cmd_desc *cmds;
  429. u32 count;
  430. enum dsi_cmd_set_state state;
  431. struct dsi_display_mode *mode;
  432. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  433. if (!panel || !panel->cur_mode)
  434. return -EINVAL;
  435. mode = panel->cur_mode;
  436. cmds = mode->priv_info->cmd_sets[type].cmds;
  437. count = mode->priv_info->cmd_sets[type].count;
  438. state = mode->priv_info->cmd_sets[type].state;
  439. if (count == 0) {
  440. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  441. panel->name, type);
  442. goto error;
  443. }
  444. for (i = 0; i < count; i++) {
  445. if (state == DSI_CMD_SET_STATE_LP)
  446. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  447. if (cmds->last_command)
  448. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  449. len = ops->transfer(panel->host, &cmds->msg);
  450. if (len < 0) {
  451. rc = len;
  452. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  453. goto error;
  454. }
  455. if (cmds->post_wait_ms)
  456. usleep_range(cmds->post_wait_ms*1000,
  457. ((cmds->post_wait_ms*1000)+10));
  458. cmds++;
  459. }
  460. error:
  461. return rc;
  462. }
  463. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  464. {
  465. int rc = 0;
  466. if (panel->host_config.ext_bridge_mode)
  467. return 0;
  468. devm_pinctrl_put(panel->pinctrl.pinctrl);
  469. return rc;
  470. }
  471. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  472. {
  473. int rc = 0;
  474. if (panel->host_config.ext_bridge_mode)
  475. return 0;
  476. /* TODO: pinctrl is defined in dsi dt node */
  477. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  478. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  479. rc = PTR_ERR(panel->pinctrl.pinctrl);
  480. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  481. goto error;
  482. }
  483. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  484. "panel_active");
  485. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  486. rc = PTR_ERR(panel->pinctrl.active);
  487. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  488. goto error;
  489. }
  490. panel->pinctrl.suspend =
  491. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  492. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  493. rc = PTR_ERR(panel->pinctrl.suspend);
  494. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  495. goto error;
  496. }
  497. error:
  498. return rc;
  499. }
  500. static int dsi_panel_wled_register(struct dsi_panel *panel,
  501. struct dsi_backlight_config *bl)
  502. {
  503. struct backlight_device *bd;
  504. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  505. if (!bd) {
  506. DSI_ERR("[%s] fail raw backlight register\n", panel->name);
  507. return -EPROBE_DEFER;
  508. }
  509. bl->raw_bd = bd;
  510. return 0;
  511. }
  512. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  513. u32 bl_lvl)
  514. {
  515. int rc = 0;
  516. struct mipi_dsi_device *dsi;
  517. if (!panel || (bl_lvl > 0xffff)) {
  518. DSI_ERR("invalid params\n");
  519. return -EINVAL;
  520. }
  521. dsi = &panel->mipi_device;
  522. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  523. if (rc < 0)
  524. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  525. return rc;
  526. }
  527. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  528. u32 bl_lvl)
  529. {
  530. int rc = 0;
  531. u32 duty = 0;
  532. u32 period_ns = 0;
  533. struct dsi_backlight_config *bl;
  534. if (!panel) {
  535. DSI_ERR("Invalid Params\n");
  536. return -EINVAL;
  537. }
  538. bl = &panel->bl_config;
  539. if (!bl->pwm_bl) {
  540. DSI_ERR("pwm device not found\n");
  541. return -EINVAL;
  542. }
  543. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  544. duty = bl_lvl * period_ns;
  545. duty /= bl->bl_max_level;
  546. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  547. if (rc) {
  548. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  549. rc);
  550. goto error;
  551. }
  552. if (bl_lvl == 0 && bl->pwm_enabled) {
  553. pwm_disable(bl->pwm_bl);
  554. bl->pwm_enabled = false;
  555. return 0;
  556. }
  557. if (!bl->pwm_enabled) {
  558. rc = pwm_enable(bl->pwm_bl);
  559. if (rc) {
  560. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  561. rc);
  562. goto error;
  563. }
  564. bl->pwm_enabled = true;
  565. }
  566. error:
  567. return rc;
  568. }
  569. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  570. {
  571. int rc = 0;
  572. struct dsi_backlight_config *bl = &panel->bl_config;
  573. if (panel->host_config.ext_bridge_mode)
  574. return 0;
  575. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  576. switch (bl->type) {
  577. case DSI_BACKLIGHT_WLED:
  578. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  579. break;
  580. case DSI_BACKLIGHT_DCS:
  581. rc = dsi_panel_update_backlight(panel, bl_lvl);
  582. break;
  583. case DSI_BACKLIGHT_EXTERNAL:
  584. break;
  585. case DSI_BACKLIGHT_PWM:
  586. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  587. break;
  588. default:
  589. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  590. rc = -ENOTSUPP;
  591. }
  592. return rc;
  593. }
  594. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  595. {
  596. u32 cur_bl_level;
  597. struct backlight_device *bd = bl->raw_bd;
  598. /* default the brightness level to 50% */
  599. cur_bl_level = bl->bl_max_level >> 1;
  600. switch (bl->type) {
  601. case DSI_BACKLIGHT_WLED:
  602. /* Try to query the backlight level from the backlight device */
  603. if (bd->ops && bd->ops->get_brightness)
  604. cur_bl_level = bd->ops->get_brightness(bd);
  605. break;
  606. case DSI_BACKLIGHT_DCS:
  607. case DSI_BACKLIGHT_EXTERNAL:
  608. case DSI_BACKLIGHT_PWM:
  609. default:
  610. /*
  611. * Ideally, we should read the backlight level from the
  612. * panel. For now, just set it default value.
  613. */
  614. break;
  615. }
  616. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  617. return cur_bl_level;
  618. }
  619. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  620. {
  621. struct dsi_backlight_config *bl = &panel->bl_config;
  622. bl->bl_level = dsi_panel_get_brightness(bl);
  623. }
  624. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  625. {
  626. int rc = 0;
  627. struct dsi_backlight_config *bl = &panel->bl_config;
  628. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  629. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  630. rc = PTR_ERR(bl->pwm_bl);
  631. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  632. rc);
  633. return rc;
  634. }
  635. return 0;
  636. }
  637. static int dsi_panel_bl_register(struct dsi_panel *panel)
  638. {
  639. int rc = 0;
  640. struct dsi_backlight_config *bl = &panel->bl_config;
  641. if (panel->host_config.ext_bridge_mode)
  642. return 0;
  643. switch (bl->type) {
  644. case DSI_BACKLIGHT_WLED:
  645. rc = dsi_panel_wled_register(panel, bl);
  646. break;
  647. case DSI_BACKLIGHT_DCS:
  648. break;
  649. case DSI_BACKLIGHT_EXTERNAL:
  650. break;
  651. case DSI_BACKLIGHT_PWM:
  652. rc = dsi_panel_pwm_register(panel);
  653. break;
  654. default:
  655. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  656. rc = -ENOTSUPP;
  657. goto error;
  658. }
  659. error:
  660. return rc;
  661. }
  662. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  663. {
  664. struct dsi_backlight_config *bl = &panel->bl_config;
  665. devm_pwm_put(panel->parent, bl->pwm_bl);
  666. }
  667. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  668. {
  669. int rc = 0;
  670. struct dsi_backlight_config *bl = &panel->bl_config;
  671. if (panel->host_config.ext_bridge_mode)
  672. return 0;
  673. switch (bl->type) {
  674. case DSI_BACKLIGHT_WLED:
  675. break;
  676. case DSI_BACKLIGHT_DCS:
  677. break;
  678. case DSI_BACKLIGHT_EXTERNAL:
  679. break;
  680. case DSI_BACKLIGHT_PWM:
  681. dsi_panel_pwm_unregister(panel);
  682. break;
  683. default:
  684. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  685. rc = -ENOTSUPP;
  686. goto error;
  687. }
  688. error:
  689. return rc;
  690. }
  691. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  692. struct dsi_parser_utils *utils)
  693. {
  694. int rc = 0;
  695. u64 tmp64 = 0;
  696. struct dsi_display_mode *display_mode;
  697. struct dsi_display_mode_priv_info *priv_info;
  698. display_mode = container_of(mode, struct dsi_display_mode, timing);
  699. priv_info = display_mode->priv_info;
  700. rc = utils->read_u64(utils->data,
  701. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  702. if (rc == -EOVERFLOW) {
  703. tmp64 = 0;
  704. rc = utils->read_u32(utils->data,
  705. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  706. }
  707. mode->clk_rate_hz = !rc ? tmp64 : 0;
  708. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  709. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  710. &mode->mdp_transfer_time_us);
  711. if (!rc)
  712. display_mode->priv_info->mdp_transfer_time_us =
  713. mode->mdp_transfer_time_us;
  714. else
  715. display_mode->priv_info->mdp_transfer_time_us = 0;
  716. rc = utils->read_u32(utils->data,
  717. "qcom,mdss-dsi-panel-framerate",
  718. &mode->refresh_rate);
  719. if (rc) {
  720. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  721. rc);
  722. goto error;
  723. }
  724. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  725. &mode->h_active);
  726. if (rc) {
  727. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  728. rc);
  729. goto error;
  730. }
  731. rc = utils->read_u32(utils->data,
  732. "qcom,mdss-dsi-h-front-porch",
  733. &mode->h_front_porch);
  734. if (rc) {
  735. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  736. rc);
  737. goto error;
  738. }
  739. rc = utils->read_u32(utils->data,
  740. "qcom,mdss-dsi-h-back-porch",
  741. &mode->h_back_porch);
  742. if (rc) {
  743. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  744. rc);
  745. goto error;
  746. }
  747. rc = utils->read_u32(utils->data,
  748. "qcom,mdss-dsi-h-pulse-width",
  749. &mode->h_sync_width);
  750. if (rc) {
  751. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  752. rc);
  753. goto error;
  754. }
  755. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  756. &mode->h_skew);
  757. if (rc)
  758. DSI_ERR("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  759. rc);
  760. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  761. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  762. mode->h_sync_width);
  763. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  764. &mode->v_active);
  765. if (rc) {
  766. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  767. rc);
  768. goto error;
  769. }
  770. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  771. &mode->v_back_porch);
  772. if (rc) {
  773. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  774. rc);
  775. goto error;
  776. }
  777. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  778. &mode->v_front_porch);
  779. if (rc) {
  780. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  781. rc);
  782. goto error;
  783. }
  784. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  785. &mode->v_sync_width);
  786. if (rc) {
  787. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  788. rc);
  789. goto error;
  790. }
  791. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  792. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  793. mode->v_sync_width);
  794. error:
  795. return rc;
  796. }
  797. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  798. struct dsi_parser_utils *utils,
  799. const char *name)
  800. {
  801. int rc = 0;
  802. u32 bpp = 0;
  803. enum dsi_pixel_format fmt;
  804. const char *packing;
  805. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  806. if (rc) {
  807. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  808. name, rc);
  809. return rc;
  810. }
  811. host->bpp = bpp;
  812. switch (bpp) {
  813. case 3:
  814. fmt = DSI_PIXEL_FORMAT_RGB111;
  815. break;
  816. case 8:
  817. fmt = DSI_PIXEL_FORMAT_RGB332;
  818. break;
  819. case 12:
  820. fmt = DSI_PIXEL_FORMAT_RGB444;
  821. break;
  822. case 16:
  823. fmt = DSI_PIXEL_FORMAT_RGB565;
  824. break;
  825. case 18:
  826. fmt = DSI_PIXEL_FORMAT_RGB666;
  827. break;
  828. case 24:
  829. default:
  830. fmt = DSI_PIXEL_FORMAT_RGB888;
  831. break;
  832. }
  833. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  834. packing = utils->get_property(utils->data,
  835. "qcom,mdss-dsi-pixel-packing",
  836. NULL);
  837. if (packing && !strcmp(packing, "loose"))
  838. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  839. }
  840. host->dst_format = fmt;
  841. return rc;
  842. }
  843. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  844. struct dsi_parser_utils *utils,
  845. const char *name)
  846. {
  847. int rc = 0;
  848. bool lane_enabled;
  849. u32 num_of_lanes = 0;
  850. lane_enabled = utils->read_bool(utils->data,
  851. "qcom,mdss-dsi-lane-0-state");
  852. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  853. lane_enabled = utils->read_bool(utils->data,
  854. "qcom,mdss-dsi-lane-1-state");
  855. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  856. lane_enabled = utils->read_bool(utils->data,
  857. "qcom,mdss-dsi-lane-2-state");
  858. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  859. lane_enabled = utils->read_bool(utils->data,
  860. "qcom,mdss-dsi-lane-3-state");
  861. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  862. if (host->data_lanes & DSI_DATA_LANE_0)
  863. num_of_lanes++;
  864. if (host->data_lanes & DSI_DATA_LANE_1)
  865. num_of_lanes++;
  866. if (host->data_lanes & DSI_DATA_LANE_2)
  867. num_of_lanes++;
  868. if (host->data_lanes & DSI_DATA_LANE_3)
  869. num_of_lanes++;
  870. host->num_data_lanes = num_of_lanes;
  871. if (host->data_lanes == 0) {
  872. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  873. rc = -EINVAL;
  874. }
  875. return rc;
  876. }
  877. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  878. struct dsi_parser_utils *utils,
  879. const char *name)
  880. {
  881. int rc = 0;
  882. const char *swap_mode;
  883. swap_mode = utils->get_property(utils->data,
  884. "qcom,mdss-dsi-color-order", NULL);
  885. if (swap_mode) {
  886. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  887. host->swap_mode = DSI_COLOR_SWAP_RGB;
  888. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  889. host->swap_mode = DSI_COLOR_SWAP_RBG;
  890. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  891. host->swap_mode = DSI_COLOR_SWAP_BRG;
  892. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  893. host->swap_mode = DSI_COLOR_SWAP_GRB;
  894. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  895. host->swap_mode = DSI_COLOR_SWAP_GBR;
  896. } else {
  897. DSI_ERR("[%s] Unrecognized color order-%s\n",
  898. name, swap_mode);
  899. rc = -EINVAL;
  900. }
  901. } else {
  902. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  903. host->swap_mode = DSI_COLOR_SWAP_RGB;
  904. }
  905. /* bit swap on color channel is not defined in dt */
  906. host->bit_swap_red = false;
  907. host->bit_swap_green = false;
  908. host->bit_swap_blue = false;
  909. return rc;
  910. }
  911. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  912. struct dsi_parser_utils *utils,
  913. const char *name)
  914. {
  915. const char *trig;
  916. int rc = 0;
  917. trig = utils->get_property(utils->data,
  918. "qcom,mdss-dsi-mdp-trigger", NULL);
  919. if (trig) {
  920. if (!strcmp(trig, "none")) {
  921. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  922. } else if (!strcmp(trig, "trigger_te")) {
  923. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  924. } else if (!strcmp(trig, "trigger_sw")) {
  925. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  926. } else if (!strcmp(trig, "trigger_sw_te")) {
  927. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  928. } else {
  929. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  930. name, trig);
  931. rc = -EINVAL;
  932. }
  933. } else {
  934. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  935. name);
  936. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  937. }
  938. trig = utils->get_property(utils->data,
  939. "qcom,mdss-dsi-dma-trigger", NULL);
  940. if (trig) {
  941. if (!strcmp(trig, "none")) {
  942. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  943. } else if (!strcmp(trig, "trigger_te")) {
  944. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  945. } else if (!strcmp(trig, "trigger_sw")) {
  946. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  947. } else if (!strcmp(trig, "trigger_sw_seof")) {
  948. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  949. } else if (!strcmp(trig, "trigger_sw_te")) {
  950. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  951. } else {
  952. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  953. name, trig);
  954. rc = -EINVAL;
  955. }
  956. } else {
  957. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  958. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  959. }
  960. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  961. &host->te_mode);
  962. if (rc) {
  963. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  964. host->te_mode = 1;
  965. rc = 0;
  966. }
  967. return rc;
  968. }
  969. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  970. struct dsi_parser_utils *utils,
  971. const char *name)
  972. {
  973. u32 val = 0;
  974. int rc = 0;
  975. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  976. if (!rc) {
  977. host->t_clk_post = val;
  978. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  979. }
  980. val = 0;
  981. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  982. if (!rc) {
  983. host->t_clk_pre = val;
  984. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  985. }
  986. host->ignore_rx_eot = utils->read_bool(utils->data,
  987. "qcom,mdss-dsi-rx-eot-ignore");
  988. host->append_tx_eot = utils->read_bool(utils->data,
  989. "qcom,mdss-dsi-tx-eot-append");
  990. host->ext_bridge_mode = utils->read_bool(utils->data,
  991. "qcom,mdss-dsi-ext-bridge-mode");
  992. host->force_hs_clk_lane = utils->read_bool(utils->data,
  993. "qcom,mdss-dsi-force-clock-lane-hs");
  994. return 0;
  995. }
  996. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  997. struct dsi_parser_utils *utils,
  998. const char *name)
  999. {
  1000. int rc = 0;
  1001. u32 val = 0;
  1002. bool supported = false;
  1003. struct dsi_split_link_config *split_link = &host->split_link;
  1004. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  1005. if (!supported) {
  1006. DSI_DEBUG("[%s] Split link is not supported\n", name);
  1007. split_link->split_link_enabled = false;
  1008. return;
  1009. }
  1010. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  1011. if (rc || val < 1) {
  1012. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  1013. split_link->num_sublinks = 2;
  1014. } else {
  1015. split_link->num_sublinks = val;
  1016. }
  1017. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  1018. if (rc || val < 1) {
  1019. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  1020. split_link->lanes_per_sublink = 2;
  1021. } else {
  1022. split_link->lanes_per_sublink = val;
  1023. }
  1024. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  1025. split_link->num_sublinks, split_link->lanes_per_sublink);
  1026. split_link->split_link_enabled = true;
  1027. }
  1028. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  1029. {
  1030. int rc = 0;
  1031. struct dsi_parser_utils *utils = &panel->utils;
  1032. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1033. panel->name);
  1034. if (rc) {
  1035. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1036. panel->name, rc);
  1037. goto error;
  1038. }
  1039. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1040. panel->name);
  1041. if (rc) {
  1042. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1043. panel->name, rc);
  1044. goto error;
  1045. }
  1046. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1047. panel->name);
  1048. if (rc) {
  1049. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1050. panel->name, rc);
  1051. goto error;
  1052. }
  1053. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1054. panel->name);
  1055. if (rc) {
  1056. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1057. panel->name, rc);
  1058. goto error;
  1059. }
  1060. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1061. panel->name);
  1062. if (rc) {
  1063. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1064. panel->name, rc);
  1065. goto error;
  1066. }
  1067. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1068. panel->name);
  1069. error:
  1070. return rc;
  1071. }
  1072. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1073. struct device_node *of_node)
  1074. {
  1075. int rc = 0;
  1076. u32 val = 0;
  1077. rc = of_property_read_u32(of_node,
  1078. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1079. &val);
  1080. if (rc)
  1081. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1082. panel->name, rc);
  1083. panel->qsync_min_fps = val;
  1084. return rc;
  1085. }
  1086. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1087. {
  1088. int rc = 0;
  1089. bool supported = false;
  1090. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1091. struct dsi_parser_utils *utils = &panel->utils;
  1092. const char *name = panel->name;
  1093. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1094. if (!supported) {
  1095. dyn_clk_caps->dyn_clk_support = false;
  1096. return rc;
  1097. }
  1098. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  1099. "qcom,dsi-dyn-clk-list");
  1100. if (dyn_clk_caps->bit_clk_list_len < 1) {
  1101. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  1102. return -EINVAL;
  1103. }
  1104. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1105. sizeof(u32), GFP_KERNEL);
  1106. if (!dyn_clk_caps->bit_clk_list)
  1107. return -ENOMEM;
  1108. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1109. dyn_clk_caps->bit_clk_list,
  1110. dyn_clk_caps->bit_clk_list_len);
  1111. if (rc) {
  1112. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1113. return -EINVAL;
  1114. }
  1115. dyn_clk_caps->dyn_clk_support = true;
  1116. return 0;
  1117. }
  1118. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1119. {
  1120. int rc = 0;
  1121. bool supported = false;
  1122. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1123. struct dsi_parser_utils *utils = &panel->utils;
  1124. const char *name = panel->name;
  1125. const char *type;
  1126. u32 i;
  1127. supported = utils->read_bool(utils->data,
  1128. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1129. if (!supported) {
  1130. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1131. dfps_caps->dfps_support = false;
  1132. return rc;
  1133. }
  1134. type = utils->get_property(utils->data,
  1135. "qcom,mdss-dsi-pan-fps-update", NULL);
  1136. if (!type) {
  1137. DSI_ERR("[%s] dfps type not defined\n", name);
  1138. rc = -EINVAL;
  1139. goto error;
  1140. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1141. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1142. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1143. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1144. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1145. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1146. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1147. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1148. } else {
  1149. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1150. rc = -EINVAL;
  1151. goto error;
  1152. }
  1153. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1154. "qcom,dsi-supported-dfps-list");
  1155. if (dfps_caps->dfps_list_len < 1) {
  1156. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1157. rc = -EINVAL;
  1158. goto error;
  1159. }
  1160. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1161. GFP_KERNEL);
  1162. if (!dfps_caps->dfps_list) {
  1163. rc = -ENOMEM;
  1164. goto error;
  1165. }
  1166. rc = utils->read_u32_array(utils->data,
  1167. "qcom,dsi-supported-dfps-list",
  1168. dfps_caps->dfps_list,
  1169. dfps_caps->dfps_list_len);
  1170. if (rc) {
  1171. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1172. rc = -EINVAL;
  1173. goto error;
  1174. }
  1175. dfps_caps->dfps_support = true;
  1176. /* calculate max and min fps */
  1177. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1178. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1179. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1180. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1181. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1182. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1183. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1184. }
  1185. error:
  1186. return rc;
  1187. }
  1188. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1189. struct dsi_parser_utils *utils,
  1190. const char *name)
  1191. {
  1192. int rc = 0;
  1193. const char *traffic_mode;
  1194. u32 vc_id = 0;
  1195. u32 val = 0;
  1196. u32 line_no = 0;
  1197. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1198. if (rc) {
  1199. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1200. cfg->pulse_mode_hsa_he = false;
  1201. } else if (val == 1) {
  1202. cfg->pulse_mode_hsa_he = true;
  1203. } else if (val == 0) {
  1204. cfg->pulse_mode_hsa_he = false;
  1205. } else {
  1206. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1207. name);
  1208. rc = -EINVAL;
  1209. goto error;
  1210. }
  1211. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1212. "qcom,mdss-dsi-hfp-power-mode");
  1213. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1214. "qcom,mdss-dsi-hbp-power-mode");
  1215. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1216. "qcom,mdss-dsi-hsa-power-mode");
  1217. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1218. "qcom,mdss-dsi-last-line-interleave");
  1219. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1220. "qcom,mdss-dsi-bllp-eof-power-mode");
  1221. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1222. "qcom,mdss-dsi-bllp-power-mode");
  1223. cfg->force_clk_lane_hs = of_property_read_bool(utils->data,
  1224. "qcom,mdss-dsi-force-clock-lane-hs");
  1225. traffic_mode = utils->get_property(utils->data,
  1226. "qcom,mdss-dsi-traffic-mode",
  1227. NULL);
  1228. if (!traffic_mode) {
  1229. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1230. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1231. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1232. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1233. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1234. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1235. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1236. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1237. } else {
  1238. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1239. traffic_mode);
  1240. rc = -EINVAL;
  1241. goto error;
  1242. }
  1243. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1244. &vc_id);
  1245. if (rc) {
  1246. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1247. cfg->vc_id = 0;
  1248. } else {
  1249. cfg->vc_id = vc_id;
  1250. }
  1251. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1252. &line_no);
  1253. if (rc) {
  1254. DSI_DEBUG("[%s] set default dma scheduling line no\n", name);
  1255. cfg->dma_sched_line = 0x1;
  1256. /* do not fail since we have default value */
  1257. rc = 0;
  1258. } else {
  1259. cfg->dma_sched_line = line_no;
  1260. }
  1261. error:
  1262. return rc;
  1263. }
  1264. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1265. struct dsi_parser_utils *utils,
  1266. const char *name)
  1267. {
  1268. u32 val = 0;
  1269. int rc = 0;
  1270. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1271. if (rc) {
  1272. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1273. cfg->wr_mem_start = 0x2C;
  1274. } else {
  1275. cfg->wr_mem_start = val;
  1276. }
  1277. val = 0;
  1278. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1279. &val);
  1280. if (rc) {
  1281. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1282. cfg->wr_mem_continue = 0x3C;
  1283. } else {
  1284. cfg->wr_mem_continue = val;
  1285. }
  1286. /* TODO: fix following */
  1287. cfg->max_cmd_packets_interleave = 0;
  1288. val = 0;
  1289. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1290. &val);
  1291. if (rc) {
  1292. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1293. cfg->insert_dcs_command = true;
  1294. } else if (val == 1) {
  1295. cfg->insert_dcs_command = true;
  1296. } else if (val == 0) {
  1297. cfg->insert_dcs_command = false;
  1298. } else {
  1299. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1300. name);
  1301. rc = -EINVAL;
  1302. goto error;
  1303. }
  1304. error:
  1305. return rc;
  1306. }
  1307. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1308. {
  1309. int rc = 0;
  1310. struct dsi_parser_utils *utils = &panel->utils;
  1311. bool panel_mode_switch_enabled;
  1312. enum dsi_op_mode panel_mode;
  1313. const char *mode;
  1314. mode = utils->get_property(utils->data,
  1315. "qcom,mdss-dsi-panel-type", NULL);
  1316. if (!mode) {
  1317. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1318. panel_mode = DSI_OP_VIDEO_MODE;
  1319. } else if (!strcmp(mode, "dsi_video_mode")) {
  1320. panel_mode = DSI_OP_VIDEO_MODE;
  1321. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1322. panel_mode = DSI_OP_CMD_MODE;
  1323. } else {
  1324. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1325. rc = -EINVAL;
  1326. goto error;
  1327. }
  1328. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1329. "qcom,mdss-dsi-panel-mode-switch");
  1330. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1331. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1332. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1333. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1334. utils,
  1335. panel->name);
  1336. if (rc) {
  1337. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1338. panel->name, rc);
  1339. goto error;
  1340. }
  1341. }
  1342. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1343. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1344. utils,
  1345. panel->name);
  1346. if (rc) {
  1347. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1348. panel->name, rc);
  1349. goto error;
  1350. }
  1351. }
  1352. panel->panel_mode = panel_mode;
  1353. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1354. error:
  1355. return rc;
  1356. }
  1357. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1358. {
  1359. int rc = 0;
  1360. u32 val = 0;
  1361. const char *str;
  1362. struct dsi_panel_phy_props *props = &panel->phy_props;
  1363. struct dsi_parser_utils *utils = &panel->utils;
  1364. const char *name = panel->name;
  1365. rc = utils->read_u32(utils->data,
  1366. "qcom,mdss-pan-physical-width-dimension", &val);
  1367. if (rc) {
  1368. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1369. props->panel_width_mm = 0;
  1370. rc = 0;
  1371. } else {
  1372. props->panel_width_mm = val;
  1373. }
  1374. rc = utils->read_u32(utils->data,
  1375. "qcom,mdss-pan-physical-height-dimension",
  1376. &val);
  1377. if (rc) {
  1378. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1379. props->panel_height_mm = 0;
  1380. rc = 0;
  1381. } else {
  1382. props->panel_height_mm = val;
  1383. }
  1384. str = utils->get_property(utils->data,
  1385. "qcom,mdss-dsi-panel-orientation", NULL);
  1386. if (!str) {
  1387. props->rotation = DSI_PANEL_ROTATE_NONE;
  1388. } else if (!strcmp(str, "180")) {
  1389. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1390. } else if (!strcmp(str, "hflip")) {
  1391. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1392. } else if (!strcmp(str, "vflip")) {
  1393. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1394. } else {
  1395. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1396. rc = -EINVAL;
  1397. goto error;
  1398. }
  1399. error:
  1400. return rc;
  1401. }
  1402. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1403. "qcom,mdss-dsi-pre-on-command",
  1404. "qcom,mdss-dsi-on-command",
  1405. "qcom,mdss-dsi-post-panel-on-command",
  1406. "qcom,mdss-dsi-pre-off-command",
  1407. "qcom,mdss-dsi-off-command",
  1408. "qcom,mdss-dsi-post-off-command",
  1409. "qcom,mdss-dsi-pre-res-switch",
  1410. "qcom,mdss-dsi-res-switch",
  1411. "qcom,mdss-dsi-post-res-switch",
  1412. "qcom,cmd-to-video-mode-switch-commands",
  1413. "qcom,cmd-to-video-mode-post-switch-commands",
  1414. "qcom,video-to-cmd-mode-switch-commands",
  1415. "qcom,video-to-cmd-mode-post-switch-commands",
  1416. "qcom,mdss-dsi-panel-status-command",
  1417. "qcom,mdss-dsi-lp1-command",
  1418. "qcom,mdss-dsi-lp2-command",
  1419. "qcom,mdss-dsi-nolp-command",
  1420. "PPS not parsed from DTSI, generated dynamically",
  1421. "ROI not parsed from DTSI, generated dynamically",
  1422. "qcom,mdss-dsi-timing-switch-command",
  1423. "qcom,mdss-dsi-post-mode-switch-on-command",
  1424. "qcom,mdss-dsi-qsync-on-commands",
  1425. "qcom,mdss-dsi-qsync-off-commands",
  1426. };
  1427. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1428. "qcom,mdss-dsi-pre-on-command-state",
  1429. "qcom,mdss-dsi-on-command-state",
  1430. "qcom,mdss-dsi-post-on-command-state",
  1431. "qcom,mdss-dsi-pre-off-command-state",
  1432. "qcom,mdss-dsi-off-command-state",
  1433. "qcom,mdss-dsi-post-off-command-state",
  1434. "qcom,mdss-dsi-pre-res-switch-state",
  1435. "qcom,mdss-dsi-res-switch-state",
  1436. "qcom,mdss-dsi-post-res-switch-state",
  1437. "qcom,cmd-to-video-mode-switch-commands-state",
  1438. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1439. "qcom,video-to-cmd-mode-switch-commands-state",
  1440. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1441. "qcom,mdss-dsi-panel-status-command-state",
  1442. "qcom,mdss-dsi-lp1-command-state",
  1443. "qcom,mdss-dsi-lp2-command-state",
  1444. "qcom,mdss-dsi-nolp-command-state",
  1445. "PPS not parsed from DTSI, generated dynamically",
  1446. "ROI not parsed from DTSI, generated dynamically",
  1447. "qcom,mdss-dsi-timing-switch-command-state",
  1448. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1449. "qcom,mdss-dsi-qsync-on-commands-state",
  1450. "qcom,mdss-dsi-qsync-off-commands-state",
  1451. };
  1452. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1453. {
  1454. const u32 cmd_set_min_size = 7;
  1455. u32 count = 0;
  1456. u32 packet_length;
  1457. u32 tmp;
  1458. while (length >= cmd_set_min_size) {
  1459. packet_length = cmd_set_min_size;
  1460. tmp = ((data[5] << 8) | (data[6]));
  1461. packet_length += tmp;
  1462. if (packet_length > length) {
  1463. DSI_ERR("format error\n");
  1464. return -EINVAL;
  1465. }
  1466. length -= packet_length;
  1467. data += packet_length;
  1468. count++;
  1469. }
  1470. *cnt = count;
  1471. return 0;
  1472. }
  1473. static int dsi_panel_create_cmd_packets(const char *data,
  1474. u32 length,
  1475. u32 count,
  1476. struct dsi_cmd_desc *cmd)
  1477. {
  1478. int rc = 0;
  1479. int i, j;
  1480. u8 *payload;
  1481. for (i = 0; i < count; i++) {
  1482. u32 size;
  1483. cmd[i].msg.type = data[0];
  1484. cmd[i].last_command = (data[1] == 1);
  1485. cmd[i].msg.channel = data[2];
  1486. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1487. cmd[i].msg.ctrl = 0;
  1488. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1489. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1490. size = cmd[i].msg.tx_len * sizeof(u8);
  1491. payload = kzalloc(size, GFP_KERNEL);
  1492. if (!payload) {
  1493. rc = -ENOMEM;
  1494. goto error_free_payloads;
  1495. }
  1496. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1497. payload[j] = data[7 + j];
  1498. cmd[i].msg.tx_buf = payload;
  1499. data += (7 + cmd[i].msg.tx_len);
  1500. }
  1501. return rc;
  1502. error_free_payloads:
  1503. for (i = i - 1; i >= 0; i--) {
  1504. cmd--;
  1505. kfree(cmd->msg.tx_buf);
  1506. }
  1507. return rc;
  1508. }
  1509. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1510. {
  1511. u32 i = 0;
  1512. struct dsi_cmd_desc *cmd;
  1513. for (i = 0; i < set->count; i++) {
  1514. cmd = &set->cmds[i];
  1515. kfree(cmd->msg.tx_buf);
  1516. }
  1517. }
  1518. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1519. {
  1520. kfree(set->cmds);
  1521. }
  1522. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1523. u32 packet_count)
  1524. {
  1525. u32 size;
  1526. size = packet_count * sizeof(*cmd->cmds);
  1527. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1528. if (!cmd->cmds)
  1529. return -ENOMEM;
  1530. cmd->count = packet_count;
  1531. return 0;
  1532. }
  1533. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1534. enum dsi_cmd_set_type type,
  1535. struct dsi_parser_utils *utils)
  1536. {
  1537. int rc = 0;
  1538. u32 length = 0;
  1539. const char *data;
  1540. const char *state;
  1541. u32 packet_count = 0;
  1542. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1543. &length);
  1544. if (!data) {
  1545. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1546. rc = -ENOTSUPP;
  1547. goto error;
  1548. }
  1549. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1550. cmd_set_prop_map[type], length);
  1551. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1552. 8, 1, data, length, false);
  1553. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1554. if (rc) {
  1555. DSI_ERR("commands failed, rc=%d\n", rc);
  1556. goto error;
  1557. }
  1558. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1559. packet_count, length);
  1560. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1561. if (rc) {
  1562. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1563. goto error;
  1564. }
  1565. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1566. cmd->cmds);
  1567. if (rc) {
  1568. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1569. goto error_free_mem;
  1570. }
  1571. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1572. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1573. cmd->state = DSI_CMD_SET_STATE_LP;
  1574. } else if (!strcmp(state, "dsi_hs_mode")) {
  1575. cmd->state = DSI_CMD_SET_STATE_HS;
  1576. } else {
  1577. DSI_ERR("[%s] command state unrecognized-%s\n",
  1578. cmd_set_state_map[type], state);
  1579. goto error_free_mem;
  1580. }
  1581. return rc;
  1582. error_free_mem:
  1583. kfree(cmd->cmds);
  1584. cmd->cmds = NULL;
  1585. error:
  1586. return rc;
  1587. }
  1588. static int dsi_panel_parse_cmd_sets(
  1589. struct dsi_display_mode_priv_info *priv_info,
  1590. struct dsi_parser_utils *utils)
  1591. {
  1592. int rc = 0;
  1593. struct dsi_panel_cmd_set *set;
  1594. u32 i;
  1595. if (!priv_info) {
  1596. DSI_ERR("invalid mode priv info\n");
  1597. return -EINVAL;
  1598. }
  1599. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1600. set = &priv_info->cmd_sets[i];
  1601. set->type = i;
  1602. set->count = 0;
  1603. if (i == DSI_CMD_SET_PPS) {
  1604. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1605. if (rc)
  1606. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1607. i, rc);
  1608. set->state = DSI_CMD_SET_STATE_LP;
  1609. } else {
  1610. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1611. if (rc)
  1612. DSI_DEBUG("failed to parse set %d\n", i);
  1613. }
  1614. }
  1615. rc = 0;
  1616. return rc;
  1617. }
  1618. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1619. {
  1620. int rc = 0;
  1621. int i;
  1622. u32 length = 0;
  1623. u32 count = 0;
  1624. u32 size = 0;
  1625. u32 *arr_32 = NULL;
  1626. const u32 *arr;
  1627. struct dsi_parser_utils *utils = &panel->utils;
  1628. struct dsi_reset_seq *seq;
  1629. if (panel->host_config.ext_bridge_mode)
  1630. return 0;
  1631. arr = utils->get_property(utils->data,
  1632. "qcom,mdss-dsi-reset-sequence", &length);
  1633. if (!arr) {
  1634. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1635. rc = -EINVAL;
  1636. goto error;
  1637. }
  1638. if (length & 0x1) {
  1639. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1640. panel->name);
  1641. rc = -EINVAL;
  1642. goto error;
  1643. }
  1644. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1645. length = length / sizeof(u32);
  1646. size = length * sizeof(u32);
  1647. arr_32 = kzalloc(size, GFP_KERNEL);
  1648. if (!arr_32) {
  1649. rc = -ENOMEM;
  1650. goto error;
  1651. }
  1652. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1653. arr_32, length);
  1654. if (rc) {
  1655. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1656. goto error_free_arr_32;
  1657. }
  1658. count = length / 2;
  1659. size = count * sizeof(*seq);
  1660. seq = kzalloc(size, GFP_KERNEL);
  1661. if (!seq) {
  1662. rc = -ENOMEM;
  1663. goto error_free_arr_32;
  1664. }
  1665. panel->reset_config.sequence = seq;
  1666. panel->reset_config.count = count;
  1667. for (i = 0; i < length; i += 2) {
  1668. seq->level = arr_32[i];
  1669. seq->sleep_ms = arr_32[i + 1];
  1670. seq++;
  1671. }
  1672. error_free_arr_32:
  1673. kfree(arr_32);
  1674. error:
  1675. return rc;
  1676. }
  1677. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1678. {
  1679. struct dsi_parser_utils *utils = &panel->utils;
  1680. panel->ulps_feature_enabled =
  1681. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1682. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1683. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1684. panel->ulps_suspend_enabled =
  1685. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1686. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1687. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1688. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1689. "qcom,mdss-dsi-te-using-wd");
  1690. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1691. "qcom,cmd-sync-wait-broadcast");
  1692. panel->lp11_init = utils->read_bool(utils->data,
  1693. "qcom,mdss-dsi-lp11-init");
  1694. return 0;
  1695. }
  1696. static int dsi_panel_parse_jitter_config(
  1697. struct dsi_display_mode *mode,
  1698. struct dsi_parser_utils *utils)
  1699. {
  1700. int rc;
  1701. struct dsi_display_mode_priv_info *priv_info;
  1702. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1703. u64 jitter_val = 0;
  1704. priv_info = mode->priv_info;
  1705. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1706. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1707. if (rc) {
  1708. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1709. } else {
  1710. jitter_val = jitter[0];
  1711. jitter_val = div_u64(jitter_val, jitter[1]);
  1712. }
  1713. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1714. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1715. priv_info->panel_jitter_denom =
  1716. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1717. } else {
  1718. priv_info->panel_jitter_numer = jitter[0];
  1719. priv_info->panel_jitter_denom = jitter[1];
  1720. }
  1721. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1722. &priv_info->panel_prefill_lines);
  1723. if (rc) {
  1724. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1725. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1726. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1727. } else if (priv_info->panel_prefill_lines >=
  1728. DSI_V_TOTAL(&mode->timing)) {
  1729. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1730. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1731. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1732. }
  1733. return 0;
  1734. }
  1735. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1736. {
  1737. int rc = 0;
  1738. char *supply_name;
  1739. if (panel->host_config.ext_bridge_mode)
  1740. return 0;
  1741. if (!strcmp(panel->type, "primary"))
  1742. supply_name = "qcom,panel-supply-entries";
  1743. else
  1744. supply_name = "qcom,panel-sec-supply-entries";
  1745. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1746. &panel->power_info, supply_name);
  1747. if (rc) {
  1748. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1749. goto error;
  1750. }
  1751. error:
  1752. return rc;
  1753. }
  1754. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1755. {
  1756. int rc = 0;
  1757. const char *data;
  1758. struct dsi_parser_utils *utils = &panel->utils;
  1759. char *reset_gpio_name, *mode_set_gpio_name;
  1760. if (!strcmp(panel->type, "primary")) {
  1761. reset_gpio_name = "qcom,platform-reset-gpio";
  1762. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1763. } else {
  1764. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1765. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1766. }
  1767. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1768. reset_gpio_name, 0);
  1769. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1770. !panel->host_config.ext_bridge_mode) {
  1771. rc = panel->reset_config.reset_gpio;
  1772. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1773. goto error;
  1774. }
  1775. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1776. "qcom,5v-boost-gpio",
  1777. 0);
  1778. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1779. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1780. panel->name, rc);
  1781. panel->reset_config.disp_en_gpio =
  1782. utils->get_named_gpio(utils->data,
  1783. "qcom,platform-en-gpio", 0);
  1784. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1785. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1786. panel->name, rc);
  1787. }
  1788. }
  1789. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1790. utils->data, mode_set_gpio_name, 0);
  1791. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1792. DSI_DEBUG("mode gpio not specified\n");
  1793. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1794. data = utils->get_property(utils->data,
  1795. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1796. if (data) {
  1797. if (!strcmp(data, "single_port"))
  1798. panel->reset_config.mode_sel_state =
  1799. MODE_SEL_SINGLE_PORT;
  1800. else if (!strcmp(data, "dual_port"))
  1801. panel->reset_config.mode_sel_state =
  1802. MODE_SEL_DUAL_PORT;
  1803. else if (!strcmp(data, "high"))
  1804. panel->reset_config.mode_sel_state =
  1805. MODE_GPIO_HIGH;
  1806. else if (!strcmp(data, "low"))
  1807. panel->reset_config.mode_sel_state =
  1808. MODE_GPIO_LOW;
  1809. } else {
  1810. /* Set default mode as SPLIT mode */
  1811. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1812. }
  1813. /* TODO: release memory */
  1814. rc = dsi_panel_parse_reset_sequence(panel);
  1815. if (rc) {
  1816. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1817. panel->name, rc);
  1818. goto error;
  1819. }
  1820. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1821. "qcom,mdss-dsi-panel-test-pin",
  1822. 0);
  1823. if (!gpio_is_valid(panel->panel_test_gpio))
  1824. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1825. __LINE__);
  1826. error:
  1827. return rc;
  1828. }
  1829. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1830. {
  1831. int rc = 0;
  1832. u32 val;
  1833. struct dsi_backlight_config *config = &panel->bl_config;
  1834. struct dsi_parser_utils *utils = &panel->utils;
  1835. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1836. &val);
  1837. if (rc) {
  1838. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1839. goto error;
  1840. }
  1841. config->pwm_period_usecs = val;
  1842. error:
  1843. return rc;
  1844. }
  1845. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1846. {
  1847. int rc = 0;
  1848. u32 val = 0;
  1849. const char *bl_type;
  1850. const char *data;
  1851. struct dsi_parser_utils *utils = &panel->utils;
  1852. char *bl_name;
  1853. if (!strcmp(panel->type, "primary"))
  1854. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1855. else
  1856. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1857. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1858. if (!bl_type) {
  1859. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1860. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1861. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1862. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1863. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1864. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1865. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1866. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1867. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1868. } else {
  1869. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1870. panel->name, bl_type);
  1871. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1872. }
  1873. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1874. if (!data) {
  1875. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1876. } else if (!strcmp(data, "delay_until_first_frame")) {
  1877. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1878. } else {
  1879. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  1880. panel->name, data);
  1881. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1882. }
  1883. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1884. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1885. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1886. if (rc) {
  1887. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  1888. panel->name);
  1889. panel->bl_config.bl_min_level = 0;
  1890. } else {
  1891. panel->bl_config.bl_min_level = val;
  1892. }
  1893. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1894. if (rc) {
  1895. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  1896. panel->name);
  1897. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1898. } else {
  1899. panel->bl_config.bl_max_level = val;
  1900. }
  1901. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1902. &val);
  1903. if (rc) {
  1904. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1905. panel->name);
  1906. panel->bl_config.brightness_max_level = 255;
  1907. } else {
  1908. panel->bl_config.brightness_max_level = val;
  1909. }
  1910. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1911. rc = dsi_panel_parse_bl_pwm_config(panel);
  1912. if (rc) {
  1913. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  1914. panel->name, rc);
  1915. goto error;
  1916. }
  1917. }
  1918. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1919. "qcom,platform-bklight-en-gpio",
  1920. 0);
  1921. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1922. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1923. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1924. panel->name, rc);
  1925. rc = -EPROBE_DEFER;
  1926. goto error;
  1927. } else {
  1928. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1929. panel->name, rc);
  1930. rc = 0;
  1931. goto error;
  1932. }
  1933. }
  1934. error:
  1935. return rc;
  1936. }
  1937. void dsi_dsc_pclk_param_calc(struct msm_display_dsc_info *dsc, int intf_width)
  1938. {
  1939. int slice_per_pkt, slice_per_intf;
  1940. int bytes_in_slice, total_bytes_per_intf;
  1941. if (!dsc || !dsc->slice_width || !dsc->slice_per_pkt ||
  1942. (intf_width < dsc->slice_width)) {
  1943. DSI_ERR("invalid input, intf_width=%d slice_width=%d\n",
  1944. intf_width, dsc ? dsc->slice_width : -1);
  1945. return;
  1946. }
  1947. slice_per_pkt = dsc->slice_per_pkt;
  1948. slice_per_intf = DIV_ROUND_UP(intf_width, dsc->slice_width);
  1949. /*
  1950. * If slice_per_pkt is greater than slice_per_intf then default to 1.
  1951. * This can happen during partial update.
  1952. */
  1953. if (slice_per_pkt > slice_per_intf)
  1954. slice_per_pkt = 1;
  1955. bytes_in_slice = DIV_ROUND_UP(dsc->slice_width * dsc->bpp, 8);
  1956. total_bytes_per_intf = bytes_in_slice * slice_per_intf;
  1957. dsc->eol_byte_num = total_bytes_per_intf % 3;
  1958. dsc->pclk_per_line = DIV_ROUND_UP(total_bytes_per_intf, 3);
  1959. dsc->bytes_in_slice = bytes_in_slice;
  1960. dsc->bytes_per_pkt = bytes_in_slice * slice_per_pkt;
  1961. dsc->pkt_per_line = slice_per_intf / slice_per_pkt;
  1962. }
  1963. int dsi_dsc_populate_static_param(struct msm_display_dsc_info *dsc)
  1964. {
  1965. int bpp, bpc;
  1966. int mux_words_size;
  1967. int groups_per_line, groups_total;
  1968. int min_rate_buffer_size;
  1969. int hrd_delay;
  1970. int pre_num_extra_mux_bits, num_extra_mux_bits;
  1971. int slice_bits;
  1972. int data;
  1973. int final_value, final_scale;
  1974. int ratio_index, mod_offset;
  1975. dsc->rc_model_size = 8192;
  1976. if (dsc->version == 0x11 && dsc->scr_rev == 0x1)
  1977. dsc->first_line_bpg_offset = 15;
  1978. else
  1979. dsc->first_line_bpg_offset = 12;
  1980. dsc->edge_factor = 6;
  1981. dsc->tgt_offset_hi = 3;
  1982. dsc->tgt_offset_lo = 3;
  1983. dsc->enable_422 = 0;
  1984. dsc->convert_rgb = 1;
  1985. dsc->vbr_enable = 0;
  1986. dsc->buf_thresh = dsi_dsc_rc_buf_thresh;
  1987. bpp = dsc->bpp;
  1988. bpc = dsc->bpc;
  1989. if ((bpc == 12) && (bpp == 8))
  1990. ratio_index = DSC_12BPC_8BPP;
  1991. else if ((bpc == 10) && (bpp == 8))
  1992. ratio_index = DSC_10BPC_8BPP;
  1993. else if ((bpc == 10) && (bpp == 10))
  1994. ratio_index = DSC_10BPC_10BPP;
  1995. else
  1996. ratio_index = DSC_8BPC_8BPP;
  1997. if (dsc->version == 0x11 && dsc->scr_rev == 0x1) {
  1998. dsc->range_min_qp =
  1999. dsi_dsc_rc_range_min_qp_1_1_scr1[ratio_index];
  2000. dsc->range_max_qp =
  2001. dsi_dsc_rc_range_max_qp_1_1_scr1[ratio_index];
  2002. } else {
  2003. dsc->range_min_qp = dsi_dsc_rc_range_min_qp_1_1[ratio_index];
  2004. dsc->range_max_qp = dsi_dsc_rc_range_max_qp_1_1[ratio_index];
  2005. }
  2006. dsc->range_bpg_offset = dsi_dsc_rc_range_bpg_offset;
  2007. if (bpp == 8) {
  2008. dsc->initial_offset = 6144;
  2009. dsc->initial_xmit_delay = 512;
  2010. } else if (bpp == 10) {
  2011. dsc->initial_offset = 5632;
  2012. dsc->initial_xmit_delay = 410;
  2013. } else {
  2014. dsc->initial_offset = 2048;
  2015. dsc->initial_xmit_delay = 341;
  2016. }
  2017. dsc->line_buf_depth = bpc + 1;
  2018. if (bpc == 8) {
  2019. dsc->input_10_bits = 0;
  2020. dsc->min_qp_flatness = 3;
  2021. dsc->max_qp_flatness = 12;
  2022. dsc->quant_incr_limit0 = 11;
  2023. dsc->quant_incr_limit1 = 11;
  2024. mux_words_size = 48;
  2025. } else if (bpc == 10) { /* 10bpc */
  2026. dsc->input_10_bits = 1;
  2027. dsc->min_qp_flatness = 7;
  2028. dsc->max_qp_flatness = 16;
  2029. dsc->quant_incr_limit0 = 15;
  2030. dsc->quant_incr_limit1 = 15;
  2031. mux_words_size = 48;
  2032. } else { /* 12 bpc */
  2033. dsc->input_10_bits = 0;
  2034. dsc->min_qp_flatness = 11;
  2035. dsc->max_qp_flatness = 20;
  2036. dsc->quant_incr_limit0 = 19;
  2037. dsc->quant_incr_limit1 = 19;
  2038. mux_words_size = 64;
  2039. }
  2040. mod_offset = dsc->slice_width % 3;
  2041. switch (mod_offset) {
  2042. case 0:
  2043. dsc->slice_last_group_size = 2;
  2044. break;
  2045. case 1:
  2046. dsc->slice_last_group_size = 0;
  2047. break;
  2048. case 2:
  2049. dsc->slice_last_group_size = 1;
  2050. break;
  2051. default:
  2052. break;
  2053. }
  2054. dsc->det_thresh_flatness = 2 << (bpc - 8);
  2055. groups_per_line = DIV_ROUND_UP(dsc->slice_width, 3);
  2056. dsc->chunk_size = dsc->slice_width * bpp / 8;
  2057. if ((dsc->slice_width * bpp) % 8)
  2058. dsc->chunk_size++;
  2059. /* rbs-min */
  2060. min_rate_buffer_size = dsc->rc_model_size - dsc->initial_offset +
  2061. dsc->initial_xmit_delay * bpp +
  2062. groups_per_line * dsc->first_line_bpg_offset;
  2063. hrd_delay = DIV_ROUND_UP(min_rate_buffer_size, bpp);
  2064. dsc->initial_dec_delay = hrd_delay - dsc->initial_xmit_delay;
  2065. dsc->initial_scale_value = 8 * dsc->rc_model_size /
  2066. (dsc->rc_model_size - dsc->initial_offset);
  2067. slice_bits = 8 * dsc->chunk_size * dsc->slice_height;
  2068. groups_total = groups_per_line * dsc->slice_height;
  2069. data = dsc->first_line_bpg_offset * 2048;
  2070. dsc->nfl_bpg_offset = DIV_ROUND_UP(data, (dsc->slice_height - 1));
  2071. pre_num_extra_mux_bits = 3 * (mux_words_size + (4 * bpc + 4) - 2);
  2072. num_extra_mux_bits = pre_num_extra_mux_bits - (mux_words_size -
  2073. ((slice_bits - pre_num_extra_mux_bits) % mux_words_size));
  2074. data = 2048 * (dsc->rc_model_size - dsc->initial_offset
  2075. + num_extra_mux_bits);
  2076. dsc->slice_bpg_offset = DIV_ROUND_UP(data, groups_total);
  2077. data = dsc->initial_xmit_delay * bpp;
  2078. final_value = dsc->rc_model_size - data + num_extra_mux_bits;
  2079. final_scale = 8 * dsc->rc_model_size /
  2080. (dsc->rc_model_size - final_value);
  2081. dsc->final_offset = final_value;
  2082. data = (final_scale - 9) * (dsc->nfl_bpg_offset +
  2083. dsc->slice_bpg_offset);
  2084. dsc->scale_increment_interval = (2048 * dsc->final_offset) / data;
  2085. dsc->scale_decrement_interval = groups_per_line /
  2086. (dsc->initial_scale_value - 8);
  2087. return 0;
  2088. }
  2089. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2090. struct dsi_parser_utils *utils)
  2091. {
  2092. const char *data;
  2093. u32 len, i;
  2094. int rc = 0;
  2095. struct dsi_display_mode_priv_info *priv_info;
  2096. u64 pixel_clk_khz;
  2097. if (!mode || !mode->priv_info)
  2098. return -EINVAL;
  2099. priv_info = mode->priv_info;
  2100. data = utils->get_property(utils->data,
  2101. "qcom,mdss-dsi-panel-phy-timings", &len);
  2102. if (!data) {
  2103. DSI_DEBUG("Unable to read Phy timing settings\n");
  2104. } else {
  2105. priv_info->phy_timing_val =
  2106. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2107. if (!priv_info->phy_timing_val)
  2108. return -EINVAL;
  2109. for (i = 0; i < len; i++)
  2110. priv_info->phy_timing_val[i] = data[i];
  2111. priv_info->phy_timing_len = len;
  2112. }
  2113. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  2114. /*
  2115. * For command mode we update the pclk as part of
  2116. * function dsi_panel_calc_dsi_transfer_time( )
  2117. * as we set it based on dsi clock or mdp transfer time.
  2118. */
  2119. pixel_clk_khz = (DSI_H_TOTAL_DSC(&mode->timing) *
  2120. DSI_V_TOTAL(&mode->timing) *
  2121. mode->timing.refresh_rate);
  2122. do_div(pixel_clk_khz, 1000);
  2123. mode->pixel_clk_khz = pixel_clk_khz;
  2124. }
  2125. return rc;
  2126. }
  2127. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2128. struct dsi_parser_utils *utils)
  2129. {
  2130. u32 data;
  2131. int rc = -EINVAL;
  2132. int intf_width;
  2133. const char *compression;
  2134. struct dsi_display_mode_priv_info *priv_info;
  2135. if (!mode || !mode->priv_info)
  2136. return -EINVAL;
  2137. priv_info = mode->priv_info;
  2138. priv_info->dsc_enabled = false;
  2139. compression = utils->get_property(utils->data,
  2140. "qcom,compression-mode", NULL);
  2141. if (compression && !strcmp(compression, "dsc"))
  2142. priv_info->dsc_enabled = true;
  2143. if (!priv_info->dsc_enabled) {
  2144. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2145. return 0;
  2146. }
  2147. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2148. if (rc) {
  2149. priv_info->dsc.version = 0x11;
  2150. rc = 0;
  2151. } else {
  2152. priv_info->dsc.version = data & 0xff;
  2153. /* only support DSC 1.1 rev */
  2154. if (priv_info->dsc.version != 0x11) {
  2155. DSI_ERR("%s: DSC version:%d not supported\n", __func__,
  2156. priv_info->dsc.version);
  2157. rc = -EINVAL;
  2158. goto error;
  2159. }
  2160. }
  2161. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2162. if (rc) {
  2163. priv_info->dsc.scr_rev = 0x0;
  2164. rc = 0;
  2165. } else {
  2166. priv_info->dsc.scr_rev = data & 0xff;
  2167. /* only one scr rev supported */
  2168. if (priv_info->dsc.scr_rev > 0x1) {
  2169. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2170. __func__, priv_info->dsc.scr_rev);
  2171. rc = -EINVAL;
  2172. goto error;
  2173. }
  2174. }
  2175. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2176. if (rc) {
  2177. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2178. goto error;
  2179. }
  2180. priv_info->dsc.slice_height = data;
  2181. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2182. if (rc) {
  2183. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2184. goto error;
  2185. }
  2186. priv_info->dsc.slice_width = data;
  2187. intf_width = mode->timing.h_active;
  2188. if (intf_width % priv_info->dsc.slice_width) {
  2189. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2190. intf_width, priv_info->dsc.slice_width);
  2191. rc = -EINVAL;
  2192. goto error;
  2193. }
  2194. priv_info->dsc.pic_width = mode->timing.h_active;
  2195. priv_info->dsc.pic_height = mode->timing.v_active;
  2196. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2197. if (rc) {
  2198. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2199. goto error;
  2200. } else if (!data || (data > 2)) {
  2201. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2202. goto error;
  2203. }
  2204. priv_info->dsc.slice_per_pkt = data;
  2205. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2206. &data);
  2207. if (rc) {
  2208. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2209. goto error;
  2210. }
  2211. priv_info->dsc.bpc = data;
  2212. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2213. if (rc) {
  2214. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2215. data = 0;
  2216. }
  2217. priv_info->dsc.pps_delay_ms = data;
  2218. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2219. &data);
  2220. if (rc) {
  2221. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2222. goto error;
  2223. }
  2224. priv_info->dsc.bpp = data;
  2225. priv_info->dsc.block_pred_enable = utils->read_bool(utils->data,
  2226. "qcom,mdss-dsc-block-prediction-enable");
  2227. priv_info->dsc.full_frame_slices = DIV_ROUND_UP(intf_width,
  2228. priv_info->dsc.slice_width);
  2229. dsi_dsc_populate_static_param(&priv_info->dsc);
  2230. dsi_dsc_pclk_param_calc(&priv_info->dsc, intf_width);
  2231. mode->timing.dsc_enabled = true;
  2232. mode->timing.dsc = &priv_info->dsc;
  2233. error:
  2234. return rc;
  2235. }
  2236. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2237. {
  2238. int rc = 0;
  2239. struct drm_panel_hdr_properties *hdr_prop;
  2240. struct dsi_parser_utils *utils = &panel->utils;
  2241. hdr_prop = &panel->hdr_props;
  2242. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2243. "qcom,mdss-dsi-panel-hdr-enabled");
  2244. if (hdr_prop->hdr_enabled) {
  2245. rc = utils->read_u32_array(utils->data,
  2246. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2247. hdr_prop->display_primaries,
  2248. DISPLAY_PRIMARIES_MAX);
  2249. if (rc) {
  2250. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2251. __func__, __LINE__, rc);
  2252. hdr_prop->hdr_enabled = false;
  2253. return rc;
  2254. }
  2255. rc = utils->read_u32(utils->data,
  2256. "qcom,mdss-dsi-panel-peak-brightness",
  2257. &(hdr_prop->peak_brightness));
  2258. if (rc) {
  2259. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2260. __func__, __LINE__, rc);
  2261. hdr_prop->hdr_enabled = false;
  2262. return rc;
  2263. }
  2264. rc = utils->read_u32(utils->data,
  2265. "qcom,mdss-dsi-panel-blackness-level",
  2266. &(hdr_prop->blackness_level));
  2267. if (rc) {
  2268. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2269. __func__, __LINE__, rc);
  2270. hdr_prop->hdr_enabled = false;
  2271. return rc;
  2272. }
  2273. }
  2274. return 0;
  2275. }
  2276. static int dsi_panel_parse_topology(
  2277. struct dsi_display_mode_priv_info *priv_info,
  2278. struct dsi_parser_utils *utils,
  2279. int topology_override)
  2280. {
  2281. struct msm_display_topology *topology;
  2282. u32 top_count, top_sel, *array = NULL;
  2283. int i, len = 0;
  2284. int rc = -EINVAL;
  2285. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2286. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2287. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2288. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2289. return rc;
  2290. }
  2291. top_count = len / TOPOLOGY_SET_LEN;
  2292. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2293. if (!array)
  2294. return -ENOMEM;
  2295. rc = utils->read_u32_array(utils->data,
  2296. "qcom,display-topology", array, len);
  2297. if (rc) {
  2298. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2299. goto read_fail;
  2300. }
  2301. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2302. if (!topology) {
  2303. rc = -ENOMEM;
  2304. goto read_fail;
  2305. }
  2306. for (i = 0; i < top_count; i++) {
  2307. struct msm_display_topology *top = &topology[i];
  2308. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2309. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2310. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2311. }
  2312. if (topology_override >= 0 && topology_override < top_count) {
  2313. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2314. topology_override,
  2315. topology[topology_override].num_lm,
  2316. topology[topology_override].num_enc,
  2317. topology[topology_override].num_intf);
  2318. top_sel = topology_override;
  2319. goto parse_done;
  2320. }
  2321. rc = utils->read_u32(utils->data,
  2322. "qcom,default-topology-index", &top_sel);
  2323. if (rc) {
  2324. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2325. goto parse_fail;
  2326. }
  2327. if (top_sel >= top_count) {
  2328. rc = -EINVAL;
  2329. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2330. rc);
  2331. goto parse_fail;
  2332. }
  2333. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2334. topology[top_sel].num_lm,
  2335. topology[top_sel].num_enc,
  2336. topology[top_sel].num_intf);
  2337. parse_done:
  2338. memcpy(&priv_info->topology, &topology[top_sel],
  2339. sizeof(struct msm_display_topology));
  2340. parse_fail:
  2341. kfree(topology);
  2342. read_fail:
  2343. kfree(array);
  2344. return rc;
  2345. }
  2346. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2347. struct msm_roi_alignment *align)
  2348. {
  2349. int len = 0, rc = 0;
  2350. u32 value[6];
  2351. struct property *data;
  2352. if (!align)
  2353. return -EINVAL;
  2354. memset(align, 0, sizeof(*align));
  2355. data = utils->find_property(utils->data,
  2356. "qcom,panel-roi-alignment", &len);
  2357. len /= sizeof(u32);
  2358. if (!data) {
  2359. DSI_ERR("panel roi alignment not found\n");
  2360. rc = -EINVAL;
  2361. } else if (len != 6) {
  2362. DSI_ERR("incorrect roi alignment len %d\n", len);
  2363. rc = -EINVAL;
  2364. } else {
  2365. rc = utils->read_u32_array(utils->data,
  2366. "qcom,panel-roi-alignment", value, len);
  2367. if (rc)
  2368. DSI_DEBUG("error reading panel roi alignment values\n");
  2369. else {
  2370. align->xstart_pix_align = value[0];
  2371. align->ystart_pix_align = value[1];
  2372. align->width_pix_align = value[2];
  2373. align->height_pix_align = value[3];
  2374. align->min_width = value[4];
  2375. align->min_height = value[5];
  2376. }
  2377. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2378. align->xstart_pix_align,
  2379. align->width_pix_align,
  2380. align->ystart_pix_align,
  2381. align->height_pix_align,
  2382. align->min_width,
  2383. align->min_height);
  2384. }
  2385. return rc;
  2386. }
  2387. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2388. struct dsi_parser_utils *utils)
  2389. {
  2390. struct msm_roi_caps *roi_caps = NULL;
  2391. const char *data;
  2392. int rc = 0;
  2393. if (!mode || !mode->priv_info) {
  2394. DSI_ERR("invalid arguments\n");
  2395. return -EINVAL;
  2396. }
  2397. roi_caps = &mode->priv_info->roi_caps;
  2398. memset(roi_caps, 0, sizeof(*roi_caps));
  2399. data = utils->get_property(utils->data,
  2400. "qcom,partial-update-enabled", NULL);
  2401. if (data) {
  2402. if (!strcmp(data, "dual_roi"))
  2403. roi_caps->num_roi = 2;
  2404. else if (!strcmp(data, "single_roi"))
  2405. roi_caps->num_roi = 1;
  2406. else {
  2407. DSI_INFO(
  2408. "invalid value for qcom,partial-update-enabled: %s\n",
  2409. data);
  2410. return 0;
  2411. }
  2412. } else {
  2413. DSI_DEBUG("partial update disabled as the property is not set\n");
  2414. return 0;
  2415. }
  2416. roi_caps->merge_rois = utils->read_bool(utils->data,
  2417. "qcom,partial-update-roi-merge");
  2418. roi_caps->enabled = roi_caps->num_roi > 0;
  2419. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2420. roi_caps->enabled);
  2421. if (roi_caps->enabled)
  2422. rc = dsi_panel_parse_roi_alignment(utils,
  2423. &roi_caps->align);
  2424. if (rc)
  2425. memset(roi_caps, 0, sizeof(*roi_caps));
  2426. return rc;
  2427. }
  2428. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2429. struct dsi_parser_utils *utils)
  2430. {
  2431. bool vid_mode_support, cmd_mode_support;
  2432. if (!mode || !mode->priv_info) {
  2433. DSI_ERR("invalid arguments\n");
  2434. return -EINVAL;
  2435. }
  2436. vid_mode_support = utils->read_bool(utils->data,
  2437. "qcom,mdss-dsi-video-mode");
  2438. cmd_mode_support = utils->read_bool(utils->data,
  2439. "qcom,mdss-dsi-cmd-mode");
  2440. if (cmd_mode_support)
  2441. mode->panel_mode = DSI_OP_CMD_MODE;
  2442. else if (vid_mode_support)
  2443. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2444. else
  2445. return -EINVAL;
  2446. return 0;
  2447. };
  2448. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2449. {
  2450. int dms_enabled;
  2451. const char *data;
  2452. struct dsi_parser_utils *utils = &panel->utils;
  2453. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2454. dms_enabled = utils->read_bool(utils->data,
  2455. "qcom,dynamic-mode-switch-enabled");
  2456. if (!dms_enabled)
  2457. return 0;
  2458. data = utils->get_property(utils->data,
  2459. "qcom,dynamic-mode-switch-type", NULL);
  2460. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2461. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2462. } else {
  2463. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2464. panel->name, data);
  2465. return -EINVAL;
  2466. }
  2467. return 0;
  2468. };
  2469. /*
  2470. * The length of all the valid values to be checked should not be greater
  2471. * than the length of returned data from read command.
  2472. */
  2473. static bool
  2474. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2475. {
  2476. int i;
  2477. struct drm_panel_esd_config *config = &panel->esd_config;
  2478. for (i = 0; i < count; ++i) {
  2479. if (config->status_valid_params[i] >
  2480. config->status_cmds_rlen[i]) {
  2481. DSI_DEBUG("ignore valid params\n");
  2482. return false;
  2483. }
  2484. }
  2485. return true;
  2486. }
  2487. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2488. char *prop_key, u32 **target, u32 cmd_cnt)
  2489. {
  2490. int tmp;
  2491. if (!utils->find_property(utils->data, prop_key, &tmp))
  2492. return false;
  2493. tmp /= sizeof(u32);
  2494. if (tmp != cmd_cnt) {
  2495. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2496. tmp, cmd_cnt);
  2497. return false;
  2498. }
  2499. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2500. if (IS_ERR_OR_NULL(*target)) {
  2501. DSI_ERR("Error allocating memory for property\n");
  2502. return false;
  2503. }
  2504. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2505. DSI_ERR("cannot get values from dts\n");
  2506. kfree(*target);
  2507. *target = NULL;
  2508. return false;
  2509. }
  2510. return true;
  2511. }
  2512. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2513. {
  2514. kfree(esd_config->status_buf);
  2515. kfree(esd_config->return_buf);
  2516. kfree(esd_config->status_value);
  2517. kfree(esd_config->status_valid_params);
  2518. kfree(esd_config->status_cmds_rlen);
  2519. kfree(esd_config->status_cmd.cmds);
  2520. }
  2521. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2522. {
  2523. struct drm_panel_esd_config *esd_config;
  2524. int rc = 0;
  2525. u32 tmp;
  2526. u32 i, status_len, *lenp;
  2527. struct property *data;
  2528. struct dsi_parser_utils *utils = &panel->utils;
  2529. if (!panel) {
  2530. DSI_ERR("Invalid Params\n");
  2531. return -EINVAL;
  2532. }
  2533. esd_config = &panel->esd_config;
  2534. if (!esd_config)
  2535. return -EINVAL;
  2536. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2537. DSI_CMD_SET_PANEL_STATUS, utils);
  2538. if (!esd_config->status_cmd.count) {
  2539. DSI_ERR("panel status command parsing failed\n");
  2540. rc = -EINVAL;
  2541. goto error;
  2542. }
  2543. if (!dsi_panel_parse_esd_status_len(utils,
  2544. "qcom,mdss-dsi-panel-status-read-length",
  2545. &panel->esd_config.status_cmds_rlen,
  2546. esd_config->status_cmd.count)) {
  2547. DSI_ERR("Invalid status read length\n");
  2548. rc = -EINVAL;
  2549. goto error1;
  2550. }
  2551. if (dsi_panel_parse_esd_status_len(utils,
  2552. "qcom,mdss-dsi-panel-status-valid-params",
  2553. &panel->esd_config.status_valid_params,
  2554. esd_config->status_cmd.count)) {
  2555. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2556. esd_config->status_cmd.count)) {
  2557. rc = -EINVAL;
  2558. goto error2;
  2559. }
  2560. }
  2561. status_len = 0;
  2562. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2563. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2564. status_len += lenp[i];
  2565. if (!status_len) {
  2566. rc = -EINVAL;
  2567. goto error2;
  2568. }
  2569. /*
  2570. * Some panel may need multiple read commands to properly
  2571. * check panel status. Do a sanity check for proper status
  2572. * value which will be compared with the value read by dsi
  2573. * controller during ESD check. Also check if multiple read
  2574. * commands are there then, there should be corresponding
  2575. * status check values for each read command.
  2576. */
  2577. data = utils->find_property(utils->data,
  2578. "qcom,mdss-dsi-panel-status-value", &tmp);
  2579. tmp /= sizeof(u32);
  2580. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2581. esd_config->groups = tmp / status_len;
  2582. } else {
  2583. DSI_ERR("error parse panel-status-value\n");
  2584. rc = -EINVAL;
  2585. goto error2;
  2586. }
  2587. esd_config->status_value =
  2588. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2589. GFP_KERNEL);
  2590. if (!esd_config->status_value) {
  2591. rc = -ENOMEM;
  2592. goto error2;
  2593. }
  2594. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2595. sizeof(unsigned char), GFP_KERNEL);
  2596. if (!esd_config->return_buf) {
  2597. rc = -ENOMEM;
  2598. goto error3;
  2599. }
  2600. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2601. if (!esd_config->status_buf) {
  2602. rc = -ENOMEM;
  2603. goto error4;
  2604. }
  2605. rc = utils->read_u32_array(utils->data,
  2606. "qcom,mdss-dsi-panel-status-value",
  2607. esd_config->status_value, esd_config->groups * status_len);
  2608. if (rc) {
  2609. DSI_DEBUG("error reading panel status values\n");
  2610. memset(esd_config->status_value, 0,
  2611. esd_config->groups * status_len);
  2612. }
  2613. return 0;
  2614. error4:
  2615. kfree(esd_config->return_buf);
  2616. error3:
  2617. kfree(esd_config->status_value);
  2618. error2:
  2619. kfree(esd_config->status_valid_params);
  2620. kfree(esd_config->status_cmds_rlen);
  2621. error1:
  2622. kfree(esd_config->status_cmd.cmds);
  2623. error:
  2624. return rc;
  2625. }
  2626. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2627. {
  2628. int rc = 0;
  2629. const char *string;
  2630. struct drm_panel_esd_config *esd_config;
  2631. struct dsi_parser_utils *utils = &panel->utils;
  2632. u8 *esd_mode = NULL;
  2633. esd_config = &panel->esd_config;
  2634. esd_config->status_mode = ESD_MODE_MAX;
  2635. esd_config->esd_enabled = utils->read_bool(utils->data,
  2636. "qcom,esd-check-enabled");
  2637. if (!esd_config->esd_enabled)
  2638. return 0;
  2639. rc = utils->read_string(utils->data,
  2640. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2641. if (!rc) {
  2642. if (!strcmp(string, "bta_check")) {
  2643. esd_config->status_mode = ESD_MODE_SW_BTA;
  2644. } else if (!strcmp(string, "reg_read")) {
  2645. esd_config->status_mode = ESD_MODE_REG_READ;
  2646. } else if (!strcmp(string, "te_signal_check")) {
  2647. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2648. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2649. } else {
  2650. DSI_ERR("TE-ESD not valid for video mode\n");
  2651. rc = -EINVAL;
  2652. goto error;
  2653. }
  2654. } else {
  2655. DSI_ERR("No valid panel-status-check-mode string\n");
  2656. rc = -EINVAL;
  2657. goto error;
  2658. }
  2659. } else {
  2660. DSI_DEBUG("status check method not defined!\n");
  2661. rc = -EINVAL;
  2662. goto error;
  2663. }
  2664. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2665. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2666. if (rc) {
  2667. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2668. rc);
  2669. goto error;
  2670. }
  2671. esd_mode = "register_read";
  2672. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2673. esd_mode = "bta_trigger";
  2674. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2675. esd_mode = "te_check";
  2676. }
  2677. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2678. return 0;
  2679. error:
  2680. panel->esd_config.esd_enabled = false;
  2681. return rc;
  2682. }
  2683. static void dsi_panel_update_util(struct dsi_panel *panel,
  2684. struct device_node *parser_node)
  2685. {
  2686. struct dsi_parser_utils *utils = &panel->utils;
  2687. if (parser_node) {
  2688. *utils = *dsi_parser_get_parser_utils();
  2689. utils->data = parser_node;
  2690. DSI_DEBUG("switching to parser APIs\n");
  2691. goto end;
  2692. }
  2693. *utils = *dsi_parser_get_of_utils();
  2694. utils->data = panel->panel_of_node;
  2695. end:
  2696. utils->node = panel->panel_of_node;
  2697. }
  2698. struct dsi_panel *dsi_panel_get(struct device *parent,
  2699. struct device_node *of_node,
  2700. struct device_node *parser_node,
  2701. const char *type,
  2702. int topology_override)
  2703. {
  2704. struct dsi_panel *panel;
  2705. struct dsi_parser_utils *utils;
  2706. const char *panel_physical_type;
  2707. int rc = 0;
  2708. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2709. if (!panel)
  2710. return ERR_PTR(-ENOMEM);
  2711. panel->panel_of_node = of_node;
  2712. panel->parent = parent;
  2713. panel->type = type;
  2714. dsi_panel_update_util(panel, parser_node);
  2715. utils = &panel->utils;
  2716. panel->name = utils->get_property(utils->data,
  2717. "qcom,mdss-dsi-panel-name", NULL);
  2718. if (!panel->name)
  2719. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2720. /*
  2721. * Set panel type to LCD as default.
  2722. */
  2723. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2724. panel_physical_type = utils->get_property(utils->data,
  2725. "qcom,mdss-dsi-panel-physical-type", NULL);
  2726. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2727. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2728. rc = dsi_panel_parse_host_config(panel);
  2729. if (rc) {
  2730. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2731. rc);
  2732. goto error;
  2733. }
  2734. rc = dsi_panel_parse_panel_mode(panel);
  2735. if (rc) {
  2736. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2737. rc);
  2738. goto error;
  2739. }
  2740. rc = dsi_panel_parse_dfps_caps(panel);
  2741. if (rc)
  2742. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2743. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2744. if (rc)
  2745. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2746. /* allow qsync support only if DFPS is with VFP approach */
  2747. if ((panel->dfps_caps.dfps_support) &&
  2748. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  2749. panel->qsync_min_fps = 0;
  2750. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2751. if (rc)
  2752. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2753. rc = dsi_panel_parse_phy_props(panel);
  2754. if (rc) {
  2755. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2756. rc);
  2757. goto error;
  2758. }
  2759. rc = dsi_panel_parse_gpios(panel);
  2760. if (rc) {
  2761. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2762. goto error;
  2763. }
  2764. rc = dsi_panel_parse_power_cfg(panel);
  2765. if (rc)
  2766. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2767. rc = dsi_panel_parse_bl_config(panel);
  2768. if (rc) {
  2769. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2770. if (rc == -EPROBE_DEFER)
  2771. goto error;
  2772. }
  2773. rc = dsi_panel_parse_misc_features(panel);
  2774. if (rc)
  2775. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2776. rc = dsi_panel_parse_hdr_config(panel);
  2777. if (rc)
  2778. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2779. rc = dsi_panel_get_mode_count(panel);
  2780. if (rc) {
  2781. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2782. goto error;
  2783. }
  2784. rc = dsi_panel_parse_dms_info(panel);
  2785. if (rc)
  2786. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2787. rc = dsi_panel_parse_esd_config(panel);
  2788. if (rc)
  2789. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  2790. panel->power_mode = SDE_MODE_DPMS_OFF;
  2791. drm_panel_init(&panel->drm_panel);
  2792. panel->drm_panel.dev = &panel->mipi_device.dev;
  2793. panel->mipi_device.dev.of_node = of_node;
  2794. rc = drm_panel_add(&panel->drm_panel);
  2795. if (rc)
  2796. goto error;
  2797. mutex_init(&panel->panel_lock);
  2798. return panel;
  2799. error:
  2800. kfree(panel);
  2801. return ERR_PTR(rc);
  2802. }
  2803. void dsi_panel_put(struct dsi_panel *panel)
  2804. {
  2805. drm_panel_remove(&panel->drm_panel);
  2806. /* free resources allocated for ESD check */
  2807. dsi_panel_esd_config_deinit(&panel->esd_config);
  2808. kfree(panel);
  2809. }
  2810. int dsi_panel_drv_init(struct dsi_panel *panel,
  2811. struct mipi_dsi_host *host)
  2812. {
  2813. int rc = 0;
  2814. struct mipi_dsi_device *dev;
  2815. if (!panel || !host) {
  2816. DSI_ERR("invalid params\n");
  2817. return -EINVAL;
  2818. }
  2819. mutex_lock(&panel->panel_lock);
  2820. dev = &panel->mipi_device;
  2821. dev->host = host;
  2822. /*
  2823. * We dont have device structure since panel is not a device node.
  2824. * When using drm panel framework, the device is probed when the host is
  2825. * create.
  2826. */
  2827. dev->channel = 0;
  2828. dev->lanes = 4;
  2829. panel->host = host;
  2830. rc = dsi_panel_vreg_get(panel);
  2831. if (rc) {
  2832. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  2833. panel->name, rc);
  2834. goto exit;
  2835. }
  2836. rc = dsi_panel_pinctrl_init(panel);
  2837. if (rc) {
  2838. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  2839. panel->name, rc);
  2840. goto error_vreg_put;
  2841. }
  2842. rc = dsi_panel_gpio_request(panel);
  2843. if (rc) {
  2844. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  2845. rc);
  2846. goto error_pinctrl_deinit;
  2847. }
  2848. rc = dsi_panel_bl_register(panel);
  2849. if (rc) {
  2850. if (rc != -EPROBE_DEFER)
  2851. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  2852. panel->name, rc);
  2853. goto error_gpio_release;
  2854. }
  2855. goto exit;
  2856. error_gpio_release:
  2857. (void)dsi_panel_gpio_release(panel);
  2858. error_pinctrl_deinit:
  2859. (void)dsi_panel_pinctrl_deinit(panel);
  2860. error_vreg_put:
  2861. (void)dsi_panel_vreg_put(panel);
  2862. exit:
  2863. mutex_unlock(&panel->panel_lock);
  2864. return rc;
  2865. }
  2866. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2867. {
  2868. int rc = 0;
  2869. if (!panel) {
  2870. DSI_ERR("invalid params\n");
  2871. return -EINVAL;
  2872. }
  2873. mutex_lock(&panel->panel_lock);
  2874. rc = dsi_panel_bl_unregister(panel);
  2875. if (rc)
  2876. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  2877. panel->name, rc);
  2878. rc = dsi_panel_gpio_release(panel);
  2879. if (rc)
  2880. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  2881. rc);
  2882. rc = dsi_panel_pinctrl_deinit(panel);
  2883. if (rc)
  2884. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2885. rc);
  2886. rc = dsi_panel_vreg_put(panel);
  2887. if (rc)
  2888. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2889. panel->host = NULL;
  2890. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2891. mutex_unlock(&panel->panel_lock);
  2892. return rc;
  2893. }
  2894. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2895. struct dsi_display_mode *mode)
  2896. {
  2897. return 0;
  2898. }
  2899. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2900. {
  2901. const u32 SINGLE_MODE_SUPPORT = 1;
  2902. struct dsi_parser_utils *utils;
  2903. struct device_node *timings_np, *child_np;
  2904. int num_dfps_rates, num_bit_clks;
  2905. int num_video_modes = 0, num_cmd_modes = 0;
  2906. int count, rc = 0;
  2907. void *utils_data = NULL;
  2908. if (!panel) {
  2909. DSI_ERR("invalid params\n");
  2910. return -EINVAL;
  2911. }
  2912. utils = &panel->utils;
  2913. panel->num_timing_nodes = 0;
  2914. timings_np = utils->get_child_by_name(utils->data,
  2915. "qcom,mdss-dsi-display-timings");
  2916. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2917. DSI_ERR("no display timing nodes defined\n");
  2918. rc = -EINVAL;
  2919. goto error;
  2920. }
  2921. count = utils->get_child_count(timings_np);
  2922. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2923. count > DSI_MODE_MAX) {
  2924. DSI_ERR("invalid count of timing nodes: %d\n", count);
  2925. rc = -EINVAL;
  2926. goto error;
  2927. }
  2928. /* No multiresolution support is available for video mode panels.
  2929. * Multi-mode is supported for video mode during POMS is enabled.
  2930. */
  2931. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  2932. !panel->host_config.ext_bridge_mode &&
  2933. !panel->panel_mode_switch_enabled)
  2934. count = SINGLE_MODE_SUPPORT;
  2935. panel->num_timing_nodes = count;
  2936. dsi_for_each_child_node(timings_np, child_np) {
  2937. utils_data = child_np;
  2938. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2939. num_video_modes++;
  2940. else if (utils->read_bool(utils->data,
  2941. "qcom,mdss-dsi-cmd-mode"))
  2942. num_cmd_modes++;
  2943. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  2944. num_video_modes++;
  2945. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  2946. num_cmd_modes++;
  2947. }
  2948. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  2949. panel->dfps_caps.dfps_list_len;
  2950. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  2951. panel->dyn_clk_caps.bit_clk_list_len;
  2952. /* Inflate num_of_modes by fps and bit clks in dfps */
  2953. panel->num_display_modes = (num_cmd_modes * num_bit_clks) +
  2954. (num_video_modes * num_bit_clks * num_dfps_rates);
  2955. error:
  2956. return rc;
  2957. }
  2958. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  2959. struct dsi_panel_phy_props *phy_props)
  2960. {
  2961. int rc = 0;
  2962. if (!panel || !phy_props) {
  2963. DSI_ERR("invalid params\n");
  2964. return -EINVAL;
  2965. }
  2966. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  2967. return rc;
  2968. }
  2969. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  2970. struct dsi_dfps_capabilities *dfps_caps)
  2971. {
  2972. int rc = 0;
  2973. if (!panel || !dfps_caps) {
  2974. DSI_ERR("invalid params\n");
  2975. return -EINVAL;
  2976. }
  2977. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  2978. return rc;
  2979. }
  2980. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  2981. {
  2982. int i;
  2983. if (!mode->priv_info)
  2984. return;
  2985. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  2986. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2987. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2988. }
  2989. kfree(mode->priv_info);
  2990. }
  2991. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  2992. struct dsi_display_mode *mode, u32 frame_threshold_us)
  2993. {
  2994. u32 frame_time_us,nslices;
  2995. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  2996. dsi_transfer_time_us, pixel_clk_khz;
  2997. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  2998. struct dsi_mode_info *timing = &mode->timing;
  2999. struct dsi_display_mode *display_mode;
  3000. u32 jitter_numer, jitter_denom, prefill_lines;
  3001. u32 min_threshold_us, prefill_time_us;
  3002. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  3003. * + 1 byte dcs data command.
  3004. */
  3005. const u32 packet_overhead = 56;
  3006. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3007. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3008. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3009. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3010. if (timing->dsc_enabled) {
  3011. nslices = (timing->h_active)/(dsc->slice_width);
  3012. /* (slice width x bit-per-pixel + packet overhead) x
  3013. * number of slices x height x fps / lane
  3014. */
  3015. bits_per_line = ((dsc->slice_width * dsc->bpp) +
  3016. packet_overhead) * nslices;
  3017. bits_per_line = bits_per_line / (config->num_data_lanes);
  3018. min_bitclk_hz = (bits_per_line * timing->v_active *
  3019. timing->refresh_rate);
  3020. } else {
  3021. total_active_pixels = ((DSI_H_ACTIVE_DSC(timing)
  3022. * timing->v_active));
  3023. /* calculate the actual bitclk needed to transfer the frame */
  3024. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3025. (config->bpp));
  3026. do_div(min_bitclk_hz, config->num_data_lanes);
  3027. }
  3028. timing->min_dsi_clk_hz = min_bitclk_hz;
  3029. if (timing->clk_rate_hz) {
  3030. /* adjust the transfer time proportionately for bit clk*/
  3031. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3032. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3033. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3034. } else if (mode->priv_info->mdp_transfer_time_us) {
  3035. timing->dsi_transfer_time_us =
  3036. mode->priv_info->mdp_transfer_time_us;
  3037. } else {
  3038. min_threshold_us = mult_frac(frame_time_us,
  3039. jitter_numer, (jitter_denom * 100));
  3040. /*
  3041. * Increase the prefill_lines proportionately as recommended
  3042. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3043. */
  3044. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3045. timing->refresh_rate, 60);
  3046. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3047. (timing->v_active));
  3048. /*
  3049. * Threshold is sum of panel jitter time, prefill line time
  3050. * plus 100usec buffer time.
  3051. */
  3052. min_threshold_us = min_threshold_us + 100 + prefill_time_us;
  3053. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3054. if (min_threshold_us > frame_threshold_us)
  3055. frame_threshold_us = min_threshold_us;
  3056. timing->dsi_transfer_time_us = frame_time_us -
  3057. frame_threshold_us;
  3058. }
  3059. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3060. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3061. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3062. timing->mdp_transfer_time_us =
  3063. mode->priv_info->mdp_transfer_time_us;
  3064. }
  3065. /* Calculate pclk_khz to update modeinfo */
  3066. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3067. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3068. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3069. do_div(pixel_clk_khz, config->bpp);
  3070. display_mode->pixel_clk_khz = pixel_clk_khz;
  3071. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3072. }
  3073. int dsi_panel_get_mode(struct dsi_panel *panel,
  3074. u32 index, struct dsi_display_mode *mode,
  3075. int topology_override)
  3076. {
  3077. struct device_node *timings_np, *child_np;
  3078. struct dsi_parser_utils *utils;
  3079. struct dsi_display_mode_priv_info *prv_info;
  3080. u32 child_idx = 0;
  3081. int rc = 0, num_timings;
  3082. void *utils_data = NULL;
  3083. if (!panel || !mode) {
  3084. DSI_ERR("invalid params\n");
  3085. return -EINVAL;
  3086. }
  3087. mutex_lock(&panel->panel_lock);
  3088. utils = &panel->utils;
  3089. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3090. if (!mode->priv_info) {
  3091. rc = -ENOMEM;
  3092. goto done;
  3093. }
  3094. prv_info = mode->priv_info;
  3095. timings_np = utils->get_child_by_name(utils->data,
  3096. "qcom,mdss-dsi-display-timings");
  3097. if (!timings_np) {
  3098. DSI_ERR("no display timing nodes defined\n");
  3099. rc = -EINVAL;
  3100. goto parse_fail;
  3101. }
  3102. num_timings = utils->get_child_count(timings_np);
  3103. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3104. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3105. rc = -EINVAL;
  3106. goto parse_fail;
  3107. }
  3108. utils_data = utils->data;
  3109. dsi_for_each_child_node(timings_np, child_np) {
  3110. if (index != child_idx++)
  3111. continue;
  3112. utils->data = child_np;
  3113. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3114. if (rc) {
  3115. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3116. goto parse_fail;
  3117. }
  3118. rc = dsi_panel_parse_dsc_params(mode, utils);
  3119. if (rc) {
  3120. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3121. goto parse_fail;
  3122. }
  3123. rc = dsi_panel_parse_topology(prv_info, utils,
  3124. topology_override);
  3125. if (rc) {
  3126. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3127. goto parse_fail;
  3128. }
  3129. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3130. if (rc) {
  3131. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3132. goto parse_fail;
  3133. }
  3134. rc = dsi_panel_parse_jitter_config(mode, utils);
  3135. if (rc)
  3136. DSI_ERR(
  3137. "failed to parse panel jitter config, rc=%d\n", rc);
  3138. rc = dsi_panel_parse_phy_timing(mode, utils);
  3139. if (rc) {
  3140. DSI_ERR(
  3141. "failed to parse panel phy timings, rc=%d\n", rc);
  3142. goto parse_fail;
  3143. }
  3144. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3145. if (rc)
  3146. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3147. if (panel->panel_mode_switch_enabled) {
  3148. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3149. if (rc) {
  3150. DSI_ERR("PMS: failed to parse panel mode\n");
  3151. rc = 0;
  3152. mode->panel_mode = panel->panel_mode;
  3153. }
  3154. } else {
  3155. mode->panel_mode = panel->panel_mode;
  3156. }
  3157. }
  3158. goto done;
  3159. parse_fail:
  3160. kfree(mode->priv_info);
  3161. mode->priv_info = NULL;
  3162. done:
  3163. utils->data = utils_data;
  3164. mutex_unlock(&panel->panel_lock);
  3165. return rc;
  3166. }
  3167. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3168. struct dsi_display_mode *mode,
  3169. struct dsi_host_config *config)
  3170. {
  3171. int rc = 0;
  3172. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3173. if (!panel || !mode || !config) {
  3174. DSI_ERR("invalid params\n");
  3175. return -EINVAL;
  3176. }
  3177. mutex_lock(&panel->panel_lock);
  3178. config->panel_mode = panel->panel_mode;
  3179. memcpy(&config->common_config, &panel->host_config,
  3180. sizeof(config->common_config));
  3181. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3182. memcpy(&config->u.video_engine, &panel->video_config,
  3183. sizeof(config->u.video_engine));
  3184. } else {
  3185. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3186. sizeof(config->u.cmd_engine));
  3187. }
  3188. memcpy(&config->video_timing, &mode->timing,
  3189. sizeof(config->video_timing));
  3190. config->video_timing.mdp_transfer_time_us =
  3191. mode->priv_info->mdp_transfer_time_us;
  3192. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3193. config->video_timing.dsc = &mode->priv_info->dsc;
  3194. if (dyn_clk_caps->dyn_clk_support)
  3195. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3196. else
  3197. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3198. config->esc_clk_rate_hz = 19200000;
  3199. mutex_unlock(&panel->panel_lock);
  3200. return rc;
  3201. }
  3202. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3203. {
  3204. int rc = 0;
  3205. if (!panel) {
  3206. DSI_ERR("invalid params\n");
  3207. return -EINVAL;
  3208. }
  3209. mutex_lock(&panel->panel_lock);
  3210. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3211. if (panel->lp11_init)
  3212. goto error;
  3213. rc = dsi_panel_power_on(panel);
  3214. if (rc) {
  3215. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3216. goto error;
  3217. }
  3218. error:
  3219. mutex_unlock(&panel->panel_lock);
  3220. return rc;
  3221. }
  3222. int dsi_panel_update_pps(struct dsi_panel *panel)
  3223. {
  3224. int rc = 0;
  3225. struct dsi_panel_cmd_set *set = NULL;
  3226. struct dsi_display_mode_priv_info *priv_info = NULL;
  3227. if (!panel || !panel->cur_mode) {
  3228. DSI_ERR("invalid params\n");
  3229. return -EINVAL;
  3230. }
  3231. mutex_lock(&panel->panel_lock);
  3232. priv_info = panel->cur_mode->priv_info;
  3233. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3234. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc, panel->dsc_pps_cmd, 0);
  3235. rc = dsi_panel_create_cmd_packets(panel->dsc_pps_cmd,
  3236. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3237. if (rc) {
  3238. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3239. goto error;
  3240. }
  3241. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3242. if (rc) {
  3243. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3244. panel->name, rc);
  3245. }
  3246. dsi_panel_destroy_cmd_packets(set);
  3247. error:
  3248. mutex_unlock(&panel->panel_lock);
  3249. return rc;
  3250. }
  3251. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3252. {
  3253. int rc = 0;
  3254. if (!panel) {
  3255. DSI_ERR("invalid params\n");
  3256. return -EINVAL;
  3257. }
  3258. mutex_lock(&panel->panel_lock);
  3259. if (!panel->panel_initialized)
  3260. goto exit;
  3261. /*
  3262. * Consider LP1->LP2->LP1.
  3263. * If the panel is already in LP mode, do not need to
  3264. * set the regulator.
  3265. * IBB and AB power mode would be set at the same time
  3266. * in PMIC driver, so we only call ibb setting that is enough.
  3267. */
  3268. if (dsi_panel_is_type_oled(panel) &&
  3269. panel->power_mode != SDE_MODE_DPMS_LP2)
  3270. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3271. "ibb", REGULATOR_MODE_IDLE);
  3272. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3273. if (rc)
  3274. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3275. panel->name, rc);
  3276. exit:
  3277. mutex_unlock(&panel->panel_lock);
  3278. return rc;
  3279. }
  3280. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3281. {
  3282. int rc = 0;
  3283. if (!panel) {
  3284. DSI_ERR("invalid params\n");
  3285. return -EINVAL;
  3286. }
  3287. mutex_lock(&panel->panel_lock);
  3288. if (!panel->panel_initialized)
  3289. goto exit;
  3290. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3291. if (rc)
  3292. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3293. panel->name, rc);
  3294. exit:
  3295. mutex_unlock(&panel->panel_lock);
  3296. return rc;
  3297. }
  3298. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3299. {
  3300. int rc = 0;
  3301. if (!panel) {
  3302. DSI_ERR("invalid params\n");
  3303. return -EINVAL;
  3304. }
  3305. mutex_lock(&panel->panel_lock);
  3306. if (!panel->panel_initialized)
  3307. goto exit;
  3308. /*
  3309. * Consider about LP1->LP2->NOLP.
  3310. */
  3311. if (dsi_panel_is_type_oled(panel) &&
  3312. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3313. panel->power_mode == SDE_MODE_DPMS_LP2))
  3314. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3315. "ibb", REGULATOR_MODE_NORMAL);
  3316. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3317. if (rc)
  3318. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3319. panel->name, rc);
  3320. exit:
  3321. mutex_unlock(&panel->panel_lock);
  3322. return rc;
  3323. }
  3324. int dsi_panel_prepare(struct dsi_panel *panel)
  3325. {
  3326. int rc = 0;
  3327. if (!panel) {
  3328. DSI_ERR("invalid params\n");
  3329. return -EINVAL;
  3330. }
  3331. mutex_lock(&panel->panel_lock);
  3332. if (panel->lp11_init) {
  3333. rc = dsi_panel_power_on(panel);
  3334. if (rc) {
  3335. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3336. panel->name, rc);
  3337. goto error;
  3338. }
  3339. }
  3340. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3341. if (rc) {
  3342. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3343. panel->name, rc);
  3344. goto error;
  3345. }
  3346. error:
  3347. mutex_unlock(&panel->panel_lock);
  3348. return rc;
  3349. }
  3350. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3351. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3352. {
  3353. static const int ROI_CMD_LEN = 5;
  3354. int rc = 0;
  3355. /* DTYPE_DCS_LWRITE */
  3356. char *caset, *paset;
  3357. set->cmds = NULL;
  3358. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3359. if (!caset) {
  3360. rc = -ENOMEM;
  3361. goto exit;
  3362. }
  3363. caset[0] = 0x2a;
  3364. caset[1] = (roi->x & 0xFF00) >> 8;
  3365. caset[2] = roi->x & 0xFF;
  3366. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3367. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3368. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3369. if (!paset) {
  3370. rc = -ENOMEM;
  3371. goto error_free_mem;
  3372. }
  3373. paset[0] = 0x2b;
  3374. paset[1] = (roi->y & 0xFF00) >> 8;
  3375. paset[2] = roi->y & 0xFF;
  3376. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3377. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3378. set->type = DSI_CMD_SET_ROI;
  3379. set->state = DSI_CMD_SET_STATE_LP;
  3380. set->count = 2; /* send caset + paset together */
  3381. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3382. if (!set->cmds) {
  3383. rc = -ENOMEM;
  3384. goto error_free_mem;
  3385. }
  3386. set->cmds[0].msg.channel = 0;
  3387. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3388. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3389. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3390. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3391. set->cmds[0].msg.tx_buf = caset;
  3392. set->cmds[0].msg.rx_len = 0;
  3393. set->cmds[0].msg.rx_buf = 0;
  3394. set->cmds[0].msg.wait_ms = 0;
  3395. set->cmds[0].last_command = 0;
  3396. set->cmds[0].post_wait_ms = 0;
  3397. set->cmds[1].msg.channel = 0;
  3398. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3399. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3400. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3401. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3402. set->cmds[1].msg.tx_buf = paset;
  3403. set->cmds[1].msg.rx_len = 0;
  3404. set->cmds[1].msg.rx_buf = 0;
  3405. set->cmds[1].msg.wait_ms = 0;
  3406. set->cmds[1].last_command = 1;
  3407. set->cmds[1].post_wait_ms = 0;
  3408. goto exit;
  3409. error_free_mem:
  3410. kfree(caset);
  3411. kfree(paset);
  3412. kfree(set->cmds);
  3413. exit:
  3414. return rc;
  3415. }
  3416. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3417. int ctrl_idx)
  3418. {
  3419. int rc = 0;
  3420. if (!panel) {
  3421. DSI_ERR("invalid params\n");
  3422. return -EINVAL;
  3423. }
  3424. mutex_lock(&panel->panel_lock);
  3425. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3426. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3427. if (rc)
  3428. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3429. panel->name, rc);
  3430. mutex_unlock(&panel->panel_lock);
  3431. return rc;
  3432. }
  3433. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3434. int ctrl_idx)
  3435. {
  3436. int rc = 0;
  3437. if (!panel) {
  3438. DSI_ERR("invalid params\n");
  3439. return -EINVAL;
  3440. }
  3441. mutex_lock(&panel->panel_lock);
  3442. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3443. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3444. if (rc)
  3445. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3446. panel->name, rc);
  3447. mutex_unlock(&panel->panel_lock);
  3448. return rc;
  3449. }
  3450. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3451. struct dsi_rect *roi)
  3452. {
  3453. int rc = 0;
  3454. struct dsi_panel_cmd_set *set;
  3455. struct dsi_display_mode_priv_info *priv_info;
  3456. if (!panel || !panel->cur_mode) {
  3457. DSI_ERR("Invalid params\n");
  3458. return -EINVAL;
  3459. }
  3460. priv_info = panel->cur_mode->priv_info;
  3461. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3462. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3463. if (rc) {
  3464. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3465. panel->name, rc);
  3466. return rc;
  3467. }
  3468. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3469. roi->x, roi->y, roi->w, roi->h);
  3470. mutex_lock(&panel->panel_lock);
  3471. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3472. if (rc)
  3473. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3474. panel->name, rc);
  3475. mutex_unlock(&panel->panel_lock);
  3476. dsi_panel_destroy_cmd_packets(set);
  3477. dsi_panel_dealloc_cmd_packets(set);
  3478. return rc;
  3479. }
  3480. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3481. {
  3482. int rc = 0;
  3483. if (!panel) {
  3484. DSI_ERR("Invalid params\n");
  3485. return -EINVAL;
  3486. }
  3487. mutex_lock(&panel->panel_lock);
  3488. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3489. if (rc)
  3490. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3491. panel->name, rc);
  3492. mutex_unlock(&panel->panel_lock);
  3493. return rc;
  3494. }
  3495. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3496. {
  3497. int rc = 0;
  3498. if (!panel) {
  3499. DSI_ERR("Invalid params\n");
  3500. return -EINVAL;
  3501. }
  3502. mutex_lock(&panel->panel_lock);
  3503. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3504. if (rc)
  3505. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3506. panel->name, rc);
  3507. mutex_unlock(&panel->panel_lock);
  3508. return rc;
  3509. }
  3510. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3511. {
  3512. int rc = 0;
  3513. if (!panel) {
  3514. DSI_ERR("Invalid params\n");
  3515. return -EINVAL;
  3516. }
  3517. mutex_lock(&panel->panel_lock);
  3518. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3519. if (rc)
  3520. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3521. panel->name, rc);
  3522. mutex_unlock(&panel->panel_lock);
  3523. return rc;
  3524. }
  3525. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3526. {
  3527. int rc = 0;
  3528. if (!panel) {
  3529. DSI_ERR("Invalid params\n");
  3530. return -EINVAL;
  3531. }
  3532. mutex_lock(&panel->panel_lock);
  3533. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3534. if (rc)
  3535. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3536. panel->name, rc);
  3537. mutex_unlock(&panel->panel_lock);
  3538. return rc;
  3539. }
  3540. int dsi_panel_switch(struct dsi_panel *panel)
  3541. {
  3542. int rc = 0;
  3543. if (!panel) {
  3544. DSI_ERR("Invalid params\n");
  3545. return -EINVAL;
  3546. }
  3547. mutex_lock(&panel->panel_lock);
  3548. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3549. if (rc)
  3550. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3551. panel->name, rc);
  3552. mutex_unlock(&panel->panel_lock);
  3553. return rc;
  3554. }
  3555. int dsi_panel_post_switch(struct dsi_panel *panel)
  3556. {
  3557. int rc = 0;
  3558. if (!panel) {
  3559. DSI_ERR("Invalid params\n");
  3560. return -EINVAL;
  3561. }
  3562. mutex_lock(&panel->panel_lock);
  3563. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3564. if (rc)
  3565. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3566. panel->name, rc);
  3567. mutex_unlock(&panel->panel_lock);
  3568. return rc;
  3569. }
  3570. int dsi_panel_enable(struct dsi_panel *panel)
  3571. {
  3572. int rc = 0;
  3573. if (!panel) {
  3574. DSI_ERR("Invalid params\n");
  3575. return -EINVAL;
  3576. }
  3577. mutex_lock(&panel->panel_lock);
  3578. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3579. if (rc)
  3580. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3581. panel->name, rc);
  3582. else
  3583. panel->panel_initialized = true;
  3584. mutex_unlock(&panel->panel_lock);
  3585. return rc;
  3586. }
  3587. int dsi_panel_post_enable(struct dsi_panel *panel)
  3588. {
  3589. int rc = 0;
  3590. if (!panel) {
  3591. DSI_ERR("invalid params\n");
  3592. return -EINVAL;
  3593. }
  3594. mutex_lock(&panel->panel_lock);
  3595. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3596. if (rc) {
  3597. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3598. panel->name, rc);
  3599. goto error;
  3600. }
  3601. error:
  3602. mutex_unlock(&panel->panel_lock);
  3603. return rc;
  3604. }
  3605. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3606. {
  3607. int rc = 0;
  3608. if (!panel) {
  3609. DSI_ERR("invalid params\n");
  3610. return -EINVAL;
  3611. }
  3612. mutex_lock(&panel->panel_lock);
  3613. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3614. if (rc) {
  3615. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3616. panel->name, rc);
  3617. goto error;
  3618. }
  3619. error:
  3620. mutex_unlock(&panel->panel_lock);
  3621. return rc;
  3622. }
  3623. int dsi_panel_disable(struct dsi_panel *panel)
  3624. {
  3625. int rc = 0;
  3626. if (!panel) {
  3627. DSI_ERR("invalid params\n");
  3628. return -EINVAL;
  3629. }
  3630. mutex_lock(&panel->panel_lock);
  3631. /* Avoid sending panel off commands when ESD recovery is underway */
  3632. if (!atomic_read(&panel->esd_recovery_pending)) {
  3633. /*
  3634. * Need to set IBB/AB regulator mode to STANDBY,
  3635. * if panel is going off from AOD mode.
  3636. */
  3637. if (dsi_panel_is_type_oled(panel) &&
  3638. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3639. panel->power_mode == SDE_MODE_DPMS_LP2))
  3640. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3641. "ibb", REGULATOR_MODE_STANDBY);
  3642. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3643. if (rc) {
  3644. /*
  3645. * Sending panel off commands may fail when DSI
  3646. * controller is in a bad state. These failures can be
  3647. * ignored since controller will go for full reset on
  3648. * subsequent display enable anyway.
  3649. */
  3650. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3651. panel->name, rc);
  3652. rc = 0;
  3653. }
  3654. }
  3655. panel->panel_initialized = false;
  3656. panel->power_mode = SDE_MODE_DPMS_OFF;
  3657. mutex_unlock(&panel->panel_lock);
  3658. return rc;
  3659. }
  3660. int dsi_panel_unprepare(struct dsi_panel *panel)
  3661. {
  3662. int rc = 0;
  3663. if (!panel) {
  3664. DSI_ERR("invalid params\n");
  3665. return -EINVAL;
  3666. }
  3667. mutex_lock(&panel->panel_lock);
  3668. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3669. if (rc) {
  3670. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3671. panel->name, rc);
  3672. goto error;
  3673. }
  3674. error:
  3675. mutex_unlock(&panel->panel_lock);
  3676. return rc;
  3677. }
  3678. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3679. {
  3680. int rc = 0;
  3681. if (!panel) {
  3682. DSI_ERR("invalid params\n");
  3683. return -EINVAL;
  3684. }
  3685. mutex_lock(&panel->panel_lock);
  3686. rc = dsi_panel_power_off(panel);
  3687. if (rc) {
  3688. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3689. panel->name, rc);
  3690. goto error;
  3691. }
  3692. error:
  3693. mutex_unlock(&panel->panel_lock);
  3694. return rc;
  3695. }