sm6150.c 234 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/gpio.h>
  16. #include <linux/of_gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/slab.h>
  19. #include <linux/io.h>
  20. #include <linux/module.h>
  21. #include <linux/input.h>
  22. #include <linux/of_device.h>
  23. #include <linux/pm_qos.h>
  24. #include <sound/core.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/pcm.h>
  28. #include <sound/pcm_params.h>
  29. #include <sound/info.h>
  30. #include <dsp/audio_notifier.h>
  31. #include <dsp/q6afe-v2.h>
  32. #include <dsp/q6core.h>
  33. #include "device_event.h"
  34. #include "msm-pcm-routing-v2.h"
  35. #include "codecs/msm-cdc-pinctrl.h"
  36. #include "codecs/wcd934x/wcd934x.h"
  37. #include "codecs/wcd934x/wcd934x-mbhc.h"
  38. #include "codecs/wsa881x.h"
  39. #include "codecs/bolero/bolero-cdc.h"
  40. #include <dt-bindings/sound/audio-codec-port-types.h>
  41. #define DRV_NAME "sm6150-asoc-snd"
  42. #define __CHIPSET__ "SM6150 "
  43. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  44. #define SAMPLING_RATE_8KHZ 8000
  45. #define SAMPLING_RATE_11P025KHZ 11025
  46. #define SAMPLING_RATE_16KHZ 16000
  47. #define SAMPLING_RATE_22P05KHZ 22050
  48. #define SAMPLING_RATE_32KHZ 32000
  49. #define SAMPLING_RATE_44P1KHZ 44100
  50. #define SAMPLING_RATE_48KHZ 48000
  51. #define SAMPLING_RATE_88P2KHZ 88200
  52. #define SAMPLING_RATE_96KHZ 96000
  53. #define SAMPLING_RATE_176P4KHZ 176400
  54. #define SAMPLING_RATE_192KHZ 192000
  55. #define SAMPLING_RATE_352P8KHZ 352800
  56. #define SAMPLING_RATE_384KHZ 384000
  57. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  58. #define WCD9XXX_MBHC_DEF_RLOADS 5
  59. #define CODEC_EXT_CLK_RATE 9600000
  60. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  61. #define DEV_NAME_STR_LEN 32
  62. #define WSA8810_NAME_1 "wsa881x.20170211"
  63. #define WSA8810_NAME_2 "wsa881x.20170212"
  64. #define WCN_CDC_SLIM_RX_CH_MAX 2
  65. #define WCN_CDC_SLIM_TX_CH_MAX 3
  66. #define TDM_CHANNEL_MAX 8
  67. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  68. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  69. #define MSM_HIFI_ON 1
  70. enum {
  71. SLIM_RX_0 = 0,
  72. SLIM_RX_1,
  73. SLIM_RX_2,
  74. SLIM_RX_3,
  75. SLIM_RX_4,
  76. SLIM_RX_5,
  77. SLIM_RX_6,
  78. SLIM_RX_7,
  79. SLIM_RX_MAX,
  80. };
  81. enum {
  82. SLIM_TX_0 = 0,
  83. SLIM_TX_1,
  84. SLIM_TX_2,
  85. SLIM_TX_3,
  86. SLIM_TX_4,
  87. SLIM_TX_5,
  88. SLIM_TX_6,
  89. SLIM_TX_7,
  90. SLIM_TX_8,
  91. SLIM_TX_MAX,
  92. };
  93. enum {
  94. PRIM_MI2S = 0,
  95. SEC_MI2S,
  96. TERT_MI2S,
  97. QUAT_MI2S,
  98. QUIN_MI2S,
  99. MI2S_MAX,
  100. };
  101. enum {
  102. PRIM_AUX_PCM = 0,
  103. SEC_AUX_PCM,
  104. TERT_AUX_PCM,
  105. QUAT_AUX_PCM,
  106. QUIN_AUX_PCM,
  107. AUX_PCM_MAX,
  108. };
  109. enum {
  110. WSA_CDC_DMA_RX_0 = 0,
  111. WSA_CDC_DMA_RX_1,
  112. RX_CDC_DMA_RX_0,
  113. RX_CDC_DMA_RX_1,
  114. RX_CDC_DMA_RX_2,
  115. RX_CDC_DMA_RX_3,
  116. RX_CDC_DMA_RX_5,
  117. CDC_DMA_RX_MAX,
  118. };
  119. enum {
  120. WSA_CDC_DMA_TX_0 = 0,
  121. WSA_CDC_DMA_TX_1,
  122. WSA_CDC_DMA_TX_2,
  123. TX_CDC_DMA_TX_0,
  124. TX_CDC_DMA_TX_3,
  125. TX_CDC_DMA_TX_4,
  126. CDC_DMA_TX_MAX,
  127. };
  128. struct mi2s_conf {
  129. struct mutex lock;
  130. u32 ref_cnt;
  131. u32 msm_is_mi2s_master;
  132. };
  133. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  134. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  135. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  136. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  137. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  138. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  139. };
  140. struct dev_config {
  141. u32 sample_rate;
  142. u32 bit_format;
  143. u32 channels;
  144. };
  145. enum {
  146. DP_RX_IDX = 0,
  147. EXT_DISP_RX_IDX_MAX,
  148. };
  149. struct msm_wsa881x_dev_info {
  150. struct device_node *of_node;
  151. u32 index;
  152. };
  153. struct aux_codec_dev_info {
  154. struct device_node *of_node;
  155. u32 index;
  156. };
  157. enum pinctrl_pin_state {
  158. STATE_DISABLE = 0, /* All pins are in sleep state */
  159. STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
  160. STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
  161. };
  162. struct msm_pinctrl_info {
  163. struct pinctrl *pinctrl;
  164. struct pinctrl_state *mi2s_disable;
  165. struct pinctrl_state *tdm_disable;
  166. struct pinctrl_state *mi2s_active;
  167. struct pinctrl_state *tdm_active;
  168. enum pinctrl_pin_state curr_state;
  169. };
  170. struct msm_asoc_mach_data {
  171. struct snd_info_entry *codec_root;
  172. struct msm_pinctrl_info pinctrl_info;
  173. int usbc_en2_gpio; /* used by gpio driver API */
  174. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  175. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  176. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  177. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  178. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  179. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  180. };
  181. struct msm_asoc_wcd93xx_codec {
  182. void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
  183. enum afe_config_type config_type);
  184. };
  185. static const char *const pin_states[] = {"sleep", "i2s-active",
  186. "tdm-active"};
  187. static struct snd_soc_card snd_soc_card_sm6150_msm;
  188. enum {
  189. TDM_0 = 0,
  190. TDM_1,
  191. TDM_2,
  192. TDM_3,
  193. TDM_4,
  194. TDM_5,
  195. TDM_6,
  196. TDM_7,
  197. TDM_PORT_MAX,
  198. };
  199. enum {
  200. TDM_PRI = 0,
  201. TDM_SEC,
  202. TDM_TERT,
  203. TDM_QUAT,
  204. TDM_QUIN,
  205. TDM_INTERFACE_MAX,
  206. };
  207. struct tdm_port {
  208. u32 mode;
  209. u32 channel;
  210. };
  211. /* TDM default config */
  212. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  213. { /* PRI TDM */
  214. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  215. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  216. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  222. },
  223. { /* SEC TDM */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  232. },
  233. { /* TERT TDM */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  242. },
  243. { /* QUAT TDM */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  252. },
  253. { /* QUIN TDM */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  262. }
  263. };
  264. /* TDM default config */
  265. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  266. { /* PRI TDM */
  267. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  268. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  275. },
  276. { /* SEC TDM */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  279. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  285. },
  286. { /* TERT TDM */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  289. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  295. },
  296. { /* QUAT TDM */
  297. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  298. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  299. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  300. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  302. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  305. },
  306. { /* QUIN TDM */
  307. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  308. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  309. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  310. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  311. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  312. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  313. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  314. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  315. }
  316. };
  317. /* Default configuration of slimbus channels */
  318. static struct dev_config slim_rx_cfg[] = {
  319. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  320. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  321. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  322. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  323. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  324. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  325. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. };
  328. static struct dev_config slim_tx_cfg[] = {
  329. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  330. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  331. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  332. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  333. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  334. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  335. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  336. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  337. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  338. };
  339. /* Default configuration of Codec DMA Interface Tx */
  340. static struct dev_config cdc_dma_rx_cfg[] = {
  341. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  342. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  343. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  344. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  345. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  346. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  347. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  348. };
  349. /* Default configuration of Codec DMA Interface Rx */
  350. static struct dev_config cdc_dma_tx_cfg[] = {
  351. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  352. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  353. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  354. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  355. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  356. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  357. };
  358. /* Default configuration of external display BE */
  359. static struct dev_config ext_disp_rx_cfg[] = {
  360. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  361. };
  362. static struct dev_config usb_rx_cfg = {
  363. .sample_rate = SAMPLING_RATE_48KHZ,
  364. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  365. .channels = 2,
  366. };
  367. static struct dev_config usb_tx_cfg = {
  368. .sample_rate = SAMPLING_RATE_48KHZ,
  369. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  370. .channels = 1,
  371. };
  372. static struct dev_config proxy_rx_cfg = {
  373. .sample_rate = SAMPLING_RATE_48KHZ,
  374. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  375. .channels = 2,
  376. };
  377. /* Default configuration of MI2S channels */
  378. static struct dev_config mi2s_rx_cfg[] = {
  379. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  380. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  381. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  382. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  383. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  384. };
  385. static struct dev_config mi2s_tx_cfg[] = {
  386. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  387. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  388. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  389. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  390. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  391. };
  392. static struct dev_config aux_pcm_rx_cfg[] = {
  393. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  394. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  395. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  396. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  397. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  398. };
  399. static struct dev_config aux_pcm_tx_cfg[] = {
  400. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  401. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  402. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  403. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  404. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  405. };
  406. static int msm_vi_feed_tx_ch = 2;
  407. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  408. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  409. "Five", "Six", "Seven",
  410. "Eight"};
  411. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  412. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  413. "S32_LE"};
  414. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  415. "S24_3LE"};
  416. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  417. "KHZ_32", "KHZ_44P1", "KHZ_48",
  418. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  419. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  420. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  421. "KHZ_44P1", "KHZ_48",
  422. "KHZ_88P2", "KHZ_96"};
  423. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  424. "Five", "Six", "Seven",
  425. "Eight"};
  426. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  427. "Six", "Seven", "Eight"};
  428. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  429. "KHZ_16", "KHZ_22P05",
  430. "KHZ_32", "KHZ_44P1", "KHZ_48",
  431. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  432. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  433. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  434. "KHZ_192", "KHZ_32", "KHZ_44P1",
  435. "KHZ_88P2", "KHZ_176P4" };
  436. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  437. "Five", "Six", "Seven", "Eight"};
  438. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  439. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  440. "KHZ_48", "KHZ_176P4",
  441. "KHZ_352P8"};
  442. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  443. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  444. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  445. "KHZ_48", "KHZ_96", "KHZ_192"};
  446. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  447. "Five", "Six", "Seven",
  448. "Eight"};
  449. static const char *const hifi_text[] = {"Off", "On"};
  450. static const char *const qos_text[] = {"Disable", "Enable"};
  451. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  452. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  453. "Five", "Six", "Seven",
  454. "Eight"};
  455. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  456. "KHZ_32", "KHZ_44P1", "KHZ_48",
  457. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  458. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  459. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  460. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  461. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  462. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  463. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  464. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  465. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  467. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  486. ext_disp_sample_rate_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  551. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  553. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  554. cdc_dma_sample_rate_text);
  555. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  556. cdc_dma_sample_rate_text);
  557. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  558. cdc_dma_sample_rate_text);
  559. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  560. cdc_dma_sample_rate_text);
  561. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  562. cdc_dma_sample_rate_text);
  563. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  564. cdc_dma_sample_rate_text);
  565. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  566. cdc_dma_sample_rate_text);
  567. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  568. cdc_dma_sample_rate_text);
  569. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  570. cdc_dma_sample_rate_text);
  571. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  572. cdc_dma_sample_rate_text);
  573. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  574. cdc_dma_sample_rate_text);
  575. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  576. cdc_dma_sample_rate_text);
  577. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  578. cdc_dma_sample_rate_text);
  579. static struct platform_device *spdev;
  580. static int msm_hifi_control;
  581. static bool is_initial_boot;
  582. static bool codec_reg_done;
  583. static struct snd_soc_aux_dev *msm_aux_dev;
  584. static struct snd_soc_codec_conf *msm_codec_conf;
  585. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  586. static int dmic_0_1_gpio_cnt;
  587. static int dmic_2_3_gpio_cnt;
  588. static void *def_wcd_mbhc_cal(void);
  589. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  590. int enable, bool dapm);
  591. static int msm_wsa881x_init(struct snd_soc_component *component);
  592. static int msm_aux_codec_init(struct snd_soc_component *component);
  593. /*
  594. * Need to report LINEIN
  595. * if R/L channel impedance is larger than 5K ohm
  596. */
  597. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  598. .read_fw_bin = false,
  599. .calibration = NULL,
  600. .detect_extn_cable = true,
  601. .mono_stero_detection = false,
  602. .swap_gnd_mic = NULL,
  603. .hs_ext_micbias = true,
  604. .key_code[0] = KEY_MEDIA,
  605. .key_code[1] = KEY_VOICECOMMAND,
  606. .key_code[2] = KEY_VOLUMEUP,
  607. .key_code[3] = KEY_VOLUMEDOWN,
  608. .key_code[4] = 0,
  609. .key_code[5] = 0,
  610. .key_code[6] = 0,
  611. .key_code[7] = 0,
  612. .linein_th = 5000,
  613. .moisture_en = true,
  614. .mbhc_micbias = MIC_BIAS_2,
  615. .anc_micbias = MIC_BIAS_2,
  616. .enable_anc_mic_detect = false,
  617. };
  618. static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
  619. {"MIC BIAS1", NULL, "MCLK TX"},
  620. {"MIC BIAS2", NULL, "MCLK TX"},
  621. {"MIC BIAS3", NULL, "MCLK TX"},
  622. {"MIC BIAS4", NULL, "MCLK TX"},
  623. };
  624. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  625. {
  626. AFE_API_VERSION_I2S_CONFIG,
  627. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  628. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  629. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  630. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  631. 0,
  632. },
  633. {
  634. AFE_API_VERSION_I2S_CONFIG,
  635. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  636. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  637. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  638. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  639. 0,
  640. },
  641. {
  642. AFE_API_VERSION_I2S_CONFIG,
  643. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  644. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  645. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  646. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  647. 0,
  648. },
  649. {
  650. AFE_API_VERSION_I2S_CONFIG,
  651. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  652. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  653. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  654. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  655. 0,
  656. },
  657. {
  658. AFE_API_VERSION_I2S_CONFIG,
  659. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  660. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  661. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  662. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  663. 0,
  664. }
  665. };
  666. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  667. static int slim_get_sample_rate_val(int sample_rate)
  668. {
  669. int sample_rate_val = 0;
  670. switch (sample_rate) {
  671. case SAMPLING_RATE_8KHZ:
  672. sample_rate_val = 0;
  673. break;
  674. case SAMPLING_RATE_16KHZ:
  675. sample_rate_val = 1;
  676. break;
  677. case SAMPLING_RATE_32KHZ:
  678. sample_rate_val = 2;
  679. break;
  680. case SAMPLING_RATE_44P1KHZ:
  681. sample_rate_val = 3;
  682. break;
  683. case SAMPLING_RATE_48KHZ:
  684. sample_rate_val = 4;
  685. break;
  686. case SAMPLING_RATE_88P2KHZ:
  687. sample_rate_val = 5;
  688. break;
  689. case SAMPLING_RATE_96KHZ:
  690. sample_rate_val = 6;
  691. break;
  692. case SAMPLING_RATE_176P4KHZ:
  693. sample_rate_val = 7;
  694. break;
  695. case SAMPLING_RATE_192KHZ:
  696. sample_rate_val = 8;
  697. break;
  698. case SAMPLING_RATE_352P8KHZ:
  699. sample_rate_val = 9;
  700. break;
  701. case SAMPLING_RATE_384KHZ:
  702. sample_rate_val = 10;
  703. break;
  704. default:
  705. sample_rate_val = 4;
  706. break;
  707. }
  708. return sample_rate_val;
  709. }
  710. static int slim_get_sample_rate(int value)
  711. {
  712. int sample_rate = 0;
  713. switch (value) {
  714. case 0:
  715. sample_rate = SAMPLING_RATE_8KHZ;
  716. break;
  717. case 1:
  718. sample_rate = SAMPLING_RATE_16KHZ;
  719. break;
  720. case 2:
  721. sample_rate = SAMPLING_RATE_32KHZ;
  722. break;
  723. case 3:
  724. sample_rate = SAMPLING_RATE_44P1KHZ;
  725. break;
  726. case 4:
  727. sample_rate = SAMPLING_RATE_48KHZ;
  728. break;
  729. case 5:
  730. sample_rate = SAMPLING_RATE_88P2KHZ;
  731. break;
  732. case 6:
  733. sample_rate = SAMPLING_RATE_96KHZ;
  734. break;
  735. case 7:
  736. sample_rate = SAMPLING_RATE_176P4KHZ;
  737. break;
  738. case 8:
  739. sample_rate = SAMPLING_RATE_192KHZ;
  740. break;
  741. case 9:
  742. sample_rate = SAMPLING_RATE_352P8KHZ;
  743. break;
  744. case 10:
  745. sample_rate = SAMPLING_RATE_384KHZ;
  746. break;
  747. default:
  748. sample_rate = SAMPLING_RATE_48KHZ;
  749. break;
  750. }
  751. return sample_rate;
  752. }
  753. static int slim_get_bit_format_val(int bit_format)
  754. {
  755. int val = 0;
  756. switch (bit_format) {
  757. case SNDRV_PCM_FORMAT_S32_LE:
  758. val = 3;
  759. break;
  760. case SNDRV_PCM_FORMAT_S24_3LE:
  761. val = 2;
  762. break;
  763. case SNDRV_PCM_FORMAT_S24_LE:
  764. val = 1;
  765. break;
  766. case SNDRV_PCM_FORMAT_S16_LE:
  767. default:
  768. val = 0;
  769. break;
  770. }
  771. return val;
  772. }
  773. static int slim_get_bit_format(int val)
  774. {
  775. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  776. switch (val) {
  777. case 0:
  778. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  779. break;
  780. case 1:
  781. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  782. break;
  783. case 2:
  784. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  785. break;
  786. case 3:
  787. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  788. break;
  789. default:
  790. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  791. break;
  792. }
  793. return bit_fmt;
  794. }
  795. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  796. {
  797. int port_id = 0;
  798. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  799. port_id = SLIM_RX_0;
  800. } else if (strnstr(kcontrol->id.name,
  801. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  802. port_id = SLIM_RX_2;
  803. } else if (strnstr(kcontrol->id.name,
  804. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  805. port_id = SLIM_RX_5;
  806. } else if (strnstr(kcontrol->id.name,
  807. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  808. port_id = SLIM_RX_6;
  809. } else if (strnstr(kcontrol->id.name,
  810. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  811. port_id = SLIM_TX_0;
  812. } else if (strnstr(kcontrol->id.name,
  813. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  814. port_id = SLIM_TX_1;
  815. } else {
  816. pr_err("%s: unsupported channel: %s\n",
  817. __func__, kcontrol->id.name);
  818. return -EINVAL;
  819. }
  820. return port_id;
  821. }
  822. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  823. struct snd_ctl_elem_value *ucontrol)
  824. {
  825. int ch_num = slim_get_port_idx(kcontrol);
  826. if (ch_num < 0)
  827. return ch_num;
  828. ucontrol->value.enumerated.item[0] =
  829. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  830. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  831. ch_num, slim_rx_cfg[ch_num].sample_rate,
  832. ucontrol->value.enumerated.item[0]);
  833. return 0;
  834. }
  835. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  836. struct snd_ctl_elem_value *ucontrol)
  837. {
  838. int ch_num = slim_get_port_idx(kcontrol);
  839. if (ch_num < 0)
  840. return ch_num;
  841. slim_rx_cfg[ch_num].sample_rate =
  842. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  843. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  844. ch_num, slim_rx_cfg[ch_num].sample_rate,
  845. ucontrol->value.enumerated.item[0]);
  846. return 0;
  847. }
  848. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  849. struct snd_ctl_elem_value *ucontrol)
  850. {
  851. int ch_num = slim_get_port_idx(kcontrol);
  852. if (ch_num < 0)
  853. return ch_num;
  854. ucontrol->value.enumerated.item[0] =
  855. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  856. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  857. ch_num, slim_tx_cfg[ch_num].sample_rate,
  858. ucontrol->value.enumerated.item[0]);
  859. return 0;
  860. }
  861. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  862. struct snd_ctl_elem_value *ucontrol)
  863. {
  864. int sample_rate = 0;
  865. int ch_num = slim_get_port_idx(kcontrol);
  866. if (ch_num < 0)
  867. return ch_num;
  868. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  869. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  870. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  871. __func__, sample_rate);
  872. return -EINVAL;
  873. }
  874. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  875. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  876. ch_num, slim_tx_cfg[ch_num].sample_rate,
  877. ucontrol->value.enumerated.item[0]);
  878. return 0;
  879. }
  880. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  881. struct snd_ctl_elem_value *ucontrol)
  882. {
  883. int ch_num = slim_get_port_idx(kcontrol);
  884. if (ch_num < 0)
  885. return ch_num;
  886. ucontrol->value.enumerated.item[0] =
  887. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  888. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  889. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  890. ucontrol->value.enumerated.item[0]);
  891. return 0;
  892. }
  893. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  894. struct snd_ctl_elem_value *ucontrol)
  895. {
  896. int ch_num = slim_get_port_idx(kcontrol);
  897. if (ch_num < 0)
  898. return ch_num;
  899. slim_rx_cfg[ch_num].bit_format =
  900. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  901. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  902. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  903. ucontrol->value.enumerated.item[0]);
  904. return 0;
  905. }
  906. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  907. struct snd_ctl_elem_value *ucontrol)
  908. {
  909. int ch_num = slim_get_port_idx(kcontrol);
  910. if (ch_num < 0)
  911. return ch_num;
  912. ucontrol->value.enumerated.item[0] =
  913. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  914. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  915. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  916. ucontrol->value.enumerated.item[0]);
  917. return 0;
  918. }
  919. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  920. struct snd_ctl_elem_value *ucontrol)
  921. {
  922. int ch_num = slim_get_port_idx(kcontrol);
  923. if (ch_num < 0)
  924. return ch_num;
  925. slim_tx_cfg[ch_num].bit_format =
  926. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  927. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  928. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  929. ucontrol->value.enumerated.item[0]);
  930. return 0;
  931. }
  932. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  933. struct snd_ctl_elem_value *ucontrol)
  934. {
  935. int ch_num = slim_get_port_idx(kcontrol);
  936. if (ch_num < 0)
  937. return ch_num;
  938. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  939. ch_num, slim_rx_cfg[ch_num].channels);
  940. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  941. return 0;
  942. }
  943. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  944. struct snd_ctl_elem_value *ucontrol)
  945. {
  946. int ch_num = slim_get_port_idx(kcontrol);
  947. if (ch_num < 0)
  948. return ch_num;
  949. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  950. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  951. ch_num, slim_rx_cfg[ch_num].channels);
  952. return 1;
  953. }
  954. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  955. struct snd_ctl_elem_value *ucontrol)
  956. {
  957. int ch_num = slim_get_port_idx(kcontrol);
  958. if (ch_num < 0)
  959. return ch_num;
  960. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  961. ch_num, slim_tx_cfg[ch_num].channels);
  962. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  963. return 0;
  964. }
  965. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  966. struct snd_ctl_elem_value *ucontrol)
  967. {
  968. int ch_num = slim_get_port_idx(kcontrol);
  969. if (ch_num < 0)
  970. return ch_num;
  971. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  972. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  973. ch_num, slim_tx_cfg[ch_num].channels);
  974. return 1;
  975. }
  976. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  977. struct snd_ctl_elem_value *ucontrol)
  978. {
  979. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  980. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  981. ucontrol->value.integer.value[0]);
  982. return 0;
  983. }
  984. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  985. struct snd_ctl_elem_value *ucontrol)
  986. {
  987. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  988. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  989. return 1;
  990. }
  991. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  992. struct snd_ctl_elem_value *ucontrol)
  993. {
  994. /*
  995. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  996. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  997. * value.
  998. */
  999. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1000. case SAMPLING_RATE_96KHZ:
  1001. ucontrol->value.integer.value[0] = 5;
  1002. break;
  1003. case SAMPLING_RATE_88P2KHZ:
  1004. ucontrol->value.integer.value[0] = 4;
  1005. break;
  1006. case SAMPLING_RATE_48KHZ:
  1007. ucontrol->value.integer.value[0] = 3;
  1008. break;
  1009. case SAMPLING_RATE_44P1KHZ:
  1010. ucontrol->value.integer.value[0] = 2;
  1011. break;
  1012. case SAMPLING_RATE_16KHZ:
  1013. ucontrol->value.integer.value[0] = 1;
  1014. break;
  1015. case SAMPLING_RATE_8KHZ:
  1016. default:
  1017. ucontrol->value.integer.value[0] = 0;
  1018. break;
  1019. }
  1020. pr_debug("%s: sample rate = %d\n", __func__,
  1021. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1022. return 0;
  1023. }
  1024. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1025. struct snd_ctl_elem_value *ucontrol)
  1026. {
  1027. switch (ucontrol->value.integer.value[0]) {
  1028. case 1:
  1029. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1030. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1031. break;
  1032. case 2:
  1033. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1034. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1035. break;
  1036. case 3:
  1037. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1038. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1039. break;
  1040. case 4:
  1041. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1042. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1043. break;
  1044. case 5:
  1045. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1046. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1047. break;
  1048. case 0:
  1049. default:
  1050. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1051. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1052. break;
  1053. }
  1054. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1055. __func__,
  1056. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1057. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1058. ucontrol->value.enumerated.item[0]);
  1059. return 0;
  1060. }
  1061. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1062. {
  1063. int idx = 0;
  1064. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1065. sizeof("WSA_CDC_DMA_RX_0")))
  1066. idx = WSA_CDC_DMA_RX_0;
  1067. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1068. sizeof("WSA_CDC_DMA_RX_0")))
  1069. idx = WSA_CDC_DMA_RX_1;
  1070. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1071. sizeof("RX_CDC_DMA_RX_0")))
  1072. idx = RX_CDC_DMA_RX_0;
  1073. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1074. sizeof("RX_CDC_DMA_RX_1")))
  1075. idx = RX_CDC_DMA_RX_1;
  1076. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1077. sizeof("RX_CDC_DMA_RX_2")))
  1078. idx = RX_CDC_DMA_RX_2;
  1079. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1080. sizeof("RX_CDC_DMA_RX_3")))
  1081. idx = RX_CDC_DMA_RX_3;
  1082. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1083. sizeof("RX_CDC_DMA_RX_5")))
  1084. idx = RX_CDC_DMA_RX_5;
  1085. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1086. sizeof("WSA_CDC_DMA_TX_0")))
  1087. idx = WSA_CDC_DMA_TX_0;
  1088. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1089. sizeof("WSA_CDC_DMA_TX_1")))
  1090. idx = WSA_CDC_DMA_TX_1;
  1091. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1092. sizeof("WSA_CDC_DMA_TX_2")))
  1093. idx = WSA_CDC_DMA_TX_2;
  1094. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1095. sizeof("TX_CDC_DMA_TX_0")))
  1096. idx = TX_CDC_DMA_TX_0;
  1097. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1098. sizeof("TX_CDC_DMA_TX_3")))
  1099. idx = TX_CDC_DMA_TX_3;
  1100. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1101. sizeof("TX_CDC_DMA_TX_4")))
  1102. idx = TX_CDC_DMA_TX_4;
  1103. else {
  1104. pr_err("%s: unsupported channel: %s\n",
  1105. __func__, kcontrol->id.name);
  1106. return -EINVAL;
  1107. }
  1108. return idx;
  1109. }
  1110. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1111. struct snd_ctl_elem_value *ucontrol)
  1112. {
  1113. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1114. if (ch_num < 0)
  1115. return ch_num;
  1116. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1117. cdc_dma_rx_cfg[ch_num].channels - 1);
  1118. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1119. return 0;
  1120. }
  1121. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1122. struct snd_ctl_elem_value *ucontrol)
  1123. {
  1124. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1125. if (ch_num < 0)
  1126. return ch_num;
  1127. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1128. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1129. cdc_dma_rx_cfg[ch_num].channels);
  1130. return 1;
  1131. }
  1132. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1133. struct snd_ctl_elem_value *ucontrol)
  1134. {
  1135. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1136. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1137. case SNDRV_PCM_FORMAT_S32_LE:
  1138. ucontrol->value.integer.value[0] = 3;
  1139. break;
  1140. case SNDRV_PCM_FORMAT_S24_3LE:
  1141. ucontrol->value.integer.value[0] = 2;
  1142. break;
  1143. case SNDRV_PCM_FORMAT_S24_LE:
  1144. ucontrol->value.integer.value[0] = 1;
  1145. break;
  1146. case SNDRV_PCM_FORMAT_S16_LE:
  1147. default:
  1148. ucontrol->value.integer.value[0] = 0;
  1149. break;
  1150. }
  1151. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1152. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1153. ucontrol->value.integer.value[0]);
  1154. return 0;
  1155. }
  1156. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1157. struct snd_ctl_elem_value *ucontrol)
  1158. {
  1159. int rc = 0;
  1160. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1161. switch (ucontrol->value.integer.value[0]) {
  1162. case 3:
  1163. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1164. break;
  1165. case 2:
  1166. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1167. break;
  1168. case 1:
  1169. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1170. break;
  1171. case 0:
  1172. default:
  1173. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1174. break;
  1175. }
  1176. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1177. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1178. ucontrol->value.integer.value[0]);
  1179. return rc;
  1180. }
  1181. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1182. {
  1183. int sample_rate_val = 0;
  1184. switch (sample_rate) {
  1185. case SAMPLING_RATE_8KHZ:
  1186. sample_rate_val = 0;
  1187. break;
  1188. case SAMPLING_RATE_16KHZ:
  1189. sample_rate_val = 1;
  1190. break;
  1191. case SAMPLING_RATE_32KHZ:
  1192. sample_rate_val = 2;
  1193. break;
  1194. case SAMPLING_RATE_44P1KHZ:
  1195. sample_rate_val = 3;
  1196. break;
  1197. case SAMPLING_RATE_48KHZ:
  1198. sample_rate_val = 4;
  1199. break;
  1200. case SAMPLING_RATE_88P2KHZ:
  1201. sample_rate_val = 5;
  1202. break;
  1203. case SAMPLING_RATE_96KHZ:
  1204. sample_rate_val = 6;
  1205. break;
  1206. case SAMPLING_RATE_176P4KHZ:
  1207. sample_rate_val = 7;
  1208. break;
  1209. case SAMPLING_RATE_192KHZ:
  1210. sample_rate_val = 8;
  1211. break;
  1212. case SAMPLING_RATE_352P8KHZ:
  1213. sample_rate_val = 9;
  1214. break;
  1215. case SAMPLING_RATE_384KHZ:
  1216. sample_rate_val = 10;
  1217. break;
  1218. default:
  1219. sample_rate_val = 4;
  1220. break;
  1221. }
  1222. return sample_rate_val;
  1223. }
  1224. static int cdc_dma_get_sample_rate(int value)
  1225. {
  1226. int sample_rate = 0;
  1227. switch (value) {
  1228. case 0:
  1229. sample_rate = SAMPLING_RATE_8KHZ;
  1230. break;
  1231. case 1:
  1232. sample_rate = SAMPLING_RATE_16KHZ;
  1233. break;
  1234. case 2:
  1235. sample_rate = SAMPLING_RATE_32KHZ;
  1236. break;
  1237. case 3:
  1238. sample_rate = SAMPLING_RATE_44P1KHZ;
  1239. break;
  1240. case 4:
  1241. sample_rate = SAMPLING_RATE_48KHZ;
  1242. break;
  1243. case 5:
  1244. sample_rate = SAMPLING_RATE_88P2KHZ;
  1245. break;
  1246. case 6:
  1247. sample_rate = SAMPLING_RATE_96KHZ;
  1248. break;
  1249. case 7:
  1250. sample_rate = SAMPLING_RATE_176P4KHZ;
  1251. break;
  1252. case 8:
  1253. sample_rate = SAMPLING_RATE_192KHZ;
  1254. break;
  1255. case 9:
  1256. sample_rate = SAMPLING_RATE_352P8KHZ;
  1257. break;
  1258. case 10:
  1259. sample_rate = SAMPLING_RATE_384KHZ;
  1260. break;
  1261. default:
  1262. sample_rate = SAMPLING_RATE_48KHZ;
  1263. break;
  1264. }
  1265. return sample_rate;
  1266. }
  1267. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1268. struct snd_ctl_elem_value *ucontrol)
  1269. {
  1270. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1271. if (ch_num < 0)
  1272. return ch_num;
  1273. ucontrol->value.enumerated.item[0] =
  1274. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1275. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1276. cdc_dma_rx_cfg[ch_num].sample_rate);
  1277. return 0;
  1278. }
  1279. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1280. struct snd_ctl_elem_value *ucontrol)
  1281. {
  1282. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1283. if (ch_num < 0)
  1284. return ch_num;
  1285. cdc_dma_rx_cfg[ch_num].sample_rate =
  1286. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1287. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1288. __func__, ucontrol->value.enumerated.item[0],
  1289. cdc_dma_rx_cfg[ch_num].sample_rate);
  1290. return 0;
  1291. }
  1292. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1293. struct snd_ctl_elem_value *ucontrol)
  1294. {
  1295. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1296. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1297. cdc_dma_tx_cfg[ch_num].channels);
  1298. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1299. return 0;
  1300. }
  1301. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1302. struct snd_ctl_elem_value *ucontrol)
  1303. {
  1304. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1305. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1306. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1307. cdc_dma_tx_cfg[ch_num].channels);
  1308. return 1;
  1309. }
  1310. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1311. struct snd_ctl_elem_value *ucontrol)
  1312. {
  1313. int sample_rate_val;
  1314. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1315. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1316. case SAMPLING_RATE_384KHZ:
  1317. sample_rate_val = 12;
  1318. break;
  1319. case SAMPLING_RATE_352P8KHZ:
  1320. sample_rate_val = 11;
  1321. break;
  1322. case SAMPLING_RATE_192KHZ:
  1323. sample_rate_val = 10;
  1324. break;
  1325. case SAMPLING_RATE_176P4KHZ:
  1326. sample_rate_val = 9;
  1327. break;
  1328. case SAMPLING_RATE_96KHZ:
  1329. sample_rate_val = 8;
  1330. break;
  1331. case SAMPLING_RATE_88P2KHZ:
  1332. sample_rate_val = 7;
  1333. break;
  1334. case SAMPLING_RATE_48KHZ:
  1335. sample_rate_val = 6;
  1336. break;
  1337. case SAMPLING_RATE_44P1KHZ:
  1338. sample_rate_val = 5;
  1339. break;
  1340. case SAMPLING_RATE_32KHZ:
  1341. sample_rate_val = 4;
  1342. break;
  1343. case SAMPLING_RATE_22P05KHZ:
  1344. sample_rate_val = 3;
  1345. break;
  1346. case SAMPLING_RATE_16KHZ:
  1347. sample_rate_val = 2;
  1348. break;
  1349. case SAMPLING_RATE_11P025KHZ:
  1350. sample_rate_val = 1;
  1351. break;
  1352. case SAMPLING_RATE_8KHZ:
  1353. sample_rate_val = 0;
  1354. break;
  1355. default:
  1356. sample_rate_val = 6;
  1357. break;
  1358. }
  1359. ucontrol->value.integer.value[0] = sample_rate_val;
  1360. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1361. cdc_dma_tx_cfg[ch_num].sample_rate);
  1362. return 0;
  1363. }
  1364. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1365. struct snd_ctl_elem_value *ucontrol)
  1366. {
  1367. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1368. switch (ucontrol->value.integer.value[0]) {
  1369. case 12:
  1370. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1371. break;
  1372. case 11:
  1373. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1374. break;
  1375. case 10:
  1376. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1377. break;
  1378. case 9:
  1379. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1380. break;
  1381. case 8:
  1382. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1383. break;
  1384. case 7:
  1385. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1386. break;
  1387. case 6:
  1388. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1389. break;
  1390. case 5:
  1391. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1392. break;
  1393. case 4:
  1394. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1395. break;
  1396. case 3:
  1397. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1398. break;
  1399. case 2:
  1400. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1401. break;
  1402. case 1:
  1403. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1404. break;
  1405. case 0:
  1406. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1407. break;
  1408. default:
  1409. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1410. break;
  1411. }
  1412. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1413. __func__, ucontrol->value.integer.value[0],
  1414. cdc_dma_tx_cfg[ch_num].sample_rate);
  1415. return 0;
  1416. }
  1417. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1418. struct snd_ctl_elem_value *ucontrol)
  1419. {
  1420. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1421. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1422. case SNDRV_PCM_FORMAT_S32_LE:
  1423. ucontrol->value.integer.value[0] = 3;
  1424. break;
  1425. case SNDRV_PCM_FORMAT_S24_3LE:
  1426. ucontrol->value.integer.value[0] = 2;
  1427. break;
  1428. case SNDRV_PCM_FORMAT_S24_LE:
  1429. ucontrol->value.integer.value[0] = 1;
  1430. break;
  1431. case SNDRV_PCM_FORMAT_S16_LE:
  1432. default:
  1433. ucontrol->value.integer.value[0] = 0;
  1434. break;
  1435. }
  1436. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1437. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1438. ucontrol->value.integer.value[0]);
  1439. return 0;
  1440. }
  1441. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1442. struct snd_ctl_elem_value *ucontrol)
  1443. {
  1444. int rc = 0;
  1445. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1446. switch (ucontrol->value.integer.value[0]) {
  1447. case 3:
  1448. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1449. break;
  1450. case 2:
  1451. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1452. break;
  1453. case 1:
  1454. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1455. break;
  1456. case 0:
  1457. default:
  1458. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1459. break;
  1460. }
  1461. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1462. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1463. ucontrol->value.integer.value[0]);
  1464. return rc;
  1465. }
  1466. /***************/
  1467. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1468. struct snd_ctl_elem_value *ucontrol)
  1469. {
  1470. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1471. usb_rx_cfg.channels);
  1472. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1473. return 0;
  1474. }
  1475. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1476. struct snd_ctl_elem_value *ucontrol)
  1477. {
  1478. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1479. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1480. return 1;
  1481. }
  1482. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1483. struct snd_ctl_elem_value *ucontrol)
  1484. {
  1485. int sample_rate_val;
  1486. switch (usb_rx_cfg.sample_rate) {
  1487. case SAMPLING_RATE_384KHZ:
  1488. sample_rate_val = 12;
  1489. break;
  1490. case SAMPLING_RATE_352P8KHZ:
  1491. sample_rate_val = 11;
  1492. break;
  1493. case SAMPLING_RATE_192KHZ:
  1494. sample_rate_val = 10;
  1495. break;
  1496. case SAMPLING_RATE_176P4KHZ:
  1497. sample_rate_val = 9;
  1498. break;
  1499. case SAMPLING_RATE_96KHZ:
  1500. sample_rate_val = 8;
  1501. break;
  1502. case SAMPLING_RATE_88P2KHZ:
  1503. sample_rate_val = 7;
  1504. break;
  1505. case SAMPLING_RATE_48KHZ:
  1506. sample_rate_val = 6;
  1507. break;
  1508. case SAMPLING_RATE_44P1KHZ:
  1509. sample_rate_val = 5;
  1510. break;
  1511. case SAMPLING_RATE_32KHZ:
  1512. sample_rate_val = 4;
  1513. break;
  1514. case SAMPLING_RATE_22P05KHZ:
  1515. sample_rate_val = 3;
  1516. break;
  1517. case SAMPLING_RATE_16KHZ:
  1518. sample_rate_val = 2;
  1519. break;
  1520. case SAMPLING_RATE_11P025KHZ:
  1521. sample_rate_val = 1;
  1522. break;
  1523. case SAMPLING_RATE_8KHZ:
  1524. default:
  1525. sample_rate_val = 0;
  1526. break;
  1527. }
  1528. ucontrol->value.integer.value[0] = sample_rate_val;
  1529. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1530. usb_rx_cfg.sample_rate);
  1531. return 0;
  1532. }
  1533. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1534. struct snd_ctl_elem_value *ucontrol)
  1535. {
  1536. switch (ucontrol->value.integer.value[0]) {
  1537. case 12:
  1538. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1539. break;
  1540. case 11:
  1541. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1542. break;
  1543. case 10:
  1544. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1545. break;
  1546. case 9:
  1547. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1548. break;
  1549. case 8:
  1550. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1551. break;
  1552. case 7:
  1553. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1554. break;
  1555. case 6:
  1556. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1557. break;
  1558. case 5:
  1559. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1560. break;
  1561. case 4:
  1562. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1563. break;
  1564. case 3:
  1565. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1566. break;
  1567. case 2:
  1568. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1569. break;
  1570. case 1:
  1571. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1572. break;
  1573. case 0:
  1574. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1575. break;
  1576. default:
  1577. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1578. break;
  1579. }
  1580. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1581. __func__, ucontrol->value.integer.value[0],
  1582. usb_rx_cfg.sample_rate);
  1583. return 0;
  1584. }
  1585. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1586. struct snd_ctl_elem_value *ucontrol)
  1587. {
  1588. switch (usb_rx_cfg.bit_format) {
  1589. case SNDRV_PCM_FORMAT_S32_LE:
  1590. ucontrol->value.integer.value[0] = 3;
  1591. break;
  1592. case SNDRV_PCM_FORMAT_S24_3LE:
  1593. ucontrol->value.integer.value[0] = 2;
  1594. break;
  1595. case SNDRV_PCM_FORMAT_S24_LE:
  1596. ucontrol->value.integer.value[0] = 1;
  1597. break;
  1598. case SNDRV_PCM_FORMAT_S16_LE:
  1599. default:
  1600. ucontrol->value.integer.value[0] = 0;
  1601. break;
  1602. }
  1603. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1604. __func__, usb_rx_cfg.bit_format,
  1605. ucontrol->value.integer.value[0]);
  1606. return 0;
  1607. }
  1608. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1609. struct snd_ctl_elem_value *ucontrol)
  1610. {
  1611. int rc = 0;
  1612. switch (ucontrol->value.integer.value[0]) {
  1613. case 3:
  1614. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1615. break;
  1616. case 2:
  1617. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1618. break;
  1619. case 1:
  1620. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1621. break;
  1622. case 0:
  1623. default:
  1624. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1625. break;
  1626. }
  1627. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1628. __func__, usb_rx_cfg.bit_format,
  1629. ucontrol->value.integer.value[0]);
  1630. return rc;
  1631. }
  1632. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1633. struct snd_ctl_elem_value *ucontrol)
  1634. {
  1635. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1636. usb_tx_cfg.channels);
  1637. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1638. return 0;
  1639. }
  1640. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1641. struct snd_ctl_elem_value *ucontrol)
  1642. {
  1643. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1644. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1645. return 1;
  1646. }
  1647. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1648. struct snd_ctl_elem_value *ucontrol)
  1649. {
  1650. int sample_rate_val;
  1651. switch (usb_tx_cfg.sample_rate) {
  1652. case SAMPLING_RATE_384KHZ:
  1653. sample_rate_val = 12;
  1654. break;
  1655. case SAMPLING_RATE_352P8KHZ:
  1656. sample_rate_val = 11;
  1657. break;
  1658. case SAMPLING_RATE_192KHZ:
  1659. sample_rate_val = 10;
  1660. break;
  1661. case SAMPLING_RATE_176P4KHZ:
  1662. sample_rate_val = 9;
  1663. break;
  1664. case SAMPLING_RATE_96KHZ:
  1665. sample_rate_val = 8;
  1666. break;
  1667. case SAMPLING_RATE_88P2KHZ:
  1668. sample_rate_val = 7;
  1669. break;
  1670. case SAMPLING_RATE_48KHZ:
  1671. sample_rate_val = 6;
  1672. break;
  1673. case SAMPLING_RATE_44P1KHZ:
  1674. sample_rate_val = 5;
  1675. break;
  1676. case SAMPLING_RATE_32KHZ:
  1677. sample_rate_val = 4;
  1678. break;
  1679. case SAMPLING_RATE_22P05KHZ:
  1680. sample_rate_val = 3;
  1681. break;
  1682. case SAMPLING_RATE_16KHZ:
  1683. sample_rate_val = 2;
  1684. break;
  1685. case SAMPLING_RATE_11P025KHZ:
  1686. sample_rate_val = 1;
  1687. break;
  1688. case SAMPLING_RATE_8KHZ:
  1689. sample_rate_val = 0;
  1690. break;
  1691. default:
  1692. sample_rate_val = 6;
  1693. break;
  1694. }
  1695. ucontrol->value.integer.value[0] = sample_rate_val;
  1696. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1697. usb_tx_cfg.sample_rate);
  1698. return 0;
  1699. }
  1700. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1701. struct snd_ctl_elem_value *ucontrol)
  1702. {
  1703. switch (ucontrol->value.integer.value[0]) {
  1704. case 12:
  1705. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1706. break;
  1707. case 11:
  1708. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1709. break;
  1710. case 10:
  1711. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1712. break;
  1713. case 9:
  1714. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1715. break;
  1716. case 8:
  1717. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1718. break;
  1719. case 7:
  1720. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1721. break;
  1722. case 6:
  1723. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1724. break;
  1725. case 5:
  1726. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1727. break;
  1728. case 4:
  1729. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1730. break;
  1731. case 3:
  1732. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1733. break;
  1734. case 2:
  1735. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1736. break;
  1737. case 1:
  1738. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1739. break;
  1740. case 0:
  1741. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1742. break;
  1743. default:
  1744. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1745. break;
  1746. }
  1747. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1748. __func__, ucontrol->value.integer.value[0],
  1749. usb_tx_cfg.sample_rate);
  1750. return 0;
  1751. }
  1752. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1753. struct snd_ctl_elem_value *ucontrol)
  1754. {
  1755. switch (usb_tx_cfg.bit_format) {
  1756. case SNDRV_PCM_FORMAT_S32_LE:
  1757. ucontrol->value.integer.value[0] = 3;
  1758. break;
  1759. case SNDRV_PCM_FORMAT_S24_3LE:
  1760. ucontrol->value.integer.value[0] = 2;
  1761. break;
  1762. case SNDRV_PCM_FORMAT_S24_LE:
  1763. ucontrol->value.integer.value[0] = 1;
  1764. break;
  1765. case SNDRV_PCM_FORMAT_S16_LE:
  1766. default:
  1767. ucontrol->value.integer.value[0] = 0;
  1768. break;
  1769. }
  1770. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1771. __func__, usb_tx_cfg.bit_format,
  1772. ucontrol->value.integer.value[0]);
  1773. return 0;
  1774. }
  1775. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1776. struct snd_ctl_elem_value *ucontrol)
  1777. {
  1778. int rc = 0;
  1779. switch (ucontrol->value.integer.value[0]) {
  1780. case 3:
  1781. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1782. break;
  1783. case 2:
  1784. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1785. break;
  1786. case 1:
  1787. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1788. break;
  1789. case 0:
  1790. default:
  1791. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1792. break;
  1793. }
  1794. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1795. __func__, usb_tx_cfg.bit_format,
  1796. ucontrol->value.integer.value[0]);
  1797. return rc;
  1798. }
  1799. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  1800. {
  1801. int idx;
  1802. if (strnstr(kcontrol->id.name, "Display Port RX",
  1803. sizeof("Display Port RX"))) {
  1804. idx = DP_RX_IDX;
  1805. } else {
  1806. pr_err("%s: unsupported BE: %s\n",
  1807. __func__, kcontrol->id.name);
  1808. idx = -EINVAL;
  1809. }
  1810. return idx;
  1811. }
  1812. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  1813. struct snd_ctl_elem_value *ucontrol)
  1814. {
  1815. int idx = ext_disp_get_port_idx(kcontrol);
  1816. if (idx < 0)
  1817. return idx;
  1818. switch (ext_disp_rx_cfg[idx].bit_format) {
  1819. case SNDRV_PCM_FORMAT_S24_3LE:
  1820. ucontrol->value.integer.value[0] = 2;
  1821. break;
  1822. case SNDRV_PCM_FORMAT_S24_LE:
  1823. ucontrol->value.integer.value[0] = 1;
  1824. break;
  1825. case SNDRV_PCM_FORMAT_S16_LE:
  1826. default:
  1827. ucontrol->value.integer.value[0] = 0;
  1828. break;
  1829. }
  1830. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1831. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1832. ucontrol->value.integer.value[0]);
  1833. return 0;
  1834. }
  1835. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  1836. struct snd_ctl_elem_value *ucontrol)
  1837. {
  1838. int idx = ext_disp_get_port_idx(kcontrol);
  1839. if (idx < 0)
  1840. return idx;
  1841. switch (ucontrol->value.integer.value[0]) {
  1842. case 2:
  1843. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1844. break;
  1845. case 1:
  1846. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1847. break;
  1848. case 0:
  1849. default:
  1850. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1851. break;
  1852. }
  1853. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1854. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1855. ucontrol->value.integer.value[0]);
  1856. return 0;
  1857. }
  1858. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  1859. struct snd_ctl_elem_value *ucontrol)
  1860. {
  1861. int idx = ext_disp_get_port_idx(kcontrol);
  1862. if (idx < 0)
  1863. return idx;
  1864. ucontrol->value.integer.value[0] =
  1865. ext_disp_rx_cfg[idx].channels - 2;
  1866. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1867. idx, ext_disp_rx_cfg[idx].channels);
  1868. return 0;
  1869. }
  1870. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  1871. struct snd_ctl_elem_value *ucontrol)
  1872. {
  1873. int idx = ext_disp_get_port_idx(kcontrol);
  1874. if (idx < 0)
  1875. return idx;
  1876. ext_disp_rx_cfg[idx].channels =
  1877. ucontrol->value.integer.value[0] + 2;
  1878. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1879. idx, ext_disp_rx_cfg[idx].channels);
  1880. return 1;
  1881. }
  1882. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1883. struct snd_ctl_elem_value *ucontrol)
  1884. {
  1885. int sample_rate_val;
  1886. int idx = ext_disp_get_port_idx(kcontrol);
  1887. if (idx < 0)
  1888. return idx;
  1889. switch (ext_disp_rx_cfg[idx].sample_rate) {
  1890. case SAMPLING_RATE_176P4KHZ:
  1891. sample_rate_val = 6;
  1892. break;
  1893. case SAMPLING_RATE_88P2KHZ:
  1894. sample_rate_val = 5;
  1895. break;
  1896. case SAMPLING_RATE_44P1KHZ:
  1897. sample_rate_val = 4;
  1898. break;
  1899. case SAMPLING_RATE_32KHZ:
  1900. sample_rate_val = 3;
  1901. break;
  1902. case SAMPLING_RATE_192KHZ:
  1903. sample_rate_val = 2;
  1904. break;
  1905. case SAMPLING_RATE_96KHZ:
  1906. sample_rate_val = 1;
  1907. break;
  1908. case SAMPLING_RATE_48KHZ:
  1909. default:
  1910. sample_rate_val = 0;
  1911. break;
  1912. }
  1913. ucontrol->value.integer.value[0] = sample_rate_val;
  1914. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  1915. idx, ext_disp_rx_cfg[idx].sample_rate);
  1916. return 0;
  1917. }
  1918. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1919. struct snd_ctl_elem_value *ucontrol)
  1920. {
  1921. int idx = ext_disp_get_port_idx(kcontrol);
  1922. if (idx < 0)
  1923. return idx;
  1924. switch (ucontrol->value.integer.value[0]) {
  1925. case 6:
  1926. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  1927. break;
  1928. case 5:
  1929. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  1930. break;
  1931. case 4:
  1932. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  1933. break;
  1934. case 3:
  1935. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  1936. break;
  1937. case 2:
  1938. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  1939. break;
  1940. case 1:
  1941. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  1942. break;
  1943. case 0:
  1944. default:
  1945. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  1946. break;
  1947. }
  1948. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  1949. __func__, ucontrol->value.integer.value[0], idx,
  1950. ext_disp_rx_cfg[idx].sample_rate);
  1951. return 0;
  1952. }
  1953. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  1954. struct snd_ctl_elem_value *ucontrol)
  1955. {
  1956. pr_debug("%s: proxy_rx channels = %d\n",
  1957. __func__, proxy_rx_cfg.channels);
  1958. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  1959. return 0;
  1960. }
  1961. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  1962. struct snd_ctl_elem_value *ucontrol)
  1963. {
  1964. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  1965. pr_debug("%s: proxy_rx channels = %d\n",
  1966. __func__, proxy_rx_cfg.channels);
  1967. return 1;
  1968. }
  1969. static int tdm_get_sample_rate(int value)
  1970. {
  1971. int sample_rate = 0;
  1972. switch (value) {
  1973. case 0:
  1974. sample_rate = SAMPLING_RATE_8KHZ;
  1975. break;
  1976. case 1:
  1977. sample_rate = SAMPLING_RATE_16KHZ;
  1978. break;
  1979. case 2:
  1980. sample_rate = SAMPLING_RATE_32KHZ;
  1981. break;
  1982. case 3:
  1983. sample_rate = SAMPLING_RATE_48KHZ;
  1984. break;
  1985. case 4:
  1986. sample_rate = SAMPLING_RATE_176P4KHZ;
  1987. break;
  1988. case 5:
  1989. sample_rate = SAMPLING_RATE_352P8KHZ;
  1990. break;
  1991. default:
  1992. sample_rate = SAMPLING_RATE_48KHZ;
  1993. break;
  1994. }
  1995. return sample_rate;
  1996. }
  1997. static int aux_pcm_get_sample_rate(int value)
  1998. {
  1999. int sample_rate;
  2000. switch (value) {
  2001. case 1:
  2002. sample_rate = SAMPLING_RATE_16KHZ;
  2003. break;
  2004. case 0:
  2005. default:
  2006. sample_rate = SAMPLING_RATE_8KHZ;
  2007. break;
  2008. }
  2009. return sample_rate;
  2010. }
  2011. static int tdm_get_sample_rate_val(int sample_rate)
  2012. {
  2013. int sample_rate_val = 0;
  2014. switch (sample_rate) {
  2015. case SAMPLING_RATE_8KHZ:
  2016. sample_rate_val = 0;
  2017. break;
  2018. case SAMPLING_RATE_16KHZ:
  2019. sample_rate_val = 1;
  2020. break;
  2021. case SAMPLING_RATE_32KHZ:
  2022. sample_rate_val = 2;
  2023. break;
  2024. case SAMPLING_RATE_48KHZ:
  2025. sample_rate_val = 3;
  2026. break;
  2027. case SAMPLING_RATE_176P4KHZ:
  2028. sample_rate_val = 4;
  2029. break;
  2030. case SAMPLING_RATE_352P8KHZ:
  2031. sample_rate_val = 5;
  2032. break;
  2033. default:
  2034. sample_rate_val = 3;
  2035. break;
  2036. }
  2037. return sample_rate_val;
  2038. }
  2039. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2040. {
  2041. int sample_rate_val;
  2042. switch (sample_rate) {
  2043. case SAMPLING_RATE_16KHZ:
  2044. sample_rate_val = 1;
  2045. break;
  2046. case SAMPLING_RATE_8KHZ:
  2047. default:
  2048. sample_rate_val = 0;
  2049. break;
  2050. }
  2051. return sample_rate_val;
  2052. }
  2053. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2054. struct tdm_port *port)
  2055. {
  2056. if (port) {
  2057. if (strnstr(kcontrol->id.name, "PRI",
  2058. sizeof(kcontrol->id.name))) {
  2059. port->mode = TDM_PRI;
  2060. } else if (strnstr(kcontrol->id.name, "SEC",
  2061. sizeof(kcontrol->id.name))) {
  2062. port->mode = TDM_SEC;
  2063. } else if (strnstr(kcontrol->id.name, "TERT",
  2064. sizeof(kcontrol->id.name))) {
  2065. port->mode = TDM_TERT;
  2066. } else if (strnstr(kcontrol->id.name, "QUAT",
  2067. sizeof(kcontrol->id.name))) {
  2068. port->mode = TDM_QUAT;
  2069. } else if (strnstr(kcontrol->id.name, "QUIN",
  2070. sizeof(kcontrol->id.name))) {
  2071. port->mode = TDM_QUIN;
  2072. } else {
  2073. pr_err("%s: unsupported mode in: %s\n",
  2074. __func__, kcontrol->id.name);
  2075. return -EINVAL;
  2076. }
  2077. if (strnstr(kcontrol->id.name, "RX_0",
  2078. sizeof(kcontrol->id.name)) ||
  2079. strnstr(kcontrol->id.name, "TX_0",
  2080. sizeof(kcontrol->id.name))) {
  2081. port->channel = TDM_0;
  2082. } else if (strnstr(kcontrol->id.name, "RX_1",
  2083. sizeof(kcontrol->id.name)) ||
  2084. strnstr(kcontrol->id.name, "TX_1",
  2085. sizeof(kcontrol->id.name))) {
  2086. port->channel = TDM_1;
  2087. } else if (strnstr(kcontrol->id.name, "RX_2",
  2088. sizeof(kcontrol->id.name)) ||
  2089. strnstr(kcontrol->id.name, "TX_2",
  2090. sizeof(kcontrol->id.name))) {
  2091. port->channel = TDM_2;
  2092. } else if (strnstr(kcontrol->id.name, "RX_3",
  2093. sizeof(kcontrol->id.name)) ||
  2094. strnstr(kcontrol->id.name, "TX_3",
  2095. sizeof(kcontrol->id.name))) {
  2096. port->channel = TDM_3;
  2097. } else if (strnstr(kcontrol->id.name, "RX_4",
  2098. sizeof(kcontrol->id.name)) ||
  2099. strnstr(kcontrol->id.name, "TX_4",
  2100. sizeof(kcontrol->id.name))) {
  2101. port->channel = TDM_4;
  2102. } else if (strnstr(kcontrol->id.name, "RX_5",
  2103. sizeof(kcontrol->id.name)) ||
  2104. strnstr(kcontrol->id.name, "TX_5",
  2105. sizeof(kcontrol->id.name))) {
  2106. port->channel = TDM_5;
  2107. } else if (strnstr(kcontrol->id.name, "RX_6",
  2108. sizeof(kcontrol->id.name)) ||
  2109. strnstr(kcontrol->id.name, "TX_6",
  2110. sizeof(kcontrol->id.name))) {
  2111. port->channel = TDM_6;
  2112. } else if (strnstr(kcontrol->id.name, "RX_7",
  2113. sizeof(kcontrol->id.name)) ||
  2114. strnstr(kcontrol->id.name, "TX_7",
  2115. sizeof(kcontrol->id.name))) {
  2116. port->channel = TDM_7;
  2117. } else {
  2118. pr_err("%s: unsupported channel in: %s\n",
  2119. __func__, kcontrol->id.name);
  2120. return -EINVAL;
  2121. }
  2122. } else {
  2123. return -EINVAL;
  2124. }
  2125. return 0;
  2126. }
  2127. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2128. struct snd_ctl_elem_value *ucontrol)
  2129. {
  2130. struct tdm_port port;
  2131. int ret = tdm_get_port_idx(kcontrol, &port);
  2132. if (ret) {
  2133. pr_err("%s: unsupported control: %s\n",
  2134. __func__, kcontrol->id.name);
  2135. } else {
  2136. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2137. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2138. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2139. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2140. ucontrol->value.enumerated.item[0]);
  2141. }
  2142. return ret;
  2143. }
  2144. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2145. struct snd_ctl_elem_value *ucontrol)
  2146. {
  2147. struct tdm_port port;
  2148. int ret = tdm_get_port_idx(kcontrol, &port);
  2149. if (ret) {
  2150. pr_err("%s: unsupported control: %s\n",
  2151. __func__, kcontrol->id.name);
  2152. } else {
  2153. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2154. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2155. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2156. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2157. ucontrol->value.enumerated.item[0]);
  2158. }
  2159. return ret;
  2160. }
  2161. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2162. struct snd_ctl_elem_value *ucontrol)
  2163. {
  2164. struct tdm_port port;
  2165. int ret = tdm_get_port_idx(kcontrol, &port);
  2166. if (ret) {
  2167. pr_err("%s: unsupported control: %s\n",
  2168. __func__, kcontrol->id.name);
  2169. } else {
  2170. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2171. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2172. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2173. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2174. ucontrol->value.enumerated.item[0]);
  2175. }
  2176. return ret;
  2177. }
  2178. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2179. struct snd_ctl_elem_value *ucontrol)
  2180. {
  2181. struct tdm_port port;
  2182. int ret = tdm_get_port_idx(kcontrol, &port);
  2183. if (ret) {
  2184. pr_err("%s: unsupported control: %s\n",
  2185. __func__, kcontrol->id.name);
  2186. } else {
  2187. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2188. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2189. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2190. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2191. ucontrol->value.enumerated.item[0]);
  2192. }
  2193. return ret;
  2194. }
  2195. static int tdm_get_format(int value)
  2196. {
  2197. int format = 0;
  2198. switch (value) {
  2199. case 0:
  2200. format = SNDRV_PCM_FORMAT_S16_LE;
  2201. break;
  2202. case 1:
  2203. format = SNDRV_PCM_FORMAT_S24_LE;
  2204. break;
  2205. case 2:
  2206. format = SNDRV_PCM_FORMAT_S32_LE;
  2207. break;
  2208. default:
  2209. format = SNDRV_PCM_FORMAT_S16_LE;
  2210. break;
  2211. }
  2212. return format;
  2213. }
  2214. static int tdm_get_format_val(int format)
  2215. {
  2216. int value = 0;
  2217. switch (format) {
  2218. case SNDRV_PCM_FORMAT_S16_LE:
  2219. value = 0;
  2220. break;
  2221. case SNDRV_PCM_FORMAT_S24_LE:
  2222. value = 1;
  2223. break;
  2224. case SNDRV_PCM_FORMAT_S32_LE:
  2225. value = 2;
  2226. break;
  2227. default:
  2228. value = 0;
  2229. break;
  2230. }
  2231. return value;
  2232. }
  2233. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2234. struct snd_ctl_elem_value *ucontrol)
  2235. {
  2236. struct tdm_port port;
  2237. int ret = tdm_get_port_idx(kcontrol, &port);
  2238. if (ret) {
  2239. pr_err("%s: unsupported control: %s\n",
  2240. __func__, kcontrol->id.name);
  2241. } else {
  2242. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2243. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2244. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2245. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2246. ucontrol->value.enumerated.item[0]);
  2247. }
  2248. return ret;
  2249. }
  2250. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2251. struct snd_ctl_elem_value *ucontrol)
  2252. {
  2253. struct tdm_port port;
  2254. int ret = tdm_get_port_idx(kcontrol, &port);
  2255. if (ret) {
  2256. pr_err("%s: unsupported control: %s\n",
  2257. __func__, kcontrol->id.name);
  2258. } else {
  2259. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2260. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2261. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2262. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2263. ucontrol->value.enumerated.item[0]);
  2264. }
  2265. return ret;
  2266. }
  2267. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2268. struct snd_ctl_elem_value *ucontrol)
  2269. {
  2270. struct tdm_port port;
  2271. int ret = tdm_get_port_idx(kcontrol, &port);
  2272. if (ret) {
  2273. pr_err("%s: unsupported control: %s\n",
  2274. __func__, kcontrol->id.name);
  2275. } else {
  2276. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2277. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2278. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2279. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2280. ucontrol->value.enumerated.item[0]);
  2281. }
  2282. return ret;
  2283. }
  2284. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2285. struct snd_ctl_elem_value *ucontrol)
  2286. {
  2287. struct tdm_port port;
  2288. int ret = tdm_get_port_idx(kcontrol, &port);
  2289. if (ret) {
  2290. pr_err("%s: unsupported control: %s\n",
  2291. __func__, kcontrol->id.name);
  2292. } else {
  2293. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2294. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2295. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2296. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2297. ucontrol->value.enumerated.item[0]);
  2298. }
  2299. return ret;
  2300. }
  2301. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2302. struct snd_ctl_elem_value *ucontrol)
  2303. {
  2304. struct tdm_port port;
  2305. int ret = tdm_get_port_idx(kcontrol, &port);
  2306. if (ret) {
  2307. pr_err("%s: unsupported control: %s\n",
  2308. __func__, kcontrol->id.name);
  2309. } else {
  2310. ucontrol->value.enumerated.item[0] =
  2311. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2312. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2313. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2314. ucontrol->value.enumerated.item[0]);
  2315. }
  2316. return ret;
  2317. }
  2318. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2319. struct snd_ctl_elem_value *ucontrol)
  2320. {
  2321. struct tdm_port port;
  2322. int ret = tdm_get_port_idx(kcontrol, &port);
  2323. if (ret) {
  2324. pr_err("%s: unsupported control: %s\n",
  2325. __func__, kcontrol->id.name);
  2326. } else {
  2327. tdm_rx_cfg[port.mode][port.channel].channels =
  2328. ucontrol->value.enumerated.item[0] + 1;
  2329. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2330. tdm_rx_cfg[port.mode][port.channel].channels,
  2331. ucontrol->value.enumerated.item[0] + 1);
  2332. }
  2333. return ret;
  2334. }
  2335. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2336. struct snd_ctl_elem_value *ucontrol)
  2337. {
  2338. struct tdm_port port;
  2339. int ret = tdm_get_port_idx(kcontrol, &port);
  2340. if (ret) {
  2341. pr_err("%s: unsupported control: %s\n",
  2342. __func__, kcontrol->id.name);
  2343. } else {
  2344. ucontrol->value.enumerated.item[0] =
  2345. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2346. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2347. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2348. ucontrol->value.enumerated.item[0]);
  2349. }
  2350. return ret;
  2351. }
  2352. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2353. struct snd_ctl_elem_value *ucontrol)
  2354. {
  2355. struct tdm_port port;
  2356. int ret = tdm_get_port_idx(kcontrol, &port);
  2357. if (ret) {
  2358. pr_err("%s: unsupported control: %s\n",
  2359. __func__, kcontrol->id.name);
  2360. } else {
  2361. tdm_tx_cfg[port.mode][port.channel].channels =
  2362. ucontrol->value.enumerated.item[0] + 1;
  2363. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2364. tdm_tx_cfg[port.mode][port.channel].channels,
  2365. ucontrol->value.enumerated.item[0] + 1);
  2366. }
  2367. return ret;
  2368. }
  2369. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2370. {
  2371. int idx;
  2372. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2373. sizeof("PRIM_AUX_PCM"))) {
  2374. idx = PRIM_AUX_PCM;
  2375. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2376. sizeof("SEC_AUX_PCM"))) {
  2377. idx = SEC_AUX_PCM;
  2378. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2379. sizeof("TERT_AUX_PCM"))) {
  2380. idx = TERT_AUX_PCM;
  2381. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2382. sizeof("QUAT_AUX_PCM"))) {
  2383. idx = QUAT_AUX_PCM;
  2384. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2385. sizeof("QUIN_AUX_PCM"))) {
  2386. idx = QUIN_AUX_PCM;
  2387. } else {
  2388. pr_err("%s: unsupported port: %s\n",
  2389. __func__, kcontrol->id.name);
  2390. idx = -EINVAL;
  2391. }
  2392. return idx;
  2393. }
  2394. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2395. struct snd_ctl_elem_value *ucontrol)
  2396. {
  2397. int idx = aux_pcm_get_port_idx(kcontrol);
  2398. if (idx < 0)
  2399. return idx;
  2400. aux_pcm_rx_cfg[idx].sample_rate =
  2401. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2402. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2403. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2404. ucontrol->value.enumerated.item[0]);
  2405. return 0;
  2406. }
  2407. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2408. struct snd_ctl_elem_value *ucontrol)
  2409. {
  2410. int idx = aux_pcm_get_port_idx(kcontrol);
  2411. if (idx < 0)
  2412. return idx;
  2413. ucontrol->value.enumerated.item[0] =
  2414. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2415. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2416. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2417. ucontrol->value.enumerated.item[0]);
  2418. return 0;
  2419. }
  2420. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2421. struct snd_ctl_elem_value *ucontrol)
  2422. {
  2423. int idx = aux_pcm_get_port_idx(kcontrol);
  2424. if (idx < 0)
  2425. return idx;
  2426. aux_pcm_tx_cfg[idx].sample_rate =
  2427. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2428. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2429. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2430. ucontrol->value.enumerated.item[0]);
  2431. return 0;
  2432. }
  2433. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2434. struct snd_ctl_elem_value *ucontrol)
  2435. {
  2436. int idx = aux_pcm_get_port_idx(kcontrol);
  2437. if (idx < 0)
  2438. return idx;
  2439. ucontrol->value.enumerated.item[0] =
  2440. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2441. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2442. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2443. ucontrol->value.enumerated.item[0]);
  2444. return 0;
  2445. }
  2446. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2447. {
  2448. int idx;
  2449. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2450. sizeof("PRIM_MI2S_RX"))) {
  2451. idx = PRIM_MI2S;
  2452. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2453. sizeof("SEC_MI2S_RX"))) {
  2454. idx = SEC_MI2S;
  2455. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2456. sizeof("TERT_MI2S_RX"))) {
  2457. idx = TERT_MI2S;
  2458. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2459. sizeof("QUAT_MI2S_RX"))) {
  2460. idx = QUAT_MI2S;
  2461. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2462. sizeof("QUIN_MI2S_RX"))) {
  2463. idx = QUIN_MI2S;
  2464. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2465. sizeof("PRIM_MI2S_TX"))) {
  2466. idx = PRIM_MI2S;
  2467. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2468. sizeof("SEC_MI2S_TX"))) {
  2469. idx = SEC_MI2S;
  2470. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2471. sizeof("TERT_MI2S_TX"))) {
  2472. idx = TERT_MI2S;
  2473. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2474. sizeof("QUAT_MI2S_TX"))) {
  2475. idx = QUAT_MI2S;
  2476. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2477. sizeof("QUIN_MI2S_TX"))) {
  2478. idx = QUIN_MI2S;
  2479. } else {
  2480. pr_err("%s: unsupported channel: %s\n",
  2481. __func__, kcontrol->id.name);
  2482. idx = -EINVAL;
  2483. }
  2484. return idx;
  2485. }
  2486. static int mi2s_get_sample_rate_val(int sample_rate)
  2487. {
  2488. int sample_rate_val;
  2489. switch (sample_rate) {
  2490. case SAMPLING_RATE_8KHZ:
  2491. sample_rate_val = 0;
  2492. break;
  2493. case SAMPLING_RATE_11P025KHZ:
  2494. sample_rate_val = 1;
  2495. break;
  2496. case SAMPLING_RATE_16KHZ:
  2497. sample_rate_val = 2;
  2498. break;
  2499. case SAMPLING_RATE_22P05KHZ:
  2500. sample_rate_val = 3;
  2501. break;
  2502. case SAMPLING_RATE_32KHZ:
  2503. sample_rate_val = 4;
  2504. break;
  2505. case SAMPLING_RATE_44P1KHZ:
  2506. sample_rate_val = 5;
  2507. break;
  2508. case SAMPLING_RATE_48KHZ:
  2509. sample_rate_val = 6;
  2510. break;
  2511. case SAMPLING_RATE_96KHZ:
  2512. sample_rate_val = 7;
  2513. break;
  2514. case SAMPLING_RATE_192KHZ:
  2515. sample_rate_val = 8;
  2516. break;
  2517. default:
  2518. sample_rate_val = 6;
  2519. break;
  2520. }
  2521. return sample_rate_val;
  2522. }
  2523. static int mi2s_get_sample_rate(int value)
  2524. {
  2525. int sample_rate;
  2526. switch (value) {
  2527. case 0:
  2528. sample_rate = SAMPLING_RATE_8KHZ;
  2529. break;
  2530. case 1:
  2531. sample_rate = SAMPLING_RATE_11P025KHZ;
  2532. break;
  2533. case 2:
  2534. sample_rate = SAMPLING_RATE_16KHZ;
  2535. break;
  2536. case 3:
  2537. sample_rate = SAMPLING_RATE_22P05KHZ;
  2538. break;
  2539. case 4:
  2540. sample_rate = SAMPLING_RATE_32KHZ;
  2541. break;
  2542. case 5:
  2543. sample_rate = SAMPLING_RATE_44P1KHZ;
  2544. break;
  2545. case 6:
  2546. sample_rate = SAMPLING_RATE_48KHZ;
  2547. break;
  2548. case 7:
  2549. sample_rate = SAMPLING_RATE_96KHZ;
  2550. break;
  2551. case 8:
  2552. sample_rate = SAMPLING_RATE_192KHZ;
  2553. break;
  2554. default:
  2555. sample_rate = SAMPLING_RATE_48KHZ;
  2556. break;
  2557. }
  2558. return sample_rate;
  2559. }
  2560. static int mi2s_auxpcm_get_format(int value)
  2561. {
  2562. int format;
  2563. switch (value) {
  2564. case 0:
  2565. format = SNDRV_PCM_FORMAT_S16_LE;
  2566. break;
  2567. case 1:
  2568. format = SNDRV_PCM_FORMAT_S24_LE;
  2569. break;
  2570. case 2:
  2571. format = SNDRV_PCM_FORMAT_S24_3LE;
  2572. break;
  2573. case 3:
  2574. format = SNDRV_PCM_FORMAT_S32_LE;
  2575. break;
  2576. default:
  2577. format = SNDRV_PCM_FORMAT_S16_LE;
  2578. break;
  2579. }
  2580. return format;
  2581. }
  2582. static int mi2s_auxpcm_get_format_value(int format)
  2583. {
  2584. int value;
  2585. switch (format) {
  2586. case SNDRV_PCM_FORMAT_S16_LE:
  2587. value = 0;
  2588. break;
  2589. case SNDRV_PCM_FORMAT_S24_LE:
  2590. value = 1;
  2591. break;
  2592. case SNDRV_PCM_FORMAT_S24_3LE:
  2593. value = 2;
  2594. break;
  2595. case SNDRV_PCM_FORMAT_S32_LE:
  2596. value = 3;
  2597. break;
  2598. default:
  2599. value = 0;
  2600. break;
  2601. }
  2602. return value;
  2603. }
  2604. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2605. struct snd_ctl_elem_value *ucontrol)
  2606. {
  2607. int idx = mi2s_get_port_idx(kcontrol);
  2608. if (idx < 0)
  2609. return idx;
  2610. mi2s_rx_cfg[idx].sample_rate =
  2611. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2612. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2613. idx, mi2s_rx_cfg[idx].sample_rate,
  2614. ucontrol->value.enumerated.item[0]);
  2615. return 0;
  2616. }
  2617. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2618. struct snd_ctl_elem_value *ucontrol)
  2619. {
  2620. int idx = mi2s_get_port_idx(kcontrol);
  2621. if (idx < 0)
  2622. return idx;
  2623. ucontrol->value.enumerated.item[0] =
  2624. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2625. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2626. idx, mi2s_rx_cfg[idx].sample_rate,
  2627. ucontrol->value.enumerated.item[0]);
  2628. return 0;
  2629. }
  2630. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2631. struct snd_ctl_elem_value *ucontrol)
  2632. {
  2633. int idx = mi2s_get_port_idx(kcontrol);
  2634. if (idx < 0)
  2635. return idx;
  2636. mi2s_tx_cfg[idx].sample_rate =
  2637. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2638. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2639. idx, mi2s_tx_cfg[idx].sample_rate,
  2640. ucontrol->value.enumerated.item[0]);
  2641. return 0;
  2642. }
  2643. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2644. struct snd_ctl_elem_value *ucontrol)
  2645. {
  2646. int idx = mi2s_get_port_idx(kcontrol);
  2647. if (idx < 0)
  2648. return idx;
  2649. ucontrol->value.enumerated.item[0] =
  2650. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2651. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2652. idx, mi2s_tx_cfg[idx].sample_rate,
  2653. ucontrol->value.enumerated.item[0]);
  2654. return 0;
  2655. }
  2656. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2657. struct snd_ctl_elem_value *ucontrol)
  2658. {
  2659. int idx = mi2s_get_port_idx(kcontrol);
  2660. if (idx < 0)
  2661. return idx;
  2662. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2663. idx, mi2s_rx_cfg[idx].channels);
  2664. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2665. return 0;
  2666. }
  2667. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2668. struct snd_ctl_elem_value *ucontrol)
  2669. {
  2670. int idx = mi2s_get_port_idx(kcontrol);
  2671. if (idx < 0)
  2672. return idx;
  2673. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2674. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2675. idx, mi2s_rx_cfg[idx].channels);
  2676. return 1;
  2677. }
  2678. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2679. struct snd_ctl_elem_value *ucontrol)
  2680. {
  2681. int idx = mi2s_get_port_idx(kcontrol);
  2682. if (idx < 0)
  2683. return idx;
  2684. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2685. idx, mi2s_tx_cfg[idx].channels);
  2686. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2687. return 0;
  2688. }
  2689. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2690. struct snd_ctl_elem_value *ucontrol)
  2691. {
  2692. int idx = mi2s_get_port_idx(kcontrol);
  2693. if (idx < 0)
  2694. return idx;
  2695. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2696. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2697. idx, mi2s_tx_cfg[idx].channels);
  2698. return 1;
  2699. }
  2700. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2701. struct snd_ctl_elem_value *ucontrol)
  2702. {
  2703. int idx = mi2s_get_port_idx(kcontrol);
  2704. if (idx < 0)
  2705. return idx;
  2706. ucontrol->value.enumerated.item[0] =
  2707. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2708. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2709. idx, mi2s_rx_cfg[idx].bit_format,
  2710. ucontrol->value.enumerated.item[0]);
  2711. return 0;
  2712. }
  2713. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2714. struct snd_ctl_elem_value *ucontrol)
  2715. {
  2716. int idx = mi2s_get_port_idx(kcontrol);
  2717. if (idx < 0)
  2718. return idx;
  2719. mi2s_rx_cfg[idx].bit_format =
  2720. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2721. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2722. idx, mi2s_rx_cfg[idx].bit_format,
  2723. ucontrol->value.enumerated.item[0]);
  2724. return 0;
  2725. }
  2726. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2727. struct snd_ctl_elem_value *ucontrol)
  2728. {
  2729. int idx = mi2s_get_port_idx(kcontrol);
  2730. if (idx < 0)
  2731. return idx;
  2732. ucontrol->value.enumerated.item[0] =
  2733. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2734. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2735. idx, mi2s_tx_cfg[idx].bit_format,
  2736. ucontrol->value.enumerated.item[0]);
  2737. return 0;
  2738. }
  2739. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2740. struct snd_ctl_elem_value *ucontrol)
  2741. {
  2742. int idx = mi2s_get_port_idx(kcontrol);
  2743. if (idx < 0)
  2744. return idx;
  2745. mi2s_tx_cfg[idx].bit_format =
  2746. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2747. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2748. idx, mi2s_tx_cfg[idx].bit_format,
  2749. ucontrol->value.enumerated.item[0]);
  2750. return 0;
  2751. }
  2752. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2753. struct snd_ctl_elem_value *ucontrol)
  2754. {
  2755. int idx = aux_pcm_get_port_idx(kcontrol);
  2756. if (idx < 0)
  2757. return idx;
  2758. ucontrol->value.enumerated.item[0] =
  2759. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2760. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2761. idx, aux_pcm_rx_cfg[idx].bit_format,
  2762. ucontrol->value.enumerated.item[0]);
  2763. return 0;
  2764. }
  2765. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2766. struct snd_ctl_elem_value *ucontrol)
  2767. {
  2768. int idx = aux_pcm_get_port_idx(kcontrol);
  2769. if (idx < 0)
  2770. return idx;
  2771. aux_pcm_rx_cfg[idx].bit_format =
  2772. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2773. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2774. idx, aux_pcm_rx_cfg[idx].bit_format,
  2775. ucontrol->value.enumerated.item[0]);
  2776. return 0;
  2777. }
  2778. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2779. struct snd_ctl_elem_value *ucontrol)
  2780. {
  2781. int idx = aux_pcm_get_port_idx(kcontrol);
  2782. if (idx < 0)
  2783. return idx;
  2784. ucontrol->value.enumerated.item[0] =
  2785. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2786. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2787. idx, aux_pcm_tx_cfg[idx].bit_format,
  2788. ucontrol->value.enumerated.item[0]);
  2789. return 0;
  2790. }
  2791. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2792. struct snd_ctl_elem_value *ucontrol)
  2793. {
  2794. int idx = aux_pcm_get_port_idx(kcontrol);
  2795. if (idx < 0)
  2796. return idx;
  2797. aux_pcm_tx_cfg[idx].bit_format =
  2798. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2799. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2800. idx, aux_pcm_tx_cfg[idx].bit_format,
  2801. ucontrol->value.enumerated.item[0]);
  2802. return 0;
  2803. }
  2804. static int msm_hifi_ctrl(struct snd_soc_codec *codec)
  2805. {
  2806. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  2807. struct snd_soc_card *card = codec->component.card;
  2808. struct msm_asoc_mach_data *pdata =
  2809. snd_soc_card_get_drvdata(card);
  2810. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
  2811. msm_hifi_control);
  2812. if (!pdata || !pdata->hph_en1_gpio_p) {
  2813. dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
  2814. return -EINVAL;
  2815. }
  2816. if (msm_hifi_control == MSM_HIFI_ON) {
  2817. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  2818. /* 5msec delay needed as per HW requirement */
  2819. usleep_range(5000, 5010);
  2820. } else {
  2821. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  2822. }
  2823. snd_soc_dapm_sync(dapm);
  2824. return 0;
  2825. }
  2826. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  2827. struct snd_ctl_elem_value *ucontrol)
  2828. {
  2829. pr_debug("%s: msm_hifi_control = %d\n",
  2830. __func__, msm_hifi_control);
  2831. ucontrol->value.integer.value[0] = msm_hifi_control;
  2832. return 0;
  2833. }
  2834. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  2835. struct snd_ctl_elem_value *ucontrol)
  2836. {
  2837. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  2838. dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  2839. __func__, ucontrol->value.integer.value[0]);
  2840. msm_hifi_control = ucontrol->value.integer.value[0];
  2841. msm_hifi_ctrl(codec);
  2842. return 0;
  2843. }
  2844. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2845. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2846. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2847. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2848. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2849. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2850. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2851. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2852. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2853. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2854. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2855. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2856. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2857. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2858. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2859. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2860. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2861. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2862. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2863. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2864. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2865. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2866. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2867. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2868. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2869. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2870. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2871. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2872. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2873. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2874. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2875. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2876. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2877. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2878. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2879. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2880. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2881. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2882. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2883. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2884. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2885. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2886. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2887. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2888. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2889. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2890. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2891. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2892. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2893. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2894. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2895. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2896. wsa_cdc_dma_rx_0_sample_rate,
  2897. cdc_dma_rx_sample_rate_get,
  2898. cdc_dma_rx_sample_rate_put),
  2899. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2900. wsa_cdc_dma_rx_1_sample_rate,
  2901. cdc_dma_rx_sample_rate_get,
  2902. cdc_dma_rx_sample_rate_put),
  2903. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2904. rx_cdc_dma_rx_0_sample_rate,
  2905. cdc_dma_rx_sample_rate_get,
  2906. cdc_dma_rx_sample_rate_put),
  2907. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2908. rx_cdc_dma_rx_1_sample_rate,
  2909. cdc_dma_rx_sample_rate_get,
  2910. cdc_dma_rx_sample_rate_put),
  2911. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2912. rx_cdc_dma_rx_2_sample_rate,
  2913. cdc_dma_rx_sample_rate_get,
  2914. cdc_dma_rx_sample_rate_put),
  2915. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2916. rx_cdc_dma_rx_3_sample_rate,
  2917. cdc_dma_rx_sample_rate_get,
  2918. cdc_dma_rx_sample_rate_put),
  2919. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2920. rx_cdc_dma_rx_5_sample_rate,
  2921. cdc_dma_rx_sample_rate_get,
  2922. cdc_dma_rx_sample_rate_put),
  2923. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2924. wsa_cdc_dma_tx_0_sample_rate,
  2925. cdc_dma_tx_sample_rate_get,
  2926. cdc_dma_tx_sample_rate_put),
  2927. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2928. wsa_cdc_dma_tx_1_sample_rate,
  2929. cdc_dma_tx_sample_rate_get,
  2930. cdc_dma_tx_sample_rate_put),
  2931. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2932. wsa_cdc_dma_tx_2_sample_rate,
  2933. cdc_dma_tx_sample_rate_get,
  2934. cdc_dma_tx_sample_rate_put),
  2935. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2936. tx_cdc_dma_tx_0_sample_rate,
  2937. cdc_dma_tx_sample_rate_get,
  2938. cdc_dma_tx_sample_rate_put),
  2939. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2940. tx_cdc_dma_tx_3_sample_rate,
  2941. cdc_dma_tx_sample_rate_get,
  2942. cdc_dma_tx_sample_rate_put),
  2943. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2944. tx_cdc_dma_tx_4_sample_rate,
  2945. cdc_dma_tx_sample_rate_get,
  2946. cdc_dma_tx_sample_rate_put),
  2947. };
  2948. static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
  2949. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  2950. slim_rx_ch_get, slim_rx_ch_put),
  2951. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  2952. slim_rx_ch_get, slim_rx_ch_put),
  2953. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  2954. slim_tx_ch_get, slim_tx_ch_put),
  2955. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  2956. slim_tx_ch_get, slim_tx_ch_put),
  2957. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  2958. slim_rx_ch_get, slim_rx_ch_put),
  2959. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  2960. slim_rx_ch_get, slim_rx_ch_put),
  2961. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  2962. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  2963. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  2964. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2965. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  2966. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2967. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  2968. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2969. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  2970. slim_tx_bit_format_get, slim_tx_bit_format_put),
  2971. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  2972. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2973. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  2974. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2975. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  2976. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  2977. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  2978. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2979. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  2980. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2981. };
  2982. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2983. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2984. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2985. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  2986. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  2987. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  2988. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  2989. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  2990. proxy_rx_ch_get, proxy_rx_ch_put),
  2991. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  2992. usb_audio_rx_format_get, usb_audio_rx_format_put),
  2993. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  2994. usb_audio_tx_format_get, usb_audio_tx_format_put),
  2995. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  2996. ext_disp_rx_format_get, ext_disp_rx_format_put),
  2997. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  2998. usb_audio_rx_sample_rate_get,
  2999. usb_audio_rx_sample_rate_put),
  3000. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3001. usb_audio_tx_sample_rate_get,
  3002. usb_audio_tx_sample_rate_put),
  3003. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3004. ext_disp_rx_sample_rate_get,
  3005. ext_disp_rx_sample_rate_put),
  3006. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3007. tdm_rx_sample_rate_get,
  3008. tdm_rx_sample_rate_put),
  3009. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3010. tdm_tx_sample_rate_get,
  3011. tdm_tx_sample_rate_put),
  3012. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3013. tdm_rx_format_get,
  3014. tdm_rx_format_put),
  3015. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3016. tdm_tx_format_get,
  3017. tdm_tx_format_put),
  3018. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3019. tdm_rx_ch_get,
  3020. tdm_rx_ch_put),
  3021. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3022. tdm_tx_ch_get,
  3023. tdm_tx_ch_put),
  3024. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3025. tdm_rx_sample_rate_get,
  3026. tdm_rx_sample_rate_put),
  3027. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3028. tdm_tx_sample_rate_get,
  3029. tdm_tx_sample_rate_put),
  3030. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3031. tdm_rx_format_get,
  3032. tdm_rx_format_put),
  3033. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3034. tdm_tx_format_get,
  3035. tdm_tx_format_put),
  3036. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3037. tdm_rx_ch_get,
  3038. tdm_rx_ch_put),
  3039. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3040. tdm_tx_ch_get,
  3041. tdm_tx_ch_put),
  3042. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3043. tdm_rx_sample_rate_get,
  3044. tdm_rx_sample_rate_put),
  3045. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3046. tdm_tx_sample_rate_get,
  3047. tdm_tx_sample_rate_put),
  3048. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3049. tdm_rx_format_get,
  3050. tdm_rx_format_put),
  3051. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3052. tdm_tx_format_get,
  3053. tdm_tx_format_put),
  3054. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3055. tdm_rx_ch_get,
  3056. tdm_rx_ch_put),
  3057. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3058. tdm_tx_ch_get,
  3059. tdm_tx_ch_put),
  3060. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3061. tdm_rx_sample_rate_get,
  3062. tdm_rx_sample_rate_put),
  3063. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3064. tdm_tx_sample_rate_get,
  3065. tdm_tx_sample_rate_put),
  3066. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3067. tdm_rx_format_get,
  3068. tdm_rx_format_put),
  3069. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3070. tdm_tx_format_get,
  3071. tdm_tx_format_put),
  3072. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3073. tdm_rx_ch_get,
  3074. tdm_rx_ch_put),
  3075. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3076. tdm_tx_ch_get,
  3077. tdm_tx_ch_put),
  3078. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3079. tdm_rx_sample_rate_get,
  3080. tdm_rx_sample_rate_put),
  3081. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3082. tdm_tx_sample_rate_get,
  3083. tdm_tx_sample_rate_put),
  3084. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3085. tdm_rx_format_get,
  3086. tdm_rx_format_put),
  3087. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3088. tdm_tx_format_get,
  3089. tdm_tx_format_put),
  3090. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3091. tdm_rx_ch_get,
  3092. tdm_rx_ch_put),
  3093. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3094. tdm_tx_ch_get,
  3095. tdm_tx_ch_put),
  3096. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3097. aux_pcm_rx_sample_rate_get,
  3098. aux_pcm_rx_sample_rate_put),
  3099. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3100. aux_pcm_rx_sample_rate_get,
  3101. aux_pcm_rx_sample_rate_put),
  3102. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3103. aux_pcm_rx_sample_rate_get,
  3104. aux_pcm_rx_sample_rate_put),
  3105. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3106. aux_pcm_rx_sample_rate_get,
  3107. aux_pcm_rx_sample_rate_put),
  3108. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3109. aux_pcm_rx_sample_rate_get,
  3110. aux_pcm_rx_sample_rate_put),
  3111. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3112. aux_pcm_tx_sample_rate_get,
  3113. aux_pcm_tx_sample_rate_put),
  3114. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3115. aux_pcm_tx_sample_rate_get,
  3116. aux_pcm_tx_sample_rate_put),
  3117. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3118. aux_pcm_tx_sample_rate_get,
  3119. aux_pcm_tx_sample_rate_put),
  3120. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3121. aux_pcm_tx_sample_rate_get,
  3122. aux_pcm_tx_sample_rate_put),
  3123. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3124. aux_pcm_tx_sample_rate_get,
  3125. aux_pcm_tx_sample_rate_put),
  3126. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3127. mi2s_rx_sample_rate_get,
  3128. mi2s_rx_sample_rate_put),
  3129. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3130. mi2s_rx_sample_rate_get,
  3131. mi2s_rx_sample_rate_put),
  3132. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3133. mi2s_rx_sample_rate_get,
  3134. mi2s_rx_sample_rate_put),
  3135. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3136. mi2s_rx_sample_rate_get,
  3137. mi2s_rx_sample_rate_put),
  3138. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3139. mi2s_rx_sample_rate_get,
  3140. mi2s_rx_sample_rate_put),
  3141. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3142. mi2s_tx_sample_rate_get,
  3143. mi2s_tx_sample_rate_put),
  3144. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3145. mi2s_tx_sample_rate_get,
  3146. mi2s_tx_sample_rate_put),
  3147. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3148. mi2s_tx_sample_rate_get,
  3149. mi2s_tx_sample_rate_put),
  3150. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3151. mi2s_tx_sample_rate_get,
  3152. mi2s_tx_sample_rate_put),
  3153. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3154. mi2s_tx_sample_rate_get,
  3155. mi2s_tx_sample_rate_put),
  3156. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3157. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3158. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3159. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3160. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3161. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3162. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3163. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3164. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3165. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3166. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3167. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3168. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3169. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3170. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3171. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3172. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3173. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3174. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3175. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3176. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3177. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3178. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3179. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3180. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3181. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3182. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3183. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3184. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3185. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3186. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3187. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3188. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3189. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3190. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3191. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3192. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3193. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3194. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3195. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3196. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3197. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3198. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3199. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3200. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3201. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3202. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3203. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3204. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3205. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3206. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3207. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3208. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3209. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3210. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3211. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3212. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3213. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3214. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3215. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3216. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3217. msm_hifi_put),
  3218. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3219. msm_bt_sample_rate_get,
  3220. msm_bt_sample_rate_put),
  3221. };
  3222. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  3223. int enable, bool dapm)
  3224. {
  3225. int ret = 0;
  3226. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3227. ret = tavil_cdc_mclk_enable(codec, enable);
  3228. } else {
  3229. dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
  3230. __func__);
  3231. ret = -EINVAL;
  3232. }
  3233. return ret;
  3234. }
  3235. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
  3236. int enable, bool dapm)
  3237. {
  3238. int ret = 0;
  3239. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3240. ret = tavil_cdc_mclk_tx_enable(codec, enable);
  3241. } else {
  3242. dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
  3243. __func__);
  3244. ret = -EINVAL;
  3245. }
  3246. return ret;
  3247. }
  3248. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3249. struct snd_kcontrol *kcontrol, int event)
  3250. {
  3251. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3252. pr_debug("%s: event = %d\n", __func__, event);
  3253. switch (event) {
  3254. case SND_SOC_DAPM_PRE_PMU:
  3255. return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
  3256. case SND_SOC_DAPM_POST_PMD:
  3257. return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
  3258. }
  3259. return 0;
  3260. }
  3261. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3262. struct snd_kcontrol *kcontrol, int event)
  3263. {
  3264. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3265. pr_debug("%s: event = %d\n", __func__, event);
  3266. switch (event) {
  3267. case SND_SOC_DAPM_PRE_PMU:
  3268. return msm_snd_enable_codec_ext_clk(codec, 1, true);
  3269. case SND_SOC_DAPM_POST_PMD:
  3270. return msm_snd_enable_codec_ext_clk(codec, 0, true);
  3271. }
  3272. return 0;
  3273. }
  3274. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3275. struct snd_kcontrol *k, int event)
  3276. {
  3277. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3278. struct snd_soc_card *card = codec->component.card;
  3279. struct msm_asoc_mach_data *pdata =
  3280. snd_soc_card_get_drvdata(card);
  3281. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
  3282. __func__, msm_hifi_control);
  3283. if (!pdata || !pdata->hph_en0_gpio_p) {
  3284. dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
  3285. return -EINVAL;
  3286. }
  3287. if (msm_hifi_control != MSM_HIFI_ON) {
  3288. dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
  3289. __func__);
  3290. return 0;
  3291. }
  3292. switch (event) {
  3293. case SND_SOC_DAPM_POST_PMU:
  3294. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3295. break;
  3296. case SND_SOC_DAPM_PRE_PMD:
  3297. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3298. break;
  3299. }
  3300. return 0;
  3301. }
  3302. static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
  3303. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3304. msm_mclk_event,
  3305. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3306. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3307. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3308. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3309. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3310. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3311. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3312. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3313. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3314. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3315. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3316. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3317. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3318. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3319. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3320. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3321. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3322. };
  3323. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3324. struct snd_kcontrol *kcontrol, int event)
  3325. {
  3326. struct msm_asoc_mach_data *pdata = NULL;
  3327. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3328. int ret = 0;
  3329. uint32_t dmic_idx;
  3330. int *dmic_gpio_cnt;
  3331. struct device_node *dmic_gpio;
  3332. char *wname;
  3333. wname = strpbrk(w->name, "0123");
  3334. if (!wname) {
  3335. dev_err(codec->dev, "%s: widget not found\n", __func__);
  3336. return -EINVAL;
  3337. }
  3338. ret = kstrtouint(wname, 10, &dmic_idx);
  3339. if (ret < 0) {
  3340. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  3341. __func__);
  3342. return -EINVAL;
  3343. }
  3344. pdata = snd_soc_card_get_drvdata(codec->component.card);
  3345. switch (dmic_idx) {
  3346. case 0:
  3347. case 1:
  3348. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3349. dmic_gpio = pdata->dmic01_gpio_p;
  3350. break;
  3351. case 2:
  3352. case 3:
  3353. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3354. dmic_gpio = pdata->dmic23_gpio_p;
  3355. break;
  3356. default:
  3357. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  3358. __func__);
  3359. return -EINVAL;
  3360. }
  3361. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3362. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3363. switch (event) {
  3364. case SND_SOC_DAPM_PRE_PMU:
  3365. (*dmic_gpio_cnt)++;
  3366. if (*dmic_gpio_cnt == 1) {
  3367. ret = msm_cdc_pinctrl_select_active_state(
  3368. dmic_gpio);
  3369. if (ret < 0) {
  3370. pr_err("%s: gpio set cannot be activated %sd",
  3371. __func__, "dmic_gpio");
  3372. return ret;
  3373. }
  3374. }
  3375. break;
  3376. case SND_SOC_DAPM_POST_PMD:
  3377. (*dmic_gpio_cnt)--;
  3378. if (*dmic_gpio_cnt == 0) {
  3379. ret = msm_cdc_pinctrl_select_sleep_state(
  3380. dmic_gpio);
  3381. if (ret < 0) {
  3382. pr_err("%s: gpio set cannot be de-activated %sd",
  3383. __func__, "dmic_gpio");
  3384. return ret;
  3385. }
  3386. }
  3387. break;
  3388. default:
  3389. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3390. return -EINVAL;
  3391. }
  3392. return 0;
  3393. }
  3394. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3395. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3396. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3397. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3398. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3399. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3400. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3401. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3402. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3403. };
  3404. static inline int param_is_mask(int p)
  3405. {
  3406. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3407. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3408. }
  3409. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3410. int n)
  3411. {
  3412. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3413. }
  3414. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3415. unsigned int bit)
  3416. {
  3417. if (bit >= SNDRV_MASK_MAX)
  3418. return;
  3419. if (param_is_mask(n)) {
  3420. struct snd_mask *m = param_to_mask(p, n);
  3421. m->bits[0] = 0;
  3422. m->bits[1] = 0;
  3423. m->bits[bit >> 5] |= (1 << (bit & 31));
  3424. }
  3425. }
  3426. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3427. {
  3428. int ch_id = 0;
  3429. switch (be_id) {
  3430. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3431. ch_id = SLIM_RX_0;
  3432. break;
  3433. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3434. ch_id = SLIM_RX_1;
  3435. break;
  3436. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3437. ch_id = SLIM_RX_2;
  3438. break;
  3439. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3440. ch_id = SLIM_RX_3;
  3441. break;
  3442. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3443. ch_id = SLIM_RX_4;
  3444. break;
  3445. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3446. ch_id = SLIM_RX_6;
  3447. break;
  3448. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3449. ch_id = SLIM_TX_0;
  3450. break;
  3451. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3452. ch_id = SLIM_TX_3;
  3453. break;
  3454. default:
  3455. ch_id = SLIM_RX_0;
  3456. break;
  3457. }
  3458. return ch_id;
  3459. }
  3460. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3461. {
  3462. int idx = 0;
  3463. switch (be_id) {
  3464. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3465. idx = WSA_CDC_DMA_RX_0;
  3466. break;
  3467. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3468. idx = WSA_CDC_DMA_TX_0;
  3469. break;
  3470. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3471. idx = WSA_CDC_DMA_RX_1;
  3472. break;
  3473. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3474. idx = WSA_CDC_DMA_TX_1;
  3475. break;
  3476. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3477. idx = WSA_CDC_DMA_TX_2;
  3478. break;
  3479. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3480. idx = RX_CDC_DMA_RX_0;
  3481. break;
  3482. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3483. idx = RX_CDC_DMA_RX_1;
  3484. break;
  3485. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3486. idx = RX_CDC_DMA_RX_2;
  3487. break;
  3488. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3489. idx = RX_CDC_DMA_RX_3;
  3490. break;
  3491. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3492. idx = RX_CDC_DMA_RX_5;
  3493. break;
  3494. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3495. idx = TX_CDC_DMA_TX_0;
  3496. break;
  3497. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3498. idx = TX_CDC_DMA_TX_3;
  3499. break;
  3500. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3501. idx = TX_CDC_DMA_TX_4;
  3502. break;
  3503. default:
  3504. idx = RX_CDC_DMA_RX_0;
  3505. break;
  3506. }
  3507. return idx;
  3508. }
  3509. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3510. {
  3511. int idx = -EINVAL;
  3512. switch (be_id) {
  3513. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3514. idx = DP_RX_IDX;
  3515. break;
  3516. default:
  3517. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3518. idx = -EINVAL;
  3519. break;
  3520. }
  3521. return idx;
  3522. }
  3523. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3524. struct snd_pcm_hw_params *params)
  3525. {
  3526. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3527. struct snd_interval *rate = hw_param_interval(params,
  3528. SNDRV_PCM_HW_PARAM_RATE);
  3529. struct snd_interval *channels = hw_param_interval(params,
  3530. SNDRV_PCM_HW_PARAM_CHANNELS);
  3531. int rc = 0;
  3532. int idx;
  3533. void *config = NULL;
  3534. struct snd_soc_codec *codec = NULL;
  3535. pr_debug("%s: format = %d, rate = %d\n",
  3536. __func__, params_format(params), params_rate(params));
  3537. switch (dai_link->id) {
  3538. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3539. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3540. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3541. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3542. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3543. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3544. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3545. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3546. slim_rx_cfg[idx].bit_format);
  3547. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3548. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3549. break;
  3550. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3551. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3552. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3553. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3554. slim_tx_cfg[idx].bit_format);
  3555. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3556. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3557. break;
  3558. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3559. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3560. slim_tx_cfg[1].bit_format);
  3561. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3562. channels->min = channels->max = slim_tx_cfg[1].channels;
  3563. break;
  3564. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3565. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3566. SNDRV_PCM_FORMAT_S32_LE);
  3567. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3568. channels->min = channels->max = msm_vi_feed_tx_ch;
  3569. break;
  3570. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3571. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3572. slim_rx_cfg[5].bit_format);
  3573. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3574. channels->min = channels->max = slim_rx_cfg[5].channels;
  3575. break;
  3576. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3577. codec = rtd->codec;
  3578. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3579. channels->min = channels->max = 1;
  3580. config = msm_codec_fn.get_afe_config_fn(codec,
  3581. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3582. if (config) {
  3583. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3584. config, SLIMBUS_5_TX);
  3585. if (rc)
  3586. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3587. __func__, rc);
  3588. }
  3589. break;
  3590. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3591. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3592. slim_rx_cfg[SLIM_RX_7].bit_format);
  3593. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3594. channels->min = channels->max =
  3595. slim_rx_cfg[SLIM_RX_7].channels;
  3596. break;
  3597. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3598. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3599. channels->min = channels->max =
  3600. slim_tx_cfg[SLIM_TX_7].channels;
  3601. break;
  3602. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3603. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3604. channels->min = channels->max =
  3605. slim_tx_cfg[SLIM_TX_8].channels;
  3606. break;
  3607. case MSM_BACKEND_DAI_USB_RX:
  3608. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3609. usb_rx_cfg.bit_format);
  3610. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3611. channels->min = channels->max = usb_rx_cfg.channels;
  3612. break;
  3613. case MSM_BACKEND_DAI_USB_TX:
  3614. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3615. usb_tx_cfg.bit_format);
  3616. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3617. channels->min = channels->max = usb_tx_cfg.channels;
  3618. break;
  3619. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3620. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3621. if (idx < 0) {
  3622. pr_err("%s: Incorrect ext disp idx %d\n",
  3623. __func__, idx);
  3624. rc = idx;
  3625. goto done;
  3626. }
  3627. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3628. ext_disp_rx_cfg[idx].bit_format);
  3629. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3630. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3631. break;
  3632. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3633. channels->min = channels->max = proxy_rx_cfg.channels;
  3634. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3635. break;
  3636. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3637. channels->min = channels->max =
  3638. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3639. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3640. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3641. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3642. break;
  3643. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3644. channels->min = channels->max =
  3645. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3646. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3647. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3648. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3649. break;
  3650. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3651. channels->min = channels->max =
  3652. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3653. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3654. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3655. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3656. break;
  3657. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3658. channels->min = channels->max =
  3659. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3660. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3661. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3662. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3663. break;
  3664. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3665. channels->min = channels->max =
  3666. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3667. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3668. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3669. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3670. break;
  3671. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3672. channels->min = channels->max =
  3673. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3674. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3675. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3676. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3677. break;
  3678. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3679. channels->min = channels->max =
  3680. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3681. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3682. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3683. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3684. break;
  3685. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3686. channels->min = channels->max =
  3687. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3688. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3689. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3690. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3691. break;
  3692. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3693. channels->min = channels->max =
  3694. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3695. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3696. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3697. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3698. break;
  3699. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3700. channels->min = channels->max =
  3701. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3702. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3703. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3704. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3705. break;
  3706. case MSM_BACKEND_DAI_AUXPCM_RX:
  3707. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3708. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3709. rate->min = rate->max =
  3710. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3711. channels->min = channels->max =
  3712. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3713. break;
  3714. case MSM_BACKEND_DAI_AUXPCM_TX:
  3715. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3716. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3717. rate->min = rate->max =
  3718. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3719. channels->min = channels->max =
  3720. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3721. break;
  3722. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3723. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3724. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3725. rate->min = rate->max =
  3726. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3727. channels->min = channels->max =
  3728. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3729. break;
  3730. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3731. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3732. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3733. rate->min = rate->max =
  3734. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3735. channels->min = channels->max =
  3736. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3737. break;
  3738. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3739. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3740. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3741. rate->min = rate->max =
  3742. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3743. channels->min = channels->max =
  3744. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3745. break;
  3746. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3747. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3748. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3749. rate->min = rate->max =
  3750. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3751. channels->min = channels->max =
  3752. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3753. break;
  3754. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3755. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3756. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3757. rate->min = rate->max =
  3758. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3759. channels->min = channels->max =
  3760. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3761. break;
  3762. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3763. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3764. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3765. rate->min = rate->max =
  3766. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3767. channels->min = channels->max =
  3768. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3769. break;
  3770. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3771. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3772. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3773. rate->min = rate->max =
  3774. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3775. channels->min = channels->max =
  3776. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  3777. break;
  3778. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3779. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3780. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  3781. rate->min = rate->max =
  3782. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  3783. channels->min = channels->max =
  3784. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  3785. break;
  3786. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3787. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3788. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3789. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3790. channels->min = channels->max =
  3791. mi2s_rx_cfg[PRIM_MI2S].channels;
  3792. break;
  3793. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3794. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3795. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3796. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3797. channels->min = channels->max =
  3798. mi2s_tx_cfg[PRIM_MI2S].channels;
  3799. break;
  3800. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3801. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3802. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3803. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3804. channels->min = channels->max =
  3805. mi2s_rx_cfg[SEC_MI2S].channels;
  3806. break;
  3807. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3808. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3809. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3810. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3811. channels->min = channels->max =
  3812. mi2s_tx_cfg[SEC_MI2S].channels;
  3813. break;
  3814. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3815. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3816. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3817. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3818. channels->min = channels->max =
  3819. mi2s_rx_cfg[TERT_MI2S].channels;
  3820. break;
  3821. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3822. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3823. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3824. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3825. channels->min = channels->max =
  3826. mi2s_tx_cfg[TERT_MI2S].channels;
  3827. break;
  3828. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  3829. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3830. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  3831. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  3832. channels->min = channels->max =
  3833. mi2s_rx_cfg[QUAT_MI2S].channels;
  3834. break;
  3835. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  3836. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3837. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  3838. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  3839. channels->min = channels->max =
  3840. mi2s_tx_cfg[QUAT_MI2S].channels;
  3841. break;
  3842. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  3843. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3844. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  3845. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  3846. channels->min = channels->max =
  3847. mi2s_rx_cfg[QUIN_MI2S].channels;
  3848. break;
  3849. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  3850. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3851. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  3852. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  3853. channels->min = channels->max =
  3854. mi2s_tx_cfg[QUIN_MI2S].channels;
  3855. break;
  3856. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3857. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3858. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3859. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3860. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3861. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3862. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3863. cdc_dma_rx_cfg[idx].bit_format);
  3864. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3865. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3866. break;
  3867. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3868. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3869. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3870. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_1:
  3871. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3872. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3873. cdc_dma_tx_cfg[idx].bit_format);
  3874. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3875. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3876. break;
  3877. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3878. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3879. SNDRV_PCM_FORMAT_S32_LE);
  3880. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3881. channels->min = channels->max = msm_vi_feed_tx_ch;
  3882. break;
  3883. default:
  3884. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3885. break;
  3886. }
  3887. done:
  3888. return rc;
  3889. }
  3890. static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  3891. {
  3892. int value = 0;
  3893. bool ret = 0;
  3894. struct snd_soc_card *card = codec->component.card;
  3895. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3896. struct pinctrl_state *en2_pinctrl_active;
  3897. struct pinctrl_state *en2_pinctrl_sleep;
  3898. if (!pdata->usbc_en2_gpio_p) {
  3899. if (active) {
  3900. /* if active and usbc_en2_gpio undefined, get pin */
  3901. pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
  3902. if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
  3903. dev_err(card->dev,
  3904. "%s: Can't get EN2 gpio pinctrl:%ld\n",
  3905. __func__,
  3906. PTR_ERR(pdata->usbc_en2_gpio_p));
  3907. pdata->usbc_en2_gpio_p = NULL;
  3908. return false;
  3909. }
  3910. } else {
  3911. /* if not active and usbc_en2_gpio undefined, return */
  3912. return false;
  3913. }
  3914. }
  3915. pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
  3916. "qcom,usbc-analog-en2-gpio", 0);
  3917. if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
  3918. dev_err(card->dev, "%s, property %s not in node %s",
  3919. __func__, "qcom,usbc-analog-en2-gpio",
  3920. card->dev->of_node->full_name);
  3921. return false;
  3922. }
  3923. en2_pinctrl_active = pinctrl_lookup_state(
  3924. pdata->usbc_en2_gpio_p, "aud_active");
  3925. if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
  3926. dev_err(card->dev,
  3927. "%s: Cannot get aud_active pinctrl state:%ld\n",
  3928. __func__, PTR_ERR(en2_pinctrl_active));
  3929. ret = false;
  3930. goto err_lookup_state;
  3931. }
  3932. en2_pinctrl_sleep = pinctrl_lookup_state(
  3933. pdata->usbc_en2_gpio_p, "aud_sleep");
  3934. if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
  3935. dev_err(card->dev,
  3936. "%s: Cannot get aud_sleep pinctrl state:%ld\n",
  3937. __func__, PTR_ERR(en2_pinctrl_sleep));
  3938. ret = false;
  3939. goto err_lookup_state;
  3940. }
  3941. /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
  3942. if (active) {
  3943. dev_dbg(codec->dev, "%s: enter\n", __func__);
  3944. if (pdata->usbc_en2_gpio_p) {
  3945. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  3946. if (value)
  3947. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3948. en2_pinctrl_sleep);
  3949. else
  3950. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3951. en2_pinctrl_active);
  3952. } else if (pdata->usbc_en2_gpio >= 0) {
  3953. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  3954. gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
  3955. }
  3956. pr_debug("%s: swap select switch %d to %d\n", __func__,
  3957. value, !value);
  3958. ret = true;
  3959. } else {
  3960. /* if not active, release usbc_en2_gpio_p pin */
  3961. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3962. en2_pinctrl_sleep);
  3963. }
  3964. err_lookup_state:
  3965. devm_pinctrl_put(pdata->usbc_en2_gpio_p);
  3966. pdata->usbc_en2_gpio_p = NULL;
  3967. return ret;
  3968. }
  3969. static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  3970. {
  3971. int value = 0;
  3972. bool ret = false;
  3973. struct snd_soc_card *card;
  3974. struct msm_asoc_mach_data *pdata;
  3975. if (!codec) {
  3976. pr_err("%s codec is NULL\n", __func__);
  3977. return false;
  3978. }
  3979. card = codec->component.card;
  3980. pdata = snd_soc_card_get_drvdata(card);
  3981. if (!pdata)
  3982. return false;
  3983. if (wcd_mbhc_cfg.enable_usbc_analog)
  3984. return msm_usbc_swap_gnd_mic(codec, active);
  3985. /* if usbc is not defined, swap using us_euro_gpio_p */
  3986. if (pdata->us_euro_gpio_p) {
  3987. value = msm_cdc_pinctrl_get_state(
  3988. pdata->us_euro_gpio_p);
  3989. if (value)
  3990. msm_cdc_pinctrl_select_sleep_state(
  3991. pdata->us_euro_gpio_p);
  3992. else
  3993. msm_cdc_pinctrl_select_active_state(
  3994. pdata->us_euro_gpio_p);
  3995. dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
  3996. __func__, value, !value);
  3997. ret = true;
  3998. }
  3999. return ret;
  4000. }
  4001. static int msm_afe_set_config(struct snd_soc_codec *codec)
  4002. {
  4003. int ret = 0;
  4004. void *config_data = NULL;
  4005. if (!msm_codec_fn.get_afe_config_fn) {
  4006. dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
  4007. __func__);
  4008. return -EINVAL;
  4009. }
  4010. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4011. AFE_CDC_REGISTERS_CONFIG);
  4012. if (config_data) {
  4013. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4014. if (ret) {
  4015. dev_err(codec->dev,
  4016. "%s: Failed to set codec registers config %d\n",
  4017. __func__, ret);
  4018. return ret;
  4019. }
  4020. }
  4021. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4022. AFE_CDC_REGISTER_PAGE_CONFIG);
  4023. if (config_data) {
  4024. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4025. 0);
  4026. if (ret)
  4027. dev_err(codec->dev,
  4028. "%s: Failed to set cdc register page config\n",
  4029. __func__);
  4030. }
  4031. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4032. AFE_SLIMBUS_SLAVE_CONFIG);
  4033. if (config_data) {
  4034. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4035. if (ret) {
  4036. dev_err(codec->dev,
  4037. "%s: Failed to set slimbus slave config %d\n",
  4038. __func__, ret);
  4039. return ret;
  4040. }
  4041. }
  4042. return 0;
  4043. }
  4044. static void msm_afe_clear_config(void)
  4045. {
  4046. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4047. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4048. }
  4049. static int msm_adsp_power_up_config(struct snd_soc_codec *codec,
  4050. struct snd_card *card)
  4051. {
  4052. int ret = 0;
  4053. unsigned long timeout;
  4054. int adsp_ready = 0;
  4055. bool snd_card_online = 0;
  4056. timeout = jiffies +
  4057. msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
  4058. do {
  4059. if (!snd_card_online) {
  4060. snd_card_online = snd_card_is_online_state(card);
  4061. pr_debug("%s: Sound card is %s\n", __func__,
  4062. snd_card_online ? "Online" : "Offline");
  4063. }
  4064. if (!adsp_ready) {
  4065. adsp_ready = q6core_is_adsp_ready();
  4066. pr_debug("%s: ADSP Audio is %s\n", __func__,
  4067. adsp_ready ? "ready" : "not ready");
  4068. }
  4069. if (snd_card_online && adsp_ready)
  4070. break;
  4071. /*
  4072. * Sound card/ADSP will be coming up after subsystem restart and
  4073. * it might not be fully up when the control reaches
  4074. * here. So, wait for 50msec before checking ADSP state
  4075. */
  4076. msleep(50);
  4077. } while (time_after(timeout, jiffies));
  4078. if (!snd_card_online || !adsp_ready) {
  4079. pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n",
  4080. __func__,
  4081. snd_card_online ? "Online" : "Offline",
  4082. adsp_ready ? "ready" : "not ready");
  4083. ret = -ETIMEDOUT;
  4084. goto err;
  4085. }
  4086. ret = msm_afe_set_config(codec);
  4087. if (ret)
  4088. pr_err("%s: Failed to set AFE config. err %d\n",
  4089. __func__, ret);
  4090. return 0;
  4091. err:
  4092. return ret;
  4093. }
  4094. static int sm6150_notifier_service_cb(struct notifier_block *this,
  4095. unsigned long opcode, void *ptr)
  4096. {
  4097. int ret;
  4098. struct snd_soc_card *card = NULL;
  4099. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  4100. struct snd_soc_pcm_runtime *rtd;
  4101. struct snd_soc_codec *codec;
  4102. pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
  4103. switch (opcode) {
  4104. case AUDIO_NOTIFIER_SERVICE_DOWN:
  4105. /*
  4106. * Use flag to ignore initial boot notifications
  4107. * On initial boot msm_adsp_power_up_config is
  4108. * called on init. There is no need to clear
  4109. * and set the config again on initial boot.
  4110. */
  4111. if (is_initial_boot)
  4112. break;
  4113. msm_afe_clear_config();
  4114. break;
  4115. case AUDIO_NOTIFIER_SERVICE_UP:
  4116. if (is_initial_boot) {
  4117. is_initial_boot = false;
  4118. break;
  4119. }
  4120. if (!spdev)
  4121. return -EINVAL;
  4122. card = platform_get_drvdata(spdev);
  4123. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  4124. if (!rtd) {
  4125. dev_err(card->dev,
  4126. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  4127. __func__, be_dl_name);
  4128. ret = -EINVAL;
  4129. goto err;
  4130. }
  4131. codec = rtd->codec;
  4132. ret = msm_adsp_power_up_config(codec, card->snd_card);
  4133. if (ret < 0) {
  4134. dev_err(card->dev,
  4135. "%s: msm_adsp_power_up_config failed ret = %d!\n",
  4136. __func__, ret);
  4137. goto err;
  4138. }
  4139. break;
  4140. default:
  4141. break;
  4142. }
  4143. err:
  4144. return NOTIFY_OK;
  4145. }
  4146. static struct notifier_block service_nb = {
  4147. .notifier_call = sm6150_notifier_service_cb,
  4148. .priority = -INT_MAX,
  4149. };
  4150. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4151. {
  4152. int ret = 0;
  4153. void *config_data;
  4154. struct snd_soc_codec *codec = rtd->codec;
  4155. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4156. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4157. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4158. struct snd_soc_component *aux_comp;
  4159. struct snd_card *card;
  4160. struct snd_info_entry *entry;
  4161. struct msm_asoc_mach_data *pdata =
  4162. snd_soc_card_get_drvdata(rtd->card);
  4163. /*
  4164. * Codec SLIMBUS configuration
  4165. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4166. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4167. * TX14, TX15, TX16
  4168. */
  4169. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4170. 150, 151};
  4171. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4172. 134, 135, 136, 137, 138, 139,
  4173. 140, 141, 142, 143};
  4174. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4175. rtd->pmdown_time = 0;
  4176. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  4177. ARRAY_SIZE(msm_tavil_snd_controls));
  4178. if (ret < 0) {
  4179. pr_err("%s: add_codec_controls failed, err %d\n",
  4180. __func__, ret);
  4181. return ret;
  4182. }
  4183. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4184. ARRAY_SIZE(msm_common_snd_controls));
  4185. if (ret < 0) {
  4186. pr_err("%s: add_codec_controls failed, err %d\n",
  4187. __func__, ret);
  4188. return ret;
  4189. }
  4190. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
  4191. ARRAY_SIZE(msm_dapm_widgets_tavil));
  4192. snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
  4193. ARRAY_SIZE(wcd_audio_paths_tavil));
  4194. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4195. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4196. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4197. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4198. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4199. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4200. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4201. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4202. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4203. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4204. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4205. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4206. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4207. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4208. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4209. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4210. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4211. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4212. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4213. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4214. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4215. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4216. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4217. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4218. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4219. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4220. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4221. snd_soc_dapm_sync(dapm);
  4222. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4223. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4224. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4225. ret = msm_adsp_power_up_config(codec, rtd->card->snd_card);
  4226. if (ret) {
  4227. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4228. goto err;
  4229. }
  4230. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4231. AFE_AANC_VERSION);
  4232. if (config_data) {
  4233. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4234. if (ret) {
  4235. pr_err("%s: Failed to set aanc version %d\n",
  4236. __func__, ret);
  4237. goto err;
  4238. }
  4239. }
  4240. /*
  4241. * Send speaker configuration only for WSA8810.
  4242. * Default configuration is for WSA8815.
  4243. */
  4244. pr_debug("%s: Number of aux devices: %d\n",
  4245. __func__, rtd->card->num_aux_devs);
  4246. if (rtd->card->num_aux_devs &&
  4247. !list_empty(&rtd->card->aux_comp_list)) {
  4248. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4249. struct snd_soc_component, card_aux_list);
  4250. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4251. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4252. tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
  4253. tavil_set_spkr_gain_offset(rtd->codec,
  4254. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4255. }
  4256. }
  4257. card = rtd->card->snd_card;
  4258. entry = snd_info_create_subdir(card->module, "codecs",
  4259. card->proc_root);
  4260. if (!entry) {
  4261. pr_debug("%s: Cannot create codecs module entry\n",
  4262. __func__);
  4263. ret = 0;
  4264. goto err;
  4265. }
  4266. pdata->codec_root = entry;
  4267. tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
  4268. codec_reg_done = true;
  4269. return 0;
  4270. err:
  4271. return ret;
  4272. }
  4273. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4274. {
  4275. int ret = 0;
  4276. struct snd_soc_codec *codec = rtd->codec;
  4277. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4278. struct snd_card *card;
  4279. struct snd_info_entry *entry;
  4280. struct msm_asoc_mach_data *pdata =
  4281. snd_soc_card_get_drvdata(rtd->card);
  4282. ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
  4283. ARRAY_SIZE(msm_int_snd_controls));
  4284. if (ret < 0) {
  4285. pr_err("%s: add_codec_controls failed: %d\n",
  4286. __func__, ret);
  4287. return ret;
  4288. }
  4289. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4290. ARRAY_SIZE(msm_common_snd_controls));
  4291. if (ret < 0) {
  4292. pr_err("%s: add common snd controls failed: %d\n",
  4293. __func__, ret);
  4294. return ret;
  4295. }
  4296. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4297. ARRAY_SIZE(msm_int_dapm_widgets));
  4298. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4299. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4300. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4301. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4302. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4303. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4304. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4305. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4306. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4307. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4308. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4309. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4310. snd_soc_dapm_sync(dapm);
  4311. card = rtd->card->snd_card;
  4312. entry = snd_info_create_subdir(card->module, "codecs",
  4313. card->proc_root);
  4314. if (!entry) {
  4315. pr_debug("%s: Cannot create codecs module entry\n",
  4316. __func__);
  4317. ret = 0;
  4318. goto err;
  4319. }
  4320. pdata->codec_root = entry;
  4321. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4322. codec_reg_done = true;
  4323. return 0;
  4324. err:
  4325. return ret;
  4326. }
  4327. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4328. {
  4329. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4330. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4331. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4332. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4333. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4334. }
  4335. static void *def_wcd_mbhc_cal(void)
  4336. {
  4337. void *wcd_mbhc_cal;
  4338. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4339. u16 *btn_high;
  4340. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4341. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4342. if (!wcd_mbhc_cal)
  4343. return NULL;
  4344. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4345. S(v_hs_max, 1600);
  4346. #undef S
  4347. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4348. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4349. #undef S
  4350. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4351. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4352. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4353. btn_high[0] = 75;
  4354. btn_high[1] = 150;
  4355. btn_high[2] = 237;
  4356. btn_high[3] = 500;
  4357. btn_high[4] = 500;
  4358. btn_high[5] = 500;
  4359. btn_high[6] = 500;
  4360. btn_high[7] = 500;
  4361. return wcd_mbhc_cal;
  4362. }
  4363. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4364. struct snd_pcm_hw_params *params)
  4365. {
  4366. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4367. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4368. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4369. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4370. int ret = 0;
  4371. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4372. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4373. u32 user_set_tx_ch = 0;
  4374. u32 rx_ch_count;
  4375. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4376. ret = snd_soc_dai_get_channel_map(codec_dai,
  4377. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4378. if (ret < 0) {
  4379. pr_err("%s: failed to get codec chan map, err:%d\n",
  4380. __func__, ret);
  4381. goto err;
  4382. }
  4383. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4384. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4385. slim_rx_cfg[5].channels);
  4386. rx_ch_count = slim_rx_cfg[5].channels;
  4387. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4388. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4389. slim_rx_cfg[2].channels);
  4390. rx_ch_count = slim_rx_cfg[2].channels;
  4391. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4392. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4393. slim_rx_cfg[6].channels);
  4394. rx_ch_count = slim_rx_cfg[6].channels;
  4395. } else {
  4396. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4397. slim_rx_cfg[0].channels);
  4398. rx_ch_count = slim_rx_cfg[0].channels;
  4399. }
  4400. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4401. rx_ch_count, rx_ch);
  4402. if (ret < 0) {
  4403. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4404. __func__, ret);
  4405. goto err;
  4406. }
  4407. } else {
  4408. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4409. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4410. ret = snd_soc_dai_get_channel_map(codec_dai,
  4411. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4412. if (ret < 0) {
  4413. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4414. __func__, ret);
  4415. goto err;
  4416. }
  4417. /* For <codec>_tx1 case */
  4418. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4419. user_set_tx_ch = slim_tx_cfg[0].channels;
  4420. /* For <codec>_tx3 case */
  4421. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4422. user_set_tx_ch = slim_tx_cfg[1].channels;
  4423. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4424. user_set_tx_ch = msm_vi_feed_tx_ch;
  4425. else
  4426. user_set_tx_ch = tx_ch_cnt;
  4427. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4428. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4429. tx_ch_cnt, dai_link->id);
  4430. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4431. user_set_tx_ch, tx_ch, 0, 0);
  4432. if (ret < 0)
  4433. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4434. __func__, ret);
  4435. }
  4436. err:
  4437. return ret;
  4438. }
  4439. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4440. struct snd_pcm_hw_params *params)
  4441. {
  4442. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4443. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4444. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4445. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4446. int ret = 0;
  4447. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4448. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4449. u32 user_set_tx_ch = 0;
  4450. u32 user_set_rx_ch = 0;
  4451. u32 ch_id;
  4452. ret = snd_soc_dai_get_channel_map(codec_dai,
  4453. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4454. &rx_ch_cdc_dma);
  4455. if (ret < 0) {
  4456. pr_err("%s: failed to get codec chan map, err:%d\n",
  4457. __func__, ret);
  4458. goto err;
  4459. }
  4460. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4461. switch (dai_link->id) {
  4462. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4463. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4464. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4465. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4466. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4467. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4468. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4469. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4470. {
  4471. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4472. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4473. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4474. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4475. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4476. user_set_rx_ch, &rx_ch_cdc_dma);
  4477. if (ret < 0) {
  4478. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4479. __func__, ret);
  4480. goto err;
  4481. }
  4482. }
  4483. break;
  4484. }
  4485. } else {
  4486. switch (dai_link->id) {
  4487. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4488. {
  4489. user_set_tx_ch = msm_vi_feed_tx_ch;
  4490. }
  4491. break;
  4492. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4493. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4494. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4495. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_1:
  4496. {
  4497. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4498. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4499. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4500. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4501. }
  4502. break;
  4503. }
  4504. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4505. &tx_ch_cdc_dma, 0, 0);
  4506. if (ret < 0) {
  4507. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4508. __func__, ret);
  4509. goto err;
  4510. }
  4511. }
  4512. err:
  4513. return ret;
  4514. }
  4515. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4516. struct snd_pcm_hw_params *params)
  4517. {
  4518. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4519. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4520. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4521. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4522. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4523. unsigned int num_tx_ch = 0;
  4524. unsigned int num_rx_ch = 0;
  4525. int ret = 0;
  4526. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4527. num_rx_ch = params_channels(params);
  4528. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4529. codec_dai->name, codec_dai->id, num_rx_ch);
  4530. ret = snd_soc_dai_get_channel_map(codec_dai,
  4531. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4532. if (ret < 0) {
  4533. pr_err("%s: failed to get codec chan map, err:%d\n",
  4534. __func__, ret);
  4535. goto err;
  4536. }
  4537. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4538. num_rx_ch, rx_ch);
  4539. if (ret < 0) {
  4540. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4541. __func__, ret);
  4542. goto err;
  4543. }
  4544. } else {
  4545. num_tx_ch = params_channels(params);
  4546. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4547. codec_dai->name, codec_dai->id, num_tx_ch);
  4548. ret = snd_soc_dai_get_channel_map(codec_dai,
  4549. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4550. if (ret < 0) {
  4551. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4552. __func__, ret);
  4553. goto err;
  4554. }
  4555. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4556. num_tx_ch, tx_ch, 0, 0);
  4557. if (ret < 0) {
  4558. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4559. __func__, ret);
  4560. goto err;
  4561. }
  4562. }
  4563. err:
  4564. return ret;
  4565. }
  4566. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4567. struct snd_pcm_hw_params *params)
  4568. {
  4569. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4570. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4571. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4572. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4573. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4574. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4575. int ret;
  4576. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4577. codec_dai->name, codec_dai->id);
  4578. ret = snd_soc_dai_get_channel_map(codec_dai,
  4579. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4580. if (ret) {
  4581. dev_err(rtd->dev,
  4582. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4583. __func__, ret);
  4584. goto err;
  4585. }
  4586. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4587. __func__, tx_ch_cnt, dai_link->id);
  4588. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4589. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4590. if (ret)
  4591. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4592. __func__, ret);
  4593. err:
  4594. return ret;
  4595. }
  4596. static int msm_get_port_id(int be_id)
  4597. {
  4598. int afe_port_id;
  4599. switch (be_id) {
  4600. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4601. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4602. break;
  4603. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4604. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4605. break;
  4606. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4607. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4608. break;
  4609. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4610. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4611. break;
  4612. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4613. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4614. break;
  4615. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4616. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4617. break;
  4618. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4619. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4620. break;
  4621. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4622. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4623. break;
  4624. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4625. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4626. break;
  4627. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4628. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4629. break;
  4630. default:
  4631. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4632. afe_port_id = -EINVAL;
  4633. }
  4634. return afe_port_id;
  4635. }
  4636. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4637. {
  4638. u32 bit_per_sample;
  4639. switch (bit_format) {
  4640. case SNDRV_PCM_FORMAT_S32_LE:
  4641. case SNDRV_PCM_FORMAT_S24_3LE:
  4642. case SNDRV_PCM_FORMAT_S24_LE:
  4643. bit_per_sample = 32;
  4644. break;
  4645. case SNDRV_PCM_FORMAT_S16_LE:
  4646. default:
  4647. bit_per_sample = 16;
  4648. break;
  4649. }
  4650. return bit_per_sample;
  4651. }
  4652. static void update_mi2s_clk_val(int dai_id, int stream)
  4653. {
  4654. u32 bit_per_sample;
  4655. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4656. bit_per_sample =
  4657. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4658. mi2s_clk[dai_id].clk_freq_in_hz =
  4659. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4660. } else {
  4661. bit_per_sample =
  4662. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4663. mi2s_clk[dai_id].clk_freq_in_hz =
  4664. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4665. }
  4666. }
  4667. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4668. {
  4669. int ret = 0;
  4670. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4671. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4672. int port_id = 0;
  4673. int index = cpu_dai->id;
  4674. port_id = msm_get_port_id(rtd->dai_link->id);
  4675. if (port_id < 0) {
  4676. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4677. ret = port_id;
  4678. goto err;
  4679. }
  4680. if (enable) {
  4681. update_mi2s_clk_val(index, substream->stream);
  4682. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4683. mi2s_clk[index].clk_freq_in_hz);
  4684. }
  4685. mi2s_clk[index].enable = enable;
  4686. ret = afe_set_lpass_clock_v2(port_id,
  4687. &mi2s_clk[index]);
  4688. if (ret < 0) {
  4689. dev_err(rtd->card->dev,
  4690. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4691. __func__, port_id, ret);
  4692. goto err;
  4693. }
  4694. err:
  4695. return ret;
  4696. }
  4697. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  4698. enum pinctrl_pin_state new_state)
  4699. {
  4700. int ret = 0;
  4701. int curr_state = 0;
  4702. if (pinctrl_info == NULL) {
  4703. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4704. ret = -EINVAL;
  4705. goto err;
  4706. }
  4707. if (pinctrl_info->pinctrl == NULL) {
  4708. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  4709. ret = -EINVAL;
  4710. goto err;
  4711. }
  4712. curr_state = pinctrl_info->curr_state;
  4713. pinctrl_info->curr_state = new_state;
  4714. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  4715. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  4716. if (curr_state == pinctrl_info->curr_state) {
  4717. pr_debug("%s: Already in same state\n", __func__);
  4718. goto err;
  4719. }
  4720. if (curr_state != STATE_DISABLE &&
  4721. pinctrl_info->curr_state != STATE_DISABLE) {
  4722. pr_debug("%s: state already active cannot switch\n", __func__);
  4723. ret = -EIO;
  4724. goto err;
  4725. }
  4726. switch (pinctrl_info->curr_state) {
  4727. case STATE_MI2S_ACTIVE:
  4728. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4729. pinctrl_info->mi2s_active);
  4730. if (ret) {
  4731. pr_err("%s: MI2S state select failed with %d\n",
  4732. __func__, ret);
  4733. ret = -EIO;
  4734. goto err;
  4735. }
  4736. break;
  4737. case STATE_TDM_ACTIVE:
  4738. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4739. pinctrl_info->tdm_active);
  4740. if (ret) {
  4741. pr_err("%s: TDM state select failed with %d\n",
  4742. __func__, ret);
  4743. ret = -EIO;
  4744. goto err;
  4745. }
  4746. break;
  4747. case STATE_DISABLE:
  4748. if (curr_state == STATE_MI2S_ACTIVE) {
  4749. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4750. pinctrl_info->mi2s_disable);
  4751. } else {
  4752. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4753. pinctrl_info->tdm_disable);
  4754. }
  4755. if (ret) {
  4756. pr_err("%s: state disable failed with %d\n",
  4757. __func__, ret);
  4758. ret = -EIO;
  4759. goto err;
  4760. }
  4761. break;
  4762. default:
  4763. pr_err("%s: TLMM pin state is invalid\n", __func__);
  4764. return -EINVAL;
  4765. }
  4766. err:
  4767. return ret;
  4768. }
  4769. static int msm_get_pinctrl(struct platform_device *pdev)
  4770. {
  4771. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4772. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4773. struct msm_pinctrl_info *pinctrl_info = NULL;
  4774. struct pinctrl *pinctrl;
  4775. int ret = 0;
  4776. pinctrl_info = &pdata->pinctrl_info;
  4777. if (pinctrl_info == NULL) {
  4778. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4779. return -EINVAL;
  4780. }
  4781. pinctrl = devm_pinctrl_get(&pdev->dev);
  4782. if (IS_ERR_OR_NULL(pinctrl)) {
  4783. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  4784. return -EINVAL;
  4785. }
  4786. pinctrl_info->pinctrl = pinctrl;
  4787. /* get all the states handles from Device Tree */
  4788. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  4789. "quat-mi2s-sleep");
  4790. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  4791. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  4792. goto err;
  4793. }
  4794. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  4795. "quat-mi2s-active");
  4796. if (IS_ERR(pinctrl_info->mi2s_active)) {
  4797. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  4798. goto err;
  4799. }
  4800. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  4801. "quat-tdm-sleep");
  4802. if (IS_ERR(pinctrl_info->tdm_disable)) {
  4803. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  4804. goto err;
  4805. }
  4806. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  4807. "quat-tdm-active");
  4808. if (IS_ERR(pinctrl_info->tdm_active)) {
  4809. pr_err("%s: could not get tdm_active pinstate\n",
  4810. __func__);
  4811. goto err;
  4812. }
  4813. /* Reset the TLMM pins to a default state */
  4814. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4815. pinctrl_info->mi2s_disable);
  4816. if (ret != 0) {
  4817. pr_err("%s: Disable TLMM pins failed with %d\n",
  4818. __func__, ret);
  4819. ret = -EIO;
  4820. goto err;
  4821. }
  4822. pinctrl_info->curr_state = STATE_DISABLE;
  4823. return 0;
  4824. err:
  4825. devm_pinctrl_put(pinctrl);
  4826. pinctrl_info->pinctrl = NULL;
  4827. return -EINVAL;
  4828. }
  4829. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  4830. struct snd_pcm_hw_params *params)
  4831. {
  4832. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4833. struct snd_interval *rate = hw_param_interval(params,
  4834. SNDRV_PCM_HW_PARAM_RATE);
  4835. struct snd_interval *channels = hw_param_interval(params,
  4836. SNDRV_PCM_HW_PARAM_CHANNELS);
  4837. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  4838. channels->min = channels->max =
  4839. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4840. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4841. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  4842. rate->min = rate->max =
  4843. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  4844. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  4845. channels->min = channels->max =
  4846. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4847. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4848. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  4849. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  4850. } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
  4851. channels->min = channels->max =
  4852. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4853. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4854. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  4855. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  4856. } else {
  4857. pr_err("%s: dai id 0x%x not supported\n",
  4858. __func__, cpu_dai->id);
  4859. return -EINVAL;
  4860. }
  4861. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  4862. __func__, cpu_dai->id, channels->max, rate->max,
  4863. params_format(params));
  4864. return 0;
  4865. }
  4866. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4867. struct snd_pcm_hw_params *params)
  4868. {
  4869. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4870. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4871. int ret = 0;
  4872. int slot_width = 32;
  4873. int channels, slots;
  4874. unsigned int slot_mask, rate, clk_freq;
  4875. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4876. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4877. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4878. switch (cpu_dai->id) {
  4879. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4880. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4881. break;
  4882. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4883. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4884. break;
  4885. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4886. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4887. break;
  4888. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4889. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4890. break;
  4891. case AFE_PORT_ID_QUINARY_TDM_RX:
  4892. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4893. break;
  4894. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4895. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  4896. break;
  4897. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4898. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  4899. break;
  4900. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4901. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  4902. break;
  4903. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4904. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  4905. break;
  4906. case AFE_PORT_ID_QUINARY_TDM_TX:
  4907. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  4908. break;
  4909. default:
  4910. pr_err("%s: dai id 0x%x not supported\n",
  4911. __func__, cpu_dai->id);
  4912. return -EINVAL;
  4913. }
  4914. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4915. /*2 slot config - bits 0 and 1 set for the first two slots */
  4916. slot_mask = 0x0000FFFF >> (16-slots);
  4917. channels = slots;
  4918. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  4919. __func__, slot_width, slots);
  4920. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  4921. slots, slot_width);
  4922. if (ret < 0) {
  4923. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  4924. __func__, ret);
  4925. goto end;
  4926. }
  4927. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4928. 0, NULL, channels, slot_offset);
  4929. if (ret < 0) {
  4930. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  4931. __func__, ret);
  4932. goto end;
  4933. }
  4934. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  4935. /*2 slot config - bits 0 and 1 set for the first two slots */
  4936. slot_mask = 0x0000FFFF >> (16-slots);
  4937. channels = slots;
  4938. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  4939. __func__, slot_width, slots);
  4940. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  4941. slots, slot_width);
  4942. if (ret < 0) {
  4943. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  4944. __func__, ret);
  4945. goto end;
  4946. }
  4947. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4948. channels, slot_offset, 0, NULL);
  4949. if (ret < 0) {
  4950. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  4951. __func__, ret);
  4952. goto end;
  4953. }
  4954. } else {
  4955. ret = -EINVAL;
  4956. pr_err("%s: invalid use case, err:%d\n",
  4957. __func__, ret);
  4958. goto end;
  4959. }
  4960. rate = params_rate(params);
  4961. clk_freq = rate * slot_width * slots;
  4962. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  4963. if (ret < 0)
  4964. pr_err("%s: failed to set tdm clk, err:%d\n",
  4965. __func__, ret);
  4966. end:
  4967. return ret;
  4968. }
  4969. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  4970. {
  4971. int ret = 0;
  4972. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4973. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4974. struct snd_soc_card *card = rtd->card;
  4975. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4976. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4977. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4978. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  4979. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  4980. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  4981. if (ret)
  4982. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  4983. __func__, ret);
  4984. }
  4985. return ret;
  4986. }
  4987. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  4988. {
  4989. int ret = 0;
  4990. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4991. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4992. struct snd_soc_card *card = rtd->card;
  4993. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4994. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4995. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4996. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  4997. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  4998. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  4999. if (ret)
  5000. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5001. __func__, ret);
  5002. }
  5003. }
  5004. static struct snd_soc_ops sm6150_tdm_be_ops = {
  5005. .hw_params = sm6150_tdm_snd_hw_params,
  5006. .startup = sm6150_tdm_snd_startup,
  5007. .shutdown = sm6150_tdm_snd_shutdown
  5008. };
  5009. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  5010. {
  5011. cpumask_t mask;
  5012. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  5013. pm_qos_remove_request(&substream->latency_pm_qos_req);
  5014. cpumask_clear(&mask);
  5015. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  5016. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  5017. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  5018. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  5019. pm_qos_add_request(&substream->latency_pm_qos_req,
  5020. PM_QOS_CPU_DMA_LATENCY,
  5021. MSM_LL_QOS_VALUE);
  5022. return 0;
  5023. }
  5024. static struct snd_soc_ops msm_fe_qos_ops = {
  5025. .prepare = msm_fe_qos_prepare,
  5026. };
  5027. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  5028. {
  5029. int ret = 0;
  5030. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5031. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5032. int index = cpu_dai->id;
  5033. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  5034. struct snd_soc_card *card = rtd->card;
  5035. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5036. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5037. int ret_pinctrl = 0;
  5038. dev_dbg(rtd->card->dev,
  5039. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  5040. __func__, substream->name, substream->stream,
  5041. cpu_dai->name, cpu_dai->id);
  5042. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5043. ret = -EINVAL;
  5044. dev_err(rtd->card->dev,
  5045. "%s: CPU DAI id (%d) out of range\n",
  5046. __func__, cpu_dai->id);
  5047. goto err;
  5048. }
  5049. /*
  5050. * Mutex protection in case the same MI2S
  5051. * interface using for both TX and RX so
  5052. * that the same clock won't be enable twice.
  5053. */
  5054. mutex_lock(&mi2s_intf_conf[index].lock);
  5055. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  5056. /* Check if msm needs to provide the clock to the interface */
  5057. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  5058. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  5059. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5060. }
  5061. ret = msm_mi2s_set_sclk(substream, true);
  5062. if (ret < 0) {
  5063. dev_err(rtd->card->dev,
  5064. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5065. __func__, ret);
  5066. goto clean_up;
  5067. }
  5068. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5069. if (ret < 0) {
  5070. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5071. __func__, index, ret);
  5072. goto clk_off;
  5073. }
  5074. if (index == QUAT_MI2S) {
  5075. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5076. STATE_MI2S_ACTIVE);
  5077. if (ret_pinctrl)
  5078. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5079. __func__, ret_pinctrl);
  5080. }
  5081. }
  5082. clk_off:
  5083. if (ret < 0)
  5084. msm_mi2s_set_sclk(substream, false);
  5085. clean_up:
  5086. if (ret < 0)
  5087. mi2s_intf_conf[index].ref_cnt--;
  5088. mutex_unlock(&mi2s_intf_conf[index].lock);
  5089. err:
  5090. return ret;
  5091. }
  5092. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5093. {
  5094. int ret;
  5095. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5096. int index = rtd->cpu_dai->id;
  5097. struct snd_soc_card *card = rtd->card;
  5098. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5099. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5100. int ret_pinctrl = 0;
  5101. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5102. substream->name, substream->stream);
  5103. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5104. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5105. return;
  5106. }
  5107. mutex_lock(&mi2s_intf_conf[index].lock);
  5108. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5109. ret = msm_mi2s_set_sclk(substream, false);
  5110. if (ret < 0)
  5111. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5112. __func__, index, ret);
  5113. if (index == QUAT_MI2S) {
  5114. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5115. STATE_DISABLE);
  5116. if (ret_pinctrl)
  5117. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5118. __func__, ret_pinctrl);
  5119. }
  5120. }
  5121. mutex_unlock(&mi2s_intf_conf[index].lock);
  5122. }
  5123. static struct snd_soc_ops msm_mi2s_be_ops = {
  5124. .startup = msm_mi2s_snd_startup,
  5125. .shutdown = msm_mi2s_snd_shutdown,
  5126. };
  5127. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5128. .hw_params = msm_snd_cdc_dma_hw_params,
  5129. };
  5130. static struct snd_soc_ops msm_be_ops = {
  5131. .hw_params = msm_snd_hw_params,
  5132. };
  5133. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5134. .hw_params = msm_slimbus_2_hw_params,
  5135. };
  5136. static struct snd_soc_ops msm_wcn_ops = {
  5137. .hw_params = msm_wcn_hw_params,
  5138. };
  5139. /* Digital audio interface glue - connects codec <---> CPU */
  5140. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5141. /* FrontEnd DAI Links */
  5142. {
  5143. .name = MSM_DAILINK_NAME(Media1),
  5144. .stream_name = "MultiMedia1",
  5145. .cpu_dai_name = "MultiMedia1",
  5146. .platform_name = "msm-pcm-dsp.0",
  5147. .dynamic = 1,
  5148. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5149. .dpcm_playback = 1,
  5150. .dpcm_capture = 1,
  5151. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5152. SND_SOC_DPCM_TRIGGER_POST},
  5153. .codec_dai_name = "snd-soc-dummy-dai",
  5154. .codec_name = "snd-soc-dummy",
  5155. .ignore_suspend = 1,
  5156. /* this dainlink has playback support */
  5157. .ignore_pmdown_time = 1,
  5158. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5159. },
  5160. {
  5161. .name = MSM_DAILINK_NAME(Media2),
  5162. .stream_name = "MultiMedia2",
  5163. .cpu_dai_name = "MultiMedia2",
  5164. .platform_name = "msm-pcm-dsp.0",
  5165. .dynamic = 1,
  5166. .dpcm_playback = 1,
  5167. .dpcm_capture = 1,
  5168. .codec_dai_name = "snd-soc-dummy-dai",
  5169. .codec_name = "snd-soc-dummy",
  5170. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5171. SND_SOC_DPCM_TRIGGER_POST},
  5172. .ignore_suspend = 1,
  5173. /* this dainlink has playback support */
  5174. .ignore_pmdown_time = 1,
  5175. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5176. },
  5177. {
  5178. .name = "VoiceMMode1",
  5179. .stream_name = "VoiceMMode1",
  5180. .cpu_dai_name = "VoiceMMode1",
  5181. .platform_name = "msm-pcm-voice",
  5182. .dynamic = 1,
  5183. .dpcm_playback = 1,
  5184. .dpcm_capture = 1,
  5185. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5186. SND_SOC_DPCM_TRIGGER_POST},
  5187. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5188. .ignore_suspend = 1,
  5189. .ignore_pmdown_time = 1,
  5190. .codec_dai_name = "snd-soc-dummy-dai",
  5191. .codec_name = "snd-soc-dummy",
  5192. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5193. },
  5194. {
  5195. .name = "MSM VoIP",
  5196. .stream_name = "VoIP",
  5197. .cpu_dai_name = "VoIP",
  5198. .platform_name = "msm-voip-dsp",
  5199. .dynamic = 1,
  5200. .dpcm_playback = 1,
  5201. .dpcm_capture = 1,
  5202. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5203. SND_SOC_DPCM_TRIGGER_POST},
  5204. .codec_dai_name = "snd-soc-dummy-dai",
  5205. .codec_name = "snd-soc-dummy",
  5206. .ignore_suspend = 1,
  5207. /* this dainlink has playback support */
  5208. .ignore_pmdown_time = 1,
  5209. .id = MSM_FRONTEND_DAI_VOIP,
  5210. },
  5211. {
  5212. .name = MSM_DAILINK_NAME(ULL),
  5213. .stream_name = "MultiMedia3",
  5214. .cpu_dai_name = "MultiMedia3",
  5215. .platform_name = "msm-pcm-dsp.2",
  5216. .dynamic = 1,
  5217. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5218. .dpcm_playback = 1,
  5219. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5220. SND_SOC_DPCM_TRIGGER_POST},
  5221. .codec_dai_name = "snd-soc-dummy-dai",
  5222. .codec_name = "snd-soc-dummy",
  5223. .ignore_suspend = 1,
  5224. /* this dainlink has playback support */
  5225. .ignore_pmdown_time = 1,
  5226. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5227. },
  5228. /* Hostless PCM purpose */
  5229. {
  5230. .name = "SLIMBUS_0 Hostless",
  5231. .stream_name = "SLIMBUS_0 Hostless",
  5232. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5233. .platform_name = "msm-pcm-hostless",
  5234. .dynamic = 1,
  5235. .dpcm_playback = 1,
  5236. .dpcm_capture = 1,
  5237. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5238. SND_SOC_DPCM_TRIGGER_POST},
  5239. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5240. .ignore_suspend = 1,
  5241. /* this dailink has playback support */
  5242. .ignore_pmdown_time = 1,
  5243. .codec_dai_name = "snd-soc-dummy-dai",
  5244. .codec_name = "snd-soc-dummy",
  5245. },
  5246. {
  5247. .name = "MSM AFE-PCM RX",
  5248. .stream_name = "AFE-PROXY RX",
  5249. .cpu_dai_name = "msm-dai-q6-dev.241",
  5250. .codec_name = "msm-stub-codec.1",
  5251. .codec_dai_name = "msm-stub-rx",
  5252. .platform_name = "msm-pcm-afe",
  5253. .dpcm_playback = 1,
  5254. .ignore_suspend = 1,
  5255. /* this dainlink has playback support */
  5256. .ignore_pmdown_time = 1,
  5257. },
  5258. {
  5259. .name = "MSM AFE-PCM TX",
  5260. .stream_name = "AFE-PROXY TX",
  5261. .cpu_dai_name = "msm-dai-q6-dev.240",
  5262. .codec_name = "msm-stub-codec.1",
  5263. .codec_dai_name = "msm-stub-tx",
  5264. .platform_name = "msm-pcm-afe",
  5265. .dpcm_capture = 1,
  5266. .ignore_suspend = 1,
  5267. },
  5268. {
  5269. .name = MSM_DAILINK_NAME(Compress1),
  5270. .stream_name = "Compress1",
  5271. .cpu_dai_name = "MultiMedia4",
  5272. .platform_name = "msm-compress-dsp",
  5273. .dynamic = 1,
  5274. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5275. .dpcm_playback = 1,
  5276. .dpcm_capture = 1,
  5277. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5278. SND_SOC_DPCM_TRIGGER_POST},
  5279. .codec_dai_name = "snd-soc-dummy-dai",
  5280. .codec_name = "snd-soc-dummy",
  5281. .ignore_suspend = 1,
  5282. .ignore_pmdown_time = 1,
  5283. /* this dainlink has playback support */
  5284. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5285. },
  5286. {
  5287. .name = "AUXPCM Hostless",
  5288. .stream_name = "AUXPCM Hostless",
  5289. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5290. .platform_name = "msm-pcm-hostless",
  5291. .dynamic = 1,
  5292. .dpcm_playback = 1,
  5293. .dpcm_capture = 1,
  5294. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5295. SND_SOC_DPCM_TRIGGER_POST},
  5296. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5297. .ignore_suspend = 1,
  5298. /* this dainlink has playback support */
  5299. .ignore_pmdown_time = 1,
  5300. .codec_dai_name = "snd-soc-dummy-dai",
  5301. .codec_name = "snd-soc-dummy",
  5302. },
  5303. {
  5304. .name = "SLIMBUS_1 Hostless",
  5305. .stream_name = "SLIMBUS_1 Hostless",
  5306. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5307. .platform_name = "msm-pcm-hostless",
  5308. .dynamic = 1,
  5309. .dpcm_playback = 1,
  5310. .dpcm_capture = 1,
  5311. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5312. SND_SOC_DPCM_TRIGGER_POST},
  5313. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5314. .ignore_suspend = 1,
  5315. /* this dailink has playback support */
  5316. .ignore_pmdown_time = 1,
  5317. .codec_dai_name = "snd-soc-dummy-dai",
  5318. .codec_name = "snd-soc-dummy",
  5319. },
  5320. {
  5321. .name = "SLIMBUS_3 Hostless",
  5322. .stream_name = "SLIMBUS_3 Hostless",
  5323. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5324. .platform_name = "msm-pcm-hostless",
  5325. .dynamic = 1,
  5326. .dpcm_playback = 1,
  5327. .dpcm_capture = 1,
  5328. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5329. SND_SOC_DPCM_TRIGGER_POST},
  5330. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5331. .ignore_suspend = 1,
  5332. /* this dailink has playback support */
  5333. .ignore_pmdown_time = 1,
  5334. .codec_dai_name = "snd-soc-dummy-dai",
  5335. .codec_name = "snd-soc-dummy",
  5336. },
  5337. {
  5338. .name = "SLIMBUS_4 Hostless",
  5339. .stream_name = "SLIMBUS_4 Hostless",
  5340. .cpu_dai_name = "SLIMBUS4_HOSTLESS",
  5341. .platform_name = "msm-pcm-hostless",
  5342. .dynamic = 1,
  5343. .dpcm_playback = 1,
  5344. .dpcm_capture = 1,
  5345. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5346. SND_SOC_DPCM_TRIGGER_POST},
  5347. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5348. .ignore_suspend = 1,
  5349. /* this dailink has playback support */
  5350. .ignore_pmdown_time = 1,
  5351. .codec_dai_name = "snd-soc-dummy-dai",
  5352. .codec_name = "snd-soc-dummy",
  5353. },
  5354. {
  5355. .name = MSM_DAILINK_NAME(LowLatency),
  5356. .stream_name = "MultiMedia5",
  5357. .cpu_dai_name = "MultiMedia5",
  5358. .platform_name = "msm-pcm-dsp.1",
  5359. .dynamic = 1,
  5360. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5361. .dpcm_playback = 1,
  5362. .dpcm_capture = 1,
  5363. .codec_dai_name = "snd-soc-dummy-dai",
  5364. .codec_name = "snd-soc-dummy",
  5365. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5366. SND_SOC_DPCM_TRIGGER_POST},
  5367. .ignore_suspend = 1,
  5368. /* this dainlink has playback support */
  5369. .ignore_pmdown_time = 1,
  5370. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5371. .ops = &msm_fe_qos_ops,
  5372. },
  5373. {
  5374. .name = "Listen 1 Audio Service",
  5375. .stream_name = "Listen 1 Audio Service",
  5376. .cpu_dai_name = "LSM1",
  5377. .platform_name = "msm-lsm-client",
  5378. .dynamic = 1,
  5379. .dpcm_capture = 1,
  5380. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5381. SND_SOC_DPCM_TRIGGER_POST },
  5382. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5383. .ignore_suspend = 1,
  5384. .codec_dai_name = "snd-soc-dummy-dai",
  5385. .codec_name = "snd-soc-dummy",
  5386. .id = MSM_FRONTEND_DAI_LSM1,
  5387. },
  5388. /* Multiple Tunnel instances */
  5389. {
  5390. .name = MSM_DAILINK_NAME(Compress2),
  5391. .stream_name = "Compress2",
  5392. .cpu_dai_name = "MultiMedia7",
  5393. .platform_name = "msm-compress-dsp",
  5394. .dynamic = 1,
  5395. .dpcm_playback = 1,
  5396. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5397. SND_SOC_DPCM_TRIGGER_POST},
  5398. .codec_dai_name = "snd-soc-dummy-dai",
  5399. .codec_name = "snd-soc-dummy",
  5400. .ignore_suspend = 1,
  5401. .ignore_pmdown_time = 1,
  5402. /* this dainlink has playback support */
  5403. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5404. },
  5405. {
  5406. .name = MSM_DAILINK_NAME(MultiMedia10),
  5407. .stream_name = "MultiMedia10",
  5408. .cpu_dai_name = "MultiMedia10",
  5409. .platform_name = "msm-pcm-dsp.1",
  5410. .dynamic = 1,
  5411. .dpcm_playback = 1,
  5412. .dpcm_capture = 1,
  5413. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5414. SND_SOC_DPCM_TRIGGER_POST},
  5415. .codec_dai_name = "snd-soc-dummy-dai",
  5416. .codec_name = "snd-soc-dummy",
  5417. .ignore_suspend = 1,
  5418. .ignore_pmdown_time = 1,
  5419. /* this dainlink has playback support */
  5420. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5421. },
  5422. {
  5423. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5424. .stream_name = "MM_NOIRQ",
  5425. .cpu_dai_name = "MultiMedia8",
  5426. .platform_name = "msm-pcm-dsp-noirq",
  5427. .dynamic = 1,
  5428. .dpcm_playback = 1,
  5429. .dpcm_capture = 1,
  5430. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5431. SND_SOC_DPCM_TRIGGER_POST},
  5432. .codec_dai_name = "snd-soc-dummy-dai",
  5433. .codec_name = "snd-soc-dummy",
  5434. .ignore_suspend = 1,
  5435. .ignore_pmdown_time = 1,
  5436. /* this dainlink has playback support */
  5437. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5438. .ops = &msm_fe_qos_ops,
  5439. },
  5440. /* HDMI Hostless */
  5441. {
  5442. .name = "HDMI_RX_HOSTLESS",
  5443. .stream_name = "HDMI_RX_HOSTLESS",
  5444. .cpu_dai_name = "HDMI_HOSTLESS",
  5445. .platform_name = "msm-pcm-hostless",
  5446. .dynamic = 1,
  5447. .dpcm_playback = 1,
  5448. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5449. SND_SOC_DPCM_TRIGGER_POST},
  5450. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5451. .ignore_suspend = 1,
  5452. .ignore_pmdown_time = 1,
  5453. .codec_dai_name = "snd-soc-dummy-dai",
  5454. .codec_name = "snd-soc-dummy",
  5455. },
  5456. {
  5457. .name = "VoiceMMode2",
  5458. .stream_name = "VoiceMMode2",
  5459. .cpu_dai_name = "VoiceMMode2",
  5460. .platform_name = "msm-pcm-voice",
  5461. .dynamic = 1,
  5462. .dpcm_playback = 1,
  5463. .dpcm_capture = 1,
  5464. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5465. SND_SOC_DPCM_TRIGGER_POST},
  5466. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5467. .ignore_suspend = 1,
  5468. .ignore_pmdown_time = 1,
  5469. .codec_dai_name = "snd-soc-dummy-dai",
  5470. .codec_name = "snd-soc-dummy",
  5471. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5472. },
  5473. /* LSM FE */
  5474. {
  5475. .name = "Listen 2 Audio Service",
  5476. .stream_name = "Listen 2 Audio Service",
  5477. .cpu_dai_name = "LSM2",
  5478. .platform_name = "msm-lsm-client",
  5479. .dynamic = 1,
  5480. .dpcm_capture = 1,
  5481. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5482. SND_SOC_DPCM_TRIGGER_POST },
  5483. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5484. .ignore_suspend = 1,
  5485. .codec_dai_name = "snd-soc-dummy-dai",
  5486. .codec_name = "snd-soc-dummy",
  5487. .id = MSM_FRONTEND_DAI_LSM2,
  5488. },
  5489. {
  5490. .name = "Listen 3 Audio Service",
  5491. .stream_name = "Listen 3 Audio Service",
  5492. .cpu_dai_name = "LSM3",
  5493. .platform_name = "msm-lsm-client",
  5494. .dynamic = 1,
  5495. .dpcm_capture = 1,
  5496. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5497. SND_SOC_DPCM_TRIGGER_POST },
  5498. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5499. .ignore_suspend = 1,
  5500. .codec_dai_name = "snd-soc-dummy-dai",
  5501. .codec_name = "snd-soc-dummy",
  5502. .id = MSM_FRONTEND_DAI_LSM3,
  5503. },
  5504. {
  5505. .name = "Listen 4 Audio Service",
  5506. .stream_name = "Listen 4 Audio Service",
  5507. .cpu_dai_name = "LSM4",
  5508. .platform_name = "msm-lsm-client",
  5509. .dynamic = 1,
  5510. .dpcm_capture = 1,
  5511. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5512. SND_SOC_DPCM_TRIGGER_POST },
  5513. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5514. .ignore_suspend = 1,
  5515. .codec_dai_name = "snd-soc-dummy-dai",
  5516. .codec_name = "snd-soc-dummy",
  5517. .id = MSM_FRONTEND_DAI_LSM4,
  5518. },
  5519. {
  5520. .name = "Listen 5 Audio Service",
  5521. .stream_name = "Listen 5 Audio Service",
  5522. .cpu_dai_name = "LSM5",
  5523. .platform_name = "msm-lsm-client",
  5524. .dynamic = 1,
  5525. .dpcm_capture = 1,
  5526. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5527. SND_SOC_DPCM_TRIGGER_POST },
  5528. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5529. .ignore_suspend = 1,
  5530. .codec_dai_name = "snd-soc-dummy-dai",
  5531. .codec_name = "snd-soc-dummy",
  5532. .id = MSM_FRONTEND_DAI_LSM5,
  5533. },
  5534. {
  5535. .name = "Listen 6 Audio Service",
  5536. .stream_name = "Listen 6 Audio Service",
  5537. .cpu_dai_name = "LSM6",
  5538. .platform_name = "msm-lsm-client",
  5539. .dynamic = 1,
  5540. .dpcm_capture = 1,
  5541. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5542. SND_SOC_DPCM_TRIGGER_POST },
  5543. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5544. .ignore_suspend = 1,
  5545. .codec_dai_name = "snd-soc-dummy-dai",
  5546. .codec_name = "snd-soc-dummy",
  5547. .id = MSM_FRONTEND_DAI_LSM6,
  5548. },
  5549. {
  5550. .name = "Listen 7 Audio Service",
  5551. .stream_name = "Listen 7 Audio Service",
  5552. .cpu_dai_name = "LSM7",
  5553. .platform_name = "msm-lsm-client",
  5554. .dynamic = 1,
  5555. .dpcm_capture = 1,
  5556. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5557. SND_SOC_DPCM_TRIGGER_POST },
  5558. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5559. .ignore_suspend = 1,
  5560. .codec_dai_name = "snd-soc-dummy-dai",
  5561. .codec_name = "snd-soc-dummy",
  5562. .id = MSM_FRONTEND_DAI_LSM7,
  5563. },
  5564. {
  5565. .name = "Listen 8 Audio Service",
  5566. .stream_name = "Listen 8 Audio Service",
  5567. .cpu_dai_name = "LSM8",
  5568. .platform_name = "msm-lsm-client",
  5569. .dynamic = 1,
  5570. .dpcm_capture = 1,
  5571. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5572. SND_SOC_DPCM_TRIGGER_POST },
  5573. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5574. .ignore_suspend = 1,
  5575. .codec_dai_name = "snd-soc-dummy-dai",
  5576. .codec_name = "snd-soc-dummy",
  5577. .id = MSM_FRONTEND_DAI_LSM8,
  5578. },
  5579. {
  5580. .name = MSM_DAILINK_NAME(Media9),
  5581. .stream_name = "MultiMedia9",
  5582. .cpu_dai_name = "MultiMedia9",
  5583. .platform_name = "msm-pcm-dsp.0",
  5584. .dynamic = 1,
  5585. .dpcm_playback = 1,
  5586. .dpcm_capture = 1,
  5587. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5588. SND_SOC_DPCM_TRIGGER_POST},
  5589. .codec_dai_name = "snd-soc-dummy-dai",
  5590. .codec_name = "snd-soc-dummy",
  5591. .ignore_suspend = 1,
  5592. /* this dainlink has playback support */
  5593. .ignore_pmdown_time = 1,
  5594. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5595. },
  5596. {
  5597. .name = MSM_DAILINK_NAME(Compress4),
  5598. .stream_name = "Compress4",
  5599. .cpu_dai_name = "MultiMedia11",
  5600. .platform_name = "msm-compress-dsp",
  5601. .dynamic = 1,
  5602. .dpcm_playback = 1,
  5603. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5604. SND_SOC_DPCM_TRIGGER_POST},
  5605. .codec_dai_name = "snd-soc-dummy-dai",
  5606. .codec_name = "snd-soc-dummy",
  5607. .ignore_suspend = 1,
  5608. .ignore_pmdown_time = 1,
  5609. /* this dainlink has playback support */
  5610. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5611. },
  5612. {
  5613. .name = MSM_DAILINK_NAME(Compress5),
  5614. .stream_name = "Compress5",
  5615. .cpu_dai_name = "MultiMedia12",
  5616. .platform_name = "msm-compress-dsp",
  5617. .dynamic = 1,
  5618. .dpcm_playback = 1,
  5619. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5620. SND_SOC_DPCM_TRIGGER_POST},
  5621. .codec_dai_name = "snd-soc-dummy-dai",
  5622. .codec_name = "snd-soc-dummy",
  5623. .ignore_suspend = 1,
  5624. .ignore_pmdown_time = 1,
  5625. /* this dainlink has playback support */
  5626. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5627. },
  5628. {
  5629. .name = MSM_DAILINK_NAME(Compress6),
  5630. .stream_name = "Compress6",
  5631. .cpu_dai_name = "MultiMedia13",
  5632. .platform_name = "msm-compress-dsp",
  5633. .dynamic = 1,
  5634. .dpcm_playback = 1,
  5635. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5636. SND_SOC_DPCM_TRIGGER_POST},
  5637. .codec_dai_name = "snd-soc-dummy-dai",
  5638. .codec_name = "snd-soc-dummy",
  5639. .ignore_suspend = 1,
  5640. .ignore_pmdown_time = 1,
  5641. /* this dainlink has playback support */
  5642. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5643. },
  5644. {
  5645. .name = MSM_DAILINK_NAME(Compress7),
  5646. .stream_name = "Compress7",
  5647. .cpu_dai_name = "MultiMedia14",
  5648. .platform_name = "msm-compress-dsp",
  5649. .dynamic = 1,
  5650. .dpcm_playback = 1,
  5651. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5652. SND_SOC_DPCM_TRIGGER_POST},
  5653. .codec_dai_name = "snd-soc-dummy-dai",
  5654. .codec_name = "snd-soc-dummy",
  5655. .ignore_suspend = 1,
  5656. .ignore_pmdown_time = 1,
  5657. /* this dainlink has playback support */
  5658. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5659. },
  5660. {
  5661. .name = MSM_DAILINK_NAME(Compress8),
  5662. .stream_name = "Compress8",
  5663. .cpu_dai_name = "MultiMedia15",
  5664. .platform_name = "msm-compress-dsp",
  5665. .dynamic = 1,
  5666. .dpcm_playback = 1,
  5667. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5668. SND_SOC_DPCM_TRIGGER_POST},
  5669. .codec_dai_name = "snd-soc-dummy-dai",
  5670. .codec_name = "snd-soc-dummy",
  5671. .ignore_suspend = 1,
  5672. .ignore_pmdown_time = 1,
  5673. /* this dainlink has playback support */
  5674. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5675. },
  5676. {
  5677. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5678. .stream_name = "MM_NOIRQ_2",
  5679. .cpu_dai_name = "MultiMedia16",
  5680. .platform_name = "msm-pcm-dsp-noirq",
  5681. .dynamic = 1,
  5682. .dpcm_playback = 1,
  5683. .dpcm_capture = 1,
  5684. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5685. SND_SOC_DPCM_TRIGGER_POST},
  5686. .codec_dai_name = "snd-soc-dummy-dai",
  5687. .codec_name = "snd-soc-dummy",
  5688. .ignore_suspend = 1,
  5689. .ignore_pmdown_time = 1,
  5690. /* this dainlink has playback support */
  5691. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5692. },
  5693. {
  5694. .name = "SLIMBUS_8 Hostless",
  5695. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5696. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5697. .platform_name = "msm-pcm-hostless",
  5698. .dynamic = 1,
  5699. .dpcm_capture = 1,
  5700. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5701. SND_SOC_DPCM_TRIGGER_POST},
  5702. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5703. .ignore_suspend = 1,
  5704. .codec_dai_name = "snd-soc-dummy-dai",
  5705. .codec_name = "snd-soc-dummy",
  5706. },
  5707. };
  5708. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5709. {
  5710. .name = LPASS_BE_SLIMBUS_4_TX,
  5711. .stream_name = "Slimbus4 Capture",
  5712. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5713. .platform_name = "msm-pcm-hostless",
  5714. .codec_name = "tavil_codec",
  5715. .codec_dai_name = "tavil_vifeedback",
  5716. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5717. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5718. .ops = &msm_be_ops,
  5719. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5720. .ignore_suspend = 1,
  5721. },
  5722. /* Ultrasound RX DAI Link */
  5723. {
  5724. .name = "SLIMBUS_2 Hostless Playback",
  5725. .stream_name = "SLIMBUS_2 Hostless Playback",
  5726. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5727. .platform_name = "msm-pcm-hostless",
  5728. .codec_name = "tavil_codec",
  5729. .codec_dai_name = "tavil_rx2",
  5730. .ignore_suspend = 1,
  5731. .ignore_pmdown_time = 1,
  5732. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5733. .ops = &msm_slimbus_2_be_ops,
  5734. },
  5735. /* Ultrasound TX DAI Link */
  5736. {
  5737. .name = "SLIMBUS_2 Hostless Capture",
  5738. .stream_name = "SLIMBUS_2 Hostless Capture",
  5739. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5740. .platform_name = "msm-pcm-hostless",
  5741. .codec_name = "tavil_codec",
  5742. .codec_dai_name = "tavil_tx2",
  5743. .ignore_suspend = 1,
  5744. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5745. .ops = &msm_slimbus_2_be_ops,
  5746. },
  5747. };
  5748. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  5749. {
  5750. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  5751. .stream_name = "WSA CDC DMA0 Capture",
  5752. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  5753. .platform_name = "msm-pcm-hostless",
  5754. .codec_name = "bolero_codec",
  5755. .codec_dai_name = "wsa_macro_vifeedback",
  5756. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  5757. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5758. .ignore_suspend = 1,
  5759. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5760. .ops = &msm_cdc_dma_be_ops,
  5761. },
  5762. };
  5763. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5764. {
  5765. .name = MSM_DAILINK_NAME(ASM Loopback),
  5766. .stream_name = "MultiMedia6",
  5767. .cpu_dai_name = "MultiMedia6",
  5768. .platform_name = "msm-pcm-loopback",
  5769. .dynamic = 1,
  5770. .dpcm_playback = 1,
  5771. .dpcm_capture = 1,
  5772. .codec_dai_name = "snd-soc-dummy-dai",
  5773. .codec_name = "snd-soc-dummy",
  5774. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5775. SND_SOC_DPCM_TRIGGER_POST},
  5776. .ignore_suspend = 1,
  5777. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5778. .ignore_pmdown_time = 1,
  5779. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5780. },
  5781. {
  5782. .name = "USB Audio Hostless",
  5783. .stream_name = "USB Audio Hostless",
  5784. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5785. .platform_name = "msm-pcm-hostless",
  5786. .dynamic = 1,
  5787. .dpcm_playback = 1,
  5788. .dpcm_capture = 1,
  5789. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5790. SND_SOC_DPCM_TRIGGER_POST},
  5791. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5792. .ignore_suspend = 1,
  5793. .ignore_pmdown_time = 1,
  5794. .codec_dai_name = "snd-soc-dummy-dai",
  5795. .codec_name = "snd-soc-dummy",
  5796. },
  5797. };
  5798. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5799. /* Backend AFE DAI Links */
  5800. {
  5801. .name = LPASS_BE_AFE_PCM_RX,
  5802. .stream_name = "AFE Playback",
  5803. .cpu_dai_name = "msm-dai-q6-dev.224",
  5804. .platform_name = "msm-pcm-routing",
  5805. .codec_name = "msm-stub-codec.1",
  5806. .codec_dai_name = "msm-stub-rx",
  5807. .no_pcm = 1,
  5808. .dpcm_playback = 1,
  5809. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5810. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5811. /* this dainlink has playback support */
  5812. .ignore_pmdown_time = 1,
  5813. .ignore_suspend = 1,
  5814. },
  5815. {
  5816. .name = LPASS_BE_AFE_PCM_TX,
  5817. .stream_name = "AFE Capture",
  5818. .cpu_dai_name = "msm-dai-q6-dev.225",
  5819. .platform_name = "msm-pcm-routing",
  5820. .codec_name = "msm-stub-codec.1",
  5821. .codec_dai_name = "msm-stub-tx",
  5822. .no_pcm = 1,
  5823. .dpcm_capture = 1,
  5824. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5825. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5826. .ignore_suspend = 1,
  5827. },
  5828. /* Incall Record Uplink BACK END DAI Link */
  5829. {
  5830. .name = LPASS_BE_INCALL_RECORD_TX,
  5831. .stream_name = "Voice Uplink Capture",
  5832. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5833. .platform_name = "msm-pcm-routing",
  5834. .codec_name = "msm-stub-codec.1",
  5835. .codec_dai_name = "msm-stub-tx",
  5836. .no_pcm = 1,
  5837. .dpcm_capture = 1,
  5838. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5839. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5840. .ignore_suspend = 1,
  5841. },
  5842. /* Incall Record Downlink BACK END DAI Link */
  5843. {
  5844. .name = LPASS_BE_INCALL_RECORD_RX,
  5845. .stream_name = "Voice Downlink Capture",
  5846. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5847. .platform_name = "msm-pcm-routing",
  5848. .codec_name = "msm-stub-codec.1",
  5849. .codec_dai_name = "msm-stub-tx",
  5850. .no_pcm = 1,
  5851. .dpcm_capture = 1,
  5852. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5853. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5854. .ignore_suspend = 1,
  5855. },
  5856. /* Incall Music BACK END DAI Link */
  5857. {
  5858. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  5859. .stream_name = "Voice Farend Playback",
  5860. .cpu_dai_name = "msm-dai-q6-dev.32773",
  5861. .platform_name = "msm-pcm-routing",
  5862. .codec_name = "msm-stub-codec.1",
  5863. .codec_dai_name = "msm-stub-rx",
  5864. .no_pcm = 1,
  5865. .dpcm_playback = 1,
  5866. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  5867. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5868. .ignore_suspend = 1,
  5869. .ignore_pmdown_time = 1,
  5870. },
  5871. /* Incall Music 2 BACK END DAI Link */
  5872. {
  5873. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  5874. .stream_name = "Voice2 Farend Playback",
  5875. .cpu_dai_name = "msm-dai-q6-dev.32770",
  5876. .platform_name = "msm-pcm-routing",
  5877. .codec_name = "msm-stub-codec.1",
  5878. .codec_dai_name = "msm-stub-rx",
  5879. .no_pcm = 1,
  5880. .dpcm_playback = 1,
  5881. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  5882. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5883. .ignore_suspend = 1,
  5884. .ignore_pmdown_time = 1,
  5885. },
  5886. {
  5887. .name = LPASS_BE_USB_AUDIO_RX,
  5888. .stream_name = "USB Audio Playback",
  5889. .cpu_dai_name = "msm-dai-q6-dev.28672",
  5890. .platform_name = "msm-pcm-routing",
  5891. .codec_name = "msm-stub-codec.1",
  5892. .codec_dai_name = "msm-stub-rx",
  5893. .no_pcm = 1,
  5894. .dpcm_playback = 1,
  5895. .id = MSM_BACKEND_DAI_USB_RX,
  5896. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5897. .ignore_pmdown_time = 1,
  5898. .ignore_suspend = 1,
  5899. },
  5900. {
  5901. .name = LPASS_BE_USB_AUDIO_TX,
  5902. .stream_name = "USB Audio Capture",
  5903. .cpu_dai_name = "msm-dai-q6-dev.28673",
  5904. .platform_name = "msm-pcm-routing",
  5905. .codec_name = "msm-stub-codec.1",
  5906. .codec_dai_name = "msm-stub-tx",
  5907. .no_pcm = 1,
  5908. .dpcm_capture = 1,
  5909. .id = MSM_BACKEND_DAI_USB_TX,
  5910. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5911. .ignore_suspend = 1,
  5912. },
  5913. {
  5914. .name = LPASS_BE_PRI_TDM_RX_0,
  5915. .stream_name = "Primary TDM0 Playback",
  5916. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  5917. .platform_name = "msm-pcm-routing",
  5918. .codec_name = "msm-stub-codec.1",
  5919. .codec_dai_name = "msm-stub-rx",
  5920. .no_pcm = 1,
  5921. .dpcm_playback = 1,
  5922. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  5923. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5924. .ops = &sm6150_tdm_be_ops,
  5925. .ignore_suspend = 1,
  5926. .ignore_pmdown_time = 1,
  5927. },
  5928. {
  5929. .name = LPASS_BE_PRI_TDM_TX_0,
  5930. .stream_name = "Primary TDM0 Capture",
  5931. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  5932. .platform_name = "msm-pcm-routing",
  5933. .codec_name = "msm-stub-codec.1",
  5934. .codec_dai_name = "msm-stub-tx",
  5935. .no_pcm = 1,
  5936. .dpcm_capture = 1,
  5937. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  5938. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5939. .ops = &sm6150_tdm_be_ops,
  5940. .ignore_suspend = 1,
  5941. },
  5942. {
  5943. .name = LPASS_BE_SEC_TDM_RX_0,
  5944. .stream_name = "Secondary TDM0 Playback",
  5945. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  5946. .platform_name = "msm-pcm-routing",
  5947. .codec_name = "msm-stub-codec.1",
  5948. .codec_dai_name = "msm-stub-rx",
  5949. .no_pcm = 1,
  5950. .dpcm_playback = 1,
  5951. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  5952. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5953. .ops = &sm6150_tdm_be_ops,
  5954. .ignore_suspend = 1,
  5955. .ignore_pmdown_time = 1,
  5956. },
  5957. {
  5958. .name = LPASS_BE_SEC_TDM_TX_0,
  5959. .stream_name = "Secondary TDM0 Capture",
  5960. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  5961. .platform_name = "msm-pcm-routing",
  5962. .codec_name = "msm-stub-codec.1",
  5963. .codec_dai_name = "msm-stub-tx",
  5964. .no_pcm = 1,
  5965. .dpcm_capture = 1,
  5966. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  5967. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5968. .ops = &sm6150_tdm_be_ops,
  5969. .ignore_suspend = 1,
  5970. },
  5971. {
  5972. .name = LPASS_BE_TERT_TDM_RX_0,
  5973. .stream_name = "Tertiary TDM0 Playback",
  5974. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  5975. .platform_name = "msm-pcm-routing",
  5976. .codec_name = "msm-stub-codec.1",
  5977. .codec_dai_name = "msm-stub-rx",
  5978. .no_pcm = 1,
  5979. .dpcm_playback = 1,
  5980. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  5981. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5982. .ops = &sm6150_tdm_be_ops,
  5983. .ignore_suspend = 1,
  5984. .ignore_pmdown_time = 1,
  5985. },
  5986. {
  5987. .name = LPASS_BE_TERT_TDM_TX_0,
  5988. .stream_name = "Tertiary TDM0 Capture",
  5989. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  5990. .platform_name = "msm-pcm-routing",
  5991. .codec_name = "msm-stub-codec.1",
  5992. .codec_dai_name = "msm-stub-tx",
  5993. .no_pcm = 1,
  5994. .dpcm_capture = 1,
  5995. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  5996. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5997. .ops = &sm6150_tdm_be_ops,
  5998. .ignore_suspend = 1,
  5999. },
  6000. {
  6001. .name = LPASS_BE_QUAT_TDM_RX_0,
  6002. .stream_name = "Quaternary TDM0 Playback",
  6003. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  6004. .platform_name = "msm-pcm-routing",
  6005. .codec_name = "msm-stub-codec.1",
  6006. .codec_dai_name = "msm-stub-rx",
  6007. .no_pcm = 1,
  6008. .dpcm_playback = 1,
  6009. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  6010. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  6011. .ops = &sm6150_tdm_be_ops,
  6012. .ignore_suspend = 1,
  6013. .ignore_pmdown_time = 1,
  6014. },
  6015. {
  6016. .name = LPASS_BE_QUAT_TDM_TX_0,
  6017. .stream_name = "Quaternary TDM0 Capture",
  6018. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  6019. .platform_name = "msm-pcm-routing",
  6020. .codec_name = "msm-stub-codec.1",
  6021. .codec_dai_name = "msm-stub-tx",
  6022. .no_pcm = 1,
  6023. .dpcm_capture = 1,
  6024. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  6025. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6026. .ops = &sm6150_tdm_be_ops,
  6027. .ignore_suspend = 1,
  6028. },
  6029. };
  6030. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6031. {
  6032. .name = LPASS_BE_SLIMBUS_0_RX,
  6033. .stream_name = "Slimbus Playback",
  6034. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6035. .platform_name = "msm-pcm-routing",
  6036. .codec_name = "tavil_codec",
  6037. .codec_dai_name = "tavil_rx1",
  6038. .no_pcm = 1,
  6039. .dpcm_playback = 1,
  6040. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6041. .init = &msm_audrx_tavil_init,
  6042. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6043. /* this dainlink has playback support */
  6044. .ignore_pmdown_time = 1,
  6045. .ignore_suspend = 1,
  6046. .ops = &msm_be_ops,
  6047. },
  6048. {
  6049. .name = LPASS_BE_SLIMBUS_0_TX,
  6050. .stream_name = "Slimbus Capture",
  6051. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6052. .platform_name = "msm-pcm-routing",
  6053. .codec_name = "tavil_codec",
  6054. .codec_dai_name = "tavil_tx1",
  6055. .no_pcm = 1,
  6056. .dpcm_capture = 1,
  6057. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6058. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6059. .ignore_suspend = 1,
  6060. .ops = &msm_be_ops,
  6061. },
  6062. {
  6063. .name = LPASS_BE_SLIMBUS_1_RX,
  6064. .stream_name = "Slimbus1 Playback",
  6065. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6066. .platform_name = "msm-pcm-routing",
  6067. .codec_name = "tavil_codec",
  6068. .codec_dai_name = "tavil_rx1",
  6069. .no_pcm = 1,
  6070. .dpcm_playback = 1,
  6071. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6072. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6073. .ops = &msm_be_ops,
  6074. /* dai link has playback support */
  6075. .ignore_pmdown_time = 1,
  6076. .ignore_suspend = 1,
  6077. },
  6078. {
  6079. .name = LPASS_BE_SLIMBUS_1_TX,
  6080. .stream_name = "Slimbus1 Capture",
  6081. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6082. .platform_name = "msm-pcm-routing",
  6083. .codec_name = "tavil_codec",
  6084. .codec_dai_name = "tavil_tx3",
  6085. .no_pcm = 1,
  6086. .dpcm_capture = 1,
  6087. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6088. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6089. .ops = &msm_be_ops,
  6090. .ignore_suspend = 1,
  6091. },
  6092. {
  6093. .name = LPASS_BE_SLIMBUS_2_RX,
  6094. .stream_name = "Slimbus2 Playback",
  6095. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6096. .platform_name = "msm-pcm-routing",
  6097. .codec_name = "tavil_codec",
  6098. .codec_dai_name = "tavil_rx2",
  6099. .no_pcm = 1,
  6100. .dpcm_playback = 1,
  6101. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6102. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6103. .ops = &msm_be_ops,
  6104. .ignore_pmdown_time = 1,
  6105. .ignore_suspend = 1,
  6106. },
  6107. {
  6108. .name = LPASS_BE_SLIMBUS_3_RX,
  6109. .stream_name = "Slimbus3 Playback",
  6110. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6111. .platform_name = "msm-pcm-routing",
  6112. .codec_name = "tavil_codec",
  6113. .codec_dai_name = "tavil_rx1",
  6114. .no_pcm = 1,
  6115. .dpcm_playback = 1,
  6116. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6117. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6118. .ops = &msm_be_ops,
  6119. /* dai link has playback support */
  6120. .ignore_pmdown_time = 1,
  6121. .ignore_suspend = 1,
  6122. },
  6123. {
  6124. .name = LPASS_BE_SLIMBUS_3_TX,
  6125. .stream_name = "Slimbus3 Capture",
  6126. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6127. .platform_name = "msm-pcm-routing",
  6128. .codec_name = "tavil_codec",
  6129. .codec_dai_name = "tavil_tx1",
  6130. .no_pcm = 1,
  6131. .dpcm_capture = 1,
  6132. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6133. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6134. .ops = &msm_be_ops,
  6135. .ignore_suspend = 1,
  6136. },
  6137. {
  6138. .name = LPASS_BE_SLIMBUS_4_RX,
  6139. .stream_name = "Slimbus4 Playback",
  6140. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6141. .platform_name = "msm-pcm-routing",
  6142. .codec_name = "tavil_codec",
  6143. .codec_dai_name = "tavil_rx1",
  6144. .no_pcm = 1,
  6145. .dpcm_playback = 1,
  6146. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6147. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6148. .ops = &msm_be_ops,
  6149. /* dai link has playback support */
  6150. .ignore_pmdown_time = 1,
  6151. .ignore_suspend = 1,
  6152. },
  6153. {
  6154. .name = LPASS_BE_SLIMBUS_5_RX,
  6155. .stream_name = "Slimbus5 Playback",
  6156. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6157. .platform_name = "msm-pcm-routing",
  6158. .codec_name = "tavil_codec",
  6159. .codec_dai_name = "tavil_rx3",
  6160. .no_pcm = 1,
  6161. .dpcm_playback = 1,
  6162. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6163. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6164. .ops = &msm_be_ops,
  6165. /* dai link has playback support */
  6166. .ignore_pmdown_time = 1,
  6167. .ignore_suspend = 1,
  6168. },
  6169. /* MAD BE */
  6170. {
  6171. .name = LPASS_BE_SLIMBUS_5_TX,
  6172. .stream_name = "Slimbus5 Capture",
  6173. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6174. .platform_name = "msm-pcm-routing",
  6175. .codec_name = "tavil_codec",
  6176. .codec_dai_name = "tavil_mad1",
  6177. .no_pcm = 1,
  6178. .dpcm_capture = 1,
  6179. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6180. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6181. .ops = &msm_be_ops,
  6182. .ignore_suspend = 1,
  6183. },
  6184. {
  6185. .name = LPASS_BE_SLIMBUS_6_RX,
  6186. .stream_name = "Slimbus6 Playback",
  6187. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6188. .platform_name = "msm-pcm-routing",
  6189. .codec_name = "tavil_codec",
  6190. .codec_dai_name = "tavil_rx4",
  6191. .no_pcm = 1,
  6192. .dpcm_playback = 1,
  6193. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6194. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6195. .ops = &msm_be_ops,
  6196. /* dai link has playback support */
  6197. .ignore_pmdown_time = 1,
  6198. .ignore_suspend = 1,
  6199. },
  6200. /* Slimbus VI Recording */
  6201. {
  6202. .name = LPASS_BE_SLIMBUS_TX_VI,
  6203. .stream_name = "Slimbus4 Capture",
  6204. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6205. .platform_name = "msm-pcm-routing",
  6206. .codec_name = "tavil_codec",
  6207. .codec_dai_name = "tavil_vifeedback",
  6208. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6209. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6210. .ops = &msm_be_ops,
  6211. .ignore_suspend = 1,
  6212. .no_pcm = 1,
  6213. .dpcm_capture = 1,
  6214. },
  6215. };
  6216. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6217. {
  6218. .name = LPASS_BE_SLIMBUS_7_RX,
  6219. .stream_name = "Slimbus7 Playback",
  6220. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6221. .platform_name = "msm-pcm-routing",
  6222. .codec_name = "btfmslim_slave",
  6223. /* BT codec driver determines capabilities based on
  6224. * dai name, bt codecdai name should always contains
  6225. * supported usecase information
  6226. */
  6227. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6228. .no_pcm = 1,
  6229. .dpcm_playback = 1,
  6230. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6231. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6232. .ops = &msm_wcn_ops,
  6233. /* dai link has playback support */
  6234. .ignore_pmdown_time = 1,
  6235. .ignore_suspend = 1,
  6236. },
  6237. {
  6238. .name = LPASS_BE_SLIMBUS_7_TX,
  6239. .stream_name = "Slimbus7 Capture",
  6240. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6241. .platform_name = "msm-pcm-routing",
  6242. .codec_name = "btfmslim_slave",
  6243. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6244. .no_pcm = 1,
  6245. .dpcm_capture = 1,
  6246. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6247. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6248. .ops = &msm_wcn_ops,
  6249. .ignore_suspend = 1,
  6250. },
  6251. {
  6252. .name = LPASS_BE_SLIMBUS_8_TX,
  6253. .stream_name = "Slimbus8 Capture",
  6254. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6255. .platform_name = "msm-pcm-routing",
  6256. .codec_name = "btfmslim_slave",
  6257. .codec_dai_name = "btfm_fm_slim_tx",
  6258. .no_pcm = 1,
  6259. .dpcm_capture = 1,
  6260. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6261. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6262. .init = &msm_wcn_init,
  6263. .ops = &msm_wcn_ops,
  6264. .ignore_suspend = 1,
  6265. },
  6266. };
  6267. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6268. /* DISP PORT BACK END DAI Link */
  6269. {
  6270. .name = LPASS_BE_DISPLAY_PORT,
  6271. .stream_name = "Display Port Playback",
  6272. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6273. .platform_name = "msm-pcm-routing",
  6274. .codec_name = "msm-ext-disp-audio-codec-rx",
  6275. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6276. .no_pcm = 1,
  6277. .dpcm_playback = 1,
  6278. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6279. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6280. .ignore_pmdown_time = 1,
  6281. .ignore_suspend = 1,
  6282. },
  6283. };
  6284. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6285. {
  6286. .name = LPASS_BE_PRI_MI2S_RX,
  6287. .stream_name = "Primary MI2S Playback",
  6288. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6289. .platform_name = "msm-pcm-routing",
  6290. .codec_name = "msm-stub-codec.1",
  6291. .codec_dai_name = "msm-stub-rx",
  6292. .no_pcm = 1,
  6293. .dpcm_playback = 1,
  6294. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6295. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6296. .ops = &msm_mi2s_be_ops,
  6297. .ignore_suspend = 1,
  6298. .ignore_pmdown_time = 1,
  6299. },
  6300. {
  6301. .name = LPASS_BE_PRI_MI2S_TX,
  6302. .stream_name = "Primary MI2S Capture",
  6303. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6304. .platform_name = "msm-pcm-routing",
  6305. .codec_name = "msm-stub-codec.1",
  6306. .codec_dai_name = "msm-stub-tx",
  6307. .no_pcm = 1,
  6308. .dpcm_capture = 1,
  6309. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6310. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6311. .ops = &msm_mi2s_be_ops,
  6312. .ignore_suspend = 1,
  6313. },
  6314. {
  6315. .name = LPASS_BE_SEC_MI2S_RX,
  6316. .stream_name = "Secondary MI2S Playback",
  6317. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6318. .platform_name = "msm-pcm-routing",
  6319. .codec_name = "msm-stub-codec.1",
  6320. .codec_dai_name = "msm-stub-rx",
  6321. .no_pcm = 1,
  6322. .dpcm_playback = 1,
  6323. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6324. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6325. .ops = &msm_mi2s_be_ops,
  6326. .ignore_suspend = 1,
  6327. .ignore_pmdown_time = 1,
  6328. },
  6329. {
  6330. .name = LPASS_BE_SEC_MI2S_TX,
  6331. .stream_name = "Secondary MI2S Capture",
  6332. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6333. .platform_name = "msm-pcm-routing",
  6334. .codec_name = "msm-stub-codec.1",
  6335. .codec_dai_name = "msm-stub-tx",
  6336. .no_pcm = 1,
  6337. .dpcm_capture = 1,
  6338. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6339. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6340. .ops = &msm_mi2s_be_ops,
  6341. .ignore_suspend = 1,
  6342. },
  6343. {
  6344. .name = LPASS_BE_TERT_MI2S_RX,
  6345. .stream_name = "Tertiary MI2S Playback",
  6346. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6347. .platform_name = "msm-pcm-routing",
  6348. .codec_name = "msm-stub-codec.1",
  6349. .codec_dai_name = "msm-stub-rx",
  6350. .no_pcm = 1,
  6351. .dpcm_playback = 1,
  6352. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6353. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6354. .ops = &msm_mi2s_be_ops,
  6355. .ignore_suspend = 1,
  6356. .ignore_pmdown_time = 1,
  6357. },
  6358. {
  6359. .name = LPASS_BE_TERT_MI2S_TX,
  6360. .stream_name = "Tertiary MI2S Capture",
  6361. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6362. .platform_name = "msm-pcm-routing",
  6363. .codec_name = "msm-stub-codec.1",
  6364. .codec_dai_name = "msm-stub-tx",
  6365. .no_pcm = 1,
  6366. .dpcm_capture = 1,
  6367. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6368. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6369. .ops = &msm_mi2s_be_ops,
  6370. .ignore_suspend = 1,
  6371. },
  6372. {
  6373. .name = LPASS_BE_QUAT_MI2S_RX,
  6374. .stream_name = "Quaternary MI2S Playback",
  6375. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6376. .platform_name = "msm-pcm-routing",
  6377. .codec_name = "msm-stub-codec.1",
  6378. .codec_dai_name = "msm-stub-rx",
  6379. .no_pcm = 1,
  6380. .dpcm_playback = 1,
  6381. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6382. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6383. .ops = &msm_mi2s_be_ops,
  6384. .ignore_suspend = 1,
  6385. .ignore_pmdown_time = 1,
  6386. },
  6387. {
  6388. .name = LPASS_BE_QUAT_MI2S_TX,
  6389. .stream_name = "Quaternary MI2S Capture",
  6390. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6391. .platform_name = "msm-pcm-routing",
  6392. .codec_name = "msm-stub-codec.1",
  6393. .codec_dai_name = "msm-stub-tx",
  6394. .no_pcm = 1,
  6395. .dpcm_capture = 1,
  6396. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6397. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6398. .ops = &msm_mi2s_be_ops,
  6399. .ignore_suspend = 1,
  6400. },
  6401. {
  6402. .name = LPASS_BE_QUIN_MI2S_RX,
  6403. .stream_name = "Quinary MI2S Playback",
  6404. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6405. .platform_name = "msm-pcm-routing",
  6406. .codec_name = "msm-stub-codec.1",
  6407. .codec_dai_name = "msm-stub-rx",
  6408. .no_pcm = 1,
  6409. .dpcm_playback = 1,
  6410. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  6411. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6412. .ops = &msm_mi2s_be_ops,
  6413. .ignore_suspend = 1,
  6414. .ignore_pmdown_time = 1,
  6415. },
  6416. {
  6417. .name = LPASS_BE_QUIN_MI2S_TX,
  6418. .stream_name = "Quinary MI2S Capture",
  6419. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6420. .platform_name = "msm-pcm-routing",
  6421. .codec_name = "msm-stub-codec.1",
  6422. .codec_dai_name = "msm-stub-tx",
  6423. .no_pcm = 1,
  6424. .dpcm_capture = 1,
  6425. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  6426. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6427. .ops = &msm_mi2s_be_ops,
  6428. .ignore_suspend = 1,
  6429. },
  6430. };
  6431. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  6432. /* Primary AUX PCM Backend DAI Links */
  6433. {
  6434. .name = LPASS_BE_AUXPCM_RX,
  6435. .stream_name = "AUX PCM Playback",
  6436. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6437. .platform_name = "msm-pcm-routing",
  6438. .codec_name = "msm-stub-codec.1",
  6439. .codec_dai_name = "msm-stub-rx",
  6440. .no_pcm = 1,
  6441. .dpcm_playback = 1,
  6442. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  6443. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6444. .ignore_pmdown_time = 1,
  6445. .ignore_suspend = 1,
  6446. },
  6447. {
  6448. .name = LPASS_BE_AUXPCM_TX,
  6449. .stream_name = "AUX PCM Capture",
  6450. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6451. .platform_name = "msm-pcm-routing",
  6452. .codec_name = "msm-stub-codec.1",
  6453. .codec_dai_name = "msm-stub-tx",
  6454. .no_pcm = 1,
  6455. .dpcm_capture = 1,
  6456. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  6457. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6458. .ignore_suspend = 1,
  6459. },
  6460. /* Secondary AUX PCM Backend DAI Links */
  6461. {
  6462. .name = LPASS_BE_SEC_AUXPCM_RX,
  6463. .stream_name = "Sec AUX PCM Playback",
  6464. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6465. .platform_name = "msm-pcm-routing",
  6466. .codec_name = "msm-stub-codec.1",
  6467. .codec_dai_name = "msm-stub-rx",
  6468. .no_pcm = 1,
  6469. .dpcm_playback = 1,
  6470. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  6471. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6472. .ignore_pmdown_time = 1,
  6473. .ignore_suspend = 1,
  6474. },
  6475. {
  6476. .name = LPASS_BE_SEC_AUXPCM_TX,
  6477. .stream_name = "Sec AUX PCM Capture",
  6478. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6479. .platform_name = "msm-pcm-routing",
  6480. .codec_name = "msm-stub-codec.1",
  6481. .codec_dai_name = "msm-stub-tx",
  6482. .no_pcm = 1,
  6483. .dpcm_capture = 1,
  6484. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  6485. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6486. .ignore_suspend = 1,
  6487. },
  6488. /* Tertiary AUX PCM Backend DAI Links */
  6489. {
  6490. .name = LPASS_BE_TERT_AUXPCM_RX,
  6491. .stream_name = "Tert AUX PCM Playback",
  6492. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6493. .platform_name = "msm-pcm-routing",
  6494. .codec_name = "msm-stub-codec.1",
  6495. .codec_dai_name = "msm-stub-rx",
  6496. .no_pcm = 1,
  6497. .dpcm_playback = 1,
  6498. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  6499. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6500. .ignore_suspend = 1,
  6501. },
  6502. {
  6503. .name = LPASS_BE_TERT_AUXPCM_TX,
  6504. .stream_name = "Tert AUX PCM Capture",
  6505. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6506. .platform_name = "msm-pcm-routing",
  6507. .codec_name = "msm-stub-codec.1",
  6508. .codec_dai_name = "msm-stub-tx",
  6509. .no_pcm = 1,
  6510. .dpcm_capture = 1,
  6511. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  6512. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6513. .ignore_suspend = 1,
  6514. },
  6515. /* Quaternary AUX PCM Backend DAI Links */
  6516. {
  6517. .name = LPASS_BE_QUAT_AUXPCM_RX,
  6518. .stream_name = "Quat AUX PCM Playback",
  6519. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6520. .platform_name = "msm-pcm-routing",
  6521. .codec_name = "msm-stub-codec.1",
  6522. .codec_dai_name = "msm-stub-rx",
  6523. .no_pcm = 1,
  6524. .dpcm_playback = 1,
  6525. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  6526. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6527. .ignore_pmdown_time = 1,
  6528. .ignore_suspend = 1,
  6529. },
  6530. {
  6531. .name = LPASS_BE_QUAT_AUXPCM_TX,
  6532. .stream_name = "Quat AUX PCM Capture",
  6533. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6534. .platform_name = "msm-pcm-routing",
  6535. .codec_name = "msm-stub-codec.1",
  6536. .codec_dai_name = "msm-stub-tx",
  6537. .no_pcm = 1,
  6538. .dpcm_capture = 1,
  6539. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  6540. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6541. .ignore_suspend = 1,
  6542. },
  6543. /* Quinary AUX PCM Backend DAI Links */
  6544. {
  6545. .name = LPASS_BE_QUIN_AUXPCM_RX,
  6546. .stream_name = "Quin AUX PCM Playback",
  6547. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6548. .platform_name = "msm-pcm-routing",
  6549. .codec_name = "msm-stub-codec.1",
  6550. .codec_dai_name = "msm-stub-rx",
  6551. .no_pcm = 1,
  6552. .dpcm_playback = 1,
  6553. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  6554. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6555. .ignore_pmdown_time = 1,
  6556. .ignore_suspend = 1,
  6557. },
  6558. {
  6559. .name = LPASS_BE_QUIN_AUXPCM_TX,
  6560. .stream_name = "Quin AUX PCM Capture",
  6561. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6562. .platform_name = "msm-pcm-routing",
  6563. .codec_name = "msm-stub-codec.1",
  6564. .codec_dai_name = "msm-stub-tx",
  6565. .no_pcm = 1,
  6566. .dpcm_capture = 1,
  6567. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  6568. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6569. .ignore_suspend = 1,
  6570. },
  6571. };
  6572. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  6573. /* WSA CDC DMA Backend DAI Links */
  6574. {
  6575. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  6576. .stream_name = "WSA CDC DMA0 Playback",
  6577. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  6578. .platform_name = "msm-pcm-routing",
  6579. .codec_name = "bolero_codec",
  6580. .codec_dai_name = "wsa_macro_rx1",
  6581. .no_pcm = 1,
  6582. .dpcm_playback = 1,
  6583. .init = &msm_int_audrx_init,
  6584. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  6585. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6586. .ignore_pmdown_time = 1,
  6587. .ignore_suspend = 1,
  6588. .ops = &msm_cdc_dma_be_ops,
  6589. },
  6590. {
  6591. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  6592. .stream_name = "WSA CDC DMA1 Playback",
  6593. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  6594. .platform_name = "msm-pcm-routing",
  6595. .codec_name = "bolero_codec",
  6596. .codec_dai_name = "wsa_macro_rx_mix",
  6597. .no_pcm = 1,
  6598. .dpcm_playback = 1,
  6599. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  6600. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6601. .ignore_pmdown_time = 1,
  6602. .ignore_suspend = 1,
  6603. .ops = &msm_cdc_dma_be_ops,
  6604. },
  6605. {
  6606. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  6607. .stream_name = "WSA CDC DMA1 Capture",
  6608. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  6609. .platform_name = "msm-pcm-routing",
  6610. .codec_name = "bolero_codec",
  6611. .codec_dai_name = "wsa_macro_echo",
  6612. .no_pcm = 1,
  6613. .dpcm_capture = 1,
  6614. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  6615. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6616. .ignore_suspend = 1,
  6617. .ops = &msm_cdc_dma_be_ops,
  6618. },
  6619. {
  6620. .name = LPASS_BE_WSA_CDC_DMA_TX_2,
  6621. .stream_name = "WSA CDC DMA2 Capture",
  6622. .cpu_dai_name = "msm-dai-cdc-dma-dev.45061",
  6623. .platform_name = "msm-pcm-routing",
  6624. .codec_name = "bolero_codec",
  6625. .codec_dai_name = "msm-stub-tx",
  6626. .no_pcm = 1,
  6627. .dpcm_capture = 1,
  6628. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2,
  6629. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6630. .ignore_suspend = 1,
  6631. .ops = &msm_cdc_dma_be_ops,
  6632. },
  6633. };
  6634. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  6635. /* RX CDC DMA Backend DAI Links */
  6636. {
  6637. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  6638. .stream_name = "RX CDC DMA0 Playback",
  6639. .cpu_dai_name = "msm-dai-cdc-dma-dev.45120",
  6640. .platform_name = "msm-pcm-routing",
  6641. .codec_name = "bolero_codec",
  6642. .codec_dai_name = "rx_macro_rx1",
  6643. .no_pcm = 1,
  6644. .dpcm_playback = 1,
  6645. .init = &msm_int_audrx_init,
  6646. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  6647. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6648. .ignore_pmdown_time = 1,
  6649. .ignore_suspend = 1,
  6650. .ops = &msm_cdc_dma_be_ops,
  6651. },
  6652. {
  6653. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  6654. .stream_name = "RX CDC DMA1 Playback",
  6655. .cpu_dai_name = "msm-dai-cdc-dma-dev.45122",
  6656. .platform_name = "msm-pcm-routing",
  6657. .codec_name = "bolero_codec",
  6658. .codec_dai_name = "rx_macro_rx2",
  6659. .no_pcm = 1,
  6660. .dpcm_playback = 1,
  6661. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  6662. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6663. .ignore_pmdown_time = 1,
  6664. .ignore_suspend = 1,
  6665. .ops = &msm_cdc_dma_be_ops,
  6666. },
  6667. {
  6668. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  6669. .stream_name = "RX CDC DMA2 Playback",
  6670. .cpu_dai_name = "msm-dai-cdc-dma-dev.45124",
  6671. .platform_name = "msm-pcm-routing",
  6672. .codec_name = "bolero_codec",
  6673. .codec_dai_name = "rx_macro_rx3",
  6674. .no_pcm = 1,
  6675. .dpcm_playback = 1,
  6676. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  6677. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6678. .ignore_pmdown_time = 1,
  6679. .ignore_suspend = 1,
  6680. .ops = &msm_cdc_dma_be_ops,
  6681. },
  6682. {
  6683. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  6684. .stream_name = "RX CDC DMA3 Playback",
  6685. .cpu_dai_name = "msm-dai-cdc-dma-dev.45126",
  6686. .platform_name = "msm-pcm-routing",
  6687. .codec_name = "bolero_codec",
  6688. .codec_dai_name = "rx_macro_rx4",
  6689. .no_pcm = 1,
  6690. .dpcm_playback = 1,
  6691. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  6692. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6693. .ignore_pmdown_time = 1,
  6694. .ignore_suspend = 1,
  6695. .ops = &msm_cdc_dma_be_ops,
  6696. },
  6697. /* TX CDC DMA Backend DAI Links */
  6698. {
  6699. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  6700. .stream_name = "TX CDC DMA3 Capture",
  6701. .cpu_dai_name = "msm-dai-cdc-dma-dev.45127",
  6702. .platform_name = "msm-pcm-routing",
  6703. .codec_name = "bolero_codec",
  6704. .codec_dai_name = "tx_macro_tx1",
  6705. .no_pcm = 1,
  6706. .dpcm_capture = 1,
  6707. .init = &msm_int_audrx_init,
  6708. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  6709. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6710. .ignore_suspend = 1,
  6711. .ops = &msm_cdc_dma_be_ops,
  6712. },
  6713. {
  6714. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  6715. .stream_name = "TX CDC DMA4 Capture",
  6716. .cpu_dai_name = "msm-dai-cdc-dma-dev.45129",
  6717. .platform_name = "msm-pcm-routing",
  6718. .codec_name = "bolero_codec",
  6719. .codec_dai_name = "tx_macro_tx2",
  6720. .no_pcm = 1,
  6721. .dpcm_capture = 1,
  6722. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  6723. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6724. .ignore_suspend = 1,
  6725. .ops = &msm_cdc_dma_be_ops,
  6726. },
  6727. };
  6728. static struct snd_soc_dai_link msm_sm6150_dai_links[
  6729. ARRAY_SIZE(msm_common_dai_links) +
  6730. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  6731. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  6732. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6733. ARRAY_SIZE(msm_common_be_dai_links) +
  6734. ARRAY_SIZE(msm_tavil_be_dai_links) +
  6735. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6736. ARRAY_SIZE(ext_disp_be_dai_link) +
  6737. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6738. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6739. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  6740. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  6741. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  6742. {
  6743. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  6744. struct snd_soc_pcm_runtime *rtd;
  6745. int ret = 0;
  6746. void *mbhc_calibration;
  6747. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  6748. if (!rtd) {
  6749. dev_err(card->dev,
  6750. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  6751. __func__, be_dl_name);
  6752. ret = -EINVAL;
  6753. goto err_pcm_runtime;
  6754. }
  6755. mbhc_calibration = def_wcd_mbhc_cal();
  6756. if (!mbhc_calibration) {
  6757. ret = -ENOMEM;
  6758. goto err_mbhc_cal;
  6759. }
  6760. wcd_mbhc_cfg.calibration = mbhc_calibration;
  6761. ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
  6762. if (ret) {
  6763. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  6764. __func__, ret);
  6765. goto err_hs_detect;
  6766. }
  6767. return 0;
  6768. err_hs_detect:
  6769. kfree(mbhc_calibration);
  6770. err_mbhc_cal:
  6771. err_pcm_runtime:
  6772. return ret;
  6773. }
  6774. static int msm_populate_dai_link_component_of_node(
  6775. struct snd_soc_card *card)
  6776. {
  6777. int i, index, ret = 0;
  6778. struct device *cdev = card->dev;
  6779. struct snd_soc_dai_link *dai_link = card->dai_link;
  6780. struct device_node *np;
  6781. if (!cdev) {
  6782. pr_err("%s: Sound card device memory NULL\n", __func__);
  6783. return -ENODEV;
  6784. }
  6785. for (i = 0; i < card->num_links; i++) {
  6786. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6787. continue;
  6788. /* populate platform_of_node for snd card dai links */
  6789. if (dai_link[i].platform_name &&
  6790. !dai_link[i].platform_of_node) {
  6791. index = of_property_match_string(cdev->of_node,
  6792. "asoc-platform-names",
  6793. dai_link[i].platform_name);
  6794. if (index < 0) {
  6795. pr_err("%s: No match found for platform name: %s\n",
  6796. __func__, dai_link[i].platform_name);
  6797. ret = index;
  6798. goto err;
  6799. }
  6800. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6801. index);
  6802. if (!np) {
  6803. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6804. __func__, dai_link[i].platform_name,
  6805. index);
  6806. ret = -ENODEV;
  6807. goto err;
  6808. }
  6809. dai_link[i].platform_of_node = np;
  6810. dai_link[i].platform_name = NULL;
  6811. }
  6812. /* populate cpu_of_node for snd card dai links */
  6813. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6814. index = of_property_match_string(cdev->of_node,
  6815. "asoc-cpu-names",
  6816. dai_link[i].cpu_dai_name);
  6817. if (index >= 0) {
  6818. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6819. index);
  6820. if (!np) {
  6821. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6822. __func__,
  6823. dai_link[i].cpu_dai_name);
  6824. ret = -ENODEV;
  6825. goto err;
  6826. }
  6827. dai_link[i].cpu_of_node = np;
  6828. dai_link[i].cpu_dai_name = NULL;
  6829. }
  6830. }
  6831. /* populate codec_of_node for snd card dai links */
  6832. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6833. index = of_property_match_string(cdev->of_node,
  6834. "asoc-codec-names",
  6835. dai_link[i].codec_name);
  6836. if (index < 0)
  6837. continue;
  6838. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6839. index);
  6840. if (!np) {
  6841. pr_err("%s: retrieving phandle for codec %s failed\n",
  6842. __func__, dai_link[i].codec_name);
  6843. ret = -ENODEV;
  6844. goto err;
  6845. }
  6846. dai_link[i].codec_of_node = np;
  6847. dai_link[i].codec_name = NULL;
  6848. }
  6849. }
  6850. err:
  6851. return ret;
  6852. }
  6853. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  6854. {
  6855. int ret = 0;
  6856. struct snd_soc_codec *codec = rtd->codec;
  6857. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  6858. ARRAY_SIZE(msm_tavil_snd_controls));
  6859. if (ret < 0) {
  6860. dev_err(codec->dev,
  6861. "%s: add_codec_controls failed, err = %d\n",
  6862. __func__, ret);
  6863. return ret;
  6864. }
  6865. return 0;
  6866. }
  6867. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  6868. struct snd_pcm_hw_params *params)
  6869. {
  6870. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  6871. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  6872. int ret = 0;
  6873. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  6874. 151};
  6875. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  6876. 134, 135, 136, 137, 138, 139,
  6877. 140, 141, 142, 143};
  6878. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  6879. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  6880. slim_rx_cfg[SLIM_RX_0].channels,
  6881. rx_ch);
  6882. if (ret < 0)
  6883. pr_err("%s: RX failed to set cpu chan map error %d\n",
  6884. __func__, ret);
  6885. } else {
  6886. ret = snd_soc_dai_set_channel_map(cpu_dai,
  6887. slim_tx_cfg[SLIM_TX_0].channels,
  6888. tx_ch, 0, 0);
  6889. if (ret < 0)
  6890. pr_err("%s: TX failed to set cpu chan map error %d\n",
  6891. __func__, ret);
  6892. }
  6893. return ret;
  6894. }
  6895. static struct snd_soc_ops msm_stub_be_ops = {
  6896. .hw_params = msm_snd_stub_hw_params,
  6897. };
  6898. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  6899. /* FrontEnd DAI Links */
  6900. {
  6901. .name = "MSMSTUB Media1",
  6902. .stream_name = "MultiMedia1",
  6903. .cpu_dai_name = "MultiMedia1",
  6904. .platform_name = "msm-pcm-dsp.0",
  6905. .dynamic = 1,
  6906. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  6907. .dpcm_playback = 1,
  6908. .dpcm_capture = 1,
  6909. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6910. SND_SOC_DPCM_TRIGGER_POST},
  6911. .codec_dai_name = "snd-soc-dummy-dai",
  6912. .codec_name = "snd-soc-dummy",
  6913. .ignore_suspend = 1,
  6914. /* this dainlink has playback support */
  6915. .ignore_pmdown_time = 1,
  6916. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  6917. },
  6918. };
  6919. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  6920. /* Backend DAI Links */
  6921. {
  6922. .name = LPASS_BE_SLIMBUS_0_RX,
  6923. .stream_name = "Slimbus Playback",
  6924. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6925. .platform_name = "msm-pcm-routing",
  6926. .codec_name = "msm-stub-codec.1",
  6927. .codec_dai_name = "msm-stub-rx",
  6928. .no_pcm = 1,
  6929. .dpcm_playback = 1,
  6930. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6931. .init = &msm_audrx_stub_init,
  6932. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6933. .ignore_pmdown_time = 1, /* dai link has playback support */
  6934. .ignore_suspend = 1,
  6935. .ops = &msm_stub_be_ops,
  6936. },
  6937. {
  6938. .name = LPASS_BE_SLIMBUS_0_TX,
  6939. .stream_name = "Slimbus Capture",
  6940. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6941. .platform_name = "msm-pcm-routing",
  6942. .codec_name = "msm-stub-codec.1",
  6943. .codec_dai_name = "msm-stub-tx",
  6944. .no_pcm = 1,
  6945. .dpcm_capture = 1,
  6946. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6947. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6948. .ignore_suspend = 1,
  6949. .ops = &msm_stub_be_ops,
  6950. },
  6951. };
  6952. static struct snd_soc_dai_link msm_stub_dai_links[
  6953. ARRAY_SIZE(msm_stub_fe_dai_links) +
  6954. ARRAY_SIZE(msm_stub_be_dai_links)];
  6955. struct snd_soc_card snd_soc_card_stub_msm = {
  6956. .name = "sm6150-stub-snd-card",
  6957. };
  6958. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  6959. { .compatible = "qcom,sm6150-asoc-snd",
  6960. .data = "codec"},
  6961. { .compatible = "qcom,sm6150-asoc-snd-stub",
  6962. .data = "stub_codec"},
  6963. {},
  6964. };
  6965. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  6966. {
  6967. struct snd_soc_card *card = NULL;
  6968. struct snd_soc_dai_link *dailink;
  6969. int total_links = 0;
  6970. const struct of_device_id *match;
  6971. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  6972. if (!match) {
  6973. dev_err(dev, "%s: No DT match found for sound card\n",
  6974. __func__);
  6975. return NULL;
  6976. }
  6977. if (!strcmp(match->data, "codec")) {
  6978. card = &snd_soc_card_sm6150_msm;
  6979. memcpy(msm_sm6150_dai_links + total_links,
  6980. msm_common_dai_links,
  6981. sizeof(msm_common_dai_links));
  6982. total_links += ARRAY_SIZE(msm_common_dai_links);
  6983. memcpy(msm_sm6150_dai_links + total_links,
  6984. msm_common_misc_fe_dai_links,
  6985. sizeof(msm_common_misc_fe_dai_links));
  6986. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  6987. if (of_property_read_bool(dev->of_node, "qcom,tavil_codec")) {
  6988. dev_dbg(dev, "%s(): Tavil codec is present\n",
  6989. __func__);
  6990. card->late_probe = msm_snd_card_tavil_late_probe;
  6991. memcpy(msm_sm6150_dai_links + total_links,
  6992. msm_tavil_fe_dai_links,
  6993. sizeof(msm_tavil_fe_dai_links));
  6994. total_links += ARRAY_SIZE(msm_tavil_fe_dai_links);
  6995. } else {
  6996. memcpy(msm_sm6150_dai_links + total_links,
  6997. msm_bolero_fe_dai_links,
  6998. sizeof(msm_bolero_fe_dai_links));
  6999. total_links += ARRAY_SIZE(msm_bolero_fe_dai_links);
  7000. }
  7001. memcpy(msm_sm6150_dai_links + total_links,
  7002. msm_common_be_dai_links,
  7003. sizeof(msm_common_be_dai_links));
  7004. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  7005. if (of_property_read_bool(dev->of_node, "qcom,tavil_codec")) {
  7006. memcpy(msm_sm6150_dai_links + total_links,
  7007. msm_tavil_be_dai_links,
  7008. sizeof(msm_tavil_be_dai_links));
  7009. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  7010. } else {
  7011. memcpy(msm_sm6150_dai_links + total_links,
  7012. msm_wsa_cdc_dma_be_dai_links,
  7013. sizeof(msm_wsa_cdc_dma_be_dai_links));
  7014. total_links += ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  7015. memcpy(msm_sm6150_dai_links + total_links,
  7016. msm_rx_tx_cdc_dma_be_dai_links,
  7017. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  7018. total_links +=
  7019. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  7020. }
  7021. if (of_property_read_bool(dev->of_node,
  7022. "qcom,ext-disp-audio-rx")) {
  7023. dev_dbg(dev, "%s(): External display audio support present\n",
  7024. __func__);
  7025. memcpy(msm_sm6150_dai_links + total_links,
  7026. ext_disp_be_dai_link,
  7027. sizeof(ext_disp_be_dai_link));
  7028. total_links += ARRAY_SIZE(ext_disp_be_dai_link);
  7029. }
  7030. if (of_property_read_bool(dev->of_node,
  7031. "qcom,mi2s-audio-intf")) {
  7032. memcpy(msm_sm6150_dai_links + total_links,
  7033. msm_mi2s_be_dai_links,
  7034. sizeof(msm_mi2s_be_dai_links));
  7035. total_links += ARRAY_SIZE(msm_mi2s_be_dai_links);
  7036. }
  7037. if (of_property_read_bool(dev->of_node,
  7038. "qcom,auxpcm-audio-intf")) {
  7039. memcpy(msm_sm6150_dai_links + total_links,
  7040. msm_auxpcm_be_dai_links,
  7041. sizeof(msm_auxpcm_be_dai_links));
  7042. total_links += ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7043. }
  7044. if (of_property_read_bool(dev->of_node, "qcom,wcn-btfm")) {
  7045. dev_dbg(dev, "%s(): WCN BTFM support present\n",
  7046. __func__);
  7047. memcpy(msm_sm6150_dai_links + total_links,
  7048. msm_wcn_be_dai_links,
  7049. sizeof(msm_wcn_be_dai_links));
  7050. total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
  7051. }
  7052. dailink = msm_sm6150_dai_links;
  7053. } else if (!strcmp(match->data, "stub_codec")) {
  7054. card = &snd_soc_card_stub_msm;
  7055. memcpy(msm_stub_dai_links + total_links,
  7056. msm_stub_fe_dai_links,
  7057. sizeof(msm_stub_fe_dai_links));
  7058. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7059. memcpy(msm_stub_dai_links + total_links,
  7060. msm_stub_be_dai_links,
  7061. sizeof(msm_stub_be_dai_links));
  7062. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7063. dailink = msm_stub_dai_links;
  7064. }
  7065. if (card) {
  7066. card->dai_link = dailink;
  7067. card->num_links = total_links;
  7068. }
  7069. return card;
  7070. }
  7071. static int msm_wsa881x_init(struct snd_soc_component *component)
  7072. {
  7073. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7074. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7075. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7076. SPKR_L_BOOST, SPKR_L_VI};
  7077. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7078. SPKR_R_BOOST, SPKR_R_VI};
  7079. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7080. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7081. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7082. struct msm_asoc_mach_data *pdata;
  7083. struct snd_soc_dapm_context *dapm;
  7084. int ret = 0;
  7085. if (!codec) {
  7086. pr_err("%s codec is NULL\n", __func__);
  7087. return -EINVAL;
  7088. }
  7089. dapm = snd_soc_codec_get_dapm(codec);
  7090. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7091. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  7092. __func__, codec->component.name);
  7093. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  7094. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7095. &ch_rate[0], &spkleft_port_types[0]);
  7096. if (dapm->component) {
  7097. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7098. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7099. }
  7100. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7101. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  7102. __func__, codec->component.name);
  7103. wsa881x_set_channel_map(codec, &spkright_ports[0],
  7104. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7105. &ch_rate[0], &spkright_port_types[0]);
  7106. if (dapm->component) {
  7107. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7108. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7109. }
  7110. } else {
  7111. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  7112. codec->component.name);
  7113. ret = -EINVAL;
  7114. goto err;
  7115. }
  7116. pdata = snd_soc_card_get_drvdata(component->card);
  7117. if (pdata && pdata->codec_root)
  7118. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7119. codec);
  7120. err:
  7121. return ret;
  7122. }
  7123. static int msm_aux_codec_init(struct snd_soc_component *component)
  7124. {
  7125. return 0;
  7126. }
  7127. static int msm_init_aux_dev(struct platform_device *pdev,
  7128. struct snd_soc_card *card)
  7129. {
  7130. struct device_node *wsa_of_node;
  7131. struct device_node *aux_codec_of_node;
  7132. u32 wsa_max_devs;
  7133. u32 wsa_dev_cnt;
  7134. u32 codec_aux_dev_cnt = 0;
  7135. int i;
  7136. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  7137. struct aux_codec_dev_info *aux_cdc_dev_info;
  7138. const char *auxdev_name_prefix[1];
  7139. char *dev_name_str = NULL;
  7140. int found = 0;
  7141. int codecs_found = 0;
  7142. int ret = 0;
  7143. /* Get maximum WSA device count for this platform */
  7144. ret = of_property_read_u32(pdev->dev.of_node,
  7145. "qcom,wsa-max-devs", &wsa_max_devs);
  7146. if (ret) {
  7147. dev_info(&pdev->dev,
  7148. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7149. __func__, pdev->dev.of_node->full_name, ret);
  7150. wsa_max_devs = 0;
  7151. goto codec_aux_dev;
  7152. }
  7153. if (wsa_max_devs == 0) {
  7154. dev_warn(&pdev->dev,
  7155. "%s: Max WSA devices is 0 for this target?\n",
  7156. __func__);
  7157. goto codec_aux_dev;
  7158. }
  7159. /* Get count of WSA device phandles for this platform */
  7160. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7161. "qcom,wsa-devs", NULL);
  7162. if (wsa_dev_cnt == -ENOENT) {
  7163. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7164. __func__);
  7165. goto err;
  7166. } else if (wsa_dev_cnt <= 0) {
  7167. dev_err(&pdev->dev,
  7168. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7169. __func__, wsa_dev_cnt);
  7170. ret = -EINVAL;
  7171. goto err;
  7172. }
  7173. /*
  7174. * Expect total phandles count to be NOT less than maximum possible
  7175. * WSA count. However, if it is less, then assign same value to
  7176. * max count as well.
  7177. */
  7178. if (wsa_dev_cnt < wsa_max_devs) {
  7179. dev_dbg(&pdev->dev,
  7180. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7181. __func__, wsa_max_devs, wsa_dev_cnt);
  7182. wsa_max_devs = wsa_dev_cnt;
  7183. }
  7184. /* Make sure prefix string passed for each WSA device */
  7185. ret = of_property_count_strings(pdev->dev.of_node,
  7186. "qcom,wsa-aux-dev-prefix");
  7187. if (ret != wsa_dev_cnt) {
  7188. dev_err(&pdev->dev,
  7189. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7190. __func__, wsa_dev_cnt, ret);
  7191. ret = -EINVAL;
  7192. goto err;
  7193. }
  7194. /*
  7195. * Alloc mem to store phandle and index info of WSA device, if already
  7196. * registered with ALSA core
  7197. */
  7198. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7199. sizeof(struct msm_wsa881x_dev_info),
  7200. GFP_KERNEL);
  7201. if (!wsa881x_dev_info) {
  7202. ret = -ENOMEM;
  7203. goto err;
  7204. }
  7205. /*
  7206. * search and check whether all WSA devices are already
  7207. * registered with ALSA core or not. If found a node, store
  7208. * the node and the index in a local array of struct for later
  7209. * use.
  7210. */
  7211. for (i = 0; i < wsa_dev_cnt; i++) {
  7212. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7213. "qcom,wsa-devs", i);
  7214. if (unlikely(!wsa_of_node)) {
  7215. /* we should not be here */
  7216. dev_err(&pdev->dev,
  7217. "%s: wsa dev node is not present\n",
  7218. __func__);
  7219. ret = -EINVAL;
  7220. goto err;
  7221. }
  7222. if (soc_find_component(wsa_of_node, NULL)) {
  7223. /* WSA device registered with ALSA core */
  7224. wsa881x_dev_info[found].of_node = wsa_of_node;
  7225. wsa881x_dev_info[found].index = i;
  7226. found++;
  7227. if (found == wsa_max_devs)
  7228. break;
  7229. }
  7230. }
  7231. if (found < wsa_max_devs) {
  7232. dev_dbg(&pdev->dev,
  7233. "%s: failed to find %d components. Found only %d\n",
  7234. __func__, wsa_max_devs, found);
  7235. return -EPROBE_DEFER;
  7236. }
  7237. dev_info(&pdev->dev,
  7238. "%s: found %d wsa881x devices registered with ALSA core\n",
  7239. __func__, found);
  7240. codec_aux_dev:
  7241. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7242. /* Get count of aux codec device phandles for this platform */
  7243. codec_aux_dev_cnt = of_count_phandle_with_args(
  7244. pdev->dev.of_node,
  7245. "qcom,codec-aux-devs", NULL);
  7246. if (codec_aux_dev_cnt == -ENOENT) {
  7247. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  7248. __func__);
  7249. goto err;
  7250. } else if (codec_aux_dev_cnt <= 0) {
  7251. dev_err(&pdev->dev,
  7252. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  7253. __func__, codec_aux_dev_cnt);
  7254. ret = -EINVAL;
  7255. goto err;
  7256. }
  7257. /*
  7258. * Alloc mem to store phandle and index info of aux codec
  7259. * if already registered with ALSA core
  7260. */
  7261. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  7262. sizeof(struct aux_codec_dev_info),
  7263. GFP_KERNEL);
  7264. if (!aux_cdc_dev_info) {
  7265. ret = -ENOMEM;
  7266. goto err;
  7267. }
  7268. /*
  7269. * search and check whether all aux codecs are already
  7270. * registered with ALSA core or not. If found a node, store
  7271. * the node and the index in a local array of struct for later
  7272. * use.
  7273. */
  7274. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7275. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  7276. "qcom,codec-aux-devs", i);
  7277. if (unlikely(!aux_codec_of_node)) {
  7278. /* we should not be here */
  7279. dev_err(&pdev->dev,
  7280. "%s: aux codec dev node is not present\n",
  7281. __func__);
  7282. ret = -EINVAL;
  7283. goto err;
  7284. }
  7285. if (soc_find_component(aux_codec_of_node, NULL)) {
  7286. /* AUX codec registered with ALSA core */
  7287. aux_cdc_dev_info[codecs_found].of_node =
  7288. aux_codec_of_node;
  7289. aux_cdc_dev_info[codecs_found].index = i;
  7290. codecs_found++;
  7291. }
  7292. }
  7293. if (codecs_found < codec_aux_dev_cnt) {
  7294. dev_dbg(&pdev->dev,
  7295. "%s: failed to find %d components. Found only %d\n",
  7296. __func__, codec_aux_dev_cnt, codecs_found);
  7297. return -EPROBE_DEFER;
  7298. }
  7299. dev_info(&pdev->dev,
  7300. "%s: found %d AUX codecs registered with ALSA core\n",
  7301. __func__, codecs_found);
  7302. }
  7303. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  7304. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  7305. /* Alloc array of AUX devs struct */
  7306. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  7307. sizeof(struct snd_soc_aux_dev),
  7308. GFP_KERNEL);
  7309. if (!msm_aux_dev) {
  7310. ret = -ENOMEM;
  7311. goto err;
  7312. }
  7313. /* Alloc array of codec conf struct */
  7314. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  7315. sizeof(struct snd_soc_codec_conf),
  7316. GFP_KERNEL);
  7317. if (!msm_codec_conf) {
  7318. ret = -ENOMEM;
  7319. goto err;
  7320. }
  7321. for (i = 0; i < wsa_max_devs; i++) {
  7322. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  7323. GFP_KERNEL);
  7324. if (!dev_name_str) {
  7325. ret = -ENOMEM;
  7326. goto err;
  7327. }
  7328. ret = of_property_read_string_index(pdev->dev.of_node,
  7329. "qcom,wsa-aux-dev-prefix",
  7330. wsa881x_dev_info[i].index,
  7331. auxdev_name_prefix);
  7332. if (ret) {
  7333. dev_err(&pdev->dev,
  7334. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  7335. __func__, ret);
  7336. ret = -EINVAL;
  7337. goto err;
  7338. }
  7339. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  7340. msm_aux_dev[i].name = dev_name_str;
  7341. msm_aux_dev[i].codec_name = NULL;
  7342. msm_aux_dev[i].codec_of_node =
  7343. wsa881x_dev_info[i].of_node;
  7344. msm_aux_dev[i].init = msm_wsa881x_init;
  7345. msm_codec_conf[i].dev_name = NULL;
  7346. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  7347. msm_codec_conf[i].of_node =
  7348. wsa881x_dev_info[i].of_node;
  7349. }
  7350. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7351. msm_aux_dev[wsa_max_devs + i].name = NULL;
  7352. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  7353. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  7354. aux_cdc_dev_info[i].of_node;
  7355. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  7356. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  7357. msm_codec_conf[wsa_max_devs + i].name_prefix =
  7358. NULL;
  7359. msm_codec_conf[wsa_max_devs + i].of_node =
  7360. aux_cdc_dev_info[i].of_node;
  7361. }
  7362. card->codec_conf = msm_codec_conf;
  7363. card->aux_dev = msm_aux_dev;
  7364. err:
  7365. return ret;
  7366. }
  7367. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  7368. {
  7369. int count;
  7370. u32 mi2s_master_slave[MI2S_MAX];
  7371. int ret;
  7372. for (count = 0; count < MI2S_MAX; count++) {
  7373. mutex_init(&mi2s_intf_conf[count].lock);
  7374. mi2s_intf_conf[count].ref_cnt = 0;
  7375. }
  7376. ret = of_property_read_u32_array(pdev->dev.of_node,
  7377. "qcom,msm-mi2s-master",
  7378. mi2s_master_slave, MI2S_MAX);
  7379. if (ret) {
  7380. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  7381. __func__);
  7382. } else {
  7383. for (count = 0; count < MI2S_MAX; count++) {
  7384. mi2s_intf_conf[count].msm_is_mi2s_master =
  7385. mi2s_master_slave[count];
  7386. }
  7387. }
  7388. }
  7389. static void msm_i2s_auxpcm_deinit(void)
  7390. {
  7391. int count;
  7392. for (count = 0; count < MI2S_MAX; count++) {
  7393. mutex_destroy(&mi2s_intf_conf[count].lock);
  7394. mi2s_intf_conf[count].ref_cnt = 0;
  7395. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  7396. }
  7397. }
  7398. static int msm_asoc_machine_probe(struct platform_device *pdev)
  7399. {
  7400. struct snd_soc_card *card;
  7401. struct msm_asoc_mach_data *pdata;
  7402. const char *mbhc_audio_jack_type = NULL;
  7403. int ret;
  7404. if (!pdev->dev.of_node) {
  7405. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  7406. return -EINVAL;
  7407. }
  7408. pdata = devm_kzalloc(&pdev->dev,
  7409. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  7410. if (!pdata)
  7411. return -ENOMEM;
  7412. card = populate_snd_card_dailinks(&pdev->dev);
  7413. if (!card) {
  7414. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  7415. ret = -EINVAL;
  7416. goto err;
  7417. }
  7418. card->dev = &pdev->dev;
  7419. platform_set_drvdata(pdev, card);
  7420. snd_soc_card_set_drvdata(card, pdata);
  7421. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  7422. if (ret) {
  7423. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  7424. ret);
  7425. goto err;
  7426. }
  7427. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  7428. if (ret) {
  7429. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  7430. ret);
  7431. goto err;
  7432. }
  7433. ret = msm_populate_dai_link_component_of_node(card);
  7434. if (ret) {
  7435. ret = -EPROBE_DEFER;
  7436. goto err;
  7437. }
  7438. ret = msm_init_aux_dev(pdev, card);
  7439. if (ret)
  7440. goto err;
  7441. ret = devm_snd_soc_register_card(&pdev->dev, card);
  7442. if (ret == -EPROBE_DEFER) {
  7443. if (codec_reg_done)
  7444. ret = -EINVAL;
  7445. goto err;
  7446. } else if (ret) {
  7447. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  7448. ret);
  7449. goto err;
  7450. }
  7451. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  7452. spdev = pdev;
  7453. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7454. "qcom,hph-en1-gpio", 0);
  7455. if (!pdata->hph_en1_gpio_p) {
  7456. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7457. "qcom,hph-en1-gpio",
  7458. pdev->dev.of_node->full_name);
  7459. }
  7460. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7461. "qcom,hph-en0-gpio", 0);
  7462. if (!pdata->hph_en0_gpio_p) {
  7463. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7464. "qcom,hph-en0-gpio",
  7465. pdev->dev.of_node->full_name);
  7466. }
  7467. ret = of_property_read_string(pdev->dev.of_node,
  7468. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  7469. if (ret) {
  7470. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  7471. "qcom,mbhc-audio-jack-type",
  7472. pdev->dev.of_node->full_name);
  7473. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  7474. } else {
  7475. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  7476. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7477. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  7478. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  7479. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7480. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  7481. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  7482. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7483. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  7484. } else {
  7485. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7486. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  7487. }
  7488. }
  7489. /*
  7490. * Parse US-Euro gpio info from DT. Report no error if us-euro
  7491. * entry is not found in DT file as some targets do not support
  7492. * US-Euro detection
  7493. */
  7494. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7495. "qcom,us-euro-gpios", 0);
  7496. if (!pdata->us_euro_gpio_p) {
  7497. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  7498. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  7499. } else {
  7500. dev_dbg(&pdev->dev, "%s detected\n",
  7501. "qcom,us-euro-gpios");
  7502. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  7503. }
  7504. /* Parse pinctrl info from devicetree */
  7505. ret = msm_get_pinctrl(pdev);
  7506. if (!ret) {
  7507. pr_debug("%s: pinctrl parsing successful\n", __func__);
  7508. } else {
  7509. dev_dbg(&pdev->dev,
  7510. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  7511. __func__, ret);
  7512. ret = 0;
  7513. }
  7514. msm_i2s_auxpcm_init(pdev);
  7515. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7516. is_initial_boot = true;
  7517. ret = audio_notifier_register("sm6150",
  7518. AUDIO_NOTIFIER_ADSP_DOMAIN,
  7519. &service_nb);
  7520. if (ret < 0)
  7521. pr_err("%s: Audio notifier register failed ret = %d\n",
  7522. __func__, ret);
  7523. } else {
  7524. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7525. "qcom,cdc-dmic01-gpios",
  7526. 0);
  7527. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7528. "qcom,cdc-dmic23-gpios",
  7529. 0);
  7530. }
  7531. err:
  7532. return ret;
  7533. }
  7534. static int msm_asoc_machine_remove(struct platform_device *pdev)
  7535. {
  7536. audio_notifier_deregister("sm6150");
  7537. msm_i2s_auxpcm_deinit();
  7538. return 0;
  7539. }
  7540. static struct platform_driver sm6150_asoc_machine_driver = {
  7541. .driver = {
  7542. .name = DRV_NAME,
  7543. .owner = THIS_MODULE,
  7544. .pm = &snd_soc_pm_ops,
  7545. .of_match_table = sm6150_asoc_machine_of_match,
  7546. },
  7547. .probe = msm_asoc_machine_probe,
  7548. .remove = msm_asoc_machine_remove,
  7549. };
  7550. module_platform_driver(sm6150_asoc_machine_driver);
  7551. MODULE_DESCRIPTION("ALSA SoC msm");
  7552. MODULE_LICENSE("GPL v2");
  7553. MODULE_ALIAS("platform:" DRV_NAME);
  7554. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);