qmi.c 98 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define CONN_ROAM_FILE_NAME "wlan-connection-roaming"
  28. #define INI_EXT ".ini"
  29. #define INI_FILE_NAME_LEN 100
  30. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  31. #ifdef CONFIG_CNSS2_DEBUG
  32. #define QDSS_DEBUG_FILE_STR "debug_"
  33. #else
  34. #define QDSS_DEBUG_FILE_STR ""
  35. #endif
  36. #define HW_V1_NUMBER "v1"
  37. #define HW_V2_NUMBER "v2"
  38. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  39. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  40. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  41. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  42. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  43. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  44. #define DMS_QMI_MAX_MSG_LEN SZ_256
  45. #define MAX_SHADOW_REG_RESERVED 2
  46. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  47. MAX_SHADOW_REG_RESERVED)
  48. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  49. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  50. #ifdef CONFIG_CNSS2_DEBUG
  51. static bool ignore_qmi_failure;
  52. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  53. void cnss_ignore_qmi_failure(bool ignore)
  54. {
  55. ignore_qmi_failure = ignore;
  56. }
  57. #else
  58. #define CNSS_QMI_ASSERT() do { } while (0)
  59. void cnss_ignore_qmi_failure(bool ignore) { }
  60. #endif
  61. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  62. {
  63. switch (mode) {
  64. case CNSS_MISSION:
  65. return "MISSION";
  66. case CNSS_FTM:
  67. return "FTM";
  68. case CNSS_EPPING:
  69. return "EPPING";
  70. case CNSS_WALTEST:
  71. return "WALTEST";
  72. case CNSS_OFF:
  73. return "OFF";
  74. case CNSS_CCPM:
  75. return "CCPM";
  76. case CNSS_QVIT:
  77. return "QVIT";
  78. case CNSS_CALIBRATION:
  79. return "CALIBRATION";
  80. default:
  81. return "UNKNOWN";
  82. }
  83. }
  84. static int qmi_send_wait(struct qmi_handle *qmi, void *req, void *rsp,
  85. struct qmi_elem_info *req_ei,
  86. struct qmi_elem_info *rsp_ei,
  87. int req_id, size_t req_len,
  88. unsigned long timeout)
  89. {
  90. struct qmi_txn txn;
  91. int ret;
  92. char *err_msg;
  93. struct qmi_response_type_v01 *resp = rsp;
  94. ret = qmi_txn_init(qmi, &txn, rsp_ei, rsp);
  95. if (ret < 0) {
  96. err_msg = "Qmi fail: fail to init txn,";
  97. goto out;
  98. }
  99. ret = qmi_send_request(qmi, NULL, &txn, req_id,
  100. req_len, req_ei, req);
  101. if (ret < 0) {
  102. qmi_txn_cancel(&txn);
  103. err_msg = "Qmi fail: fail to send req,";
  104. goto out;
  105. }
  106. ret = qmi_txn_wait(&txn, timeout);
  107. if (ret < 0) {
  108. err_msg = "Qmi fail: wait timeout,";
  109. goto out;
  110. } else if (resp->result != QMI_RESULT_SUCCESS_V01) {
  111. err_msg = "Qmi fail: request rejected,";
  112. cnss_pr_err("Qmi fail: respons with error:%d\n",
  113. resp->error);
  114. ret = -resp->result;
  115. goto out;
  116. }
  117. cnss_pr_dbg("req %x success\n", req_id);
  118. return 0;
  119. out:
  120. cnss_pr_err("%s req %x, ret %d\n", err_msg, req_id, ret);
  121. return ret;
  122. }
  123. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  124. {
  125. struct wlfw_ind_register_req_msg_v01 *req;
  126. struct wlfw_ind_register_resp_msg_v01 *resp;
  127. struct qmi_txn txn;
  128. int ret = 0;
  129. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  130. plat_priv->driver_state);
  131. req = kzalloc(sizeof(*req), GFP_KERNEL);
  132. if (!req)
  133. return -ENOMEM;
  134. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  135. if (!resp) {
  136. kfree(req);
  137. return -ENOMEM;
  138. }
  139. req->client_id_valid = 1;
  140. req->client_id = WLFW_CLIENT_ID;
  141. req->request_mem_enable_valid = 1;
  142. req->request_mem_enable = 1;
  143. req->fw_mem_ready_enable_valid = 1;
  144. req->fw_mem_ready_enable = 1;
  145. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  146. req->fw_init_done_enable_valid = 1;
  147. req->fw_init_done_enable = 1;
  148. req->pin_connect_result_enable_valid = 1;
  149. req->pin_connect_result_enable = 1;
  150. req->cal_done_enable_valid = 1;
  151. req->cal_done_enable = 1;
  152. req->qdss_trace_req_mem_enable_valid = 1;
  153. req->qdss_trace_req_mem_enable = 1;
  154. req->qdss_trace_save_enable_valid = 1;
  155. req->qdss_trace_save_enable = 1;
  156. req->qdss_trace_free_enable_valid = 1;
  157. req->qdss_trace_free_enable = 1;
  158. req->respond_get_info_enable_valid = 1;
  159. req->respond_get_info_enable = 1;
  160. req->wfc_call_twt_config_enable_valid = 1;
  161. req->wfc_call_twt_config_enable = 1;
  162. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  163. wlfw_ind_register_resp_msg_v01_ei, resp);
  164. if (ret < 0) {
  165. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  166. ret);
  167. goto out;
  168. }
  169. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  170. QMI_WLFW_IND_REGISTER_REQ_V01,
  171. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  172. wlfw_ind_register_req_msg_v01_ei, req);
  173. if (ret < 0) {
  174. qmi_txn_cancel(&txn);
  175. cnss_pr_err("Failed to send indication register request, err: %d\n",
  176. ret);
  177. goto out;
  178. }
  179. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  180. if (ret < 0) {
  181. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  182. ret);
  183. goto out;
  184. }
  185. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  186. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  187. resp->resp.result, resp->resp.error);
  188. ret = -resp->resp.result;
  189. goto out;
  190. }
  191. if (resp->fw_status_valid) {
  192. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  193. ret = -EALREADY;
  194. goto qmi_registered;
  195. }
  196. }
  197. kfree(req);
  198. kfree(resp);
  199. return 0;
  200. out:
  201. CNSS_QMI_ASSERT();
  202. qmi_registered:
  203. kfree(req);
  204. kfree(resp);
  205. return ret;
  206. }
  207. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  208. struct wlfw_host_cap_req_msg_v01 *req)
  209. {
  210. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  211. plat_priv->device_id == MANGO_DEVICE_ID) {
  212. req->mlo_capable_valid = 1;
  213. req->mlo_capable = 1;
  214. req->mlo_chip_id_valid = 1;
  215. req->mlo_chip_id = 0;
  216. req->mlo_group_id_valid = 1;
  217. req->mlo_group_id = 0;
  218. req->max_mlo_peer_valid = 1;
  219. /* Max peer number generally won't change for the same device
  220. * but needs to be synced with host driver.
  221. */
  222. req->max_mlo_peer = 32;
  223. req->mlo_num_chips_valid = 1;
  224. req->mlo_num_chips = 1;
  225. req->mlo_chip_info_valid = 1;
  226. req->mlo_chip_info[0].chip_id = 0;
  227. req->mlo_chip_info[0].num_local_links = 2;
  228. req->mlo_chip_info[0].hw_link_id[0] = 0;
  229. req->mlo_chip_info[0].hw_link_id[1] = 1;
  230. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  231. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  232. }
  233. }
  234. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  235. {
  236. struct wlfw_host_cap_req_msg_v01 *req;
  237. struct wlfw_host_cap_resp_msg_v01 *resp;
  238. struct qmi_txn txn;
  239. int ret = 0;
  240. u64 iova_start = 0, iova_size = 0,
  241. iova_ipa_start = 0, iova_ipa_size = 0;
  242. u64 feature_list = 0;
  243. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  244. plat_priv->driver_state);
  245. req = kzalloc(sizeof(*req), GFP_KERNEL);
  246. if (!req)
  247. return -ENOMEM;
  248. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  249. if (!resp) {
  250. kfree(req);
  251. return -ENOMEM;
  252. }
  253. req->num_clients_valid = 1;
  254. req->num_clients = 1;
  255. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  256. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  257. if (req->wake_msi) {
  258. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  259. req->wake_msi_valid = 1;
  260. }
  261. req->bdf_support_valid = 1;
  262. req->bdf_support = 1;
  263. req->m3_support_valid = 1;
  264. req->m3_support = 1;
  265. req->m3_cache_support_valid = 1;
  266. req->m3_cache_support = 1;
  267. req->cal_done_valid = 1;
  268. req->cal_done = plat_priv->cal_done;
  269. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  270. if (!cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  271. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  272. &iova_ipa_size)) {
  273. req->ddr_range_valid = 1;
  274. req->ddr_range[0].start = iova_start;
  275. req->ddr_range[0].size = iova_size + iova_ipa_size;
  276. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  277. req->ddr_range[0].start, req->ddr_range[0].size);
  278. }
  279. req->host_build_type_valid = 1;
  280. req->host_build_type = cnss_get_host_build_type();
  281. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  282. ret = cnss_get_feature_list(plat_priv, &feature_list);
  283. if (!ret) {
  284. req->feature_list_valid = 1;
  285. req->feature_list = feature_list;
  286. cnss_pr_dbg("Sending feature list 0x%llx\n",
  287. req->feature_list);
  288. }
  289. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  290. wlfw_host_cap_resp_msg_v01_ei, resp);
  291. if (ret < 0) {
  292. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  293. ret);
  294. goto out;
  295. }
  296. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  297. QMI_WLFW_HOST_CAP_REQ_V01,
  298. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  299. wlfw_host_cap_req_msg_v01_ei, req);
  300. if (ret < 0) {
  301. qmi_txn_cancel(&txn);
  302. cnss_pr_err("Failed to send host capability request, err: %d\n",
  303. ret);
  304. goto out;
  305. }
  306. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  307. if (ret < 0) {
  308. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  309. ret);
  310. goto out;
  311. }
  312. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  313. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  314. resp->resp.result, resp->resp.error);
  315. ret = -resp->resp.result;
  316. goto out;
  317. }
  318. kfree(req);
  319. kfree(resp);
  320. return 0;
  321. out:
  322. CNSS_QMI_ASSERT();
  323. kfree(req);
  324. kfree(resp);
  325. return ret;
  326. }
  327. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  328. {
  329. struct wlfw_respond_mem_req_msg_v01 *req;
  330. struct wlfw_respond_mem_resp_msg_v01 *resp;
  331. struct qmi_txn txn;
  332. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  333. int ret = 0, i;
  334. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  335. plat_priv->driver_state);
  336. req = kzalloc(sizeof(*req), GFP_KERNEL);
  337. if (!req)
  338. return -ENOMEM;
  339. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  340. if (!resp) {
  341. kfree(req);
  342. return -ENOMEM;
  343. }
  344. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  345. for (i = 0; i < req->mem_seg_len; i++) {
  346. if (!fw_mem[i].pa || !fw_mem[i].size) {
  347. if (fw_mem[i].type == 0) {
  348. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  349. i);
  350. ret = -EINVAL;
  351. goto out;
  352. }
  353. cnss_pr_err("Memory for FW is not available for type: %u\n",
  354. fw_mem[i].type);
  355. ret = -ENOMEM;
  356. goto out;
  357. }
  358. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  359. fw_mem[i].va, &fw_mem[i].pa,
  360. fw_mem[i].size, fw_mem[i].type);
  361. req->mem_seg[i].addr = fw_mem[i].pa;
  362. req->mem_seg[i].size = fw_mem[i].size;
  363. req->mem_seg[i].type = fw_mem[i].type;
  364. }
  365. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  366. wlfw_respond_mem_resp_msg_v01_ei, resp);
  367. if (ret < 0) {
  368. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  369. ret);
  370. goto out;
  371. }
  372. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  373. QMI_WLFW_RESPOND_MEM_REQ_V01,
  374. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  375. wlfw_respond_mem_req_msg_v01_ei, req);
  376. if (ret < 0) {
  377. qmi_txn_cancel(&txn);
  378. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  379. ret);
  380. goto out;
  381. }
  382. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  383. if (ret < 0) {
  384. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  385. ret);
  386. goto out;
  387. }
  388. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  389. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  390. resp->resp.result, resp->resp.error);
  391. ret = -resp->resp.result;
  392. goto out;
  393. }
  394. kfree(req);
  395. kfree(resp);
  396. return 0;
  397. out:
  398. CNSS_QMI_ASSERT();
  399. kfree(req);
  400. kfree(resp);
  401. return ret;
  402. }
  403. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  404. {
  405. struct wlfw_cap_req_msg_v01 *req;
  406. struct wlfw_cap_resp_msg_v01 *resp;
  407. struct qmi_txn txn;
  408. char *fw_build_timestamp;
  409. int ret = 0, i;
  410. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  411. plat_priv->driver_state);
  412. req = kzalloc(sizeof(*req), GFP_KERNEL);
  413. if (!req)
  414. return -ENOMEM;
  415. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  416. if (!resp) {
  417. kfree(req);
  418. return -ENOMEM;
  419. }
  420. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  421. wlfw_cap_resp_msg_v01_ei, resp);
  422. if (ret < 0) {
  423. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  424. ret);
  425. goto out;
  426. }
  427. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  428. QMI_WLFW_CAP_REQ_V01,
  429. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  430. wlfw_cap_req_msg_v01_ei, req);
  431. if (ret < 0) {
  432. qmi_txn_cancel(&txn);
  433. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  434. ret);
  435. goto out;
  436. }
  437. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  438. if (ret < 0) {
  439. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  440. ret);
  441. goto out;
  442. }
  443. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  444. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  445. resp->resp.result, resp->resp.error);
  446. ret = -resp->resp.result;
  447. goto out;
  448. }
  449. if (resp->chip_info_valid) {
  450. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  451. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  452. }
  453. if (resp->board_info_valid)
  454. plat_priv->board_info.board_id = resp->board_info.board_id;
  455. else
  456. plat_priv->board_info.board_id = 0xFF;
  457. if (resp->soc_info_valid)
  458. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  459. if (resp->fw_version_info_valid) {
  460. plat_priv->fw_version_info.fw_version =
  461. resp->fw_version_info.fw_version;
  462. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  463. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  464. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  465. resp->fw_version_info.fw_build_timestamp,
  466. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  467. }
  468. if (resp->fw_build_id_valid) {
  469. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  470. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  471. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  472. }
  473. if (resp->voltage_mv_valid) {
  474. plat_priv->cpr_info.voltage = resp->voltage_mv;
  475. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  476. plat_priv->cpr_info.voltage);
  477. cnss_update_cpr_info(plat_priv);
  478. }
  479. if (resp->time_freq_hz_valid) {
  480. plat_priv->device_freq_hz = resp->time_freq_hz;
  481. cnss_pr_dbg("Device frequency is %d HZ\n",
  482. plat_priv->device_freq_hz);
  483. }
  484. if (resp->otp_version_valid)
  485. plat_priv->otp_version = resp->otp_version;
  486. if (resp->dev_mem_info_valid) {
  487. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  488. plat_priv->dev_mem_info[i].start =
  489. resp->dev_mem_info[i].start;
  490. plat_priv->dev_mem_info[i].size =
  491. resp->dev_mem_info[i].size;
  492. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  493. i, plat_priv->dev_mem_info[i].start,
  494. plat_priv->dev_mem_info[i].size);
  495. }
  496. }
  497. if (resp->fw_caps_valid)
  498. plat_priv->fw_pcie_gen_switch =
  499. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  500. if (resp->hang_data_length_valid &&
  501. resp->hang_data_length &&
  502. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  503. plat_priv->hang_event_data_len = resp->hang_data_length;
  504. else
  505. plat_priv->hang_event_data_len = 0;
  506. if (resp->hang_data_addr_offset_valid)
  507. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  508. else
  509. plat_priv->hang_data_addr_offset = 0;
  510. if (resp->hwid_bitmap_valid)
  511. plat_priv->hwid_bitmap = resp->hwid_bitmap;
  512. if (resp->ol_cpr_cfg_valid)
  513. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  514. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  515. plat_priv->chip_info.chip_id,
  516. plat_priv->chip_info.chip_family,
  517. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  518. plat_priv->otp_version);
  519. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s, hwid_bitmap:0x%x\n",
  520. plat_priv->fw_version_info.fw_version,
  521. plat_priv->fw_version_info.fw_build_timestamp,
  522. plat_priv->fw_build_id,
  523. plat_priv->hwid_bitmap);
  524. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  525. plat_priv->hang_event_data_len,
  526. plat_priv->hang_data_addr_offset);
  527. kfree(req);
  528. kfree(resp);
  529. return 0;
  530. out:
  531. CNSS_QMI_ASSERT();
  532. kfree(req);
  533. kfree(resp);
  534. return ret;
  535. }
  536. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  537. u32 bdf_type, char *filename,
  538. u32 filename_len)
  539. {
  540. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  541. int ret = 0;
  542. switch (bdf_type) {
  543. case CNSS_BDF_ELF:
  544. /* Board ID will be equal or less than 0xFF in GF mask case */
  545. if (plat_priv->board_info.board_id == 0xFF) {
  546. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  547. snprintf(filename_tmp, filename_len,
  548. ELF_BDF_FILE_NAME_GF);
  549. else
  550. snprintf(filename_tmp, filename_len,
  551. ELF_BDF_FILE_NAME);
  552. } else if (plat_priv->board_info.board_id < 0xFF) {
  553. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  554. snprintf(filename_tmp, filename_len,
  555. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  556. plat_priv->board_info.board_id);
  557. else
  558. snprintf(filename_tmp, filename_len,
  559. ELF_BDF_FILE_NAME_PREFIX "%02x",
  560. plat_priv->board_info.board_id);
  561. } else {
  562. snprintf(filename_tmp, filename_len,
  563. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  564. plat_priv->board_info.board_id >> 8 & 0xFF,
  565. plat_priv->board_info.board_id & 0xFF);
  566. }
  567. break;
  568. case CNSS_BDF_BIN:
  569. if (plat_priv->board_info.board_id == 0xFF) {
  570. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  571. snprintf(filename_tmp, filename_len,
  572. BIN_BDF_FILE_NAME_GF);
  573. else
  574. snprintf(filename_tmp, filename_len,
  575. BIN_BDF_FILE_NAME);
  576. } else if (plat_priv->board_info.board_id < 0xFF) {
  577. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  578. snprintf(filename_tmp, filename_len,
  579. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  580. plat_priv->board_info.board_id);
  581. else
  582. snprintf(filename_tmp, filename_len,
  583. BIN_BDF_FILE_NAME_PREFIX "%02x",
  584. plat_priv->board_info.board_id);
  585. } else {
  586. snprintf(filename_tmp, filename_len,
  587. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  588. plat_priv->board_info.board_id >> 8 & 0xFF,
  589. plat_priv->board_info.board_id & 0xFF);
  590. }
  591. break;
  592. case CNSS_BDF_REGDB:
  593. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  594. break;
  595. case CNSS_BDF_HDS:
  596. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  597. break;
  598. default:
  599. cnss_pr_err("Invalid BDF type: %d\n",
  600. plat_priv->ctrl_params.bdf_type);
  601. ret = -EINVAL;
  602. break;
  603. }
  604. if (!ret)
  605. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  606. return ret;
  607. }
  608. int cnss_wlfw_ini_file_send_sync(struct cnss_plat_data *plat_priv,
  609. enum wlfw_ini_file_type_v01 file_type)
  610. {
  611. struct wlfw_ini_file_download_req_msg_v01 *req;
  612. struct wlfw_ini_file_download_resp_msg_v01 *resp;
  613. struct qmi_txn txn;
  614. int ret = 0;
  615. const struct firmware *fw;
  616. char filename[INI_FILE_NAME_LEN] = {0};
  617. char tmp_filename[INI_FILE_NAME_LEN] = {0};
  618. const u8 *temp;
  619. unsigned int remaining;
  620. bool backup_supported = false;
  621. cnss_pr_info("INI File %u download\n", file_type);
  622. req = kzalloc(sizeof(*req), GFP_KERNEL);
  623. if (!req)
  624. return -ENOMEM;
  625. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  626. if (!resp) {
  627. kfree(req);
  628. return -ENOMEM;
  629. }
  630. switch (file_type) {
  631. case WLFW_CONN_ROAM_INI_V01:
  632. snprintf(tmp_filename, sizeof(tmp_filename),
  633. CONN_ROAM_FILE_NAME);
  634. backup_supported = true;
  635. break;
  636. default:
  637. cnss_pr_err("Invalid file type: %u\n", file_type);
  638. ret = -EINVAL;
  639. goto err_req_fw;
  640. }
  641. snprintf(filename, sizeof(filename), "%s%s", tmp_filename, INI_EXT);
  642. /* Fetch the file */
  643. ret = firmware_request_nowarn(&fw, filename, &plat_priv->plat_dev->dev);
  644. if (ret) {
  645. cnss_pr_err("Failed to get INI file %s (%d), Backup file: %s",
  646. filename, ret,
  647. backup_supported ? "Supported" : "Not Supported");
  648. if (!backup_supported)
  649. goto err_req_fw;
  650. snprintf(filename, sizeof(filename),
  651. "%s-%s%s", tmp_filename, "backup", INI_EXT);
  652. ret = firmware_request_nowarn(&fw, filename,
  653. &plat_priv->plat_dev->dev);
  654. if (ret) {
  655. cnss_pr_err("Failed to get INI file %s (%d)", filename,
  656. ret);
  657. goto err_req_fw;
  658. }
  659. }
  660. temp = fw->data;
  661. remaining = fw->size;
  662. cnss_pr_dbg("Downloading INI file: %s, size: %u\n", filename,
  663. remaining);
  664. while (remaining) {
  665. req->file_type_valid = 1;
  666. req->file_type = file_type;
  667. req->total_size_valid = 1;
  668. req->total_size = remaining;
  669. req->seg_id_valid = 1;
  670. req->data_valid = 1;
  671. req->end_valid = 1;
  672. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  673. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  674. } else {
  675. req->data_len = remaining;
  676. req->end = 1;
  677. }
  678. memcpy(req->data, temp, req->data_len);
  679. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  680. wlfw_ini_file_download_resp_msg_v01_ei,
  681. resp);
  682. if (ret < 0) {
  683. cnss_pr_err("Failed to initialize txn for INI file download request, err: %d\n",
  684. ret);
  685. goto err;
  686. }
  687. ret = qmi_send_request
  688. (&plat_priv->qmi_wlfw, NULL, &txn,
  689. QMI_WLFW_INI_FILE_DOWNLOAD_REQ_V01,
  690. WLFW_INI_FILE_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  691. wlfw_ini_file_download_req_msg_v01_ei, req);
  692. if (ret < 0) {
  693. qmi_txn_cancel(&txn);
  694. cnss_pr_err("Failed to send INI File download request, err: %d\n",
  695. ret);
  696. goto err;
  697. }
  698. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  699. if (ret < 0) {
  700. cnss_pr_err("Failed to wait for response of INI File download request, err: %d\n",
  701. ret);
  702. goto err;
  703. }
  704. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  705. cnss_pr_err("INI file download request failed, result: %d, err: %d\n",
  706. resp->resp.result, resp->resp.error);
  707. ret = -resp->resp.result;
  708. goto err;
  709. }
  710. remaining -= req->data_len;
  711. temp += req->data_len;
  712. req->seg_id++;
  713. }
  714. release_firmware(fw);
  715. kfree(req);
  716. kfree(resp);
  717. return 0;
  718. err:
  719. release_firmware(fw);
  720. err_req_fw:
  721. kfree(req);
  722. kfree(resp);
  723. return ret;
  724. }
  725. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  726. u32 bdf_type)
  727. {
  728. struct wlfw_bdf_download_req_msg_v01 *req;
  729. struct wlfw_bdf_download_resp_msg_v01 *resp;
  730. struct qmi_txn txn;
  731. char filename[MAX_FIRMWARE_NAME_LEN];
  732. const struct firmware *fw_entry = NULL;
  733. const u8 *temp;
  734. unsigned int remaining;
  735. int ret = 0;
  736. cnss_pr_dbg("Sending BDF download message, state: 0x%lx, type: %d\n",
  737. plat_priv->driver_state, bdf_type);
  738. req = kzalloc(sizeof(*req), GFP_KERNEL);
  739. if (!req)
  740. return -ENOMEM;
  741. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  742. if (!resp) {
  743. kfree(req);
  744. return -ENOMEM;
  745. }
  746. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  747. filename, sizeof(filename));
  748. if (ret)
  749. goto err_req_fw;
  750. if (bdf_type == CNSS_BDF_REGDB)
  751. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  752. filename);
  753. else
  754. ret = firmware_request_nowarn(&fw_entry, filename,
  755. &plat_priv->plat_dev->dev);
  756. if (ret) {
  757. cnss_pr_err("Failed to load BDF: %s, ret: %d\n", filename, ret);
  758. goto err_req_fw;
  759. }
  760. temp = fw_entry->data;
  761. remaining = fw_entry->size;
  762. cnss_pr_dbg("Downloading BDF: %s, size: %u\n", filename, remaining);
  763. while (remaining) {
  764. req->valid = 1;
  765. req->file_id_valid = 1;
  766. req->file_id = plat_priv->board_info.board_id;
  767. req->total_size_valid = 1;
  768. req->total_size = remaining;
  769. req->seg_id_valid = 1;
  770. req->data_valid = 1;
  771. req->end_valid = 1;
  772. req->bdf_type_valid = 1;
  773. req->bdf_type = bdf_type;
  774. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  775. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  776. } else {
  777. req->data_len = remaining;
  778. req->end = 1;
  779. }
  780. memcpy(req->data, temp, req->data_len);
  781. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  782. wlfw_bdf_download_resp_msg_v01_ei, resp);
  783. if (ret < 0) {
  784. cnss_pr_err("Failed to initialize txn for BDF download request, err: %d\n",
  785. ret);
  786. goto err_send;
  787. }
  788. ret = qmi_send_request
  789. (&plat_priv->qmi_wlfw, NULL, &txn,
  790. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  791. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  792. wlfw_bdf_download_req_msg_v01_ei, req);
  793. if (ret < 0) {
  794. qmi_txn_cancel(&txn);
  795. cnss_pr_err("Failed to send respond BDF download request, err: %d\n",
  796. ret);
  797. goto err_send;
  798. }
  799. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  800. if (ret < 0) {
  801. cnss_pr_err("Failed to wait for response of BDF download request, err: %d\n",
  802. ret);
  803. goto err_send;
  804. }
  805. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  806. cnss_pr_err("BDF download request failed, result: %d, err: %d\n",
  807. resp->resp.result, resp->resp.error);
  808. ret = -resp->resp.result;
  809. goto err_send;
  810. }
  811. remaining -= req->data_len;
  812. temp += req->data_len;
  813. req->seg_id++;
  814. }
  815. release_firmware(fw_entry);
  816. if (resp->host_bdf_data_valid) {
  817. /* QCA6490 enable S3E regulator for IPA configuration only */
  818. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  819. cnss_enable_int_pow_amp_vreg(plat_priv);
  820. plat_priv->cbc_file_download =
  821. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  822. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  823. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  824. plat_priv->cbc_file_download);
  825. }
  826. kfree(req);
  827. kfree(resp);
  828. return 0;
  829. err_send:
  830. release_firmware(fw_entry);
  831. err_req_fw:
  832. if (!(bdf_type == CNSS_BDF_REGDB ||
  833. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  834. ret == -EAGAIN))
  835. CNSS_QMI_ASSERT();
  836. kfree(req);
  837. kfree(resp);
  838. return ret;
  839. }
  840. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  841. {
  842. struct wlfw_m3_info_req_msg_v01 *req;
  843. struct wlfw_m3_info_resp_msg_v01 *resp;
  844. struct qmi_txn txn;
  845. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  846. int ret = 0;
  847. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  848. plat_priv->driver_state);
  849. req = kzalloc(sizeof(*req), GFP_KERNEL);
  850. if (!req)
  851. return -ENOMEM;
  852. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  853. if (!resp) {
  854. kfree(req);
  855. return -ENOMEM;
  856. }
  857. if (!m3_mem->pa || !m3_mem->size) {
  858. cnss_pr_err("Memory for M3 is not available\n");
  859. ret = -ENOMEM;
  860. goto out;
  861. }
  862. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  863. m3_mem->va, &m3_mem->pa, m3_mem->size);
  864. req->addr = plat_priv->m3_mem.pa;
  865. req->size = plat_priv->m3_mem.size;
  866. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  867. wlfw_m3_info_resp_msg_v01_ei, resp);
  868. if (ret < 0) {
  869. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  870. ret);
  871. goto out;
  872. }
  873. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  874. QMI_WLFW_M3_INFO_REQ_V01,
  875. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  876. wlfw_m3_info_req_msg_v01_ei, req);
  877. if (ret < 0) {
  878. qmi_txn_cancel(&txn);
  879. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  880. ret);
  881. goto out;
  882. }
  883. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  884. if (ret < 0) {
  885. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  886. ret);
  887. goto out;
  888. }
  889. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  890. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  891. resp->resp.result, resp->resp.error);
  892. ret = -resp->resp.result;
  893. goto out;
  894. }
  895. kfree(req);
  896. kfree(resp);
  897. return 0;
  898. out:
  899. CNSS_QMI_ASSERT();
  900. kfree(req);
  901. kfree(resp);
  902. return ret;
  903. }
  904. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  905. u8 *mac, u32 mac_len)
  906. {
  907. struct wlfw_mac_addr_req_msg_v01 req;
  908. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  909. struct qmi_txn txn;
  910. int ret;
  911. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  912. return -EINVAL;
  913. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  914. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  915. if (ret < 0) {
  916. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  917. ret);
  918. ret = -EIO;
  919. goto out;
  920. }
  921. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  922. mac, plat_priv->driver_state);
  923. memcpy(req.mac_addr, mac, mac_len);
  924. req.mac_addr_valid = 1;
  925. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  926. QMI_WLFW_MAC_ADDR_REQ_V01,
  927. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  928. wlfw_mac_addr_req_msg_v01_ei, &req);
  929. if (ret < 0) {
  930. qmi_txn_cancel(&txn);
  931. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  932. ret = -EIO;
  933. goto out;
  934. }
  935. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  936. if (ret < 0) {
  937. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  938. ret);
  939. ret = -EIO;
  940. goto out;
  941. }
  942. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  943. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  944. resp.resp.result);
  945. ret = -resp.resp.result;
  946. }
  947. out:
  948. return ret;
  949. }
  950. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  951. u32 total_size)
  952. {
  953. int ret = 0;
  954. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  955. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  956. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  957. unsigned int remaining;
  958. struct qmi_txn txn;
  959. cnss_pr_dbg("%s\n", __func__);
  960. req = kzalloc(sizeof(*req), GFP_KERNEL);
  961. if (!req)
  962. return -ENOMEM;
  963. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  964. if (!resp) {
  965. kfree(req);
  966. return -ENOMEM;
  967. }
  968. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  969. if (!p_qdss_trace_data) {
  970. ret = ENOMEM;
  971. goto end;
  972. }
  973. remaining = total_size;
  974. p_qdss_trace_data_temp = p_qdss_trace_data;
  975. while (remaining && resp->end == 0) {
  976. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  977. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  978. if (ret < 0) {
  979. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  980. ret);
  981. goto fail;
  982. }
  983. ret = qmi_send_request
  984. (&plat_priv->qmi_wlfw, NULL, &txn,
  985. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  986. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  987. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  988. if (ret < 0) {
  989. qmi_txn_cancel(&txn);
  990. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  991. ret);
  992. goto fail;
  993. }
  994. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  995. if (ret < 0) {
  996. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  997. ret);
  998. goto fail;
  999. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1000. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  1001. resp->resp.result, resp->resp.error);
  1002. ret = -resp->resp.result;
  1003. goto fail;
  1004. } else {
  1005. ret = 0;
  1006. }
  1007. cnss_pr_dbg("%s: response total size %d data len %d",
  1008. __func__, resp->total_size, resp->data_len);
  1009. if ((resp->total_size_valid == 1 &&
  1010. resp->total_size == total_size) &&
  1011. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  1012. (resp->data_valid == 1 &&
  1013. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01)) {
  1014. memcpy(p_qdss_trace_data_temp,
  1015. resp->data, resp->data_len);
  1016. } else {
  1017. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  1018. __func__,
  1019. total_size, req->seg_id,
  1020. resp->total_size_valid,
  1021. resp->total_size,
  1022. resp->seg_id_valid,
  1023. resp->seg_id,
  1024. resp->data_valid,
  1025. resp->data_len);
  1026. ret = -1;
  1027. goto fail;
  1028. }
  1029. remaining -= resp->data_len;
  1030. p_qdss_trace_data_temp += resp->data_len;
  1031. req->seg_id++;
  1032. }
  1033. if (remaining == 0 && (resp->end_valid && resp->end)) {
  1034. ret = cnss_genl_send_msg(p_qdss_trace_data,
  1035. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  1036. total_size);
  1037. if (ret < 0) {
  1038. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  1039. ret);
  1040. ret = -1;
  1041. goto fail;
  1042. }
  1043. } else {
  1044. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  1045. __func__,
  1046. remaining, resp->end_valid, resp->end);
  1047. ret = -1;
  1048. goto fail;
  1049. }
  1050. fail:
  1051. kfree(p_qdss_trace_data);
  1052. end:
  1053. kfree(req);
  1054. kfree(resp);
  1055. return ret;
  1056. }
  1057. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  1058. char *filename, u32 filename_len)
  1059. {
  1060. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  1061. char *debug_str = QDSS_DEBUG_FILE_STR;
  1062. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  1063. plat_priv->device_id == MANGO_DEVICE_ID)
  1064. debug_str = "";
  1065. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  1066. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1067. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  1068. else
  1069. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1070. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  1071. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  1072. }
  1073. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1074. {
  1075. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  1076. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  1077. struct qmi_txn txn;
  1078. const struct firmware *fw_entry = NULL;
  1079. const u8 *temp;
  1080. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  1081. unsigned int remaining;
  1082. int ret = 0;
  1083. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  1084. plat_priv->driver_state);
  1085. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1086. if (!req)
  1087. return -ENOMEM;
  1088. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1089. if (!resp) {
  1090. kfree(req);
  1091. return -ENOMEM;
  1092. }
  1093. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  1094. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  1095. qdss_cfg_filename);
  1096. if (ret) {
  1097. cnss_pr_dbg("Unable to load %s\n",
  1098. qdss_cfg_filename);
  1099. goto err_req_fw;
  1100. }
  1101. temp = fw_entry->data;
  1102. remaining = fw_entry->size;
  1103. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  1104. qdss_cfg_filename, remaining);
  1105. while (remaining) {
  1106. req->total_size_valid = 1;
  1107. req->total_size = remaining;
  1108. req->seg_id_valid = 1;
  1109. req->data_valid = 1;
  1110. req->end_valid = 1;
  1111. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1112. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  1113. } else {
  1114. req->data_len = remaining;
  1115. req->end = 1;
  1116. }
  1117. memcpy(req->data, temp, req->data_len);
  1118. ret = qmi_txn_init
  1119. (&plat_priv->qmi_wlfw, &txn,
  1120. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  1121. resp);
  1122. if (ret < 0) {
  1123. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  1124. ret);
  1125. goto err_send;
  1126. }
  1127. ret = qmi_send_request
  1128. (&plat_priv->qmi_wlfw, NULL, &txn,
  1129. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  1130. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  1131. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  1132. if (ret < 0) {
  1133. qmi_txn_cancel(&txn);
  1134. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  1135. ret);
  1136. goto err_send;
  1137. }
  1138. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1139. if (ret < 0) {
  1140. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  1141. ret);
  1142. goto err_send;
  1143. }
  1144. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1145. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  1146. resp->resp.result, resp->resp.error);
  1147. ret = -resp->resp.result;
  1148. goto err_send;
  1149. }
  1150. remaining -= req->data_len;
  1151. temp += req->data_len;
  1152. req->seg_id++;
  1153. }
  1154. release_firmware(fw_entry);
  1155. kfree(req);
  1156. kfree(resp);
  1157. return 0;
  1158. err_send:
  1159. release_firmware(fw_entry);
  1160. err_req_fw:
  1161. kfree(req);
  1162. kfree(resp);
  1163. return ret;
  1164. }
  1165. static int wlfw_send_qdss_trace_mode_req
  1166. (struct cnss_plat_data *plat_priv,
  1167. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1168. unsigned long long option)
  1169. {
  1170. int rc = 0;
  1171. int tmp = 0;
  1172. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1173. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1174. struct qmi_txn txn;
  1175. if (!plat_priv)
  1176. return -ENODEV;
  1177. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1178. if (!req)
  1179. return -ENOMEM;
  1180. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1181. if (!resp) {
  1182. kfree(req);
  1183. return -ENOMEM;
  1184. }
  1185. req->mode_valid = 1;
  1186. req->mode = mode;
  1187. req->option_valid = 1;
  1188. req->option = option;
  1189. tmp = plat_priv->hw_trc_override;
  1190. req->hw_trc_disable_override_valid = 1;
  1191. req->hw_trc_disable_override =
  1192. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1193. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1194. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1195. __func__, mode, option, req->hw_trc_disable_override);
  1196. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1197. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1198. if (rc < 0) {
  1199. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1200. rc);
  1201. goto out;
  1202. }
  1203. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1204. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1205. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1206. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1207. if (rc < 0) {
  1208. qmi_txn_cancel(&txn);
  1209. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1210. goto out;
  1211. }
  1212. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1213. if (rc < 0) {
  1214. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1215. rc);
  1216. goto out;
  1217. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1218. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1219. resp->resp.result, resp->resp.error);
  1220. rc = -resp->resp.result;
  1221. goto out;
  1222. }
  1223. kfree(resp);
  1224. kfree(req);
  1225. return rc;
  1226. out:
  1227. kfree(resp);
  1228. kfree(req);
  1229. CNSS_QMI_ASSERT();
  1230. return rc;
  1231. }
  1232. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1233. {
  1234. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1235. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1236. }
  1237. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1238. {
  1239. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1240. option);
  1241. }
  1242. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1243. enum cnss_driver_mode mode)
  1244. {
  1245. struct wlfw_wlan_mode_req_msg_v01 *req;
  1246. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1247. struct qmi_txn txn;
  1248. int ret = 0;
  1249. if (!plat_priv)
  1250. return -ENODEV;
  1251. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1252. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1253. if (mode == CNSS_OFF &&
  1254. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1255. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1256. return 0;
  1257. }
  1258. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1259. if (!req)
  1260. return -ENOMEM;
  1261. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1262. if (!resp) {
  1263. kfree(req);
  1264. return -ENOMEM;
  1265. }
  1266. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1267. req->hw_debug_valid = 1;
  1268. req->hw_debug = 0;
  1269. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1270. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1271. if (ret < 0) {
  1272. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1273. cnss_qmi_mode_to_str(mode), mode, ret);
  1274. goto out;
  1275. }
  1276. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1277. QMI_WLFW_WLAN_MODE_REQ_V01,
  1278. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1279. wlfw_wlan_mode_req_msg_v01_ei, req);
  1280. if (ret < 0) {
  1281. qmi_txn_cancel(&txn);
  1282. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1283. cnss_qmi_mode_to_str(mode), mode, ret);
  1284. goto out;
  1285. }
  1286. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1287. if (ret < 0) {
  1288. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1289. cnss_qmi_mode_to_str(mode), mode, ret);
  1290. goto out;
  1291. }
  1292. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1293. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1294. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1295. resp->resp.error);
  1296. ret = -resp->resp.result;
  1297. goto out;
  1298. }
  1299. kfree(req);
  1300. kfree(resp);
  1301. return 0;
  1302. out:
  1303. if (mode == CNSS_OFF) {
  1304. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1305. ret = 0;
  1306. } else {
  1307. CNSS_QMI_ASSERT();
  1308. }
  1309. kfree(req);
  1310. kfree(resp);
  1311. return ret;
  1312. }
  1313. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1314. struct cnss_wlan_enable_cfg *config,
  1315. const char *host_version)
  1316. {
  1317. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1318. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1319. struct qmi_txn txn;
  1320. u32 i;
  1321. int ret = 0;
  1322. if (!plat_priv)
  1323. return -ENODEV;
  1324. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1325. plat_priv->driver_state);
  1326. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1327. if (!req)
  1328. return -ENOMEM;
  1329. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1330. if (!resp) {
  1331. kfree(req);
  1332. return -ENOMEM;
  1333. }
  1334. req->host_version_valid = 1;
  1335. strlcpy(req->host_version, host_version,
  1336. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1337. req->tgt_cfg_valid = 1;
  1338. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1339. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1340. else
  1341. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1342. for (i = 0; i < req->tgt_cfg_len; i++) {
  1343. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1344. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1345. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1346. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1347. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1348. }
  1349. req->svc_cfg_valid = 1;
  1350. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1351. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1352. else
  1353. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1354. for (i = 0; i < req->svc_cfg_len; i++) {
  1355. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1356. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1357. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1358. }
  1359. if (plat_priv->device_id != KIWI_DEVICE_ID &&
  1360. plat_priv->device_id != MANGO_DEVICE_ID) {
  1361. req->shadow_reg_v2_valid = 1;
  1362. if (config->num_shadow_reg_v2_cfg >
  1363. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1364. req->shadow_reg_v2_len = QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1365. else
  1366. req->shadow_reg_v2_len = config->num_shadow_reg_v2_cfg;
  1367. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1368. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01)
  1369. * req->shadow_reg_v2_len);
  1370. } else {
  1371. req->shadow_reg_v3_valid = 1;
  1372. if (config->num_shadow_reg_v3_cfg >
  1373. MAX_NUM_SHADOW_REG_V3)
  1374. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1375. else
  1376. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1377. plat_priv->num_shadow_regs_v3 = req->shadow_reg_v3_len;
  1378. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1379. plat_priv->num_shadow_regs_v3);
  1380. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1381. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01)
  1382. * req->shadow_reg_v3_len);
  1383. }
  1384. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1385. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1386. if (ret < 0) {
  1387. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1388. ret);
  1389. goto out;
  1390. }
  1391. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1392. QMI_WLFW_WLAN_CFG_REQ_V01,
  1393. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1394. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1395. if (ret < 0) {
  1396. qmi_txn_cancel(&txn);
  1397. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1398. ret);
  1399. goto out;
  1400. }
  1401. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1402. if (ret < 0) {
  1403. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1404. ret);
  1405. goto out;
  1406. }
  1407. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1408. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1409. resp->resp.result, resp->resp.error);
  1410. ret = -resp->resp.result;
  1411. goto out;
  1412. }
  1413. kfree(req);
  1414. kfree(resp);
  1415. return 0;
  1416. out:
  1417. CNSS_QMI_ASSERT();
  1418. kfree(req);
  1419. kfree(resp);
  1420. return ret;
  1421. }
  1422. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1423. u32 offset, u32 mem_type,
  1424. u32 data_len, u8 *data)
  1425. {
  1426. struct wlfw_athdiag_read_req_msg_v01 *req;
  1427. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1428. struct qmi_txn txn;
  1429. int ret = 0;
  1430. if (!plat_priv)
  1431. return -ENODEV;
  1432. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1433. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1434. data, data_len);
  1435. return -EINVAL;
  1436. }
  1437. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1438. plat_priv->driver_state, offset, mem_type, data_len);
  1439. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1440. if (!req)
  1441. return -ENOMEM;
  1442. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1443. if (!resp) {
  1444. kfree(req);
  1445. return -ENOMEM;
  1446. }
  1447. req->offset = offset;
  1448. req->mem_type = mem_type;
  1449. req->data_len = data_len;
  1450. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1451. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1452. if (ret < 0) {
  1453. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1454. ret);
  1455. goto out;
  1456. }
  1457. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1458. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1459. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1460. wlfw_athdiag_read_req_msg_v01_ei, req);
  1461. if (ret < 0) {
  1462. qmi_txn_cancel(&txn);
  1463. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1464. ret);
  1465. goto out;
  1466. }
  1467. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1468. if (ret < 0) {
  1469. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1470. ret);
  1471. goto out;
  1472. }
  1473. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1474. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1475. resp->resp.result, resp->resp.error);
  1476. ret = -resp->resp.result;
  1477. goto out;
  1478. }
  1479. if (!resp->data_valid || resp->data_len != data_len) {
  1480. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1481. resp->data_valid, resp->data_len);
  1482. ret = -EINVAL;
  1483. goto out;
  1484. }
  1485. memcpy(data, resp->data, resp->data_len);
  1486. kfree(req);
  1487. kfree(resp);
  1488. return 0;
  1489. out:
  1490. kfree(req);
  1491. kfree(resp);
  1492. return ret;
  1493. }
  1494. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1495. u32 offset, u32 mem_type,
  1496. u32 data_len, u8 *data)
  1497. {
  1498. struct wlfw_athdiag_write_req_msg_v01 *req;
  1499. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1500. struct qmi_txn txn;
  1501. int ret = 0;
  1502. if (!plat_priv)
  1503. return -ENODEV;
  1504. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1505. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1506. data, data_len);
  1507. return -EINVAL;
  1508. }
  1509. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1510. plat_priv->driver_state, offset, mem_type, data_len, data);
  1511. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1512. if (!req)
  1513. return -ENOMEM;
  1514. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1515. if (!resp) {
  1516. kfree(req);
  1517. return -ENOMEM;
  1518. }
  1519. req->offset = offset;
  1520. req->mem_type = mem_type;
  1521. req->data_len = data_len;
  1522. memcpy(req->data, data, data_len);
  1523. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1524. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1525. if (ret < 0) {
  1526. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1527. ret);
  1528. goto out;
  1529. }
  1530. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1531. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1532. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1533. wlfw_athdiag_write_req_msg_v01_ei, req);
  1534. if (ret < 0) {
  1535. qmi_txn_cancel(&txn);
  1536. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1537. ret);
  1538. goto out;
  1539. }
  1540. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1541. if (ret < 0) {
  1542. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1543. ret);
  1544. goto out;
  1545. }
  1546. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1547. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1548. resp->resp.result, resp->resp.error);
  1549. ret = -resp->resp.result;
  1550. goto out;
  1551. }
  1552. kfree(req);
  1553. kfree(resp);
  1554. return 0;
  1555. out:
  1556. kfree(req);
  1557. kfree(resp);
  1558. return ret;
  1559. }
  1560. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1561. u8 fw_log_mode)
  1562. {
  1563. struct wlfw_ini_req_msg_v01 *req;
  1564. struct wlfw_ini_resp_msg_v01 *resp;
  1565. struct qmi_txn txn;
  1566. int ret = 0;
  1567. if (!plat_priv)
  1568. return -ENODEV;
  1569. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1570. plat_priv->driver_state, fw_log_mode);
  1571. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1572. if (!req)
  1573. return -ENOMEM;
  1574. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1575. if (!resp) {
  1576. kfree(req);
  1577. return -ENOMEM;
  1578. }
  1579. req->enablefwlog_valid = 1;
  1580. req->enablefwlog = fw_log_mode;
  1581. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1582. wlfw_ini_resp_msg_v01_ei, resp);
  1583. if (ret < 0) {
  1584. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1585. fw_log_mode, ret);
  1586. goto out;
  1587. }
  1588. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1589. QMI_WLFW_INI_REQ_V01,
  1590. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1591. wlfw_ini_req_msg_v01_ei, req);
  1592. if (ret < 0) {
  1593. qmi_txn_cancel(&txn);
  1594. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1595. fw_log_mode, ret);
  1596. goto out;
  1597. }
  1598. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1599. if (ret < 0) {
  1600. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1601. fw_log_mode, ret);
  1602. goto out;
  1603. }
  1604. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1605. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1606. fw_log_mode, resp->resp.result, resp->resp.error);
  1607. ret = -resp->resp.result;
  1608. goto out;
  1609. }
  1610. kfree(req);
  1611. kfree(resp);
  1612. return 0;
  1613. out:
  1614. kfree(req);
  1615. kfree(resp);
  1616. return ret;
  1617. }
  1618. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1619. {
  1620. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1621. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1622. struct qmi_txn txn;
  1623. int ret = 0;
  1624. if (!plat_priv)
  1625. return -ENODEV;
  1626. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1627. !plat_priv->fw_pcie_gen_switch) {
  1628. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1629. return 0;
  1630. }
  1631. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1632. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1633. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1634. plat_priv->pcie_gen_speed;
  1635. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1636. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1637. if (ret < 0) {
  1638. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1639. ret);
  1640. goto out;
  1641. }
  1642. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1643. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1644. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1645. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1646. if (ret < 0) {
  1647. qmi_txn_cancel(&txn);
  1648. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1649. goto out;
  1650. }
  1651. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1652. if (ret < 0) {
  1653. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1654. ret);
  1655. goto out;
  1656. }
  1657. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1658. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1659. plat_priv->pcie_gen_speed, resp.resp.result,
  1660. resp.resp.error);
  1661. ret = -resp.resp.result;
  1662. }
  1663. out:
  1664. /* Reset PCIE Gen speed after one time use */
  1665. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1666. return ret;
  1667. }
  1668. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1669. {
  1670. struct wlfw_antenna_switch_req_msg_v01 *req;
  1671. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1672. struct qmi_txn txn;
  1673. int ret = 0;
  1674. if (!plat_priv)
  1675. return -ENODEV;
  1676. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1677. plat_priv->driver_state);
  1678. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1679. if (!req)
  1680. return -ENOMEM;
  1681. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1682. if (!resp) {
  1683. kfree(req);
  1684. return -ENOMEM;
  1685. }
  1686. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1687. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1688. if (ret < 0) {
  1689. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1690. ret);
  1691. goto out;
  1692. }
  1693. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1694. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1695. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1696. wlfw_antenna_switch_req_msg_v01_ei, req);
  1697. if (ret < 0) {
  1698. qmi_txn_cancel(&txn);
  1699. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1700. ret);
  1701. goto out;
  1702. }
  1703. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1704. if (ret < 0) {
  1705. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1706. ret);
  1707. goto out;
  1708. }
  1709. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1710. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1711. resp->resp.result, resp->resp.error);
  1712. ret = -resp->resp.result;
  1713. goto out;
  1714. }
  1715. if (resp->antenna_valid)
  1716. plat_priv->antenna = resp->antenna;
  1717. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1718. resp->antenna_valid, resp->antenna);
  1719. kfree(req);
  1720. kfree(resp);
  1721. return 0;
  1722. out:
  1723. kfree(req);
  1724. kfree(resp);
  1725. return ret;
  1726. }
  1727. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1728. {
  1729. struct wlfw_antenna_grant_req_msg_v01 *req;
  1730. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1731. struct qmi_txn txn;
  1732. int ret = 0;
  1733. if (!plat_priv)
  1734. return -ENODEV;
  1735. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1736. plat_priv->driver_state, plat_priv->grant);
  1737. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1738. if (!req)
  1739. return -ENOMEM;
  1740. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1741. if (!resp) {
  1742. kfree(req);
  1743. return -ENOMEM;
  1744. }
  1745. req->grant_valid = 1;
  1746. req->grant = plat_priv->grant;
  1747. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1748. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1749. if (ret < 0) {
  1750. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1751. ret);
  1752. goto out;
  1753. }
  1754. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1755. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1756. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1757. wlfw_antenna_grant_req_msg_v01_ei, req);
  1758. if (ret < 0) {
  1759. qmi_txn_cancel(&txn);
  1760. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1761. ret);
  1762. goto out;
  1763. }
  1764. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1765. if (ret < 0) {
  1766. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1767. ret);
  1768. goto out;
  1769. }
  1770. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1771. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1772. resp->resp.result, resp->resp.error);
  1773. ret = -resp->resp.result;
  1774. goto out;
  1775. }
  1776. kfree(req);
  1777. kfree(resp);
  1778. return 0;
  1779. out:
  1780. kfree(req);
  1781. kfree(resp);
  1782. return ret;
  1783. }
  1784. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1785. {
  1786. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1787. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1788. struct qmi_txn txn;
  1789. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1790. int ret = 0;
  1791. int i;
  1792. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1793. plat_priv->driver_state);
  1794. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1795. if (!req)
  1796. return -ENOMEM;
  1797. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1798. if (!resp) {
  1799. kfree(req);
  1800. return -ENOMEM;
  1801. }
  1802. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1803. for (i = 0; i < req->mem_seg_len; i++) {
  1804. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1805. qdss_mem[i].va, &qdss_mem[i].pa,
  1806. qdss_mem[i].size, qdss_mem[i].type);
  1807. req->mem_seg[i].addr = qdss_mem[i].pa;
  1808. req->mem_seg[i].size = qdss_mem[i].size;
  1809. req->mem_seg[i].type = qdss_mem[i].type;
  1810. }
  1811. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1812. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1813. if (ret < 0) {
  1814. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1815. ret);
  1816. goto out;
  1817. }
  1818. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1819. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1820. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1821. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1822. if (ret < 0) {
  1823. qmi_txn_cancel(&txn);
  1824. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1825. ret);
  1826. goto out;
  1827. }
  1828. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1829. if (ret < 0) {
  1830. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1831. ret);
  1832. goto out;
  1833. }
  1834. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1835. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  1836. resp->resp.result, resp->resp.error);
  1837. ret = -resp->resp.result;
  1838. goto out;
  1839. }
  1840. kfree(req);
  1841. kfree(resp);
  1842. return 0;
  1843. out:
  1844. kfree(req);
  1845. kfree(resp);
  1846. return ret;
  1847. }
  1848. static int cnss_wlfw_wfc_call_status_send_sync
  1849. (struct cnss_plat_data *plat_priv,
  1850. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  1851. {
  1852. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1853. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1854. struct qmi_txn txn;
  1855. int ret = 0;
  1856. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1857. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  1858. return -EINVAL;
  1859. }
  1860. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1861. if (!req)
  1862. return -ENOMEM;
  1863. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1864. if (!resp) {
  1865. kfree(req);
  1866. return -ENOMEM;
  1867. }
  1868. /**
  1869. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  1870. * But in r2 update QMI structure is expanded and as an effect qmi
  1871. * decoded structures have padding. Thus we cannot use buffer design.
  1872. * For backward compatibility for r1 design copy only wfc_call_active
  1873. * value in hex buffer.
  1874. */
  1875. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  1876. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  1877. /* wfc_call_active is mandatory in IMS indication */
  1878. req->wfc_call_active_valid = 1;
  1879. req->wfc_call_active = ind_msg->wfc_call_active;
  1880. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  1881. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  1882. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  1883. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  1884. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  1885. req->twt_ims_start = ind_msg->twt_ims_start;
  1886. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  1887. req->twt_ims_int = ind_msg->twt_ims_int;
  1888. req->media_quality_valid = ind_msg->media_quality_valid;
  1889. req->media_quality =
  1890. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  1891. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1892. plat_priv->driver_state);
  1893. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1894. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1895. if (ret < 0) {
  1896. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1897. ret);
  1898. goto out;
  1899. }
  1900. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1901. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1902. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1903. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1904. if (ret < 0) {
  1905. qmi_txn_cancel(&txn);
  1906. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1907. ret);
  1908. goto out;
  1909. }
  1910. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1911. if (ret < 0) {
  1912. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1913. ret);
  1914. goto out;
  1915. }
  1916. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1917. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1918. resp->resp.result, resp->resp.error);
  1919. ret = -resp->resp.result;
  1920. goto out;
  1921. }
  1922. ret = 0;
  1923. out:
  1924. kfree(req);
  1925. kfree(resp);
  1926. return ret;
  1927. }
  1928. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  1929. {
  1930. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  1931. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  1932. struct qmi_txn txn;
  1933. int ret = 0;
  1934. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  1935. plat_priv->dynamic_feature,
  1936. plat_priv->driver_state);
  1937. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1938. if (!req)
  1939. return -ENOMEM;
  1940. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1941. if (!resp) {
  1942. kfree(req);
  1943. return -ENOMEM;
  1944. }
  1945. req->mask_valid = 1;
  1946. req->mask = plat_priv->dynamic_feature;
  1947. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1948. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  1949. if (ret < 0) {
  1950. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  1951. ret);
  1952. goto out;
  1953. }
  1954. ret = qmi_send_request
  1955. (&plat_priv->qmi_wlfw, NULL, &txn,
  1956. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  1957. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  1958. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  1959. if (ret < 0) {
  1960. qmi_txn_cancel(&txn);
  1961. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  1962. ret);
  1963. goto out;
  1964. }
  1965. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1966. if (ret < 0) {
  1967. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  1968. ret);
  1969. goto out;
  1970. }
  1971. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1972. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  1973. resp->resp.result, resp->resp.error);
  1974. ret = -resp->resp.result;
  1975. goto out;
  1976. }
  1977. out:
  1978. kfree(req);
  1979. kfree(resp);
  1980. return ret;
  1981. }
  1982. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  1983. void *cmd, int cmd_len)
  1984. {
  1985. struct wlfw_get_info_req_msg_v01 *req;
  1986. struct wlfw_get_info_resp_msg_v01 *resp;
  1987. struct qmi_txn txn;
  1988. int ret = 0;
  1989. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  1990. type, cmd_len, plat_priv->driver_state);
  1991. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  1992. return -EINVAL;
  1993. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1994. if (!req)
  1995. return -ENOMEM;
  1996. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1997. if (!resp) {
  1998. kfree(req);
  1999. return -ENOMEM;
  2000. }
  2001. req->type = type;
  2002. req->data_len = cmd_len;
  2003. memcpy(req->data, cmd, req->data_len);
  2004. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2005. wlfw_get_info_resp_msg_v01_ei, resp);
  2006. if (ret < 0) {
  2007. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  2008. ret);
  2009. goto out;
  2010. }
  2011. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2012. QMI_WLFW_GET_INFO_REQ_V01,
  2013. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2014. wlfw_get_info_req_msg_v01_ei, req);
  2015. if (ret < 0) {
  2016. qmi_txn_cancel(&txn);
  2017. cnss_pr_err("Failed to send get info request, err: %d\n",
  2018. ret);
  2019. goto out;
  2020. }
  2021. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2022. if (ret < 0) {
  2023. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  2024. ret);
  2025. goto out;
  2026. }
  2027. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2028. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  2029. resp->resp.result, resp->resp.error);
  2030. ret = -resp->resp.result;
  2031. goto out;
  2032. }
  2033. kfree(req);
  2034. kfree(resp);
  2035. return 0;
  2036. out:
  2037. kfree(req);
  2038. kfree(resp);
  2039. return ret;
  2040. }
  2041. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  2042. {
  2043. return QMI_WLFW_TIMEOUT_MS;
  2044. }
  2045. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2046. struct sockaddr_qrtr *sq,
  2047. struct qmi_txn *txn, const void *data)
  2048. {
  2049. struct cnss_plat_data *plat_priv =
  2050. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2051. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  2052. int i;
  2053. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  2054. if (!txn) {
  2055. cnss_pr_err("Spurious indication\n");
  2056. return;
  2057. }
  2058. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  2059. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  2060. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  2061. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2062. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  2063. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  2064. if (!plat_priv->fw_mem[i].va &&
  2065. plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  2066. plat_priv->fw_mem[i].attrs |=
  2067. DMA_ATTR_FORCE_CONTIGUOUS;
  2068. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  2069. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  2070. }
  2071. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  2072. 0, NULL);
  2073. }
  2074. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2075. struct sockaddr_qrtr *sq,
  2076. struct qmi_txn *txn, const void *data)
  2077. {
  2078. struct cnss_plat_data *plat_priv =
  2079. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2080. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  2081. if (!txn) {
  2082. cnss_pr_err("Spurious indication\n");
  2083. return;
  2084. }
  2085. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  2086. 0, NULL);
  2087. }
  2088. /**
  2089. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  2090. *
  2091. * This event is not required for HST/ HSP as FW calibration done is
  2092. * provided in QMI_WLFW_CAL_DONE_IND_V01
  2093. */
  2094. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2095. struct sockaddr_qrtr *sq,
  2096. struct qmi_txn *txn, const void *data)
  2097. {
  2098. struct cnss_plat_data *plat_priv =
  2099. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2100. struct cnss_cal_info *cal_info;
  2101. if (!txn) {
  2102. cnss_pr_err("Spurious indication\n");
  2103. return;
  2104. }
  2105. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  2106. plat_priv->device_id == QCA6490_DEVICE_ID) {
  2107. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  2108. return;
  2109. }
  2110. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  2111. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2112. if (!cal_info)
  2113. return;
  2114. cal_info->cal_status = CNSS_CAL_DONE;
  2115. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2116. 0, cal_info);
  2117. }
  2118. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2119. struct sockaddr_qrtr *sq,
  2120. struct qmi_txn *txn, const void *data)
  2121. {
  2122. struct cnss_plat_data *plat_priv =
  2123. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2124. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  2125. if (!txn) {
  2126. cnss_pr_err("Spurious indication\n");
  2127. return;
  2128. }
  2129. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  2130. }
  2131. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  2132. struct sockaddr_qrtr *sq,
  2133. struct qmi_txn *txn, const void *data)
  2134. {
  2135. struct cnss_plat_data *plat_priv =
  2136. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2137. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  2138. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  2139. if (!txn) {
  2140. cnss_pr_err("Spurious indication\n");
  2141. return;
  2142. }
  2143. if (ind_msg->pwr_pin_result_valid)
  2144. plat_priv->pin_result.fw_pwr_pin_result =
  2145. ind_msg->pwr_pin_result;
  2146. if (ind_msg->phy_io_pin_result_valid)
  2147. plat_priv->pin_result.fw_phy_io_pin_result =
  2148. ind_msg->phy_io_pin_result;
  2149. if (ind_msg->rf_pin_result_valid)
  2150. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  2151. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  2152. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  2153. ind_msg->rf_pin_result);
  2154. }
  2155. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  2156. u32 cal_file_download_size)
  2157. {
  2158. struct wlfw_cal_report_req_msg_v01 req = {0};
  2159. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  2160. struct qmi_txn txn;
  2161. int ret = 0;
  2162. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  2163. cal_file_download_size, plat_priv->driver_state);
  2164. req.cal_file_download_size_valid = 1;
  2165. req.cal_file_download_size = cal_file_download_size;
  2166. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2167. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2168. if (ret < 0) {
  2169. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2170. ret);
  2171. goto out;
  2172. }
  2173. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2174. QMI_WLFW_CAL_REPORT_REQ_V01,
  2175. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2176. wlfw_cal_report_req_msg_v01_ei, &req);
  2177. if (ret < 0) {
  2178. qmi_txn_cancel(&txn);
  2179. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2180. ret);
  2181. goto out;
  2182. }
  2183. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2184. if (ret < 0) {
  2185. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2186. ret);
  2187. goto out;
  2188. }
  2189. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2190. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2191. resp.resp.result, resp.resp.error);
  2192. ret = -resp.resp.result;
  2193. goto out;
  2194. }
  2195. out:
  2196. return ret;
  2197. }
  2198. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2199. struct sockaddr_qrtr *sq,
  2200. struct qmi_txn *txn, const void *data)
  2201. {
  2202. struct cnss_plat_data *plat_priv =
  2203. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2204. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2205. struct cnss_cal_info *cal_info;
  2206. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2207. ind->cal_file_upload_size);
  2208. cnss_pr_info("Calibration took %d ms\n",
  2209. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2210. if (!txn) {
  2211. cnss_pr_err("Spurious indication\n");
  2212. return;
  2213. }
  2214. if (ind->cal_file_upload_size_valid)
  2215. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2216. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2217. if (!cal_info)
  2218. return;
  2219. cal_info->cal_status = CNSS_CAL_DONE;
  2220. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2221. 0, cal_info);
  2222. }
  2223. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2224. struct sockaddr_qrtr *sq,
  2225. struct qmi_txn *txn,
  2226. const void *data)
  2227. {
  2228. struct cnss_plat_data *plat_priv =
  2229. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2230. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2231. int i;
  2232. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2233. if (!txn) {
  2234. cnss_pr_err("Spurious indication\n");
  2235. return;
  2236. }
  2237. if (plat_priv->qdss_mem_seg_len) {
  2238. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2239. plat_priv->qdss_mem_seg_len);
  2240. return;
  2241. }
  2242. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2243. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2244. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2245. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2246. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2247. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2248. }
  2249. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2250. 0, NULL);
  2251. }
  2252. /**
  2253. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2254. *
  2255. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2256. * fw memory segment for dumping to file system. Only one type of mem can be
  2257. * saved per indication and is provided in mem seg index 0.
  2258. *
  2259. * Return: None
  2260. */
  2261. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2262. struct sockaddr_qrtr *sq,
  2263. struct qmi_txn *txn,
  2264. const void *data)
  2265. {
  2266. struct cnss_plat_data *plat_priv =
  2267. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2268. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2269. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2270. int i = 0;
  2271. if (!txn || !data) {
  2272. cnss_pr_err("Spurious indication\n");
  2273. return;
  2274. }
  2275. cnss_pr_dbg("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2276. ind_msg->source, ind_msg->mem_seg_valid,
  2277. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2278. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2279. if (!event_data)
  2280. return;
  2281. event_data->mem_type = ind_msg->mem_seg[0].type;
  2282. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2283. event_data->total_size = ind_msg->total_size;
  2284. if (ind_msg->mem_seg_valid) {
  2285. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2286. cnss_pr_err("Invalid seg len indication\n");
  2287. goto free_event_data;
  2288. }
  2289. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2290. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2291. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2292. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2293. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2294. goto free_event_data;
  2295. }
  2296. cnss_pr_dbg("seg-%d: addr 0x%llx size 0x%x\n",
  2297. i, ind_msg->mem_seg[i].addr,
  2298. ind_msg->mem_seg[i].size);
  2299. }
  2300. }
  2301. if (ind_msg->file_name_valid)
  2302. strlcpy(event_data->file_name, ind_msg->file_name,
  2303. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2304. if (ind_msg->source == 1) {
  2305. if (!ind_msg->file_name_valid)
  2306. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2307. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2308. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2309. 0, event_data);
  2310. } else {
  2311. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2312. if (!ind_msg->file_name_valid)
  2313. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2314. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2315. } else {
  2316. if (!ind_msg->file_name_valid)
  2317. strlcpy(event_data->file_name, "fw_mem_dump",
  2318. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2319. }
  2320. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2321. 0, event_data);
  2322. }
  2323. return;
  2324. free_event_data:
  2325. kfree(event_data);
  2326. }
  2327. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2328. struct sockaddr_qrtr *sq,
  2329. struct qmi_txn *txn,
  2330. const void *data)
  2331. {
  2332. struct cnss_plat_data *plat_priv =
  2333. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2334. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2335. 0, NULL);
  2336. }
  2337. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2338. struct sockaddr_qrtr *sq,
  2339. struct qmi_txn *txn,
  2340. const void *data)
  2341. {
  2342. struct cnss_plat_data *plat_priv =
  2343. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2344. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2345. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2346. if (!txn) {
  2347. cnss_pr_err("Spurious indication\n");
  2348. return;
  2349. }
  2350. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2351. ind_msg->data_len, ind_msg->type,
  2352. ind_msg->is_last, ind_msg->seq_no);
  2353. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2354. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2355. (void *)ind_msg->data,
  2356. ind_msg->data_len);
  2357. }
  2358. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2359. (struct cnss_plat_data *plat_priv,
  2360. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2361. {
  2362. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2363. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2364. struct qmi_txn txn;
  2365. int ret = 0;
  2366. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2367. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2368. return -EINVAL;
  2369. }
  2370. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2371. if (!req)
  2372. return -ENOMEM;
  2373. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2374. if (!resp) {
  2375. kfree(req);
  2376. return -ENOMEM;
  2377. }
  2378. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2379. req->twt_sta_start = ind_msg->twt_sta_start;
  2380. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2381. req->twt_sta_int = ind_msg->twt_sta_int;
  2382. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2383. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2384. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2385. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2386. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2387. req->twt_sta_dl = req->twt_sta_dl;
  2388. req->twt_sta_config_changed_valid =
  2389. ind_msg->twt_sta_config_changed_valid;
  2390. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2391. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2392. plat_priv->driver_state);
  2393. ret =
  2394. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2395. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2396. resp);
  2397. if (ret < 0) {
  2398. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2399. ret);
  2400. goto out;
  2401. }
  2402. ret =
  2403. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2404. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2405. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2406. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2407. if (ret < 0) {
  2408. qmi_txn_cancel(&txn);
  2409. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2410. goto out;
  2411. }
  2412. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2413. if (ret < 0) {
  2414. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2415. goto out;
  2416. }
  2417. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2418. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2419. resp->resp.result, resp->resp.error);
  2420. ret = -resp->resp.result;
  2421. goto out;
  2422. }
  2423. ret = 0;
  2424. out:
  2425. kfree(req);
  2426. kfree(resp);
  2427. return ret;
  2428. }
  2429. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2430. void *data)
  2431. {
  2432. int ret;
  2433. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2434. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2435. kfree(data);
  2436. return ret;
  2437. }
  2438. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2439. struct sockaddr_qrtr *sq,
  2440. struct qmi_txn *txn,
  2441. const void *data)
  2442. {
  2443. struct cnss_plat_data *plat_priv =
  2444. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2445. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2446. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2447. if (!txn) {
  2448. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2449. return;
  2450. }
  2451. if (!ind_msg) {
  2452. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2453. return;
  2454. }
  2455. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2456. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2457. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2458. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2459. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2460. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2461. ind_msg->twt_sta_config_changed_valid,
  2462. ind_msg->twt_sta_config_changed);
  2463. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2464. if (!event_data)
  2465. return;
  2466. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2467. event_data);
  2468. }
  2469. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2470. {
  2471. .type = QMI_INDICATION,
  2472. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2473. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2474. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2475. .fn = cnss_wlfw_request_mem_ind_cb
  2476. },
  2477. {
  2478. .type = QMI_INDICATION,
  2479. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2480. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2481. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2482. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2483. },
  2484. {
  2485. .type = QMI_INDICATION,
  2486. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2487. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2488. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2489. .fn = cnss_wlfw_fw_ready_ind_cb
  2490. },
  2491. {
  2492. .type = QMI_INDICATION,
  2493. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2494. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2495. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2496. .fn = cnss_wlfw_fw_init_done_ind_cb
  2497. },
  2498. {
  2499. .type = QMI_INDICATION,
  2500. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2501. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2502. .decoded_size =
  2503. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2504. .fn = cnss_wlfw_pin_result_ind_cb
  2505. },
  2506. {
  2507. .type = QMI_INDICATION,
  2508. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2509. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2510. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2511. .fn = cnss_wlfw_cal_done_ind_cb
  2512. },
  2513. {
  2514. .type = QMI_INDICATION,
  2515. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2516. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2517. .decoded_size =
  2518. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2519. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2520. },
  2521. {
  2522. .type = QMI_INDICATION,
  2523. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2524. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2525. .decoded_size =
  2526. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2527. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2528. },
  2529. {
  2530. .type = QMI_INDICATION,
  2531. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2532. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2533. .decoded_size =
  2534. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2535. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2536. },
  2537. {
  2538. .type = QMI_INDICATION,
  2539. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2540. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2541. .decoded_size =
  2542. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2543. .fn = cnss_wlfw_respond_get_info_ind_cb
  2544. },
  2545. {
  2546. .type = QMI_INDICATION,
  2547. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2548. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2549. .decoded_size =
  2550. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2551. .fn = cnss_wlfw_process_twt_cfg_ind
  2552. },
  2553. {}
  2554. };
  2555. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2556. void *data)
  2557. {
  2558. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2559. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2560. struct sockaddr_qrtr sq = { 0 };
  2561. int ret = 0;
  2562. if (!event_data)
  2563. return -EINVAL;
  2564. sq.sq_family = AF_QIPCRTR;
  2565. sq.sq_node = event_data->node;
  2566. sq.sq_port = event_data->port;
  2567. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2568. sizeof(sq), 0);
  2569. if (ret < 0) {
  2570. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2571. goto out;
  2572. }
  2573. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2574. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2575. plat_priv->driver_state);
  2576. kfree(data);
  2577. return 0;
  2578. out:
  2579. CNSS_QMI_ASSERT();
  2580. kfree(data);
  2581. return ret;
  2582. }
  2583. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2584. {
  2585. int ret = 0;
  2586. if (!plat_priv)
  2587. return -ENODEV;
  2588. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2589. cnss_pr_err("Unexpected WLFW server arrive\n");
  2590. CNSS_ASSERT(0);
  2591. return -EINVAL;
  2592. }
  2593. cnss_ignore_qmi_failure(false);
  2594. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2595. if (ret < 0)
  2596. goto out;
  2597. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2598. if (ret < 0) {
  2599. if (ret == -EALREADY)
  2600. ret = 0;
  2601. goto out;
  2602. }
  2603. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2604. if (ret < 0)
  2605. goto out;
  2606. return 0;
  2607. out:
  2608. return ret;
  2609. }
  2610. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2611. {
  2612. int ret;
  2613. if (!plat_priv)
  2614. return -ENODEV;
  2615. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2616. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2617. plat_priv->driver_state);
  2618. cnss_qmi_deinit(plat_priv);
  2619. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2620. ret = cnss_qmi_init(plat_priv);
  2621. if (ret < 0) {
  2622. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2623. CNSS_ASSERT(0);
  2624. }
  2625. return 0;
  2626. }
  2627. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2628. struct qmi_service *service)
  2629. {
  2630. struct cnss_plat_data *plat_priv =
  2631. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2632. struct cnss_qmi_event_server_arrive_data *event_data;
  2633. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2634. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2635. plat_priv->driver_state);
  2636. return 0;
  2637. }
  2638. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2639. service->node, service->port);
  2640. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2641. if (!event_data)
  2642. return -ENOMEM;
  2643. event_data->node = service->node;
  2644. event_data->port = service->port;
  2645. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2646. 0, event_data);
  2647. return 0;
  2648. }
  2649. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2650. struct qmi_service *service)
  2651. {
  2652. struct cnss_plat_data *plat_priv =
  2653. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2654. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2655. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2656. plat_priv->driver_state);
  2657. return;
  2658. }
  2659. cnss_pr_dbg("WLFW server exiting\n");
  2660. if (plat_priv) {
  2661. cnss_ignore_qmi_failure(true);
  2662. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2663. }
  2664. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2665. 0, NULL);
  2666. }
  2667. static struct qmi_ops qmi_wlfw_ops = {
  2668. .new_server = wlfw_new_server,
  2669. .del_server = wlfw_del_server,
  2670. };
  2671. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2672. {
  2673. int ret = 0;
  2674. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2675. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2676. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2677. if (ret < 0) {
  2678. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2679. ret);
  2680. goto out;
  2681. }
  2682. ret = qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2683. WLFW_SERVICE_VERS_V01, WLFW_SERVICE_INS_ID_V01);
  2684. if (ret < 0)
  2685. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2686. out:
  2687. return ret;
  2688. }
  2689. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2690. {
  2691. qmi_handle_release(&plat_priv->qmi_wlfw);
  2692. }
  2693. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2694. {
  2695. struct dms_get_mac_address_req_msg_v01 req;
  2696. struct dms_get_mac_address_resp_msg_v01 resp;
  2697. struct qmi_txn txn;
  2698. int ret = 0;
  2699. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2700. cnss_pr_err("DMS QMI connection not established\n");
  2701. return -EINVAL;
  2702. }
  2703. cnss_pr_dbg("Requesting DMS MAC address");
  2704. memset(&resp, 0, sizeof(resp));
  2705. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2706. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2707. if (ret < 0) {
  2708. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2709. ret);
  2710. goto out;
  2711. }
  2712. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2713. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2714. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2715. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2716. dms_get_mac_address_req_msg_v01_ei, &req);
  2717. if (ret < 0) {
  2718. qmi_txn_cancel(&txn);
  2719. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2720. ret);
  2721. goto out;
  2722. }
  2723. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2724. if (ret < 0) {
  2725. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2726. ret);
  2727. goto out;
  2728. }
  2729. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2730. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2731. resp.resp.result, resp.resp.error);
  2732. ret = -resp.resp.result;
  2733. goto out;
  2734. }
  2735. if (!resp.mac_address_valid ||
  2736. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2737. cnss_pr_err("Invalid MAC address received from DMS\n");
  2738. plat_priv->dms.mac_valid = false;
  2739. goto out;
  2740. }
  2741. plat_priv->dms.mac_valid = true;
  2742. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2743. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2744. out:
  2745. return ret;
  2746. }
  2747. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2748. unsigned int node, unsigned int port)
  2749. {
  2750. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2751. struct sockaddr_qrtr sq = {0};
  2752. int ret = 0;
  2753. sq.sq_family = AF_QIPCRTR;
  2754. sq.sq_node = node;
  2755. sq.sq_port = port;
  2756. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  2757. sizeof(sq), 0);
  2758. if (ret < 0) {
  2759. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  2760. node, port);
  2761. goto out;
  2762. }
  2763. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2764. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  2765. plat_priv->driver_state);
  2766. out:
  2767. return ret;
  2768. }
  2769. static int dms_new_server(struct qmi_handle *qmi_dms,
  2770. struct qmi_service *service)
  2771. {
  2772. struct cnss_plat_data *plat_priv =
  2773. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2774. if (!service)
  2775. return -EINVAL;
  2776. return cnss_dms_connect_to_server(plat_priv, service->node,
  2777. service->port);
  2778. }
  2779. static void cnss_dms_server_exit_work(struct work_struct *work)
  2780. {
  2781. int ret;
  2782. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  2783. cnss_dms_deinit(plat_priv);
  2784. cnss_pr_info("QMI DMS Server Exit");
  2785. clear_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2786. ret = cnss_dms_init(plat_priv);
  2787. if (ret < 0)
  2788. cnss_pr_err("QMI DMS service registraton failed, ret\n", ret);
  2789. }
  2790. static DECLARE_WORK(cnss_dms_del_work, cnss_dms_server_exit_work);
  2791. static void dms_del_server(struct qmi_handle *qmi_dms,
  2792. struct qmi_service *service)
  2793. {
  2794. struct cnss_plat_data *plat_priv =
  2795. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2796. if (!plat_priv)
  2797. return;
  2798. if (test_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state)) {
  2799. cnss_pr_info("DMS server delete or cnss remove in progress, Ignore server delete: 0x%lx\n",
  2800. plat_priv->driver_state);
  2801. return;
  2802. }
  2803. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2804. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2805. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  2806. plat_priv->driver_state);
  2807. schedule_work(&cnss_dms_del_work);
  2808. }
  2809. void cnss_cancel_dms_work(void)
  2810. {
  2811. cancel_work_sync(&cnss_dms_del_work);
  2812. }
  2813. static struct qmi_ops qmi_dms_ops = {
  2814. .new_server = dms_new_server,
  2815. .del_server = dms_del_server,
  2816. };
  2817. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  2818. {
  2819. int ret = 0;
  2820. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  2821. &qmi_dms_ops, NULL);
  2822. if (ret < 0) {
  2823. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  2824. goto out;
  2825. }
  2826. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  2827. DMS_SERVICE_VERS_V01, 0);
  2828. if (ret < 0)
  2829. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  2830. out:
  2831. return ret;
  2832. }
  2833. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  2834. {
  2835. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2836. qmi_handle_release(&plat_priv->qmi_dms);
  2837. }
  2838. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  2839. {
  2840. int ret;
  2841. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  2842. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  2843. struct qmi_txn txn;
  2844. if (!plat_priv)
  2845. return -ENODEV;
  2846. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  2847. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2848. if (!req)
  2849. return -ENOMEM;
  2850. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2851. if (!resp) {
  2852. kfree(req);
  2853. return -ENOMEM;
  2854. }
  2855. req->antenna = plat_priv->antenna;
  2856. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2857. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  2858. if (ret < 0) {
  2859. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  2860. ret);
  2861. goto out;
  2862. }
  2863. ret = qmi_send_request
  2864. (&plat_priv->coex_qmi, NULL, &txn,
  2865. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  2866. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  2867. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  2868. if (ret < 0) {
  2869. qmi_txn_cancel(&txn);
  2870. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  2871. ret);
  2872. goto out;
  2873. }
  2874. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2875. if (ret < 0) {
  2876. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  2877. ret);
  2878. goto out;
  2879. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2880. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  2881. resp->resp.result, resp->resp.error);
  2882. ret = -resp->resp.result;
  2883. goto out;
  2884. }
  2885. if (resp->grant_valid)
  2886. plat_priv->grant = resp->grant;
  2887. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  2888. kfree(resp);
  2889. kfree(req);
  2890. return 0;
  2891. out:
  2892. kfree(resp);
  2893. kfree(req);
  2894. return ret;
  2895. }
  2896. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  2897. {
  2898. int ret;
  2899. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  2900. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  2901. struct qmi_txn txn;
  2902. if (!plat_priv)
  2903. return -ENODEV;
  2904. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  2905. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2906. if (!req)
  2907. return -ENOMEM;
  2908. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2909. if (!resp) {
  2910. kfree(req);
  2911. return -ENOMEM;
  2912. }
  2913. req->antenna = plat_priv->antenna;
  2914. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2915. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  2916. if (ret < 0) {
  2917. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  2918. ret);
  2919. goto out;
  2920. }
  2921. ret = qmi_send_request
  2922. (&plat_priv->coex_qmi, NULL, &txn,
  2923. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  2924. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  2925. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  2926. if (ret < 0) {
  2927. qmi_txn_cancel(&txn);
  2928. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  2929. ret);
  2930. goto out;
  2931. }
  2932. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2933. if (ret < 0) {
  2934. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  2935. ret);
  2936. goto out;
  2937. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2938. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  2939. resp->resp.result, resp->resp.error);
  2940. ret = -resp->resp.result;
  2941. goto out;
  2942. }
  2943. kfree(resp);
  2944. kfree(req);
  2945. return 0;
  2946. out:
  2947. kfree(resp);
  2948. kfree(req);
  2949. return ret;
  2950. }
  2951. int cnss_send_subsys_restart_level_msg(struct cnss_plat_data *plat_priv)
  2952. {
  2953. int ret;
  2954. struct wlfw_subsys_restart_level_req_msg_v01 req;
  2955. struct wlfw_subsys_restart_level_resp_msg_v01 resp;
  2956. u8 pcss_enabled;
  2957. if (!plat_priv)
  2958. return -ENODEV;
  2959. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  2960. cnss_pr_err("Can't send pcss cmd before fw ready\n");
  2961. return -EINVAL;
  2962. }
  2963. pcss_enabled = plat_priv->recovery_pcss_enabled;
  2964. cnss_pr_dbg("Sending pcss recovery status: %d\n", pcss_enabled);
  2965. req.restart_level_type_valid = 1;
  2966. req.restart_level_type = pcss_enabled;
  2967. ret = qmi_send_wait(&plat_priv->qmi_wlfw, &req, &resp,
  2968. wlfw_subsys_restart_level_req_msg_v01_ei,
  2969. wlfw_subsys_restart_level_resp_msg_v01_ei,
  2970. QMI_WLFW_SUBSYS_RESTART_LEVEL_REQ_V01,
  2971. WLFW_SUBSYS_RESTART_LEVEL_REQ_MSG_V01_MAX_MSG_LEN,
  2972. QMI_WLFW_TIMEOUT_JF);
  2973. return ret;
  2974. }
  2975. static int coex_new_server(struct qmi_handle *qmi,
  2976. struct qmi_service *service)
  2977. {
  2978. struct cnss_plat_data *plat_priv =
  2979. container_of(qmi, struct cnss_plat_data, coex_qmi);
  2980. struct sockaddr_qrtr sq = { 0 };
  2981. int ret = 0;
  2982. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  2983. service->node, service->port);
  2984. sq.sq_family = AF_QIPCRTR;
  2985. sq.sq_node = service->node;
  2986. sq.sq_port = service->port;
  2987. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  2988. if (ret < 0) {
  2989. cnss_pr_err("Fail to connect to remote service port\n");
  2990. return ret;
  2991. }
  2992. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  2993. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  2994. plat_priv->driver_state);
  2995. return 0;
  2996. }
  2997. static void coex_del_server(struct qmi_handle *qmi,
  2998. struct qmi_service *service)
  2999. {
  3000. struct cnss_plat_data *plat_priv =
  3001. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3002. cnss_pr_dbg("COEX server exit\n");
  3003. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3004. }
  3005. static struct qmi_ops coex_qmi_ops = {
  3006. .new_server = coex_new_server,
  3007. .del_server = coex_del_server,
  3008. };
  3009. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  3010. { int ret;
  3011. ret = qmi_handle_init(&plat_priv->coex_qmi,
  3012. COEX_SERVICE_MAX_MSG_LEN,
  3013. &coex_qmi_ops, NULL);
  3014. if (ret < 0)
  3015. return ret;
  3016. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  3017. COEX_SERVICE_VERS_V01, 0);
  3018. return ret;
  3019. }
  3020. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  3021. {
  3022. qmi_handle_release(&plat_priv->coex_qmi);
  3023. }
  3024. /* IMS Service */
  3025. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  3026. {
  3027. int ret;
  3028. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  3029. struct qmi_txn *txn;
  3030. if (!plat_priv)
  3031. return -ENODEV;
  3032. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  3033. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3034. if (!req)
  3035. return -ENOMEM;
  3036. req->wfc_call_status_valid = 1;
  3037. req->wfc_call_status = 1;
  3038. txn = &plat_priv->txn;
  3039. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  3040. if (ret < 0) {
  3041. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  3042. ret);
  3043. goto out;
  3044. }
  3045. ret = qmi_send_request
  3046. (&plat_priv->ims_qmi, NULL, txn,
  3047. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3048. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  3049. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  3050. if (ret < 0) {
  3051. qmi_txn_cancel(txn);
  3052. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  3053. ret);
  3054. goto out;
  3055. }
  3056. kfree(req);
  3057. return 0;
  3058. out:
  3059. kfree(req);
  3060. return ret;
  3061. }
  3062. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  3063. struct sockaddr_qrtr *sq,
  3064. struct qmi_txn *txn,
  3065. const void *data)
  3066. {
  3067. const
  3068. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  3069. data;
  3070. cnss_pr_dbg("Received IMS subscribe indication response\n");
  3071. if (!txn) {
  3072. cnss_pr_err("spurious response\n");
  3073. return;
  3074. }
  3075. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3076. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  3077. resp->resp.result, resp->resp.error);
  3078. txn->result = -resp->resp.result;
  3079. }
  3080. }
  3081. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  3082. void *data)
  3083. {
  3084. int ret;
  3085. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3086. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  3087. kfree(data);
  3088. return ret;
  3089. }
  3090. static void
  3091. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  3092. struct sockaddr_qrtr *sq,
  3093. struct qmi_txn *txn, const void *data)
  3094. {
  3095. struct cnss_plat_data *plat_priv =
  3096. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  3097. const
  3098. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3099. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  3100. if (!txn) {
  3101. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  3102. return;
  3103. }
  3104. if (!ind_msg) {
  3105. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  3106. return;
  3107. }
  3108. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  3109. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  3110. ind_msg->all_wfc_calls_held,
  3111. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  3112. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  3113. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  3114. ind_msg->media_quality_valid, ind_msg->media_quality);
  3115. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  3116. if (!event_data)
  3117. return;
  3118. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  3119. 0, event_data);
  3120. }
  3121. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  3122. {
  3123. .type = QMI_RESPONSE,
  3124. .msg_id =
  3125. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3126. .ei =
  3127. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  3128. .decoded_size = sizeof(struct
  3129. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  3130. .fn = ims_subscribe_for_indication_resp_cb
  3131. },
  3132. {
  3133. .type = QMI_INDICATION,
  3134. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  3135. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  3136. .decoded_size =
  3137. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  3138. .fn = cnss_ims_process_wfc_call_ind_cb
  3139. },
  3140. {}
  3141. };
  3142. static int ims_new_server(struct qmi_handle *qmi,
  3143. struct qmi_service *service)
  3144. {
  3145. struct cnss_plat_data *plat_priv =
  3146. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3147. struct sockaddr_qrtr sq = { 0 };
  3148. int ret = 0;
  3149. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  3150. service->node, service->port);
  3151. sq.sq_family = AF_QIPCRTR;
  3152. sq.sq_node = service->node;
  3153. sq.sq_port = service->port;
  3154. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3155. if (ret < 0) {
  3156. cnss_pr_err("Fail to connect to remote service port\n");
  3157. return ret;
  3158. }
  3159. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3160. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  3161. plat_priv->driver_state);
  3162. ret = ims_subscribe_for_indication_send_async(plat_priv);
  3163. return ret;
  3164. }
  3165. static void ims_del_server(struct qmi_handle *qmi,
  3166. struct qmi_service *service)
  3167. {
  3168. struct cnss_plat_data *plat_priv =
  3169. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3170. cnss_pr_dbg("IMS server exit\n");
  3171. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3172. }
  3173. static struct qmi_ops ims_qmi_ops = {
  3174. .new_server = ims_new_server,
  3175. .del_server = ims_del_server,
  3176. };
  3177. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  3178. { int ret;
  3179. ret = qmi_handle_init(&plat_priv->ims_qmi,
  3180. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  3181. &ims_qmi_ops, qmi_ims_msg_handlers);
  3182. if (ret < 0)
  3183. return ret;
  3184. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  3185. IMSPRIVATE_SERVICE_VERS_V01, 0);
  3186. return ret;
  3187. }
  3188. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  3189. {
  3190. qmi_handle_release(&plat_priv->ims_qmi);
  3191. }