q6core.c 52 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/module.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/of_device.h>
  9. #include <linux/string.h>
  10. #include <linux/types.h>
  11. #include <linux/spinlock.h>
  12. #include <linux/mutex.h>
  13. #include <linux/sched.h>
  14. #include <linux/slab.h>
  15. #include <linux/sysfs.h>
  16. #include <linux/kobject.h>
  17. #include <linux/delay.h>
  18. #include <dsp/q6core.h>
  19. #include <dsp/audio_cal_utils.h>
  20. #include <dsp/apr_audio-v2.h>
  21. #include <soc/snd_event.h>
  22. #include <ipc/apr.h>
  23. #include "adsp_err.h"
  24. #define TIMEOUT_MS 1000
  25. /*
  26. * AVS bring up in the modem is optimized for the new
  27. * Sub System Restart design and 100 milliseconds timeout
  28. * is sufficient to make sure the Q6 will be ready.
  29. */
  30. #define Q6_READY_TIMEOUT_MS 100
  31. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  32. #define APR_ENOTREADY 10
  33. #define MEMPOOL_ID_MASK 0xFF
  34. #define MDF_MAP_TOKEN 0xF000
  35. enum {
  36. META_CAL,
  37. CUST_TOP_CAL,
  38. CORE_MAX_CAL
  39. };
  40. enum ver_query_status {
  41. VER_QUERY_UNATTEMPTED,
  42. VER_QUERY_UNSUPPORTED,
  43. VER_QUERY_SUPPORTED
  44. };
  45. struct q6core_avcs_ver_info {
  46. enum ver_query_status status;
  47. struct avcs_fwk_ver_info *ver_info;
  48. };
  49. struct q6core_str {
  50. struct apr_svc *core_handle_q;
  51. wait_queue_head_t bus_bw_req_wait;
  52. wait_queue_head_t mdf_map_resp_wait;
  53. wait_queue_head_t cmd_req_wait;
  54. wait_queue_head_t avcs_fwk_ver_req_wait;
  55. wait_queue_head_t lpass_npa_rsc_wait;
  56. u32 lpass_npa_rsc_rsp_rcvd;
  57. u32 bus_bw_resp_received;
  58. u32 mdf_map_resp_received;
  59. enum cmd_flags {
  60. FLAG_NONE,
  61. FLAG_CMDRSP_LICENSE_RESULT
  62. } cmd_resp_received_flag;
  63. u32 avcs_fwk_ver_resp_received;
  64. struct mutex cmd_lock;
  65. struct mutex ver_lock;
  66. union {
  67. struct avcs_cmdrsp_get_license_validation_result
  68. cmdrsp_license_result;
  69. } cmd_resp_payload;
  70. u32 param;
  71. struct cal_type_data *cal_data[CORE_MAX_CAL];
  72. uint32_t mem_map_cal_handle;
  73. uint32_t mdf_mem_map_cal_handle;
  74. uint32_t npa_client_handle;
  75. int32_t adsp_status;
  76. int32_t avs_state;
  77. struct q6core_avcs_ver_info q6core_avcs_ver_info;
  78. };
  79. static struct q6core_str q6core_lcl;
  80. struct generic_get_data_ {
  81. int valid;
  82. int size_in_ints;
  83. int ints[];
  84. };
  85. static struct generic_get_data_ *generic_get_data;
  86. static DEFINE_MUTEX(kset_lock);
  87. static struct kset *audio_uevent_kset;
  88. static int q6core_init_uevent_kset(void)
  89. {
  90. int ret = 0;
  91. mutex_lock(&kset_lock);
  92. if (audio_uevent_kset)
  93. goto done;
  94. /* Create a kset under /sys/kernel/ */
  95. audio_uevent_kset = kset_create_and_add("q6audio", NULL, kernel_kobj);
  96. if (!audio_uevent_kset) {
  97. pr_err("%s: error creating uevent kernel set", __func__);
  98. ret = -EINVAL;
  99. }
  100. done:
  101. mutex_unlock(&kset_lock);
  102. return ret;
  103. }
  104. static void q6core_destroy_uevent_kset(void)
  105. {
  106. if (audio_uevent_kset) {
  107. kset_unregister(audio_uevent_kset);
  108. audio_uevent_kset = NULL;
  109. }
  110. }
  111. /**
  112. * q6core_init_uevent_data - initialize kernel object required to send uevents.
  113. *
  114. * @uevent_data: uevent data (dynamically allocated memory).
  115. * @name: name of the kernel object.
  116. *
  117. * Returns 0 on success or error otherwise.
  118. */
  119. int q6core_init_uevent_data(struct audio_uevent_data *uevent_data, char *name)
  120. {
  121. int ret = -EINVAL;
  122. if (!uevent_data || !name)
  123. return ret;
  124. ret = q6core_init_uevent_kset();
  125. if (ret)
  126. return ret;
  127. /* Set kset for kobject before initializing the kobject */
  128. uevent_data->kobj.kset = audio_uevent_kset;
  129. /* Initialize kobject and add it to kernel */
  130. ret = kobject_init_and_add(&uevent_data->kobj, &uevent_data->ktype,
  131. NULL, "%s", name);
  132. if (ret) {
  133. pr_err("%s: error initializing uevent kernel object: %d",
  134. __func__, ret);
  135. kobject_put(&uevent_data->kobj);
  136. return ret;
  137. }
  138. /* Send kobject add event to the system */
  139. kobject_uevent(&uevent_data->kobj, KOBJ_ADD);
  140. return ret;
  141. }
  142. EXPORT_SYMBOL(q6core_init_uevent_data);
  143. /**
  144. * q6core_destroy_uevent_data - destroy kernel object.
  145. *
  146. * @uevent_data: uevent data.
  147. */
  148. void q6core_destroy_uevent_data(struct audio_uevent_data *uevent_data)
  149. {
  150. if (uevent_data)
  151. kobject_put(&uevent_data->kobj);
  152. }
  153. EXPORT_SYMBOL(q6core_destroy_uevent_data);
  154. /**
  155. * q6core_send_uevent - send uevent to userspace.
  156. *
  157. * @uevent_data: uevent data.
  158. * @event: event to send.
  159. *
  160. * Returns 0 on success or error otherwise.
  161. */
  162. int q6core_send_uevent(struct audio_uevent_data *uevent_data, char *event)
  163. {
  164. char *env[] = { event, NULL };
  165. if (!event || !uevent_data)
  166. return -EINVAL;
  167. return kobject_uevent_env(&uevent_data->kobj, KOBJ_CHANGE, env);
  168. }
  169. EXPORT_SYMBOL(q6core_send_uevent);
  170. static int parse_fwk_version_info(uint32_t *payload, uint16_t payload_size)
  171. {
  172. size_t ver_size;
  173. int num_services;
  174. pr_debug("%s: Payload info num services %d\n",
  175. __func__, payload[4]);
  176. /*
  177. * payload1[4] is the number of services running on DSP
  178. * Based on this info, we copy the payload into core
  179. * avcs version info structure.
  180. */
  181. if (payload_size < 5 * sizeof(uint32_t)) {
  182. pr_err("%s: payload has invalid size %d\n",
  183. __func__, payload_size);
  184. return -EINVAL;
  185. }
  186. num_services = payload[4];
  187. if (num_services > VSS_MAX_AVCS_NUM_SERVICES) {
  188. pr_err("%s: num_services: %d greater than max services: %d\n",
  189. __func__, num_services, VSS_MAX_AVCS_NUM_SERVICES);
  190. return -EINVAL;
  191. }
  192. /*
  193. * Dynamically allocate memory for all
  194. * the services based on num_services
  195. */
  196. ver_size = sizeof(struct avcs_get_fwk_version) +
  197. num_services * sizeof(struct avs_svc_api_info);
  198. if (payload_size < ver_size) {
  199. pr_err("%s: payload has invalid size %d, expected size %zu\n",
  200. __func__, payload_size, ver_size);
  201. return -EINVAL;
  202. }
  203. q6core_lcl.q6core_avcs_ver_info.ver_info =
  204. kzalloc(ver_size, GFP_ATOMIC);
  205. if (q6core_lcl.q6core_avcs_ver_info.ver_info == NULL)
  206. return -ENOMEM;
  207. memcpy(q6core_lcl.q6core_avcs_ver_info.ver_info, (uint8_t *) payload,
  208. ver_size);
  209. return 0;
  210. }
  211. static int32_t aprv2_core_fn_q(struct apr_client_data *data, void *priv)
  212. {
  213. uint32_t *payload1;
  214. int ret = 0;
  215. if (data == NULL) {
  216. pr_err("%s: data argument is null\n", __func__);
  217. return -EINVAL;
  218. }
  219. pr_debug("%s: core msg: payload len = %u, apr resp opcode = 0x%x\n",
  220. __func__,
  221. data->payload_size, data->opcode);
  222. switch (data->opcode) {
  223. case APR_BASIC_RSP_RESULT:{
  224. if (data->payload_size == 0) {
  225. pr_err("%s: APR_BASIC_RSP_RESULT No Payload ",
  226. __func__);
  227. return 0;
  228. }
  229. payload1 = data->payload;
  230. if (data->payload_size < 2 * sizeof(uint32_t)) {
  231. pr_err("%s: payload has invalid size %d\n",
  232. __func__, data->payload_size);
  233. return -EINVAL;
  234. }
  235. switch (payload1[0]) {
  236. case AVCS_CMD_SHARED_MEM_UNMAP_REGIONS:
  237. pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS status[0x%x]\n",
  238. __func__, payload1[1]);
  239. /* -ADSP status to match Linux error standard */
  240. q6core_lcl.adsp_status = -payload1[1];
  241. q6core_lcl.bus_bw_resp_received = 1;
  242. wake_up(&q6core_lcl.bus_bw_req_wait);
  243. break;
  244. case AVCS_CMD_SHARED_MEM_MAP_REGIONS:
  245. pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_MAP_REGIONS status[0x%x]\n",
  246. __func__, payload1[1]);
  247. /* -ADSP status to match Linux error standard */
  248. q6core_lcl.adsp_status = -payload1[1];
  249. q6core_lcl.bus_bw_resp_received = 1;
  250. wake_up(&q6core_lcl.bus_bw_req_wait);
  251. break;
  252. case AVCS_CMD_MAP_MDF_SHARED_MEMORY:
  253. pr_debug("%s: Cmd = AVCS_CMD_MAP_MDF_SHARED_MEMORY status[0x%x]\n",
  254. __func__, payload1[1]);
  255. /* -ADSP status to match Linux error standard */
  256. q6core_lcl.adsp_status = -payload1[1];
  257. q6core_lcl.bus_bw_resp_received = 1;
  258. wake_up(&q6core_lcl.bus_bw_req_wait);
  259. break;
  260. case AVCS_CMD_REGISTER_TOPOLOGIES:
  261. pr_debug("%s: Cmd = AVCS_CMD_REGISTER_TOPOLOGIES status[0x%x]\n",
  262. __func__, payload1[1]);
  263. /* -ADSP status to match Linux error standard */
  264. q6core_lcl.adsp_status = -payload1[1];
  265. q6core_lcl.bus_bw_resp_received = 1;
  266. wake_up(&q6core_lcl.bus_bw_req_wait);
  267. break;
  268. case AVCS_CMD_DEREGISTER_TOPOLOGIES:
  269. pr_debug("%s: Cmd = AVCS_CMD_DEREGISTER_TOPOLOGIES status[0x%x]\n",
  270. __func__, payload1[1]);
  271. q6core_lcl.bus_bw_resp_received = 1;
  272. wake_up(&q6core_lcl.bus_bw_req_wait);
  273. break;
  274. case AVCS_CMD_GET_FWK_VERSION:
  275. pr_debug("%s: Cmd = AVCS_CMD_GET_FWK_VERSION status[%s]\n",
  276. __func__, adsp_err_get_err_str(payload1[1]));
  277. /* ADSP status to match Linux error standard */
  278. q6core_lcl.adsp_status = -payload1[1];
  279. if (payload1[1] == ADSP_EUNSUPPORTED)
  280. q6core_lcl.q6core_avcs_ver_info.status =
  281. VER_QUERY_UNSUPPORTED;
  282. q6core_lcl.avcs_fwk_ver_resp_received = 1;
  283. wake_up(&q6core_lcl.avcs_fwk_ver_req_wait);
  284. break;
  285. case AVCS_CMD_LOAD_TOPO_MODULES:
  286. case AVCS_CMD_UNLOAD_TOPO_MODULES:
  287. pr_debug("%s: Cmd = %s status[%s]\n",
  288. __func__,
  289. (payload1[0] == AVCS_CMD_LOAD_TOPO_MODULES) ?
  290. "AVCS_CMD_LOAD_TOPO_MODULES" :
  291. "AVCS_CMD_UNLOAD_TOPO_MODULES",
  292. adsp_err_get_err_str(payload1[1]));
  293. break;
  294. case AVCS_CMD_DESTROY_LPASS_NPA_CLIENT:
  295. case AVCS_CMD_REQUEST_LPASS_NPA_RESOURCES:
  296. pr_debug("%s: Cmd = AVCS_CMD_CREATE_LPASS_NPA_CLIENT/AVCS_CMD_DESTROY_LPASS_NPA_CLIENT status[%s]\n",
  297. __func__, adsp_err_get_err_str(payload1[1]));
  298. /* ADSP status to match Linux error standard */
  299. q6core_lcl.adsp_status = -payload1[1];
  300. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 1;
  301. wake_up(&q6core_lcl.lpass_npa_rsc_wait);
  302. break;
  303. default:
  304. pr_err("%s: Invalid cmd rsp[0x%x][0x%x] opcode %d\n",
  305. __func__,
  306. payload1[0], payload1[1], data->opcode);
  307. break;
  308. }
  309. break;
  310. }
  311. case RESET_EVENTS:{
  312. pr_debug("%s: Reset event received in Core service\n",
  313. __func__);
  314. /*
  315. * no reset for q6core_avcs_ver_info done as
  316. * the data will not change after SSR
  317. */
  318. apr_reset(q6core_lcl.core_handle_q);
  319. q6core_lcl.core_handle_q = NULL;
  320. break;
  321. }
  322. case AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS:
  323. if (data->payload_size < sizeof(uint32_t)) {
  324. pr_err("%s: payload has invalid size %d\n",
  325. __func__, data->payload_size);
  326. return -EINVAL;
  327. }
  328. payload1 = data->payload;
  329. pr_debug("%s: AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS handle %d\n",
  330. __func__, payload1[0]);
  331. if (data->token == MDF_MAP_TOKEN) {
  332. q6core_lcl.mdf_mem_map_cal_handle = payload1[0];
  333. q6core_lcl.mdf_map_resp_received = 1;
  334. wake_up(&q6core_lcl.mdf_map_resp_wait);
  335. } else {
  336. q6core_lcl.mem_map_cal_handle = payload1[0];
  337. q6core_lcl.bus_bw_resp_received = 1;
  338. wake_up(&q6core_lcl.bus_bw_req_wait);
  339. }
  340. break;
  341. case AVCS_CMDRSP_CREATE_LPASS_NPA_CLIENT:
  342. if (data->payload_size < 2 * sizeof(uint32_t)) {
  343. pr_err("%s: payload has invalid size %d\n",
  344. __func__, data->payload_size);
  345. return -EINVAL;
  346. }
  347. payload1 = data->payload;
  348. pr_debug("%s: AVCS_CMDRSP_CREATE_LPASS_NPA_CLIENT handle %d\n",
  349. __func__, payload1[1]);
  350. q6core_lcl.adsp_status = payload1[0];
  351. q6core_lcl.npa_client_handle = payload1[1];
  352. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 1;
  353. wake_up(&q6core_lcl.lpass_npa_rsc_wait);
  354. break;
  355. case AVCS_CMDRSP_ADSP_EVENT_GET_STATE:
  356. if (data->payload_size < sizeof(uint32_t)) {
  357. pr_err("%s: payload has invalid size %d\n",
  358. __func__, data->payload_size);
  359. return -EINVAL;
  360. }
  361. payload1 = data->payload;
  362. q6core_lcl.param = payload1[0];
  363. pr_debug("%s: Received ADSP get state response 0x%x\n",
  364. __func__, q6core_lcl.param);
  365. /* ensure .param is updated prior to .bus_bw_resp_received */
  366. wmb();
  367. q6core_lcl.bus_bw_resp_received = 1;
  368. wake_up(&q6core_lcl.bus_bw_req_wait);
  369. break;
  370. case AVCS_CMDRSP_GET_LICENSE_VALIDATION_RESULT:
  371. if (data->payload_size < sizeof(uint32_t)) {
  372. pr_err("%s: payload has invalid size %d\n",
  373. __func__, data->payload_size);
  374. return -EINVAL;
  375. }
  376. payload1 = data->payload;
  377. pr_debug("%s: cmd = LICENSE_VALIDATION_RESULT, result = 0x%x\n",
  378. __func__, payload1[0]);
  379. q6core_lcl.cmd_resp_payload.cmdrsp_license_result.result
  380. = payload1[0];
  381. q6core_lcl.cmd_resp_received_flag = FLAG_CMDRSP_LICENSE_RESULT;
  382. wake_up(&q6core_lcl.cmd_req_wait);
  383. break;
  384. case AVCS_CMDRSP_GET_FWK_VERSION:
  385. pr_debug("%s: Received AVCS_CMDRSP_GET_FWK_VERSION\n",
  386. __func__);
  387. payload1 = data->payload;
  388. ret = parse_fwk_version_info(payload1, data->payload_size);
  389. if (ret < 0) {
  390. q6core_lcl.adsp_status = ret;
  391. pr_err("%s: Failed to parse payload:%d\n",
  392. __func__, ret);
  393. } else {
  394. q6core_lcl.q6core_avcs_ver_info.status =
  395. VER_QUERY_SUPPORTED;
  396. }
  397. q6core_lcl.avcs_fwk_ver_resp_received = 1;
  398. wake_up(&q6core_lcl.avcs_fwk_ver_req_wait);
  399. break;
  400. default:
  401. pr_err("%s: Message id from adsp core svc: 0x%x\n",
  402. __func__, data->opcode);
  403. if (generic_get_data) {
  404. generic_get_data->valid = 1;
  405. generic_get_data->size_in_ints =
  406. data->payload_size/sizeof(int);
  407. pr_debug("callback size = %i\n",
  408. data->payload_size);
  409. memcpy(generic_get_data->ints, data->payload,
  410. data->payload_size);
  411. q6core_lcl.bus_bw_resp_received = 1;
  412. wake_up(&q6core_lcl.bus_bw_req_wait);
  413. break;
  414. }
  415. break;
  416. }
  417. return 0;
  418. }
  419. void ocm_core_open(void)
  420. {
  421. if (q6core_lcl.core_handle_q == NULL)
  422. q6core_lcl.core_handle_q = apr_register("ADSP", "CORE",
  423. aprv2_core_fn_q, 0xFFFFFFFF, NULL);
  424. pr_debug("%s: Open_q %pK\n", __func__, q6core_lcl.core_handle_q);
  425. if (q6core_lcl.core_handle_q == NULL)
  426. pr_err_ratelimited("%s: Unable to register CORE\n", __func__);
  427. }
  428. struct cal_block_data *cal_utils_get_cal_block_by_key(
  429. struct cal_type_data *cal_type, uint32_t key)
  430. {
  431. struct list_head *ptr, *next;
  432. struct cal_block_data *cal_block = NULL;
  433. struct audio_cal_info_metainfo *metainfo;
  434. list_for_each_safe(ptr, next,
  435. &cal_type->cal_blocks) {
  436. cal_block = list_entry(ptr,
  437. struct cal_block_data, list);
  438. metainfo = (struct audio_cal_info_metainfo *)
  439. cal_block->cal_info;
  440. if (metainfo->nKey != key) {
  441. pr_debug("%s: metainfo key mismatch!!! found:%x, needed:%x\n",
  442. __func__, metainfo->nKey, key);
  443. } else {
  444. pr_debug("%s: metainfo key match found", __func__);
  445. return cal_block;
  446. }
  447. }
  448. return NULL;
  449. }
  450. static int q6core_send_get_avcs_fwk_ver_cmd(void)
  451. {
  452. struct apr_hdr avcs_ver_cmd;
  453. int ret;
  454. mutex_lock(&q6core_lcl.cmd_lock);
  455. avcs_ver_cmd.hdr_field =
  456. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, APR_HDR_LEN(APR_HDR_SIZE),
  457. APR_PKT_VER);
  458. avcs_ver_cmd.pkt_size = sizeof(struct apr_hdr);
  459. avcs_ver_cmd.src_port = 0;
  460. avcs_ver_cmd.dest_port = 0;
  461. avcs_ver_cmd.token = 0;
  462. avcs_ver_cmd.opcode = AVCS_CMD_GET_FWK_VERSION;
  463. q6core_lcl.adsp_status = 0;
  464. q6core_lcl.avcs_fwk_ver_resp_received = 0;
  465. ret = apr_send_pkt(q6core_lcl.core_handle_q,
  466. (uint32_t *) &avcs_ver_cmd);
  467. if (ret < 0) {
  468. pr_err("%s: failed to send apr packet, ret=%d\n", __func__,
  469. ret);
  470. goto done;
  471. }
  472. ret = wait_event_timeout(q6core_lcl.avcs_fwk_ver_req_wait,
  473. (q6core_lcl.avcs_fwk_ver_resp_received == 1),
  474. msecs_to_jiffies(TIMEOUT_MS));
  475. if (!ret) {
  476. pr_err("%s: wait_event timeout for AVCS fwk version info\n",
  477. __func__);
  478. ret = -ETIMEDOUT;
  479. goto done;
  480. }
  481. if (q6core_lcl.adsp_status < 0) {
  482. /*
  483. * adsp_err_get_err_str expects a positive value but we store
  484. * the DSP error as negative to match the Linux error standard.
  485. * Pass in the negated value so adsp_err_get_err_str returns
  486. * the correct string.
  487. */
  488. pr_err("%s: DSP returned error[%s]\n", __func__,
  489. adsp_err_get_err_str(-q6core_lcl.adsp_status));
  490. ret = adsp_err_get_lnx_err_code(q6core_lcl.adsp_status);
  491. goto done;
  492. }
  493. ret = 0;
  494. done:
  495. mutex_unlock(&q6core_lcl.cmd_lock);
  496. return ret;
  497. }
  498. int q6core_get_service_version(uint32_t service_id,
  499. struct avcs_fwk_ver_info *ver_info,
  500. size_t size)
  501. {
  502. struct avcs_fwk_ver_info *cached_ver_info = NULL;
  503. int i;
  504. uint32_t num_services;
  505. size_t ver_size;
  506. int ret;
  507. if (ver_info == NULL) {
  508. pr_err("%s: ver_info is NULL\n", __func__);
  509. return -EINVAL;
  510. }
  511. ret = q6core_get_fwk_version_size(service_id);
  512. if (ret < 0) {
  513. pr_err("%s: Failed to get service size for service id %d with error %d\n",
  514. __func__, service_id, ret);
  515. return ret;
  516. }
  517. ver_size = ret;
  518. if (ver_size != size) {
  519. pr_err("%s: Expected size %zu and provided size %zu do not match\n",
  520. __func__, ver_size, size);
  521. return -EINVAL;
  522. }
  523. cached_ver_info = q6core_lcl.q6core_avcs_ver_info.ver_info;
  524. num_services = cached_ver_info->avcs_fwk_version.num_services;
  525. if (service_id == AVCS_SERVICE_ID_ALL) {
  526. memcpy(ver_info, cached_ver_info, ver_size);
  527. return 0;
  528. }
  529. ver_info->avcs_fwk_version = cached_ver_info->avcs_fwk_version;
  530. for (i = 0; i < num_services; i++) {
  531. if (cached_ver_info->services[i].service_id == service_id) {
  532. ver_info->services[0] = cached_ver_info->services[i];
  533. return 0;
  534. }
  535. }
  536. pr_err("%s: No service matching service ID %d\n", __func__, service_id);
  537. return -EINVAL;
  538. }
  539. EXPORT_SYMBOL(q6core_get_service_version);
  540. static int q6core_get_avcs_fwk_version(void)
  541. {
  542. int ret = 0;
  543. mutex_lock(&(q6core_lcl.ver_lock));
  544. pr_debug("%s: q6core_avcs_ver_info.status(%d)\n", __func__,
  545. q6core_lcl.q6core_avcs_ver_info.status);
  546. switch (q6core_lcl.q6core_avcs_ver_info.status) {
  547. case VER_QUERY_SUPPORTED:
  548. pr_debug("%s: AVCS FWK version query already attempted\n",
  549. __func__);
  550. break;
  551. case VER_QUERY_UNSUPPORTED:
  552. ret = -EOPNOTSUPP;
  553. break;
  554. case VER_QUERY_UNATTEMPTED:
  555. pr_debug("%s: Attempting AVCS FWK version query\n", __func__);
  556. if (q6core_is_adsp_ready()) {
  557. ret = q6core_send_get_avcs_fwk_ver_cmd();
  558. } else {
  559. pr_err("%s: ADSP is not ready to query version\n",
  560. __func__);
  561. ret = -ENODEV;
  562. }
  563. break;
  564. default:
  565. pr_err("%s: Invalid version query status %d\n", __func__,
  566. q6core_lcl.q6core_avcs_ver_info.status);
  567. ret = -EINVAL;
  568. break;
  569. }
  570. mutex_unlock(&(q6core_lcl.ver_lock));
  571. return ret;
  572. }
  573. size_t q6core_get_fwk_version_size(uint32_t service_id)
  574. {
  575. int ret = 0;
  576. uint32_t num_services;
  577. ret = q6core_get_avcs_fwk_version();
  578. if (ret)
  579. goto done;
  580. if (q6core_lcl.q6core_avcs_ver_info.ver_info != NULL) {
  581. num_services = q6core_lcl.q6core_avcs_ver_info.ver_info
  582. ->avcs_fwk_version.num_services;
  583. } else {
  584. pr_err("%s: ver_info is NULL\n", __func__);
  585. ret = -EINVAL;
  586. goto done;
  587. }
  588. ret = sizeof(struct avcs_get_fwk_version);
  589. if (service_id == AVCS_SERVICE_ID_ALL)
  590. ret += num_services * sizeof(struct avs_svc_api_info);
  591. else
  592. ret += sizeof(struct avs_svc_api_info);
  593. done:
  594. return ret;
  595. }
  596. EXPORT_SYMBOL(q6core_get_fwk_version_size);
  597. /**
  598. * q6core_get_avcs_version_per_service -
  599. * to get api version of a particular service
  600. *
  601. * @service_id: id of the service
  602. *
  603. * Returns valid version on success or error (negative value) on failure
  604. */
  605. int q6core_get_avcs_api_version_per_service(uint32_t service_id)
  606. {
  607. struct avcs_fwk_ver_info *cached_ver_info = NULL;
  608. int i;
  609. uint32_t num_services;
  610. int ret = 0;
  611. if (service_id == AVCS_SERVICE_ID_ALL)
  612. return -EINVAL;
  613. ret = q6core_get_avcs_fwk_version();
  614. if (ret < 0) {
  615. pr_err("%s: failure in getting AVCS version\n", __func__);
  616. return ret;
  617. }
  618. cached_ver_info = q6core_lcl.q6core_avcs_ver_info.ver_info;
  619. num_services = cached_ver_info->avcs_fwk_version.num_services;
  620. for (i = 0; i < num_services; i++) {
  621. if (cached_ver_info->services[i].service_id == service_id)
  622. return cached_ver_info->services[i].api_version;
  623. }
  624. pr_err("%s: No service matching service ID %d\n", __func__, service_id);
  625. return -EINVAL;
  626. }
  627. EXPORT_SYMBOL(q6core_get_avcs_api_version_per_service);
  628. /**
  629. * core_set_license -
  630. * command to set license for module
  631. *
  632. * @key: license key hash
  633. * @module_id: DSP Module ID
  634. *
  635. * Returns 0 on success or error on failure
  636. */
  637. int32_t core_set_license(uint32_t key, uint32_t module_id)
  638. {
  639. struct avcs_cmd_set_license *cmd_setl = NULL;
  640. struct cal_block_data *cal_block = NULL;
  641. int rc = 0, packet_size = 0;
  642. pr_debug("%s: key:0x%x, id:0x%x\n", __func__, key, module_id);
  643. mutex_lock(&(q6core_lcl.cmd_lock));
  644. if (q6core_lcl.cal_data[META_CAL] == NULL) {
  645. pr_err("%s: cal_data not initialized yet!!\n", __func__);
  646. rc = -EINVAL;
  647. goto cmd_unlock;
  648. }
  649. mutex_lock(&((q6core_lcl.cal_data[META_CAL])->lock));
  650. cal_block = cal_utils_get_cal_block_by_key(
  651. q6core_lcl.cal_data[META_CAL], key);
  652. if (cal_block == NULL ||
  653. cal_block->cal_data.kvaddr == NULL ||
  654. cal_block->cal_data.size <= 0) {
  655. pr_err("%s: Invalid cal block to send", __func__);
  656. rc = -EINVAL;
  657. goto cal_data_unlock;
  658. }
  659. packet_size = sizeof(struct avcs_cmd_set_license) +
  660. cal_block->cal_data.size;
  661. /*round up total packet_size to next 4 byte boundary*/
  662. packet_size = ((packet_size + 0x3)>>2)<<2;
  663. cmd_setl = kzalloc(packet_size, GFP_KERNEL);
  664. if (cmd_setl == NULL) {
  665. rc = -ENOMEM;
  666. goto cal_data_unlock;
  667. }
  668. ocm_core_open();
  669. if (q6core_lcl.core_handle_q == NULL) {
  670. pr_err("%s: apr registration for CORE failed\n", __func__);
  671. rc = -ENODEV;
  672. goto fail_cmd;
  673. }
  674. cmd_setl->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_EVENT,
  675. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  676. cmd_setl->hdr.pkt_size = packet_size;
  677. cmd_setl->hdr.src_port = 0;
  678. cmd_setl->hdr.dest_port = 0;
  679. cmd_setl->hdr.token = 0;
  680. cmd_setl->hdr.opcode = AVCS_CMD_SET_LICENSE;
  681. cmd_setl->id = module_id;
  682. cmd_setl->overwrite = 1;
  683. cmd_setl->size = cal_block->cal_data.size;
  684. memcpy((uint8_t *)cmd_setl + sizeof(struct avcs_cmd_set_license),
  685. cal_block->cal_data.kvaddr,
  686. cal_block->cal_data.size);
  687. pr_info("%s: Set license opcode=0x%x, id =0x%x, size = %d\n",
  688. __func__, cmd_setl->hdr.opcode,
  689. cmd_setl->id, cmd_setl->size);
  690. rc = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)cmd_setl);
  691. if (rc < 0)
  692. pr_err("%s: SET_LICENSE failed op[0x%x]rc[%d]\n",
  693. __func__, cmd_setl->hdr.opcode, rc);
  694. fail_cmd:
  695. kfree(cmd_setl);
  696. cal_data_unlock:
  697. mutex_unlock(&((q6core_lcl.cal_data[META_CAL])->lock));
  698. cmd_unlock:
  699. mutex_unlock(&(q6core_lcl.cmd_lock));
  700. return rc;
  701. }
  702. EXPORT_SYMBOL(core_set_license);
  703. /**
  704. * core_get_license_status -
  705. * command to retrieve license status for module
  706. *
  707. * @module_id: DSP Module ID
  708. *
  709. * Returns 0 on success or error on failure
  710. */
  711. int32_t core_get_license_status(uint32_t module_id)
  712. {
  713. struct avcs_cmd_get_license_validation_result get_lvr_cmd;
  714. int ret = 0;
  715. pr_debug("%s: module_id 0x%x", __func__, module_id);
  716. mutex_lock(&(q6core_lcl.cmd_lock));
  717. ocm_core_open();
  718. if (q6core_lcl.core_handle_q == NULL) {
  719. pr_err("%s: apr registration for CORE failed\n", __func__);
  720. ret = -ENODEV;
  721. goto fail_cmd;
  722. }
  723. get_lvr_cmd.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  724. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  725. get_lvr_cmd.hdr.pkt_size =
  726. sizeof(struct avcs_cmd_get_license_validation_result);
  727. get_lvr_cmd.hdr.src_port = 0;
  728. get_lvr_cmd.hdr.dest_port = 0;
  729. get_lvr_cmd.hdr.token = 0;
  730. get_lvr_cmd.hdr.opcode = AVCS_CMD_GET_LICENSE_VALIDATION_RESULT;
  731. get_lvr_cmd.id = module_id;
  732. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &get_lvr_cmd);
  733. if (ret < 0) {
  734. pr_err("%s: license_validation request failed, err %d\n",
  735. __func__, ret);
  736. ret = -EREMOTE;
  737. goto fail_cmd;
  738. }
  739. q6core_lcl.cmd_resp_received_flag &= ~(FLAG_CMDRSP_LICENSE_RESULT);
  740. mutex_unlock(&(q6core_lcl.cmd_lock));
  741. ret = wait_event_timeout(q6core_lcl.cmd_req_wait,
  742. (q6core_lcl.cmd_resp_received_flag ==
  743. FLAG_CMDRSP_LICENSE_RESULT),
  744. msecs_to_jiffies(TIMEOUT_MS));
  745. mutex_lock(&(q6core_lcl.cmd_lock));
  746. if (!ret) {
  747. pr_err("%s: wait_event timeout for CMDRSP_LICENSE_RESULT\n",
  748. __func__);
  749. ret = -ETIME;
  750. goto fail_cmd;
  751. }
  752. q6core_lcl.cmd_resp_received_flag &= ~(FLAG_CMDRSP_LICENSE_RESULT);
  753. ret = q6core_lcl.cmd_resp_payload.cmdrsp_license_result.result;
  754. fail_cmd:
  755. mutex_unlock(&(q6core_lcl.cmd_lock));
  756. pr_info("%s: cmdrsp_license_result.result = 0x%x for module 0x%x\n",
  757. __func__, ret, module_id);
  758. return ret;
  759. }
  760. EXPORT_SYMBOL(core_get_license_status);
  761. /**
  762. * core_set_dolby_manufacturer_id -
  763. * command to set dolby manufacturer id
  764. *
  765. * @manufacturer_id: Dolby manufacturer id
  766. *
  767. * Returns 0 on success or error on failure
  768. */
  769. uint32_t core_set_dolby_manufacturer_id(int manufacturer_id)
  770. {
  771. struct adsp_dolby_manufacturer_id payload;
  772. int rc = 0;
  773. pr_debug("%s: manufacturer_id :%d\n", __func__, manufacturer_id);
  774. mutex_lock(&(q6core_lcl.cmd_lock));
  775. ocm_core_open();
  776. if (q6core_lcl.core_handle_q) {
  777. payload.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_EVENT,
  778. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  779. payload.hdr.pkt_size =
  780. sizeof(struct adsp_dolby_manufacturer_id);
  781. payload.hdr.src_port = 0;
  782. payload.hdr.dest_port = 0;
  783. payload.hdr.token = 0;
  784. payload.hdr.opcode = ADSP_CMD_SET_DOLBY_MANUFACTURER_ID;
  785. payload.manufacturer_id = manufacturer_id;
  786. pr_debug("%s: Send Dolby security opcode=0x%x manufacturer ID = %d\n",
  787. __func__,
  788. payload.hdr.opcode, payload.manufacturer_id);
  789. rc = apr_send_pkt(q6core_lcl.core_handle_q,
  790. (uint32_t *)&payload);
  791. if (rc < 0)
  792. pr_err("%s: SET_DOLBY_MANUFACTURER_ID failed op[0x%x]rc[%d]\n",
  793. __func__, payload.hdr.opcode, rc);
  794. }
  795. mutex_unlock(&(q6core_lcl.cmd_lock));
  796. return rc;
  797. }
  798. EXPORT_SYMBOL(core_set_dolby_manufacturer_id);
  799. int32_t q6core_load_unload_topo_modules(uint32_t topo_id,
  800. bool preload_type)
  801. {
  802. struct avcs_cmd_load_unload_topo_modules load_unload_topo_modules;
  803. int ret = 0;
  804. mutex_lock(&(q6core_lcl.cmd_lock));
  805. ocm_core_open();
  806. if (q6core_lcl.core_handle_q == NULL) {
  807. pr_err("%s: apr registration for CORE failed\n", __func__);
  808. ret = -ENODEV;
  809. goto done;
  810. }
  811. memset(&load_unload_topo_modules, 0, sizeof(load_unload_topo_modules));
  812. load_unload_topo_modules.hdr.hdr_field =
  813. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  814. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  815. load_unload_topo_modules.hdr.pkt_size =
  816. sizeof(struct avcs_cmd_load_unload_topo_modules);
  817. load_unload_topo_modules.hdr.src_port = 0;
  818. load_unload_topo_modules.hdr.dest_port = 0;
  819. load_unload_topo_modules.hdr.token = 0;
  820. if (preload_type == CORE_LOAD_TOPOLOGY)
  821. load_unload_topo_modules.hdr.opcode =
  822. AVCS_CMD_LOAD_TOPO_MODULES;
  823. else
  824. load_unload_topo_modules.hdr.opcode =
  825. AVCS_CMD_UNLOAD_TOPO_MODULES;
  826. load_unload_topo_modules.topology_id = topo_id;
  827. ret = apr_send_pkt(q6core_lcl.core_handle_q,
  828. (uint32_t *) &load_unload_topo_modules);
  829. if (ret < 0) {
  830. pr_err("%s: Load/unload topo modules failed for topology = %d ret = %d\n",
  831. __func__, topo_id, ret);
  832. ret = -EINVAL;
  833. }
  834. done:
  835. mutex_unlock(&(q6core_lcl.cmd_lock));
  836. return ret;
  837. }
  838. EXPORT_SYMBOL(q6core_load_unload_topo_modules);
  839. /**
  840. * q6core_is_adsp_ready - check adsp ready status
  841. *
  842. * Returns true if adsp is ready otherwise returns false
  843. */
  844. bool q6core_is_adsp_ready(void)
  845. {
  846. int rc = 0;
  847. bool ret = false;
  848. struct apr_hdr hdr;
  849. pr_debug("%s: enter\n", __func__);
  850. memset(&hdr, 0, sizeof(hdr));
  851. hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  852. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  853. hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE, 0);
  854. hdr.opcode = AVCS_CMD_ADSP_EVENT_GET_STATE;
  855. mutex_lock(&(q6core_lcl.cmd_lock));
  856. ocm_core_open();
  857. if (q6core_lcl.core_handle_q) {
  858. q6core_lcl.bus_bw_resp_received = 0;
  859. rc = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)&hdr);
  860. if (rc < 0) {
  861. pr_err_ratelimited("%s: Get ADSP state APR packet send event %d\n",
  862. __func__, rc);
  863. goto bail;
  864. }
  865. rc = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  866. (q6core_lcl.bus_bw_resp_received == 1),
  867. msecs_to_jiffies(Q6_READY_TIMEOUT_MS));
  868. if (rc > 0 && q6core_lcl.bus_bw_resp_received) {
  869. /* ensure to read updated param by callback thread */
  870. rmb();
  871. ret = !!q6core_lcl.param;
  872. }
  873. }
  874. bail:
  875. pr_debug("%s: leave, rc %d, adsp ready %d\n", __func__, rc, ret);
  876. mutex_unlock(&(q6core_lcl.cmd_lock));
  877. return ret;
  878. }
  879. EXPORT_SYMBOL(q6core_is_adsp_ready);
  880. int q6core_create_lpass_npa_client(uint32_t node_id, char *client_name,
  881. uint32_t *client_handle)
  882. {
  883. struct avcs_cmd_create_lpass_npa_client_t create_lpass_npa_client;
  884. struct avcs_cmd_create_lpass_npa_client_t *cmd_ptr =
  885. &create_lpass_npa_client;
  886. int ret = 0;
  887. if (!client_name) {
  888. pr_err("%s: Invalid params\n", __func__);
  889. return -EINVAL;
  890. }
  891. mutex_lock(&(q6core_lcl.cmd_lock));
  892. memset(cmd_ptr, 0, sizeof(create_lpass_npa_client));
  893. cmd_ptr->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  894. APR_HDR_LEN(APR_HDR_SIZE),
  895. APR_PKT_VER);
  896. cmd_ptr->hdr.pkt_size = sizeof(create_lpass_npa_client);
  897. cmd_ptr->hdr.src_port = 0;
  898. cmd_ptr->hdr.dest_port = 0;
  899. cmd_ptr->hdr.token = 0;
  900. cmd_ptr->hdr.opcode = AVCS_CMD_CREATE_LPASS_NPA_CLIENT;
  901. cmd_ptr->node_id = AVCS_SLEEP_ISLAND_CORE_DRIVER_NODE_ID;
  902. strlcpy(cmd_ptr->client_name, client_name,
  903. sizeof(cmd_ptr->client_name));
  904. pr_debug("%s: create lpass npa client opcode[0x%x] node id[0x%x]\n",
  905. __func__, cmd_ptr->hdr.opcode, cmd_ptr->node_id);
  906. *client_handle = 0;
  907. q6core_lcl.adsp_status = 0;
  908. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 0;
  909. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) cmd_ptr);
  910. if (ret < 0) {
  911. pr_err("%s: create lpass npa client failed %d\n",
  912. __func__, ret);
  913. ret = -EINVAL;
  914. goto done;
  915. }
  916. ret = wait_event_timeout(q6core_lcl.lpass_npa_rsc_wait,
  917. (q6core_lcl.lpass_npa_rsc_rsp_rcvd == 1),
  918. msecs_to_jiffies(TIMEOUT_MS));
  919. if (!ret) {
  920. pr_err("%s: timeout. waited for create lpass npa rsc client\n",
  921. __func__);
  922. ret = -ETIMEDOUT;
  923. goto done;
  924. } else {
  925. /* set ret to 0 as no timeout happened */
  926. ret = 0;
  927. }
  928. if (q6core_lcl.adsp_status < 0) {
  929. pr_err("%s: DSP returned error %d\n",
  930. __func__, q6core_lcl.adsp_status);
  931. ret = q6core_lcl.adsp_status;
  932. goto done;
  933. }
  934. *client_handle = q6core_lcl.npa_client_handle;
  935. pr_debug("%s: q6core_lcl.npa_client_handle %d\n", __func__,
  936. q6core_lcl.npa_client_handle);
  937. done:
  938. mutex_unlock(&q6core_lcl.cmd_lock);
  939. return ret;
  940. }
  941. EXPORT_SYMBOL(q6core_create_lpass_npa_client);
  942. int q6core_destroy_lpass_npa_client(uint32_t client_handle)
  943. {
  944. struct avcs_cmd_destroy_lpass_npa_client_t destroy_lpass_npa_client;
  945. struct avcs_cmd_destroy_lpass_npa_client_t *cmd_ptr =
  946. &destroy_lpass_npa_client;
  947. int ret = 0;
  948. mutex_lock(&(q6core_lcl.cmd_lock));
  949. memset(cmd_ptr, 0, sizeof(destroy_lpass_npa_client));
  950. cmd_ptr->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  951. APR_HDR_LEN(APR_HDR_SIZE),
  952. APR_PKT_VER);
  953. cmd_ptr->hdr.pkt_size = sizeof(destroy_lpass_npa_client);
  954. cmd_ptr->hdr.src_port = 0;
  955. cmd_ptr->hdr.dest_port = 0;
  956. cmd_ptr->hdr.token = 0;
  957. cmd_ptr->hdr.opcode = AVCS_CMD_DESTROY_LPASS_NPA_CLIENT;
  958. cmd_ptr->client_handle = client_handle;
  959. pr_debug("%s: dstry lpass npa client opcode[0x%x] client hdl[0x%x]\n",
  960. __func__, cmd_ptr->hdr.opcode, cmd_ptr->client_handle);
  961. q6core_lcl.adsp_status = 0;
  962. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 0;
  963. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) cmd_ptr);
  964. if (ret < 0) {
  965. pr_err("%s: destroy lpass npa client failed %d\n",
  966. __func__, ret);
  967. ret = -EINVAL;
  968. goto done;
  969. }
  970. ret = wait_event_timeout(q6core_lcl.lpass_npa_rsc_wait,
  971. (q6core_lcl.lpass_npa_rsc_rsp_rcvd == 1),
  972. msecs_to_jiffies(TIMEOUT_MS));
  973. if (!ret) {
  974. pr_err("%s: timeout. waited for destroy lpass npa rsc client\n",
  975. __func__);
  976. ret = -ETIMEDOUT;
  977. goto done;
  978. } else {
  979. /* set ret to 0 as no timeout happened */
  980. ret = 0;
  981. }
  982. if (q6core_lcl.adsp_status < 0) {
  983. pr_err("%s: DSP returned error %d\n",
  984. __func__, q6core_lcl.adsp_status);
  985. ret = q6core_lcl.adsp_status;
  986. }
  987. done:
  988. mutex_unlock(&q6core_lcl.cmd_lock);
  989. return ret;
  990. }
  991. EXPORT_SYMBOL(q6core_destroy_lpass_npa_client);
  992. int q6core_request_island_transition(uint32_t client_handle,
  993. uint32_t island_allow_mode)
  994. {
  995. struct avcs_sleep_node_island_transition_config_t island_tsn_cfg;
  996. struct avcs_sleep_node_island_transition_config_t *cmd_ptr =
  997. &island_tsn_cfg;
  998. int ret = 0;
  999. mutex_lock(&(q6core_lcl.cmd_lock));
  1000. memset(cmd_ptr, 0, sizeof(island_tsn_cfg));
  1001. cmd_ptr->req_lpass_npa_rsc.hdr.hdr_field =
  1002. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1003. APR_HDR_LEN(APR_HDR_SIZE),
  1004. APR_PKT_VER);
  1005. cmd_ptr->req_lpass_npa_rsc.hdr.pkt_size = sizeof(island_tsn_cfg);
  1006. cmd_ptr->req_lpass_npa_rsc.hdr.src_port = 0;
  1007. cmd_ptr->req_lpass_npa_rsc.hdr.dest_port = 0;
  1008. cmd_ptr->req_lpass_npa_rsc.hdr.token = 0;
  1009. cmd_ptr->req_lpass_npa_rsc.hdr.opcode =
  1010. AVCS_CMD_REQUEST_LPASS_NPA_RESOURCES;
  1011. cmd_ptr->req_lpass_npa_rsc.client_handle = client_handle;
  1012. cmd_ptr->req_lpass_npa_rsc.resource_id =
  1013. AVCS_SLEEP_NODE_ISLAND_TRANSITION_RESOURCE_ID;
  1014. cmd_ptr->island_allow_mode = island_allow_mode;
  1015. pr_debug("%s: req islnd tnsn opcode[0x%x] island_allow_mode[0x%x]\n",
  1016. __func__, cmd_ptr->req_lpass_npa_rsc.hdr.opcode,
  1017. cmd_ptr->island_allow_mode);
  1018. q6core_lcl.adsp_status = 0;
  1019. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 0;
  1020. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) cmd_ptr);
  1021. if (ret < 0) {
  1022. pr_err("%s: island tnsn cmd send failed %d\n",
  1023. __func__, ret);
  1024. ret = -EINVAL;
  1025. goto done;
  1026. }
  1027. ret = wait_event_timeout(q6core_lcl.lpass_npa_rsc_wait,
  1028. (q6core_lcl.lpass_npa_rsc_rsp_rcvd == 1),
  1029. msecs_to_jiffies(TIMEOUT_MS));
  1030. if (!ret) {
  1031. pr_err("%s: timeout. waited for island lpass npa rsc req\n",
  1032. __func__);
  1033. ret = -ETIMEDOUT;
  1034. goto done;
  1035. } else {
  1036. /* set ret to 0 as no timeout happened */
  1037. ret = 0;
  1038. }
  1039. if (q6core_lcl.adsp_status < 0) {
  1040. pr_err("%s: DSP returned error %d\n",
  1041. __func__, q6core_lcl.adsp_status);
  1042. ret = q6core_lcl.adsp_status;
  1043. }
  1044. done:
  1045. mutex_unlock(&q6core_lcl.cmd_lock);
  1046. return ret;
  1047. }
  1048. EXPORT_SYMBOL(q6core_request_island_transition);
  1049. int q6core_map_memory_regions(phys_addr_t *buf_add, uint32_t mempool_id,
  1050. uint32_t *bufsz, uint32_t bufcnt, uint32_t *map_handle)
  1051. {
  1052. struct avs_cmd_shared_mem_map_regions *mmap_regions = NULL;
  1053. struct avs_shared_map_region_payload *mregions = NULL;
  1054. void *mmap_region_cmd = NULL;
  1055. void *payload = NULL;
  1056. int ret = 0;
  1057. int i = 0;
  1058. int cmd_size = 0;
  1059. cmd_size = sizeof(struct avs_cmd_shared_mem_map_regions)
  1060. + sizeof(struct avs_shared_map_region_payload)
  1061. * bufcnt;
  1062. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  1063. if (mmap_region_cmd == NULL)
  1064. return -ENOMEM;
  1065. mmap_regions = (struct avs_cmd_shared_mem_map_regions *)mmap_region_cmd;
  1066. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1067. APR_HDR_LEN(APR_HDR_SIZE),
  1068. APR_PKT_VER);
  1069. mmap_regions->hdr.pkt_size = cmd_size;
  1070. mmap_regions->hdr.src_port = 0;
  1071. mmap_regions->hdr.dest_port = 0;
  1072. mmap_regions->hdr.token = 0;
  1073. mmap_regions->hdr.opcode = AVCS_CMD_SHARED_MEM_MAP_REGIONS;
  1074. mmap_regions->mem_pool_id = mempool_id & 0x00ff;
  1075. mmap_regions->num_regions = bufcnt & 0x00ff;
  1076. mmap_regions->property_flag = 0x00;
  1077. payload = ((u8 *) mmap_region_cmd +
  1078. sizeof(struct avs_cmd_shared_mem_map_regions));
  1079. mregions = (struct avs_shared_map_region_payload *)payload;
  1080. for (i = 0; i < bufcnt; i++) {
  1081. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  1082. mregions->shm_addr_msw =
  1083. msm_audio_populate_upper_32_bits(buf_add[i]);
  1084. mregions->mem_size_bytes = bufsz[i];
  1085. ++mregions;
  1086. }
  1087. pr_debug("%s: sending memory map, addr %pK, size %d, bufcnt = %d\n",
  1088. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  1089. *map_handle = 0;
  1090. q6core_lcl.adsp_status = 0;
  1091. q6core_lcl.bus_bw_resp_received = 0;
  1092. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1093. mmap_regions);
  1094. if (ret < 0) {
  1095. pr_err("%s: mmap regions failed %d\n",
  1096. __func__, ret);
  1097. ret = -EINVAL;
  1098. goto done;
  1099. }
  1100. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1101. (q6core_lcl.bus_bw_resp_received == 1),
  1102. msecs_to_jiffies(TIMEOUT_MS));
  1103. if (!ret) {
  1104. pr_err("%s: timeout. waited for memory map\n", __func__);
  1105. ret = -ETIME;
  1106. goto done;
  1107. } else {
  1108. /* set ret to 0 as no timeout happened */
  1109. ret = 0;
  1110. }
  1111. if (q6core_lcl.adsp_status < 0) {
  1112. pr_err("%s: DSP returned error %d\n",
  1113. __func__, q6core_lcl.adsp_status);
  1114. ret = q6core_lcl.adsp_status;
  1115. goto done;
  1116. }
  1117. *map_handle = q6core_lcl.mem_map_cal_handle;
  1118. done:
  1119. kfree(mmap_region_cmd);
  1120. return ret;
  1121. }
  1122. /**
  1123. * q6core_map_mdf_memory_regions - for sending MDF shared memory map information
  1124. * to ADSP.
  1125. *
  1126. * @buf_add: array of buffers.
  1127. * @mempool_id: memory pool ID
  1128. * @bufsz: size of the buffer
  1129. * @bufcnt: buffers count
  1130. * @map_handle: map handle received from ADSP
  1131. */
  1132. int q6core_map_mdf_memory_regions(uint64_t *buf_add, uint32_t mempool_id,
  1133. uint32_t *bufsz, uint32_t bufcnt, uint32_t *map_handle)
  1134. {
  1135. struct avs_cmd_shared_mem_map_regions *mmap_regions = NULL;
  1136. struct avs_shared_map_region_payload *mregions = NULL;
  1137. void *mmap_region_cmd = NULL;
  1138. void *payload = NULL;
  1139. int ret = 0;
  1140. int i = 0;
  1141. int cmd_size = 0;
  1142. mutex_lock(&q6core_lcl.cmd_lock);
  1143. cmd_size = sizeof(struct avs_cmd_shared_mem_map_regions)
  1144. + sizeof(struct avs_shared_map_region_payload)
  1145. * bufcnt;
  1146. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  1147. if (mmap_region_cmd == NULL)
  1148. return -ENOMEM;
  1149. mmap_regions = (struct avs_cmd_shared_mem_map_regions *)mmap_region_cmd;
  1150. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1151. APR_HDR_LEN(APR_HDR_SIZE),
  1152. APR_PKT_VER);
  1153. mmap_regions->hdr.pkt_size = cmd_size;
  1154. mmap_regions->hdr.src_port = 0;
  1155. mmap_regions->hdr.dest_port = 0;
  1156. mmap_regions->hdr.token = MDF_MAP_TOKEN;
  1157. mmap_regions->hdr.opcode = AVCS_CMD_SHARED_MEM_MAP_REGIONS;
  1158. mmap_regions->mem_pool_id = mempool_id & MEMPOOL_ID_MASK;
  1159. mmap_regions->num_regions = bufcnt & 0x00ff;
  1160. mmap_regions->property_flag = 0x00;
  1161. payload = ((u8 *) mmap_region_cmd +
  1162. sizeof(struct avs_cmd_shared_mem_map_regions));
  1163. mregions = (struct avs_shared_map_region_payload *)payload;
  1164. for (i = 0; i < bufcnt; i++) {
  1165. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  1166. mregions->shm_addr_msw = upper_32_bits(buf_add[i]);
  1167. mregions->mem_size_bytes = bufsz[i];
  1168. ++mregions;
  1169. }
  1170. pr_debug("%s: sending MDF memory map, addr %pK, size %d, bufcnt = %d\n",
  1171. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  1172. *map_handle = 0;
  1173. q6core_lcl.adsp_status = 0;
  1174. q6core_lcl.mdf_map_resp_received = 0;
  1175. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1176. mmap_regions);
  1177. if (ret < 0) {
  1178. pr_err("%s: mmap regions failed %d\n",
  1179. __func__, ret);
  1180. ret = -EINVAL;
  1181. goto done;
  1182. }
  1183. ret = wait_event_timeout(q6core_lcl.mdf_map_resp_wait,
  1184. (q6core_lcl.mdf_map_resp_received == 1),
  1185. msecs_to_jiffies(TIMEOUT_MS));
  1186. if (!ret) {
  1187. pr_err("%s: timeout. waited for memory map\n", __func__);
  1188. ret = -ETIMEDOUT;
  1189. goto done;
  1190. } else {
  1191. /* set ret to 0 as no timeout happened */
  1192. ret = 0;
  1193. }
  1194. if (q6core_lcl.adsp_status < 0) {
  1195. pr_err("%s: DSP returned error %d\n",
  1196. __func__, q6core_lcl.adsp_status);
  1197. ret = q6core_lcl.adsp_status;
  1198. goto done;
  1199. }
  1200. *map_handle = q6core_lcl.mdf_mem_map_cal_handle;
  1201. done:
  1202. kfree(mmap_region_cmd);
  1203. mutex_unlock(&q6core_lcl.cmd_lock);
  1204. return ret;
  1205. }
  1206. EXPORT_SYMBOL(q6core_map_mdf_memory_regions);
  1207. int q6core_memory_unmap_regions(uint32_t mem_map_handle)
  1208. {
  1209. struct avs_cmd_shared_mem_unmap_regions unmap_regions;
  1210. int ret = 0;
  1211. memset(&unmap_regions, 0, sizeof(unmap_regions));
  1212. unmap_regions.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1213. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  1214. unmap_regions.hdr.pkt_size = sizeof(unmap_regions);
  1215. unmap_regions.hdr.src_svc = APR_SVC_ADSP_CORE;
  1216. unmap_regions.hdr.src_domain = APR_DOMAIN_APPS;
  1217. unmap_regions.hdr.src_port = 0;
  1218. unmap_regions.hdr.dest_svc = APR_SVC_ADSP_CORE;
  1219. unmap_regions.hdr.dest_domain = APR_DOMAIN_ADSP;
  1220. unmap_regions.hdr.dest_port = 0;
  1221. unmap_regions.hdr.token = 0;
  1222. unmap_regions.hdr.opcode = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS;
  1223. unmap_regions.mem_map_handle = mem_map_handle;
  1224. q6core_lcl.adsp_status = 0;
  1225. q6core_lcl.bus_bw_resp_received = 0;
  1226. pr_debug("%s: unmap regions map handle %d\n",
  1227. __func__, mem_map_handle);
  1228. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1229. &unmap_regions);
  1230. if (ret < 0) {
  1231. pr_err("%s: unmap regions failed %d\n",
  1232. __func__, ret);
  1233. ret = -EINVAL;
  1234. goto done;
  1235. }
  1236. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1237. (q6core_lcl.bus_bw_resp_received == 1),
  1238. msecs_to_jiffies(TIMEOUT_MS));
  1239. if (!ret) {
  1240. pr_err("%s: timeout. waited for memory_unmap\n",
  1241. __func__);
  1242. ret = -ETIME;
  1243. goto done;
  1244. } else {
  1245. /* set ret to 0 as no timeout happened */
  1246. ret = 0;
  1247. }
  1248. if (q6core_lcl.adsp_status < 0) {
  1249. pr_err("%s: DSP returned error %d\n",
  1250. __func__, q6core_lcl.adsp_status);
  1251. ret = q6core_lcl.adsp_status;
  1252. goto done;
  1253. }
  1254. done:
  1255. return ret;
  1256. }
  1257. int q6core_map_mdf_shared_memory(uint32_t map_handle, uint64_t *buf_add,
  1258. uint32_t proc_id, uint32_t *bufsz, uint32_t bufcnt)
  1259. {
  1260. struct avs_cmd_map_mdf_shared_memory *mmap_regions = NULL;
  1261. struct avs_shared_map_region_payload *mregions = NULL;
  1262. void *mmap_region_cmd = NULL;
  1263. void *payload = NULL;
  1264. int ret = 0;
  1265. int i = 0;
  1266. int cmd_size = 0;
  1267. mutex_lock(&q6core_lcl.cmd_lock);
  1268. cmd_size = sizeof(struct avs_cmd_map_mdf_shared_memory)
  1269. + sizeof(struct avs_shared_map_region_payload)
  1270. * bufcnt;
  1271. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  1272. if (mmap_region_cmd == NULL) {
  1273. mutex_unlock(&q6core_lcl.cmd_lock);
  1274. return -ENOMEM;
  1275. }
  1276. mmap_regions = (struct avs_cmd_map_mdf_shared_memory *)mmap_region_cmd;
  1277. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1278. APR_HDR_LEN(APR_HDR_SIZE),
  1279. APR_PKT_VER);
  1280. mmap_regions->hdr.pkt_size = cmd_size;
  1281. mmap_regions->hdr.src_port = 0;
  1282. mmap_regions->hdr.dest_port = 0;
  1283. mmap_regions->hdr.token = 0;
  1284. mmap_regions->hdr.opcode = AVCS_CMD_MAP_MDF_SHARED_MEMORY;
  1285. mmap_regions->mem_map_handle = map_handle;
  1286. mmap_regions->proc_id = proc_id & 0x00ff;
  1287. mmap_regions->num_regions = bufcnt & 0x00ff;
  1288. payload = ((u8 *) mmap_region_cmd +
  1289. sizeof(struct avs_cmd_map_mdf_shared_memory));
  1290. mregions = (struct avs_shared_map_region_payload *)payload;
  1291. for (i = 0; i < bufcnt; i++) {
  1292. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  1293. mregions->shm_addr_msw = upper_32_bits(buf_add[i]);
  1294. mregions->mem_size_bytes = bufsz[i];
  1295. ++mregions;
  1296. }
  1297. pr_debug("%s: sending mdf memory map, addr %pa, size %d, bufcnt = %d\n",
  1298. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  1299. q6core_lcl.adsp_status = 0;
  1300. q6core_lcl.bus_bw_resp_received = 0;
  1301. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1302. mmap_regions);
  1303. if (ret < 0) {
  1304. pr_err("%s: mdf memory map failed %d\n",
  1305. __func__, ret);
  1306. ret = -EINVAL;
  1307. goto done;
  1308. }
  1309. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1310. (q6core_lcl.bus_bw_resp_received == 1),
  1311. msecs_to_jiffies(TIMEOUT_MS));
  1312. if (!ret) {
  1313. pr_err("%s: timeout. waited for mdf memory map\n",
  1314. __func__);
  1315. ret = -ETIME;
  1316. goto done;
  1317. } else {
  1318. /* set ret to 0 as no timeout happened */
  1319. ret = 0;
  1320. }
  1321. /*
  1322. * When the remote DSP is not ready, the ADSP will validate and store
  1323. * the memory information and return APR_ENOTREADY to HLOS. The ADSP
  1324. * will map the memory with remote DSP when it is ready. HLOS should
  1325. * not treat APR_ENOTREADY as an error.
  1326. */
  1327. if (q6core_lcl.adsp_status != -APR_ENOTREADY) {
  1328. pr_err("%s: DSP returned error %d\n",
  1329. __func__, q6core_lcl.adsp_status);
  1330. ret = q6core_lcl.adsp_status;
  1331. goto done;
  1332. }
  1333. done:
  1334. kfree(mmap_region_cmd);
  1335. mutex_unlock(&q6core_lcl.cmd_lock);
  1336. return ret;
  1337. }
  1338. static int q6core_dereg_all_custom_topologies(void)
  1339. {
  1340. int ret = 0;
  1341. struct avcs_cmd_deregister_topologies dereg_top;
  1342. memset(&dereg_top, 0, sizeof(dereg_top));
  1343. dereg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1344. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  1345. dereg_top.hdr.pkt_size = sizeof(dereg_top);
  1346. dereg_top.hdr.src_svc = APR_SVC_ADSP_CORE;
  1347. dereg_top.hdr.src_domain = APR_DOMAIN_APPS;
  1348. dereg_top.hdr.src_port = 0;
  1349. dereg_top.hdr.dest_svc = APR_SVC_ADSP_CORE;
  1350. dereg_top.hdr.dest_domain = APR_DOMAIN_ADSP;
  1351. dereg_top.hdr.dest_port = 0;
  1352. dereg_top.hdr.token = 0;
  1353. dereg_top.hdr.opcode = AVCS_CMD_DEREGISTER_TOPOLOGIES;
  1354. dereg_top.payload_addr_lsw = 0;
  1355. dereg_top.payload_addr_msw = 0;
  1356. dereg_top.mem_map_handle = 0;
  1357. dereg_top.payload_size = 0;
  1358. dereg_top.mode = AVCS_MODE_DEREGISTER_ALL_CUSTOM_TOPOLOGIES;
  1359. q6core_lcl.bus_bw_resp_received = 0;
  1360. pr_debug("%s: Deregister topologies mode %d\n",
  1361. __func__, dereg_top.mode);
  1362. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &dereg_top);
  1363. if (ret < 0) {
  1364. pr_err("%s: Deregister topologies failed %d\n",
  1365. __func__, ret);
  1366. goto done;
  1367. }
  1368. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1369. (q6core_lcl.bus_bw_resp_received == 1),
  1370. msecs_to_jiffies(TIMEOUT_MS));
  1371. if (!ret) {
  1372. pr_err("%s: wait_event timeout for Deregister topologies\n",
  1373. __func__);
  1374. goto done;
  1375. }
  1376. done:
  1377. return ret;
  1378. }
  1379. static int q6core_send_custom_topologies(void)
  1380. {
  1381. int ret = 0;
  1382. int ret2 = 0;
  1383. struct cal_block_data *cal_block = NULL;
  1384. struct avcs_cmd_register_topologies reg_top;
  1385. if (!q6core_is_adsp_ready()) {
  1386. pr_err("%s: ADSP is not ready!\n", __func__);
  1387. return -ENODEV;
  1388. }
  1389. memset(&reg_top, 0, sizeof(reg_top));
  1390. mutex_lock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock);
  1391. mutex_lock(&q6core_lcl.cmd_lock);
  1392. cal_block = cal_utils_get_only_cal_block(
  1393. q6core_lcl.cal_data[CUST_TOP_CAL]);
  1394. if (cal_block == NULL) {
  1395. pr_debug("%s: cal block is NULL!\n", __func__);
  1396. goto unlock;
  1397. }
  1398. if (cal_block->cal_data.size <= 0) {
  1399. pr_debug("%s: cal size is %zd not sending\n",
  1400. __func__, cal_block->cal_data.size);
  1401. goto unlock;
  1402. }
  1403. q6core_dereg_all_custom_topologies();
  1404. ret = q6core_map_memory_regions(&cal_block->cal_data.paddr,
  1405. ADSP_MEMORY_MAP_SHMEM8_4K_POOL,
  1406. (uint32_t *)&cal_block->map_data.map_size, 1,
  1407. &cal_block->map_data.q6map_handle);
  1408. if (ret) {
  1409. pr_err("%s: q6core_map_memory_regions failed\n", __func__);
  1410. goto unlock;
  1411. }
  1412. reg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1413. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  1414. reg_top.hdr.pkt_size = sizeof(reg_top);
  1415. reg_top.hdr.src_svc = APR_SVC_ADSP_CORE;
  1416. reg_top.hdr.src_domain = APR_DOMAIN_APPS;
  1417. reg_top.hdr.src_port = 0;
  1418. reg_top.hdr.dest_svc = APR_SVC_ADSP_CORE;
  1419. reg_top.hdr.dest_domain = APR_DOMAIN_ADSP;
  1420. reg_top.hdr.dest_port = 0;
  1421. reg_top.hdr.token = 0;
  1422. reg_top.hdr.opcode = AVCS_CMD_REGISTER_TOPOLOGIES;
  1423. reg_top.payload_addr_lsw =
  1424. lower_32_bits(cal_block->cal_data.paddr);
  1425. reg_top.payload_addr_msw =
  1426. msm_audio_populate_upper_32_bits(cal_block->cal_data.paddr);
  1427. reg_top.mem_map_handle = cal_block->map_data.q6map_handle;
  1428. reg_top.payload_size = cal_block->cal_data.size;
  1429. q6core_lcl.adsp_status = 0;
  1430. q6core_lcl.bus_bw_resp_received = 0;
  1431. pr_debug("%s: Register topologies addr %pK, size %zd, map handle %d\n",
  1432. __func__, &cal_block->cal_data.paddr, cal_block->cal_data.size,
  1433. cal_block->map_data.q6map_handle);
  1434. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &reg_top);
  1435. if (ret < 0) {
  1436. pr_err("%s: Register topologies failed %d\n",
  1437. __func__, ret);
  1438. goto unmap;
  1439. }
  1440. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1441. (q6core_lcl.bus_bw_resp_received == 1),
  1442. msecs_to_jiffies(TIMEOUT_MS));
  1443. if (!ret) {
  1444. pr_err("%s: wait_event timeout for Register topologies\n",
  1445. __func__);
  1446. goto unmap;
  1447. }
  1448. if (q6core_lcl.adsp_status < 0)
  1449. ret = q6core_lcl.adsp_status;
  1450. unmap:
  1451. ret2 = q6core_memory_unmap_regions(cal_block->map_data.q6map_handle);
  1452. if (ret2) {
  1453. pr_err("%s: q6core_memory_unmap_regions failed for map handle %d\n",
  1454. __func__, cal_block->map_data.q6map_handle);
  1455. ret = ret2;
  1456. goto unlock;
  1457. }
  1458. unlock:
  1459. mutex_unlock(&q6core_lcl.cmd_lock);
  1460. mutex_unlock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock);
  1461. return ret;
  1462. }
  1463. static int get_cal_type_index(int32_t cal_type)
  1464. {
  1465. int ret = -EINVAL;
  1466. switch (cal_type) {
  1467. case AUDIO_CORE_METAINFO_CAL_TYPE:
  1468. ret = META_CAL;
  1469. break;
  1470. case CORE_CUSTOM_TOPOLOGIES_CAL_TYPE:
  1471. ret = CUST_TOP_CAL;
  1472. break;
  1473. default:
  1474. pr_err("%s: invalid cal type %d!\n", __func__, cal_type);
  1475. }
  1476. return ret;
  1477. }
  1478. static int q6core_alloc_cal(int32_t cal_type,
  1479. size_t data_size, void *data)
  1480. {
  1481. int ret = 0;
  1482. int cal_index;
  1483. cal_index = get_cal_type_index(cal_type);
  1484. if (cal_index < 0) {
  1485. pr_err("%s: could not get cal index %d!\n",
  1486. __func__, cal_index);
  1487. ret = -EINVAL;
  1488. goto done;
  1489. }
  1490. ret = cal_utils_alloc_cal(data_size, data,
  1491. q6core_lcl.cal_data[cal_index], 0, NULL);
  1492. if (ret < 0) {
  1493. pr_err("%s: cal_utils_alloc_block failed, ret = %d, cal type = %d!\n",
  1494. __func__, ret, cal_type);
  1495. goto done;
  1496. }
  1497. done:
  1498. return ret;
  1499. }
  1500. static int q6core_dealloc_cal(int32_t cal_type,
  1501. size_t data_size, void *data)
  1502. {
  1503. int ret = 0;
  1504. int cal_index;
  1505. cal_index = get_cal_type_index(cal_type);
  1506. if (cal_index < 0) {
  1507. pr_err("%s: could not get cal index %d!\n",
  1508. __func__, cal_index);
  1509. ret = -EINVAL;
  1510. goto done;
  1511. }
  1512. ret = cal_utils_dealloc_cal(data_size, data,
  1513. q6core_lcl.cal_data[cal_index]);
  1514. if (ret < 0) {
  1515. pr_err("%s: cal_utils_dealloc_block failed, ret = %d, cal type = %d!\n",
  1516. __func__, ret, cal_type);
  1517. goto done;
  1518. }
  1519. done:
  1520. return ret;
  1521. }
  1522. static int q6core_set_cal(int32_t cal_type,
  1523. size_t data_size, void *data)
  1524. {
  1525. int ret = 0;
  1526. int cal_index;
  1527. cal_index = get_cal_type_index(cal_type);
  1528. if (cal_index < 0) {
  1529. pr_err("%s: could not get cal index %d!\n",
  1530. __func__, cal_index);
  1531. ret = -EINVAL;
  1532. goto done;
  1533. }
  1534. ret = cal_utils_set_cal(data_size, data,
  1535. q6core_lcl.cal_data[cal_index], 0, NULL);
  1536. if (ret < 0) {
  1537. pr_err("%s: cal_utils_set_cal failed, ret = %d, cal type = %d!\n",
  1538. __func__, ret, cal_type);
  1539. goto done;
  1540. }
  1541. if (cal_index == CUST_TOP_CAL)
  1542. ret = q6core_send_custom_topologies();
  1543. done:
  1544. return ret;
  1545. }
  1546. static void q6core_delete_cal_data(void)
  1547. {
  1548. pr_debug("%s:\n", __func__);
  1549. cal_utils_destroy_cal_types(CORE_MAX_CAL, q6core_lcl.cal_data);
  1550. }
  1551. static int q6core_init_cal_data(void)
  1552. {
  1553. int ret = 0;
  1554. struct cal_type_info cal_type_info[] = {
  1555. {{AUDIO_CORE_METAINFO_CAL_TYPE,
  1556. {q6core_alloc_cal, q6core_dealloc_cal, NULL,
  1557. q6core_set_cal, NULL, NULL} },
  1558. {NULL, NULL, cal_utils_match_buf_num} },
  1559. {{CORE_CUSTOM_TOPOLOGIES_CAL_TYPE,
  1560. {q6core_alloc_cal, q6core_dealloc_cal, NULL,
  1561. q6core_set_cal, NULL, NULL} },
  1562. {NULL, NULL, cal_utils_match_buf_num} }
  1563. };
  1564. pr_debug("%s:\n", __func__);
  1565. ret = cal_utils_create_cal_types(CORE_MAX_CAL,
  1566. q6core_lcl.cal_data, cal_type_info);
  1567. if (ret < 0) {
  1568. pr_err("%s: could not create cal type!\n",
  1569. __func__);
  1570. goto err;
  1571. }
  1572. return ret;
  1573. err:
  1574. q6core_delete_cal_data();
  1575. return ret;
  1576. }
  1577. static int q6core_is_avs_up(int32_t *avs_state)
  1578. {
  1579. unsigned long timeout;
  1580. int32_t adsp_ready = 0;
  1581. int ret = 0;
  1582. timeout = jiffies +
  1583. msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
  1584. /* sleep for 100ms before querying AVS up */
  1585. msleep(100);
  1586. do {
  1587. adsp_ready = q6core_is_adsp_ready();
  1588. pr_debug("%s: ADSP Audio is %s\n", __func__,
  1589. adsp_ready ? "ready" : "not ready");
  1590. if (adsp_ready)
  1591. break;
  1592. /*
  1593. * ADSP will be coming up after boot up and AVS might
  1594. * not be fully up when the control reaches here.
  1595. * So, wait for 50msec before checking ADSP state again.
  1596. */
  1597. msleep(50);
  1598. } while (time_after(timeout, jiffies));
  1599. *avs_state = adsp_ready;
  1600. pr_debug("%s: ADSP Audio is %s\n", __func__,
  1601. adsp_ready ? "ready" : "not ready");
  1602. if (!adsp_ready) {
  1603. pr_err_ratelimited("%s: Timeout. ADSP Audio is not ready\n",
  1604. __func__);
  1605. ret = -ETIMEDOUT;
  1606. }
  1607. return ret;
  1608. }
  1609. static int q6core_ssr_enable(struct device *dev, void *data)
  1610. {
  1611. int32_t avs_state = 0;
  1612. int ret = 0;
  1613. if (!dev) {
  1614. pr_err("%s: dev is NULL\n", __func__);
  1615. return -EINVAL;
  1616. }
  1617. if (!q6core_lcl.avs_state) {
  1618. ret = q6core_is_avs_up(&avs_state);
  1619. if (ret < 0)
  1620. goto err;
  1621. q6core_lcl.avs_state = avs_state;
  1622. }
  1623. err:
  1624. return ret;
  1625. }
  1626. static void q6core_ssr_disable(struct device *dev, void *data)
  1627. {
  1628. /* Reset AVS state to 0 */
  1629. q6core_lcl.avs_state = 0;
  1630. }
  1631. static const struct snd_event_ops q6core_ssr_ops = {
  1632. .enable = q6core_ssr_enable,
  1633. .disable = q6core_ssr_disable,
  1634. };
  1635. static int q6core_probe(struct platform_device *pdev)
  1636. {
  1637. int32_t avs_state = 0;
  1638. int rc = 0;
  1639. rc = q6core_is_avs_up(&avs_state);
  1640. if (rc < 0)
  1641. goto err;
  1642. q6core_lcl.avs_state = avs_state;
  1643. rc = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
  1644. if (rc) {
  1645. dev_err(&pdev->dev, "%s: failed to add child nodes, rc=%d\n",
  1646. __func__, rc);
  1647. rc = -EINVAL;
  1648. goto err;
  1649. }
  1650. dev_dbg(&pdev->dev, "%s: added child node\n", __func__);
  1651. rc = snd_event_client_register(&pdev->dev, &q6core_ssr_ops, NULL);
  1652. if (!rc) {
  1653. snd_event_notify(&pdev->dev, SND_EVENT_UP);
  1654. } else {
  1655. dev_err(&pdev->dev,
  1656. "%s: Registration with SND event fwk failed rc = %d\n",
  1657. __func__, rc);
  1658. rc = 0;
  1659. }
  1660. err:
  1661. return rc;
  1662. }
  1663. static int q6core_remove(struct platform_device *pdev)
  1664. {
  1665. snd_event_client_deregister(&pdev->dev);
  1666. of_platform_depopulate(&pdev->dev);
  1667. return 0;
  1668. }
  1669. static const struct of_device_id q6core_of_match[] = {
  1670. { .compatible = "qcom,q6core-audio", },
  1671. {},
  1672. };
  1673. static struct platform_driver q6core_driver = {
  1674. .probe = q6core_probe,
  1675. .remove = q6core_remove,
  1676. .driver = {
  1677. .name = "q6core_audio",
  1678. .owner = THIS_MODULE,
  1679. .of_match_table = q6core_of_match,
  1680. .suppress_bind_attrs = true,
  1681. }
  1682. };
  1683. int __init core_init(void)
  1684. {
  1685. memset(&q6core_lcl, 0, sizeof(struct q6core_str));
  1686. init_waitqueue_head(&q6core_lcl.bus_bw_req_wait);
  1687. init_waitqueue_head(&q6core_lcl.cmd_req_wait);
  1688. init_waitqueue_head(&q6core_lcl.avcs_fwk_ver_req_wait);
  1689. init_waitqueue_head(&q6core_lcl.mdf_map_resp_wait);
  1690. init_waitqueue_head(&q6core_lcl.lpass_npa_rsc_wait);
  1691. q6core_lcl.cmd_resp_received_flag = FLAG_NONE;
  1692. mutex_init(&q6core_lcl.cmd_lock);
  1693. mutex_init(&q6core_lcl.ver_lock);
  1694. q6core_init_cal_data();
  1695. q6core_init_uevent_kset();
  1696. return platform_driver_register(&q6core_driver);
  1697. }
  1698. void core_exit(void)
  1699. {
  1700. mutex_destroy(&q6core_lcl.cmd_lock);
  1701. mutex_destroy(&q6core_lcl.ver_lock);
  1702. q6core_delete_cal_data();
  1703. q6core_destroy_uevent_kset();
  1704. platform_driver_unregister(&q6core_driver);
  1705. }
  1706. MODULE_DESCRIPTION("ADSP core driver");
  1707. MODULE_LICENSE("GPL v2");