dp_rx.h 70 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563
  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef _DP_RX_H
  20. #define _DP_RX_H
  21. #include "hal_rx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #include <qdf_tracepoint.h>
  25. #include "dp_ipa.h"
  26. #ifdef RXDMA_OPTIMIZATION
  27. #ifndef RX_DATA_BUFFER_ALIGNMENT
  28. #define RX_DATA_BUFFER_ALIGNMENT 128
  29. #endif
  30. #ifndef RX_MONITOR_BUFFER_ALIGNMENT
  31. #define RX_MONITOR_BUFFER_ALIGNMENT 128
  32. #endif
  33. #else /* RXDMA_OPTIMIZATION */
  34. #define RX_DATA_BUFFER_ALIGNMENT 4
  35. #define RX_MONITOR_BUFFER_ALIGNMENT 4
  36. #endif /* RXDMA_OPTIMIZATION */
  37. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  38. #define DP_WBM2SW_RBM(sw0_bm_id) HAL_RX_BUF_RBM_SW1_BM(sw0_bm_id)
  39. /* RBM value used for re-injecting defragmented packets into REO */
  40. #define DP_DEFRAG_RBM(sw0_bm_id) HAL_RX_BUF_RBM_SW3_BM(sw0_bm_id)
  41. #endif
  42. #define RX_BUFFER_RESERVATION 0
  43. #ifdef BE_PKTLOG_SUPPORT
  44. #define BUFFER_RESIDUE 1
  45. #define RX_MON_MIN_HEAD_ROOM 64
  46. #endif
  47. #define DP_DEFAULT_NOISEFLOOR (-96)
  48. #define DP_RX_DESC_MAGIC 0xdec0de
  49. #define dp_rx_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_RX, params)
  50. #define dp_rx_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_RX, params)
  51. #define dp_rx_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_RX, params)
  52. #define dp_rx_info(params...) \
  53. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX, ## params)
  54. #define dp_rx_info_rl(params...) \
  55. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX, ## params)
  56. #define dp_rx_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_RX, params)
  57. /**
  58. * enum dp_rx_desc_state
  59. *
  60. * @RX_DESC_REPLENISH: rx desc replenished
  61. * @RX_DESC_FREELIST: rx desc in freelist
  62. */
  63. enum dp_rx_desc_state {
  64. RX_DESC_REPLENISHED,
  65. RX_DESC_IN_FREELIST,
  66. };
  67. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  68. /**
  69. * struct dp_rx_desc_dbg_info
  70. *
  71. * @freelist_caller: name of the function that put the
  72. * the rx desc in freelist
  73. * @freelist_ts: timestamp when the rx desc is put in
  74. * a freelist
  75. * @replenish_caller: name of the function that last
  76. * replenished the rx desc
  77. * @replenish_ts: last replenish timestamp
  78. * @prev_nbuf: previous nbuf info
  79. * @prev_nbuf_data_addr: previous nbuf data address
  80. */
  81. struct dp_rx_desc_dbg_info {
  82. char freelist_caller[QDF_MEM_FUNC_NAME_SIZE];
  83. uint64_t freelist_ts;
  84. char replenish_caller[QDF_MEM_FUNC_NAME_SIZE];
  85. uint64_t replenish_ts;
  86. qdf_nbuf_t prev_nbuf;
  87. uint8_t *prev_nbuf_data_addr;
  88. };
  89. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  90. /**
  91. * struct dp_rx_desc
  92. *
  93. * @nbuf : VA of the "skb" posted
  94. * @rx_buf_start : VA of the original Rx buffer, before
  95. * movement of any skb->data pointer
  96. * @paddr_buf_start : PA of the original Rx buffer, before
  97. * movement of any frag pointer
  98. * @cookie : index into the sw array which holds
  99. * the sw Rx descriptors
  100. * Cookie space is 21 bits:
  101. * lower 18 bits -- index
  102. * upper 3 bits -- pool_id
  103. * @pool_id : pool Id for which this allocated.
  104. * Can only be used if there is no flow
  105. * steering
  106. * @chip_id : chip_id indicating MLO chip_id
  107. * valid or used only in case of multi-chip MLO
  108. * @in_use rx_desc is in use
  109. * @unmapped used to mark rx_desc an unmapped if the corresponding
  110. * nbuf is already unmapped
  111. * @in_err_state : Nbuf sanity failed for this descriptor.
  112. * @nbuf_data_addr : VA of nbuf data posted
  113. */
  114. struct dp_rx_desc {
  115. qdf_nbuf_t nbuf;
  116. uint8_t *rx_buf_start;
  117. qdf_dma_addr_t paddr_buf_start;
  118. uint32_t cookie;
  119. uint8_t pool_id;
  120. uint8_t chip_id;
  121. #ifdef RX_DESC_DEBUG_CHECK
  122. uint32_t magic;
  123. uint8_t *nbuf_data_addr;
  124. struct dp_rx_desc_dbg_info *dbg_info;
  125. #endif
  126. uint8_t in_use:1,
  127. unmapped:1,
  128. in_err_state:1;
  129. };
  130. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  131. #ifdef ATH_RX_PRI_SAVE
  132. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  133. (qdf_nbuf_set_priority(_nbuf, _tid))
  134. #else
  135. #define DP_RX_TID_SAVE(_nbuf, _tid)
  136. #endif
  137. /* RX Descriptor Multi Page memory alloc related */
  138. #define DP_RX_DESC_OFFSET_NUM_BITS 8
  139. #define DP_RX_DESC_PAGE_ID_NUM_BITS 8
  140. #define DP_RX_DESC_POOL_ID_NUM_BITS 4
  141. #define DP_RX_DESC_PAGE_ID_SHIFT DP_RX_DESC_OFFSET_NUM_BITS
  142. #define DP_RX_DESC_POOL_ID_SHIFT \
  143. (DP_RX_DESC_OFFSET_NUM_BITS + DP_RX_DESC_PAGE_ID_NUM_BITS)
  144. #define RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK \
  145. (((1 << DP_RX_DESC_POOL_ID_NUM_BITS) - 1) << DP_RX_DESC_POOL_ID_SHIFT)
  146. #define RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK \
  147. (((1 << DP_RX_DESC_PAGE_ID_NUM_BITS) - 1) << \
  148. DP_RX_DESC_PAGE_ID_SHIFT)
  149. #define RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK \
  150. ((1 << DP_RX_DESC_OFFSET_NUM_BITS) - 1)
  151. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(_cookie) \
  152. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK) >> \
  153. DP_RX_DESC_POOL_ID_SHIFT)
  154. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(_cookie) \
  155. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK) >> \
  156. DP_RX_DESC_PAGE_ID_SHIFT)
  157. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(_cookie) \
  158. ((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK)
  159. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  160. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  161. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  162. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  163. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  164. #define DP_RX_DESC_COOKIE_MAX \
  165. (RX_DESC_COOKIE_INDEX_MASK | RX_DESC_COOKIE_POOL_ID_MASK)
  166. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  167. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  168. RX_DESC_COOKIE_POOL_ID_SHIFT)
  169. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  170. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  171. RX_DESC_COOKIE_INDEX_SHIFT)
  172. #define dp_rx_add_to_free_desc_list(head, tail, new) \
  173. __dp_rx_add_to_free_desc_list(head, tail, new, __func__)
  174. #define dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  175. num_buffers, desc_list, tail) \
  176. __dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  177. num_buffers, desc_list, tail, __func__)
  178. #ifdef WLAN_SUPPORT_RX_FISA
  179. /**
  180. * dp_rx_set_hdr_pad() - set l3 padding in nbuf cb
  181. * @nbuf: pkt skb pointer
  182. * @l3_padding: l3 padding
  183. *
  184. * Return: None
  185. */
  186. static inline
  187. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  188. {
  189. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  190. }
  191. #else
  192. static inline
  193. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  194. {
  195. }
  196. #endif
  197. #ifdef DP_RX_SPECIAL_FRAME_NEED
  198. /**
  199. * dp_rx_is_special_frame() - check is RX frame special needed
  200. *
  201. * @nbuf: RX skb pointer
  202. * @frame_mask: the mask for speical frame needed
  203. *
  204. * Check is RX frame wanted matched with mask
  205. *
  206. * Return: true - special frame needed, false - no
  207. */
  208. static inline
  209. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  210. {
  211. if (((frame_mask & FRAME_MASK_IPV4_ARP) &&
  212. qdf_nbuf_is_ipv4_arp_pkt(nbuf)) ||
  213. ((frame_mask & FRAME_MASK_IPV4_DHCP) &&
  214. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) ||
  215. ((frame_mask & FRAME_MASK_IPV4_EAPOL) &&
  216. qdf_nbuf_is_ipv4_eapol_pkt(nbuf)) ||
  217. ((frame_mask & FRAME_MASK_IPV6_DHCP) &&
  218. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf)))
  219. return true;
  220. return false;
  221. }
  222. /**
  223. * dp_rx_deliver_special_frame() - Deliver the RX special frame to stack
  224. * if matches mask
  225. *
  226. * @soc: Datapath soc handler
  227. * @peer: pointer to DP peer
  228. * @nbuf: pointer to the skb of RX frame
  229. * @frame_mask: the mask for speical frame needed
  230. * @rx_tlv_hdr: start of rx tlv header
  231. *
  232. * note: Msdu_len must have been stored in QDF_NBUF_CB_RX_PKT_LEN(nbuf) and
  233. * single nbuf is expected.
  234. *
  235. * return: true - nbuf has been delivered to stack, false - not.
  236. */
  237. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_txrx_peer *peer,
  238. qdf_nbuf_t nbuf, uint32_t frame_mask,
  239. uint8_t *rx_tlv_hdr);
  240. #else
  241. static inline
  242. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  243. {
  244. return false;
  245. }
  246. static inline
  247. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_txrx_peer *peer,
  248. qdf_nbuf_t nbuf, uint32_t frame_mask,
  249. uint8_t *rx_tlv_hdr)
  250. {
  251. return false;
  252. }
  253. #endif
  254. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  255. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  256. static inline
  257. bool dp_rx_check_ndi_mdns_fwding(struct dp_txrx_peer *ta_txrx_peer,
  258. qdf_nbuf_t nbuf)
  259. {
  260. if (ta_txrx_peer->vdev->opmode == wlan_op_mode_ndi &&
  261. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  262. DP_PEER_PER_PKT_STATS_INC(ta_txrx_peer,
  263. rx.intra_bss.mdns_no_fwd, 1);
  264. return false;
  265. }
  266. return true;
  267. }
  268. #else
  269. static inline
  270. bool dp_rx_check_ndi_mdns_fwding(struct dp_txrx_peer *ta_txrx_peer,
  271. qdf_nbuf_t nbuf)
  272. {
  273. return true;
  274. }
  275. #endif
  276. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  277. /* DOC: Offset to obtain LLC hdr
  278. *
  279. * In the case of Wifi parse error
  280. * to reach LLC header from beginning
  281. * of VLAN tag we need to skip 8 bytes.
  282. * Vlan_tag(4)+length(2)+length added
  283. * by HW(2) = 8 bytes.
  284. */
  285. #define DP_SKIP_VLAN 8
  286. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  287. /**
  288. * struct dp_rx_cached_buf - rx cached buffer
  289. * @list: linked list node
  290. * @buf: skb buffer
  291. */
  292. struct dp_rx_cached_buf {
  293. qdf_list_node_t node;
  294. qdf_nbuf_t buf;
  295. };
  296. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  297. /*
  298. *dp_rx_xor_block() - xor block of data
  299. *@b: destination data block
  300. *@a: source data block
  301. *@len: length of the data to process
  302. *
  303. *Returns: None
  304. */
  305. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  306. {
  307. qdf_size_t i;
  308. for (i = 0; i < len; i++)
  309. b[i] ^= a[i];
  310. }
  311. /*
  312. *dp_rx_rotl() - rotate the bits left
  313. *@val: unsigned integer input value
  314. *@bits: number of bits
  315. *
  316. *Returns: Integer with left rotated by number of 'bits'
  317. */
  318. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  319. {
  320. return (val << bits) | (val >> (32 - bits));
  321. }
  322. /*
  323. *dp_rx_rotr() - rotate the bits right
  324. *@val: unsigned integer input value
  325. *@bits: number of bits
  326. *
  327. *Returns: Integer with right rotated by number of 'bits'
  328. */
  329. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  330. {
  331. return (val >> bits) | (val << (32 - bits));
  332. }
  333. /*
  334. * dp_set_rx_queue() - set queue_mapping in skb
  335. * @nbuf: skb
  336. * @queue_id: rx queue_id
  337. *
  338. * Return: void
  339. */
  340. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  341. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  342. {
  343. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  344. return;
  345. }
  346. #else
  347. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  348. {
  349. }
  350. #endif
  351. /*
  352. *dp_rx_xswap() - swap the bits left
  353. *@val: unsigned integer input value
  354. *
  355. *Returns: Integer with bits swapped
  356. */
  357. static inline uint32_t dp_rx_xswap(uint32_t val)
  358. {
  359. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  360. }
  361. /*
  362. *dp_rx_get_le32_split() - get little endian 32 bits split
  363. *@b0: byte 0
  364. *@b1: byte 1
  365. *@b2: byte 2
  366. *@b3: byte 3
  367. *
  368. *Returns: Integer with split little endian 32 bits
  369. */
  370. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  371. uint8_t b3)
  372. {
  373. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  374. }
  375. /*
  376. *dp_rx_get_le32() - get little endian 32 bits
  377. *@b0: byte 0
  378. *@b1: byte 1
  379. *@b2: byte 2
  380. *@b3: byte 3
  381. *
  382. *Returns: Integer with little endian 32 bits
  383. */
  384. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  385. {
  386. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  387. }
  388. /*
  389. * dp_rx_put_le32() - put little endian 32 bits
  390. * @p: destination char array
  391. * @v: source 32-bit integer
  392. *
  393. * Returns: None
  394. */
  395. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  396. {
  397. p[0] = (v) & 0xff;
  398. p[1] = (v >> 8) & 0xff;
  399. p[2] = (v >> 16) & 0xff;
  400. p[3] = (v >> 24) & 0xff;
  401. }
  402. /* Extract michal mic block of data */
  403. #define dp_rx_michael_block(l, r) \
  404. do { \
  405. r ^= dp_rx_rotl(l, 17); \
  406. l += r; \
  407. r ^= dp_rx_xswap(l); \
  408. l += r; \
  409. r ^= dp_rx_rotl(l, 3); \
  410. l += r; \
  411. r ^= dp_rx_rotr(l, 2); \
  412. l += r; \
  413. } while (0)
  414. /**
  415. * struct dp_rx_desc_list_elem_t
  416. *
  417. * @next : Next pointer to form free list
  418. * @rx_desc : DP Rx descriptor
  419. */
  420. union dp_rx_desc_list_elem_t {
  421. union dp_rx_desc_list_elem_t *next;
  422. struct dp_rx_desc rx_desc;
  423. };
  424. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  425. /**
  426. * dp_rx_desc_find() - find dp rx descriptor from page ID and offset
  427. * @page_id: Page ID
  428. * @offset: Offset of the descriptor element
  429. *
  430. * Return: RX descriptor element
  431. */
  432. union dp_rx_desc_list_elem_t *dp_rx_desc_find(uint16_t page_id, uint16_t offset,
  433. struct rx_desc_pool *rx_pool);
  434. static inline
  435. struct dp_rx_desc *dp_get_rx_desc_from_cookie(struct dp_soc *soc,
  436. struct rx_desc_pool *pool,
  437. uint32_t cookie)
  438. {
  439. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  440. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  441. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  442. struct rx_desc_pool *rx_desc_pool;
  443. union dp_rx_desc_list_elem_t *rx_desc_elem;
  444. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  445. return NULL;
  446. rx_desc_pool = &pool[pool_id];
  447. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  448. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  449. rx_desc_pool->elem_size * offset);
  450. return &rx_desc_elem->rx_desc;
  451. }
  452. /**
  453. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  454. * the Rx descriptor on Rx DMA source ring buffer
  455. * @soc: core txrx main context
  456. * @cookie: cookie used to lookup virtual address
  457. *
  458. * Return: Pointer to the Rx descriptor
  459. */
  460. static inline
  461. struct dp_rx_desc *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc,
  462. uint32_t cookie)
  463. {
  464. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_buf[0], cookie);
  465. }
  466. /**
  467. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  468. * the Rx descriptor on monitor ring buffer
  469. * @soc: core txrx main context
  470. * @cookie: cookie used to lookup virtual address
  471. *
  472. * Return: Pointer to the Rx descriptor
  473. */
  474. static inline
  475. struct dp_rx_desc *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc,
  476. uint32_t cookie)
  477. {
  478. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_mon[0], cookie);
  479. }
  480. /**
  481. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  482. * the Rx descriptor on monitor status ring buffer
  483. * @soc: core txrx main context
  484. * @cookie: cookie used to lookup virtual address
  485. *
  486. * Return: Pointer to the Rx descriptor
  487. */
  488. static inline
  489. struct dp_rx_desc *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc,
  490. uint32_t cookie)
  491. {
  492. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_status[0], cookie);
  493. }
  494. #else
  495. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  496. uint32_t pool_size,
  497. struct rx_desc_pool *rx_desc_pool);
  498. /**
  499. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  500. * the Rx descriptor on Rx DMA source ring buffer
  501. * @soc: core txrx main context
  502. * @cookie: cookie used to lookup virtual address
  503. *
  504. * Return: void *: Virtual Address of the Rx descriptor
  505. */
  506. static inline
  507. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  508. {
  509. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  510. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  511. struct rx_desc_pool *rx_desc_pool;
  512. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  513. return NULL;
  514. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  515. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  516. return NULL;
  517. return &rx_desc_pool->array[index].rx_desc;
  518. }
  519. /**
  520. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  521. * the Rx descriptor on monitor ring buffer
  522. * @soc: core txrx main context
  523. * @cookie: cookie used to lookup virtual address
  524. *
  525. * Return: void *: Virtual Address of the Rx descriptor
  526. */
  527. static inline
  528. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  529. {
  530. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  531. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  532. /* TODO */
  533. /* Add sanity for pool_id & index */
  534. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  535. }
  536. /**
  537. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  538. * the Rx descriptor on monitor status ring buffer
  539. * @soc: core txrx main context
  540. * @cookie: cookie used to lookup virtual address
  541. *
  542. * Return: void *: Virtual Address of the Rx descriptor
  543. */
  544. static inline
  545. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  546. {
  547. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  548. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  549. /* TODO */
  550. /* Add sanity for pool_id & index */
  551. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  552. }
  553. #endif /* RX_DESC_MULTI_PAGE_ALLOC */
  554. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  555. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  556. {
  557. return vdev->ap_bridge_enabled;
  558. }
  559. #ifdef DP_RX_DESC_COOKIE_INVALIDATE
  560. static inline QDF_STATUS
  561. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  562. {
  563. if (qdf_unlikely(HAL_RX_REO_BUF_COOKIE_INVALID_GET(ring_desc)))
  564. return QDF_STATUS_E_FAILURE;
  565. HAL_RX_REO_BUF_COOKIE_INVALID_SET(ring_desc);
  566. return QDF_STATUS_SUCCESS;
  567. }
  568. /**
  569. * dp_rx_cookie_reset_invalid_bit() - Reset the invalid bit of the cookie
  570. * field in ring descriptor
  571. * @ring_desc: ring descriptor
  572. *
  573. * Return: None
  574. */
  575. static inline void
  576. dp_rx_cookie_reset_invalid_bit(hal_ring_desc_t ring_desc)
  577. {
  578. HAL_RX_REO_BUF_COOKIE_INVALID_RESET(ring_desc);
  579. }
  580. #else
  581. static inline QDF_STATUS
  582. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  583. {
  584. return QDF_STATUS_SUCCESS;
  585. }
  586. static inline void
  587. dp_rx_cookie_reset_invalid_bit(hal_ring_desc_t ring_desc)
  588. {
  589. }
  590. #endif
  591. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  592. #if defined(RX_DESC_MULTI_PAGE_ALLOC) && \
  593. defined(DP_WAR_VALIDATE_RX_ERR_MSDU_COOKIE)
  594. /**
  595. * dp_rx_is_sw_cookie_valid() - check whether SW cookie valid
  596. * @soc: dp soc ref
  597. * @cookie: Rx buf SW cookie value
  598. *
  599. * Return: true if cookie is valid else false
  600. */
  601. static inline bool dp_rx_is_sw_cookie_valid(struct dp_soc *soc,
  602. uint32_t cookie)
  603. {
  604. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  605. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  606. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  607. struct rx_desc_pool *rx_desc_pool;
  608. if (qdf_unlikely(pool_id >= MAX_PDEV_CNT))
  609. goto fail;
  610. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  611. if (page_id >= rx_desc_pool->desc_pages.num_pages ||
  612. offset >= rx_desc_pool->desc_pages.num_element_per_page)
  613. goto fail;
  614. return true;
  615. fail:
  616. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  617. return false;
  618. }
  619. #else
  620. /**
  621. * dp_rx_is_sw_cookie_valid() - check whether SW cookie valid
  622. * @soc: dp soc ref
  623. * @cookie: Rx buf SW cookie value
  624. *
  625. * When multi page alloc is disabled SW cookie validness is
  626. * checked while fetching Rx descriptor, so no need to check here
  627. * Return: true if cookie is valid else false
  628. */
  629. static inline bool dp_rx_is_sw_cookie_valid(struct dp_soc *soc,
  630. uint32_t cookie)
  631. {
  632. return true;
  633. }
  634. #endif
  635. QDF_STATUS dp_rx_desc_pool_is_allocated(struct rx_desc_pool *rx_desc_pool);
  636. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc,
  637. uint32_t pool_size,
  638. struct rx_desc_pool *rx_desc_pool);
  639. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  640. uint32_t pool_size,
  641. struct rx_desc_pool *rx_desc_pool);
  642. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  643. union dp_rx_desc_list_elem_t **local_desc_list,
  644. union dp_rx_desc_list_elem_t **tail,
  645. uint16_t pool_id,
  646. struct rx_desc_pool *rx_desc_pool);
  647. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  648. struct rx_desc_pool *rx_desc_pool,
  649. uint16_t num_descs,
  650. union dp_rx_desc_list_elem_t **desc_list,
  651. union dp_rx_desc_list_elem_t **tail);
  652. QDF_STATUS dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev);
  653. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev);
  654. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev);
  655. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev);
  656. void dp_rx_desc_pool_deinit(struct dp_soc *soc,
  657. struct rx_desc_pool *rx_desc_pool,
  658. uint32_t pool_id);
  659. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  660. QDF_STATUS dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev);
  661. void dp_rx_pdev_buffers_free(struct dp_pdev *pdev);
  662. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  663. void dp_print_napi_stats(struct dp_soc *soc);
  664. /**
  665. * dp_rx_vdev_detach() - detach vdev from dp rx
  666. * @vdev: virtual device instance
  667. *
  668. * Return: QDF_STATUS_SUCCESS: success
  669. * QDF_STATUS_E_RESOURCES: Error return
  670. */
  671. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev);
  672. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  673. uint32_t
  674. dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  675. uint8_t reo_ring_num,
  676. uint32_t quota);
  677. /**
  678. * dp_rx_err_process() - Processes error frames routed to REO error ring
  679. * @int_ctx: pointer to DP interrupt context
  680. * @soc: core txrx main context
  681. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  682. * @quota: No. of units (packets) that can be serviced in one shot.
  683. *
  684. * This function implements error processing and top level demultiplexer
  685. * for all the frames routed to REO error ring.
  686. *
  687. * Return: uint32_t: No. of elements processed
  688. */
  689. uint32_t dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  690. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  691. /**
  692. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  693. * @int_ctx: pointer to DP interrupt context
  694. * @soc: core txrx main context
  695. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  696. * @quota: No. of units (packets) that can be serviced in one shot.
  697. *
  698. * This function implements error processing and top level demultiplexer
  699. * for all the frames routed to WBM2HOST sw release ring.
  700. *
  701. * Return: uint32_t: No. of elements processed
  702. */
  703. uint32_t
  704. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  705. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  706. /**
  707. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  708. * multiple nbufs.
  709. * @soc: core txrx main context
  710. * @nbuf: pointer to the first msdu of an amsdu.
  711. *
  712. * This function implements the creation of RX frag_list for cases
  713. * where an MSDU is spread across multiple nbufs.
  714. *
  715. * Return: returns the head nbuf which contains complete frag_list.
  716. */
  717. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf);
  718. /*
  719. * dp_rx_desc_nbuf_and_pool_free() - free the sw rx desc pool called during
  720. * de-initialization of wifi module.
  721. *
  722. * @soc: core txrx main context
  723. * @pool_id: pool_id which is one of 3 mac_ids
  724. * @rx_desc_pool: rx descriptor pool pointer
  725. *
  726. * Return: None
  727. */
  728. void dp_rx_desc_nbuf_and_pool_free(struct dp_soc *soc, uint32_t pool_id,
  729. struct rx_desc_pool *rx_desc_pool);
  730. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  731. /*
  732. * dp_rx_desc_nbuf_free() - free the sw rx desc nbufs called during
  733. * de-initialization of wifi module.
  734. *
  735. * @soc: core txrx main context
  736. * @pool_id: pool_id which is one of 3 mac_ids
  737. * @rx_desc_pool: rx descriptor pool pointer
  738. *
  739. * Return: None
  740. */
  741. void dp_rx_desc_nbuf_free(struct dp_soc *soc,
  742. struct rx_desc_pool *rx_desc_pool);
  743. #ifdef DP_RX_MON_MEM_FRAG
  744. /*
  745. * dp_rx_desc_frag_free() - free the sw rx desc frag called during
  746. * de-initialization of wifi module.
  747. *
  748. * @soc: core txrx main context
  749. * @rx_desc_pool: rx descriptor pool pointer
  750. *
  751. * Return: None
  752. */
  753. void dp_rx_desc_frag_free(struct dp_soc *soc,
  754. struct rx_desc_pool *rx_desc_pool);
  755. #else
  756. static inline
  757. void dp_rx_desc_frag_free(struct dp_soc *soc,
  758. struct rx_desc_pool *rx_desc_pool)
  759. {
  760. }
  761. #endif
  762. /*
  763. * dp_rx_desc_pool_free() - free the sw rx desc array called during
  764. * de-initialization of wifi module.
  765. *
  766. * @soc: core txrx main context
  767. * @rx_desc_pool: rx descriptor pool pointer
  768. *
  769. * Return: None
  770. */
  771. void dp_rx_desc_pool_free(struct dp_soc *soc,
  772. struct rx_desc_pool *rx_desc_pool);
  773. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  774. struct dp_txrx_peer *peer);
  775. #ifdef RX_DESC_LOGGING
  776. /*
  777. * dp_rx_desc_alloc_dbg_info() - Alloc memory for rx descriptor debug
  778. * structure
  779. * @rx_desc: rx descriptor pointer
  780. *
  781. * Return: None
  782. */
  783. static inline
  784. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  785. {
  786. rx_desc->dbg_info = qdf_mem_malloc(sizeof(struct dp_rx_desc_dbg_info));
  787. }
  788. /*
  789. * dp_rx_desc_free_dbg_info() - Free rx descriptor debug
  790. * structure memory
  791. * @rx_desc: rx descriptor pointer
  792. *
  793. * Return: None
  794. */
  795. static inline
  796. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  797. {
  798. qdf_mem_free(rx_desc->dbg_info);
  799. }
  800. /*
  801. * dp_rx_desc_update_dbg_info() - Update rx descriptor debug info
  802. * structure memory
  803. * @rx_desc: rx descriptor pointer
  804. *
  805. * Return: None
  806. */
  807. static
  808. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  809. const char *func_name, uint8_t flag)
  810. {
  811. struct dp_rx_desc_dbg_info *info = rx_desc->dbg_info;
  812. if (!info)
  813. return;
  814. if (flag == RX_DESC_REPLENISHED) {
  815. qdf_str_lcopy(info->replenish_caller, func_name,
  816. QDF_MEM_FUNC_NAME_SIZE);
  817. info->replenish_ts = qdf_get_log_timestamp();
  818. } else {
  819. qdf_str_lcopy(info->freelist_caller, func_name,
  820. QDF_MEM_FUNC_NAME_SIZE);
  821. info->freelist_ts = qdf_get_log_timestamp();
  822. info->prev_nbuf = rx_desc->nbuf;
  823. info->prev_nbuf_data_addr = rx_desc->nbuf_data_addr;
  824. rx_desc->nbuf_data_addr = NULL;
  825. }
  826. }
  827. #else
  828. static inline
  829. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  830. {
  831. }
  832. static inline
  833. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  834. {
  835. }
  836. static inline
  837. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  838. const char *func_name, uint8_t flag)
  839. {
  840. }
  841. #endif /* RX_DESC_LOGGING */
  842. /**
  843. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  844. *
  845. * @head: pointer to the head of local free list
  846. * @tail: pointer to the tail of local free list
  847. * @new: new descriptor that is added to the free list
  848. * @func_name: caller func name
  849. *
  850. * Return: void:
  851. */
  852. static inline
  853. void __dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  854. union dp_rx_desc_list_elem_t **tail,
  855. struct dp_rx_desc *new, const char *func_name)
  856. {
  857. qdf_assert(head && new);
  858. dp_rx_desc_update_dbg_info(new, func_name, RX_DESC_IN_FREELIST);
  859. new->nbuf = NULL;
  860. new->in_use = 0;
  861. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  862. *head = (union dp_rx_desc_list_elem_t *)new;
  863. /* reset tail if head->next is NULL */
  864. if (!*tail || !(*head)->next)
  865. *tail = *head;
  866. }
  867. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  868. uint8_t mac_id);
  869. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  870. qdf_nbuf_t mpdu, bool mpdu_done, uint8_t mac_id);
  871. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  872. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer);
  873. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  874. uint16_t peer_id, uint8_t tid);
  875. #define DP_RX_HEAD_APPEND(head, elem) \
  876. do { \
  877. qdf_nbuf_set_next((elem), (head)); \
  878. (head) = (elem); \
  879. } while (0)
  880. #define DP_RX_LIST_APPEND(head, tail, elem) \
  881. do { \
  882. if (!(head)) { \
  883. (head) = (elem); \
  884. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head) = 1;\
  885. } else { \
  886. qdf_nbuf_set_next((tail), (elem)); \
  887. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head)++; \
  888. } \
  889. (tail) = (elem); \
  890. qdf_nbuf_set_next((tail), NULL); \
  891. } while (0)
  892. #define DP_RX_MERGE_TWO_LIST(phead, ptail, chead, ctail) \
  893. do { \
  894. if (!(phead)) { \
  895. (phead) = (chead); \
  896. } else { \
  897. qdf_nbuf_set_next((ptail), (chead)); \
  898. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(phead) += \
  899. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(chead); \
  900. } \
  901. (ptail) = (ctail); \
  902. qdf_nbuf_set_next((ptail), NULL); \
  903. } while (0)
  904. #if defined(QCA_PADDR_CHECK_ON_3TH_PLATFORM)
  905. /*
  906. * on some third-party platform, the memory below 0x2000
  907. * is reserved for target use, so any memory allocated in this
  908. * region should not be used by host
  909. */
  910. #define MAX_RETRY 50
  911. #define DP_PHY_ADDR_RESERVED 0x2000
  912. #elif defined(BUILD_X86)
  913. /*
  914. * in M2M emulation platforms (x86) the memory below 0x50000000
  915. * is reserved for target use, so any memory allocated in this
  916. * region should not be used by host
  917. */
  918. #define MAX_RETRY 100
  919. #define DP_PHY_ADDR_RESERVED 0x50000000
  920. #endif
  921. #if defined(QCA_PADDR_CHECK_ON_3TH_PLATFORM) || defined(BUILD_X86)
  922. /**
  923. * dp_check_paddr() - check if current phy address is valid or not
  924. * @dp_soc: core txrx main context
  925. * @rx_netbuf: skb buffer
  926. * @paddr: physical address
  927. * @rx_desc_pool: struct of rx descriptor pool
  928. * check if the physical address of the nbuf->data is less
  929. * than DP_PHY_ADDR_RESERVED then free the nbuf and try
  930. * allocating new nbuf. We can try for 100 times.
  931. *
  932. * This is a temp WAR till we fix it properly.
  933. *
  934. * Return: success or failure.
  935. */
  936. static inline
  937. int dp_check_paddr(struct dp_soc *dp_soc,
  938. qdf_nbuf_t *rx_netbuf,
  939. qdf_dma_addr_t *paddr,
  940. struct rx_desc_pool *rx_desc_pool)
  941. {
  942. uint32_t nbuf_retry = 0;
  943. int32_t ret;
  944. if (qdf_likely(*paddr > DP_PHY_ADDR_RESERVED))
  945. return QDF_STATUS_SUCCESS;
  946. do {
  947. dp_debug("invalid phy addr 0x%llx, trying again",
  948. (uint64_t)(*paddr));
  949. nbuf_retry++;
  950. if ((*rx_netbuf)) {
  951. /* Not freeing buffer intentionally.
  952. * Observed that same buffer is getting
  953. * re-allocated resulting in longer load time
  954. * WMI init timeout.
  955. * This buffer is anyway not useful so skip it.
  956. *.Add such buffer to invalid list and free
  957. *.them when driver unload.
  958. **/
  959. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  960. *rx_netbuf,
  961. QDF_DMA_FROM_DEVICE,
  962. rx_desc_pool->buf_size);
  963. qdf_nbuf_queue_add(&dp_soc->invalid_buf_queue,
  964. *rx_netbuf);
  965. }
  966. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  967. rx_desc_pool->buf_size,
  968. RX_BUFFER_RESERVATION,
  969. rx_desc_pool->buf_alignment,
  970. FALSE);
  971. if (qdf_unlikely(!(*rx_netbuf)))
  972. return QDF_STATUS_E_FAILURE;
  973. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  974. *rx_netbuf,
  975. QDF_DMA_FROM_DEVICE,
  976. rx_desc_pool->buf_size);
  977. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  978. qdf_nbuf_free(*rx_netbuf);
  979. *rx_netbuf = NULL;
  980. continue;
  981. }
  982. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  983. if (qdf_likely(*paddr > DP_PHY_ADDR_RESERVED))
  984. return QDF_STATUS_SUCCESS;
  985. } while (nbuf_retry < MAX_RETRY);
  986. if ((*rx_netbuf)) {
  987. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  988. *rx_netbuf,
  989. QDF_DMA_FROM_DEVICE,
  990. rx_desc_pool->buf_size);
  991. qdf_nbuf_queue_add(&dp_soc->invalid_buf_queue,
  992. *rx_netbuf);
  993. }
  994. return QDF_STATUS_E_FAILURE;
  995. }
  996. #else
  997. static inline
  998. int dp_check_paddr(struct dp_soc *dp_soc,
  999. qdf_nbuf_t *rx_netbuf,
  1000. qdf_dma_addr_t *paddr,
  1001. struct rx_desc_pool *rx_desc_pool)
  1002. {
  1003. return QDF_STATUS_SUCCESS;
  1004. }
  1005. #endif
  1006. /**
  1007. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  1008. * the MSDU Link Descriptor
  1009. * @soc: core txrx main context
  1010. * @buf_info: buf_info includes cookie that is used to lookup
  1011. * virtual address of link descriptor after deriving the page id
  1012. * and the offset or index of the desc on the associatde page.
  1013. *
  1014. * This is the VA of the link descriptor, that HAL layer later uses to
  1015. * retrieve the list of MSDU's for a given MPDU.
  1016. *
  1017. * Return: void *: Virtual Address of the Rx descriptor
  1018. */
  1019. static inline
  1020. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  1021. struct hal_buf_info *buf_info)
  1022. {
  1023. void *link_desc_va;
  1024. struct qdf_mem_multi_page_t *pages;
  1025. uint16_t page_id = LINK_DESC_COOKIE_PAGE_ID(buf_info->sw_cookie);
  1026. pages = &soc->link_desc_pages;
  1027. if (!pages)
  1028. return NULL;
  1029. if (qdf_unlikely(page_id >= pages->num_pages))
  1030. return NULL;
  1031. link_desc_va = pages->dma_pages[page_id].page_v_addr_start +
  1032. (buf_info->paddr - pages->dma_pages[page_id].page_p_addr);
  1033. return link_desc_va;
  1034. }
  1035. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1036. #ifdef DISABLE_EAPOL_INTRABSS_FWD
  1037. #ifdef WLAN_FEATURE_11BE_MLO
  1038. static inline bool dp_nbuf_dst_addr_is_mld_addr(struct dp_vdev *vdev,
  1039. qdf_nbuf_t nbuf)
  1040. {
  1041. struct qdf_mac_addr *self_mld_mac_addr =
  1042. (struct qdf_mac_addr *)vdev->mld_mac_addr.raw;
  1043. return qdf_is_macaddr_equal(self_mld_mac_addr,
  1044. (struct qdf_mac_addr *)qdf_nbuf_data(nbuf) +
  1045. QDF_NBUF_DEST_MAC_OFFSET);
  1046. }
  1047. #else
  1048. static inline bool dp_nbuf_dst_addr_is_mld_addr(struct dp_vdev *vdev,
  1049. qdf_nbuf_t nbuf)
  1050. {
  1051. return false;
  1052. }
  1053. #endif
  1054. static inline bool dp_nbuf_dst_addr_is_self_addr(struct dp_vdev *vdev,
  1055. qdf_nbuf_t nbuf)
  1056. {
  1057. return qdf_is_macaddr_equal((struct qdf_mac_addr *)vdev->mac_addr.raw,
  1058. (struct qdf_mac_addr *)qdf_nbuf_data(nbuf) +
  1059. QDF_NBUF_DEST_MAC_OFFSET);
  1060. }
  1061. /*
  1062. * dp_rx_intrabss_eapol_drop_check() - API For EAPOL
  1063. * pkt with DA not equal to vdev mac addr, fwd is not allowed.
  1064. * @soc: core txrx main context
  1065. * @ta_txrx_peer: source peer entry
  1066. * @rx_tlv_hdr: start address of rx tlvs
  1067. * @nbuf: nbuf that has to be intrabss forwarded
  1068. *
  1069. * Return: true if it is forwarded else false
  1070. */
  1071. static inline
  1072. bool dp_rx_intrabss_eapol_drop_check(struct dp_soc *soc,
  1073. struct dp_txrx_peer *ta_txrx_peer,
  1074. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf)
  1075. {
  1076. if (qdf_unlikely(qdf_nbuf_is_ipv4_eapol_pkt(nbuf) &&
  1077. !(dp_nbuf_dst_addr_is_self_addr(ta_txrx_peer->vdev,
  1078. nbuf) ||
  1079. dp_nbuf_dst_addr_is_mld_addr(ta_txrx_peer->vdev,
  1080. nbuf)))) {
  1081. qdf_nbuf_free(nbuf);
  1082. DP_STATS_INC(soc, rx.err.intrabss_eapol_drop, 1);
  1083. return true;
  1084. }
  1085. return false;
  1086. }
  1087. #else /* DISABLE_EAPOL_INTRABSS_FWD */
  1088. static inline
  1089. bool dp_rx_intrabss_eapol_drop_check(struct dp_soc *soc,
  1090. struct dp_txrx_peer *ta_txrx_peer,
  1091. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf)
  1092. {
  1093. return false;
  1094. }
  1095. #endif /* DISABLE_EAPOL_INTRABSS_FWD */
  1096. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc,
  1097. struct dp_txrx_peer *ta_txrx_peer,
  1098. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1099. struct cdp_tid_rx_stats *tid_stats);
  1100. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc,
  1101. struct dp_txrx_peer *ta_txrx_peer,
  1102. uint8_t tx_vdev_id,
  1103. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1104. struct cdp_tid_rx_stats *tid_stats);
  1105. /**
  1106. * dp_rx_defrag_concat() - Concatenate the fragments
  1107. *
  1108. * @dst: destination pointer to the buffer
  1109. * @src: source pointer from where the fragment payload is to be copied
  1110. *
  1111. * Return: QDF_STATUS
  1112. */
  1113. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  1114. {
  1115. /*
  1116. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  1117. * to provide space for src, the headroom portion is copied from
  1118. * the original dst buffer to the larger new dst buffer.
  1119. * (This is needed, because the headroom of the dst buffer
  1120. * contains the rx desc.)
  1121. */
  1122. if (!qdf_nbuf_cat(dst, src)) {
  1123. /*
  1124. * qdf_nbuf_cat does not free the src memory.
  1125. * Free src nbuf before returning
  1126. * For failure case the caller takes of freeing the nbuf
  1127. */
  1128. qdf_nbuf_free(src);
  1129. return QDF_STATUS_SUCCESS;
  1130. }
  1131. return QDF_STATUS_E_DEFRAG_ERROR;
  1132. }
  1133. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1134. #ifndef FEATURE_WDS
  1135. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  1136. struct dp_txrx_peer *ta_txrx_peer, qdf_nbuf_t nbuf);
  1137. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  1138. {
  1139. return QDF_STATUS_SUCCESS;
  1140. }
  1141. static inline void
  1142. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  1143. uint8_t *rx_tlv_hdr,
  1144. struct dp_txrx_peer *txrx_peer,
  1145. qdf_nbuf_t nbuf,
  1146. struct hal_rx_msdu_metadata msdu_metadata)
  1147. {
  1148. }
  1149. static inline void
  1150. dp_rx_ipa_wds_srcport_learn(struct dp_soc *soc,
  1151. struct dp_peer *ta_peer, qdf_nbuf_t nbuf,
  1152. struct hal_rx_msdu_metadata msdu_end_info,
  1153. bool ad4_valid, bool chfrag_start)
  1154. {
  1155. }
  1156. #endif
  1157. /*
  1158. * dp_rx_desc_dump() - dump the sw rx descriptor
  1159. *
  1160. * @rx_desc: sw rx descriptor
  1161. */
  1162. static inline void dp_rx_desc_dump(struct dp_rx_desc *rx_desc)
  1163. {
  1164. dp_info("rx_desc->nbuf: %pK, rx_desc->cookie: %d, rx_desc->pool_id: %d, rx_desc->in_use: %d, rx_desc->unmapped: %d",
  1165. rx_desc->nbuf, rx_desc->cookie, rx_desc->pool_id,
  1166. rx_desc->in_use, rx_desc->unmapped);
  1167. }
  1168. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1169. /*
  1170. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  1171. * In qwrap mode, packets originated from
  1172. * any vdev should not loopback and
  1173. * should be dropped.
  1174. * @vdev: vdev on which rx packet is received
  1175. * @nbuf: rx pkt
  1176. *
  1177. */
  1178. #if ATH_SUPPORT_WRAP
  1179. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  1180. qdf_nbuf_t nbuf)
  1181. {
  1182. struct dp_vdev *psta_vdev;
  1183. struct dp_pdev *pdev = vdev->pdev;
  1184. uint8_t *data = qdf_nbuf_data(nbuf);
  1185. if (qdf_unlikely(vdev->proxysta_vdev)) {
  1186. /* In qwrap isolation mode, allow loopback packets as all
  1187. * packets go to RootAP and Loopback on the mpsta.
  1188. */
  1189. if (vdev->isolation_vdev)
  1190. return false;
  1191. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  1192. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  1193. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  1194. &data[QDF_MAC_ADDR_SIZE],
  1195. QDF_MAC_ADDR_SIZE))) {
  1196. /* Drop packet if source address is equal to
  1197. * any of the vdev addresses.
  1198. */
  1199. return true;
  1200. }
  1201. }
  1202. }
  1203. return false;
  1204. }
  1205. #else
  1206. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  1207. qdf_nbuf_t nbuf)
  1208. {
  1209. return false;
  1210. }
  1211. #endif
  1212. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1213. #if defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) ||\
  1214. defined(WLAN_SUPPORT_RX_TAG_STATISTICS) ||\
  1215. defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1216. #include "dp_rx_tag.h"
  1217. #endif
  1218. #if !defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) &&\
  1219. !defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1220. /**
  1221. * dp_rx_update_protocol_tag() - Reads CCE metadata from the RX MSDU end TLV
  1222. * and set the corresponding tag in QDF packet
  1223. * @soc: core txrx main context
  1224. * @vdev: vdev on which the packet is received
  1225. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1226. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1227. * @ring_index: REO ring number, not used for error & monitor ring
  1228. * @is_reo_exception: flag to indicate if rx from REO ring or exception ring
  1229. * @is_update_stats: flag to indicate whether to update stats or not
  1230. * Return: void
  1231. */
  1232. static inline void
  1233. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1234. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  1235. uint16_t ring_index,
  1236. bool is_reo_exception, bool is_update_stats)
  1237. {
  1238. }
  1239. #endif
  1240. #ifndef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  1241. /**
  1242. * dp_rx_err_cce_drop() - Reads CCE metadata from the RX MSDU end TLV
  1243. * and returns whether cce metadata matches
  1244. * @soc: core txrx main context
  1245. * @vdev: vdev on which the packet is received
  1246. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1247. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1248. * Return: bool
  1249. */
  1250. static inline bool
  1251. dp_rx_err_cce_drop(struct dp_soc *soc, struct dp_vdev *vdev,
  1252. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  1253. {
  1254. return false;
  1255. }
  1256. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  1257. #ifndef WLAN_SUPPORT_RX_FLOW_TAG
  1258. /**
  1259. * dp_rx_update_flow_tag() - Reads FSE metadata from the RX MSDU end TLV
  1260. * and set the corresponding tag in QDF packet
  1261. * @soc: core txrx main context
  1262. * @vdev: vdev on which the packet is received
  1263. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1264. * @rx_tlv_hdr: base address where the RX TLVs starts
  1265. * @is_update_stats: flag to indicate whether to update stats or not
  1266. *
  1267. * Return: void
  1268. */
  1269. static inline void
  1270. dp_rx_update_flow_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1271. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr, bool update_stats)
  1272. {
  1273. }
  1274. #endif /* WLAN_SUPPORT_RX_FLOW_TAG */
  1275. /*
  1276. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  1277. * called during dp rx initialization
  1278. * and at the end of dp_rx_process.
  1279. *
  1280. * @soc: core txrx main context
  1281. * @mac_id: mac_id which is one of 3 mac_ids
  1282. * @dp_rxdma_srng: dp rxdma circular ring
  1283. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1284. * @num_req_buffers: number of buffer to be replenished
  1285. * @desc_list: list of descs if called from dp_rx_process
  1286. * or NULL during dp rx initialization or out of buffer
  1287. * interrupt.
  1288. * @tail: tail of descs list
  1289. * @func_name: name of the caller function
  1290. * Return: return success or failure
  1291. */
  1292. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1293. struct dp_srng *dp_rxdma_srng,
  1294. struct rx_desc_pool *rx_desc_pool,
  1295. uint32_t num_req_buffers,
  1296. union dp_rx_desc_list_elem_t **desc_list,
  1297. union dp_rx_desc_list_elem_t **tail,
  1298. const char *func_name);
  1299. /*
  1300. * __dp_rx_buffers_no_map_replenish() - replenish rxdma ring with rx nbufs
  1301. * use direct APIs to get invalidate
  1302. * and get the physical address of the
  1303. * nbuf instead of map api,called during
  1304. * dp rx initialization and at the end
  1305. * of dp_rx_process.
  1306. *
  1307. * @soc: core txrx main context
  1308. * @mac_id: mac_id which is one of 3 mac_ids
  1309. * @dp_rxdma_srng: dp rxdma circular ring
  1310. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1311. * @num_req_buffers: number of buffer to be replenished
  1312. * @desc_list: list of descs if called from dp_rx_process
  1313. * or NULL during dp rx initialization or out of buffer
  1314. * interrupt.
  1315. * @tail: tail of descs list
  1316. * Return: return success or failure
  1317. */
  1318. QDF_STATUS
  1319. __dp_rx_buffers_no_map_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1320. struct dp_srng *dp_rxdma_srng,
  1321. struct rx_desc_pool *rx_desc_pool,
  1322. uint32_t num_req_buffers,
  1323. union dp_rx_desc_list_elem_t **desc_list,
  1324. union dp_rx_desc_list_elem_t **tail);
  1325. /*
  1326. * __dp_rx_buffers_no_map__lt_replenish() - replenish rxdma ring with rx nbufs
  1327. * use direct APIs to get invalidate
  1328. * and get the physical address of the
  1329. * nbuf instead of map api,called when
  1330. * low threshold interrupt is triggered
  1331. *
  1332. * @soc: core txrx main context
  1333. * @mac_id: mac_id which is one of 3 mac_ids
  1334. * @dp_rxdma_srng: dp rxdma circular ring
  1335. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1336. * Return: return success or failure
  1337. */
  1338. QDF_STATUS
  1339. __dp_rx_buffers_no_map_lt_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1340. struct dp_srng *dp_rxdma_srng,
  1341. struct rx_desc_pool *rx_desc_pool);
  1342. /*
  1343. * __dp_pdev_rx_buffers_no_map_attach() - replenish rxdma ring with rx nbufs
  1344. * use direct APIs to get invalidate
  1345. * and get the physical address of the
  1346. * nbuf instead of map api,called during
  1347. * dp rx initialization.
  1348. *
  1349. * @soc: core txrx main context
  1350. * @mac_id: mac_id which is one of 3 mac_ids
  1351. * @dp_rxdma_srng: dp rxdma circular ring
  1352. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1353. * @num_req_buffers: number of buffer to be replenished
  1354. * Return: return success or failure
  1355. */
  1356. QDF_STATUS __dp_pdev_rx_buffers_no_map_attach(struct dp_soc *dp_soc,
  1357. uint32_t mac_id,
  1358. struct dp_srng *dp_rxdma_srng,
  1359. struct rx_desc_pool *rx_desc_pool,
  1360. uint32_t num_req_buffers);
  1361. /*
  1362. * dp_pdev_rx_buffers_attach() - replenish rxdma ring with rx nbufs
  1363. * called during dp rx initialization
  1364. *
  1365. * @soc: core txrx main context
  1366. * @mac_id: mac_id which is one of 3 mac_ids
  1367. * @dp_rxdma_srng: dp rxdma circular ring
  1368. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1369. * @num_req_buffers: number of buffer to be replenished
  1370. *
  1371. * Return: return success or failure
  1372. */
  1373. QDF_STATUS
  1374. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1375. struct dp_srng *dp_rxdma_srng,
  1376. struct rx_desc_pool *rx_desc_pool,
  1377. uint32_t num_req_buffers);
  1378. /**
  1379. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  1380. * (WBM), following error handling
  1381. *
  1382. * @soc: core DP main context
  1383. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  1384. * @buf_addr_info: void pointer to the buffer_addr_info
  1385. * @bm_action: put to idle_list or release to msdu_list
  1386. *
  1387. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1388. */
  1389. QDF_STATUS
  1390. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  1391. uint8_t bm_action);
  1392. /**
  1393. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  1394. * (WBM) by address
  1395. *
  1396. * @soc: core DP main context
  1397. * @link_desc_addr: link descriptor addr
  1398. *
  1399. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1400. */
  1401. QDF_STATUS
  1402. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  1403. hal_buff_addrinfo_t link_desc_addr,
  1404. uint8_t bm_action);
  1405. /**
  1406. * dp_rxdma_err_process() - RxDMA error processing functionality
  1407. * @soc: core txrx main contex
  1408. * @mac_id: mac id which is one of 3 mac_ids
  1409. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1410. * @quota: No. of units (packets) that can be serviced in one shot.
  1411. *
  1412. * Return: num of buffers processed
  1413. */
  1414. uint32_t
  1415. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1416. uint32_t mac_id, uint32_t quota);
  1417. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1418. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer);
  1419. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1420. uint8_t *rx_tlv_hdr);
  1421. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  1422. struct dp_txrx_peer *peer);
  1423. /*
  1424. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  1425. *
  1426. * @soc: core txrx main context
  1427. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1428. * @ring_desc: opaque pointer to the RX ring descriptor
  1429. * @rx_desc: host rx descriptor
  1430. *
  1431. * Return: void
  1432. */
  1433. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  1434. hal_ring_handle_t hal_ring_hdl,
  1435. hal_ring_desc_t ring_desc,
  1436. struct dp_rx_desc *rx_desc);
  1437. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  1438. #ifdef QCA_PEER_EXT_STATS
  1439. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1440. qdf_nbuf_t nbuf);
  1441. #endif /* QCA_PEER_EXT_STATS */
  1442. #ifdef RX_DESC_DEBUG_CHECK
  1443. /**
  1444. * dp_rx_desc_check_magic() - check the magic value in dp_rx_desc
  1445. * @rx_desc: rx descriptor pointer
  1446. *
  1447. * Return: true, if magic is correct, else false.
  1448. */
  1449. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1450. {
  1451. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC))
  1452. return false;
  1453. rx_desc->magic = 0;
  1454. return true;
  1455. }
  1456. /**
  1457. * dp_rx_desc_prep() - prepare rx desc
  1458. * @rx_desc: rx descriptor pointer to be prepared
  1459. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1460. *
  1461. * Note: assumption is that we are associating a nbuf which is mapped
  1462. *
  1463. * Return: none
  1464. */
  1465. static inline
  1466. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1467. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1468. {
  1469. rx_desc->magic = DP_RX_DESC_MAGIC;
  1470. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1471. rx_desc->unmapped = 0;
  1472. rx_desc->nbuf_data_addr = (uint8_t *)qdf_nbuf_data(rx_desc->nbuf);
  1473. }
  1474. /**
  1475. * dp_rx_desc_frag_prep() - prepare rx desc
  1476. * @rx_desc: rx descriptor pointer to be prepared
  1477. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1478. *
  1479. * Note: assumption is that we frag address is mapped
  1480. *
  1481. * Return: none
  1482. */
  1483. #ifdef DP_RX_MON_MEM_FRAG
  1484. static inline
  1485. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1486. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1487. {
  1488. rx_desc->magic = DP_RX_DESC_MAGIC;
  1489. rx_desc->rx_buf_start =
  1490. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1491. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1492. rx_desc->unmapped = 0;
  1493. }
  1494. #else
  1495. static inline
  1496. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1497. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1498. {
  1499. }
  1500. #endif /* DP_RX_MON_MEM_FRAG */
  1501. /**
  1502. * dp_rx_desc_paddr_sanity_check() - paddr sanity for ring desc vs rx_desc
  1503. * @rx_desc: rx descriptor
  1504. * @ring_paddr: paddr obatined from the ring
  1505. *
  1506. * Returns: QDF_STATUS
  1507. */
  1508. static inline
  1509. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  1510. uint64_t ring_paddr)
  1511. {
  1512. return (ring_paddr == qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1513. }
  1514. #else
  1515. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1516. {
  1517. return true;
  1518. }
  1519. static inline
  1520. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1521. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1522. {
  1523. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1524. rx_desc->unmapped = 0;
  1525. }
  1526. #ifdef DP_RX_MON_MEM_FRAG
  1527. static inline
  1528. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1529. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1530. {
  1531. rx_desc->rx_buf_start =
  1532. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1533. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1534. rx_desc->unmapped = 0;
  1535. }
  1536. #else
  1537. static inline
  1538. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1539. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1540. {
  1541. }
  1542. #endif /* DP_RX_MON_MEM_FRAG */
  1543. static inline
  1544. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  1545. uint64_t ring_paddr)
  1546. {
  1547. return true;
  1548. }
  1549. #endif /* RX_DESC_DEBUG_CHECK */
  1550. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  1551. bool is_mon_dest_desc);
  1552. void dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1553. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer,
  1554. uint8_t err_code, uint8_t mac_id);
  1555. #ifndef QCA_MULTIPASS_SUPPORT
  1556. static inline
  1557. bool dp_rx_multipass_process(struct dp_txrx_peer *peer, qdf_nbuf_t nbuf,
  1558. uint8_t tid)
  1559. {
  1560. return false;
  1561. }
  1562. #else
  1563. bool dp_rx_multipass_process(struct dp_txrx_peer *peer, qdf_nbuf_t nbuf,
  1564. uint8_t tid);
  1565. #endif
  1566. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1567. #ifndef WLAN_RX_PKT_CAPTURE_ENH
  1568. static inline
  1569. QDF_STATUS dp_peer_set_rx_capture_enabled(struct dp_pdev *pdev,
  1570. struct dp_peer *peer_handle,
  1571. bool value, uint8_t *mac_addr)
  1572. {
  1573. return QDF_STATUS_SUCCESS;
  1574. }
  1575. #endif
  1576. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1577. /**
  1578. * dp_rx_deliver_to_stack() - deliver pkts to network stack
  1579. * Caller to hold peer refcount and check for valid peer
  1580. * @soc: soc
  1581. * @vdev: vdev
  1582. * @txrx_peer: txrx peer
  1583. * @nbuf_head: skb list head
  1584. * @nbuf_tail: skb list tail
  1585. *
  1586. * Return: QDF_STATUS
  1587. */
  1588. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  1589. struct dp_vdev *vdev,
  1590. struct dp_txrx_peer *peer,
  1591. qdf_nbuf_t nbuf_head,
  1592. qdf_nbuf_t nbuf_tail);
  1593. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  1594. /**
  1595. * dp_rx_eapol_deliver_to_stack() - deliver pkts to network stack
  1596. * caller to hold peer refcount and check for valid peer
  1597. * @soc: soc
  1598. * @vdev: vdev
  1599. * @peer: peer
  1600. * @nbuf_head: skb list head
  1601. * @nbuf_tail: skb list tail
  1602. *
  1603. * return: QDF_STATUS
  1604. */
  1605. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  1606. struct dp_vdev *vdev,
  1607. struct dp_txrx_peer *peer,
  1608. qdf_nbuf_t nbuf_head,
  1609. qdf_nbuf_t nbuf_tail);
  1610. #endif
  1611. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1612. #ifdef QCA_OL_RX_LOCK_LESS_ACCESS
  1613. /*
  1614. * dp_rx_ring_access_start()- Wrapper function to log access start of a hal ring
  1615. * @int_ctx: pointer to DP interrupt context
  1616. * @dp_soc - DP soc structure pointer
  1617. * @hal_ring_hdl - HAL ring handle
  1618. *
  1619. * Return: 0 on success; error on failure
  1620. */
  1621. static inline int
  1622. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1623. hal_ring_handle_t hal_ring_hdl)
  1624. {
  1625. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  1626. }
  1627. /*
  1628. * dp_rx_ring_access_end()- Wrapper function to log access end of a hal ring
  1629. * @int_ctx: pointer to DP interrupt context
  1630. * @dp_soc - DP soc structure pointer
  1631. * @hal_ring_hdl - HAL ring handle
  1632. *
  1633. * Return - None
  1634. */
  1635. static inline void
  1636. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1637. hal_ring_handle_t hal_ring_hdl)
  1638. {
  1639. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  1640. }
  1641. #else
  1642. static inline int
  1643. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1644. hal_ring_handle_t hal_ring_hdl)
  1645. {
  1646. return dp_srng_access_start(int_ctx, soc, hal_ring_hdl);
  1647. }
  1648. static inline void
  1649. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1650. hal_ring_handle_t hal_ring_hdl)
  1651. {
  1652. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1653. }
  1654. #endif
  1655. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1656. /*
  1657. * dp_rx_wbm_sg_list_reset() - Initialize sg list
  1658. *
  1659. * This api should be called at soc init and afterevery sg processing.
  1660. *@soc: DP SOC handle
  1661. */
  1662. static inline void dp_rx_wbm_sg_list_reset(struct dp_soc *soc)
  1663. {
  1664. if (soc) {
  1665. soc->wbm_sg_param.wbm_is_first_msdu_in_sg = false;
  1666. soc->wbm_sg_param.wbm_sg_nbuf_head = NULL;
  1667. soc->wbm_sg_param.wbm_sg_nbuf_tail = NULL;
  1668. soc->wbm_sg_param.wbm_sg_desc_msdu_len = 0;
  1669. }
  1670. }
  1671. /*
  1672. * dp_rx_wbm_sg_list_deinit() - De-initialize sg list
  1673. *
  1674. * This api should be called in down path, to avoid any leak.
  1675. *@soc: DP SOC handle
  1676. */
  1677. static inline void dp_rx_wbm_sg_list_deinit(struct dp_soc *soc)
  1678. {
  1679. if (soc) {
  1680. if (soc->wbm_sg_param.wbm_sg_nbuf_head)
  1681. qdf_nbuf_list_free(soc->wbm_sg_param.wbm_sg_nbuf_head);
  1682. dp_rx_wbm_sg_list_reset(soc);
  1683. }
  1684. }
  1685. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1686. #ifdef WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL
  1687. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1688. do { \
  1689. if (!soc->rx_buff_pool[rx_desc->pool_id].is_initialized) { \
  1690. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf); \
  1691. break; \
  1692. } \
  1693. DP_RX_LIST_APPEND(ebuf_head, ebuf_tail, rx_desc->nbuf); \
  1694. if (!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)) { \
  1695. if (!dp_rx_buffer_pool_refill(soc, ebuf_head, \
  1696. rx_desc->pool_id)) \
  1697. DP_RX_MERGE_TWO_LIST(head, tail, \
  1698. ebuf_head, ebuf_tail);\
  1699. ebuf_head = NULL; \
  1700. ebuf_tail = NULL; \
  1701. } \
  1702. } while (0)
  1703. #else
  1704. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1705. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf)
  1706. #endif /* WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL */
  1707. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1708. /*
  1709. * dp_rx_link_desc_refill_duplicate_check() - check if link desc duplicate
  1710. to refill
  1711. * @soc: DP SOC handle
  1712. * @buf_info: the last link desc buf info
  1713. * @ring_buf_info: current buf address pointor including link desc
  1714. *
  1715. * return: none.
  1716. */
  1717. void dp_rx_link_desc_refill_duplicate_check(
  1718. struct dp_soc *soc,
  1719. struct hal_buf_info *buf_info,
  1720. hal_buff_addrinfo_t ring_buf_info);
  1721. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  1722. /**
  1723. * dp_rx_deliver_to_pkt_capture() - deliver rx packet to packet capture
  1724. * @soc : dp_soc handle
  1725. * @pdev: dp_pdev handle
  1726. * @peer_id: peer_id of the peer for which completion came
  1727. * @ppdu_id: ppdu_id
  1728. * @netbuf: Buffer pointer
  1729. *
  1730. * This function is used to deliver rx packet to packet capture
  1731. */
  1732. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  1733. uint16_t peer_id, uint32_t is_offload,
  1734. qdf_nbuf_t netbuf);
  1735. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1736. uint32_t is_offload);
  1737. #else
  1738. static inline void
  1739. dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  1740. uint16_t peer_id, uint32_t is_offload,
  1741. qdf_nbuf_t netbuf)
  1742. {
  1743. }
  1744. static inline void
  1745. dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1746. uint32_t is_offload)
  1747. {
  1748. }
  1749. #endif
  1750. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1751. #ifdef FEATURE_MEC
  1752. /**
  1753. * dp_rx_mcast_echo_check() - check if the mcast pkt is a loop
  1754. * back on same vap or a different vap.
  1755. * @soc: core DP main context
  1756. * @peer: dp peer handler
  1757. * @rx_tlv_hdr: start of the rx TLV header
  1758. * @nbuf: pkt buffer
  1759. *
  1760. * Return: bool (true if it is a looped back pkt else false)
  1761. *
  1762. */
  1763. bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  1764. struct dp_txrx_peer *peer,
  1765. uint8_t *rx_tlv_hdr,
  1766. qdf_nbuf_t nbuf);
  1767. #else
  1768. static inline bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  1769. struct dp_txrx_peer *peer,
  1770. uint8_t *rx_tlv_hdr,
  1771. qdf_nbuf_t nbuf)
  1772. {
  1773. return false;
  1774. }
  1775. #endif /* FEATURE_MEC */
  1776. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1777. #ifdef RECEIVE_OFFLOAD
  1778. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1779. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt);
  1780. #else
  1781. static inline
  1782. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1783. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1784. {
  1785. }
  1786. #endif
  1787. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1788. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer,
  1789. uint8_t ring_id,
  1790. struct cdp_tid_rx_stats *tid_stats);
  1791. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1792. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1793. hal_ring_handle_t hal_ring_hdl,
  1794. uint32_t num_entries,
  1795. bool *near_full);
  1796. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1797. void dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1798. hal_ring_desc_t ring_desc);
  1799. #else
  1800. static inline void
  1801. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1802. hal_ring_desc_t ring_desc)
  1803. {
  1804. }
  1805. #endif
  1806. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1807. #ifdef RX_DESC_SANITY_WAR
  1808. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  1809. hal_ring_handle_t hal_ring_hdl,
  1810. hal_ring_desc_t ring_desc,
  1811. struct dp_rx_desc *rx_desc);
  1812. #else
  1813. static inline
  1814. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  1815. hal_ring_handle_t hal_ring_hdl,
  1816. hal_ring_desc_t ring_desc,
  1817. struct dp_rx_desc *rx_desc)
  1818. {
  1819. return QDF_STATUS_SUCCESS;
  1820. }
  1821. #endif
  1822. #ifdef DP_RX_DROP_RAW_FRM
  1823. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf);
  1824. #else
  1825. static inline
  1826. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1827. {
  1828. return false;
  1829. }
  1830. #endif
  1831. #ifdef RX_DESC_DEBUG_CHECK
  1832. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1833. hal_ring_desc_t ring_desc,
  1834. struct dp_rx_desc *rx_desc);
  1835. #else
  1836. static inline
  1837. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1838. hal_ring_desc_t ring_desc,
  1839. struct dp_rx_desc *rx_desc)
  1840. {
  1841. return QDF_STATUS_SUCCESS;
  1842. }
  1843. #endif
  1844. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1845. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1846. #else
  1847. static inline
  1848. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1849. {
  1850. }
  1851. #endif
  1852. /**
  1853. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1854. * @nbuf: pointer to the first msdu of an amsdu.
  1855. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1856. *
  1857. * The ipsumed field of the skb is set based on whether HW validated the
  1858. * IP/TCP/UDP checksum.
  1859. *
  1860. * Return: void
  1861. */
  1862. static inline
  1863. void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1864. qdf_nbuf_t nbuf,
  1865. uint8_t *rx_tlv_hdr)
  1866. {
  1867. qdf_nbuf_rx_cksum_t cksum = {0};
  1868. //TODO - Move this to ring desc api
  1869. //HAL_RX_MSDU_DESC_IP_CHKSUM_FAIL_GET
  1870. //HAL_RX_MSDU_DESC_TCP_UDP_CHKSUM_FAIL_GET
  1871. uint32_t ip_csum_err, tcp_udp_csum_er;
  1872. hal_rx_tlv_csum_err_get(pdev->soc->hal_soc, rx_tlv_hdr, &ip_csum_err,
  1873. &tcp_udp_csum_er);
  1874. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1875. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1876. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1877. } else {
  1878. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1879. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1880. }
  1881. }
  1882. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1883. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1884. static inline
  1885. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  1886. int max_reap_limit)
  1887. {
  1888. bool limit_hit = false;
  1889. limit_hit =
  1890. (num_reaped >= max_reap_limit) ? true : false;
  1891. if (limit_hit)
  1892. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1893. return limit_hit;
  1894. }
  1895. static inline
  1896. bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1897. {
  1898. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1899. }
  1900. static inline int dp_rx_get_loop_pkt_limit(struct dp_soc *soc)
  1901. {
  1902. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1903. return cfg->rx_reap_loop_pkt_limit;
  1904. }
  1905. #else
  1906. static inline
  1907. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  1908. int max_reap_limit)
  1909. {
  1910. return false;
  1911. }
  1912. static inline
  1913. bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1914. {
  1915. return false;
  1916. }
  1917. static inline int dp_rx_get_loop_pkt_limit(struct dp_soc *soc)
  1918. {
  1919. return 0;
  1920. }
  1921. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1922. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1923. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1924. /**
  1925. * dp_rx_is_list_ready() - Make different lists for 4-address
  1926. and 3-address frames
  1927. * @nbuf_head: skb list head
  1928. * @vdev: vdev
  1929. * @txrx_peer : txrx_peer
  1930. * @peer_id: peer id of new received frame
  1931. * @vdev_id: vdev_id of new received frame
  1932. *
  1933. * Return: true if peer_ids are different.
  1934. */
  1935. static inline bool
  1936. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  1937. struct dp_vdev *vdev,
  1938. struct dp_txrx_peer *txrx_peer,
  1939. uint16_t peer_id,
  1940. uint8_t vdev_id)
  1941. {
  1942. if (nbuf_head && txrx_peer && txrx_peer->peer_id != peer_id)
  1943. return true;
  1944. return false;
  1945. }
  1946. #else
  1947. static inline bool
  1948. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  1949. struct dp_vdev *vdev,
  1950. struct dp_txrx_peer *txrx_peer,
  1951. uint16_t peer_id,
  1952. uint8_t vdev_id)
  1953. {
  1954. if (nbuf_head && vdev && (vdev->vdev_id != vdev_id))
  1955. return true;
  1956. return false;
  1957. }
  1958. #endif
  1959. #ifdef WLAN_FEATURE_MARK_FIRST_WAKEUP_PACKET
  1960. /**
  1961. * dp_rx_mark_first_packet_after_wow_wakeup - get first packet after wow wakeup
  1962. * @pdev: pointer to dp_pdev structure
  1963. * @rx_tlv: pointer to rx_pkt_tlvs structure
  1964. * @nbuf: pointer to skb buffer
  1965. *
  1966. * Return: None
  1967. */
  1968. void dp_rx_mark_first_packet_after_wow_wakeup(struct dp_pdev *pdev,
  1969. uint8_t *rx_tlv,
  1970. qdf_nbuf_t nbuf);
  1971. #else
  1972. static inline void
  1973. dp_rx_mark_first_packet_after_wow_wakeup(struct dp_pdev *pdev,
  1974. uint8_t *rx_tlv,
  1975. qdf_nbuf_t nbuf)
  1976. {
  1977. }
  1978. #endif
  1979. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  1980. static inline uint8_t
  1981. dp_rx_get_defrag_bm_id(struct dp_soc *soc)
  1982. {
  1983. return DP_DEFRAG_RBM(soc->wbm_sw0_bm_id);
  1984. }
  1985. static inline uint8_t
  1986. dp_rx_get_rx_bm_id(struct dp_soc *soc)
  1987. {
  1988. return DP_WBM2SW_RBM(soc->wbm_sw0_bm_id);
  1989. }
  1990. #else
  1991. static inline uint8_t
  1992. dp_rx_get_rx_bm_id(struct dp_soc *soc)
  1993. {
  1994. struct wlan_cfg_dp_soc_ctxt *cfg_ctx = soc->wlan_cfg_ctx;
  1995. uint8_t wbm2_sw_rx_rel_ring_id;
  1996. wbm2_sw_rx_rel_ring_id = wlan_cfg_get_rx_rel_ring_id(cfg_ctx);
  1997. return HAL_RX_BUF_RBM_SW_BM(soc->wbm_sw0_bm_id,
  1998. wbm2_sw_rx_rel_ring_id);
  1999. }
  2000. static inline uint8_t
  2001. dp_rx_get_defrag_bm_id(struct dp_soc *soc)
  2002. {
  2003. return dp_rx_get_rx_bm_id(soc);
  2004. }
  2005. #endif
  2006. static inline uint16_t
  2007. dp_rx_peer_metadata_peer_id_get(struct dp_soc *soc, uint32_t peer_metadata)
  2008. {
  2009. return soc->arch_ops.dp_rx_peer_metadata_peer_id_get(soc,
  2010. peer_metadata);
  2011. }
  2012. /**
  2013. * dp_rx_desc_pool_init_generic() - Generic Rx descriptors initialization
  2014. * @soc: SOC handle
  2015. * @rx_desc_pool: pointer to RX descriptor pool
  2016. * @pool_id: pool ID
  2017. *
  2018. * Return: None
  2019. */
  2020. QDF_STATUS dp_rx_desc_pool_init_generic(struct dp_soc *soc,
  2021. struct rx_desc_pool *rx_desc_pool,
  2022. uint32_t pool_id);
  2023. void dp_rx_desc_pool_deinit_generic(struct dp_soc *soc,
  2024. struct rx_desc_pool *rx_desc_pool,
  2025. uint32_t pool_id);
  2026. /**
  2027. * dp_rx_pkt_tracepoints_enabled() - Get the state of rx pkt tracepoint
  2028. *
  2029. * Return: True if any rx pkt tracepoint is enabled else false
  2030. */
  2031. static inline
  2032. bool dp_rx_pkt_tracepoints_enabled(void)
  2033. {
  2034. return (qdf_trace_dp_rx_tcp_pkt_enabled() ||
  2035. qdf_trace_dp_rx_udp_pkt_enabled() ||
  2036. qdf_trace_dp_rx_pkt_enabled());
  2037. }
  2038. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  2039. static inline
  2040. QDF_STATUS dp_pdev_rx_buffers_attach_simple(struct dp_soc *soc, uint32_t mac_id,
  2041. struct dp_srng *rxdma_srng,
  2042. struct rx_desc_pool *rx_desc_pool,
  2043. uint32_t num_req_buffers)
  2044. {
  2045. return __dp_pdev_rx_buffers_no_map_attach(soc, mac_id,
  2046. rxdma_srng,
  2047. rx_desc_pool,
  2048. num_req_buffers);
  2049. }
  2050. static inline
  2051. void dp_rx_buffers_replenish_simple(struct dp_soc *soc, uint32_t mac_id,
  2052. struct dp_srng *rxdma_srng,
  2053. struct rx_desc_pool *rx_desc_pool,
  2054. uint32_t num_req_buffers,
  2055. union dp_rx_desc_list_elem_t **desc_list,
  2056. union dp_rx_desc_list_elem_t **tail)
  2057. {
  2058. __dp_rx_buffers_no_map_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  2059. num_req_buffers, desc_list, tail);
  2060. }
  2061. static inline
  2062. void dp_rx_buffers_lt_replenish_simple(struct dp_soc *soc, uint32_t mac_id,
  2063. struct dp_srng *rxdma_srng,
  2064. struct rx_desc_pool *rx_desc_pool,
  2065. uint32_t num_req_buffers,
  2066. union dp_rx_desc_list_elem_t **desc_list,
  2067. union dp_rx_desc_list_elem_t **tail)
  2068. {
  2069. __dp_rx_buffers_no_map_lt_replenish(soc, mac_id, rxdma_srng,
  2070. rx_desc_pool);
  2071. }
  2072. static inline
  2073. qdf_dma_addr_t dp_rx_nbuf_sync_no_dsb(struct dp_soc *dp_soc,
  2074. qdf_nbuf_t nbuf,
  2075. uint32_t buf_size)
  2076. {
  2077. qdf_nbuf_dma_inv_range_no_dsb((void *)nbuf->data,
  2078. (void *)(nbuf->data + buf_size));
  2079. return (qdf_dma_addr_t)qdf_mem_virt_to_phys(nbuf->data);
  2080. }
  2081. static inline
  2082. qdf_dma_addr_t dp_rx_nbuf_sync(struct dp_soc *dp_soc,
  2083. qdf_nbuf_t nbuf,
  2084. uint32_t buf_size)
  2085. {
  2086. qdf_nbuf_dma_inv_range((void *)nbuf->data,
  2087. (void *)(nbuf->data + buf_size));
  2088. return (qdf_dma_addr_t)qdf_mem_virt_to_phys(nbuf->data);
  2089. }
  2090. #if !defined(SPECULATIVE_READ_DISABLED)
  2091. static inline
  2092. void dp_rx_nbuf_unmap(struct dp_soc *soc,
  2093. struct dp_rx_desc *rx_desc,
  2094. uint8_t reo_ring_num)
  2095. {
  2096. struct rx_desc_pool *rx_desc_pool;
  2097. qdf_nbuf_t nbuf;
  2098. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2099. nbuf = rx_desc->nbuf;
  2100. qdf_nbuf_dma_inv_range((void *)nbuf->data,
  2101. (void *)(nbuf->data + rx_desc_pool->buf_size));
  2102. }
  2103. static inline
  2104. void dp_rx_nbuf_unmap_pool(struct dp_soc *soc,
  2105. struct rx_desc_pool *rx_desc_pool,
  2106. qdf_nbuf_t nbuf)
  2107. {
  2108. qdf_nbuf_dma_inv_range((void *)nbuf->data,
  2109. (void *)(nbuf->data + rx_desc_pool->buf_size));
  2110. }
  2111. #else
  2112. static inline
  2113. void dp_rx_nbuf_unmap(struct dp_soc *soc,
  2114. struct dp_rx_desc *rx_desc,
  2115. uint8_t reo_ring_num)
  2116. {
  2117. }
  2118. static inline
  2119. void dp_rx_nbuf_unmap_pool(struct dp_soc *soc,
  2120. struct rx_desc_pool *rx_desc_pool,
  2121. qdf_nbuf_t nbuf)
  2122. {
  2123. }
  2124. #endif
  2125. static inline
  2126. void dp_rx_per_core_stats_update(struct dp_soc *soc, uint8_t ring_id,
  2127. uint32_t bufs_reaped)
  2128. {
  2129. }
  2130. static inline
  2131. qdf_nbuf_t dp_rx_nbuf_alloc(struct dp_soc *soc,
  2132. struct rx_desc_pool *rx_desc_pool)
  2133. {
  2134. return qdf_nbuf_alloc_simple(soc->osdev, rx_desc_pool->buf_size,
  2135. RX_BUFFER_RESERVATION,
  2136. rx_desc_pool->buf_alignment, FALSE);
  2137. }
  2138. static inline
  2139. void dp_rx_nbuf_free(qdf_nbuf_t nbuf)
  2140. {
  2141. qdf_nbuf_free_simple(nbuf);
  2142. }
  2143. #else
  2144. static inline
  2145. QDF_STATUS dp_pdev_rx_buffers_attach_simple(struct dp_soc *soc, uint32_t mac_id,
  2146. struct dp_srng *rxdma_srng,
  2147. struct rx_desc_pool *rx_desc_pool,
  2148. uint32_t num_req_buffers)
  2149. {
  2150. return dp_pdev_rx_buffers_attach(soc, mac_id,
  2151. rxdma_srng,
  2152. rx_desc_pool,
  2153. num_req_buffers);
  2154. }
  2155. static inline
  2156. void dp_rx_buffers_replenish_simple(struct dp_soc *soc, uint32_t mac_id,
  2157. struct dp_srng *rxdma_srng,
  2158. struct rx_desc_pool *rx_desc_pool,
  2159. uint32_t num_req_buffers,
  2160. union dp_rx_desc_list_elem_t **desc_list,
  2161. union dp_rx_desc_list_elem_t **tail)
  2162. {
  2163. dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  2164. num_req_buffers, desc_list, tail);
  2165. }
  2166. static inline
  2167. void dp_rx_buffers_lt_replenish_simple(struct dp_soc *soc, uint32_t mac_id,
  2168. struct dp_srng *rxdma_srng,
  2169. struct rx_desc_pool *rx_desc_pool,
  2170. uint32_t num_req_buffers,
  2171. union dp_rx_desc_list_elem_t **desc_list,
  2172. union dp_rx_desc_list_elem_t **tail)
  2173. {
  2174. dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  2175. num_req_buffers, desc_list, tail);
  2176. }
  2177. static inline
  2178. qdf_dma_addr_t dp_rx_nbuf_sync_no_dsb(struct dp_soc *dp_soc,
  2179. qdf_nbuf_t nbuf,
  2180. uint32_t buf_size)
  2181. {
  2182. return (qdf_dma_addr_t)NULL;
  2183. }
  2184. static inline
  2185. qdf_dma_addr_t dp_rx_nbuf_sync(struct dp_soc *dp_soc,
  2186. qdf_nbuf_t nbuf,
  2187. uint32_t buf_size)
  2188. {
  2189. return (qdf_dma_addr_t)NULL;
  2190. }
  2191. static inline
  2192. void dp_rx_nbuf_unmap(struct dp_soc *soc,
  2193. struct dp_rx_desc *rx_desc,
  2194. uint8_t reo_ring_num)
  2195. {
  2196. struct rx_desc_pool *rx_desc_pool;
  2197. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2198. dp_ipa_reo_ctx_buf_mapping_lock(soc, reo_ring_num);
  2199. dp_ipa_handle_rx_buf_smmu_mapping(soc, rx_desc->nbuf,
  2200. rx_desc_pool->buf_size,
  2201. false);
  2202. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  2203. QDF_DMA_FROM_DEVICE,
  2204. rx_desc_pool->buf_size);
  2205. dp_ipa_reo_ctx_buf_mapping_unlock(soc, reo_ring_num);
  2206. }
  2207. static inline
  2208. void dp_rx_nbuf_unmap_pool(struct dp_soc *soc,
  2209. struct rx_desc_pool *rx_desc_pool,
  2210. qdf_nbuf_t nbuf)
  2211. {
  2212. dp_ipa_handle_rx_buf_smmu_mapping(soc, nbuf, rx_desc_pool->buf_size,
  2213. false);
  2214. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf, QDF_DMA_FROM_DEVICE,
  2215. rx_desc_pool->buf_size);
  2216. }
  2217. static inline
  2218. void dp_rx_per_core_stats_update(struct dp_soc *soc, uint8_t ring_id,
  2219. uint32_t bufs_reaped)
  2220. {
  2221. int cpu_id = qdf_get_cpu();
  2222. DP_STATS_INC(soc, rx.ring_packets[cpu_id][ring_id], bufs_reaped);
  2223. }
  2224. static inline
  2225. qdf_nbuf_t dp_rx_nbuf_alloc(struct dp_soc *soc,
  2226. struct rx_desc_pool *rx_desc_pool)
  2227. {
  2228. return qdf_nbuf_alloc(soc->osdev, rx_desc_pool->buf_size,
  2229. RX_BUFFER_RESERVATION,
  2230. rx_desc_pool->buf_alignment, FALSE);
  2231. }
  2232. static inline
  2233. void dp_rx_nbuf_free(qdf_nbuf_t nbuf)
  2234. {
  2235. qdf_nbuf_free(nbuf);
  2236. }
  2237. #endif
  2238. /**
  2239. * dp_rx_get_txrx_peer_and_vdev() - Get txrx peer and vdev from peer id
  2240. * @nbuf : pointer to the first msdu of an amsdu.
  2241. * @peer_id : Peer id of the peer
  2242. * @txrx_ref_handle : Buffer to save the handle for txrx peer's reference
  2243. * @pkt_capture_offload : Flag indicating if pkt capture offload is needed
  2244. * @vdev : Buffer to hold pointer to vdev
  2245. * @rx_pdev : Buffer to hold pointer to rx pdev
  2246. * @dsf : delay stats flag
  2247. * @old_tid : Old tid
  2248. *
  2249. * Get txrx peer and vdev from peer id
  2250. *
  2251. * Return: Pointer to txrx peer
  2252. */
  2253. static inline struct dp_txrx_peer *
  2254. dp_rx_get_txrx_peer_and_vdev(struct dp_soc *soc,
  2255. qdf_nbuf_t nbuf,
  2256. uint16_t peer_id,
  2257. dp_txrx_ref_handle *txrx_ref_handle,
  2258. bool pkt_capture_offload,
  2259. struct dp_vdev **vdev,
  2260. struct dp_pdev **rx_pdev,
  2261. uint32_t *dsf,
  2262. uint32_t *old_tid)
  2263. {
  2264. struct dp_txrx_peer *txrx_peer = NULL;
  2265. txrx_peer = dp_txrx_peer_get_ref_by_id(soc, peer_id, txrx_ref_handle,
  2266. DP_MOD_ID_RX);
  2267. if (qdf_likely(txrx_peer)) {
  2268. *vdev = txrx_peer->vdev;
  2269. } else {
  2270. nbuf->next = NULL;
  2271. dp_rx_deliver_to_pkt_capture_no_peer(soc, nbuf,
  2272. pkt_capture_offload);
  2273. if (!pkt_capture_offload)
  2274. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2275. goto end;
  2276. }
  2277. if (qdf_unlikely(!(*vdev))) {
  2278. qdf_nbuf_free(nbuf);
  2279. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  2280. goto end;
  2281. }
  2282. *rx_pdev = (*vdev)->pdev;
  2283. *dsf = (*rx_pdev)->delay_stats_flag;
  2284. *old_tid = 0xff;
  2285. end:
  2286. return txrx_peer;
  2287. }
  2288. static inline QDF_STATUS
  2289. dp_peer_rx_reorder_queue_setup(struct dp_soc *soc, struct dp_peer *peer,
  2290. int tid, uint32_t ba_window_size)
  2291. {
  2292. return soc->arch_ops.dp_peer_rx_reorder_queue_setup(soc,
  2293. peer, tid,
  2294. ba_window_size);
  2295. }
  2296. #endif /* _DP_RX_H */