dsi_panel.c 108 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dsc_helper.h"
  15. #include "sde_vdc_helper.h"
  16. /**
  17. * topology is currently defined by a set of following 3 values:
  18. * 1. num of layer mixers
  19. * 2. num of compression encoders
  20. * 3. num of interfaces
  21. */
  22. #define TOPOLOGY_SET_LEN 3
  23. #define MAX_TOPOLOGY 5
  24. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  25. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  26. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  27. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  28. #define MAX_PANEL_JITTER 10
  29. #define DEFAULT_PANEL_PREFILL_LINES 25
  30. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  31. #define MIN_PREFILL_LINES 35
  32. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  33. {
  34. char *bp;
  35. bp = buf;
  36. /* First 7 bytes are cmd header */
  37. *bp++ = 0x0A;
  38. *bp++ = 1;
  39. *bp++ = 0;
  40. *bp++ = 0;
  41. *bp++ = pps_delay_ms;
  42. *bp++ = 0;
  43. *bp++ = 128;
  44. }
  45. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  46. char *buf, int pps_id, u32 size)
  47. {
  48. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  49. buf += DSI_CMD_PPS_HDR_SIZE;
  50. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  51. size);
  52. }
  53. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  54. char *buf, int pps_id, u32 size)
  55. {
  56. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  57. buf += DSI_CMD_PPS_HDR_SIZE;
  58. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  59. size);
  60. }
  61. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  62. {
  63. int rc = 0;
  64. int i;
  65. struct regulator *vreg = NULL;
  66. for (i = 0; i < panel->power_info.count; i++) {
  67. vreg = devm_regulator_get(panel->parent,
  68. panel->power_info.vregs[i].vreg_name);
  69. rc = PTR_RET(vreg);
  70. if (rc) {
  71. DSI_ERR("failed to get %s regulator\n",
  72. panel->power_info.vregs[i].vreg_name);
  73. goto error_put;
  74. }
  75. panel->power_info.vregs[i].vreg = vreg;
  76. }
  77. return rc;
  78. error_put:
  79. for (i = i - 1; i >= 0; i--) {
  80. devm_regulator_put(panel->power_info.vregs[i].vreg);
  81. panel->power_info.vregs[i].vreg = NULL;
  82. }
  83. return rc;
  84. }
  85. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  86. {
  87. int rc = 0;
  88. int i;
  89. for (i = panel->power_info.count - 1; i >= 0; i--)
  90. devm_regulator_put(panel->power_info.vregs[i].vreg);
  91. return rc;
  92. }
  93. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  94. {
  95. int rc = 0;
  96. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  97. if (gpio_is_valid(r_config->reset_gpio)) {
  98. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  99. if (rc) {
  100. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  101. goto error;
  102. }
  103. }
  104. if (gpio_is_valid(r_config->disp_en_gpio)) {
  105. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  106. if (rc) {
  107. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  108. goto error_release_reset;
  109. }
  110. }
  111. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  112. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  113. if (rc) {
  114. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  115. goto error_release_disp_en;
  116. }
  117. }
  118. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  119. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  120. if (rc) {
  121. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  122. goto error_release_mode_sel;
  123. }
  124. }
  125. if (gpio_is_valid(panel->panel_test_gpio)) {
  126. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  127. if (rc) {
  128. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  129. rc);
  130. panel->panel_test_gpio = -1;
  131. rc = 0;
  132. }
  133. }
  134. goto error;
  135. error_release_mode_sel:
  136. if (gpio_is_valid(panel->bl_config.en_gpio))
  137. gpio_free(panel->bl_config.en_gpio);
  138. error_release_disp_en:
  139. if (gpio_is_valid(r_config->disp_en_gpio))
  140. gpio_free(r_config->disp_en_gpio);
  141. error_release_reset:
  142. if (gpio_is_valid(r_config->reset_gpio))
  143. gpio_free(r_config->reset_gpio);
  144. error:
  145. return rc;
  146. }
  147. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  148. {
  149. int rc = 0;
  150. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  151. if (gpio_is_valid(r_config->reset_gpio))
  152. gpio_free(r_config->reset_gpio);
  153. if (gpio_is_valid(r_config->disp_en_gpio))
  154. gpio_free(r_config->disp_en_gpio);
  155. if (gpio_is_valid(panel->bl_config.en_gpio))
  156. gpio_free(panel->bl_config.en_gpio);
  157. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  158. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  159. if (gpio_is_valid(panel->panel_test_gpio))
  160. gpio_free(panel->panel_test_gpio);
  161. return rc;
  162. }
  163. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  164. {
  165. struct dsi_panel_reset_config *r_config;
  166. if (!panel) {
  167. DSI_ERR("Invalid panel param\n");
  168. return -EINVAL;
  169. }
  170. r_config = &panel->reset_config;
  171. if (!r_config) {
  172. DSI_ERR("Invalid panel reset configuration\n");
  173. return -EINVAL;
  174. }
  175. if (gpio_is_valid(r_config->reset_gpio)) {
  176. gpio_set_value(r_config->reset_gpio, 0);
  177. DSI_INFO("GPIO pulled low to simulate ESD\n");
  178. return 0;
  179. }
  180. DSI_ERR("failed to pull down gpio\n");
  181. return -EINVAL;
  182. }
  183. static int dsi_panel_reset(struct dsi_panel *panel)
  184. {
  185. int rc = 0;
  186. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  187. int i;
  188. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  189. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  190. if (rc) {
  191. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  192. goto exit;
  193. }
  194. }
  195. if (r_config->count) {
  196. rc = gpio_direction_output(r_config->reset_gpio,
  197. r_config->sequence[0].level);
  198. if (rc) {
  199. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  200. goto exit;
  201. }
  202. }
  203. for (i = 0; i < r_config->count; i++) {
  204. gpio_set_value(r_config->reset_gpio,
  205. r_config->sequence[i].level);
  206. if (r_config->sequence[i].sleep_ms)
  207. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  208. (r_config->sequence[i].sleep_ms * 1000) + 100);
  209. }
  210. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  211. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  212. if (rc)
  213. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  214. }
  215. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  216. bool out = true;
  217. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  218. || (panel->reset_config.mode_sel_state
  219. == MODE_GPIO_LOW))
  220. out = false;
  221. else if ((panel->reset_config.mode_sel_state
  222. == MODE_SEL_SINGLE_PORT) ||
  223. (panel->reset_config.mode_sel_state
  224. == MODE_GPIO_HIGH))
  225. out = true;
  226. rc = gpio_direction_output(
  227. panel->reset_config.lcd_mode_sel_gpio, out);
  228. if (rc)
  229. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  230. }
  231. if (gpio_is_valid(panel->panel_test_gpio)) {
  232. rc = gpio_direction_input(panel->panel_test_gpio);
  233. if (rc)
  234. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  235. rc);
  236. }
  237. exit:
  238. return rc;
  239. }
  240. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  241. {
  242. int rc = 0;
  243. struct pinctrl_state *state;
  244. if (panel->host_config.ext_bridge_mode)
  245. return 0;
  246. if (enable)
  247. state = panel->pinctrl.active;
  248. else
  249. state = panel->pinctrl.suspend;
  250. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  251. if (rc)
  252. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  253. panel->name, rc);
  254. return rc;
  255. }
  256. static int dsi_panel_power_on(struct dsi_panel *panel)
  257. {
  258. int rc = 0;
  259. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  260. if (rc) {
  261. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  262. panel->name, rc);
  263. goto exit;
  264. }
  265. rc = dsi_panel_set_pinctrl_state(panel, true);
  266. if (rc) {
  267. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  268. goto error_disable_vregs;
  269. }
  270. rc = dsi_panel_reset(panel);
  271. if (rc) {
  272. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  273. goto error_disable_gpio;
  274. }
  275. goto exit;
  276. error_disable_gpio:
  277. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  278. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  279. if (gpio_is_valid(panel->bl_config.en_gpio))
  280. gpio_set_value(panel->bl_config.en_gpio, 0);
  281. (void)dsi_panel_set_pinctrl_state(panel, false);
  282. error_disable_vregs:
  283. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  284. exit:
  285. return rc;
  286. }
  287. static int dsi_panel_power_off(struct dsi_panel *panel)
  288. {
  289. int rc = 0;
  290. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  291. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  292. if (gpio_is_valid(panel->reset_config.reset_gpio))
  293. gpio_set_value(panel->reset_config.reset_gpio, 0);
  294. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  295. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  296. if (gpio_is_valid(panel->panel_test_gpio)) {
  297. rc = gpio_direction_input(panel->panel_test_gpio);
  298. if (rc)
  299. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  300. rc);
  301. }
  302. rc = dsi_panel_set_pinctrl_state(panel, false);
  303. if (rc) {
  304. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  305. rc);
  306. }
  307. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  308. if (rc)
  309. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  310. panel->name, rc);
  311. return rc;
  312. }
  313. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  314. enum dsi_cmd_set_type type)
  315. {
  316. int rc = 0, i = 0;
  317. ssize_t len;
  318. struct dsi_cmd_desc *cmds;
  319. u32 count;
  320. enum dsi_cmd_set_state state;
  321. struct dsi_display_mode *mode;
  322. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  323. if (!panel || !panel->cur_mode)
  324. return -EINVAL;
  325. mode = panel->cur_mode;
  326. cmds = mode->priv_info->cmd_sets[type].cmds;
  327. count = mode->priv_info->cmd_sets[type].count;
  328. state = mode->priv_info->cmd_sets[type].state;
  329. if (count == 0) {
  330. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  331. panel->name, type);
  332. goto error;
  333. }
  334. for (i = 0; i < count; i++) {
  335. if (state == DSI_CMD_SET_STATE_LP)
  336. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  337. if (cmds->last_command)
  338. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  339. if (type == DSI_CMD_SET_VID_TO_CMD_SWITCH)
  340. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  341. len = ops->transfer(panel->host, &cmds->msg);
  342. if (len < 0) {
  343. rc = len;
  344. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  345. goto error;
  346. }
  347. if (cmds->post_wait_ms)
  348. usleep_range(cmds->post_wait_ms*1000,
  349. ((cmds->post_wait_ms*1000)+10));
  350. cmds++;
  351. }
  352. error:
  353. return rc;
  354. }
  355. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  356. {
  357. int rc = 0;
  358. if (panel->host_config.ext_bridge_mode)
  359. return 0;
  360. devm_pinctrl_put(panel->pinctrl.pinctrl);
  361. return rc;
  362. }
  363. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  364. {
  365. int rc = 0;
  366. if (panel->host_config.ext_bridge_mode)
  367. return 0;
  368. /* TODO: pinctrl is defined in dsi dt node */
  369. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  370. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  371. rc = PTR_ERR(panel->pinctrl.pinctrl);
  372. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  373. goto error;
  374. }
  375. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  376. "panel_active");
  377. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  378. rc = PTR_ERR(panel->pinctrl.active);
  379. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  380. goto error;
  381. }
  382. panel->pinctrl.suspend =
  383. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  384. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  385. rc = PTR_ERR(panel->pinctrl.suspend);
  386. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  387. goto error;
  388. }
  389. error:
  390. return rc;
  391. }
  392. static int dsi_panel_wled_register(struct dsi_panel *panel,
  393. struct dsi_backlight_config *bl)
  394. {
  395. struct backlight_device *bd;
  396. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  397. if (!bd) {
  398. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  399. panel->name, -EPROBE_DEFER);
  400. return -EPROBE_DEFER;
  401. }
  402. bl->raw_bd = bd;
  403. return 0;
  404. }
  405. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  406. u32 bl_lvl)
  407. {
  408. int rc = 0;
  409. struct mipi_dsi_device *dsi;
  410. if (!panel || (bl_lvl > 0xffff)) {
  411. DSI_ERR("invalid params\n");
  412. return -EINVAL;
  413. }
  414. dsi = &panel->mipi_device;
  415. if (panel->bl_config.bl_inverted_dbv)
  416. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  417. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  418. if (rc < 0)
  419. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  420. return rc;
  421. }
  422. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  423. u32 bl_lvl)
  424. {
  425. int rc = 0;
  426. u32 duty = 0;
  427. u32 period_ns = 0;
  428. struct dsi_backlight_config *bl;
  429. if (!panel) {
  430. DSI_ERR("Invalid Params\n");
  431. return -EINVAL;
  432. }
  433. bl = &panel->bl_config;
  434. if (!bl->pwm_bl) {
  435. DSI_ERR("pwm device not found\n");
  436. return -EINVAL;
  437. }
  438. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  439. duty = bl_lvl * period_ns;
  440. duty /= bl->bl_max_level;
  441. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  442. if (rc) {
  443. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  444. rc);
  445. goto error;
  446. }
  447. if (bl_lvl == 0 && bl->pwm_enabled) {
  448. pwm_disable(bl->pwm_bl);
  449. bl->pwm_enabled = false;
  450. return 0;
  451. }
  452. if (!bl->pwm_enabled) {
  453. rc = pwm_enable(bl->pwm_bl);
  454. if (rc) {
  455. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  456. rc);
  457. goto error;
  458. }
  459. bl->pwm_enabled = true;
  460. }
  461. error:
  462. return rc;
  463. }
  464. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  465. {
  466. int rc = 0;
  467. struct dsi_backlight_config *bl = &panel->bl_config;
  468. if (panel->host_config.ext_bridge_mode)
  469. return 0;
  470. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  471. switch (bl->type) {
  472. case DSI_BACKLIGHT_WLED:
  473. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  474. break;
  475. case DSI_BACKLIGHT_DCS:
  476. rc = dsi_panel_update_backlight(panel, bl_lvl);
  477. break;
  478. case DSI_BACKLIGHT_EXTERNAL:
  479. break;
  480. case DSI_BACKLIGHT_PWM:
  481. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  482. break;
  483. default:
  484. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  485. rc = -ENOTSUPP;
  486. }
  487. return rc;
  488. }
  489. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  490. {
  491. u32 cur_bl_level;
  492. struct backlight_device *bd = bl->raw_bd;
  493. /* default the brightness level to 50% */
  494. cur_bl_level = bl->bl_max_level >> 1;
  495. switch (bl->type) {
  496. case DSI_BACKLIGHT_WLED:
  497. /* Try to query the backlight level from the backlight device */
  498. if (bd->ops && bd->ops->get_brightness)
  499. cur_bl_level = bd->ops->get_brightness(bd);
  500. break;
  501. case DSI_BACKLIGHT_DCS:
  502. case DSI_BACKLIGHT_EXTERNAL:
  503. case DSI_BACKLIGHT_PWM:
  504. default:
  505. /*
  506. * Ideally, we should read the backlight level from the
  507. * panel. For now, just set it default value.
  508. */
  509. break;
  510. }
  511. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  512. return cur_bl_level;
  513. }
  514. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  515. {
  516. struct dsi_backlight_config *bl = &panel->bl_config;
  517. bl->bl_level = dsi_panel_get_brightness(bl);
  518. }
  519. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  520. {
  521. int rc = 0;
  522. struct dsi_backlight_config *bl = &panel->bl_config;
  523. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  524. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  525. rc = PTR_ERR(bl->pwm_bl);
  526. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  527. rc);
  528. return rc;
  529. }
  530. return 0;
  531. }
  532. static int dsi_panel_bl_register(struct dsi_panel *panel)
  533. {
  534. int rc = 0;
  535. struct dsi_backlight_config *bl = &panel->bl_config;
  536. if (panel->host_config.ext_bridge_mode)
  537. return 0;
  538. switch (bl->type) {
  539. case DSI_BACKLIGHT_WLED:
  540. rc = dsi_panel_wled_register(panel, bl);
  541. break;
  542. case DSI_BACKLIGHT_DCS:
  543. break;
  544. case DSI_BACKLIGHT_EXTERNAL:
  545. break;
  546. case DSI_BACKLIGHT_PWM:
  547. rc = dsi_panel_pwm_register(panel);
  548. break;
  549. default:
  550. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  551. rc = -ENOTSUPP;
  552. goto error;
  553. }
  554. error:
  555. return rc;
  556. }
  557. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  558. {
  559. struct dsi_backlight_config *bl = &panel->bl_config;
  560. devm_pwm_put(panel->parent, bl->pwm_bl);
  561. }
  562. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  563. {
  564. int rc = 0;
  565. struct dsi_backlight_config *bl = &panel->bl_config;
  566. if (panel->host_config.ext_bridge_mode)
  567. return 0;
  568. switch (bl->type) {
  569. case DSI_BACKLIGHT_WLED:
  570. break;
  571. case DSI_BACKLIGHT_DCS:
  572. break;
  573. case DSI_BACKLIGHT_EXTERNAL:
  574. break;
  575. case DSI_BACKLIGHT_PWM:
  576. dsi_panel_pwm_unregister(panel);
  577. break;
  578. default:
  579. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  580. rc = -ENOTSUPP;
  581. goto error;
  582. }
  583. error:
  584. return rc;
  585. }
  586. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  587. struct dsi_parser_utils *utils)
  588. {
  589. int rc = 0;
  590. u64 tmp64 = 0;
  591. struct dsi_display_mode *display_mode;
  592. struct dsi_display_mode_priv_info *priv_info;
  593. display_mode = container_of(mode, struct dsi_display_mode, timing);
  594. priv_info = display_mode->priv_info;
  595. rc = utils->read_u64(utils->data,
  596. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  597. if (rc == -EOVERFLOW) {
  598. tmp64 = 0;
  599. rc = utils->read_u32(utils->data,
  600. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  601. }
  602. mode->clk_rate_hz = !rc ? tmp64 : 0;
  603. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  604. mode->pclk_scale.numer = 1;
  605. mode->pclk_scale.denom = 1;
  606. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  607. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  608. &mode->mdp_transfer_time_us);
  609. if (!rc)
  610. display_mode->priv_info->mdp_transfer_time_us =
  611. mode->mdp_transfer_time_us;
  612. else
  613. display_mode->priv_info->mdp_transfer_time_us = 0;
  614. rc = utils->read_u32(utils->data,
  615. "qcom,mdss-dsi-panel-framerate",
  616. &mode->refresh_rate);
  617. if (rc) {
  618. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  619. rc);
  620. goto error;
  621. }
  622. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  623. &mode->h_active);
  624. if (rc) {
  625. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  626. rc);
  627. goto error;
  628. }
  629. rc = utils->read_u32(utils->data,
  630. "qcom,mdss-dsi-h-front-porch",
  631. &mode->h_front_porch);
  632. if (rc) {
  633. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  634. rc);
  635. goto error;
  636. }
  637. rc = utils->read_u32(utils->data,
  638. "qcom,mdss-dsi-h-back-porch",
  639. &mode->h_back_porch);
  640. if (rc) {
  641. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  642. rc);
  643. goto error;
  644. }
  645. rc = utils->read_u32(utils->data,
  646. "qcom,mdss-dsi-h-pulse-width",
  647. &mode->h_sync_width);
  648. if (rc) {
  649. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  650. rc);
  651. goto error;
  652. }
  653. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  654. &mode->h_skew);
  655. if (rc)
  656. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  657. rc);
  658. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  659. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  660. mode->h_sync_width);
  661. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  662. &mode->v_active);
  663. if (rc) {
  664. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  665. rc);
  666. goto error;
  667. }
  668. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  669. &mode->v_back_porch);
  670. if (rc) {
  671. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  672. rc);
  673. goto error;
  674. }
  675. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  676. &mode->v_front_porch);
  677. if (rc) {
  678. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  679. rc);
  680. goto error;
  681. }
  682. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  683. &mode->v_sync_width);
  684. if (rc) {
  685. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  686. rc);
  687. goto error;
  688. }
  689. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  690. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  691. mode->v_sync_width);
  692. error:
  693. return rc;
  694. }
  695. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  696. struct dsi_parser_utils *utils,
  697. const char *name)
  698. {
  699. int rc = 0;
  700. u32 bpp = 0;
  701. enum dsi_pixel_format fmt;
  702. const char *packing;
  703. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  704. if (rc) {
  705. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  706. name, rc);
  707. return rc;
  708. }
  709. host->bpp = bpp;
  710. switch (bpp) {
  711. case 3:
  712. fmt = DSI_PIXEL_FORMAT_RGB111;
  713. break;
  714. case 8:
  715. fmt = DSI_PIXEL_FORMAT_RGB332;
  716. break;
  717. case 12:
  718. fmt = DSI_PIXEL_FORMAT_RGB444;
  719. break;
  720. case 16:
  721. fmt = DSI_PIXEL_FORMAT_RGB565;
  722. break;
  723. case 18:
  724. fmt = DSI_PIXEL_FORMAT_RGB666;
  725. break;
  726. case 24:
  727. default:
  728. fmt = DSI_PIXEL_FORMAT_RGB888;
  729. break;
  730. }
  731. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  732. packing = utils->get_property(utils->data,
  733. "qcom,mdss-dsi-pixel-packing",
  734. NULL);
  735. if (packing && !strcmp(packing, "loose"))
  736. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  737. }
  738. host->dst_format = fmt;
  739. return rc;
  740. }
  741. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  742. struct dsi_parser_utils *utils,
  743. const char *name)
  744. {
  745. int rc = 0;
  746. bool lane_enabled;
  747. u32 num_of_lanes = 0;
  748. lane_enabled = utils->read_bool(utils->data,
  749. "qcom,mdss-dsi-lane-0-state");
  750. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  751. lane_enabled = utils->read_bool(utils->data,
  752. "qcom,mdss-dsi-lane-1-state");
  753. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  754. lane_enabled = utils->read_bool(utils->data,
  755. "qcom,mdss-dsi-lane-2-state");
  756. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  757. lane_enabled = utils->read_bool(utils->data,
  758. "qcom,mdss-dsi-lane-3-state");
  759. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  760. if (host->data_lanes & DSI_DATA_LANE_0)
  761. num_of_lanes++;
  762. if (host->data_lanes & DSI_DATA_LANE_1)
  763. num_of_lanes++;
  764. if (host->data_lanes & DSI_DATA_LANE_2)
  765. num_of_lanes++;
  766. if (host->data_lanes & DSI_DATA_LANE_3)
  767. num_of_lanes++;
  768. host->num_data_lanes = num_of_lanes;
  769. if (host->data_lanes == 0) {
  770. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  771. rc = -EINVAL;
  772. }
  773. return rc;
  774. }
  775. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  776. struct dsi_parser_utils *utils,
  777. const char *name)
  778. {
  779. int rc = 0;
  780. const char *swap_mode;
  781. swap_mode = utils->get_property(utils->data,
  782. "qcom,mdss-dsi-color-order", NULL);
  783. if (swap_mode) {
  784. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  785. host->swap_mode = DSI_COLOR_SWAP_RGB;
  786. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  787. host->swap_mode = DSI_COLOR_SWAP_RBG;
  788. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  789. host->swap_mode = DSI_COLOR_SWAP_BRG;
  790. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  791. host->swap_mode = DSI_COLOR_SWAP_GRB;
  792. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  793. host->swap_mode = DSI_COLOR_SWAP_GBR;
  794. } else {
  795. DSI_ERR("[%s] Unrecognized color order-%s\n",
  796. name, swap_mode);
  797. rc = -EINVAL;
  798. }
  799. } else {
  800. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  801. host->swap_mode = DSI_COLOR_SWAP_RGB;
  802. }
  803. /* bit swap on color channel is not defined in dt */
  804. host->bit_swap_red = false;
  805. host->bit_swap_green = false;
  806. host->bit_swap_blue = false;
  807. return rc;
  808. }
  809. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  810. struct dsi_parser_utils *utils,
  811. const char *name)
  812. {
  813. const char *trig;
  814. int rc = 0;
  815. trig = utils->get_property(utils->data,
  816. "qcom,mdss-dsi-mdp-trigger", NULL);
  817. if (trig) {
  818. if (!strcmp(trig, "none")) {
  819. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  820. } else if (!strcmp(trig, "trigger_te")) {
  821. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  822. } else if (!strcmp(trig, "trigger_sw")) {
  823. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  824. } else if (!strcmp(trig, "trigger_sw_te")) {
  825. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  826. } else {
  827. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  828. name, trig);
  829. rc = -EINVAL;
  830. }
  831. } else {
  832. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  833. name);
  834. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  835. }
  836. trig = utils->get_property(utils->data,
  837. "qcom,mdss-dsi-dma-trigger", NULL);
  838. if (trig) {
  839. if (!strcmp(trig, "none")) {
  840. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  841. } else if (!strcmp(trig, "trigger_te")) {
  842. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  843. } else if (!strcmp(trig, "trigger_sw")) {
  844. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  845. } else if (!strcmp(trig, "trigger_sw_seof")) {
  846. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  847. } else if (!strcmp(trig, "trigger_sw_te")) {
  848. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  849. } else {
  850. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  851. name, trig);
  852. rc = -EINVAL;
  853. }
  854. } else {
  855. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  856. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  857. }
  858. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  859. &host->te_mode);
  860. if (rc) {
  861. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  862. host->te_mode = 1;
  863. rc = 0;
  864. }
  865. return rc;
  866. }
  867. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  868. struct dsi_parser_utils *utils,
  869. const char *name)
  870. {
  871. u32 val = 0;
  872. int rc = 0;
  873. bool panel_cphy_mode = false;
  874. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  875. if (!rc) {
  876. host->t_clk_post = val;
  877. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  878. }
  879. val = 0;
  880. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  881. if (!rc) {
  882. host->t_clk_pre = val;
  883. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  884. }
  885. host->ignore_rx_eot = utils->read_bool(utils->data,
  886. "qcom,mdss-dsi-rx-eot-ignore");
  887. host->append_tx_eot = utils->read_bool(utils->data,
  888. "qcom,mdss-dsi-tx-eot-append");
  889. host->ext_bridge_mode = utils->read_bool(utils->data,
  890. "qcom,mdss-dsi-ext-bridge-mode");
  891. host->force_hs_clk_lane = utils->read_bool(utils->data,
  892. "qcom,mdss-dsi-force-clock-lane-hs");
  893. panel_cphy_mode = utils->read_bool(utils->data,
  894. "qcom,panel-cphy-mode");
  895. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  896. : DSI_PHY_TYPE_DPHY;
  897. return 0;
  898. }
  899. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  900. struct dsi_parser_utils *utils,
  901. const char *name)
  902. {
  903. int rc = 0;
  904. u32 val = 0;
  905. bool supported = false;
  906. struct dsi_split_link_config *split_link = &host->split_link;
  907. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  908. if (!supported) {
  909. DSI_DEBUG("[%s] Split link is not supported\n", name);
  910. split_link->split_link_enabled = false;
  911. return;
  912. }
  913. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  914. if (rc || val < 1) {
  915. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  916. split_link->num_sublinks = 2;
  917. } else {
  918. split_link->num_sublinks = val;
  919. }
  920. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  921. if (rc || val < 1) {
  922. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  923. split_link->lanes_per_sublink = 2;
  924. } else {
  925. split_link->lanes_per_sublink = val;
  926. }
  927. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  928. split_link->num_sublinks, split_link->lanes_per_sublink);
  929. split_link->split_link_enabled = true;
  930. }
  931. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  932. {
  933. int rc = 0;
  934. struct dsi_parser_utils *utils = &panel->utils;
  935. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  936. panel->name);
  937. if (rc) {
  938. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  939. panel->name, rc);
  940. goto error;
  941. }
  942. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  943. panel->name);
  944. if (rc) {
  945. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  946. panel->name, rc);
  947. goto error;
  948. }
  949. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  950. panel->name);
  951. if (rc) {
  952. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  953. panel->name, rc);
  954. goto error;
  955. }
  956. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  957. panel->name);
  958. if (rc) {
  959. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  960. panel->name, rc);
  961. goto error;
  962. }
  963. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  964. panel->name);
  965. if (rc) {
  966. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  967. panel->name, rc);
  968. goto error;
  969. }
  970. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  971. panel->name);
  972. error:
  973. return rc;
  974. }
  975. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  976. struct device_node *of_node)
  977. {
  978. int rc = 0;
  979. u32 val = 0;
  980. rc = of_property_read_u32(of_node,
  981. "qcom,mdss-dsi-qsync-min-refresh-rate",
  982. &val);
  983. if (rc)
  984. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  985. panel->name, rc);
  986. panel->qsync_min_fps = val;
  987. return rc;
  988. }
  989. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  990. {
  991. int rc = 0;
  992. bool supported = false;
  993. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  994. struct dsi_parser_utils *utils = &panel->utils;
  995. const char *name = panel->name;
  996. const char *type;
  997. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  998. if (!supported) {
  999. dyn_clk_caps->dyn_clk_support = false;
  1000. return rc;
  1001. }
  1002. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  1003. "qcom,dsi-dyn-clk-list");
  1004. if (dyn_clk_caps->bit_clk_list_len < 1) {
  1005. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  1006. return -EINVAL;
  1007. }
  1008. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1009. sizeof(u32), GFP_KERNEL);
  1010. if (!dyn_clk_caps->bit_clk_list)
  1011. return -ENOMEM;
  1012. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1013. dyn_clk_caps->bit_clk_list,
  1014. dyn_clk_caps->bit_clk_list_len);
  1015. if (rc) {
  1016. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1017. return -EINVAL;
  1018. }
  1019. dyn_clk_caps->dyn_clk_support = true;
  1020. type = utils->get_property(utils->data,
  1021. "qcom,dsi-dyn-clk-type", NULL);
  1022. if (!type) {
  1023. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1024. dyn_clk_caps->maintain_const_fps = false;
  1025. return 0;
  1026. }
  1027. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1028. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1029. dyn_clk_caps->maintain_const_fps = true;
  1030. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1031. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1032. dyn_clk_caps->maintain_const_fps = true;
  1033. } else {
  1034. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1035. dyn_clk_caps->maintain_const_fps = false;
  1036. }
  1037. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1038. return 0;
  1039. }
  1040. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1041. {
  1042. int rc = 0;
  1043. bool supported = false;
  1044. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1045. struct dsi_parser_utils *utils = &panel->utils;
  1046. const char *name = panel->name;
  1047. const char *type;
  1048. u32 i;
  1049. supported = utils->read_bool(utils->data,
  1050. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1051. if (!supported) {
  1052. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1053. dfps_caps->dfps_support = false;
  1054. return rc;
  1055. }
  1056. type = utils->get_property(utils->data,
  1057. "qcom,mdss-dsi-pan-fps-update", NULL);
  1058. if (!type) {
  1059. DSI_ERR("[%s] dfps type not defined\n", name);
  1060. rc = -EINVAL;
  1061. goto error;
  1062. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1063. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1064. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1065. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1066. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1067. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1068. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1069. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1070. } else {
  1071. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1072. rc = -EINVAL;
  1073. goto error;
  1074. }
  1075. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1076. "qcom,dsi-supported-dfps-list");
  1077. if (dfps_caps->dfps_list_len < 1) {
  1078. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1079. rc = -EINVAL;
  1080. goto error;
  1081. }
  1082. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1083. GFP_KERNEL);
  1084. if (!dfps_caps->dfps_list) {
  1085. rc = -ENOMEM;
  1086. goto error;
  1087. }
  1088. rc = utils->read_u32_array(utils->data,
  1089. "qcom,dsi-supported-dfps-list",
  1090. dfps_caps->dfps_list,
  1091. dfps_caps->dfps_list_len);
  1092. if (rc) {
  1093. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1094. rc = -EINVAL;
  1095. goto error;
  1096. }
  1097. dfps_caps->dfps_support = true;
  1098. /* calculate max and min fps */
  1099. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1100. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1101. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1102. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1103. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1104. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1105. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1106. }
  1107. error:
  1108. return rc;
  1109. }
  1110. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1111. struct dsi_parser_utils *utils,
  1112. const char *name)
  1113. {
  1114. int rc = 0;
  1115. const char *traffic_mode;
  1116. u32 vc_id = 0;
  1117. u32 val = 0;
  1118. u32 line_no = 0;
  1119. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1120. if (rc) {
  1121. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1122. cfg->pulse_mode_hsa_he = false;
  1123. } else if (val == 1) {
  1124. cfg->pulse_mode_hsa_he = true;
  1125. } else if (val == 0) {
  1126. cfg->pulse_mode_hsa_he = false;
  1127. } else {
  1128. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1129. name);
  1130. rc = -EINVAL;
  1131. goto error;
  1132. }
  1133. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1134. "qcom,mdss-dsi-hfp-power-mode");
  1135. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1136. "qcom,mdss-dsi-hbp-power-mode");
  1137. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1138. "qcom,mdss-dsi-hsa-power-mode");
  1139. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1140. "qcom,mdss-dsi-last-line-interleave");
  1141. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1142. "qcom,mdss-dsi-bllp-eof-power-mode");
  1143. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1144. "qcom,mdss-dsi-bllp-power-mode");
  1145. traffic_mode = utils->get_property(utils->data,
  1146. "qcom,mdss-dsi-traffic-mode",
  1147. NULL);
  1148. if (!traffic_mode) {
  1149. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1150. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1151. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1152. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1153. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1154. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1155. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1156. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1157. } else {
  1158. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1159. traffic_mode);
  1160. rc = -EINVAL;
  1161. goto error;
  1162. }
  1163. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1164. &vc_id);
  1165. if (rc) {
  1166. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1167. cfg->vc_id = 0;
  1168. } else {
  1169. cfg->vc_id = vc_id;
  1170. }
  1171. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1172. &line_no);
  1173. if (rc) {
  1174. DSI_DEBUG("[%s] set default dma scheduling line no\n", name);
  1175. cfg->dma_sched_line = 0x1;
  1176. /* do not fail since we have default value */
  1177. rc = 0;
  1178. } else {
  1179. cfg->dma_sched_line = line_no;
  1180. }
  1181. error:
  1182. return rc;
  1183. }
  1184. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1185. struct dsi_parser_utils *utils,
  1186. const char *name)
  1187. {
  1188. u32 val = 0;
  1189. int rc = 0;
  1190. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1191. if (rc) {
  1192. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1193. cfg->wr_mem_start = 0x2C;
  1194. } else {
  1195. cfg->wr_mem_start = val;
  1196. }
  1197. val = 0;
  1198. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1199. &val);
  1200. if (rc) {
  1201. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1202. cfg->wr_mem_continue = 0x3C;
  1203. } else {
  1204. cfg->wr_mem_continue = val;
  1205. }
  1206. /* TODO: fix following */
  1207. cfg->max_cmd_packets_interleave = 0;
  1208. val = 0;
  1209. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1210. &val);
  1211. if (rc) {
  1212. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1213. cfg->insert_dcs_command = true;
  1214. } else if (val == 1) {
  1215. cfg->insert_dcs_command = true;
  1216. } else if (val == 0) {
  1217. cfg->insert_dcs_command = false;
  1218. } else {
  1219. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1220. name);
  1221. rc = -EINVAL;
  1222. goto error;
  1223. }
  1224. error:
  1225. return rc;
  1226. }
  1227. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1228. {
  1229. int rc = 0;
  1230. struct dsi_parser_utils *utils = &panel->utils;
  1231. bool panel_mode_switch_enabled;
  1232. enum dsi_op_mode panel_mode;
  1233. const char *mode;
  1234. mode = utils->get_property(utils->data,
  1235. "qcom,mdss-dsi-panel-type", NULL);
  1236. if (!mode) {
  1237. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1238. panel_mode = DSI_OP_VIDEO_MODE;
  1239. } else if (!strcmp(mode, "dsi_video_mode")) {
  1240. panel_mode = DSI_OP_VIDEO_MODE;
  1241. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1242. panel_mode = DSI_OP_CMD_MODE;
  1243. } else {
  1244. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1245. rc = -EINVAL;
  1246. goto error;
  1247. }
  1248. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1249. "qcom,mdss-dsi-panel-mode-switch");
  1250. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1251. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1252. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1253. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1254. utils,
  1255. panel->name);
  1256. if (rc) {
  1257. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1258. panel->name, rc);
  1259. goto error;
  1260. }
  1261. }
  1262. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1263. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1264. utils,
  1265. panel->name);
  1266. if (rc) {
  1267. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1268. panel->name, rc);
  1269. goto error;
  1270. }
  1271. }
  1272. panel->poms_align_vsync = utils->read_bool(utils->data,
  1273. "qcom,poms-align-panel-vsync");
  1274. panel->panel_mode = panel_mode;
  1275. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1276. error:
  1277. return rc;
  1278. }
  1279. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1280. {
  1281. int rc = 0;
  1282. u32 val = 0;
  1283. const char *str;
  1284. struct dsi_panel_phy_props *props = &panel->phy_props;
  1285. struct dsi_parser_utils *utils = &panel->utils;
  1286. const char *name = panel->name;
  1287. rc = utils->read_u32(utils->data,
  1288. "qcom,mdss-pan-physical-width-dimension", &val);
  1289. if (rc) {
  1290. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1291. props->panel_width_mm = 0;
  1292. rc = 0;
  1293. } else {
  1294. props->panel_width_mm = val;
  1295. }
  1296. rc = utils->read_u32(utils->data,
  1297. "qcom,mdss-pan-physical-height-dimension",
  1298. &val);
  1299. if (rc) {
  1300. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1301. props->panel_height_mm = 0;
  1302. rc = 0;
  1303. } else {
  1304. props->panel_height_mm = val;
  1305. }
  1306. str = utils->get_property(utils->data,
  1307. "qcom,mdss-dsi-panel-orientation", NULL);
  1308. if (!str) {
  1309. props->rotation = DSI_PANEL_ROTATE_NONE;
  1310. } else if (!strcmp(str, "180")) {
  1311. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1312. } else if (!strcmp(str, "hflip")) {
  1313. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1314. } else if (!strcmp(str, "vflip")) {
  1315. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1316. } else {
  1317. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1318. rc = -EINVAL;
  1319. goto error;
  1320. }
  1321. error:
  1322. return rc;
  1323. }
  1324. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1325. "qcom,mdss-dsi-pre-on-command",
  1326. "qcom,mdss-dsi-on-command",
  1327. "qcom,mdss-dsi-post-panel-on-command",
  1328. "qcom,mdss-dsi-pre-off-command",
  1329. "qcom,mdss-dsi-off-command",
  1330. "qcom,mdss-dsi-post-off-command",
  1331. "qcom,mdss-dsi-pre-res-switch",
  1332. "qcom,mdss-dsi-res-switch",
  1333. "qcom,mdss-dsi-post-res-switch",
  1334. "qcom,cmd-to-video-mode-switch-commands",
  1335. "qcom,cmd-to-video-mode-post-switch-commands",
  1336. "qcom,video-to-cmd-mode-switch-commands",
  1337. "qcom,video-to-cmd-mode-post-switch-commands",
  1338. "qcom,mdss-dsi-panel-status-command",
  1339. "qcom,mdss-dsi-lp1-command",
  1340. "qcom,mdss-dsi-lp2-command",
  1341. "qcom,mdss-dsi-nolp-command",
  1342. "PPS not parsed from DTSI, generated dynamically",
  1343. "ROI not parsed from DTSI, generated dynamically",
  1344. "qcom,mdss-dsi-timing-switch-command",
  1345. "qcom,mdss-dsi-post-mode-switch-on-command",
  1346. "qcom,mdss-dsi-qsync-on-commands",
  1347. "qcom,mdss-dsi-qsync-off-commands",
  1348. };
  1349. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1350. "qcom,mdss-dsi-pre-on-command-state",
  1351. "qcom,mdss-dsi-on-command-state",
  1352. "qcom,mdss-dsi-post-on-command-state",
  1353. "qcom,mdss-dsi-pre-off-command-state",
  1354. "qcom,mdss-dsi-off-command-state",
  1355. "qcom,mdss-dsi-post-off-command-state",
  1356. "qcom,mdss-dsi-pre-res-switch-state",
  1357. "qcom,mdss-dsi-res-switch-state",
  1358. "qcom,mdss-dsi-post-res-switch-state",
  1359. "qcom,cmd-to-video-mode-switch-commands-state",
  1360. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1361. "qcom,video-to-cmd-mode-switch-commands-state",
  1362. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1363. "qcom,mdss-dsi-panel-status-command-state",
  1364. "qcom,mdss-dsi-lp1-command-state",
  1365. "qcom,mdss-dsi-lp2-command-state",
  1366. "qcom,mdss-dsi-nolp-command-state",
  1367. "PPS not parsed from DTSI, generated dynamically",
  1368. "ROI not parsed from DTSI, generated dynamically",
  1369. "qcom,mdss-dsi-timing-switch-command-state",
  1370. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1371. "qcom,mdss-dsi-qsync-on-commands-state",
  1372. "qcom,mdss-dsi-qsync-off-commands-state",
  1373. };
  1374. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1375. {
  1376. const u32 cmd_set_min_size = 7;
  1377. u32 count = 0;
  1378. u32 packet_length;
  1379. u32 tmp;
  1380. while (length >= cmd_set_min_size) {
  1381. packet_length = cmd_set_min_size;
  1382. tmp = ((data[5] << 8) | (data[6]));
  1383. packet_length += tmp;
  1384. if (packet_length > length) {
  1385. DSI_ERR("format error\n");
  1386. return -EINVAL;
  1387. }
  1388. length -= packet_length;
  1389. data += packet_length;
  1390. count++;
  1391. }
  1392. *cnt = count;
  1393. return 0;
  1394. }
  1395. static int dsi_panel_create_cmd_packets(const char *data,
  1396. u32 length,
  1397. u32 count,
  1398. struct dsi_cmd_desc *cmd)
  1399. {
  1400. int rc = 0;
  1401. int i, j;
  1402. u8 *payload;
  1403. for (i = 0; i < count; i++) {
  1404. u32 size;
  1405. cmd[i].msg.type = data[0];
  1406. cmd[i].last_command = (data[1] == 1);
  1407. cmd[i].msg.channel = data[2];
  1408. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1409. cmd[i].msg.ctrl = 0;
  1410. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1411. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1412. size = cmd[i].msg.tx_len * sizeof(u8);
  1413. payload = kzalloc(size, GFP_KERNEL);
  1414. if (!payload) {
  1415. rc = -ENOMEM;
  1416. goto error_free_payloads;
  1417. }
  1418. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1419. payload[j] = data[7 + j];
  1420. cmd[i].msg.tx_buf = payload;
  1421. data += (7 + cmd[i].msg.tx_len);
  1422. }
  1423. return rc;
  1424. error_free_payloads:
  1425. for (i = i - 1; i >= 0; i--) {
  1426. cmd--;
  1427. kfree(cmd->msg.tx_buf);
  1428. }
  1429. return rc;
  1430. }
  1431. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1432. {
  1433. u32 i = 0;
  1434. struct dsi_cmd_desc *cmd;
  1435. for (i = 0; i < set->count; i++) {
  1436. cmd = &set->cmds[i];
  1437. kfree(cmd->msg.tx_buf);
  1438. }
  1439. }
  1440. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1441. {
  1442. kfree(set->cmds);
  1443. }
  1444. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1445. u32 packet_count)
  1446. {
  1447. u32 size;
  1448. size = packet_count * sizeof(*cmd->cmds);
  1449. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1450. if (!cmd->cmds)
  1451. return -ENOMEM;
  1452. cmd->count = packet_count;
  1453. return 0;
  1454. }
  1455. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1456. enum dsi_cmd_set_type type,
  1457. struct dsi_parser_utils *utils)
  1458. {
  1459. int rc = 0;
  1460. u32 length = 0;
  1461. const char *data;
  1462. const char *state;
  1463. u32 packet_count = 0;
  1464. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1465. &length);
  1466. if (!data) {
  1467. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1468. rc = -ENOTSUPP;
  1469. goto error;
  1470. }
  1471. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1472. cmd_set_prop_map[type], length);
  1473. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1474. 8, 1, data, length, false);
  1475. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1476. if (rc) {
  1477. DSI_ERR("commands failed, rc=%d\n", rc);
  1478. goto error;
  1479. }
  1480. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1481. packet_count, length);
  1482. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1483. if (rc) {
  1484. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1485. goto error;
  1486. }
  1487. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1488. cmd->cmds);
  1489. if (rc) {
  1490. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1491. goto error_free_mem;
  1492. }
  1493. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1494. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1495. cmd->state = DSI_CMD_SET_STATE_LP;
  1496. } else if (!strcmp(state, "dsi_hs_mode")) {
  1497. cmd->state = DSI_CMD_SET_STATE_HS;
  1498. } else {
  1499. DSI_ERR("[%s] command state unrecognized-%s\n",
  1500. cmd_set_state_map[type], state);
  1501. goto error_free_mem;
  1502. }
  1503. return rc;
  1504. error_free_mem:
  1505. kfree(cmd->cmds);
  1506. cmd->cmds = NULL;
  1507. error:
  1508. return rc;
  1509. }
  1510. static int dsi_panel_parse_cmd_sets(
  1511. struct dsi_display_mode_priv_info *priv_info,
  1512. struct dsi_parser_utils *utils)
  1513. {
  1514. int rc = 0;
  1515. struct dsi_panel_cmd_set *set;
  1516. u32 i;
  1517. if (!priv_info) {
  1518. DSI_ERR("invalid mode priv info\n");
  1519. return -EINVAL;
  1520. }
  1521. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1522. set = &priv_info->cmd_sets[i];
  1523. set->type = i;
  1524. set->count = 0;
  1525. if (i == DSI_CMD_SET_PPS) {
  1526. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1527. if (rc)
  1528. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1529. i, rc);
  1530. set->state = DSI_CMD_SET_STATE_LP;
  1531. } else {
  1532. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1533. if (rc)
  1534. DSI_DEBUG("failed to parse set %d\n", i);
  1535. }
  1536. }
  1537. rc = 0;
  1538. return rc;
  1539. }
  1540. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1541. {
  1542. int rc = 0;
  1543. int i;
  1544. u32 length = 0;
  1545. u32 count = 0;
  1546. u32 size = 0;
  1547. u32 *arr_32 = NULL;
  1548. const u32 *arr;
  1549. struct dsi_parser_utils *utils = &panel->utils;
  1550. struct dsi_reset_seq *seq;
  1551. if (panel->host_config.ext_bridge_mode)
  1552. return 0;
  1553. arr = utils->get_property(utils->data,
  1554. "qcom,mdss-dsi-reset-sequence", &length);
  1555. if (!arr) {
  1556. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1557. rc = -EINVAL;
  1558. goto error;
  1559. }
  1560. if (length & 0x1) {
  1561. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1562. panel->name);
  1563. rc = -EINVAL;
  1564. goto error;
  1565. }
  1566. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1567. length = length / sizeof(u32);
  1568. size = length * sizeof(u32);
  1569. arr_32 = kzalloc(size, GFP_KERNEL);
  1570. if (!arr_32) {
  1571. rc = -ENOMEM;
  1572. goto error;
  1573. }
  1574. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1575. arr_32, length);
  1576. if (rc) {
  1577. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1578. goto error_free_arr_32;
  1579. }
  1580. count = length / 2;
  1581. size = count * sizeof(*seq);
  1582. seq = kzalloc(size, GFP_KERNEL);
  1583. if (!seq) {
  1584. rc = -ENOMEM;
  1585. goto error_free_arr_32;
  1586. }
  1587. panel->reset_config.sequence = seq;
  1588. panel->reset_config.count = count;
  1589. for (i = 0; i < length; i += 2) {
  1590. seq->level = arr_32[i];
  1591. seq->sleep_ms = arr_32[i + 1];
  1592. seq++;
  1593. }
  1594. error_free_arr_32:
  1595. kfree(arr_32);
  1596. error:
  1597. return rc;
  1598. }
  1599. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1600. {
  1601. struct dsi_parser_utils *utils = &panel->utils;
  1602. const char *string;
  1603. int i, rc = 0;
  1604. panel->ulps_feature_enabled =
  1605. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1606. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1607. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1608. panel->ulps_suspend_enabled =
  1609. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1610. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1611. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1612. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1613. "qcom,mdss-dsi-te-using-wd");
  1614. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1615. "qcom,cmd-sync-wait-broadcast");
  1616. panel->lp11_init = utils->read_bool(utils->data,
  1617. "qcom,mdss-dsi-lp11-init");
  1618. panel->spr_info.enable = false;
  1619. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1620. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1621. if (!rc) {
  1622. // find match for pack-type string
  1623. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1624. if (msm_spr_pack_type_str[i] &&
  1625. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1626. panel->spr_info.enable = true;
  1627. panel->spr_info.pack_type = i;
  1628. break;
  1629. }
  1630. }
  1631. }
  1632. pr_debug("%s source side spr packing, pack-type %s\n",
  1633. panel->spr_info.enable ? "enable" : "disable",
  1634. panel->spr_info.enable ?
  1635. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1636. return 0;
  1637. }
  1638. static int dsi_panel_parse_jitter_config(
  1639. struct dsi_display_mode *mode,
  1640. struct dsi_parser_utils *utils)
  1641. {
  1642. int rc;
  1643. struct dsi_display_mode_priv_info *priv_info;
  1644. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1645. u64 jitter_val = 0;
  1646. priv_info = mode->priv_info;
  1647. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1648. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1649. if (rc) {
  1650. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1651. } else {
  1652. jitter_val = jitter[0];
  1653. jitter_val = div_u64(jitter_val, jitter[1]);
  1654. }
  1655. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1656. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1657. priv_info->panel_jitter_denom =
  1658. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1659. } else {
  1660. priv_info->panel_jitter_numer = jitter[0];
  1661. priv_info->panel_jitter_denom = jitter[1];
  1662. }
  1663. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1664. &priv_info->panel_prefill_lines);
  1665. if (rc) {
  1666. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1667. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1668. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1669. } else if (priv_info->panel_prefill_lines >=
  1670. DSI_V_TOTAL(&mode->timing)) {
  1671. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1672. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1673. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1674. }
  1675. return 0;
  1676. }
  1677. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1678. {
  1679. int rc = 0;
  1680. char *supply_name;
  1681. if (panel->host_config.ext_bridge_mode)
  1682. return 0;
  1683. if (!strcmp(panel->type, "primary"))
  1684. supply_name = "qcom,panel-supply-entries";
  1685. else
  1686. supply_name = "qcom,panel-sec-supply-entries";
  1687. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1688. &panel->power_info, supply_name);
  1689. if (rc) {
  1690. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1691. goto error;
  1692. }
  1693. error:
  1694. return rc;
  1695. }
  1696. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1697. {
  1698. int rc = 0;
  1699. const char *data;
  1700. struct dsi_parser_utils *utils = &panel->utils;
  1701. char *reset_gpio_name, *mode_set_gpio_name;
  1702. if (!strcmp(panel->type, "primary")) {
  1703. reset_gpio_name = "qcom,platform-reset-gpio";
  1704. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1705. } else {
  1706. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1707. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1708. }
  1709. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1710. reset_gpio_name, 0);
  1711. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1712. !panel->host_config.ext_bridge_mode) {
  1713. rc = panel->reset_config.reset_gpio;
  1714. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1715. goto error;
  1716. }
  1717. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1718. "qcom,5v-boost-gpio",
  1719. 0);
  1720. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1721. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1722. panel->name, rc);
  1723. panel->reset_config.disp_en_gpio =
  1724. utils->get_named_gpio(utils->data,
  1725. "qcom,platform-en-gpio", 0);
  1726. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1727. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1728. panel->name, rc);
  1729. }
  1730. }
  1731. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1732. utils->data, mode_set_gpio_name, 0);
  1733. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1734. DSI_DEBUG("mode gpio not specified\n");
  1735. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1736. data = utils->get_property(utils->data,
  1737. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1738. if (data) {
  1739. if (!strcmp(data, "single_port"))
  1740. panel->reset_config.mode_sel_state =
  1741. MODE_SEL_SINGLE_PORT;
  1742. else if (!strcmp(data, "dual_port"))
  1743. panel->reset_config.mode_sel_state =
  1744. MODE_SEL_DUAL_PORT;
  1745. else if (!strcmp(data, "high"))
  1746. panel->reset_config.mode_sel_state =
  1747. MODE_GPIO_HIGH;
  1748. else if (!strcmp(data, "low"))
  1749. panel->reset_config.mode_sel_state =
  1750. MODE_GPIO_LOW;
  1751. } else {
  1752. /* Set default mode as SPLIT mode */
  1753. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1754. }
  1755. /* TODO: release memory */
  1756. rc = dsi_panel_parse_reset_sequence(panel);
  1757. if (rc) {
  1758. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1759. panel->name, rc);
  1760. goto error;
  1761. }
  1762. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1763. "qcom,mdss-dsi-panel-test-pin",
  1764. 0);
  1765. if (!gpio_is_valid(panel->panel_test_gpio))
  1766. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1767. __LINE__);
  1768. error:
  1769. return rc;
  1770. }
  1771. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1772. {
  1773. int rc = 0;
  1774. u32 val;
  1775. struct dsi_backlight_config *config = &panel->bl_config;
  1776. struct dsi_parser_utils *utils = &panel->utils;
  1777. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1778. &val);
  1779. if (rc) {
  1780. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1781. goto error;
  1782. }
  1783. config->pwm_period_usecs = val;
  1784. error:
  1785. return rc;
  1786. }
  1787. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1788. {
  1789. int rc = 0;
  1790. u32 val = 0;
  1791. const char *bl_type;
  1792. const char *data;
  1793. struct dsi_parser_utils *utils = &panel->utils;
  1794. char *bl_name;
  1795. if (!strcmp(panel->type, "primary"))
  1796. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1797. else
  1798. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1799. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1800. if (!bl_type) {
  1801. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1802. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1803. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1804. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1805. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1806. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1807. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1808. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1809. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1810. } else {
  1811. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1812. panel->name, bl_type);
  1813. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1814. }
  1815. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1816. if (!data) {
  1817. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1818. } else if (!strcmp(data, "delay_until_first_frame")) {
  1819. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1820. } else {
  1821. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  1822. panel->name, data);
  1823. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1824. }
  1825. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1826. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1827. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1828. if (rc) {
  1829. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  1830. panel->name);
  1831. panel->bl_config.bl_min_level = 0;
  1832. } else {
  1833. panel->bl_config.bl_min_level = val;
  1834. }
  1835. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1836. if (rc) {
  1837. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  1838. panel->name);
  1839. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1840. } else {
  1841. panel->bl_config.bl_max_level = val;
  1842. }
  1843. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1844. &val);
  1845. if (rc) {
  1846. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1847. panel->name);
  1848. panel->bl_config.brightness_max_level = 255;
  1849. rc = 0;
  1850. } else {
  1851. panel->bl_config.brightness_max_level = val;
  1852. }
  1853. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  1854. "qcom,mdss-dsi-bl-inverted-dbv");
  1855. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1856. rc = dsi_panel_parse_bl_pwm_config(panel);
  1857. if (rc) {
  1858. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  1859. panel->name, rc);
  1860. goto error;
  1861. }
  1862. }
  1863. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1864. "qcom,platform-bklight-en-gpio",
  1865. 0);
  1866. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1867. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1868. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1869. panel->name, rc);
  1870. rc = -EPROBE_DEFER;
  1871. goto error;
  1872. } else {
  1873. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1874. panel->name, rc);
  1875. rc = 0;
  1876. goto error;
  1877. }
  1878. }
  1879. error:
  1880. return rc;
  1881. }
  1882. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  1883. struct dsi_parser_utils *utils)
  1884. {
  1885. const char *data;
  1886. u32 len, i;
  1887. int rc = 0;
  1888. struct dsi_display_mode_priv_info *priv_info;
  1889. u64 pixel_clk_khz;
  1890. if (!mode || !mode->priv_info)
  1891. return -EINVAL;
  1892. priv_info = mode->priv_info;
  1893. data = utils->get_property(utils->data,
  1894. "qcom,mdss-dsi-panel-phy-timings", &len);
  1895. if (!data) {
  1896. DSI_DEBUG("Unable to read Phy timing settings\n");
  1897. } else {
  1898. priv_info->phy_timing_val =
  1899. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  1900. if (!priv_info->phy_timing_val)
  1901. return -EINVAL;
  1902. for (i = 0; i < len; i++)
  1903. priv_info->phy_timing_val[i] = data[i];
  1904. priv_info->phy_timing_len = len;
  1905. }
  1906. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  1907. /*
  1908. * For command mode we update the pclk as part of
  1909. * function dsi_panel_calc_dsi_transfer_time( )
  1910. * as we set it based on dsi clock or mdp transfer time.
  1911. */
  1912. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  1913. DSI_V_TOTAL(&mode->timing) *
  1914. mode->timing.refresh_rate);
  1915. do_div(pixel_clk_khz, 1000);
  1916. mode->pixel_clk_khz = pixel_clk_khz;
  1917. }
  1918. return rc;
  1919. }
  1920. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  1921. struct dsi_parser_utils *utils)
  1922. {
  1923. u32 data;
  1924. int rc = -EINVAL;
  1925. int intf_width;
  1926. const char *compression;
  1927. struct dsi_display_mode_priv_info *priv_info;
  1928. if (!mode || !mode->priv_info)
  1929. return -EINVAL;
  1930. priv_info = mode->priv_info;
  1931. priv_info->dsc_enabled = false;
  1932. compression = utils->get_property(utils->data,
  1933. "qcom,compression-mode", NULL);
  1934. if (compression && !strcmp(compression, "dsc"))
  1935. priv_info->dsc_enabled = true;
  1936. if (!priv_info->dsc_enabled) {
  1937. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  1938. return 0;
  1939. }
  1940. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  1941. if (rc) {
  1942. priv_info->dsc.config.dsc_version_major = 0x1;
  1943. priv_info->dsc.config.dsc_version_minor = 0x1;
  1944. rc = 0;
  1945. } else {
  1946. /* BITS[0..3] provides minor version and BITS[4..7] provide
  1947. * major version information
  1948. */
  1949. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  1950. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  1951. if ((priv_info->dsc.config.dsc_version_major != 0x1) &&
  1952. ((priv_info->dsc.config.dsc_version_minor
  1953. != 0x1) ||
  1954. (priv_info->dsc.config.dsc_version_minor
  1955. != 0x2))) {
  1956. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  1957. __func__,
  1958. priv_info->dsc.config.dsc_version_major,
  1959. priv_info->dsc.config.dsc_version_minor
  1960. );
  1961. rc = -EINVAL;
  1962. goto error;
  1963. }
  1964. }
  1965. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  1966. if (rc) {
  1967. priv_info->dsc.scr_rev = 0x0;
  1968. rc = 0;
  1969. } else {
  1970. priv_info->dsc.scr_rev = data & 0xff;
  1971. /* only one scr rev supported */
  1972. if (priv_info->dsc.scr_rev > 0x1) {
  1973. DSI_ERR("%s: DSC scr version:%d not supported\n",
  1974. __func__, priv_info->dsc.scr_rev);
  1975. rc = -EINVAL;
  1976. goto error;
  1977. }
  1978. }
  1979. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  1980. if (rc) {
  1981. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  1982. goto error;
  1983. }
  1984. priv_info->dsc.config.slice_height = data;
  1985. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  1986. if (rc) {
  1987. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  1988. goto error;
  1989. }
  1990. priv_info->dsc.config.slice_width = data;
  1991. intf_width = mode->timing.h_active;
  1992. if (intf_width % priv_info->dsc.config.slice_width) {
  1993. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  1994. intf_width, priv_info->dsc.config.slice_width);
  1995. rc = -EINVAL;
  1996. goto error;
  1997. }
  1998. priv_info->dsc.config.pic_width = mode->timing.h_active;
  1999. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2000. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2001. if (rc) {
  2002. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2003. goto error;
  2004. } else if (!data || (data > 2)) {
  2005. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2006. goto error;
  2007. }
  2008. priv_info->dsc.slice_per_pkt = data;
  2009. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2010. &data);
  2011. if (rc) {
  2012. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2013. goto error;
  2014. }
  2015. priv_info->dsc.config.bits_per_component = data;
  2016. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2017. if (rc) {
  2018. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2019. data = 0;
  2020. }
  2021. priv_info->dsc.pps_delay_ms = data;
  2022. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2023. &data);
  2024. if (rc) {
  2025. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2026. goto error;
  2027. }
  2028. priv_info->dsc.config.bits_per_pixel = data << 4;
  2029. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2030. &data);
  2031. if (rc) {
  2032. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2033. rc = 0;
  2034. data = MSM_CHROMA_444;
  2035. }
  2036. priv_info->dsc.chroma_format = data;
  2037. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2038. &data);
  2039. if (rc) {
  2040. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2041. rc = 0;
  2042. data = MSM_RGB;
  2043. }
  2044. priv_info->dsc.source_color_space = data;
  2045. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2046. "qcom,mdss-dsc-block-prediction-enable");
  2047. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2048. priv_info->dsc.config.slice_width);
  2049. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2050. priv_info->dsc.scr_rev);
  2051. if (rc) {
  2052. DSI_DEBUG("failed populating dsc params \n");
  2053. rc = -EINVAL;
  2054. goto error;
  2055. }
  2056. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2057. if (rc) {
  2058. DSI_DEBUG("failed populating other dsc params \n");
  2059. rc = -EINVAL;
  2060. goto error;
  2061. }
  2062. priv_info->pclk_scale.numer =
  2063. priv_info->dsc.config.bits_per_pixel >> 4;
  2064. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2065. priv_info->dsc.chroma_format,
  2066. priv_info->dsc.config.bits_per_component);
  2067. mode->timing.dsc_enabled = true;
  2068. mode->timing.dsc = &priv_info->dsc;
  2069. mode->timing.pclk_scale = priv_info->pclk_scale;
  2070. error:
  2071. return rc;
  2072. }
  2073. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2074. struct dsi_parser_utils *utils, int traffic_mode, int panel_mode)
  2075. {
  2076. u32 data;
  2077. int rc = -EINVAL;
  2078. const char *compression;
  2079. struct dsi_display_mode_priv_info *priv_info;
  2080. int intf_width;
  2081. if (!mode || !mode->priv_info)
  2082. return -EINVAL;
  2083. priv_info = mode->priv_info;
  2084. priv_info->vdc_enabled = false;
  2085. compression = utils->get_property(utils->data,
  2086. "qcom,compression-mode", NULL);
  2087. if (compression && !strcmp(compression, "vdc"))
  2088. priv_info->vdc_enabled = true;
  2089. if (!priv_info->vdc_enabled) {
  2090. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2091. return 0;
  2092. }
  2093. priv_info->vdc.panel_mode = panel_mode;
  2094. priv_info->vdc.traffic_mode = traffic_mode;
  2095. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2096. if (rc) {
  2097. priv_info->vdc.version_major = 0x1;
  2098. priv_info->vdc.version_minor = 0x2;
  2099. priv_info->vdc.version_release = 0x0;
  2100. rc = 0;
  2101. } else {
  2102. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2103. * major version information
  2104. */
  2105. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2106. priv_info->vdc.version_minor = data & 0x0F;
  2107. if ((priv_info->vdc.version_major != 0x1) &&
  2108. ((priv_info->vdc.version_minor
  2109. != 0x2))) {
  2110. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2111. __func__,
  2112. priv_info->vdc.version_major,
  2113. priv_info->vdc.version_minor
  2114. );
  2115. rc = -EINVAL;
  2116. goto error;
  2117. }
  2118. }
  2119. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2120. if (rc) {
  2121. priv_info->vdc.version_release = 0x0;
  2122. rc = 0;
  2123. } else {
  2124. priv_info->vdc.version_release = data & 0xff;
  2125. /* only one release version is supported */
  2126. if (priv_info->vdc.version_release != 0x0) {
  2127. DSI_ERR("unsupported vdc release version %d\n",
  2128. priv_info->vdc.version_release);
  2129. rc = -EINVAL;
  2130. goto error;
  2131. }
  2132. }
  2133. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2134. priv_info->vdc.version_major,
  2135. priv_info->vdc.version_minor,
  2136. priv_info->vdc.version_release);
  2137. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2138. if (rc) {
  2139. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2140. goto error;
  2141. }
  2142. priv_info->vdc.slice_height = data;
  2143. /* slice height should be atleast 16 lines */
  2144. if (priv_info->vdc.slice_height < 16) {
  2145. DSI_ERR("invalid slice height %d\n",
  2146. priv_info->vdc.slice_height);
  2147. rc = -EINVAL;
  2148. goto error;
  2149. }
  2150. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2151. if (rc) {
  2152. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2153. goto error;
  2154. }
  2155. priv_info->vdc.slice_width = data;
  2156. /*
  2157. * slide-width should be multiple of 8
  2158. * slice-width should be atlease 64 pixels
  2159. */
  2160. if ((priv_info->vdc.slice_width & 7) ||
  2161. (priv_info->vdc.slice_width < 64)) {
  2162. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2163. rc = -EINVAL;
  2164. goto error;
  2165. }
  2166. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2167. if (rc) {
  2168. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2169. goto error;
  2170. } else if (!data || (data > 2)) {
  2171. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2172. rc = -EINVAL;
  2173. goto error;
  2174. }
  2175. intf_width = mode->timing.h_active;
  2176. priv_info->vdc.slice_per_pkt = data;
  2177. priv_info->vdc.frame_width = mode->timing.h_active;
  2178. priv_info->vdc.frame_height = mode->timing.v_active;
  2179. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2180. &data);
  2181. if (rc) {
  2182. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2183. goto error;
  2184. }
  2185. priv_info->vdc.bits_per_component = data;
  2186. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2187. if (rc) {
  2188. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2189. data = 0;
  2190. }
  2191. priv_info->vdc.pps_delay_ms = data;
  2192. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2193. &data);
  2194. if (rc) {
  2195. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2196. goto error;
  2197. }
  2198. priv_info->vdc.bits_per_pixel = data << 4;
  2199. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2200. &data);
  2201. if (rc) {
  2202. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2203. rc = 0;
  2204. data = MSM_CHROMA_444;
  2205. }
  2206. priv_info->vdc.chroma_format = data;
  2207. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2208. &data);
  2209. if (rc) {
  2210. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2211. rc = 0;
  2212. data = MSM_RGB;
  2213. }
  2214. priv_info->vdc.source_color_space = data;
  2215. rc = sde_vdc_populate_config(&priv_info->vdc,
  2216. intf_width, traffic_mode);
  2217. if (rc) {
  2218. DSI_DEBUG("failed populating vdc config\n");
  2219. rc = -EINVAL;
  2220. goto error;
  2221. }
  2222. priv_info->pclk_scale.numer =
  2223. priv_info->vdc.bits_per_pixel >> 4;
  2224. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2225. priv_info->vdc.chroma_format,
  2226. priv_info->vdc.bits_per_component);
  2227. mode->timing.vdc_enabled = true;
  2228. mode->timing.vdc = &priv_info->vdc;
  2229. mode->timing.pclk_scale = priv_info->pclk_scale;
  2230. error:
  2231. return rc;
  2232. }
  2233. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2234. {
  2235. int rc = 0;
  2236. struct drm_panel_hdr_properties *hdr_prop;
  2237. struct dsi_parser_utils *utils = &panel->utils;
  2238. hdr_prop = &panel->hdr_props;
  2239. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2240. "qcom,mdss-dsi-panel-hdr-enabled");
  2241. if (hdr_prop->hdr_enabled) {
  2242. rc = utils->read_u32_array(utils->data,
  2243. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2244. hdr_prop->display_primaries,
  2245. DISPLAY_PRIMARIES_MAX);
  2246. if (rc) {
  2247. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2248. __func__, __LINE__, rc);
  2249. hdr_prop->hdr_enabled = false;
  2250. return rc;
  2251. }
  2252. rc = utils->read_u32(utils->data,
  2253. "qcom,mdss-dsi-panel-peak-brightness",
  2254. &(hdr_prop->peak_brightness));
  2255. if (rc) {
  2256. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2257. __func__, __LINE__, rc);
  2258. hdr_prop->hdr_enabled = false;
  2259. return rc;
  2260. }
  2261. rc = utils->read_u32(utils->data,
  2262. "qcom,mdss-dsi-panel-blackness-level",
  2263. &(hdr_prop->blackness_level));
  2264. if (rc) {
  2265. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2266. __func__, __LINE__, rc);
  2267. hdr_prop->hdr_enabled = false;
  2268. return rc;
  2269. }
  2270. }
  2271. return 0;
  2272. }
  2273. static int dsi_panel_parse_topology(
  2274. struct dsi_display_mode_priv_info *priv_info,
  2275. struct dsi_parser_utils *utils,
  2276. int topology_override)
  2277. {
  2278. struct msm_display_topology *topology;
  2279. u32 top_count, top_sel, *array = NULL;
  2280. int i, len = 0;
  2281. int rc = -EINVAL;
  2282. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2283. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2284. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2285. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2286. return rc;
  2287. }
  2288. top_count = len / TOPOLOGY_SET_LEN;
  2289. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2290. if (!array)
  2291. return -ENOMEM;
  2292. rc = utils->read_u32_array(utils->data,
  2293. "qcom,display-topology", array, len);
  2294. if (rc) {
  2295. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2296. goto read_fail;
  2297. }
  2298. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2299. if (!topology) {
  2300. rc = -ENOMEM;
  2301. goto read_fail;
  2302. }
  2303. for (i = 0; i < top_count; i++) {
  2304. struct msm_display_topology *top = &topology[i];
  2305. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2306. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2307. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2308. }
  2309. if (topology_override >= 0 && topology_override < top_count) {
  2310. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2311. topology_override,
  2312. topology[topology_override].num_lm,
  2313. topology[topology_override].num_enc,
  2314. topology[topology_override].num_intf);
  2315. top_sel = topology_override;
  2316. goto parse_done;
  2317. }
  2318. rc = utils->read_u32(utils->data,
  2319. "qcom,default-topology-index", &top_sel);
  2320. if (rc) {
  2321. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2322. goto parse_fail;
  2323. }
  2324. if (top_sel >= top_count) {
  2325. rc = -EINVAL;
  2326. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2327. rc);
  2328. goto parse_fail;
  2329. }
  2330. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2331. topology[top_sel].num_lm,
  2332. topology[top_sel].num_enc,
  2333. topology[top_sel].num_intf);
  2334. parse_done:
  2335. memcpy(&priv_info->topology, &topology[top_sel],
  2336. sizeof(struct msm_display_topology));
  2337. parse_fail:
  2338. kfree(topology);
  2339. read_fail:
  2340. kfree(array);
  2341. return rc;
  2342. }
  2343. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2344. struct msm_roi_alignment *align)
  2345. {
  2346. int len = 0, rc = 0;
  2347. u32 value[6];
  2348. struct property *data;
  2349. if (!align)
  2350. return -EINVAL;
  2351. memset(align, 0, sizeof(*align));
  2352. data = utils->find_property(utils->data,
  2353. "qcom,panel-roi-alignment", &len);
  2354. len /= sizeof(u32);
  2355. if (!data) {
  2356. DSI_ERR("panel roi alignment not found\n");
  2357. rc = -EINVAL;
  2358. } else if (len != 6) {
  2359. DSI_ERR("incorrect roi alignment len %d\n", len);
  2360. rc = -EINVAL;
  2361. } else {
  2362. rc = utils->read_u32_array(utils->data,
  2363. "qcom,panel-roi-alignment", value, len);
  2364. if (rc)
  2365. DSI_DEBUG("error reading panel roi alignment values\n");
  2366. else {
  2367. align->xstart_pix_align = value[0];
  2368. align->ystart_pix_align = value[1];
  2369. align->width_pix_align = value[2];
  2370. align->height_pix_align = value[3];
  2371. align->min_width = value[4];
  2372. align->min_height = value[5];
  2373. }
  2374. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2375. align->xstart_pix_align,
  2376. align->width_pix_align,
  2377. align->ystart_pix_align,
  2378. align->height_pix_align,
  2379. align->min_width,
  2380. align->min_height);
  2381. }
  2382. return rc;
  2383. }
  2384. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2385. struct dsi_parser_utils *utils)
  2386. {
  2387. struct msm_roi_caps *roi_caps = NULL;
  2388. const char *data;
  2389. int rc = 0;
  2390. if (!mode || !mode->priv_info) {
  2391. DSI_ERR("invalid arguments\n");
  2392. return -EINVAL;
  2393. }
  2394. roi_caps = &mode->priv_info->roi_caps;
  2395. memset(roi_caps, 0, sizeof(*roi_caps));
  2396. data = utils->get_property(utils->data,
  2397. "qcom,partial-update-enabled", NULL);
  2398. if (data) {
  2399. if (!strcmp(data, "dual_roi"))
  2400. roi_caps->num_roi = 2;
  2401. else if (!strcmp(data, "single_roi"))
  2402. roi_caps->num_roi = 1;
  2403. else {
  2404. DSI_INFO(
  2405. "invalid value for qcom,partial-update-enabled: %s\n",
  2406. data);
  2407. return 0;
  2408. }
  2409. } else {
  2410. DSI_DEBUG("partial update disabled as the property is not set\n");
  2411. return 0;
  2412. }
  2413. roi_caps->merge_rois = utils->read_bool(utils->data,
  2414. "qcom,partial-update-roi-merge");
  2415. roi_caps->enabled = roi_caps->num_roi > 0;
  2416. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2417. roi_caps->enabled);
  2418. if (roi_caps->enabled)
  2419. rc = dsi_panel_parse_roi_alignment(utils,
  2420. &roi_caps->align);
  2421. if (rc)
  2422. memset(roi_caps, 0, sizeof(*roi_caps));
  2423. return rc;
  2424. }
  2425. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2426. struct dsi_parser_utils *utils)
  2427. {
  2428. bool vid_mode_support, cmd_mode_support;
  2429. if (!mode || !mode->priv_info) {
  2430. DSI_ERR("invalid arguments\n");
  2431. return -EINVAL;
  2432. }
  2433. vid_mode_support = utils->read_bool(utils->data,
  2434. "qcom,mdss-dsi-video-mode");
  2435. cmd_mode_support = utils->read_bool(utils->data,
  2436. "qcom,mdss-dsi-cmd-mode");
  2437. if (cmd_mode_support)
  2438. mode->panel_mode = DSI_OP_CMD_MODE;
  2439. else if (vid_mode_support)
  2440. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2441. else
  2442. return -EINVAL;
  2443. return 0;
  2444. };
  2445. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2446. {
  2447. int dms_enabled;
  2448. const char *data;
  2449. struct dsi_parser_utils *utils = &panel->utils;
  2450. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2451. dms_enabled = utils->read_bool(utils->data,
  2452. "qcom,dynamic-mode-switch-enabled");
  2453. if (!dms_enabled)
  2454. return 0;
  2455. data = utils->get_property(utils->data,
  2456. "qcom,dynamic-mode-switch-type", NULL);
  2457. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2458. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2459. } else {
  2460. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2461. panel->name, data);
  2462. return -EINVAL;
  2463. }
  2464. return 0;
  2465. };
  2466. /*
  2467. * The length of all the valid values to be checked should not be greater
  2468. * than the length of returned data from read command.
  2469. */
  2470. static bool
  2471. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2472. {
  2473. int i;
  2474. struct drm_panel_esd_config *config = &panel->esd_config;
  2475. for (i = 0; i < count; ++i) {
  2476. if (config->status_valid_params[i] >
  2477. config->status_cmds_rlen[i]) {
  2478. DSI_DEBUG("ignore valid params\n");
  2479. return false;
  2480. }
  2481. }
  2482. return true;
  2483. }
  2484. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2485. char *prop_key, u32 **target, u32 cmd_cnt)
  2486. {
  2487. int tmp;
  2488. if (!utils->find_property(utils->data, prop_key, &tmp))
  2489. return false;
  2490. tmp /= sizeof(u32);
  2491. if (tmp != cmd_cnt) {
  2492. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2493. tmp, cmd_cnt);
  2494. return false;
  2495. }
  2496. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2497. if (IS_ERR_OR_NULL(*target)) {
  2498. DSI_ERR("Error allocating memory for property\n");
  2499. return false;
  2500. }
  2501. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2502. DSI_ERR("cannot get values from dts\n");
  2503. kfree(*target);
  2504. *target = NULL;
  2505. return false;
  2506. }
  2507. return true;
  2508. }
  2509. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2510. {
  2511. kfree(esd_config->status_buf);
  2512. kfree(esd_config->return_buf);
  2513. kfree(esd_config->status_value);
  2514. kfree(esd_config->status_valid_params);
  2515. kfree(esd_config->status_cmds_rlen);
  2516. kfree(esd_config->status_cmd.cmds);
  2517. }
  2518. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2519. {
  2520. struct drm_panel_esd_config *esd_config;
  2521. int rc = 0;
  2522. u32 tmp;
  2523. u32 i, status_len, *lenp;
  2524. struct property *data;
  2525. struct dsi_parser_utils *utils = &panel->utils;
  2526. if (!panel) {
  2527. DSI_ERR("Invalid Params\n");
  2528. return -EINVAL;
  2529. }
  2530. esd_config = &panel->esd_config;
  2531. if (!esd_config)
  2532. return -EINVAL;
  2533. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2534. DSI_CMD_SET_PANEL_STATUS, utils);
  2535. if (!esd_config->status_cmd.count) {
  2536. DSI_ERR("panel status command parsing failed\n");
  2537. rc = -EINVAL;
  2538. goto error;
  2539. }
  2540. if (!dsi_panel_parse_esd_status_len(utils,
  2541. "qcom,mdss-dsi-panel-status-read-length",
  2542. &panel->esd_config.status_cmds_rlen,
  2543. esd_config->status_cmd.count)) {
  2544. DSI_ERR("Invalid status read length\n");
  2545. rc = -EINVAL;
  2546. goto error1;
  2547. }
  2548. if (dsi_panel_parse_esd_status_len(utils,
  2549. "qcom,mdss-dsi-panel-status-valid-params",
  2550. &panel->esd_config.status_valid_params,
  2551. esd_config->status_cmd.count)) {
  2552. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2553. esd_config->status_cmd.count)) {
  2554. rc = -EINVAL;
  2555. goto error2;
  2556. }
  2557. }
  2558. status_len = 0;
  2559. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2560. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2561. status_len += lenp[i];
  2562. if (!status_len) {
  2563. rc = -EINVAL;
  2564. goto error2;
  2565. }
  2566. /*
  2567. * Some panel may need multiple read commands to properly
  2568. * check panel status. Do a sanity check for proper status
  2569. * value which will be compared with the value read by dsi
  2570. * controller during ESD check. Also check if multiple read
  2571. * commands are there then, there should be corresponding
  2572. * status check values for each read command.
  2573. */
  2574. data = utils->find_property(utils->data,
  2575. "qcom,mdss-dsi-panel-status-value", &tmp);
  2576. tmp /= sizeof(u32);
  2577. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2578. esd_config->groups = tmp / status_len;
  2579. } else {
  2580. DSI_ERR("error parse panel-status-value\n");
  2581. rc = -EINVAL;
  2582. goto error2;
  2583. }
  2584. esd_config->status_value =
  2585. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2586. GFP_KERNEL);
  2587. if (!esd_config->status_value) {
  2588. rc = -ENOMEM;
  2589. goto error2;
  2590. }
  2591. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2592. sizeof(unsigned char), GFP_KERNEL);
  2593. if (!esd_config->return_buf) {
  2594. rc = -ENOMEM;
  2595. goto error3;
  2596. }
  2597. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2598. if (!esd_config->status_buf) {
  2599. rc = -ENOMEM;
  2600. goto error4;
  2601. }
  2602. rc = utils->read_u32_array(utils->data,
  2603. "qcom,mdss-dsi-panel-status-value",
  2604. esd_config->status_value, esd_config->groups * status_len);
  2605. if (rc) {
  2606. DSI_DEBUG("error reading panel status values\n");
  2607. memset(esd_config->status_value, 0,
  2608. esd_config->groups * status_len);
  2609. }
  2610. return 0;
  2611. error4:
  2612. kfree(esd_config->return_buf);
  2613. error3:
  2614. kfree(esd_config->status_value);
  2615. error2:
  2616. kfree(esd_config->status_valid_params);
  2617. kfree(esd_config->status_cmds_rlen);
  2618. error1:
  2619. kfree(esd_config->status_cmd.cmds);
  2620. error:
  2621. return rc;
  2622. }
  2623. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2624. {
  2625. int rc = 0;
  2626. const char *string;
  2627. struct drm_panel_esd_config *esd_config;
  2628. struct dsi_parser_utils *utils = &panel->utils;
  2629. u8 *esd_mode = NULL;
  2630. esd_config = &panel->esd_config;
  2631. esd_config->status_mode = ESD_MODE_MAX;
  2632. esd_config->esd_enabled = utils->read_bool(utils->data,
  2633. "qcom,esd-check-enabled");
  2634. if (!esd_config->esd_enabled)
  2635. return 0;
  2636. rc = utils->read_string(utils->data,
  2637. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2638. if (!rc) {
  2639. if (!strcmp(string, "bta_check")) {
  2640. esd_config->status_mode = ESD_MODE_SW_BTA;
  2641. } else if (!strcmp(string, "reg_read")) {
  2642. esd_config->status_mode = ESD_MODE_REG_READ;
  2643. } else if (!strcmp(string, "te_signal_check")) {
  2644. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2645. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2646. } else {
  2647. DSI_ERR("TE-ESD not valid for video mode\n");
  2648. rc = -EINVAL;
  2649. goto error;
  2650. }
  2651. } else {
  2652. DSI_ERR("No valid panel-status-check-mode string\n");
  2653. rc = -EINVAL;
  2654. goto error;
  2655. }
  2656. } else {
  2657. DSI_DEBUG("status check method not defined!\n");
  2658. rc = -EINVAL;
  2659. goto error;
  2660. }
  2661. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2662. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2663. if (rc) {
  2664. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2665. rc);
  2666. goto error;
  2667. }
  2668. esd_mode = "register_read";
  2669. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2670. esd_mode = "bta_trigger";
  2671. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2672. esd_mode = "te_check";
  2673. }
  2674. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2675. return 0;
  2676. error:
  2677. panel->esd_config.esd_enabled = false;
  2678. return rc;
  2679. }
  2680. static void dsi_panel_update_util(struct dsi_panel *panel,
  2681. struct device_node *parser_node)
  2682. {
  2683. struct dsi_parser_utils *utils = &panel->utils;
  2684. if (parser_node) {
  2685. *utils = *dsi_parser_get_parser_utils();
  2686. utils->data = parser_node;
  2687. DSI_DEBUG("switching to parser APIs\n");
  2688. goto end;
  2689. }
  2690. *utils = *dsi_parser_get_of_utils();
  2691. utils->data = panel->panel_of_node;
  2692. end:
  2693. utils->node = panel->panel_of_node;
  2694. }
  2695. struct dsi_panel *dsi_panel_get(struct device *parent,
  2696. struct device_node *of_node,
  2697. struct device_node *parser_node,
  2698. const char *type,
  2699. int topology_override)
  2700. {
  2701. struct dsi_panel *panel;
  2702. struct dsi_parser_utils *utils;
  2703. const char *panel_physical_type;
  2704. int rc = 0;
  2705. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2706. if (!panel)
  2707. return ERR_PTR(-ENOMEM);
  2708. panel->panel_of_node = of_node;
  2709. panel->parent = parent;
  2710. panel->type = type;
  2711. dsi_panel_update_util(panel, parser_node);
  2712. utils = &panel->utils;
  2713. panel->name = utils->get_property(utils->data,
  2714. "qcom,mdss-dsi-panel-name", NULL);
  2715. if (!panel->name)
  2716. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2717. /*
  2718. * Set panel type to LCD as default.
  2719. */
  2720. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2721. panel_physical_type = utils->get_property(utils->data,
  2722. "qcom,mdss-dsi-panel-physical-type", NULL);
  2723. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2724. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2725. rc = dsi_panel_parse_host_config(panel);
  2726. if (rc) {
  2727. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2728. rc);
  2729. goto error;
  2730. }
  2731. rc = dsi_panel_parse_panel_mode(panel);
  2732. if (rc) {
  2733. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2734. rc);
  2735. goto error;
  2736. }
  2737. rc = dsi_panel_parse_dfps_caps(panel);
  2738. if (rc)
  2739. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2740. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2741. if (rc)
  2742. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2743. /* allow qsync support only if DFPS is with VFP approach */
  2744. if ((panel->dfps_caps.dfps_support) &&
  2745. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  2746. panel->qsync_min_fps = 0;
  2747. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2748. if (rc)
  2749. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2750. rc = dsi_panel_parse_phy_props(panel);
  2751. if (rc) {
  2752. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2753. rc);
  2754. goto error;
  2755. }
  2756. rc = dsi_panel_parse_gpios(panel);
  2757. if (rc) {
  2758. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2759. goto error;
  2760. }
  2761. rc = dsi_panel_parse_power_cfg(panel);
  2762. if (rc)
  2763. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2764. rc = dsi_panel_parse_bl_config(panel);
  2765. if (rc) {
  2766. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2767. if (rc == -EPROBE_DEFER)
  2768. goto error;
  2769. }
  2770. rc = dsi_panel_parse_misc_features(panel);
  2771. if (rc)
  2772. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2773. rc = dsi_panel_parse_hdr_config(panel);
  2774. if (rc)
  2775. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2776. rc = dsi_panel_get_mode_count(panel);
  2777. if (rc) {
  2778. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2779. goto error;
  2780. }
  2781. rc = dsi_panel_parse_dms_info(panel);
  2782. if (rc)
  2783. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2784. rc = dsi_panel_parse_esd_config(panel);
  2785. if (rc)
  2786. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  2787. rc = dsi_panel_vreg_get(panel);
  2788. if (rc) {
  2789. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  2790. panel->name, rc);
  2791. goto error;
  2792. }
  2793. panel->power_mode = SDE_MODE_DPMS_OFF;
  2794. drm_panel_init(&panel->drm_panel);
  2795. panel->drm_panel.dev = &panel->mipi_device.dev;
  2796. panel->mipi_device.dev.of_node = of_node;
  2797. rc = drm_panel_add(&panel->drm_panel);
  2798. if (rc)
  2799. goto error_vreg_put;
  2800. mutex_init(&panel->panel_lock);
  2801. return panel;
  2802. error_vreg_put:
  2803. (void)dsi_panel_vreg_put(panel);
  2804. error:
  2805. kfree(panel);
  2806. return ERR_PTR(rc);
  2807. }
  2808. void dsi_panel_put(struct dsi_panel *panel)
  2809. {
  2810. drm_panel_remove(&panel->drm_panel);
  2811. /* free resources allocated for ESD check */
  2812. dsi_panel_esd_config_deinit(&panel->esd_config);
  2813. kfree(panel);
  2814. }
  2815. int dsi_panel_drv_init(struct dsi_panel *panel,
  2816. struct mipi_dsi_host *host)
  2817. {
  2818. int rc = 0;
  2819. struct mipi_dsi_device *dev;
  2820. if (!panel || !host) {
  2821. DSI_ERR("invalid params\n");
  2822. return -EINVAL;
  2823. }
  2824. mutex_lock(&panel->panel_lock);
  2825. dev = &panel->mipi_device;
  2826. dev->host = host;
  2827. /*
  2828. * We dont have device structure since panel is not a device node.
  2829. * When using drm panel framework, the device is probed when the host is
  2830. * create.
  2831. */
  2832. dev->channel = 0;
  2833. dev->lanes = 4;
  2834. panel->host = host;
  2835. rc = dsi_panel_pinctrl_init(panel);
  2836. if (rc) {
  2837. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  2838. panel->name, rc);
  2839. goto exit;
  2840. }
  2841. rc = dsi_panel_gpio_request(panel);
  2842. if (rc) {
  2843. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  2844. rc);
  2845. goto error_pinctrl_deinit;
  2846. }
  2847. rc = dsi_panel_bl_register(panel);
  2848. if (rc) {
  2849. if (rc != -EPROBE_DEFER)
  2850. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  2851. panel->name, rc);
  2852. goto error_gpio_release;
  2853. }
  2854. goto exit;
  2855. error_gpio_release:
  2856. (void)dsi_panel_gpio_release(panel);
  2857. error_pinctrl_deinit:
  2858. (void)dsi_panel_pinctrl_deinit(panel);
  2859. exit:
  2860. mutex_unlock(&panel->panel_lock);
  2861. return rc;
  2862. }
  2863. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2864. {
  2865. int rc = 0;
  2866. if (!panel) {
  2867. DSI_ERR("invalid params\n");
  2868. return -EINVAL;
  2869. }
  2870. mutex_lock(&panel->panel_lock);
  2871. rc = dsi_panel_bl_unregister(panel);
  2872. if (rc)
  2873. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  2874. panel->name, rc);
  2875. rc = dsi_panel_gpio_release(panel);
  2876. if (rc)
  2877. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  2878. rc);
  2879. rc = dsi_panel_pinctrl_deinit(panel);
  2880. if (rc)
  2881. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2882. rc);
  2883. rc = dsi_panel_vreg_put(panel);
  2884. if (rc)
  2885. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2886. panel->host = NULL;
  2887. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2888. mutex_unlock(&panel->panel_lock);
  2889. return rc;
  2890. }
  2891. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2892. struct dsi_display_mode *mode)
  2893. {
  2894. return 0;
  2895. }
  2896. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2897. {
  2898. const u32 SINGLE_MODE_SUPPORT = 1;
  2899. struct dsi_parser_utils *utils;
  2900. struct device_node *timings_np, *child_np;
  2901. int num_dfps_rates, num_bit_clks;
  2902. int num_video_modes = 0, num_cmd_modes = 0;
  2903. int count, rc = 0;
  2904. if (!panel) {
  2905. DSI_ERR("invalid params\n");
  2906. return -EINVAL;
  2907. }
  2908. utils = &panel->utils;
  2909. panel->num_timing_nodes = 0;
  2910. timings_np = utils->get_child_by_name(utils->data,
  2911. "qcom,mdss-dsi-display-timings");
  2912. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2913. DSI_ERR("no display timing nodes defined\n");
  2914. rc = -EINVAL;
  2915. goto error;
  2916. }
  2917. count = utils->get_child_count(timings_np);
  2918. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2919. count > DSI_MODE_MAX) {
  2920. DSI_ERR("invalid count of timing nodes: %d\n", count);
  2921. rc = -EINVAL;
  2922. goto error;
  2923. }
  2924. /* No multiresolution support is available for video mode panels.
  2925. * Multi-mode is supported for video mode during POMS is enabled.
  2926. */
  2927. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  2928. !panel->host_config.ext_bridge_mode &&
  2929. !panel->panel_mode_switch_enabled)
  2930. count = SINGLE_MODE_SUPPORT;
  2931. panel->num_timing_nodes = count;
  2932. dsi_for_each_child_node(timings_np, child_np) {
  2933. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  2934. num_video_modes++;
  2935. else if (utils->read_bool(child_np,
  2936. "qcom,mdss-dsi-cmd-mode"))
  2937. num_cmd_modes++;
  2938. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  2939. num_video_modes++;
  2940. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  2941. num_cmd_modes++;
  2942. }
  2943. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  2944. panel->dfps_caps.dfps_list_len;
  2945. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  2946. panel->dyn_clk_caps.bit_clk_list_len;
  2947. /*
  2948. * Inflate num_of_modes by fps and bit clks in dfps.
  2949. * Single command mode for video mode panels supporting
  2950. * panel operating mode switch.
  2951. */
  2952. num_video_modes = num_video_modes * num_bit_clks * num_dfps_rates;
  2953. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  2954. (panel->panel_mode_switch_enabled))
  2955. num_cmd_modes = 1;
  2956. else
  2957. num_cmd_modes = num_cmd_modes * num_bit_clks;
  2958. panel->num_display_modes = num_video_modes + num_cmd_modes;
  2959. error:
  2960. return rc;
  2961. }
  2962. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  2963. struct dsi_panel_phy_props *phy_props)
  2964. {
  2965. int rc = 0;
  2966. if (!panel || !phy_props) {
  2967. DSI_ERR("invalid params\n");
  2968. return -EINVAL;
  2969. }
  2970. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  2971. return rc;
  2972. }
  2973. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  2974. struct dsi_dfps_capabilities *dfps_caps)
  2975. {
  2976. int rc = 0;
  2977. if (!panel || !dfps_caps) {
  2978. DSI_ERR("invalid params\n");
  2979. return -EINVAL;
  2980. }
  2981. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  2982. return rc;
  2983. }
  2984. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  2985. {
  2986. int i;
  2987. if (!mode->priv_info)
  2988. return;
  2989. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  2990. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2991. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2992. }
  2993. kfree(mode->priv_info);
  2994. }
  2995. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  2996. struct dsi_display_mode *mode, u32 frame_threshold_us)
  2997. {
  2998. u32 frame_time_us,nslices;
  2999. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3000. dsi_transfer_time_us, pixel_clk_khz;
  3001. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3002. struct dsi_mode_info *timing = &mode->timing;
  3003. struct dsi_display_mode *display_mode;
  3004. u32 jitter_numer, jitter_denom, prefill_lines;
  3005. u32 min_threshold_us, prefill_time_us;
  3006. u16 bpp;
  3007. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  3008. * + 1 byte dcs data command.
  3009. */
  3010. const u32 packet_overhead = 56;
  3011. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3012. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3013. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3014. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3015. if (timing->refresh_rate >= 120)
  3016. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3017. if (timing->dsc_enabled) {
  3018. nslices = (timing->h_active)/(dsc->config.slice_width);
  3019. /* (slice width x bit-per-pixel + packet overhead) x
  3020. * number of slices x height x fps / lane
  3021. */
  3022. bpp = DSC_BPP(dsc->config);
  3023. bits_per_line = ((dsc->config.slice_width * bpp) +
  3024. packet_overhead) * nslices;
  3025. bits_per_line = bits_per_line / (config->num_data_lanes);
  3026. min_bitclk_hz = (bits_per_line * timing->v_active *
  3027. timing->refresh_rate);
  3028. } else {
  3029. total_active_pixels = ((dsi_h_active_dce(timing)
  3030. * timing->v_active));
  3031. /* calculate the actual bitclk needed to transfer the frame */
  3032. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3033. (config->bpp));
  3034. do_div(min_bitclk_hz, config->num_data_lanes);
  3035. }
  3036. timing->min_dsi_clk_hz = min_bitclk_hz;
  3037. if (timing->clk_rate_hz) {
  3038. /* adjust the transfer time proportionately for bit clk*/
  3039. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3040. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3041. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3042. } else if (mode->priv_info->mdp_transfer_time_us) {
  3043. timing->dsi_transfer_time_us =
  3044. mode->priv_info->mdp_transfer_time_us;
  3045. } else {
  3046. min_threshold_us = mult_frac(frame_time_us,
  3047. jitter_numer, (jitter_denom * 100));
  3048. /*
  3049. * Increase the prefill_lines proportionately as recommended
  3050. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3051. */
  3052. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3053. timing->refresh_rate, 60);
  3054. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3055. (timing->v_active));
  3056. /*
  3057. * Threshold is sum of panel jitter time, prefill line time
  3058. * plus 100usec buffer time.
  3059. */
  3060. min_threshold_us = min_threshold_us + 100 + prefill_time_us;
  3061. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3062. if (min_threshold_us > frame_threshold_us)
  3063. frame_threshold_us = min_threshold_us;
  3064. timing->dsi_transfer_time_us = frame_time_us -
  3065. frame_threshold_us;
  3066. }
  3067. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3068. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3069. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3070. timing->mdp_transfer_time_us =
  3071. mode->priv_info->mdp_transfer_time_us;
  3072. }
  3073. /* Calculate pclk_khz to update modeinfo */
  3074. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3075. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3076. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3077. do_div(pixel_clk_khz, config->bpp);
  3078. display_mode->pixel_clk_khz = pixel_clk_khz;
  3079. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3080. }
  3081. int dsi_panel_get_mode(struct dsi_panel *panel,
  3082. u32 index, struct dsi_display_mode *mode,
  3083. int topology_override)
  3084. {
  3085. struct device_node *timings_np, *child_np;
  3086. struct dsi_parser_utils *utils;
  3087. struct dsi_display_mode_priv_info *prv_info;
  3088. u32 child_idx = 0;
  3089. int rc = 0, num_timings;
  3090. int traffic_mode;
  3091. int panel_mode;
  3092. void *utils_data = NULL;
  3093. if (!panel || !mode) {
  3094. DSI_ERR("invalid params\n");
  3095. return -EINVAL;
  3096. }
  3097. mutex_lock(&panel->panel_lock);
  3098. utils = &panel->utils;
  3099. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3100. if (!mode->priv_info) {
  3101. rc = -ENOMEM;
  3102. goto done;
  3103. }
  3104. prv_info = mode->priv_info;
  3105. timings_np = utils->get_child_by_name(utils->data,
  3106. "qcom,mdss-dsi-display-timings");
  3107. if (!timings_np) {
  3108. DSI_ERR("no display timing nodes defined\n");
  3109. rc = -EINVAL;
  3110. goto parse_fail;
  3111. }
  3112. num_timings = utils->get_child_count(timings_np);
  3113. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3114. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3115. rc = -EINVAL;
  3116. goto parse_fail;
  3117. }
  3118. utils_data = utils->data;
  3119. traffic_mode = panel->video_config.traffic_mode;
  3120. panel_mode = panel->panel_mode;
  3121. dsi_for_each_child_node(timings_np, child_np) {
  3122. if (index != child_idx++)
  3123. continue;
  3124. utils->data = child_np;
  3125. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3126. if (rc) {
  3127. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3128. goto parse_fail;
  3129. }
  3130. rc = dsi_panel_parse_dsc_params(mode, utils);
  3131. if (rc) {
  3132. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3133. goto parse_fail;
  3134. }
  3135. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode,
  3136. panel_mode);
  3137. if (rc) {
  3138. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3139. goto parse_fail;
  3140. }
  3141. rc = dsi_panel_parse_topology(prv_info, utils,
  3142. topology_override);
  3143. if (rc) {
  3144. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3145. goto parse_fail;
  3146. }
  3147. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3148. if (rc) {
  3149. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3150. goto parse_fail;
  3151. }
  3152. rc = dsi_panel_parse_jitter_config(mode, utils);
  3153. if (rc)
  3154. DSI_ERR(
  3155. "failed to parse panel jitter config, rc=%d\n", rc);
  3156. rc = dsi_panel_parse_phy_timing(mode, utils);
  3157. if (rc) {
  3158. DSI_ERR(
  3159. "failed to parse panel phy timings, rc=%d\n", rc);
  3160. goto parse_fail;
  3161. }
  3162. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3163. if (rc)
  3164. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3165. if (panel->panel_mode_switch_enabled) {
  3166. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3167. if (rc) {
  3168. rc = 0;
  3169. mode->panel_mode = panel->panel_mode;
  3170. DSI_INFO(
  3171. "POMS: panel mode isn't specified in timing[%d]\n",
  3172. child_idx);
  3173. }
  3174. } else {
  3175. mode->panel_mode = panel->panel_mode;
  3176. }
  3177. }
  3178. goto done;
  3179. parse_fail:
  3180. kfree(mode->priv_info);
  3181. mode->priv_info = NULL;
  3182. done:
  3183. utils->data = utils_data;
  3184. mutex_unlock(&panel->panel_lock);
  3185. return rc;
  3186. }
  3187. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3188. struct dsi_display_mode *mode,
  3189. struct dsi_host_config *config)
  3190. {
  3191. int rc = 0;
  3192. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3193. if (!panel || !mode || !config) {
  3194. DSI_ERR("invalid params\n");
  3195. return -EINVAL;
  3196. }
  3197. mutex_lock(&panel->panel_lock);
  3198. config->panel_mode = panel->panel_mode;
  3199. memcpy(&config->common_config, &panel->host_config,
  3200. sizeof(config->common_config));
  3201. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3202. memcpy(&config->u.video_engine, &panel->video_config,
  3203. sizeof(config->u.video_engine));
  3204. } else {
  3205. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3206. sizeof(config->u.cmd_engine));
  3207. }
  3208. memcpy(&config->video_timing, &mode->timing,
  3209. sizeof(config->video_timing));
  3210. config->video_timing.mdp_transfer_time_us =
  3211. mode->priv_info->mdp_transfer_time_us;
  3212. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3213. config->video_timing.dsc = &mode->priv_info->dsc;
  3214. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3215. config->video_timing.vdc = &mode->priv_info->vdc;
  3216. if (dyn_clk_caps->dyn_clk_support)
  3217. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3218. else
  3219. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3220. config->esc_clk_rate_hz = 19200000;
  3221. mutex_unlock(&panel->panel_lock);
  3222. return rc;
  3223. }
  3224. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3225. {
  3226. int rc = 0;
  3227. if (!panel) {
  3228. DSI_ERR("invalid params\n");
  3229. return -EINVAL;
  3230. }
  3231. mutex_lock(&panel->panel_lock);
  3232. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3233. if (panel->lp11_init)
  3234. goto error;
  3235. rc = dsi_panel_power_on(panel);
  3236. if (rc) {
  3237. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3238. goto error;
  3239. }
  3240. error:
  3241. mutex_unlock(&panel->panel_lock);
  3242. return rc;
  3243. }
  3244. int dsi_panel_update_pps(struct dsi_panel *panel)
  3245. {
  3246. int rc = 0;
  3247. struct dsi_panel_cmd_set *set = NULL;
  3248. struct dsi_display_mode_priv_info *priv_info = NULL;
  3249. if (!panel || !panel->cur_mode) {
  3250. DSI_ERR("invalid params\n");
  3251. return -EINVAL;
  3252. }
  3253. mutex_lock(&panel->panel_lock);
  3254. priv_info = panel->cur_mode->priv_info;
  3255. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3256. if (priv_info->dsc_enabled)
  3257. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3258. panel->dce_pps_cmd, 0,
  3259. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3260. else if (priv_info->vdc_enabled)
  3261. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3262. panel->dce_pps_cmd, 0,
  3263. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3264. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3265. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3266. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3267. if (rc) {
  3268. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3269. goto error;
  3270. }
  3271. }
  3272. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3273. if (rc) {
  3274. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3275. panel->name, rc);
  3276. }
  3277. dsi_panel_destroy_cmd_packets(set);
  3278. error:
  3279. mutex_unlock(&panel->panel_lock);
  3280. return rc;
  3281. }
  3282. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3283. {
  3284. int rc = 0;
  3285. if (!panel) {
  3286. DSI_ERR("invalid params\n");
  3287. return -EINVAL;
  3288. }
  3289. mutex_lock(&panel->panel_lock);
  3290. if (!panel->panel_initialized)
  3291. goto exit;
  3292. /*
  3293. * Consider LP1->LP2->LP1.
  3294. * If the panel is already in LP mode, do not need to
  3295. * set the regulator.
  3296. * IBB and AB power mode would be set at the same time
  3297. * in PMIC driver, so we only call ibb setting that is enough.
  3298. */
  3299. if (dsi_panel_is_type_oled(panel) &&
  3300. panel->power_mode != SDE_MODE_DPMS_LP2)
  3301. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3302. "ibb", REGULATOR_MODE_IDLE);
  3303. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3304. if (rc)
  3305. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3306. panel->name, rc);
  3307. exit:
  3308. mutex_unlock(&panel->panel_lock);
  3309. return rc;
  3310. }
  3311. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3312. {
  3313. int rc = 0;
  3314. if (!panel) {
  3315. DSI_ERR("invalid params\n");
  3316. return -EINVAL;
  3317. }
  3318. mutex_lock(&panel->panel_lock);
  3319. if (!panel->panel_initialized)
  3320. goto exit;
  3321. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3322. if (rc)
  3323. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3324. panel->name, rc);
  3325. exit:
  3326. mutex_unlock(&panel->panel_lock);
  3327. return rc;
  3328. }
  3329. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3330. {
  3331. int rc = 0;
  3332. if (!panel) {
  3333. DSI_ERR("invalid params\n");
  3334. return -EINVAL;
  3335. }
  3336. mutex_lock(&panel->panel_lock);
  3337. if (!panel->panel_initialized)
  3338. goto exit;
  3339. /*
  3340. * Consider about LP1->LP2->NOLP.
  3341. */
  3342. if (dsi_panel_is_type_oled(panel) &&
  3343. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3344. panel->power_mode == SDE_MODE_DPMS_LP2))
  3345. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3346. "ibb", REGULATOR_MODE_NORMAL);
  3347. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3348. if (rc)
  3349. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3350. panel->name, rc);
  3351. exit:
  3352. mutex_unlock(&panel->panel_lock);
  3353. return rc;
  3354. }
  3355. int dsi_panel_prepare(struct dsi_panel *panel)
  3356. {
  3357. int rc = 0;
  3358. if (!panel) {
  3359. DSI_ERR("invalid params\n");
  3360. return -EINVAL;
  3361. }
  3362. mutex_lock(&panel->panel_lock);
  3363. if (panel->lp11_init) {
  3364. rc = dsi_panel_power_on(panel);
  3365. if (rc) {
  3366. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3367. panel->name, rc);
  3368. goto error;
  3369. }
  3370. }
  3371. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3372. if (rc) {
  3373. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3374. panel->name, rc);
  3375. goto error;
  3376. }
  3377. error:
  3378. mutex_unlock(&panel->panel_lock);
  3379. return rc;
  3380. }
  3381. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3382. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3383. {
  3384. static const int ROI_CMD_LEN = 5;
  3385. int rc = 0;
  3386. /* DTYPE_DCS_LWRITE */
  3387. char *caset, *paset;
  3388. set->cmds = NULL;
  3389. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3390. if (!caset) {
  3391. rc = -ENOMEM;
  3392. goto exit;
  3393. }
  3394. caset[0] = 0x2a;
  3395. caset[1] = (roi->x & 0xFF00) >> 8;
  3396. caset[2] = roi->x & 0xFF;
  3397. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3398. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3399. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3400. if (!paset) {
  3401. rc = -ENOMEM;
  3402. goto error_free_mem;
  3403. }
  3404. paset[0] = 0x2b;
  3405. paset[1] = (roi->y & 0xFF00) >> 8;
  3406. paset[2] = roi->y & 0xFF;
  3407. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3408. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3409. set->type = DSI_CMD_SET_ROI;
  3410. set->state = DSI_CMD_SET_STATE_LP;
  3411. set->count = 2; /* send caset + paset together */
  3412. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3413. if (!set->cmds) {
  3414. rc = -ENOMEM;
  3415. goto error_free_mem;
  3416. }
  3417. set->cmds[0].msg.channel = 0;
  3418. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3419. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3420. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3421. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3422. set->cmds[0].msg.tx_buf = caset;
  3423. set->cmds[0].msg.rx_len = 0;
  3424. set->cmds[0].msg.rx_buf = 0;
  3425. set->cmds[0].msg.wait_ms = 0;
  3426. set->cmds[0].last_command = 0;
  3427. set->cmds[0].post_wait_ms = 0;
  3428. set->cmds[1].msg.channel = 0;
  3429. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3430. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3431. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3432. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3433. set->cmds[1].msg.tx_buf = paset;
  3434. set->cmds[1].msg.rx_len = 0;
  3435. set->cmds[1].msg.rx_buf = 0;
  3436. set->cmds[1].msg.wait_ms = 0;
  3437. set->cmds[1].last_command = 1;
  3438. set->cmds[1].post_wait_ms = 0;
  3439. goto exit;
  3440. error_free_mem:
  3441. kfree(caset);
  3442. kfree(paset);
  3443. kfree(set->cmds);
  3444. exit:
  3445. return rc;
  3446. }
  3447. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3448. int ctrl_idx)
  3449. {
  3450. int rc = 0;
  3451. if (!panel) {
  3452. DSI_ERR("invalid params\n");
  3453. return -EINVAL;
  3454. }
  3455. mutex_lock(&panel->panel_lock);
  3456. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3457. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3458. if (rc)
  3459. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3460. panel->name, rc);
  3461. mutex_unlock(&panel->panel_lock);
  3462. return rc;
  3463. }
  3464. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3465. int ctrl_idx)
  3466. {
  3467. int rc = 0;
  3468. if (!panel) {
  3469. DSI_ERR("invalid params\n");
  3470. return -EINVAL;
  3471. }
  3472. mutex_lock(&panel->panel_lock);
  3473. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3474. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3475. if (rc)
  3476. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3477. panel->name, rc);
  3478. mutex_unlock(&panel->panel_lock);
  3479. return rc;
  3480. }
  3481. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3482. struct dsi_rect *roi)
  3483. {
  3484. int rc = 0;
  3485. struct dsi_panel_cmd_set *set;
  3486. struct dsi_display_mode_priv_info *priv_info;
  3487. if (!panel || !panel->cur_mode) {
  3488. DSI_ERR("Invalid params\n");
  3489. return -EINVAL;
  3490. }
  3491. priv_info = panel->cur_mode->priv_info;
  3492. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3493. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3494. if (rc) {
  3495. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3496. panel->name, rc);
  3497. return rc;
  3498. }
  3499. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3500. roi->x, roi->y, roi->w, roi->h);
  3501. mutex_lock(&panel->panel_lock);
  3502. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3503. if (rc)
  3504. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3505. panel->name, rc);
  3506. mutex_unlock(&panel->panel_lock);
  3507. dsi_panel_destroy_cmd_packets(set);
  3508. dsi_panel_dealloc_cmd_packets(set);
  3509. return rc;
  3510. }
  3511. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3512. {
  3513. int rc = 0;
  3514. if (!panel) {
  3515. DSI_ERR("Invalid params\n");
  3516. return -EINVAL;
  3517. }
  3518. mutex_lock(&panel->panel_lock);
  3519. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3520. if (rc)
  3521. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3522. panel->name, rc);
  3523. mutex_unlock(&panel->panel_lock);
  3524. return rc;
  3525. }
  3526. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3527. {
  3528. int rc = 0;
  3529. if (!panel) {
  3530. DSI_ERR("Invalid params\n");
  3531. return -EINVAL;
  3532. }
  3533. mutex_lock(&panel->panel_lock);
  3534. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3535. if (rc)
  3536. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3537. panel->name, rc);
  3538. mutex_unlock(&panel->panel_lock);
  3539. return rc;
  3540. }
  3541. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3542. {
  3543. int rc = 0;
  3544. if (!panel) {
  3545. DSI_ERR("Invalid params\n");
  3546. return -EINVAL;
  3547. }
  3548. mutex_lock(&panel->panel_lock);
  3549. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3550. if (rc)
  3551. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3552. panel->name, rc);
  3553. mutex_unlock(&panel->panel_lock);
  3554. return rc;
  3555. }
  3556. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3557. {
  3558. int rc = 0;
  3559. if (!panel) {
  3560. DSI_ERR("Invalid params\n");
  3561. return -EINVAL;
  3562. }
  3563. mutex_lock(&panel->panel_lock);
  3564. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3565. if (rc)
  3566. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3567. panel->name, rc);
  3568. mutex_unlock(&panel->panel_lock);
  3569. return rc;
  3570. }
  3571. int dsi_panel_switch(struct dsi_panel *panel)
  3572. {
  3573. int rc = 0;
  3574. if (!panel) {
  3575. DSI_ERR("Invalid params\n");
  3576. return -EINVAL;
  3577. }
  3578. mutex_lock(&panel->panel_lock);
  3579. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3580. if (rc)
  3581. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3582. panel->name, rc);
  3583. mutex_unlock(&panel->panel_lock);
  3584. return rc;
  3585. }
  3586. int dsi_panel_post_switch(struct dsi_panel *panel)
  3587. {
  3588. int rc = 0;
  3589. if (!panel) {
  3590. DSI_ERR("Invalid params\n");
  3591. return -EINVAL;
  3592. }
  3593. mutex_lock(&panel->panel_lock);
  3594. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3595. if (rc)
  3596. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3597. panel->name, rc);
  3598. mutex_unlock(&panel->panel_lock);
  3599. return rc;
  3600. }
  3601. int dsi_panel_enable(struct dsi_panel *panel)
  3602. {
  3603. int rc = 0;
  3604. if (!panel) {
  3605. DSI_ERR("Invalid params\n");
  3606. return -EINVAL;
  3607. }
  3608. mutex_lock(&panel->panel_lock);
  3609. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3610. if (rc)
  3611. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3612. panel->name, rc);
  3613. else
  3614. panel->panel_initialized = true;
  3615. mutex_unlock(&panel->panel_lock);
  3616. return rc;
  3617. }
  3618. int dsi_panel_post_enable(struct dsi_panel *panel)
  3619. {
  3620. int rc = 0;
  3621. if (!panel) {
  3622. DSI_ERR("invalid params\n");
  3623. return -EINVAL;
  3624. }
  3625. mutex_lock(&panel->panel_lock);
  3626. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3627. if (rc) {
  3628. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3629. panel->name, rc);
  3630. goto error;
  3631. }
  3632. error:
  3633. mutex_unlock(&panel->panel_lock);
  3634. return rc;
  3635. }
  3636. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3637. {
  3638. int rc = 0;
  3639. if (!panel) {
  3640. DSI_ERR("invalid params\n");
  3641. return -EINVAL;
  3642. }
  3643. mutex_lock(&panel->panel_lock);
  3644. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3645. if (rc) {
  3646. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3647. panel->name, rc);
  3648. goto error;
  3649. }
  3650. error:
  3651. mutex_unlock(&panel->panel_lock);
  3652. return rc;
  3653. }
  3654. int dsi_panel_disable(struct dsi_panel *panel)
  3655. {
  3656. int rc = 0;
  3657. if (!panel) {
  3658. DSI_ERR("invalid params\n");
  3659. return -EINVAL;
  3660. }
  3661. mutex_lock(&panel->panel_lock);
  3662. /* Avoid sending panel off commands when ESD recovery is underway */
  3663. if (!atomic_read(&panel->esd_recovery_pending)) {
  3664. /*
  3665. * Need to set IBB/AB regulator mode to STANDBY,
  3666. * if panel is going off from AOD mode.
  3667. */
  3668. if (dsi_panel_is_type_oled(panel) &&
  3669. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3670. panel->power_mode == SDE_MODE_DPMS_LP2))
  3671. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3672. "ibb", REGULATOR_MODE_STANDBY);
  3673. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3674. if (rc) {
  3675. /*
  3676. * Sending panel off commands may fail when DSI
  3677. * controller is in a bad state. These failures can be
  3678. * ignored since controller will go for full reset on
  3679. * subsequent display enable anyway.
  3680. */
  3681. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3682. panel->name, rc);
  3683. rc = 0;
  3684. }
  3685. }
  3686. panel->panel_initialized = false;
  3687. panel->power_mode = SDE_MODE_DPMS_OFF;
  3688. mutex_unlock(&panel->panel_lock);
  3689. return rc;
  3690. }
  3691. int dsi_panel_unprepare(struct dsi_panel *panel)
  3692. {
  3693. int rc = 0;
  3694. if (!panel) {
  3695. DSI_ERR("invalid params\n");
  3696. return -EINVAL;
  3697. }
  3698. mutex_lock(&panel->panel_lock);
  3699. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3700. if (rc) {
  3701. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3702. panel->name, rc);
  3703. goto error;
  3704. }
  3705. error:
  3706. mutex_unlock(&panel->panel_lock);
  3707. return rc;
  3708. }
  3709. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3710. {
  3711. int rc = 0;
  3712. if (!panel) {
  3713. DSI_ERR("invalid params\n");
  3714. return -EINVAL;
  3715. }
  3716. mutex_lock(&panel->panel_lock);
  3717. rc = dsi_panel_power_off(panel);
  3718. if (rc) {
  3719. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3720. panel->name, rc);
  3721. goto error;
  3722. }
  3723. error:
  3724. mutex_unlock(&panel->panel_lock);
  3725. return rc;
  3726. }