main.c 112 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #include "main.h"
  47. #include "qmi.h"
  48. #include "debug.h"
  49. #include "power.h"
  50. #include "genl.h"
  51. #define MAX_PROP_SIZE 32
  52. #define NUM_LOG_PAGES 10
  53. #define NUM_LOG_LONG_PAGES 4
  54. #define ICNSS_MAGIC 0x5abc5abc
  55. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  56. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  57. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  58. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  59. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  60. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  61. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  62. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  63. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  64. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  65. #define ICNSS_MAX_PROBE_CNT 2
  66. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  67. #define PROBE_TIMEOUT 15000
  68. #define SMP2P_SOC_WAKE_TIMEOUT 500
  69. #ifdef CONFIG_ICNSS2_DEBUG
  70. static unsigned long qmi_timeout = 3000;
  71. module_param(qmi_timeout, ulong, 0600);
  72. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  73. #else
  74. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  75. #endif
  76. static struct icnss_priv *penv;
  77. static struct work_struct wpss_loader;
  78. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  79. #define ICNSS_EVENT_PENDING 2989
  80. #define ICNSS_EVENT_SYNC BIT(0)
  81. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  82. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  83. ICNSS_EVENT_SYNC)
  84. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  85. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  86. #define SMP2P_GET_MAX_RETRY 4
  87. #define SMP2P_GET_RETRY_DELAY_MS 500
  88. #define RAMDUMP_NUM_DEVICES 256
  89. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  90. #define WLAN_EN_TEMP_THRESHOLD 5000
  91. #define WLAN_EN_DELAY 500
  92. #define ICNSS_RPROC_LEN 10
  93. static DEFINE_IDA(rd_minor_id);
  94. enum icnss_pdr_cause_index {
  95. ICNSS_FW_CRASH,
  96. ICNSS_ROOT_PD_CRASH,
  97. ICNSS_ROOT_PD_SHUTDOWN,
  98. ICNSS_HOST_ERROR,
  99. };
  100. static const char * const icnss_pdr_cause[] = {
  101. [ICNSS_FW_CRASH] = "FW crash",
  102. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  103. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  104. [ICNSS_HOST_ERROR] = "Host error",
  105. };
  106. static void icnss_set_plat_priv(struct icnss_priv *priv)
  107. {
  108. penv = priv;
  109. }
  110. static struct icnss_priv *icnss_get_plat_priv()
  111. {
  112. return penv;
  113. }
  114. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  115. struct kobj_attribute *attr,
  116. const char *buf, size_t count)
  117. {
  118. struct icnss_priv *priv = icnss_get_plat_priv();
  119. atomic_set(&priv->is_shutdown, true);
  120. icnss_pr_dbg("Received shutdown indication");
  121. return count;
  122. }
  123. static struct kobj_attribute icnss_sysfs_attribute =
  124. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  125. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  126. {
  127. if (atomic_inc_return(&priv->pm_count) != 1)
  128. return;
  129. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  130. atomic_read(&priv->pm_count));
  131. pm_stay_awake(&priv->pdev->dev);
  132. priv->stats.pm_stay_awake++;
  133. }
  134. static void icnss_pm_relax(struct icnss_priv *priv)
  135. {
  136. int r = atomic_dec_return(&priv->pm_count);
  137. WARN_ON(r < 0);
  138. if (r != 0)
  139. return;
  140. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  141. atomic_read(&priv->pm_count));
  142. pm_relax(&priv->pdev->dev);
  143. priv->stats.pm_relax++;
  144. }
  145. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  146. {
  147. switch (type) {
  148. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  149. return "SERVER_ARRIVE";
  150. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  151. return "SERVER_EXIT";
  152. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  153. return "FW_READY";
  154. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  155. return "REGISTER_DRIVER";
  156. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  157. return "UNREGISTER_DRIVER";
  158. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  159. return "PD_SERVICE_DOWN";
  160. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  161. return "FW_EARLY_CRASH_IND";
  162. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  163. return "IDLE_SHUTDOWN";
  164. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  165. return "IDLE_RESTART";
  166. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  167. return "FW_INIT_DONE";
  168. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  169. return "QDSS_TRACE_REQ_MEM";
  170. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  171. return "QDSS_TRACE_SAVE";
  172. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  173. return "QDSS_TRACE_FREE";
  174. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  175. return "M3_DUMP_UPLOAD";
  176. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  177. return "QDSS_TRACE_REQ_DATA";
  178. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  179. return "SUBSYS_RESTART_LEVEL";
  180. case ICNSS_DRIVER_EVENT_MAX:
  181. return "EVENT_MAX";
  182. }
  183. return "UNKNOWN";
  184. };
  185. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  186. {
  187. switch (type) {
  188. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  189. return "SOC_WAKE_REQUEST";
  190. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  191. return "SOC_WAKE_RELEASE";
  192. case ICNSS_SOC_WAKE_EVENT_MAX:
  193. return "SOC_EVENT_MAX";
  194. }
  195. return "UNKNOWN";
  196. };
  197. int icnss_driver_event_post(struct icnss_priv *priv,
  198. enum icnss_driver_event_type type,
  199. u32 flags, void *data)
  200. {
  201. struct icnss_driver_event *event;
  202. unsigned long irq_flags;
  203. int gfp = GFP_KERNEL;
  204. int ret = 0;
  205. if (!priv)
  206. return -ENODEV;
  207. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  208. icnss_driver_event_to_str(type), type, current->comm,
  209. flags, priv->state);
  210. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  211. icnss_pr_err("Invalid Event type: %d, can't post", type);
  212. return -EINVAL;
  213. }
  214. if (in_interrupt() || irqs_disabled())
  215. gfp = GFP_ATOMIC;
  216. event = kzalloc(sizeof(*event), gfp);
  217. if (event == NULL)
  218. return -ENOMEM;
  219. icnss_pm_stay_awake(priv);
  220. event->type = type;
  221. event->data = data;
  222. init_completion(&event->complete);
  223. event->ret = ICNSS_EVENT_PENDING;
  224. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  225. spin_lock_irqsave(&priv->event_lock, irq_flags);
  226. list_add_tail(&event->list, &priv->event_list);
  227. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  228. priv->stats.events[type].posted++;
  229. queue_work(priv->event_wq, &priv->event_work);
  230. if (!(flags & ICNSS_EVENT_SYNC))
  231. goto out;
  232. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  233. wait_for_completion(&event->complete);
  234. else
  235. ret = wait_for_completion_interruptible(&event->complete);
  236. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  237. icnss_driver_event_to_str(type), type, priv->state, ret,
  238. event->ret);
  239. spin_lock_irqsave(&priv->event_lock, irq_flags);
  240. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  241. event->sync = false;
  242. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  243. ret = -EINTR;
  244. goto out;
  245. }
  246. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  247. ret = event->ret;
  248. kfree(event);
  249. out:
  250. icnss_pm_relax(priv);
  251. return ret;
  252. }
  253. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  254. enum icnss_soc_wake_event_type type,
  255. u32 flags, void *data)
  256. {
  257. struct icnss_soc_wake_event *event;
  258. unsigned long irq_flags;
  259. int gfp = GFP_KERNEL;
  260. int ret = 0;
  261. if (!priv)
  262. return -ENODEV;
  263. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  264. icnss_soc_wake_event_to_str(type),
  265. type, current->comm, flags, priv->state);
  266. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  267. icnss_pr_err("Invalid Event type: %d, can't post", type);
  268. return -EINVAL;
  269. }
  270. if (in_interrupt() || irqs_disabled())
  271. gfp = GFP_ATOMIC;
  272. event = kzalloc(sizeof(*event), gfp);
  273. if (!event)
  274. return -ENOMEM;
  275. icnss_pm_stay_awake(priv);
  276. event->type = type;
  277. event->data = data;
  278. init_completion(&event->complete);
  279. event->ret = ICNSS_EVENT_PENDING;
  280. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  281. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  282. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  283. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  284. priv->stats.soc_wake_events[type].posted++;
  285. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  286. if (!(flags & ICNSS_EVENT_SYNC))
  287. goto out;
  288. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  289. wait_for_completion(&event->complete);
  290. else
  291. ret = wait_for_completion_interruptible(&event->complete);
  292. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  293. icnss_soc_wake_event_to_str(type),
  294. type, priv->state, ret, event->ret);
  295. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  296. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  297. event->sync = false;
  298. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  299. ret = -EINTR;
  300. goto out;
  301. }
  302. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  303. ret = event->ret;
  304. kfree(event);
  305. out:
  306. icnss_pm_relax(priv);
  307. return ret;
  308. }
  309. bool icnss_is_fw_ready(void)
  310. {
  311. if (!penv)
  312. return false;
  313. else
  314. return test_bit(ICNSS_FW_READY, &penv->state);
  315. }
  316. EXPORT_SYMBOL(icnss_is_fw_ready);
  317. void icnss_block_shutdown(bool status)
  318. {
  319. if (!penv)
  320. return;
  321. if (status) {
  322. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  323. reinit_completion(&penv->unblock_shutdown);
  324. } else {
  325. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  326. complete(&penv->unblock_shutdown);
  327. }
  328. }
  329. EXPORT_SYMBOL(icnss_block_shutdown);
  330. bool icnss_is_fw_down(void)
  331. {
  332. struct icnss_priv *priv = icnss_get_plat_priv();
  333. if (!priv)
  334. return false;
  335. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  336. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  337. test_bit(ICNSS_REJUVENATE, &priv->state);
  338. }
  339. EXPORT_SYMBOL(icnss_is_fw_down);
  340. unsigned long icnss_get_device_config(void)
  341. {
  342. struct icnss_priv *priv = icnss_get_plat_priv();
  343. if (!priv)
  344. return 0;
  345. return priv->device_config;
  346. }
  347. EXPORT_SYMBOL(icnss_get_device_config);
  348. bool icnss_is_rejuvenate(void)
  349. {
  350. if (!penv)
  351. return false;
  352. else
  353. return test_bit(ICNSS_REJUVENATE, &penv->state);
  354. }
  355. EXPORT_SYMBOL(icnss_is_rejuvenate);
  356. bool icnss_is_pdr(void)
  357. {
  358. if (!penv)
  359. return false;
  360. else
  361. return test_bit(ICNSS_PDR, &penv->state);
  362. }
  363. EXPORT_SYMBOL(icnss_is_pdr);
  364. static int icnss_send_smp2p(struct icnss_priv *priv,
  365. enum icnss_smp2p_msg_id msg_id,
  366. enum smp2p_out_entry smp2p_entry)
  367. {
  368. unsigned int value = 0;
  369. int ret;
  370. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  371. return -EINVAL;
  372. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  373. if (msg_id == ICNSS_RESET_MSG) {
  374. priv->smp2p_info[smp2p_entry].seq = 0;
  375. ret = qcom_smem_state_update_bits(
  376. priv->smp2p_info[smp2p_entry].smem_state,
  377. ICNSS_SMEM_VALUE_MASK,
  378. 0);
  379. if (ret)
  380. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  381. ret, icnss_smp2p_str[smp2p_entry]);
  382. return ret;
  383. }
  384. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  385. return -ENODEV;
  386. value |= priv->smp2p_info[smp2p_entry].seq++;
  387. value <<= ICNSS_SMEM_SEQ_NO_POS;
  388. value |= msg_id;
  389. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  390. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  391. reinit_completion(&penv->smp2p_soc_wake_wait);
  392. ret = qcom_smem_state_update_bits(
  393. priv->smp2p_info[smp2p_entry].smem_state,
  394. ICNSS_SMEM_VALUE_MASK,
  395. value);
  396. if (ret) {
  397. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  398. icnss_smp2p_str[smp2p_entry]);
  399. } else {
  400. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  401. msg_id == ICNSS_SOC_WAKE_REL) {
  402. if (!wait_for_completion_timeout(
  403. &priv->smp2p_soc_wake_wait,
  404. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  405. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  406. icnss_smp2p_str[smp2p_entry]);
  407. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  408. ICNSS_ASSERT(0);
  409. }
  410. }
  411. }
  412. return ret;
  413. }
  414. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  415. {
  416. struct icnss_priv *priv = ctx;
  417. if (priv)
  418. priv->force_err_fatal = true;
  419. icnss_pr_err("Received force error fatal request from FW\n");
  420. return IRQ_HANDLED;
  421. }
  422. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  423. {
  424. struct icnss_priv *priv = ctx;
  425. struct icnss_uevent_fw_down_data fw_down_data = {0};
  426. icnss_pr_err("Received early crash indication from FW\n");
  427. if (priv) {
  428. set_bit(ICNSS_FW_DOWN, &priv->state);
  429. icnss_ignore_fw_timeout(true);
  430. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  431. clear_bit(ICNSS_FW_READY, &priv->state);
  432. fw_down_data.crashed = true;
  433. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  434. &fw_down_data);
  435. }
  436. }
  437. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  438. 0, NULL);
  439. return IRQ_HANDLED;
  440. }
  441. static void register_fw_error_notifications(struct device *dev)
  442. {
  443. struct icnss_priv *priv = dev_get_drvdata(dev);
  444. struct device_node *dev_node;
  445. int irq = 0, ret = 0;
  446. if (!priv)
  447. return;
  448. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  449. if (!dev_node) {
  450. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  451. return;
  452. }
  453. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  454. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  455. ret = irq = of_irq_get_byname(dev_node,
  456. "qcom,smp2p-force-fatal-error");
  457. if (ret < 0) {
  458. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  459. irq);
  460. return;
  461. }
  462. }
  463. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  464. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  465. "wlanfw-err", priv);
  466. if (ret < 0) {
  467. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  468. irq, ret);
  469. return;
  470. }
  471. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  472. priv->fw_error_fatal_irq = irq;
  473. }
  474. static void register_early_crash_notifications(struct device *dev)
  475. {
  476. struct icnss_priv *priv = dev_get_drvdata(dev);
  477. struct device_node *dev_node;
  478. int irq = 0, ret = 0;
  479. if (!priv)
  480. return;
  481. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  482. if (!dev_node) {
  483. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  484. return;
  485. }
  486. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  487. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  488. ret = irq = of_irq_get_byname(dev_node,
  489. "qcom,smp2p-early-crash-ind");
  490. if (ret < 0) {
  491. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  492. irq);
  493. return;
  494. }
  495. }
  496. ret = devm_request_threaded_irq(dev, irq, NULL,
  497. fw_crash_indication_handler,
  498. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  499. "wlanfw-early-crash-ind", priv);
  500. if (ret < 0) {
  501. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  502. irq, ret);
  503. return;
  504. }
  505. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  506. priv->fw_early_crash_irq = irq;
  507. }
  508. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  509. {
  510. struct thermal_zone_device *thermal_dev;
  511. const char *tsens;
  512. int ret;
  513. ret = of_property_read_string(priv->pdev->dev.of_node,
  514. "tsens",
  515. &tsens);
  516. if (ret)
  517. return ret;
  518. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  519. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  520. if (IS_ERR(thermal_dev)) {
  521. icnss_pr_err("Fail to get thermal zone. ret: %d",
  522. PTR_ERR(thermal_dev));
  523. return PTR_ERR(thermal_dev);
  524. }
  525. ret = thermal_zone_get_temp(thermal_dev, temp);
  526. if (ret)
  527. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  528. return ret;
  529. }
  530. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  531. {
  532. struct icnss_priv *priv = ctx;
  533. if (priv)
  534. complete(&priv->smp2p_soc_wake_wait);
  535. return IRQ_HANDLED;
  536. }
  537. static void register_soc_wake_notif(struct device *dev)
  538. {
  539. struct icnss_priv *priv = dev_get_drvdata(dev);
  540. struct device_node *dev_node;
  541. int irq = 0, ret = 0;
  542. if (!priv)
  543. return;
  544. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  545. if (!dev_node) {
  546. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  547. return;
  548. }
  549. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  550. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  551. ret = irq = of_irq_get_byname(dev_node,
  552. "qcom,smp2p-soc-wake-ack");
  553. if (ret < 0) {
  554. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  555. irq);
  556. return;
  557. }
  558. }
  559. ret = devm_request_threaded_irq(dev, irq, NULL,
  560. fw_soc_wake_ack_handler,
  561. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  562. IRQF_TRIGGER_FALLING,
  563. "wlanfw-soc-wake-ack", priv);
  564. if (ret < 0) {
  565. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  566. irq, ret);
  567. return;
  568. }
  569. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  570. priv->fw_soc_wake_ack_irq = irq;
  571. }
  572. int icnss_call_driver_uevent(struct icnss_priv *priv,
  573. enum icnss_uevent uevent, void *data)
  574. {
  575. struct icnss_uevent_data uevent_data;
  576. if (!priv->ops || !priv->ops->uevent)
  577. return 0;
  578. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  579. priv->state, uevent);
  580. uevent_data.uevent = uevent;
  581. uevent_data.data = data;
  582. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  583. }
  584. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  585. {
  586. int i;
  587. int ret = 0;
  588. ret = icnss_qmi_get_dms_mac(priv);
  589. if (ret == 0 && priv->dms.mac_valid)
  590. goto qmi_send;
  591. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  592. * Thus assert on failure to get MAC from DMS even after retries
  593. */
  594. if (priv->use_nv_mac) {
  595. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  596. if (priv->dms.mac_valid)
  597. break;
  598. ret = icnss_qmi_get_dms_mac(priv);
  599. if (ret != -EAGAIN)
  600. break;
  601. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  602. }
  603. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  604. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  605. ICNSS_ASSERT(0);
  606. return -EINVAL;
  607. }
  608. }
  609. qmi_send:
  610. if (priv->dms.mac_valid)
  611. ret =
  612. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  613. ARRAY_SIZE(priv->dms.mac));
  614. return ret;
  615. }
  616. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  617. enum smp2p_out_entry smp2p_entry)
  618. {
  619. int retry = 0;
  620. int error;
  621. if (priv->smp2p_info[smp2p_entry].smem_state)
  622. return;
  623. retry:
  624. priv->smp2p_info[smp2p_entry].smem_state =
  625. qcom_smem_state_get(&priv->pdev->dev,
  626. icnss_smp2p_str[smp2p_entry],
  627. &priv->smp2p_info[smp2p_entry].smem_bit);
  628. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  629. if (retry++ < SMP2P_GET_MAX_RETRY) {
  630. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  631. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  632. error, icnss_smp2p_str[smp2p_entry]);
  633. msleep(SMP2P_GET_RETRY_DELAY_MS);
  634. goto retry;
  635. }
  636. ICNSS_ASSERT(0);
  637. return;
  638. }
  639. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  640. }
  641. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  642. void *data)
  643. {
  644. int ret = 0;
  645. int temp = 0;
  646. bool ignore_assert = false;
  647. if (!priv)
  648. return -ENODEV;
  649. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  650. clear_bit(ICNSS_FW_DOWN, &priv->state);
  651. clear_bit(ICNSS_FW_READY, &priv->state);
  652. icnss_ignore_fw_timeout(false);
  653. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  654. icnss_pr_err("QMI Server already in Connected State\n");
  655. ICNSS_ASSERT(0);
  656. }
  657. ret = icnss_connect_to_fw_server(priv, data);
  658. if (ret)
  659. goto fail;
  660. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  661. ret = wlfw_ind_register_send_sync_msg(priv);
  662. if (ret < 0) {
  663. if (ret == -EALREADY) {
  664. ret = 0;
  665. goto qmi_registered;
  666. }
  667. ignore_assert = true;
  668. goto fail;
  669. }
  670. if (priv->device_id == WCN6750_DEVICE_ID) {
  671. if (!icnss_get_temperature(priv, &temp)) {
  672. icnss_pr_dbg("Temperature: %d\n", temp);
  673. if (temp < WLAN_EN_TEMP_THRESHOLD)
  674. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  675. }
  676. ret = wlfw_host_cap_send_sync(priv);
  677. if (ret < 0)
  678. goto fail;
  679. }
  680. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  681. if (!priv->msa_va) {
  682. icnss_pr_err("Invalid MSA address\n");
  683. ret = -EINVAL;
  684. goto fail;
  685. }
  686. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  687. if (ret < 0) {
  688. ignore_assert = true;
  689. goto fail;
  690. }
  691. ret = wlfw_msa_ready_send_sync_msg(priv);
  692. if (ret < 0) {
  693. ignore_assert = true;
  694. goto fail;
  695. }
  696. }
  697. ret = wlfw_cap_send_sync_msg(priv);
  698. if (ret < 0) {
  699. ignore_assert = true;
  700. goto fail;
  701. }
  702. ret = icnss_hw_power_on(priv);
  703. if (ret)
  704. goto fail;
  705. if (priv->device_id == WCN6750_DEVICE_ID) {
  706. ret = wlfw_device_info_send_msg(priv);
  707. if (ret < 0) {
  708. ignore_assert = true;
  709. goto device_info_failure;
  710. }
  711. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  712. priv->mem_base_pa,
  713. priv->mem_base_size);
  714. if (!priv->mem_base_va) {
  715. icnss_pr_err("Ioremap failed for bar address\n");
  716. goto device_info_failure;
  717. }
  718. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  719. &priv->mem_base_pa,
  720. priv->mem_base_va);
  721. if (priv->mhi_state_info_pa)
  722. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  723. priv->mhi_state_info_pa,
  724. PAGE_SIZE);
  725. if (!priv->mhi_state_info_va)
  726. icnss_pr_err("Ioremap failed for MHI info address\n");
  727. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  728. &priv->mhi_state_info_pa,
  729. priv->mhi_state_info_va);
  730. }
  731. if (priv->bdf_download_support) {
  732. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  733. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  734. priv->ctrl_params.bdf_type);
  735. if (ret < 0)
  736. goto device_info_failure;
  737. }
  738. if (priv->device_id == WCN6750_DEVICE_ID) {
  739. if (!priv->fw_soc_wake_ack_irq)
  740. register_soc_wake_notif(&priv->pdev->dev);
  741. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  742. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  743. }
  744. if (priv->wpss_supported)
  745. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  746. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  747. if (priv->bdf_download_support) {
  748. ret = wlfw_cal_report_req(priv);
  749. if (ret < 0)
  750. goto device_info_failure;
  751. }
  752. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  753. dynamic_feature_mask);
  754. }
  755. if (!priv->fw_error_fatal_irq)
  756. register_fw_error_notifications(&priv->pdev->dev);
  757. if (!priv->fw_early_crash_irq)
  758. register_early_crash_notifications(&priv->pdev->dev);
  759. if (priv->psf_supported)
  760. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  761. return ret;
  762. device_info_failure:
  763. icnss_hw_power_off(priv);
  764. fail:
  765. ICNSS_ASSERT(ignore_assert);
  766. qmi_registered:
  767. return ret;
  768. }
  769. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  770. {
  771. if (!priv)
  772. return -ENODEV;
  773. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  774. icnss_clear_server(priv);
  775. if (priv->psf_supported)
  776. priv->last_updated_voltage = 0;
  777. return 0;
  778. }
  779. static int icnss_call_driver_probe(struct icnss_priv *priv)
  780. {
  781. int ret = 0;
  782. int probe_cnt = 0;
  783. if (!priv->ops || !priv->ops->probe)
  784. return 0;
  785. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  786. return -EINVAL;
  787. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  788. icnss_hw_power_on(priv);
  789. icnss_block_shutdown(true);
  790. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  791. ret = priv->ops->probe(&priv->pdev->dev);
  792. probe_cnt++;
  793. if (ret != -EPROBE_DEFER)
  794. break;
  795. }
  796. if (ret < 0) {
  797. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  798. ret, priv->state, probe_cnt);
  799. icnss_block_shutdown(false);
  800. goto out;
  801. }
  802. icnss_block_shutdown(false);
  803. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  804. return 0;
  805. out:
  806. icnss_hw_power_off(priv);
  807. return ret;
  808. }
  809. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  810. {
  811. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  812. goto out;
  813. if (!priv->ops || !priv->ops->shutdown)
  814. goto out;
  815. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  816. goto out;
  817. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  818. priv->ops->shutdown(&priv->pdev->dev);
  819. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  820. out:
  821. return 0;
  822. }
  823. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  824. {
  825. int ret = 0;
  826. icnss_pm_relax(priv);
  827. icnss_call_driver_shutdown(priv);
  828. clear_bit(ICNSS_PDR, &priv->state);
  829. clear_bit(ICNSS_REJUVENATE, &priv->state);
  830. clear_bit(ICNSS_PD_RESTART, &priv->state);
  831. priv->early_crash_ind = false;
  832. priv->is_ssr = false;
  833. if (!priv->ops || !priv->ops->reinit)
  834. goto out;
  835. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  836. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  837. priv->state);
  838. goto out;
  839. }
  840. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  841. goto call_probe;
  842. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  843. icnss_hw_power_on(priv);
  844. icnss_block_shutdown(true);
  845. ret = priv->ops->reinit(&priv->pdev->dev);
  846. if (ret < 0) {
  847. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  848. ret, priv->state);
  849. if (!priv->allow_recursive_recovery)
  850. ICNSS_ASSERT(false);
  851. icnss_block_shutdown(false);
  852. goto out_power_off;
  853. }
  854. icnss_block_shutdown(false);
  855. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  856. return 0;
  857. call_probe:
  858. return icnss_call_driver_probe(priv);
  859. out_power_off:
  860. icnss_hw_power_off(priv);
  861. out:
  862. return ret;
  863. }
  864. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  865. {
  866. int ret = 0;
  867. if (!priv)
  868. return -ENODEV;
  869. set_bit(ICNSS_FW_READY, &priv->state);
  870. clear_bit(ICNSS_MODE_ON, &priv->state);
  871. atomic_set(&priv->soc_wake_ref_count, 0);
  872. if (priv->device_id == WCN6750_DEVICE_ID)
  873. icnss_free_qdss_mem(priv);
  874. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  875. icnss_hw_power_off(priv);
  876. if (!priv->pdev) {
  877. icnss_pr_err("Device is not ready\n");
  878. ret = -ENODEV;
  879. goto out;
  880. }
  881. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  882. ret = icnss_pd_restart_complete(priv);
  883. } else {
  884. if (priv->wpss_supported)
  885. icnss_setup_dms_mac(priv);
  886. ret = icnss_call_driver_probe(priv);
  887. }
  888. icnss_vreg_unvote(priv);
  889. out:
  890. return ret;
  891. }
  892. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  893. {
  894. int ret = 0;
  895. if (!priv)
  896. return -ENODEV;
  897. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  898. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  899. icnss_pr_info("Failed to download qdss configuration file");
  900. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state))
  901. ret = wlfw_wlan_mode_send_sync_msg(priv,
  902. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  903. else
  904. icnss_driver_event_fw_ready_ind(priv, NULL);
  905. return ret;
  906. }
  907. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  908. {
  909. struct platform_device *pdev = priv->pdev;
  910. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  911. int i, j;
  912. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  913. if (!qdss_mem[i].va && qdss_mem[i].size) {
  914. qdss_mem[i].va =
  915. dma_alloc_coherent(&pdev->dev,
  916. qdss_mem[i].size,
  917. &qdss_mem[i].pa,
  918. GFP_KERNEL);
  919. if (!qdss_mem[i].va) {
  920. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  921. qdss_mem[i].size,
  922. qdss_mem[i].type, i);
  923. break;
  924. }
  925. }
  926. }
  927. /* Best-effort allocation for QDSS trace */
  928. if (i < priv->qdss_mem_seg_len) {
  929. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  930. qdss_mem[j].type = 0;
  931. qdss_mem[j].size = 0;
  932. }
  933. priv->qdss_mem_seg_len = i;
  934. }
  935. return 0;
  936. }
  937. void icnss_free_qdss_mem(struct icnss_priv *priv)
  938. {
  939. struct platform_device *pdev = priv->pdev;
  940. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  941. int i;
  942. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  943. if (qdss_mem[i].va && qdss_mem[i].size) {
  944. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  945. &qdss_mem[i].pa, qdss_mem[i].size,
  946. qdss_mem[i].type);
  947. dma_free_coherent(&pdev->dev,
  948. qdss_mem[i].size, qdss_mem[i].va,
  949. qdss_mem[i].pa);
  950. qdss_mem[i].va = NULL;
  951. qdss_mem[i].pa = 0;
  952. qdss_mem[i].size = 0;
  953. qdss_mem[i].type = 0;
  954. }
  955. }
  956. priv->qdss_mem_seg_len = 0;
  957. }
  958. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  959. {
  960. int ret = 0;
  961. ret = icnss_alloc_qdss_mem(priv);
  962. if (ret < 0)
  963. return ret;
  964. return wlfw_qdss_trace_mem_info_send_sync(priv);
  965. }
  966. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  967. u64 pa, u32 size, int *seg_id)
  968. {
  969. int i = 0;
  970. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  971. u64 offset = 0;
  972. void *va = NULL;
  973. u64 local_pa;
  974. u32 local_size;
  975. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  976. local_pa = (u64)qdss_mem[i].pa;
  977. local_size = (u32)qdss_mem[i].size;
  978. if (pa == local_pa && size <= local_size) {
  979. va = qdss_mem[i].va;
  980. break;
  981. }
  982. if (pa > local_pa &&
  983. pa < local_pa + local_size &&
  984. pa + size <= local_pa + local_size) {
  985. offset = pa - local_pa;
  986. va = qdss_mem[i].va + offset;
  987. break;
  988. }
  989. }
  990. *seg_id = i;
  991. return va;
  992. }
  993. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  994. void *data)
  995. {
  996. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  997. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  998. int ret = 0;
  999. int i;
  1000. void *va = NULL;
  1001. u64 pa;
  1002. u32 size;
  1003. int seg_id = 0;
  1004. if (!priv->qdss_mem_seg_len) {
  1005. icnss_pr_err("Memory for QDSS trace is not available\n");
  1006. return -ENOMEM;
  1007. }
  1008. if (event_data->mem_seg_len == 0) {
  1009. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1010. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1011. ICNSS_GENL_MSG_TYPE_QDSS,
  1012. event_data->file_name,
  1013. qdss_mem[i].size);
  1014. if (ret < 0) {
  1015. icnss_pr_err("Fail to save QDSS data: %d\n",
  1016. ret);
  1017. break;
  1018. }
  1019. }
  1020. } else {
  1021. for (i = 0; i < event_data->mem_seg_len; i++) {
  1022. pa = event_data->mem_seg[i].addr;
  1023. size = event_data->mem_seg[i].size;
  1024. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1025. size, &seg_id);
  1026. if (!va) {
  1027. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1028. &pa);
  1029. ret = -EINVAL;
  1030. break;
  1031. }
  1032. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1033. event_data->file_name, size);
  1034. if (ret < 0) {
  1035. icnss_pr_err("Fail to save QDSS data: %d\n",
  1036. ret);
  1037. break;
  1038. }
  1039. }
  1040. }
  1041. kfree(data);
  1042. return ret;
  1043. }
  1044. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1045. {
  1046. int dec, c = atomic_read(v);
  1047. do {
  1048. dec = c - 1;
  1049. if (unlikely(dec < 1))
  1050. break;
  1051. } while (!atomic_try_cmpxchg(v, &c, dec));
  1052. return dec;
  1053. }
  1054. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1055. void *data)
  1056. {
  1057. int ret = 0;
  1058. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1059. if (!priv)
  1060. return -ENODEV;
  1061. if (!data)
  1062. return -EINVAL;
  1063. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1064. event_data->total_size);
  1065. kfree(data);
  1066. return ret;
  1067. }
  1068. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1069. {
  1070. int ret = 0;
  1071. if (!priv)
  1072. return -ENODEV;
  1073. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1074. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1075. atomic_read(&priv->soc_wake_ref_count));
  1076. return 0;
  1077. }
  1078. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1079. ICNSS_SMP2P_OUT_SOC_WAKE);
  1080. if (!ret)
  1081. atomic_inc(&priv->soc_wake_ref_count);
  1082. return ret;
  1083. }
  1084. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1085. {
  1086. int ret = 0;
  1087. if (!priv)
  1088. return -ENODEV;
  1089. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1090. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1091. priv->soc_wake_ref_count);
  1092. return 0;
  1093. }
  1094. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1095. ICNSS_SMP2P_OUT_SOC_WAKE);
  1096. return ret;
  1097. }
  1098. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1099. void *data)
  1100. {
  1101. int ret = 0;
  1102. int probe_cnt = 0;
  1103. if (priv->ops)
  1104. return -EEXIST;
  1105. priv->ops = data;
  1106. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1107. set_bit(ICNSS_FW_READY, &priv->state);
  1108. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1109. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1110. priv->state);
  1111. return -ENODEV;
  1112. }
  1113. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1114. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1115. priv->state);
  1116. goto out;
  1117. }
  1118. ret = icnss_hw_power_on(priv);
  1119. if (ret)
  1120. goto out;
  1121. icnss_block_shutdown(true);
  1122. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1123. ret = priv->ops->probe(&priv->pdev->dev);
  1124. probe_cnt++;
  1125. if (ret != -EPROBE_DEFER)
  1126. break;
  1127. }
  1128. if (ret) {
  1129. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1130. ret, priv->state, probe_cnt);
  1131. icnss_block_shutdown(false);
  1132. goto power_off;
  1133. }
  1134. icnss_block_shutdown(false);
  1135. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1136. return 0;
  1137. power_off:
  1138. icnss_hw_power_off(priv);
  1139. out:
  1140. return ret;
  1141. }
  1142. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1143. void *data)
  1144. {
  1145. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1146. priv->ops = NULL;
  1147. goto out;
  1148. }
  1149. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1150. icnss_block_shutdown(true);
  1151. if (priv->ops)
  1152. priv->ops->remove(&priv->pdev->dev);
  1153. icnss_block_shutdown(false);
  1154. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1155. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1156. priv->ops = NULL;
  1157. icnss_hw_power_off(priv);
  1158. out:
  1159. return 0;
  1160. }
  1161. static int icnss_fw_crashed(struct icnss_priv *priv,
  1162. struct icnss_event_pd_service_down_data *event_data)
  1163. {
  1164. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1165. set_bit(ICNSS_PD_RESTART, &priv->state);
  1166. clear_bit(ICNSS_FW_READY, &priv->state);
  1167. icnss_pm_stay_awake(priv);
  1168. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1169. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1170. if (event_data && event_data->fw_rejuvenate)
  1171. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1172. return 0;
  1173. }
  1174. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1175. struct icnss_uevent_hang_data *hang_data)
  1176. {
  1177. if (!priv->hang_event_data_va)
  1178. return -EINVAL;
  1179. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1180. priv->hang_event_data_len,
  1181. GFP_ATOMIC);
  1182. if (!priv->hang_event_data)
  1183. return -ENOMEM;
  1184. // Update the hang event params
  1185. hang_data->hang_event_data = priv->hang_event_data;
  1186. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1187. return 0;
  1188. }
  1189. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1190. {
  1191. struct icnss_uevent_hang_data hang_data = {0};
  1192. int ret = 0xFF;
  1193. if (priv->early_crash_ind) {
  1194. ret = icnss_update_hang_event_data(priv, &hang_data);
  1195. if (ret)
  1196. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1197. }
  1198. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1199. &hang_data);
  1200. if (!ret) {
  1201. kfree(priv->hang_event_data);
  1202. priv->hang_event_data = NULL;
  1203. }
  1204. return 0;
  1205. }
  1206. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1207. void *data)
  1208. {
  1209. struct icnss_event_pd_service_down_data *event_data = data;
  1210. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1211. icnss_ignore_fw_timeout(false);
  1212. goto out;
  1213. }
  1214. if (priv->force_err_fatal)
  1215. ICNSS_ASSERT(0);
  1216. if (priv->device_id == WCN6750_DEVICE_ID) {
  1217. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1218. ICNSS_SMP2P_OUT_SOC_WAKE);
  1219. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1220. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1221. }
  1222. if (priv->wpss_supported)
  1223. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1224. ICNSS_SMP2P_OUT_POWER_SAVE);
  1225. icnss_send_hang_event_data(priv);
  1226. if (priv->early_crash_ind) {
  1227. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1228. event_data->crashed, priv->state);
  1229. goto out;
  1230. }
  1231. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1232. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1233. event_data->crashed, priv->state);
  1234. if (!priv->allow_recursive_recovery)
  1235. ICNSS_ASSERT(0);
  1236. goto out;
  1237. }
  1238. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1239. icnss_fw_crashed(priv, event_data);
  1240. out:
  1241. kfree(data);
  1242. return 0;
  1243. }
  1244. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1245. void *data)
  1246. {
  1247. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1248. icnss_ignore_fw_timeout(false);
  1249. goto out;
  1250. }
  1251. priv->early_crash_ind = true;
  1252. icnss_fw_crashed(priv, NULL);
  1253. out:
  1254. kfree(data);
  1255. return 0;
  1256. }
  1257. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1258. void *data)
  1259. {
  1260. int ret = 0;
  1261. if (!priv->ops || !priv->ops->idle_shutdown)
  1262. return 0;
  1263. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1264. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1265. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1266. ret = -EBUSY;
  1267. } else {
  1268. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1269. priv->state);
  1270. icnss_block_shutdown(true);
  1271. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1272. icnss_block_shutdown(false);
  1273. }
  1274. return ret;
  1275. }
  1276. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1277. void *data)
  1278. {
  1279. int ret = 0;
  1280. if (!priv->ops || !priv->ops->idle_restart)
  1281. return 0;
  1282. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1283. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1284. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1285. ret = -EBUSY;
  1286. } else {
  1287. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1288. priv->state);
  1289. icnss_block_shutdown(true);
  1290. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1291. icnss_block_shutdown(false);
  1292. }
  1293. return ret;
  1294. }
  1295. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1296. {
  1297. icnss_free_qdss_mem(priv);
  1298. return 0;
  1299. }
  1300. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1301. void *data)
  1302. {
  1303. struct icnss_m3_upload_segments_req_data *event_data = data;
  1304. struct qcom_dump_segment segment;
  1305. int i, status = 0, ret = 0;
  1306. struct list_head head;
  1307. if (!dump_enabled()) {
  1308. icnss_pr_info("Dump collection is not enabled\n");
  1309. return ret;
  1310. }
  1311. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1312. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1313. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1314. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1315. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1316. return ret;
  1317. INIT_LIST_HEAD(&head);
  1318. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1319. memset(&segment, 0, sizeof(segment));
  1320. segment.va = devm_ioremap(&priv->pdev->dev,
  1321. event_data->m3_segment[i].addr,
  1322. event_data->m3_segment[i].size);
  1323. if (!segment.va) {
  1324. icnss_pr_err("Failed to ioremap M3 Dump region");
  1325. ret = -ENOMEM;
  1326. goto send_resp;
  1327. }
  1328. segment.size = event_data->m3_segment[i].size;
  1329. list_add(&segment.node, &head);
  1330. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1331. event_data->m3_segment[i].name);
  1332. switch (event_data->m3_segment[i].type) {
  1333. case QMI_M3_SEGMENT_PHYAREG_V01:
  1334. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1335. break;
  1336. case QMI_M3_SEGMENT_PHYDBG_V01:
  1337. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1338. break;
  1339. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1340. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1341. break;
  1342. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1343. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1344. break;
  1345. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1346. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1347. break;
  1348. default:
  1349. icnss_pr_err("Invalid Segment type: %d",
  1350. event_data->m3_segment[i].type);
  1351. }
  1352. if (ret) {
  1353. status = ret;
  1354. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1355. event_data->m3_segment[i].name, ret);
  1356. }
  1357. list_del(&segment.node);
  1358. }
  1359. send_resp:
  1360. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1361. status);
  1362. return ret;
  1363. }
  1364. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1365. {
  1366. int ret = 0;
  1367. struct icnss_subsys_restart_level_data *event_data = data;
  1368. if (!priv)
  1369. return -ENODEV;
  1370. if (!data)
  1371. return -EINVAL;
  1372. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1373. kfree(data);
  1374. return ret;
  1375. }
  1376. static void icnss_driver_event_work(struct work_struct *work)
  1377. {
  1378. struct icnss_priv *priv =
  1379. container_of(work, struct icnss_priv, event_work);
  1380. struct icnss_driver_event *event;
  1381. unsigned long flags;
  1382. int ret;
  1383. icnss_pm_stay_awake(priv);
  1384. spin_lock_irqsave(&priv->event_lock, flags);
  1385. while (!list_empty(&priv->event_list)) {
  1386. event = list_first_entry(&priv->event_list,
  1387. struct icnss_driver_event, list);
  1388. list_del(&event->list);
  1389. spin_unlock_irqrestore(&priv->event_lock, flags);
  1390. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1391. icnss_driver_event_to_str(event->type),
  1392. event->sync ? "-sync" : "", event->type,
  1393. priv->state);
  1394. switch (event->type) {
  1395. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1396. ret = icnss_driver_event_server_arrive(priv,
  1397. event->data);
  1398. break;
  1399. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1400. ret = icnss_driver_event_server_exit(priv);
  1401. break;
  1402. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1403. ret = icnss_driver_event_fw_ready_ind(priv,
  1404. event->data);
  1405. break;
  1406. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1407. ret = icnss_driver_event_register_driver(priv,
  1408. event->data);
  1409. break;
  1410. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1411. ret = icnss_driver_event_unregister_driver(priv,
  1412. event->data);
  1413. break;
  1414. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1415. ret = icnss_driver_event_pd_service_down(priv,
  1416. event->data);
  1417. break;
  1418. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1419. ret = icnss_driver_event_early_crash_ind(priv,
  1420. event->data);
  1421. break;
  1422. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1423. ret = icnss_driver_event_idle_shutdown(priv,
  1424. event->data);
  1425. break;
  1426. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1427. ret = icnss_driver_event_idle_restart(priv,
  1428. event->data);
  1429. break;
  1430. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1431. ret = icnss_driver_event_fw_init_done(priv,
  1432. event->data);
  1433. break;
  1434. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1435. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1436. break;
  1437. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1438. ret = icnss_qdss_trace_save_hdlr(priv,
  1439. event->data);
  1440. break;
  1441. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1442. ret = icnss_qdss_trace_free_hdlr(priv);
  1443. break;
  1444. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1445. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1446. break;
  1447. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1448. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1449. event->data);
  1450. break;
  1451. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1452. ret = icnss_subsys_restart_level(priv, event->data);
  1453. break;
  1454. default:
  1455. icnss_pr_err("Invalid Event type: %d", event->type);
  1456. kfree(event);
  1457. continue;
  1458. }
  1459. priv->stats.events[event->type].processed++;
  1460. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1461. icnss_driver_event_to_str(event->type),
  1462. event->sync ? "-sync" : "", event->type, ret,
  1463. priv->state);
  1464. spin_lock_irqsave(&priv->event_lock, flags);
  1465. if (event->sync) {
  1466. event->ret = ret;
  1467. complete(&event->complete);
  1468. continue;
  1469. }
  1470. spin_unlock_irqrestore(&priv->event_lock, flags);
  1471. kfree(event);
  1472. spin_lock_irqsave(&priv->event_lock, flags);
  1473. }
  1474. spin_unlock_irqrestore(&priv->event_lock, flags);
  1475. icnss_pm_relax(priv);
  1476. }
  1477. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1478. {
  1479. struct icnss_priv *priv =
  1480. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1481. struct icnss_soc_wake_event *event;
  1482. unsigned long flags;
  1483. int ret;
  1484. icnss_pm_stay_awake(priv);
  1485. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1486. while (!list_empty(&priv->soc_wake_msg_list)) {
  1487. event = list_first_entry(&priv->soc_wake_msg_list,
  1488. struct icnss_soc_wake_event, list);
  1489. list_del(&event->list);
  1490. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1491. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1492. icnss_soc_wake_event_to_str(event->type),
  1493. event->sync ? "-sync" : "", event->type,
  1494. priv->state);
  1495. switch (event->type) {
  1496. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1497. ret = icnss_event_soc_wake_request(priv,
  1498. event->data);
  1499. break;
  1500. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1501. ret = icnss_event_soc_wake_release(priv,
  1502. event->data);
  1503. break;
  1504. default:
  1505. icnss_pr_err("Invalid Event type: %d", event->type);
  1506. kfree(event);
  1507. continue;
  1508. }
  1509. priv->stats.soc_wake_events[event->type].processed++;
  1510. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1511. icnss_soc_wake_event_to_str(event->type),
  1512. event->sync ? "-sync" : "", event->type, ret,
  1513. priv->state);
  1514. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1515. if (event->sync) {
  1516. event->ret = ret;
  1517. complete(&event->complete);
  1518. continue;
  1519. }
  1520. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1521. kfree(event);
  1522. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1523. }
  1524. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1525. icnss_pm_relax(priv);
  1526. }
  1527. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1528. {
  1529. int ret = 0;
  1530. struct qcom_dump_segment segment;
  1531. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1532. struct list_head head;
  1533. if (!dump_enabled()) {
  1534. icnss_pr_info("Dump collection is not enabled\n");
  1535. return ret;
  1536. }
  1537. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1538. return ret;
  1539. INIT_LIST_HEAD(&head);
  1540. memset(&segment, 0, sizeof(segment));
  1541. segment.va = priv->msa_va;
  1542. segment.size = priv->msa_mem_size;
  1543. list_add(&segment.node, &head);
  1544. if (!msa0_dump_dev->dev) {
  1545. icnss_pr_err("Created Dump Device not found\n");
  1546. return 0;
  1547. }
  1548. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1549. if (ret) {
  1550. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1551. return ret;
  1552. }
  1553. list_del(&segment.node);
  1554. return ret;
  1555. }
  1556. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1557. void *data)
  1558. {
  1559. struct qcom_ssr_notify_data *notif = data;
  1560. int ret = 0;
  1561. if (!notif->crashed) {
  1562. if (atomic_read(&priv->is_shutdown)) {
  1563. atomic_set(&priv->is_shutdown, false);
  1564. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1565. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1566. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1567. clear_bit(ICNSS_FW_READY, &priv->state);
  1568. icnss_driver_event_post(priv,
  1569. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1570. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1571. NULL);
  1572. }
  1573. }
  1574. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1575. if (!wait_for_completion_timeout(
  1576. &priv->unblock_shutdown,
  1577. msecs_to_jiffies(PROBE_TIMEOUT)))
  1578. icnss_pr_err("modem block shutdown timeout\n");
  1579. }
  1580. ret = wlfw_send_modem_shutdown_msg(priv);
  1581. if (ret < 0)
  1582. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1583. ret);
  1584. }
  1585. }
  1586. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1587. {
  1588. switch (code) {
  1589. case QCOM_SSR_BEFORE_POWERUP:
  1590. return "BEFORE_POWERUP";
  1591. case QCOM_SSR_AFTER_POWERUP:
  1592. return "AFTER_POWERUP";
  1593. case QCOM_SSR_BEFORE_SHUTDOWN:
  1594. return "BEFORE_SHUTDOWN";
  1595. case QCOM_SSR_AFTER_SHUTDOWN:
  1596. return "AFTER_SHUTDOWN";
  1597. default:
  1598. return "UNKNOWN";
  1599. }
  1600. };
  1601. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1602. unsigned long code,
  1603. void *data)
  1604. {
  1605. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1606. wpss_early_ssr_nb);
  1607. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1608. icnss_qcom_ssr_notify_state_to_str(code), code);
  1609. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1610. set_bit(ICNSS_FW_DOWN, &priv->state);
  1611. icnss_ignore_fw_timeout(true);
  1612. }
  1613. return NOTIFY_DONE;
  1614. }
  1615. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1616. unsigned long code,
  1617. void *data)
  1618. {
  1619. struct icnss_event_pd_service_down_data *event_data;
  1620. struct qcom_ssr_notify_data *notif = data;
  1621. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1622. wpss_ssr_nb);
  1623. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1624. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1625. icnss_qcom_ssr_notify_state_to_str(code), code);
  1626. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1627. icnss_pr_info("Collecting msa0 segment dump\n");
  1628. icnss_msa0_ramdump(priv);
  1629. goto out;
  1630. }
  1631. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1632. goto out;
  1633. priv->is_ssr = true;
  1634. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1635. priv->state, notif->crashed);
  1636. set_bit(ICNSS_FW_DOWN, &priv->state);
  1637. if (notif->crashed)
  1638. priv->stats.recovery.root_pd_crash++;
  1639. else
  1640. priv->stats.recovery.root_pd_shutdown++;
  1641. icnss_ignore_fw_timeout(true);
  1642. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1643. if (event_data == NULL)
  1644. return notifier_from_errno(-ENOMEM);
  1645. event_data->crashed = notif->crashed;
  1646. fw_down_data.crashed = !!notif->crashed;
  1647. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1648. clear_bit(ICNSS_FW_READY, &priv->state);
  1649. fw_down_data.crashed = !!notif->crashed;
  1650. icnss_call_driver_uevent(priv,
  1651. ICNSS_UEVENT_FW_DOWN,
  1652. &fw_down_data);
  1653. }
  1654. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1655. ICNSS_EVENT_SYNC, event_data);
  1656. out:
  1657. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1658. return NOTIFY_OK;
  1659. }
  1660. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1661. unsigned long code,
  1662. void *data)
  1663. {
  1664. struct icnss_event_pd_service_down_data *event_data;
  1665. struct qcom_ssr_notify_data *notif = data;
  1666. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1667. modem_ssr_nb);
  1668. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1669. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1670. icnss_qcom_ssr_notify_state_to_str(code), code);
  1671. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1672. icnss_pr_info("Collecting msa0 segment dump\n");
  1673. icnss_msa0_ramdump(priv);
  1674. goto out;
  1675. }
  1676. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1677. goto out;
  1678. priv->is_ssr = true;
  1679. if (notif->crashed) {
  1680. priv->stats.recovery.root_pd_crash++;
  1681. priv->root_pd_shutdown = false;
  1682. } else {
  1683. priv->stats.recovery.root_pd_shutdown++;
  1684. priv->root_pd_shutdown = true;
  1685. }
  1686. icnss_update_state_send_modem_shutdown(priv, data);
  1687. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1688. set_bit(ICNSS_FW_DOWN, &priv->state);
  1689. icnss_ignore_fw_timeout(true);
  1690. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1691. clear_bit(ICNSS_FW_READY, &priv->state);
  1692. fw_down_data.crashed = !!notif->crashed;
  1693. icnss_call_driver_uevent(priv,
  1694. ICNSS_UEVENT_FW_DOWN,
  1695. &fw_down_data);
  1696. }
  1697. goto out;
  1698. }
  1699. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1700. priv->state, notif->crashed);
  1701. set_bit(ICNSS_FW_DOWN, &priv->state);
  1702. icnss_ignore_fw_timeout(true);
  1703. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1704. if (event_data == NULL)
  1705. return notifier_from_errno(-ENOMEM);
  1706. event_data->crashed = notif->crashed;
  1707. fw_down_data.crashed = !!notif->crashed;
  1708. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1709. clear_bit(ICNSS_FW_READY, &priv->state);
  1710. fw_down_data.crashed = !!notif->crashed;
  1711. icnss_call_driver_uevent(priv,
  1712. ICNSS_UEVENT_FW_DOWN,
  1713. &fw_down_data);
  1714. }
  1715. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1716. ICNSS_EVENT_SYNC, event_data);
  1717. out:
  1718. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1719. return NOTIFY_OK;
  1720. }
  1721. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1722. {
  1723. int ret = 0;
  1724. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1725. priv->wpss_early_notify_handler =
  1726. qcom_register_early_ssr_notifier("wpss",
  1727. &priv->wpss_early_ssr_nb);
  1728. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1729. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1730. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1731. }
  1732. return ret;
  1733. }
  1734. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1735. {
  1736. int ret = 0;
  1737. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1738. /*
  1739. * Assign priority of icnss wpss notifier callback over IPA
  1740. * modem notifier callback which is 0
  1741. */
  1742. priv->wpss_ssr_nb.priority = 1;
  1743. priv->wpss_notify_handler =
  1744. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1745. if (IS_ERR(priv->wpss_notify_handler)) {
  1746. ret = PTR_ERR(priv->wpss_notify_handler);
  1747. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1748. }
  1749. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1750. return ret;
  1751. }
  1752. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1753. {
  1754. int ret = 0;
  1755. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1756. /*
  1757. * Assign priority of icnss modem notifier callback over IPA
  1758. * modem notifier callback which is 0
  1759. */
  1760. priv->modem_ssr_nb.priority = 1;
  1761. priv->modem_notify_handler =
  1762. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  1763. if (IS_ERR(priv->modem_notify_handler)) {
  1764. ret = PTR_ERR(priv->modem_notify_handler);
  1765. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1766. }
  1767. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1768. return ret;
  1769. }
  1770. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1771. {
  1772. if (IS_ERR(priv->wpss_early_notify_handler))
  1773. return;
  1774. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1775. &priv->wpss_early_ssr_nb);
  1776. priv->wpss_early_notify_handler = NULL;
  1777. }
  1778. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1779. {
  1780. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1781. return 0;
  1782. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1783. &priv->wpss_ssr_nb);
  1784. priv->wpss_notify_handler = NULL;
  1785. return 0;
  1786. }
  1787. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1788. {
  1789. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1790. return 0;
  1791. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1792. &priv->modem_ssr_nb);
  1793. priv->modem_notify_handler = NULL;
  1794. return 0;
  1795. }
  1796. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1797. {
  1798. struct icnss_priv *priv = priv_cb;
  1799. struct icnss_event_pd_service_down_data *event_data;
  1800. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1801. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1802. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1803. state, priv->state);
  1804. switch (state) {
  1805. case SERVREG_SERVICE_STATE_DOWN:
  1806. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1807. if (!event_data)
  1808. return;
  1809. event_data->crashed = true;
  1810. if (!priv->is_ssr) {
  1811. set_bit(ICNSS_PDR, &penv->state);
  1812. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1813. cause = ICNSS_HOST_ERROR;
  1814. priv->stats.recovery.pdr_host_error++;
  1815. } else {
  1816. cause = ICNSS_FW_CRASH;
  1817. priv->stats.recovery.pdr_fw_crash++;
  1818. }
  1819. } else if (priv->root_pd_shutdown) {
  1820. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1821. event_data->crashed = false;
  1822. }
  1823. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  1824. priv->state, icnss_pdr_cause[cause]);
  1825. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1826. set_bit(ICNSS_FW_DOWN, &priv->state);
  1827. icnss_ignore_fw_timeout(true);
  1828. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1829. clear_bit(ICNSS_FW_READY, &priv->state);
  1830. fw_down_data.crashed = event_data->crashed;
  1831. icnss_call_driver_uevent(priv,
  1832. ICNSS_UEVENT_FW_DOWN,
  1833. &fw_down_data);
  1834. }
  1835. }
  1836. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  1837. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1838. ICNSS_EVENT_SYNC, event_data);
  1839. break;
  1840. case SERVREG_SERVICE_STATE_UP:
  1841. clear_bit(ICNSS_FW_DOWN, &priv->state);
  1842. break;
  1843. default:
  1844. break;
  1845. }
  1846. return;
  1847. }
  1848. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  1849. {
  1850. struct pdr_handle *handle = NULL;
  1851. struct pdr_service *service = NULL;
  1852. int err = 0;
  1853. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  1854. if (IS_ERR_OR_NULL(handle)) {
  1855. err = PTR_ERR(handle);
  1856. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  1857. goto out;
  1858. }
  1859. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  1860. if (IS_ERR_OR_NULL(service)) {
  1861. err = PTR_ERR(service);
  1862. icnss_pr_err("Failed to add lookup, err %d", err);
  1863. goto out;
  1864. }
  1865. priv->pdr_handle = handle;
  1866. priv->pdr_service = service;
  1867. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  1868. icnss_pr_info("PDR registration happened");
  1869. out:
  1870. return err;
  1871. }
  1872. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  1873. {
  1874. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  1875. return;
  1876. pdr_handle_release(priv->pdr_handle);
  1877. }
  1878. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  1879. {
  1880. int ret = 0;
  1881. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  1882. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  1883. ret = PTR_ERR(priv->icnss_ramdump_class);
  1884. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  1885. return ret;
  1886. }
  1887. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  1888. ICNSS_RAMDUMP_NAME);
  1889. if (ret < 0) {
  1890. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  1891. goto fail_alloc_major;
  1892. }
  1893. return 0;
  1894. fail_alloc_major:
  1895. class_destroy(priv->icnss_ramdump_class);
  1896. return ret;
  1897. }
  1898. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  1899. {
  1900. int ret = 0;
  1901. struct icnss_ramdump_info *ramdump_info;
  1902. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  1903. if (!ramdump_info)
  1904. return ERR_PTR(-ENOMEM);
  1905. if (!dev_name) {
  1906. icnss_pr_err("%s: Invalid device name.\n", __func__);
  1907. return NULL;
  1908. }
  1909. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  1910. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  1911. if (ramdump_info->minor < 0) {
  1912. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  1913. ramdump_info->minor);
  1914. ret = -ENODEV;
  1915. goto fail_out_of_minors;
  1916. }
  1917. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  1918. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  1919. ramdump_info->minor),
  1920. ramdump_info, ramdump_info->name);
  1921. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  1922. ret = PTR_ERR(ramdump_info->dev);
  1923. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  1924. ramdump_info->name, ret);
  1925. goto fail_device_create;
  1926. }
  1927. return (void *)ramdump_info;
  1928. fail_device_create:
  1929. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  1930. fail_out_of_minors:
  1931. kfree(ramdump_info);
  1932. return ERR_PTR(ret);
  1933. }
  1934. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  1935. {
  1936. int ret = 0;
  1937. if (!priv || !priv->pdev) {
  1938. icnss_pr_err("Platform priv or pdev is NULL\n");
  1939. return -EINVAL;
  1940. }
  1941. ret = icnss_ramdump_devnode_init(priv);
  1942. if (ret)
  1943. return ret;
  1944. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  1945. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  1946. icnss_pr_err("Failed to create msa0 dump device!");
  1947. return -ENOMEM;
  1948. }
  1949. if (priv->device_id == WCN6750_DEVICE_ID) {
  1950. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  1951. ICNSS_M3_SEGMENT(
  1952. ICNSS_M3_SEGMENT_PHYAREG));
  1953. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1954. !priv->m3_dump_phyareg->dev) {
  1955. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  1956. return -ENOMEM;
  1957. }
  1958. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  1959. ICNSS_M3_SEGMENT(
  1960. ICNSS_M3_SEGMENT_PHYA));
  1961. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1962. !priv->m3_dump_phydbg->dev) {
  1963. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  1964. return -ENOMEM;
  1965. }
  1966. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  1967. ICNSS_M3_SEGMENT(
  1968. ICNSS_M3_SEGMENT_WMACREG));
  1969. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1970. !priv->m3_dump_wmac0reg->dev) {
  1971. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  1972. return -ENOMEM;
  1973. }
  1974. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  1975. ICNSS_M3_SEGMENT(
  1976. ICNSS_M3_SEGMENT_WCSSDBG));
  1977. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1978. !priv->m3_dump_wcssdbg->dev) {
  1979. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  1980. return -ENOMEM;
  1981. }
  1982. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  1983. ICNSS_M3_SEGMENT(
  1984. ICNSS_M3_SEGMENT_PHYAM3));
  1985. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  1986. !priv->m3_dump_phyapdmem->dev) {
  1987. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  1988. return -ENOMEM;
  1989. }
  1990. }
  1991. return 0;
  1992. }
  1993. static int icnss_enable_recovery(struct icnss_priv *priv)
  1994. {
  1995. int ret;
  1996. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  1997. icnss_pr_dbg("Recovery disabled through module parameter\n");
  1998. return 0;
  1999. }
  2000. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2001. icnss_pr_dbg("SSR disabled through module parameter\n");
  2002. goto enable_pdr;
  2003. }
  2004. ret = icnss_register_ramdump_devices(priv);
  2005. if (ret)
  2006. return ret;
  2007. if (priv->wpss_supported) {
  2008. icnss_wpss_early_ssr_register_notifier(priv);
  2009. icnss_wpss_ssr_register_notifier(priv);
  2010. return 0;
  2011. }
  2012. icnss_modem_ssr_register_notifier(priv);
  2013. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2014. icnss_pr_dbg("PDR disabled through module parameter\n");
  2015. return 0;
  2016. }
  2017. enable_pdr:
  2018. ret = icnss_pd_restart_enable(priv);
  2019. if (ret)
  2020. return ret;
  2021. return 0;
  2022. }
  2023. static int icnss_dev_id_match(struct icnss_priv *priv,
  2024. struct device_info *dev_info)
  2025. {
  2026. while (dev_info->device_id) {
  2027. if (priv->device_id == dev_info->device_id)
  2028. return 1;
  2029. dev_info++;
  2030. }
  2031. return 0;
  2032. }
  2033. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2034. unsigned long *thermal_state)
  2035. {
  2036. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2037. *thermal_state = icnss_tcdev->max_thermal_state;
  2038. return 0;
  2039. }
  2040. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2041. unsigned long *thermal_state)
  2042. {
  2043. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2044. *thermal_state = icnss_tcdev->curr_thermal_state;
  2045. return 0;
  2046. }
  2047. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2048. unsigned long thermal_state)
  2049. {
  2050. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2051. struct device *dev = &penv->pdev->dev;
  2052. int ret = 0;
  2053. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2054. return 0;
  2055. if (thermal_state > icnss_tcdev->max_thermal_state)
  2056. return -EINVAL;
  2057. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2058. thermal_state, icnss_tcdev->tcdev_id);
  2059. mutex_lock(&penv->tcdev_lock);
  2060. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2061. icnss_tcdev->tcdev_id);
  2062. if (!ret)
  2063. icnss_tcdev->curr_thermal_state = thermal_state;
  2064. mutex_unlock(&penv->tcdev_lock);
  2065. if (ret) {
  2066. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2067. ret, icnss_tcdev->tcdev_id);
  2068. return ret;
  2069. }
  2070. return 0;
  2071. }
  2072. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2073. .get_max_state = icnss_tcdev_get_max_state,
  2074. .get_cur_state = icnss_tcdev_get_cur_state,
  2075. .set_cur_state = icnss_tcdev_set_cur_state,
  2076. };
  2077. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2078. int tcdev_id)
  2079. {
  2080. struct icnss_priv *priv = dev_get_drvdata(dev);
  2081. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2082. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2083. struct device_node *dev_node;
  2084. int ret = 0;
  2085. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2086. if (!icnss_tcdev)
  2087. return -ENOMEM;
  2088. icnss_tcdev->tcdev_id = tcdev_id;
  2089. icnss_tcdev->max_thermal_state = max_state;
  2090. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2091. "qcom,icnss_cdev%d", tcdev_id);
  2092. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2093. if (!dev_node) {
  2094. icnss_pr_err("Failed to get cooling device node\n");
  2095. return -EINVAL;
  2096. }
  2097. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2098. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2099. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2100. dev_node,
  2101. cdev_node_name, icnss_tcdev,
  2102. &icnss_cooling_ops);
  2103. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2104. ret = PTR_ERR(icnss_tcdev->tcdev);
  2105. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2106. ret, icnss_tcdev->tcdev_id);
  2107. } else {
  2108. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2109. icnss_tcdev->tcdev_id);
  2110. list_add(&icnss_tcdev->tcdev_list,
  2111. &priv->icnss_tcdev_list);
  2112. }
  2113. } else {
  2114. icnss_pr_dbg("Cooling device registration not supported");
  2115. ret = -EOPNOTSUPP;
  2116. }
  2117. return ret;
  2118. }
  2119. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2120. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2121. {
  2122. struct icnss_priv *priv = dev_get_drvdata(dev);
  2123. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2124. while (!list_empty(&priv->icnss_tcdev_list)) {
  2125. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2126. struct icnss_thermal_cdev,
  2127. tcdev_list);
  2128. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2129. list_del(&icnss_tcdev->tcdev_list);
  2130. kfree(icnss_tcdev);
  2131. }
  2132. }
  2133. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2134. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2135. unsigned long *thermal_state,
  2136. int tcdev_id)
  2137. {
  2138. struct icnss_priv *priv = dev_get_drvdata(dev);
  2139. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2140. mutex_lock(&priv->tcdev_lock);
  2141. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2142. if (icnss_tcdev->tcdev_id != tcdev_id)
  2143. continue;
  2144. *thermal_state = icnss_tcdev->curr_thermal_state;
  2145. mutex_unlock(&priv->tcdev_lock);
  2146. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2147. icnss_tcdev->curr_thermal_state, tcdev_id);
  2148. return 0;
  2149. }
  2150. mutex_unlock(&priv->tcdev_lock);
  2151. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2152. return -EINVAL;
  2153. }
  2154. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2155. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2156. int cmd_len, void *cb_ctx,
  2157. int (*cb)(void *ctx, void *event, int event_len))
  2158. {
  2159. struct icnss_priv *priv = icnss_get_plat_priv();
  2160. int ret;
  2161. if (!priv)
  2162. return -ENODEV;
  2163. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2164. return -EINVAL;
  2165. priv->get_info_cb = cb;
  2166. priv->get_info_cb_ctx = cb_ctx;
  2167. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2168. if (ret) {
  2169. priv->get_info_cb = NULL;
  2170. priv->get_info_cb_ctx = NULL;
  2171. }
  2172. return ret;
  2173. }
  2174. EXPORT_SYMBOL(icnss_qmi_send);
  2175. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2176. struct module *owner, const char *mod_name)
  2177. {
  2178. int ret = 0;
  2179. struct icnss_priv *priv = icnss_get_plat_priv();
  2180. if (!priv || !priv->pdev) {
  2181. ret = -ENODEV;
  2182. goto out;
  2183. }
  2184. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2185. if (priv->ops) {
  2186. icnss_pr_err("Driver already registered\n");
  2187. ret = -EEXIST;
  2188. goto out;
  2189. }
  2190. if (!ops->dev_info) {
  2191. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2192. return -EINVAL;
  2193. }
  2194. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2195. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2196. ops->dev_info->name);
  2197. return -ENODEV;
  2198. }
  2199. if (!ops->probe || !ops->remove) {
  2200. ret = -EINVAL;
  2201. goto out;
  2202. }
  2203. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2204. 0, ops);
  2205. if (ret == -EINTR)
  2206. ret = 0;
  2207. out:
  2208. return ret;
  2209. }
  2210. EXPORT_SYMBOL(__icnss_register_driver);
  2211. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2212. {
  2213. int ret;
  2214. struct icnss_priv *priv = icnss_get_plat_priv();
  2215. if (!priv || !priv->pdev) {
  2216. ret = -ENODEV;
  2217. goto out;
  2218. }
  2219. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2220. if (!priv->ops) {
  2221. icnss_pr_err("Driver not registered\n");
  2222. ret = -ENOENT;
  2223. goto out;
  2224. }
  2225. ret = icnss_driver_event_post(priv,
  2226. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2227. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2228. out:
  2229. return ret;
  2230. }
  2231. EXPORT_SYMBOL(icnss_unregister_driver);
  2232. static struct icnss_msi_config msi_config = {
  2233. .total_vectors = 28,
  2234. .total_users = 2,
  2235. .users = (struct icnss_msi_user[]) {
  2236. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2237. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2238. },
  2239. };
  2240. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2241. {
  2242. priv->msi_config = &msi_config;
  2243. return 0;
  2244. }
  2245. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2246. int *num_vectors, u32 *user_base_data,
  2247. u32 *base_vector)
  2248. {
  2249. struct icnss_priv *priv = dev_get_drvdata(dev);
  2250. struct icnss_msi_config *msi_config;
  2251. int idx;
  2252. if (!priv)
  2253. return -ENODEV;
  2254. msi_config = priv->msi_config;
  2255. if (!msi_config) {
  2256. icnss_pr_err("MSI is not supported.\n");
  2257. return -EINVAL;
  2258. }
  2259. for (idx = 0; idx < msi_config->total_users; idx++) {
  2260. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2261. *num_vectors = msi_config->users[idx].num_vectors;
  2262. *user_base_data = msi_config->users[idx].base_vector
  2263. + priv->msi_base_data;
  2264. *base_vector = msi_config->users[idx].base_vector;
  2265. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2266. user_name, *num_vectors, *user_base_data,
  2267. *base_vector);
  2268. return 0;
  2269. }
  2270. }
  2271. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2272. return -EINVAL;
  2273. }
  2274. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2275. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2276. {
  2277. struct icnss_priv *priv = dev_get_drvdata(dev);
  2278. int irq_num;
  2279. irq_num = priv->srng_irqs[vector];
  2280. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2281. irq_num, vector);
  2282. return irq_num;
  2283. }
  2284. EXPORT_SYMBOL(icnss_get_msi_irq);
  2285. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2286. u32 *msi_addr_high)
  2287. {
  2288. struct icnss_priv *priv = dev_get_drvdata(dev);
  2289. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2290. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2291. }
  2292. EXPORT_SYMBOL(icnss_get_msi_address);
  2293. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2294. irqreturn_t (*handler)(int, void *),
  2295. unsigned long flags, const char *name, void *ctx)
  2296. {
  2297. int ret = 0;
  2298. unsigned int irq;
  2299. struct ce_irq_list *irq_entry;
  2300. struct icnss_priv *priv = dev_get_drvdata(dev);
  2301. if (!priv || !priv->pdev) {
  2302. ret = -ENODEV;
  2303. goto out;
  2304. }
  2305. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2306. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2307. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2308. ret = -EINVAL;
  2309. goto out;
  2310. }
  2311. irq = priv->ce_irqs[ce_id];
  2312. irq_entry = &priv->ce_irq_list[ce_id];
  2313. if (irq_entry->handler || irq_entry->irq) {
  2314. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2315. irq, ce_id);
  2316. ret = -EEXIST;
  2317. goto out;
  2318. }
  2319. ret = request_irq(irq, handler, flags, name, ctx);
  2320. if (ret) {
  2321. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2322. irq, ce_id, ret);
  2323. goto out;
  2324. }
  2325. irq_entry->irq = irq;
  2326. irq_entry->handler = handler;
  2327. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2328. penv->stats.ce_irqs[ce_id].request++;
  2329. out:
  2330. return ret;
  2331. }
  2332. EXPORT_SYMBOL(icnss_ce_request_irq);
  2333. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2334. {
  2335. int ret = 0;
  2336. unsigned int irq;
  2337. struct ce_irq_list *irq_entry;
  2338. if (!penv || !penv->pdev || !dev) {
  2339. ret = -ENODEV;
  2340. goto out;
  2341. }
  2342. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2343. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2344. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2345. ret = -EINVAL;
  2346. goto out;
  2347. }
  2348. irq = penv->ce_irqs[ce_id];
  2349. irq_entry = &penv->ce_irq_list[ce_id];
  2350. if (!irq_entry->handler || !irq_entry->irq) {
  2351. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2352. ret = -EEXIST;
  2353. goto out;
  2354. }
  2355. free_irq(irq, ctx);
  2356. irq_entry->irq = 0;
  2357. irq_entry->handler = NULL;
  2358. penv->stats.ce_irqs[ce_id].free++;
  2359. out:
  2360. return ret;
  2361. }
  2362. EXPORT_SYMBOL(icnss_ce_free_irq);
  2363. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2364. {
  2365. unsigned int irq;
  2366. if (!penv || !penv->pdev || !dev) {
  2367. icnss_pr_err("Platform driver not initialized\n");
  2368. return;
  2369. }
  2370. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2371. penv->state);
  2372. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2373. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2374. return;
  2375. }
  2376. penv->stats.ce_irqs[ce_id].enable++;
  2377. irq = penv->ce_irqs[ce_id];
  2378. enable_irq(irq);
  2379. }
  2380. EXPORT_SYMBOL(icnss_enable_irq);
  2381. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2382. {
  2383. unsigned int irq;
  2384. if (!penv || !penv->pdev || !dev) {
  2385. icnss_pr_err("Platform driver not initialized\n");
  2386. return;
  2387. }
  2388. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2389. penv->state);
  2390. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2391. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2392. ce_id);
  2393. return;
  2394. }
  2395. irq = penv->ce_irqs[ce_id];
  2396. disable_irq(irq);
  2397. penv->stats.ce_irqs[ce_id].disable++;
  2398. }
  2399. EXPORT_SYMBOL(icnss_disable_irq);
  2400. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2401. {
  2402. char *fw_build_timestamp = NULL;
  2403. struct icnss_priv *priv = dev_get_drvdata(dev);
  2404. if (!priv) {
  2405. icnss_pr_err("Platform driver not initialized\n");
  2406. return -EINVAL;
  2407. }
  2408. info->v_addr = priv->mem_base_va;
  2409. info->p_addr = priv->mem_base_pa;
  2410. info->chip_id = priv->chip_info.chip_id;
  2411. info->chip_family = priv->chip_info.chip_family;
  2412. info->board_id = priv->board_id;
  2413. info->soc_id = priv->soc_id;
  2414. info->fw_version = priv->fw_version_info.fw_version;
  2415. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2416. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2417. strlcpy(info->fw_build_timestamp,
  2418. priv->fw_version_info.fw_build_timestamp,
  2419. WLFW_MAX_TIMESTAMP_LEN + 1);
  2420. return 0;
  2421. }
  2422. EXPORT_SYMBOL(icnss_get_soc_info);
  2423. int icnss_get_mhi_state(struct device *dev)
  2424. {
  2425. struct icnss_priv *priv = dev_get_drvdata(dev);
  2426. if (!priv) {
  2427. icnss_pr_err("Platform driver not initialized\n");
  2428. return -EINVAL;
  2429. }
  2430. if (!priv->mhi_state_info_va)
  2431. return -ENOMEM;
  2432. return ioread32(priv->mhi_state_info_va);
  2433. }
  2434. EXPORT_SYMBOL(icnss_get_mhi_state);
  2435. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2436. {
  2437. int ret;
  2438. struct icnss_priv *priv;
  2439. if (!dev)
  2440. return -ENODEV;
  2441. priv = dev_get_drvdata(dev);
  2442. if (!priv) {
  2443. icnss_pr_err("Platform driver not initialized\n");
  2444. return -EINVAL;
  2445. }
  2446. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2447. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2448. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2449. priv->state);
  2450. return -EINVAL;
  2451. }
  2452. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2453. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2454. if (ret)
  2455. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2456. ret, fw_log_mode);
  2457. return ret;
  2458. }
  2459. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2460. int icnss_force_wake_request(struct device *dev)
  2461. {
  2462. struct icnss_priv *priv;
  2463. if (!dev)
  2464. return -ENODEV;
  2465. priv = dev_get_drvdata(dev);
  2466. if (!priv) {
  2467. icnss_pr_err("Platform driver not initialized\n");
  2468. return -EINVAL;
  2469. }
  2470. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2471. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2472. atomic_read(&priv->soc_wake_ref_count));
  2473. return 0;
  2474. }
  2475. icnss_pr_soc_wake("Calling SOC Wake request");
  2476. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2477. 0, NULL);
  2478. return 0;
  2479. }
  2480. EXPORT_SYMBOL(icnss_force_wake_request);
  2481. int icnss_force_wake_release(struct device *dev)
  2482. {
  2483. struct icnss_priv *priv;
  2484. if (!dev)
  2485. return -ENODEV;
  2486. priv = dev_get_drvdata(dev);
  2487. if (!priv) {
  2488. icnss_pr_err("Platform driver not initialized\n");
  2489. return -EINVAL;
  2490. }
  2491. icnss_pr_soc_wake("Calling SOC Wake response");
  2492. if (atomic_read(&priv->soc_wake_ref_count) &&
  2493. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2494. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2495. atomic_read(&priv->soc_wake_ref_count));
  2496. return 0;
  2497. }
  2498. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2499. 0, NULL);
  2500. return 0;
  2501. }
  2502. EXPORT_SYMBOL(icnss_force_wake_release);
  2503. int icnss_is_device_awake(struct device *dev)
  2504. {
  2505. struct icnss_priv *priv = dev_get_drvdata(dev);
  2506. if (!priv) {
  2507. icnss_pr_err("Platform driver not initialized\n");
  2508. return -EINVAL;
  2509. }
  2510. return atomic_read(&priv->soc_wake_ref_count);
  2511. }
  2512. EXPORT_SYMBOL(icnss_is_device_awake);
  2513. int icnss_is_pci_ep_awake(struct device *dev)
  2514. {
  2515. struct icnss_priv *priv = dev_get_drvdata(dev);
  2516. if (!priv) {
  2517. icnss_pr_err("Platform driver not initialized\n");
  2518. return -EINVAL;
  2519. }
  2520. if (!priv->mhi_state_info_va)
  2521. return -ENOMEM;
  2522. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2523. }
  2524. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2525. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2526. uint32_t mem_type, uint32_t data_len,
  2527. uint8_t *output)
  2528. {
  2529. int ret = 0;
  2530. struct icnss_priv *priv = dev_get_drvdata(dev);
  2531. if (priv->magic != ICNSS_MAGIC) {
  2532. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2533. dev, priv, priv->magic);
  2534. return -EINVAL;
  2535. }
  2536. if (!output || data_len == 0
  2537. || data_len > WLFW_MAX_DATA_SIZE) {
  2538. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2539. output, data_len);
  2540. ret = -EINVAL;
  2541. goto out;
  2542. }
  2543. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2544. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2545. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2546. priv->state);
  2547. ret = -EINVAL;
  2548. goto out;
  2549. }
  2550. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2551. data_len, output);
  2552. out:
  2553. return ret;
  2554. }
  2555. EXPORT_SYMBOL(icnss_athdiag_read);
  2556. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2557. uint32_t mem_type, uint32_t data_len,
  2558. uint8_t *input)
  2559. {
  2560. int ret = 0;
  2561. struct icnss_priv *priv = dev_get_drvdata(dev);
  2562. if (priv->magic != ICNSS_MAGIC) {
  2563. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2564. dev, priv, priv->magic);
  2565. return -EINVAL;
  2566. }
  2567. if (!input || data_len == 0
  2568. || data_len > WLFW_MAX_DATA_SIZE) {
  2569. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2570. input, data_len);
  2571. ret = -EINVAL;
  2572. goto out;
  2573. }
  2574. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2575. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2576. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2577. priv->state);
  2578. ret = -EINVAL;
  2579. goto out;
  2580. }
  2581. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2582. data_len, input);
  2583. out:
  2584. return ret;
  2585. }
  2586. EXPORT_SYMBOL(icnss_athdiag_write);
  2587. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2588. enum icnss_driver_mode mode,
  2589. const char *host_version)
  2590. {
  2591. struct icnss_priv *priv = dev_get_drvdata(dev);
  2592. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2593. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2594. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2595. priv->state);
  2596. return -EINVAL;
  2597. }
  2598. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2599. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2600. priv->state);
  2601. return -EINVAL;
  2602. }
  2603. if (priv->wpss_supported &&
  2604. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2605. icnss_setup_dms_mac(priv);
  2606. return icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2607. }
  2608. EXPORT_SYMBOL(icnss_wlan_enable);
  2609. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2610. {
  2611. struct icnss_priv *priv = dev_get_drvdata(dev);
  2612. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2613. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2614. priv->state);
  2615. return 0;
  2616. }
  2617. return icnss_send_wlan_disable_to_fw(priv);
  2618. }
  2619. EXPORT_SYMBOL(icnss_wlan_disable);
  2620. bool icnss_is_qmi_disable(struct device *dev)
  2621. {
  2622. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2623. }
  2624. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2625. int icnss_get_ce_id(struct device *dev, int irq)
  2626. {
  2627. int i;
  2628. if (!penv || !penv->pdev || !dev)
  2629. return -ENODEV;
  2630. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2631. if (penv->ce_irqs[i] == irq)
  2632. return i;
  2633. }
  2634. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2635. return -EINVAL;
  2636. }
  2637. EXPORT_SYMBOL(icnss_get_ce_id);
  2638. int icnss_get_irq(struct device *dev, int ce_id)
  2639. {
  2640. int irq;
  2641. if (!penv || !penv->pdev || !dev)
  2642. return -ENODEV;
  2643. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2644. return -EINVAL;
  2645. irq = penv->ce_irqs[ce_id];
  2646. return irq;
  2647. }
  2648. EXPORT_SYMBOL(icnss_get_irq);
  2649. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2650. {
  2651. struct icnss_priv *priv = dev_get_drvdata(dev);
  2652. if (!priv) {
  2653. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2654. return NULL;
  2655. }
  2656. return priv->iommu_domain;
  2657. }
  2658. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2659. int icnss_smmu_map(struct device *dev,
  2660. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2661. {
  2662. struct icnss_priv *priv = dev_get_drvdata(dev);
  2663. int flag = IOMMU_READ | IOMMU_WRITE;
  2664. bool dma_coherent = false;
  2665. unsigned long iova;
  2666. int prop_len = 0;
  2667. size_t len;
  2668. int ret = 0;
  2669. if (!priv) {
  2670. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2671. dev, priv);
  2672. return -EINVAL;
  2673. }
  2674. if (!iova_addr) {
  2675. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2676. &paddr, size);
  2677. return -EINVAL;
  2678. }
  2679. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2680. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2681. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2682. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2683. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2684. iova,
  2685. &priv->smmu_iova_ipa_start,
  2686. priv->smmu_iova_ipa_len);
  2687. return -ENOMEM;
  2688. }
  2689. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2690. icnss_pr_dbg("dma-coherent is %s\n",
  2691. dma_coherent ? "enabled" : "disabled");
  2692. if (dma_coherent)
  2693. flag |= IOMMU_CACHE;
  2694. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2695. ret = iommu_map(priv->iommu_domain, iova,
  2696. rounddown(paddr, PAGE_SIZE), len,
  2697. flag);
  2698. if (ret) {
  2699. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2700. return ret;
  2701. }
  2702. priv->smmu_iova_ipa_current = iova + len;
  2703. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2704. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2705. return 0;
  2706. }
  2707. EXPORT_SYMBOL(icnss_smmu_map);
  2708. int icnss_smmu_unmap(struct device *dev,
  2709. uint32_t iova_addr, size_t size)
  2710. {
  2711. struct icnss_priv *priv = dev_get_drvdata(dev);
  2712. unsigned long iova;
  2713. size_t len, unmapped_len;
  2714. if (!priv) {
  2715. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2716. dev, priv);
  2717. return -EINVAL;
  2718. }
  2719. if (!iova_addr) {
  2720. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2721. size);
  2722. return -EINVAL;
  2723. }
  2724. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2725. PAGE_SIZE);
  2726. iova = rounddown(iova_addr, PAGE_SIZE);
  2727. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2728. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2729. iova,
  2730. &priv->smmu_iova_ipa_start,
  2731. priv->smmu_iova_ipa_len);
  2732. return -ENOMEM;
  2733. }
  2734. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2735. iova, len);
  2736. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2737. if (unmapped_len != len) {
  2738. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2739. return -EINVAL;
  2740. }
  2741. priv->smmu_iova_ipa_current = iova;
  2742. return 0;
  2743. }
  2744. EXPORT_SYMBOL(icnss_smmu_unmap);
  2745. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2746. {
  2747. return socinfo_get_serial_number();
  2748. }
  2749. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2750. int icnss_trigger_recovery(struct device *dev)
  2751. {
  2752. int ret = 0;
  2753. struct icnss_priv *priv = dev_get_drvdata(dev);
  2754. if (priv->magic != ICNSS_MAGIC) {
  2755. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2756. ret = -EINVAL;
  2757. goto out;
  2758. }
  2759. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2760. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2761. priv->state);
  2762. ret = -EPERM;
  2763. goto out;
  2764. }
  2765. if (priv->wpss_supported) {
  2766. icnss_pr_vdbg("Initiate Root PD restart");
  2767. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2768. ICNSS_SMP2P_OUT_POWER_SAVE);
  2769. if (!ret)
  2770. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2771. return ret;
  2772. }
  2773. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2774. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2775. priv->state);
  2776. ret = -EOPNOTSUPP;
  2777. goto out;
  2778. }
  2779. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2780. priv->state);
  2781. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2782. if (!ret)
  2783. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2784. out:
  2785. return ret;
  2786. }
  2787. EXPORT_SYMBOL(icnss_trigger_recovery);
  2788. int icnss_idle_shutdown(struct device *dev)
  2789. {
  2790. struct icnss_priv *priv = dev_get_drvdata(dev);
  2791. if (!priv) {
  2792. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2793. return -EINVAL;
  2794. }
  2795. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2796. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2797. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  2798. return -EBUSY;
  2799. }
  2800. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  2801. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2802. }
  2803. EXPORT_SYMBOL(icnss_idle_shutdown);
  2804. int icnss_idle_restart(struct device *dev)
  2805. {
  2806. struct icnss_priv *priv = dev_get_drvdata(dev);
  2807. if (!priv) {
  2808. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2809. return -EINVAL;
  2810. }
  2811. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2812. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2813. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  2814. return -EBUSY;
  2815. }
  2816. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  2817. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2818. }
  2819. EXPORT_SYMBOL(icnss_idle_restart);
  2820. int icnss_exit_power_save(struct device *dev)
  2821. {
  2822. struct icnss_priv *priv = dev_get_drvdata(dev);
  2823. icnss_pr_vdbg("Calling Exit Power Save\n");
  2824. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2825. !test_bit(ICNSS_MODE_ON, &priv->state))
  2826. return 0;
  2827. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  2828. ICNSS_SMP2P_OUT_POWER_SAVE);
  2829. }
  2830. EXPORT_SYMBOL(icnss_exit_power_save);
  2831. int icnss_prevent_l1(struct device *dev)
  2832. {
  2833. struct icnss_priv *priv = dev_get_drvdata(dev);
  2834. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2835. !test_bit(ICNSS_MODE_ON, &priv->state))
  2836. return 0;
  2837. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  2838. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2839. }
  2840. EXPORT_SYMBOL(icnss_prevent_l1);
  2841. void icnss_allow_l1(struct device *dev)
  2842. {
  2843. struct icnss_priv *priv = dev_get_drvdata(dev);
  2844. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2845. !test_bit(ICNSS_MODE_ON, &priv->state))
  2846. return;
  2847. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  2848. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2849. }
  2850. EXPORT_SYMBOL(icnss_allow_l1);
  2851. void icnss_allow_recursive_recovery(struct device *dev)
  2852. {
  2853. struct icnss_priv *priv = dev_get_drvdata(dev);
  2854. priv->allow_recursive_recovery = true;
  2855. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  2856. }
  2857. void icnss_disallow_recursive_recovery(struct device *dev)
  2858. {
  2859. struct icnss_priv *priv = dev_get_drvdata(dev);
  2860. priv->allow_recursive_recovery = false;
  2861. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  2862. }
  2863. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  2864. {
  2865. struct kobject *icnss_kobject;
  2866. int ret = 0;
  2867. atomic_set(&priv->is_shutdown, false);
  2868. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  2869. if (!icnss_kobject) {
  2870. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  2871. return -EINVAL;
  2872. }
  2873. priv->icnss_kobject = icnss_kobject;
  2874. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  2875. if (ret) {
  2876. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  2877. return ret;
  2878. }
  2879. return ret;
  2880. }
  2881. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  2882. {
  2883. struct kobject *icnss_kobject;
  2884. icnss_kobject = priv->icnss_kobject;
  2885. if (icnss_kobject)
  2886. kobject_put(icnss_kobject);
  2887. }
  2888. static ssize_t qdss_tr_start_store(struct device *dev,
  2889. struct device_attribute *attr,
  2890. const char *buf, size_t count)
  2891. {
  2892. struct icnss_priv *priv = dev_get_drvdata(dev);
  2893. wlfw_qdss_trace_start(priv);
  2894. icnss_pr_dbg("Received QDSS start command\n");
  2895. return count;
  2896. }
  2897. static ssize_t qdss_tr_stop_store(struct device *dev,
  2898. struct device_attribute *attr,
  2899. const char *user_buf, size_t count)
  2900. {
  2901. struct icnss_priv *priv = dev_get_drvdata(dev);
  2902. u32 option = 0;
  2903. if (sscanf(user_buf, "%du", &option) != 1)
  2904. return -EINVAL;
  2905. wlfw_qdss_trace_stop(priv, option);
  2906. icnss_pr_dbg("Received QDSS stop command\n");
  2907. return count;
  2908. }
  2909. static ssize_t qdss_conf_download_store(struct device *dev,
  2910. struct device_attribute *attr,
  2911. const char *buf, size_t count)
  2912. {
  2913. struct icnss_priv *priv = dev_get_drvdata(dev);
  2914. icnss_wlfw_qdss_dnld_send_sync(priv);
  2915. icnss_pr_dbg("Received QDSS download config command\n");
  2916. return count;
  2917. }
  2918. static ssize_t hw_trc_override_store(struct device *dev,
  2919. struct device_attribute *attr,
  2920. const char *buf, size_t count)
  2921. {
  2922. struct icnss_priv *priv = dev_get_drvdata(dev);
  2923. int tmp = 0;
  2924. if (sscanf(buf, "%du", &tmp) != 1)
  2925. return -EINVAL;
  2926. priv->hw_trc_override = tmp;
  2927. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2928. return count;
  2929. }
  2930. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  2931. {
  2932. struct icnss_priv *priv = icnss_get_plat_priv();
  2933. phandle rproc_phandle;
  2934. int ret;
  2935. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  2936. &rproc_phandle)) {
  2937. icnss_pr_err("error reading rproc phandle\n");
  2938. return;
  2939. }
  2940. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  2941. if (IS_ERR_OR_NULL(priv->rproc)) {
  2942. icnss_pr_err("rproc not found");
  2943. return;
  2944. }
  2945. ret = rproc_boot(priv->rproc);
  2946. if (ret) {
  2947. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  2948. rproc_put(priv->rproc);
  2949. }
  2950. }
  2951. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  2952. {
  2953. if (priv && priv->rproc) {
  2954. rproc_shutdown(priv->rproc);
  2955. rproc_put(priv->rproc);
  2956. priv->rproc = NULL;
  2957. }
  2958. }
  2959. static ssize_t wpss_boot_store(struct device *dev,
  2960. struct device_attribute *attr,
  2961. const char *buf, size_t count)
  2962. {
  2963. struct icnss_priv *priv = dev_get_drvdata(dev);
  2964. int wpss_rproc = 0;
  2965. if (!priv->wpss_supported)
  2966. return count;
  2967. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  2968. icnss_pr_err("Failed to read wpss rproc info");
  2969. return -EINVAL;
  2970. }
  2971. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  2972. if (wpss_rproc == 1)
  2973. schedule_work(&wpss_loader);
  2974. else if (wpss_rproc == 0)
  2975. icnss_wpss_unload(priv);
  2976. return count;
  2977. }
  2978. static ssize_t wlan_en_delay_store(struct device *dev,
  2979. struct device_attribute *attr,
  2980. const char *buf, size_t count)
  2981. {
  2982. struct icnss_priv *priv = dev_get_drvdata(dev);
  2983. uint32_t wlan_en_delay = 0;
  2984. if (priv->device_id != WCN6750_DEVICE_ID)
  2985. return count;
  2986. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  2987. icnss_pr_err("Failed to read wlan_en_delay");
  2988. return -EINVAL;
  2989. }
  2990. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  2991. priv->wlan_en_delay_ms = wlan_en_delay;
  2992. return count;
  2993. }
  2994. static DEVICE_ATTR_WO(qdss_tr_start);
  2995. static DEVICE_ATTR_WO(qdss_tr_stop);
  2996. static DEVICE_ATTR_WO(qdss_conf_download);
  2997. static DEVICE_ATTR_WO(hw_trc_override);
  2998. static DEVICE_ATTR_WO(wpss_boot);
  2999. static DEVICE_ATTR_WO(wlan_en_delay);
  3000. static struct attribute *icnss_attrs[] = {
  3001. &dev_attr_qdss_tr_start.attr,
  3002. &dev_attr_qdss_tr_stop.attr,
  3003. &dev_attr_qdss_conf_download.attr,
  3004. &dev_attr_hw_trc_override.attr,
  3005. &dev_attr_wpss_boot.attr,
  3006. &dev_attr_wlan_en_delay.attr,
  3007. NULL,
  3008. };
  3009. static struct attribute_group icnss_attr_group = {
  3010. .attrs = icnss_attrs,
  3011. };
  3012. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3013. {
  3014. struct device *dev = &priv->pdev->dev;
  3015. int ret;
  3016. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3017. if (ret) {
  3018. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3019. ret);
  3020. goto out;
  3021. }
  3022. return 0;
  3023. out:
  3024. return ret;
  3025. }
  3026. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3027. {
  3028. sysfs_remove_link(kernel_kobj, "icnss");
  3029. }
  3030. static int icnss_sysfs_create(struct icnss_priv *priv)
  3031. {
  3032. int ret = 0;
  3033. ret = devm_device_add_group(&priv->pdev->dev,
  3034. &icnss_attr_group);
  3035. if (ret) {
  3036. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3037. ret);
  3038. goto out;
  3039. }
  3040. icnss_create_sysfs_link(priv);
  3041. ret = icnss_create_shutdown_sysfs(priv);
  3042. if (ret)
  3043. goto remove_icnss_group;
  3044. return 0;
  3045. remove_icnss_group:
  3046. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3047. out:
  3048. return ret;
  3049. }
  3050. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3051. {
  3052. icnss_destroy_shutdown_sysfs(priv);
  3053. icnss_remove_sysfs_link(priv);
  3054. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3055. }
  3056. static int icnss_resource_parse(struct icnss_priv *priv)
  3057. {
  3058. int ret = 0, i = 0;
  3059. struct platform_device *pdev = priv->pdev;
  3060. struct device *dev = &pdev->dev;
  3061. struct resource *res;
  3062. u32 int_prop;
  3063. ret = icnss_get_vreg(priv);
  3064. if (ret) {
  3065. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3066. goto out;
  3067. }
  3068. ret = icnss_get_clk(priv);
  3069. if (ret) {
  3070. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3071. goto put_vreg;
  3072. }
  3073. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3074. ret = icnss_get_psf_info(priv);
  3075. if (ret < 0)
  3076. goto out;
  3077. priv->psf_supported = true;
  3078. }
  3079. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3080. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3081. "membase");
  3082. if (!res) {
  3083. icnss_pr_err("Memory base not found in DT\n");
  3084. ret = -EINVAL;
  3085. goto put_clk;
  3086. }
  3087. priv->mem_base_pa = res->start;
  3088. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3089. resource_size(res));
  3090. if (!priv->mem_base_va) {
  3091. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3092. &priv->mem_base_pa);
  3093. ret = -EINVAL;
  3094. goto put_clk;
  3095. }
  3096. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3097. &priv->mem_base_pa,
  3098. priv->mem_base_va);
  3099. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3100. res = platform_get_resource(priv->pdev,
  3101. IORESOURCE_IRQ, i);
  3102. if (!res) {
  3103. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3104. ret = -ENODEV;
  3105. goto put_clk;
  3106. } else {
  3107. priv->ce_irqs[i] = res->start;
  3108. }
  3109. }
  3110. } else if (priv->device_id == WCN6750_DEVICE_ID) {
  3111. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3112. "msi_addr");
  3113. if (!res) {
  3114. icnss_pr_err("MSI address not found in DT\n");
  3115. ret = -EINVAL;
  3116. goto put_clk;
  3117. }
  3118. priv->msi_addr_pa = res->start;
  3119. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3120. PAGE_SIZE,
  3121. DMA_FROM_DEVICE, 0);
  3122. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3123. icnss_pr_err("MSI: failed to map msi address\n");
  3124. priv->msi_addr_iova = 0;
  3125. ret = -ENOMEM;
  3126. goto put_clk;
  3127. }
  3128. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3129. &priv->msi_addr_pa,
  3130. priv->msi_addr_iova);
  3131. ret = of_property_read_u32_index(dev->of_node,
  3132. "interrupts",
  3133. 1,
  3134. &int_prop);
  3135. if (ret) {
  3136. icnss_pr_dbg("Read interrupt prop failed");
  3137. goto put_clk;
  3138. }
  3139. priv->msi_base_data = int_prop + 32;
  3140. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3141. priv->msi_base_data, int_prop);
  3142. icnss_get_msi_assignment(priv);
  3143. for (i = 0; i < msi_config.total_vectors; i++) {
  3144. res = platform_get_resource(priv->pdev,
  3145. IORESOURCE_IRQ, i);
  3146. if (!res) {
  3147. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3148. ret = -ENODEV;
  3149. goto put_clk;
  3150. } else {
  3151. priv->srng_irqs[i] = res->start;
  3152. }
  3153. }
  3154. }
  3155. return 0;
  3156. put_clk:
  3157. icnss_put_clk(priv);
  3158. put_vreg:
  3159. icnss_put_vreg(priv);
  3160. out:
  3161. return ret;
  3162. }
  3163. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3164. {
  3165. int ret = 0;
  3166. struct platform_device *pdev = priv->pdev;
  3167. struct device *dev = &pdev->dev;
  3168. struct device_node *np = NULL;
  3169. u64 prop_size = 0;
  3170. const __be32 *addrp = NULL;
  3171. np = of_parse_phandle(dev->of_node,
  3172. "qcom,wlan-msa-fixed-region", 0);
  3173. if (np) {
  3174. addrp = of_get_address(np, 0, &prop_size, NULL);
  3175. if (!addrp) {
  3176. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3177. ret = -EINVAL;
  3178. of_node_put(np);
  3179. goto out;
  3180. }
  3181. priv->msa_pa = of_translate_address(np, addrp);
  3182. if (priv->msa_pa == OF_BAD_ADDR) {
  3183. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3184. ret = -EINVAL;
  3185. of_node_put(np);
  3186. goto out;
  3187. }
  3188. of_node_put(np);
  3189. priv->msa_va = memremap(priv->msa_pa,
  3190. (unsigned long)prop_size, MEMREMAP_WT);
  3191. if (!priv->msa_va) {
  3192. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3193. &priv->msa_pa);
  3194. ret = -EINVAL;
  3195. goto out;
  3196. }
  3197. priv->msa_mem_size = prop_size;
  3198. } else {
  3199. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3200. &priv->msa_mem_size);
  3201. if (ret || priv->msa_mem_size == 0) {
  3202. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3203. priv->msa_mem_size, ret);
  3204. goto out;
  3205. }
  3206. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3207. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3208. if (!priv->msa_va) {
  3209. icnss_pr_err("DMA alloc failed for MSA\n");
  3210. ret = -ENOMEM;
  3211. goto out;
  3212. }
  3213. }
  3214. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3215. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3216. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3217. "qcom,fw-prefix");
  3218. return 0;
  3219. out:
  3220. return ret;
  3221. }
  3222. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3223. struct device *dev, unsigned long iova,
  3224. int flags, void *handler_token)
  3225. {
  3226. struct icnss_priv *priv = handler_token;
  3227. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3228. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3229. if (!priv) {
  3230. icnss_pr_err("priv is NULL\n");
  3231. return -ENODEV;
  3232. }
  3233. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3234. fw_down_data.crashed = true;
  3235. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3236. &fw_down_data);
  3237. }
  3238. icnss_trigger_recovery(&priv->pdev->dev);
  3239. /* IOMMU driver requires non-zero return value to print debug info. */
  3240. return -EINVAL;
  3241. }
  3242. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3243. {
  3244. int ret = 0;
  3245. struct platform_device *pdev = priv->pdev;
  3246. struct device *dev = &pdev->dev;
  3247. const char *iommu_dma_type;
  3248. struct resource *res;
  3249. u32 addr_win[2];
  3250. ret = of_property_read_u32_array(dev->of_node,
  3251. "qcom,iommu-dma-addr-pool",
  3252. addr_win,
  3253. ARRAY_SIZE(addr_win));
  3254. if (ret) {
  3255. icnss_pr_err("SMMU IOVA base not found\n");
  3256. } else {
  3257. priv->smmu_iova_start = addr_win[0];
  3258. priv->smmu_iova_len = addr_win[1];
  3259. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3260. &priv->smmu_iova_start,
  3261. priv->smmu_iova_len);
  3262. priv->iommu_domain =
  3263. iommu_get_domain_for_dev(&pdev->dev);
  3264. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3265. &iommu_dma_type);
  3266. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3267. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3268. priv->smmu_s1_enable = true;
  3269. if (priv->device_id == WCN6750_DEVICE_ID)
  3270. iommu_set_fault_handler(priv->iommu_domain,
  3271. icnss_smmu_fault_handler,
  3272. priv);
  3273. }
  3274. res = platform_get_resource_byname(pdev,
  3275. IORESOURCE_MEM,
  3276. "smmu_iova_ipa");
  3277. if (!res) {
  3278. icnss_pr_err("SMMU IOVA IPA not found\n");
  3279. } else {
  3280. priv->smmu_iova_ipa_start = res->start;
  3281. priv->smmu_iova_ipa_current = res->start;
  3282. priv->smmu_iova_ipa_len = resource_size(res);
  3283. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3284. &priv->smmu_iova_ipa_start,
  3285. priv->smmu_iova_ipa_len);
  3286. }
  3287. }
  3288. return 0;
  3289. }
  3290. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3291. {
  3292. if (!priv)
  3293. return -ENODEV;
  3294. if (!priv->smmu_iova_len)
  3295. return -EINVAL;
  3296. *addr = priv->smmu_iova_start;
  3297. *size = priv->smmu_iova_len;
  3298. return 0;
  3299. }
  3300. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3301. {
  3302. if (!priv)
  3303. return -ENODEV;
  3304. if (!priv->smmu_iova_ipa_len)
  3305. return -EINVAL;
  3306. *addr = priv->smmu_iova_ipa_start;
  3307. *size = priv->smmu_iova_ipa_len;
  3308. return 0;
  3309. }
  3310. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3311. char *name)
  3312. {
  3313. if (!priv)
  3314. return;
  3315. if (!priv->use_prefix_path) {
  3316. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3317. return;
  3318. }
  3319. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3320. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3321. ADRASTEA_PATH_PREFIX "%s", name);
  3322. else
  3323. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3324. QCA6750_PATH_PREFIX "%s", name);
  3325. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3326. }
  3327. static const struct platform_device_id icnss_platform_id_table[] = {
  3328. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3329. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3330. { },
  3331. };
  3332. static const struct of_device_id icnss_dt_match[] = {
  3333. {
  3334. .compatible = "qcom,wcn6750",
  3335. .data = (void *)&icnss_platform_id_table[0]},
  3336. {
  3337. .compatible = "qcom,icnss",
  3338. .data = (void *)&icnss_platform_id_table[1]},
  3339. { },
  3340. };
  3341. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3342. static void icnss_init_control_params(struct icnss_priv *priv)
  3343. {
  3344. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3345. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3346. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3347. if (priv->device_id == WCN6750_DEVICE_ID ||
  3348. of_property_read_bool(priv->pdev->dev.of_node,
  3349. "wpss-support-enable"))
  3350. priv->wpss_supported = true;
  3351. if (of_property_read_bool(priv->pdev->dev.of_node,
  3352. "bdf-download-support"))
  3353. priv->bdf_download_support = true;
  3354. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3355. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3356. }
  3357. static void icnss_read_device_configs(struct icnss_priv *priv)
  3358. {
  3359. if (of_property_read_bool(priv->pdev->dev.of_node,
  3360. "wlan-ipa-disabled")) {
  3361. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3362. }
  3363. }
  3364. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3365. {
  3366. pm_runtime_get_sync(&priv->pdev->dev);
  3367. pm_runtime_forbid(&priv->pdev->dev);
  3368. pm_runtime_set_active(&priv->pdev->dev);
  3369. pm_runtime_enable(&priv->pdev->dev);
  3370. }
  3371. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3372. {
  3373. pm_runtime_disable(&priv->pdev->dev);
  3374. pm_runtime_allow(&priv->pdev->dev);
  3375. pm_runtime_put_sync(&priv->pdev->dev);
  3376. }
  3377. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3378. {
  3379. return of_property_read_bool(priv->pdev->dev.of_node,
  3380. "use-nv-mac");
  3381. }
  3382. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3383. {
  3384. struct icnss_subsys_restart_level_data *restart_level_data;
  3385. icnss_pr_info("rproc name: %s recovery disable: %d",
  3386. rproc->name, rproc->recovery_disabled);
  3387. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3388. if (!restart_level_data)
  3389. return;
  3390. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3391. if (rproc->recovery_disabled)
  3392. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3393. else
  3394. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3395. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3396. 0, restart_level_data);
  3397. }
  3398. }
  3399. static int icnss_probe(struct platform_device *pdev)
  3400. {
  3401. int ret = 0;
  3402. struct device *dev = &pdev->dev;
  3403. struct icnss_priv *priv;
  3404. const struct of_device_id *of_id;
  3405. const struct platform_device_id *device_id;
  3406. if (dev_get_drvdata(dev)) {
  3407. icnss_pr_err("Driver is already initialized\n");
  3408. return -EEXIST;
  3409. }
  3410. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3411. if (!of_id || !of_id->data) {
  3412. icnss_pr_err("Failed to find of match device!\n");
  3413. ret = -ENODEV;
  3414. goto out_reset_drvdata;
  3415. }
  3416. device_id = of_id->data;
  3417. icnss_pr_dbg("Platform driver probe\n");
  3418. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3419. if (!priv)
  3420. return -ENOMEM;
  3421. priv->magic = ICNSS_MAGIC;
  3422. dev_set_drvdata(dev, priv);
  3423. priv->pdev = pdev;
  3424. priv->device_id = device_id->driver_data;
  3425. priv->is_chain1_supported = true;
  3426. INIT_LIST_HEAD(&priv->vreg_list);
  3427. INIT_LIST_HEAD(&priv->clk_list);
  3428. icnss_allow_recursive_recovery(dev);
  3429. icnss_init_control_params(priv);
  3430. icnss_read_device_configs(priv);
  3431. ret = icnss_resource_parse(priv);
  3432. if (ret)
  3433. goto out_reset_drvdata;
  3434. ret = icnss_msa_dt_parse(priv);
  3435. if (ret)
  3436. goto out_free_resources;
  3437. ret = icnss_smmu_dt_parse(priv);
  3438. if (ret)
  3439. goto out_free_resources;
  3440. spin_lock_init(&priv->event_lock);
  3441. spin_lock_init(&priv->on_off_lock);
  3442. spin_lock_init(&priv->soc_wake_msg_lock);
  3443. mutex_init(&priv->dev_lock);
  3444. mutex_init(&priv->tcdev_lock);
  3445. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3446. if (!priv->event_wq) {
  3447. icnss_pr_err("Workqueue creation failed\n");
  3448. ret = -EFAULT;
  3449. goto smmu_cleanup;
  3450. }
  3451. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3452. INIT_LIST_HEAD(&priv->event_list);
  3453. ret = icnss_register_fw_service(priv);
  3454. if (ret < 0) {
  3455. icnss_pr_err("fw service registration failed: %d\n", ret);
  3456. goto out_destroy_wq;
  3457. }
  3458. icnss_enable_recovery(priv);
  3459. icnss_debugfs_create(priv);
  3460. icnss_sysfs_create(priv);
  3461. ret = device_init_wakeup(&priv->pdev->dev, true);
  3462. if (ret)
  3463. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3464. ret);
  3465. icnss_set_plat_priv(priv);
  3466. init_completion(&priv->unblock_shutdown);
  3467. if (priv->device_id == WCN6750_DEVICE_ID) {
  3468. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3469. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3470. if (!priv->soc_wake_wq) {
  3471. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3472. ret = -EFAULT;
  3473. goto out_unregister_fw_service;
  3474. }
  3475. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3476. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3477. ret = icnss_genl_init();
  3478. if (ret < 0)
  3479. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3480. init_completion(&priv->smp2p_soc_wake_wait);
  3481. icnss_runtime_pm_init(priv);
  3482. icnss_aop_mbox_init(priv);
  3483. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3484. priv->bdf_download_support = true;
  3485. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3486. }
  3487. if (priv->wpss_supported) {
  3488. ret = icnss_dms_init(priv);
  3489. if (ret)
  3490. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3491. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3492. icnss_pr_dbg("NV MAC feature is %s\n",
  3493. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3494. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3495. }
  3496. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3497. icnss_pr_info("Platform driver probed successfully\n");
  3498. return 0;
  3499. out_unregister_fw_service:
  3500. icnss_unregister_fw_service(priv);
  3501. out_destroy_wq:
  3502. destroy_workqueue(priv->event_wq);
  3503. smmu_cleanup:
  3504. priv->iommu_domain = NULL;
  3505. out_free_resources:
  3506. icnss_put_resources(priv);
  3507. out_reset_drvdata:
  3508. dev_set_drvdata(dev, NULL);
  3509. return ret;
  3510. }
  3511. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3512. {
  3513. if (IS_ERR_OR_NULL(ramdump_info))
  3514. return;
  3515. device_unregister(ramdump_info->dev);
  3516. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3517. kfree(ramdump_info);
  3518. }
  3519. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3520. {
  3521. if (priv->batt_psy)
  3522. power_supply_put(penv->batt_psy);
  3523. if (priv->psf_supported) {
  3524. flush_workqueue(priv->soc_update_wq);
  3525. destroy_workqueue(priv->soc_update_wq);
  3526. power_supply_unreg_notifier(&priv->psf_nb);
  3527. }
  3528. }
  3529. static int icnss_remove(struct platform_device *pdev)
  3530. {
  3531. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3532. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3533. device_init_wakeup(&priv->pdev->dev, false);
  3534. icnss_debugfs_destroy(priv);
  3535. icnss_unregister_power_supply_notifier(penv);
  3536. icnss_sysfs_destroy(priv);
  3537. complete_all(&priv->unblock_shutdown);
  3538. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3539. if (priv->wpss_supported) {
  3540. icnss_dms_deinit(priv);
  3541. icnss_wpss_early_ssr_unregister_notifier(priv);
  3542. icnss_wpss_ssr_unregister_notifier(priv);
  3543. } else {
  3544. icnss_modem_ssr_unregister_notifier(priv);
  3545. icnss_pdr_unregister_notifier(priv);
  3546. }
  3547. if (priv->device_id == WCN6750_DEVICE_ID) {
  3548. icnss_genl_exit();
  3549. icnss_runtime_pm_deinit(priv);
  3550. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3551. mbox_free_channel(priv->mbox_chan);
  3552. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3553. complete_all(&priv->smp2p_soc_wake_wait);
  3554. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3555. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3556. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3557. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3558. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3559. if (priv->soc_wake_wq)
  3560. destroy_workqueue(priv->soc_wake_wq);
  3561. }
  3562. class_destroy(priv->icnss_ramdump_class);
  3563. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3564. icnss_unregister_fw_service(priv);
  3565. if (priv->event_wq)
  3566. destroy_workqueue(priv->event_wq);
  3567. priv->iommu_domain = NULL;
  3568. icnss_hw_power_off(priv);
  3569. icnss_put_resources(priv);
  3570. dev_set_drvdata(&pdev->dev, NULL);
  3571. return 0;
  3572. }
  3573. #ifdef CONFIG_PM_SLEEP
  3574. static int icnss_pm_suspend(struct device *dev)
  3575. {
  3576. struct icnss_priv *priv = dev_get_drvdata(dev);
  3577. int ret = 0;
  3578. if (priv->magic != ICNSS_MAGIC) {
  3579. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3580. dev, priv, priv->magic);
  3581. return -EINVAL;
  3582. }
  3583. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3584. if (!priv->ops || !priv->ops->pm_suspend ||
  3585. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3586. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3587. return 0;
  3588. ret = priv->ops->pm_suspend(dev);
  3589. if (ret == 0) {
  3590. if (priv->device_id == WCN6750_DEVICE_ID) {
  3591. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3592. !test_bit(ICNSS_MODE_ON, &priv->state))
  3593. return 0;
  3594. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3595. ICNSS_SMP2P_OUT_POWER_SAVE);
  3596. }
  3597. priv->stats.pm_suspend++;
  3598. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3599. } else {
  3600. priv->stats.pm_suspend_err++;
  3601. }
  3602. return ret;
  3603. }
  3604. static int icnss_pm_resume(struct device *dev)
  3605. {
  3606. struct icnss_priv *priv = dev_get_drvdata(dev);
  3607. int ret = 0;
  3608. if (priv->magic != ICNSS_MAGIC) {
  3609. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3610. dev, priv, priv->magic);
  3611. return -EINVAL;
  3612. }
  3613. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3614. if (!priv->ops || !priv->ops->pm_resume ||
  3615. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3616. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3617. goto out;
  3618. ret = priv->ops->pm_resume(dev);
  3619. out:
  3620. if (ret == 0) {
  3621. priv->stats.pm_resume++;
  3622. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3623. } else {
  3624. priv->stats.pm_resume_err++;
  3625. }
  3626. return ret;
  3627. }
  3628. static int icnss_pm_suspend_noirq(struct device *dev)
  3629. {
  3630. struct icnss_priv *priv = dev_get_drvdata(dev);
  3631. int ret = 0;
  3632. if (priv->magic != ICNSS_MAGIC) {
  3633. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3634. dev, priv, priv->magic);
  3635. return -EINVAL;
  3636. }
  3637. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3638. if (!priv->ops || !priv->ops->suspend_noirq ||
  3639. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3640. goto out;
  3641. ret = priv->ops->suspend_noirq(dev);
  3642. out:
  3643. if (ret == 0) {
  3644. priv->stats.pm_suspend_noirq++;
  3645. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3646. } else {
  3647. priv->stats.pm_suspend_noirq_err++;
  3648. }
  3649. return ret;
  3650. }
  3651. static int icnss_pm_resume_noirq(struct device *dev)
  3652. {
  3653. struct icnss_priv *priv = dev_get_drvdata(dev);
  3654. int ret = 0;
  3655. if (priv->magic != ICNSS_MAGIC) {
  3656. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3657. dev, priv, priv->magic);
  3658. return -EINVAL;
  3659. }
  3660. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3661. if (!priv->ops || !priv->ops->resume_noirq ||
  3662. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3663. goto out;
  3664. ret = priv->ops->resume_noirq(dev);
  3665. out:
  3666. if (ret == 0) {
  3667. priv->stats.pm_resume_noirq++;
  3668. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3669. } else {
  3670. priv->stats.pm_resume_noirq_err++;
  3671. }
  3672. return ret;
  3673. }
  3674. static int icnss_pm_runtime_suspend(struct device *dev)
  3675. {
  3676. struct icnss_priv *priv = dev_get_drvdata(dev);
  3677. int ret = 0;
  3678. if (priv->device_id != WCN6750_DEVICE_ID) {
  3679. icnss_pr_err("Ignore runtime suspend:\n");
  3680. goto out;
  3681. }
  3682. if (priv->magic != ICNSS_MAGIC) {
  3683. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3684. dev, priv, priv->magic);
  3685. return -EINVAL;
  3686. }
  3687. if (!priv->ops || !priv->ops->runtime_suspend ||
  3688. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3689. goto out;
  3690. icnss_pr_vdbg("Runtime suspend\n");
  3691. ret = priv->ops->runtime_suspend(dev);
  3692. if (!ret) {
  3693. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3694. !test_bit(ICNSS_MODE_ON, &priv->state))
  3695. return 0;
  3696. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3697. ICNSS_SMP2P_OUT_POWER_SAVE);
  3698. }
  3699. out:
  3700. return ret;
  3701. }
  3702. static int icnss_pm_runtime_resume(struct device *dev)
  3703. {
  3704. struct icnss_priv *priv = dev_get_drvdata(dev);
  3705. int ret = 0;
  3706. if (priv->device_id != WCN6750_DEVICE_ID) {
  3707. icnss_pr_err("Ignore runtime resume:\n");
  3708. goto out;
  3709. }
  3710. if (priv->magic != ICNSS_MAGIC) {
  3711. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3712. dev, priv, priv->magic);
  3713. return -EINVAL;
  3714. }
  3715. if (!priv->ops || !priv->ops->runtime_resume ||
  3716. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3717. goto out;
  3718. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3719. ret = priv->ops->runtime_resume(dev);
  3720. out:
  3721. return ret;
  3722. }
  3723. static int icnss_pm_runtime_idle(struct device *dev)
  3724. {
  3725. struct icnss_priv *priv = dev_get_drvdata(dev);
  3726. if (priv->device_id != WCN6750_DEVICE_ID) {
  3727. icnss_pr_err("Ignore runtime idle:\n");
  3728. goto out;
  3729. }
  3730. icnss_pr_vdbg("Runtime idle\n");
  3731. pm_request_autosuspend(dev);
  3732. out:
  3733. return -EBUSY;
  3734. }
  3735. #endif
  3736. static const struct dev_pm_ops icnss_pm_ops = {
  3737. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3738. icnss_pm_resume)
  3739. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  3740. icnss_pm_resume_noirq)
  3741. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  3742. icnss_pm_runtime_idle)
  3743. };
  3744. static struct platform_driver icnss_driver = {
  3745. .probe = icnss_probe,
  3746. .remove = icnss_remove,
  3747. .driver = {
  3748. .name = "icnss2",
  3749. .pm = &icnss_pm_ops,
  3750. .of_match_table = icnss_dt_match,
  3751. },
  3752. };
  3753. static int __init icnss_initialize(void)
  3754. {
  3755. icnss_debug_init();
  3756. return platform_driver_register(&icnss_driver);
  3757. }
  3758. static void __exit icnss_exit(void)
  3759. {
  3760. platform_driver_unregister(&icnss_driver);
  3761. icnss_debug_deinit();
  3762. }
  3763. module_init(icnss_initialize);
  3764. module_exit(icnss_exit);
  3765. MODULE_LICENSE("GPL v2");
  3766. MODULE_DESCRIPTION("iWCN CORE platform driver");