dp_rx.h 31 KB

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  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _DP_RX_H
  19. #define _DP_RX_H
  20. #include "hal_rx.h"
  21. #include "dp_tx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #ifdef RXDMA_OPTIMIZATION
  25. #ifdef NO_RX_PKT_HDR_TLV
  26. #define RX_BUFFER_ALIGNMENT 0
  27. #else
  28. #define RX_BUFFER_ALIGNMENT 128
  29. #endif /* NO_RX_PKT_HDR_TLV */
  30. #else /* RXDMA_OPTIMIZATION */
  31. #define RX_BUFFER_ALIGNMENT 4
  32. #endif /* RXDMA_OPTIMIZATION */
  33. #ifdef QCA_HOST2FW_RXBUF_RING
  34. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW1_BM
  35. #else
  36. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW3_BM
  37. #endif /* QCA_HOST2FW_RXBUF_RING */
  38. #define RX_BUFFER_RESERVATION 0
  39. #define DP_PEER_METADATA_PEER_ID_MASK 0x0000ffff
  40. #define DP_PEER_METADATA_PEER_ID_SHIFT 0
  41. #define DP_PEER_METADATA_VDEV_ID_MASK 0x00070000
  42. #define DP_PEER_METADATA_VDEV_ID_SHIFT 16
  43. #define DP_PEER_METADATA_PEER_ID_GET(_peer_metadata) \
  44. (((_peer_metadata) & DP_PEER_METADATA_PEER_ID_MASK) \
  45. >> DP_PEER_METADATA_PEER_ID_SHIFT)
  46. #define DP_PEER_METADATA_ID_GET(_peer_metadata) \
  47. (((_peer_metadata) & DP_PEER_METADATA_VDEV_ID_MASK) \
  48. >> DP_PEER_METADATA_VDEV_ID_SHIFT)
  49. #define DP_RX_DESC_MAGIC 0xdec0de
  50. /**
  51. * struct dp_rx_desc
  52. *
  53. * @nbuf : VA of the "skb" posted
  54. * @rx_buf_start : VA of the original Rx buffer, before
  55. * movement of any skb->data pointer
  56. * @cookie : index into the sw array which holds
  57. * the sw Rx descriptors
  58. * Cookie space is 21 bits:
  59. * lower 18 bits -- index
  60. * upper 3 bits -- pool_id
  61. * @pool_id : pool Id for which this allocated.
  62. * Can only be used if there is no flow
  63. * steering
  64. * @in_use rx_desc is in use
  65. * @unmapped used to mark rx_desc an unmapped if the corresponding
  66. * nbuf is already unmapped
  67. */
  68. struct dp_rx_desc {
  69. qdf_nbuf_t nbuf;
  70. uint8_t *rx_buf_start;
  71. uint32_t cookie;
  72. uint8_t pool_id;
  73. #ifdef RX_DESC_DEBUG_CHECK
  74. uint32_t magic;
  75. #endif
  76. uint8_t in_use:1,
  77. unmapped:1;
  78. };
  79. /* RX Descriptor Multi Page memory alloc related */
  80. #define DP_RX_DESC_OFFSET_NUM_BITS 8
  81. #define DP_RX_DESC_PAGE_ID_NUM_BITS 8
  82. #define DP_RX_DESC_POOL_ID_NUM_BITS 4
  83. #define DP_RX_DESC_PAGE_ID_SHIFT DP_RX_DESC_OFFSET_NUM_BITS
  84. #define DP_RX_DESC_POOL_ID_SHIFT \
  85. (DP_RX_DESC_OFFSET_NUM_BITS + DP_RX_DESC_PAGE_ID_NUM_BITS)
  86. #define RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK \
  87. (((1 << DP_RX_DESC_POOL_ID_NUM_BITS) - 1) << DP_RX_DESC_POOL_ID_SHIFT)
  88. #define RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK \
  89. (((1 << DP_RX_DESC_PAGE_ID_NUM_BITS) - 1) << \
  90. DP_RX_DESC_PAGE_ID_SHIFT)
  91. #define RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK \
  92. ((1 << DP_RX_DESC_OFFSET_NUM_BITS) - 1)
  93. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(_cookie) \
  94. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK) >> \
  95. DP_RX_DESC_POOL_ID_SHIFT)
  96. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(_cookie) \
  97. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK) >> \
  98. DP_RX_DESC_PAGE_ID_SHIFT)
  99. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(_cookie) \
  100. ((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK)
  101. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  102. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  103. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  104. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  105. #define DP_RX_DESC_COOKIE_MAX \
  106. (RX_DESC_COOKIE_INDEX_MASK | RX_DESC_COOKIE_POOL_ID_MASK)
  107. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  108. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  109. RX_DESC_COOKIE_POOL_ID_SHIFT)
  110. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  111. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  112. RX_DESC_COOKIE_INDEX_SHIFT)
  113. /* DOC: Offset to obtain LLC hdr
  114. *
  115. * In the case of Wifi parse error
  116. * to reach LLC header from beginning
  117. * of VLAN tag we need to skip 8 bytes.
  118. * Vlan_tag(4)+length(2)+length added
  119. * by HW(2) = 8 bytes.
  120. */
  121. #define DP_SKIP_VLAN 8
  122. /**
  123. * struct dp_rx_cached_buf - rx cached buffer
  124. * @list: linked list node
  125. * @buf: skb buffer
  126. */
  127. struct dp_rx_cached_buf {
  128. qdf_list_node_t node;
  129. qdf_nbuf_t buf;
  130. };
  131. /*
  132. *dp_rx_xor_block() - xor block of data
  133. *@b: destination data block
  134. *@a: source data block
  135. *@len: length of the data to process
  136. *
  137. *Returns: None
  138. */
  139. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  140. {
  141. qdf_size_t i;
  142. for (i = 0; i < len; i++)
  143. b[i] ^= a[i];
  144. }
  145. /*
  146. *dp_rx_rotl() - rotate the bits left
  147. *@val: unsigned integer input value
  148. *@bits: number of bits
  149. *
  150. *Returns: Integer with left rotated by number of 'bits'
  151. */
  152. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  153. {
  154. return (val << bits) | (val >> (32 - bits));
  155. }
  156. /*
  157. *dp_rx_rotr() - rotate the bits right
  158. *@val: unsigned integer input value
  159. *@bits: number of bits
  160. *
  161. *Returns: Integer with right rotated by number of 'bits'
  162. */
  163. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  164. {
  165. return (val >> bits) | (val << (32 - bits));
  166. }
  167. /*
  168. * dp_set_rx_queue() - set queue_mapping in skb
  169. * @nbuf: skb
  170. * @queue_id: rx queue_id
  171. *
  172. * Return: void
  173. */
  174. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  175. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  176. {
  177. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  178. return;
  179. }
  180. #else
  181. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  182. {
  183. }
  184. #endif
  185. /*
  186. *dp_rx_xswap() - swap the bits left
  187. *@val: unsigned integer input value
  188. *
  189. *Returns: Integer with bits swapped
  190. */
  191. static inline uint32_t dp_rx_xswap(uint32_t val)
  192. {
  193. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  194. }
  195. /*
  196. *dp_rx_get_le32_split() - get little endian 32 bits split
  197. *@b0: byte 0
  198. *@b1: byte 1
  199. *@b2: byte 2
  200. *@b3: byte 3
  201. *
  202. *Returns: Integer with split little endian 32 bits
  203. */
  204. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  205. uint8_t b3)
  206. {
  207. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  208. }
  209. /*
  210. *dp_rx_get_le32() - get little endian 32 bits
  211. *@b0: byte 0
  212. *@b1: byte 1
  213. *@b2: byte 2
  214. *@b3: byte 3
  215. *
  216. *Returns: Integer with little endian 32 bits
  217. */
  218. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  219. {
  220. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  221. }
  222. /*
  223. * dp_rx_put_le32() - put little endian 32 bits
  224. * @p: destination char array
  225. * @v: source 32-bit integer
  226. *
  227. * Returns: None
  228. */
  229. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  230. {
  231. p[0] = (v) & 0xff;
  232. p[1] = (v >> 8) & 0xff;
  233. p[2] = (v >> 16) & 0xff;
  234. p[3] = (v >> 24) & 0xff;
  235. }
  236. /* Extract michal mic block of data */
  237. #define dp_rx_michael_block(l, r) \
  238. do { \
  239. r ^= dp_rx_rotl(l, 17); \
  240. l += r; \
  241. r ^= dp_rx_xswap(l); \
  242. l += r; \
  243. r ^= dp_rx_rotl(l, 3); \
  244. l += r; \
  245. r ^= dp_rx_rotr(l, 2); \
  246. l += r; \
  247. } while (0)
  248. /**
  249. * struct dp_rx_desc_list_elem_t
  250. *
  251. * @next : Next pointer to form free list
  252. * @rx_desc : DP Rx descriptor
  253. */
  254. union dp_rx_desc_list_elem_t {
  255. union dp_rx_desc_list_elem_t *next;
  256. struct dp_rx_desc rx_desc;
  257. };
  258. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  259. /**
  260. * dp_rx_desc_find() - find dp rx descriptor from page ID and offset
  261. * @page_id: Page ID
  262. * @offset: Offset of the descriptor element
  263. *
  264. * Return: RX descriptor element
  265. */
  266. union dp_rx_desc_list_elem_t *dp_rx_desc_find(uint16_t page_id, uint16_t offset,
  267. struct rx_desc_pool *rx_pool);
  268. static inline
  269. struct dp_rx_desc *dp_get_rx_desc_from_cookie(struct dp_soc *soc,
  270. struct rx_desc_pool *pool,
  271. uint32_t cookie)
  272. {
  273. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  274. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  275. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  276. struct rx_desc_pool *rx_desc_pool;
  277. union dp_rx_desc_list_elem_t *rx_desc_elem;
  278. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  279. return NULL;
  280. rx_desc_pool = &pool[pool_id];
  281. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  282. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  283. rx_desc_pool->elem_size * offset);
  284. return &rx_desc_elem->rx_desc;
  285. }
  286. /**
  287. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  288. * the Rx descriptor on Rx DMA source ring buffer
  289. * @soc: core txrx main context
  290. * @cookie: cookie used to lookup virtual address
  291. *
  292. * Return: Pointer to the Rx descriptor
  293. */
  294. static inline
  295. struct dp_rx_desc *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc,
  296. uint32_t cookie)
  297. {
  298. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_buf[0], cookie);
  299. }
  300. /**
  301. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  302. * the Rx descriptor on monitor ring buffer
  303. * @soc: core txrx main context
  304. * @cookie: cookie used to lookup virtual address
  305. *
  306. * Return: Pointer to the Rx descriptor
  307. */
  308. static inline
  309. struct dp_rx_desc *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc,
  310. uint32_t cookie)
  311. {
  312. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_mon[0], cookie);
  313. }
  314. /**
  315. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  316. * the Rx descriptor on monitor status ring buffer
  317. * @soc: core txrx main context
  318. * @cookie: cookie used to lookup virtual address
  319. *
  320. * Return: Pointer to the Rx descriptor
  321. */
  322. static inline
  323. struct dp_rx_desc *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc,
  324. uint32_t cookie)
  325. {
  326. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_status[0], cookie);
  327. }
  328. #else
  329. /**
  330. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  331. * the Rx descriptor on Rx DMA source ring buffer
  332. * @soc: core txrx main context
  333. * @cookie: cookie used to lookup virtual address
  334. *
  335. * Return: void *: Virtual Address of the Rx descriptor
  336. */
  337. static inline
  338. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  339. {
  340. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  341. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  342. struct rx_desc_pool *rx_desc_pool;
  343. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  344. return NULL;
  345. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  346. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  347. return NULL;
  348. return &(soc->rx_desc_buf[pool_id].array[index].rx_desc);
  349. }
  350. /**
  351. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  352. * the Rx descriptor on monitor ring buffer
  353. * @soc: core txrx main context
  354. * @cookie: cookie used to lookup virtual address
  355. *
  356. * Return: void *: Virtual Address of the Rx descriptor
  357. */
  358. static inline
  359. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  360. {
  361. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  362. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  363. /* TODO */
  364. /* Add sanity for pool_id & index */
  365. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  366. }
  367. /**
  368. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  369. * the Rx descriptor on monitor status ring buffer
  370. * @soc: core txrx main context
  371. * @cookie: cookie used to lookup virtual address
  372. *
  373. * Return: void *: Virtual Address of the Rx descriptor
  374. */
  375. static inline
  376. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  377. {
  378. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  379. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  380. /* TODO */
  381. /* Add sanity for pool_id & index */
  382. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  383. }
  384. #endif /* RX_DESC_MULTI_PAGE_ALLOC */
  385. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  386. union dp_rx_desc_list_elem_t **local_desc_list,
  387. union dp_rx_desc_list_elem_t **tail,
  388. uint16_t pool_id,
  389. struct rx_desc_pool *rx_desc_pool);
  390. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  391. struct rx_desc_pool *rx_desc_pool,
  392. uint16_t num_descs,
  393. union dp_rx_desc_list_elem_t **desc_list,
  394. union dp_rx_desc_list_elem_t **tail);
  395. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  396. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  397. void dp_print_napi_stats(struct dp_soc *soc);
  398. uint32_t
  399. dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  400. uint8_t reo_ring_num,
  401. uint32_t quota);
  402. /**
  403. * dp_rx_err_process() - Processes error frames routed to REO error ring
  404. * @int_ctx: pointer to DP interrupt context
  405. * @soc: core txrx main context
  406. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  407. * @quota: No. of units (packets) that can be serviced in one shot.
  408. *
  409. * This function implements error processing and top level demultiplexer
  410. * for all the frames routed to REO error ring.
  411. *
  412. * Return: uint32_t: No. of elements processed
  413. */
  414. uint32_t dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  415. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  416. /**
  417. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  418. * @int_ctx: pointer to DP interrupt context
  419. * @soc: core txrx main context
  420. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  421. * @quota: No. of units (packets) that can be serviced in one shot.
  422. *
  423. * This function implements error processing and top level demultiplexer
  424. * for all the frames routed to WBM2HOST sw release ring.
  425. *
  426. * Return: uint32_t: No. of elements processed
  427. */
  428. uint32_t
  429. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  430. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  431. /**
  432. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  433. * multiple nbufs.
  434. * @nbuf: pointer to the first msdu of an amsdu.
  435. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  436. *
  437. * This function implements the creation of RX frag_list for cases
  438. * where an MSDU is spread across multiple nbufs.
  439. *
  440. * Return: returns the head nbuf which contains complete frag_list.
  441. */
  442. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr);
  443. /*
  444. * dp_rx_desc_pool_alloc() - create a pool of software rx_descs
  445. * at the time of dp rx initialization
  446. *
  447. * @soc: core txrx main context
  448. * @pool_id: pool_id which is one of 3 mac_ids
  449. * @pool_size: number of Rx descriptor in the pool
  450. * @rx_desc_pool: rx descriptor pool pointer
  451. *
  452. * Return: QDF status
  453. */
  454. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc, uint32_t pool_id,
  455. uint32_t pool_size, struct rx_desc_pool *pool);
  456. /*
  457. * dp_rx_desc_nbuf_and_pool_free() - free the sw rx desc pool called during
  458. * de-initialization of wifi module.
  459. *
  460. * @soc: core txrx main context
  461. * @pool_id: pool_id which is one of 3 mac_ids
  462. * @rx_desc_pool: rx descriptor pool pointer
  463. *
  464. * Return: None
  465. */
  466. void dp_rx_desc_nbuf_and_pool_free(struct dp_soc *soc, uint32_t pool_id,
  467. struct rx_desc_pool *rx_desc_pool);
  468. /*
  469. * dp_rx_desc_nbuf_free() - free the sw rx desc nbufs called during
  470. * de-initialization of wifi module.
  471. *
  472. * @soc: core txrx main context
  473. * @pool_id: pool_id which is one of 3 mac_ids
  474. * @rx_desc_pool: rx descriptor pool pointer
  475. *
  476. * Return: None
  477. */
  478. void dp_rx_desc_nbuf_free(struct dp_soc *soc,
  479. struct rx_desc_pool *rx_desc_pool);
  480. /*
  481. * dp_rx_desc_pool_free() - free the sw rx desc array called during
  482. * de-initialization of wifi module.
  483. *
  484. * @soc: core txrx main context
  485. * @rx_desc_pool: rx descriptor pool pointer
  486. *
  487. * Return: None
  488. */
  489. void dp_rx_desc_pool_free(struct dp_soc *soc,
  490. struct rx_desc_pool *rx_desc_pool);
  491. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  492. struct dp_peer *peer);
  493. /**
  494. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  495. *
  496. * @head: pointer to the head of local free list
  497. * @tail: pointer to the tail of local free list
  498. * @new: new descriptor that is added to the free list
  499. *
  500. * Return: void:
  501. */
  502. static inline
  503. void dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  504. union dp_rx_desc_list_elem_t **tail,
  505. struct dp_rx_desc *new)
  506. {
  507. qdf_assert(head && new);
  508. new->nbuf = NULL;
  509. new->in_use = 0;
  510. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  511. *head = (union dp_rx_desc_list_elem_t *)new;
  512. if (!*tail)
  513. *tail = *head;
  514. }
  515. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  516. uint8_t mac_id);
  517. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  518. qdf_nbuf_t mpdu, bool mpdu_done, uint8_t mac_id);
  519. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  520. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  521. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  522. uint16_t peer_id, uint8_t tid);
  523. #define DP_RX_LIST_APPEND(head, tail, elem) \
  524. do { \
  525. if (!(head)) { \
  526. (head) = (elem); \
  527. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head) = 1;\
  528. } else { \
  529. qdf_nbuf_set_next((tail), (elem)); \
  530. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head)++; \
  531. } \
  532. (tail) = (elem); \
  533. qdf_nbuf_set_next((tail), NULL); \
  534. } while (0)
  535. /*for qcn9000 emulation the pcie is complete phy and no address restrictions*/
  536. #if !defined(BUILD_X86) || defined(QCA_WIFI_QCN9000)
  537. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  538. qdf_dma_addr_t *paddr, struct dp_pdev *pdev)
  539. {
  540. return QDF_STATUS_SUCCESS;
  541. }
  542. #else
  543. #define MAX_RETRY 100
  544. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  545. qdf_dma_addr_t *paddr, struct dp_pdev *pdev)
  546. {
  547. uint32_t nbuf_retry = 0;
  548. int32_t ret;
  549. const uint32_t x86_phy_addr = 0x50000000;
  550. /*
  551. * in M2M emulation platforms (x86) the memory below 0x50000000
  552. * is reserved for target use, so any memory allocated in this
  553. * region should not be used by host
  554. */
  555. do {
  556. if (qdf_likely(*paddr > x86_phy_addr))
  557. return QDF_STATUS_SUCCESS;
  558. else {
  559. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  560. "phy addr %pK exceeded 0x50000000 trying again",
  561. paddr);
  562. nbuf_retry++;
  563. if ((*rx_netbuf)) {
  564. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  565. QDF_DMA_FROM_DEVICE);
  566. /* Not freeing buffer intentionally.
  567. * Observed that same buffer is getting
  568. * re-allocated resulting in longer load time
  569. * WMI init timeout.
  570. * This buffer is anyway not useful so skip it.
  571. **/
  572. }
  573. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  574. RX_BUFFER_SIZE,
  575. RX_BUFFER_RESERVATION,
  576. RX_BUFFER_ALIGNMENT,
  577. FALSE);
  578. if (qdf_unlikely(!(*rx_netbuf)))
  579. return QDF_STATUS_E_FAILURE;
  580. ret = qdf_nbuf_map_single(dp_soc->osdev, *rx_netbuf,
  581. QDF_DMA_FROM_DEVICE);
  582. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  583. qdf_nbuf_free(*rx_netbuf);
  584. *rx_netbuf = NULL;
  585. continue;
  586. }
  587. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  588. }
  589. } while (nbuf_retry < MAX_RETRY);
  590. if ((*rx_netbuf)) {
  591. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  592. QDF_DMA_FROM_DEVICE);
  593. qdf_nbuf_free(*rx_netbuf);
  594. }
  595. return QDF_STATUS_E_FAILURE;
  596. }
  597. #endif
  598. /**
  599. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  600. * the MSDU Link Descriptor
  601. * @soc: core txrx main context
  602. * @buf_info: buf_info include cookie that used to lookup virtual address of
  603. * link descriptor Normally this is just an index into a per SOC array.
  604. *
  605. * This is the VA of the link descriptor, that HAL layer later uses to
  606. * retrieve the list of MSDU's for a given MPDU.
  607. *
  608. * Return: void *: Virtual Address of the Rx descriptor
  609. */
  610. static inline
  611. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  612. struct hal_buf_info *buf_info)
  613. {
  614. void *link_desc_va;
  615. uint32_t bank_id = LINK_DESC_COOKIE_BANK_ID(buf_info->sw_cookie);
  616. /* TODO */
  617. /* Add sanity for cookie */
  618. link_desc_va = soc->link_desc_banks[bank_id].base_vaddr +
  619. (buf_info->paddr -
  620. soc->link_desc_banks[bank_id].base_paddr);
  621. return link_desc_va;
  622. }
  623. /**
  624. * dp_rx_cookie_2_mon_link_desc_va() - Converts cookie to a virtual address of
  625. * the MSDU Link Descriptor
  626. * @pdev: core txrx pdev context
  627. * @buf_info: buf_info includes cookie that used to lookup virtual address of
  628. * link descriptor. Normally this is just an index into a per pdev array.
  629. *
  630. * This is the VA of the link descriptor in monitor mode destination ring,
  631. * that HAL layer later uses to retrieve the list of MSDU's for a given MPDU.
  632. *
  633. * Return: void *: Virtual Address of the Rx descriptor
  634. */
  635. static inline
  636. void *dp_rx_cookie_2_mon_link_desc_va(struct dp_pdev *pdev,
  637. struct hal_buf_info *buf_info,
  638. int mac_id)
  639. {
  640. void *link_desc_va;
  641. int mac_for_pdev = dp_get_mac_id_for_mac(pdev->soc, mac_id);
  642. /* TODO */
  643. /* Add sanity for cookie */
  644. link_desc_va =
  645. pdev->link_desc_banks[mac_for_pdev][buf_info->sw_cookie].base_vaddr +
  646. (buf_info->paddr -
  647. pdev->link_desc_banks[mac_for_pdev][buf_info->sw_cookie].base_paddr);
  648. return link_desc_va;
  649. }
  650. /**
  651. * dp_rx_defrag_concat() - Concatenate the fragments
  652. *
  653. * @dst: destination pointer to the buffer
  654. * @src: source pointer from where the fragment payload is to be copied
  655. *
  656. * Return: QDF_STATUS
  657. */
  658. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  659. {
  660. /*
  661. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  662. * to provide space for src, the headroom portion is copied from
  663. * the original dst buffer to the larger new dst buffer.
  664. * (This is needed, because the headroom of the dst buffer
  665. * contains the rx desc.)
  666. */
  667. if (!qdf_nbuf_cat(dst, src)) {
  668. /*
  669. * qdf_nbuf_cat does not free the src memory.
  670. * Free src nbuf before returning
  671. * For failure case the caller takes of freeing the nbuf
  672. */
  673. qdf_nbuf_free(src);
  674. return QDF_STATUS_SUCCESS;
  675. }
  676. return QDF_STATUS_E_DEFRAG_ERROR;
  677. }
  678. #ifndef FEATURE_WDS
  679. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  680. {
  681. return QDF_STATUS_SUCCESS;
  682. }
  683. static inline void
  684. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  685. uint8_t *rx_tlv_hdr,
  686. struct dp_peer *ta_peer,
  687. qdf_nbuf_t nbuf)
  688. {
  689. }
  690. #endif
  691. /*
  692. * dp_rx_desc_dump() - dump the sw rx descriptor
  693. *
  694. * @rx_desc: sw rx descriptor
  695. */
  696. static inline void dp_rx_desc_dump(struct dp_rx_desc *rx_desc)
  697. {
  698. dp_info("rx_desc->nbuf: %pK, rx_desc->cookie: %d, rx_desc->pool_id: %d, rx_desc->in_use: %d, rx_desc->unmapped: %d",
  699. rx_desc->nbuf, rx_desc->cookie, rx_desc->pool_id,
  700. rx_desc->in_use, rx_desc->unmapped);
  701. }
  702. /*
  703. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  704. * In qwrap mode, packets originated from
  705. * any vdev should not loopback and
  706. * should be dropped.
  707. * @vdev: vdev on which rx packet is received
  708. * @nbuf: rx pkt
  709. *
  710. */
  711. #if ATH_SUPPORT_WRAP
  712. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  713. qdf_nbuf_t nbuf)
  714. {
  715. struct dp_vdev *psta_vdev;
  716. struct dp_pdev *pdev = vdev->pdev;
  717. uint8_t *data = qdf_nbuf_data(nbuf);
  718. if (qdf_unlikely(vdev->proxysta_vdev)) {
  719. /* In qwrap isolation mode, allow loopback packets as all
  720. * packets go to RootAP and Loopback on the mpsta.
  721. */
  722. if (vdev->isolation_vdev)
  723. return false;
  724. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  725. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  726. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  727. &data[QDF_MAC_ADDR_SIZE],
  728. QDF_MAC_ADDR_SIZE))) {
  729. /* Drop packet if source address is equal to
  730. * any of the vdev addresses.
  731. */
  732. return true;
  733. }
  734. }
  735. }
  736. return false;
  737. }
  738. #else
  739. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  740. qdf_nbuf_t nbuf)
  741. {
  742. return false;
  743. }
  744. #endif
  745. #if defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) ||\
  746. defined(WLAN_SUPPORT_RX_TAG_STATISTICS) ||\
  747. defined(WLAN_SUPPORT_RX_FLOW_TAG)
  748. #include "dp_rx_tag.h"
  749. #endif
  750. #ifndef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  751. /**
  752. * dp_rx_update_protocol_tag() - Reads CCE metadata from the RX MSDU end TLV
  753. * and set the corresponding tag in QDF packet
  754. * @soc: core txrx main context
  755. * @vdev: vdev on which the packet is received
  756. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  757. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  758. * @ring_index: REO ring number, not used for error & monitor ring
  759. * @is_reo_exception: flag to indicate if rx from REO ring or exception ring
  760. * @is_update_stats: flag to indicate whether to update stats or not
  761. * Return: void
  762. */
  763. static inline void
  764. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  765. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  766. uint16_t ring_index,
  767. bool is_reo_exception, bool is_update_stats)
  768. {
  769. }
  770. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  771. #ifndef WLAN_SUPPORT_RX_FLOW_TAG
  772. /**
  773. * dp_rx_update_flow_tag() - Reads FSE metadata from the RX MSDU end TLV
  774. * and set the corresponding tag in QDF packet
  775. * @soc: core txrx main context
  776. * @vdev: vdev on which the packet is received
  777. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  778. * @rx_tlv_hdr: base address where the RX TLVs starts
  779. * @is_update_stats: flag to indicate whether to update stats or not
  780. *
  781. * Return: void
  782. */
  783. static inline void
  784. dp_rx_update_flow_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  785. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr, bool update_stats)
  786. {
  787. }
  788. #endif /* WLAN_SUPPORT_RX_FLOW_TAG */
  789. #if !defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) &&\
  790. !defined(WLAN_SUPPORT_RX_FLOW_TAG)
  791. /**
  792. * dp_rx_mon_update_protocol_flow_tag() - Performs necessary checks for monitor
  793. * mode and then tags appropriate packets
  794. * @soc: core txrx main context
  795. * @vdev: pdev on which packet is received
  796. * @msdu: QDF packet buffer on which the protocol tag should be set
  797. * @rx_desc: base address where the RX TLVs start
  798. * Return: void
  799. */
  800. static inline
  801. void dp_rx_mon_update_protocol_flow_tag(struct dp_soc *soc,
  802. struct dp_pdev *dp_pdev,
  803. qdf_nbuf_t msdu, void *rx_desc)
  804. {
  805. }
  806. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG || WLAN_SUPPORT_RX_FLOW_TAG */
  807. /*
  808. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  809. * called during dp rx initialization
  810. * and at the end of dp_rx_process.
  811. *
  812. * @soc: core txrx main context
  813. * @mac_id: mac_id which is one of 3 mac_ids
  814. * @dp_rxdma_srng: dp rxdma circular ring
  815. * @rx_desc_pool: Pointer to free Rx descriptor pool
  816. * @num_req_buffers: number of buffer to be replenished
  817. * @desc_list: list of descs if called from dp_rx_process
  818. * or NULL during dp rx initialization or out of buffer
  819. * interrupt.
  820. * @tail: tail of descs list
  821. * Return: return success or failure
  822. */
  823. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  824. struct dp_srng *dp_rxdma_srng,
  825. struct rx_desc_pool *rx_desc_pool,
  826. uint32_t num_req_buffers,
  827. union dp_rx_desc_list_elem_t **desc_list,
  828. union dp_rx_desc_list_elem_t **tail);
  829. /*
  830. * dp_pdev_rx_buffers_attach() - replenish rxdma ring with rx nbufs
  831. * called during dp rx initialization
  832. *
  833. * @soc: core txrx main context
  834. * @mac_id: mac_id which is one of 3 mac_ids
  835. * @dp_rxdma_srng: dp rxdma circular ring
  836. * @rx_desc_pool: Pointer to free Rx descriptor pool
  837. * @num_req_buffers: number of buffer to be replenished
  838. *
  839. * Return: return success or failure
  840. */
  841. QDF_STATUS
  842. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  843. struct dp_srng *dp_rxdma_srng,
  844. struct rx_desc_pool *rx_desc_pool,
  845. uint32_t num_req_buffers);
  846. /**
  847. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  848. * (WBM), following error handling
  849. *
  850. * @soc: core DP main context
  851. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  852. * @buf_addr_info: void pointer to the buffer_addr_info
  853. * @bm_action: put to idle_list or release to msdu_list
  854. *
  855. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  856. */
  857. QDF_STATUS
  858. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  859. uint8_t bm_action);
  860. /**
  861. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  862. * (WBM) by address
  863. *
  864. * @soc: core DP main context
  865. * @link_desc_addr: link descriptor addr
  866. *
  867. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  868. */
  869. QDF_STATUS
  870. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  871. hal_link_desc_t link_desc_addr,
  872. uint8_t bm_action);
  873. /**
  874. * dp_rxdma_err_process() - RxDMA error processing functionality
  875. * @soc: core txrx main contex
  876. * @mac_id: mac id which is one of 3 mac_ids
  877. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  878. * @quota: No. of units (packets) that can be serviced in one shot.
  879. *
  880. * Return: num of buffers processed
  881. */
  882. uint32_t
  883. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  884. uint32_t mac_id, uint32_t quota);
  885. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  886. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  887. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  888. uint8_t *rx_tlv_hdr);
  889. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  890. struct dp_peer *peer);
  891. qdf_nbuf_t
  892. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev);
  893. /*
  894. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  895. *
  896. * @soc: core txrx main context
  897. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  898. * @ring_desc: opaque pointer to the RX ring descriptor
  899. * @rx_desc: host rs descriptor
  900. *
  901. * Return: void
  902. */
  903. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  904. hal_ring_handle_t hal_ring_hdl,
  905. hal_ring_desc_t ring_desc,
  906. struct dp_rx_desc *rx_desc);
  907. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  908. #ifdef RX_DESC_DEBUG_CHECK
  909. /**
  910. * dp_rx_desc_check_magic() - check the magic value in dp_rx_desc
  911. * @rx_desc: rx descriptor pointer
  912. *
  913. * Return: true, if magic is correct, else false.
  914. */
  915. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  916. {
  917. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC))
  918. return false;
  919. rx_desc->magic = 0;
  920. return true;
  921. }
  922. /**
  923. * dp_rx_desc_prep() - prepare rx desc
  924. * @rx_desc: rx descriptor pointer to be prepared
  925. * @nbuf: nbuf to be associated with rx_desc
  926. *
  927. * Note: assumption is that we are associating a nbuf which is mapped
  928. *
  929. * Return: none
  930. */
  931. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  932. {
  933. rx_desc->magic = DP_RX_DESC_MAGIC;
  934. rx_desc->nbuf = nbuf;
  935. rx_desc->unmapped = 0;
  936. }
  937. #else
  938. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  939. {
  940. return true;
  941. }
  942. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  943. {
  944. rx_desc->nbuf = nbuf;
  945. rx_desc->unmapped = 0;
  946. }
  947. #endif /* RX_DESC_DEBUG_CHECK */
  948. void dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  949. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  950. uint8_t err_code, uint8_t mac_id);
  951. #ifdef PEER_CACHE_RX_PKTS
  952. /**
  953. * dp_rx_flush_rx_cached() - flush cached rx frames
  954. * @peer: peer
  955. * @drop: set flag to drop frames
  956. *
  957. * Return: None
  958. */
  959. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop);
  960. #else
  961. static inline void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  962. {
  963. }
  964. #endif
  965. #ifndef QCA_MULTIPASS_SUPPORT
  966. static inline
  967. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf, uint8_t tid)
  968. {
  969. return false;
  970. }
  971. #else
  972. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf,
  973. uint8_t tid);
  974. #endif
  975. #endif /* _DP_RX_H */