dp_rx_mon_dest.c 29 KB

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  1. /*
  2. * Copyright (c) 2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "hal_rx.h"
  22. #include "hal_api.h"
  23. #include "qdf_trace.h"
  24. #include "qdf_nbuf.h"
  25. #include "hal_api_mon.h"
  26. #include "dp_rx_mon.h"
  27. #include "wlan_cfg.h"
  28. /**
  29. * dp_rx_mon_link_desc_return() - Return a MPDU link descriptor to HW
  30. * (WBM), following error handling
  31. *
  32. * @dp_pdev: core txrx pdev context
  33. * @buf_addr_info: void pointer to monitor link descriptor buf addr info
  34. * Return: QDF_STATUS
  35. */
  36. static QDF_STATUS
  37. dp_rx_mon_link_desc_return(struct dp_pdev *dp_pdev,
  38. void *buf_addr_info)
  39. {
  40. struct dp_srng *dp_srng;
  41. void *hal_srng;
  42. void *hal_soc;
  43. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  44. void *src_srng_desc;
  45. hal_soc = dp_pdev->soc->hal_soc;
  46. dp_srng = &dp_pdev->rxdma_mon_desc_ring;
  47. hal_srng = dp_srng->hal_srng;
  48. qdf_assert(hal_srng);
  49. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_srng))) {
  50. /* TODO */
  51. /*
  52. * Need API to convert from hal_ring pointer to
  53. * Ring Type / Ring Id combo
  54. */
  55. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  56. "%s %d : \
  57. HAL RING Access For WBM Release SRNG Failed -- %pK\n",
  58. __func__, __LINE__, hal_srng);
  59. goto done;
  60. }
  61. src_srng_desc = hal_srng_src_get_next(hal_soc, hal_srng);
  62. if (qdf_likely(src_srng_desc)) {
  63. /* Return link descriptor through WBM ring (SW2WBM)*/
  64. hal_rx_mon_msdu_link_desc_set(hal_soc,
  65. src_srng_desc, buf_addr_info);
  66. status = QDF_STATUS_SUCCESS;
  67. } else {
  68. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  69. "%s %d -- Monitor Link Desc WBM Release Ring Full\n",
  70. __func__, __LINE__);
  71. }
  72. done:
  73. hal_srng_access_end(hal_soc, hal_srng);
  74. return status;
  75. }
  76. /**
  77. * dp_mon_adjust_frag_len() - MPDU and MSDU may spread across
  78. * multiple nbufs. This function
  79. * is to return data length in
  80. * fragmented buffer
  81. *
  82. * @total_len: pointer to remaining data length.
  83. * @frag_len: poiter to data length in this fragment.
  84. */
  85. static inline void dp_mon_adjust_frag_len(uint32_t *total_len,
  86. uint32_t *frag_len)
  87. {
  88. if (*total_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  89. *frag_len = RX_BUFFER_SIZE - RX_PKT_TLVS_LEN;
  90. *total_len -= *frag_len;
  91. } else {
  92. *frag_len = *total_len;
  93. *total_len = 0;
  94. }
  95. }
  96. /**
  97. * dp_rx_mon_mpdu_pop() - Return a MPDU link descriptor to HW
  98. * (WBM), following error handling
  99. *
  100. * @soc: core DP main context
  101. * @mac_id: mac id which is one of 3 mac_ids
  102. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  103. * @head_msdu: head of msdu to be popped
  104. * @tail_msdu: tail of msdu to be popped
  105. * @npackets: number of packet to be popped
  106. * @ppdu_id: ppdu id of processing ppdu
  107. * @head: head of descs list to be freed
  108. * @tail: tail of decs list to be freed
  109. * Return: number of msdu in MPDU to be popped
  110. */
  111. static inline uint32_t
  112. dp_rx_mon_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  113. void *rxdma_dst_ring_desc, qdf_nbuf_t *head_msdu,
  114. qdf_nbuf_t *tail_msdu, uint32_t *npackets, uint32_t *ppdu_id,
  115. union dp_rx_desc_list_elem_t **head,
  116. union dp_rx_desc_list_elem_t **tail)
  117. {
  118. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  119. void *rx_desc_tlv;
  120. void *rx_msdu_link_desc;
  121. qdf_nbuf_t msdu;
  122. qdf_nbuf_t last;
  123. struct hal_rx_msdu_list msdu_list;
  124. uint16_t num_msdus;
  125. uint32_t rx_buf_size, rx_pkt_offset;
  126. struct hal_buf_info buf_info;
  127. void *p_buf_addr_info;
  128. void *p_last_buf_addr_info;
  129. uint32_t rx_bufs_used = 0;
  130. uint32_t msdu_ppdu_id, msdu_cnt;
  131. uint8_t *data;
  132. uint32_t i;
  133. uint32_t total_frag_len, frag_len;
  134. bool is_frag, is_first_msdu;
  135. msdu = 0;
  136. last = NULL;
  137. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  138. &p_last_buf_addr_info, &msdu_cnt);
  139. is_frag = false;
  140. is_first_msdu = true;
  141. do {
  142. rx_msdu_link_desc =
  143. dp_rx_cookie_2_mon_link_desc_va(dp_pdev, &buf_info);
  144. qdf_assert(rx_msdu_link_desc);
  145. hal_rx_msdu_list_get(rx_msdu_link_desc, &msdu_list, &num_msdus);
  146. for (i = 0; i < num_msdus; i++) {
  147. uint32_t l2_hdr_offset;
  148. struct dp_rx_desc *rx_desc =
  149. dp_rx_cookie_2_va_mon_buf(soc,
  150. msdu_list.sw_cookie[i]);
  151. qdf_assert(rx_desc);
  152. msdu = rx_desc->nbuf;
  153. qdf_nbuf_unmap_single(soc->osdev, msdu,
  154. QDF_DMA_FROM_DEVICE);
  155. data = qdf_nbuf_data(msdu);
  156. QDF_TRACE(QDF_MODULE_ID_DP,
  157. QDF_TRACE_LEVEL_DEBUG,
  158. "[%s][%d] msdu_nbuf=%pK, data=%pK\n",
  159. __func__, __LINE__, msdu, data);
  160. rx_desc_tlv = HAL_RX_MON_DEST_GET_DESC(data);
  161. if(is_first_msdu) {
  162. msdu_ppdu_id =
  163. HAL_RX_MON_HW_DESC_GET_PPDUID_GET(rx_desc_tlv);
  164. is_first_msdu = false;
  165. }
  166. QDF_TRACE(QDF_MODULE_ID_DP,
  167. QDF_TRACE_LEVEL_DEBUG,
  168. "[%s][%d] i=%d, ppdu_id=%x, msdu_ppdu_id=%x\n",
  169. __func__, __LINE__, i, *ppdu_id, msdu_ppdu_id);
  170. if (*ppdu_id > msdu_ppdu_id)
  171. QDF_TRACE(QDF_MODULE_ID_DP,
  172. QDF_TRACE_LEVEL_WARN,
  173. "[%s][%d] ppdu_id=%id \
  174. msdu_ppdu_id=%d\n",
  175. __func__, __LINE__, *ppdu_id,
  176. msdu_ppdu_id);
  177. if (*ppdu_id < msdu_ppdu_id) {
  178. *ppdu_id = msdu_ppdu_id;
  179. return rx_bufs_used;
  180. }
  181. if (hal_rx_desc_is_first_msdu(rx_desc_tlv))
  182. hal_rx_mon_hw_desc_get_mpdu_status(rx_desc_tlv,
  183. &(dp_pdev->ppdu_info.rx_status));
  184. if(msdu_list.msdu_info[i].msdu_flags &
  185. HAL_MSDU_F_MSDU_CONTINUATION) {
  186. if(!is_frag) {
  187. total_frag_len =
  188. msdu_list.msdu_info[i].msdu_len;
  189. is_frag = true;
  190. }
  191. dp_mon_adjust_frag_len(
  192. &total_frag_len, &frag_len);
  193. } else {
  194. if(is_frag) {
  195. dp_mon_adjust_frag_len(
  196. &total_frag_len, &frag_len);
  197. } else {
  198. frag_len =
  199. msdu_list.msdu_info[i].msdu_len;
  200. }
  201. is_frag = false;
  202. msdu_cnt--;
  203. }
  204. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  205. /*
  206. * HW structures call this L3 header padding
  207. * -- even though this is actually the offset
  208. * from the buffer beginning where the L2
  209. * header begins.
  210. */
  211. l2_hdr_offset =
  212. hal_rx_msdu_end_l3_hdr_padding_get(data);
  213. rx_buf_size = rx_pkt_offset + l2_hdr_offset
  214. + frag_len;
  215. qdf_nbuf_set_pktlen(msdu, rx_buf_size);
  216. #if 0
  217. /* Disble it.see packet on msdu done set to 0 */
  218. /*
  219. * Check if DMA completed -- msdu_done is the
  220. * last bit to be written
  221. */
  222. if (!hal_rx_attn_msdu_done_get(rx_desc_tlv)) {
  223. QDF_TRACE(QDF_MODULE_ID_DP,
  224. QDF_TRACE_LEVEL_ERROR,
  225. "%s %d\n",
  226. __func__, __LINE__);
  227. print_hex_dump(KERN_ERR,
  228. "\t Pkt Desc:",
  229. DUMP_PREFIX_NONE, 32, 4,
  230. rx_desc_tlv, 128, false);
  231. qdf_assert(0);
  232. }
  233. #endif
  234. rx_bufs_used++;
  235. QDF_TRACE(QDF_MODULE_ID_DP,
  236. QDF_TRACE_LEVEL_DEBUG,
  237. "rx_pkt_offset=%d, \
  238. l2_hdr_offset=%d, msdu_len=%d, \
  239. addr=%pK\n",
  240. rx_pkt_offset,
  241. l2_hdr_offset,
  242. msdu_list.msdu_info[i].msdu_len,
  243. qdf_nbuf_data(msdu));
  244. if (*head_msdu == NULL)
  245. *head_msdu = msdu;
  246. else
  247. qdf_nbuf_set_next(last, msdu);
  248. last = msdu;
  249. dp_rx_add_to_free_desc_list(head,
  250. tail, rx_desc);
  251. }
  252. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  253. &p_buf_addr_info);
  254. dp_rx_mon_link_desc_return(dp_pdev, p_last_buf_addr_info);
  255. p_last_buf_addr_info = p_buf_addr_info;
  256. } while (buf_info.paddr && msdu_cnt);
  257. qdf_nbuf_set_next(last, NULL);
  258. *tail_msdu = msdu;
  259. return rx_bufs_used;
  260. }
  261. static inline
  262. void dp_rx_msdus_set_payload(qdf_nbuf_t msdu)
  263. {
  264. uint8_t *data;
  265. uint32_t rx_pkt_offset, l2_hdr_offset;
  266. data = qdf_nbuf_data(msdu);
  267. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  268. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(data);
  269. qdf_nbuf_pull_head(msdu, rx_pkt_offset + l2_hdr_offset);
  270. }
  271. static inline
  272. qdf_nbuf_t dp_rx_mon_restitch_mpdu_from_msdus(struct dp_soc *soc,
  273. uint32_t mac_id, qdf_nbuf_t head_msdu, qdf_nbuf_t last_msdu,
  274. struct cdp_mon_status *rx_status)
  275. {
  276. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  277. qdf_nbuf_t msdu, mpdu_buf, prev_buf, msdu_orig, head_frag_list;
  278. uint32_t decap_format, wifi_hdr_len, sec_hdr_len, msdu_llc_len,
  279. mpdu_buf_len, decap_hdr_pull_bytes, frag_list_sum_len, dir,
  280. is_amsdu, is_first_frag, amsdu_pad;
  281. void *rx_desc;
  282. char *hdr_desc;
  283. unsigned char *dest;
  284. struct ieee80211_frame *wh;
  285. struct ieee80211_qoscntl *qos;
  286. head_frag_list = NULL;
  287. /* The nbuf has been pulled just beyond the status and points to the
  288. * payload
  289. */
  290. msdu_orig = head_msdu;
  291. rx_desc = qdf_nbuf_data(msdu_orig);
  292. if (HAL_RX_DESC_GET_MPDU_LENGTH_ERR(rx_desc)) {
  293. /* It looks like there is some issue on MPDU len err */
  294. /* Need further investigate if drop the packet */
  295. /* return NULL; */
  296. }
  297. rx_desc = qdf_nbuf_data(last_msdu);
  298. rx_status->cdp_rs_fcs_err = HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  299. /* Fill out the rx_status from the PPDU start and end fields */
  300. /* HAL_RX_GET_PPDU_STATUS(soc, mac_id, rx_status); */
  301. rx_desc = qdf_nbuf_data(head_msdu);
  302. decap_format = HAL_RX_DESC_GET_DECAP_FORMAT(rx_desc);
  303. /* Easy case - The MSDU status indicates that this is a non-decapped
  304. * packet in RAW mode.
  305. */
  306. if (decap_format == HAL_HW_RX_DECAP_FORMAT_RAW) {
  307. /* Note that this path might suffer from headroom unavailabilty
  308. * - but the RX status is usually enough
  309. */
  310. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  311. "[%s][%d] decap format raw\n", __func__, __LINE__);
  312. dp_rx_msdus_set_payload(head_msdu);
  313. mpdu_buf = head_msdu;
  314. if (!mpdu_buf)
  315. goto mpdu_stitch_fail;
  316. prev_buf = mpdu_buf;
  317. frag_list_sum_len = 0;
  318. msdu = qdf_nbuf_next(head_msdu);
  319. is_first_frag = 1;
  320. while (msdu) {
  321. dp_rx_msdus_set_payload(msdu);
  322. if (is_first_frag) {
  323. is_first_frag = 0;
  324. head_frag_list = msdu;
  325. }
  326. frag_list_sum_len += qdf_nbuf_len(msdu);
  327. /* Maintain the linking of the cloned MSDUS */
  328. qdf_nbuf_set_next_ext(prev_buf, msdu);
  329. /* Move to the next */
  330. prev_buf = msdu;
  331. msdu = qdf_nbuf_next(msdu);
  332. }
  333. qdf_nbuf_trim_tail(prev_buf, HAL_RX_FCS_LEN);
  334. /* If there were more fragments to this RAW frame */
  335. if (head_frag_list) {
  336. frag_list_sum_len -= HAL_RX_FCS_LEN;
  337. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  338. frag_list_sum_len);
  339. }
  340. goto mpdu_stitch_done;
  341. }
  342. /* Decap mode:
  343. * Calculate the amount of header in decapped packet to knock off based
  344. * on the decap type and the corresponding number of raw bytes to copy
  345. * status header
  346. */
  347. rx_desc = qdf_nbuf_data(head_msdu);
  348. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  349. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  350. "[%s][%d] decap format not raw\n", __func__, __LINE__);
  351. /* Base size */
  352. wifi_hdr_len = sizeof(struct ieee80211_frame);
  353. wh = (struct ieee80211_frame *)hdr_desc;
  354. dir = wh->i_fc[1] & IEEE80211_FC1_DIR_MASK;
  355. if (dir == IEEE80211_FC1_DIR_DSTODS)
  356. wifi_hdr_len += 6;
  357. is_amsdu = 0;
  358. if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
  359. qos = (struct ieee80211_qoscntl *)
  360. (hdr_desc + wifi_hdr_len);
  361. wifi_hdr_len += 2;
  362. is_amsdu = (qos->i_qos[0] & IEEE80211_QOS_AMSDU);
  363. }
  364. /*Calculate security header length based on 'Protected'
  365. * and 'EXT_IV' flag
  366. * */
  367. if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
  368. char *iv = (char *)wh + wifi_hdr_len;
  369. if (iv[3] & KEY_EXTIV)
  370. sec_hdr_len = 8;
  371. else
  372. sec_hdr_len = 4;
  373. } else {
  374. sec_hdr_len = 0;
  375. }
  376. wifi_hdr_len += sec_hdr_len;
  377. /* MSDU related stuff LLC - AMSDU subframe header etc */
  378. msdu_llc_len = is_amsdu ? (14 + 8) : 8;
  379. mpdu_buf_len = wifi_hdr_len + msdu_llc_len;
  380. /* "Decap" header to remove from MSDU buffer */
  381. decap_hdr_pull_bytes = 14;
  382. /* Allocate a new nbuf for holding the 802.11 header retrieved from the
  383. * status of the now decapped first msdu. Leave enough headroom for
  384. * accomodating any radio-tap /prism like PHY header
  385. */
  386. #define MAX_MONITOR_HEADER (512)
  387. mpdu_buf = qdf_nbuf_alloc(dp_pdev->osif_pdev,
  388. MAX_MONITOR_HEADER + mpdu_buf_len,
  389. MAX_MONITOR_HEADER, 4, FALSE);
  390. if (!mpdu_buf)
  391. goto mpdu_stitch_done;
  392. /* Copy the MPDU related header and enc headers into the first buffer
  393. * - Note that there can be a 2 byte pad between heaader and enc header
  394. */
  395. prev_buf = mpdu_buf;
  396. dest = qdf_nbuf_put_tail(prev_buf, wifi_hdr_len);
  397. if (!dest)
  398. goto mpdu_stitch_fail;
  399. qdf_mem_copy(dest, hdr_desc, wifi_hdr_len);
  400. hdr_desc += wifi_hdr_len;
  401. #if 0
  402. dest = qdf_nbuf_put_tail(prev_buf, sec_hdr_len);
  403. adf_os_mem_copy(dest, hdr_desc, sec_hdr_len);
  404. hdr_desc += sec_hdr_len;
  405. #endif
  406. /* The first LLC len is copied into the MPDU buffer */
  407. frag_list_sum_len = 0;
  408. frag_list_sum_len -= msdu_llc_len;
  409. msdu_orig = head_msdu;
  410. is_first_frag = 1;
  411. amsdu_pad = 0;
  412. while (msdu_orig) {
  413. /* TODO: intra AMSDU padding - do we need it ??? */
  414. msdu = msdu_orig;
  415. if (is_first_frag) {
  416. head_frag_list = msdu;
  417. } else {
  418. /* Reload the hdr ptr only on non-first MSDUs */
  419. rx_desc = qdf_nbuf_data(msdu_orig);
  420. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  421. }
  422. /* Copy this buffers MSDU related status into the prev buffer */
  423. if (is_first_frag) {
  424. is_first_frag = 0;
  425. }
  426. dest = qdf_nbuf_put_tail(prev_buf,
  427. msdu_llc_len + amsdu_pad);
  428. if (!dest)
  429. goto mpdu_stitch_fail;
  430. dest += amsdu_pad;
  431. qdf_mem_copy(dest, hdr_desc, msdu_llc_len);
  432. dp_rx_msdus_set_payload(msdu);
  433. /* Push the MSDU buffer beyond the decap header */
  434. qdf_nbuf_pull_head(msdu, decap_hdr_pull_bytes);
  435. frag_list_sum_len += msdu_llc_len + qdf_nbuf_len(msdu)
  436. + amsdu_pad;
  437. /* Set up intra-AMSDU pad to be added to start of next buffer -
  438. * AMSDU pad is 4 byte pad on AMSDU subframe */
  439. amsdu_pad = (msdu_llc_len + qdf_nbuf_len(msdu)) & 0x3;
  440. amsdu_pad = amsdu_pad ? (4 - amsdu_pad) : 0;
  441. /* TODO FIXME How do we handle MSDUs that have fraglist - Should
  442. * probably iterate all the frags cloning them along the way and
  443. * and also updating the prev_buf pointer
  444. */
  445. /* Move to the next */
  446. prev_buf = msdu;
  447. msdu_orig = qdf_nbuf_next(msdu_orig);
  448. }
  449. #if 0
  450. /* Add in the trailer section - encryption trailer + FCS */
  451. qdf_nbuf_put_tail(prev_buf, HAL_RX_FCS_LEN);
  452. frag_list_sum_len += HAL_RX_FCS_LEN;
  453. #endif
  454. /* TODO: Convert this to suitable adf routines */
  455. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  456. frag_list_sum_len);
  457. mpdu_stitch_done:
  458. /* Check if this buffer contains the PPDU end status for TSF */
  459. /* Need revist this code to see where we can get tsf timestamp */
  460. #if 0
  461. /* PPDU end TLV will be retrived from monitor status ring */
  462. last_mpdu =
  463. (*(((u_int32_t *)&rx_desc->attention)) &
  464. RX_ATTENTION_0_LAST_MPDU_MASK) >>
  465. RX_ATTENTION_0_LAST_MPDU_LSB;
  466. if (last_mpdu)
  467. rx_status->rs_tstamp.tsf = rx_desc->ppdu_end.tsf_timestamp;
  468. #endif
  469. return mpdu_buf;
  470. mpdu_stitch_fail:
  471. if ((mpdu_buf) && (decap_format != HAL_HW_RX_DECAP_FORMAT_RAW)) {
  472. /* Free the head buffer */
  473. qdf_nbuf_free(mpdu_buf);
  474. }
  475. return NULL;
  476. }
  477. /**
  478. * dp_rx_extract_radiotap_info(): Extract and populate information in
  479. * struct mon_rx_status type
  480. * @rx_status: Receive status
  481. * @mon_rx_status: Monitor mode status
  482. *
  483. * Returns: None
  484. */
  485. static inline
  486. void dp_rx_extract_radiotap_info(struct cdp_mon_status *rx_status,
  487. struct mon_rx_status *rx_mon_status)
  488. {
  489. rx_mon_status->tsft = rx_status->cdp_rs_tstamp.cdp_tsf;
  490. rx_mon_status->chan_freq = rx_status->rs_freq;
  491. rx_mon_status->chan_num = rx_status->rs_channel;
  492. rx_mon_status->chan_flags = rx_status->rs_flags;
  493. rx_mon_status->rate = rx_status->rs_datarate;
  494. /* TODO: rx_mon_status->ant_signal_db */
  495. /* TODO: rx_mon_status->nr_ant */
  496. rx_mon_status->mcs = rx_status->cdf_rs_rate_mcs;
  497. rx_mon_status->is_stbc = rx_status->cdp_rs_stbc;
  498. rx_mon_status->sgi = rx_status->cdp_rs_sgi;
  499. /* TODO: rx_mon_status->ldpc */
  500. /* TODO: rx_mon_status->beamformed */
  501. /* TODO: rx_mon_status->vht_flags */
  502. /* TODO: rx_mon_status->vht_flag_values1 */
  503. }
  504. QDF_STATUS dp_rx_mon_deliver(struct dp_soc *soc, uint32_t mac_id,
  505. qdf_nbuf_t head_msdu, qdf_nbuf_t tail_msdu)
  506. {
  507. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  508. struct cdp_mon_status *rs = &pdev->rx_mon_recv_status;
  509. qdf_nbuf_t mon_skb, skb_next;
  510. qdf_nbuf_t mon_mpdu = NULL;
  511. if ((pdev->monitor_vdev == NULL) ||
  512. (pdev->monitor_vdev->osif_rx_mon == NULL)) {
  513. goto mon_deliver_fail;
  514. }
  515. /* restitch mon MPDU for delivery via monitor interface */
  516. mon_mpdu = dp_rx_mon_restitch_mpdu_from_msdus(soc, mac_id, head_msdu,
  517. tail_msdu, rs);
  518. if (mon_mpdu && pdev->monitor_vdev && pdev->monitor_vdev->osif_vdev) {
  519. qdf_nbuf_update_radiotap(&(pdev->ppdu_info.rx_status),
  520. mon_mpdu, sizeof(struct rx_pkt_tlvs));
  521. pdev->monitor_vdev->osif_rx_mon(
  522. pdev->monitor_vdev->osif_vdev, mon_mpdu, NULL);
  523. } else {
  524. goto mon_deliver_fail;
  525. }
  526. return QDF_STATUS_SUCCESS;
  527. mon_deliver_fail:
  528. mon_skb = head_msdu;
  529. while (mon_skb) {
  530. skb_next = qdf_nbuf_next(mon_skb);
  531. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  532. "[%s][%d] mon_skb=%pK\n", __func__, __LINE__, mon_skb);
  533. qdf_nbuf_free(mon_skb);
  534. mon_skb = skb_next;
  535. }
  536. return QDF_STATUS_E_INVAL;
  537. }
  538. /**
  539. * dp_rx_mon_dest_process() - Brain of the Rx processing functionality
  540. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  541. * @soc: core txrx main contex
  542. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  543. * @quota: No. of units (packets) that can be serviced in one shot.
  544. *
  545. * This function implements the core of Rx functionality. This is
  546. * expected to handle only non-error frames.
  547. *
  548. * Return: none
  549. */
  550. void dp_rx_mon_dest_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  551. {
  552. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  553. uint8_t pdev_id;
  554. void *hal_soc;
  555. void *rxdma_dst_ring_desc;
  556. void *mon_dst_srng;
  557. union dp_rx_desc_list_elem_t *head = NULL;
  558. union dp_rx_desc_list_elem_t *tail = NULL;
  559. uint32_t ppdu_id;
  560. uint32_t rx_bufs_used;
  561. pdev_id = pdev->pdev_id;
  562. mon_dst_srng = pdev->rxdma_mon_dst_ring.hal_srng;
  563. if (!mon_dst_srng || !hal_srng_initialized(mon_dst_srng)) {
  564. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  565. "%s %d : HAL Monitor Destination Ring Init Failed -- %pK\n",
  566. __func__, __LINE__, mon_dst_srng);
  567. return;
  568. }
  569. hal_soc = soc->hal_soc;
  570. qdf_assert(hal_soc);
  571. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_dst_srng))) {
  572. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  573. "%s %d : HAL Monitor Destination Ring access Failed -- %pK\n",
  574. __func__, __LINE__, mon_dst_srng);
  575. return;
  576. }
  577. ppdu_id = pdev->ppdu_info.com_info.ppdu_id;
  578. rx_bufs_used = 0;
  579. while (qdf_likely(rxdma_dst_ring_desc =
  580. hal_srng_dst_peek(hal_soc, mon_dst_srng))) {
  581. qdf_nbuf_t head_msdu, tail_msdu;
  582. uint32_t npackets;
  583. head_msdu = (qdf_nbuf_t) NULL;
  584. tail_msdu = (qdf_nbuf_t) NULL;
  585. rx_bufs_used += dp_rx_mon_mpdu_pop(soc, mac_id,
  586. rxdma_dst_ring_desc,
  587. &head_msdu, &tail_msdu,
  588. &npackets, &ppdu_id,
  589. &head, &tail);
  590. if (ppdu_id != pdev->ppdu_info.com_info.ppdu_id) {
  591. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  592. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  593. sizeof(pdev->ppdu_info.rx_status));
  594. break;
  595. }
  596. dp_rx_mon_deliver(soc, mac_id, head_msdu, tail_msdu);
  597. rxdma_dst_ring_desc = hal_srng_dst_get_next(hal_soc,
  598. mon_dst_srng);
  599. }
  600. hal_srng_access_end(hal_soc, mon_dst_srng);
  601. if (rx_bufs_used) {
  602. dp_rx_buffers_replenish(soc, pdev_id,
  603. &pdev->rxdma_mon_buf_ring, &soc->rx_desc_mon[pdev_id],
  604. rx_bufs_used, &head, &tail, HAL_RX_BUF_RBM_SW3_BM);
  605. }
  606. }
  607. static QDF_STATUS
  608. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev) {
  609. uint8_t pdev_id = pdev->pdev_id;
  610. struct dp_soc *soc = pdev->soc;
  611. union dp_rx_desc_list_elem_t *desc_list = NULL;
  612. union dp_rx_desc_list_elem_t *tail = NULL;
  613. struct dp_srng *rxdma_srng;
  614. uint32_t rxdma_entries;
  615. struct rx_desc_pool *rx_desc_pool;
  616. QDF_STATUS status;
  617. rxdma_srng = &pdev->rxdma_mon_buf_ring;
  618. rxdma_entries = rxdma_srng->alloc_size/hal_srng_get_entrysize(
  619. soc->hal_soc,
  620. RXDMA_MONITOR_BUF);
  621. rx_desc_pool = &soc->rx_desc_mon[pdev_id];
  622. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  623. "%s: Mon RX Desc Pool[%d] allocation size=%d\n"
  624. , __func__, pdev_id, rxdma_entries*3);
  625. status = dp_rx_desc_pool_alloc(soc, pdev_id,
  626. rxdma_entries*3, rx_desc_pool);
  627. if (!QDF_IS_STATUS_SUCCESS(status)) {
  628. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  629. "%s: dp_rx_desc_pool_alloc() failed \n", __func__);
  630. return status;
  631. }
  632. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  633. "%s: Mon RX Buffers Replenish pdev_id=%d\n",
  634. __func__, pdev_id);
  635. status = dp_rx_buffers_replenish(soc, pdev_id, rxdma_srng, rx_desc_pool,
  636. rxdma_entries, &desc_list, &tail,
  637. HAL_RX_BUF_RBM_SW3_BM);
  638. if (!QDF_IS_STATUS_SUCCESS(status)) {
  639. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  640. "%s: dp_rx_buffers_replenish() failed \n", __func__);
  641. return status;
  642. }
  643. return QDF_STATUS_SUCCESS;
  644. }
  645. static QDF_STATUS
  646. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev) {
  647. uint8_t pdev_id = pdev->pdev_id;
  648. struct dp_soc *soc = pdev->soc;
  649. struct rx_desc_pool *rx_desc_pool;
  650. rx_desc_pool = &soc->rx_desc_mon[pdev_id];
  651. if (rx_desc_pool->pool_size != 0) {
  652. dp_rx_desc_pool_free(soc, pdev_id, rx_desc_pool);
  653. }
  654. return QDF_STATUS_SUCCESS;
  655. }
  656. /*
  657. * Allocate and setup link descriptor pool that will be used by HW for
  658. * various link and queue descriptors and managed by WBM
  659. */
  660. static int dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  661. {
  662. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  663. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  664. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  665. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  666. uint32_t total_link_descs, total_mem_size;
  667. uint32_t num_link_desc_banks;
  668. uint32_t last_bank_size = 0;
  669. uint32_t entry_size, num_entries;
  670. void *mon_desc_srng;
  671. uint32_t num_replenish_buf;
  672. struct dp_srng *dp_srng;
  673. int i;
  674. dp_srng = &dp_pdev->rxdma_mon_desc_ring;
  675. num_entries = dp_srng->alloc_size/hal_srng_get_entrysize(
  676. soc->hal_soc, RXDMA_MONITOR_DESC);
  677. /* Round up to power of 2 */
  678. total_link_descs = 1;
  679. while (total_link_descs < num_entries)
  680. total_link_descs <<= 1;
  681. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  682. "%s: total_link_descs: %u, link_desc_size: %d\n",
  683. __func__, total_link_descs, link_desc_size);
  684. total_mem_size = total_link_descs * link_desc_size;
  685. total_mem_size += link_desc_align;
  686. if (total_mem_size <= max_alloc_size) {
  687. num_link_desc_banks = 0;
  688. last_bank_size = total_mem_size;
  689. } else {
  690. num_link_desc_banks = (total_mem_size) /
  691. (max_alloc_size - link_desc_align);
  692. last_bank_size = total_mem_size %
  693. (max_alloc_size - link_desc_align);
  694. }
  695. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  696. "%s: total_mem_size: %d, num_link_desc_banks: %u, \
  697. max_alloc_size: %d last_bank_size: %d\n",
  698. __func__, total_mem_size, num_link_desc_banks, max_alloc_size,
  699. last_bank_size);
  700. for (i = 0; i < num_link_desc_banks; i++) {
  701. dp_pdev->link_desc_banks[i].base_vaddr_unaligned =
  702. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  703. max_alloc_size,
  704. &(dp_pdev->link_desc_banks[i].base_paddr_unaligned));
  705. if (!dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  706. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  707. "%s: Link desc memory allocation failed\n",
  708. __func__);
  709. goto fail;
  710. }
  711. dp_pdev->link_desc_banks[i].size = max_alloc_size;
  712. dp_pdev->link_desc_banks[i].base_vaddr =
  713. (void *)((unsigned long)
  714. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) +
  715. ((unsigned long)
  716. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) %
  717. link_desc_align));
  718. dp_pdev->link_desc_banks[i].base_paddr =
  719. (unsigned long)
  720. (dp_pdev->link_desc_banks[i].base_paddr_unaligned) +
  721. ((unsigned long)
  722. (dp_pdev->link_desc_banks[i].base_vaddr) -
  723. (unsigned long)
  724. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned));
  725. }
  726. if (last_bank_size) {
  727. /* Allocate last bank in case total memory required is not exact
  728. * multiple of max_alloc_size
  729. */
  730. dp_pdev->link_desc_banks[i].base_vaddr_unaligned =
  731. qdf_mem_alloc_consistent(soc->osdev,
  732. soc->osdev->dev, last_bank_size,
  733. &(dp_pdev->link_desc_banks[i].base_paddr_unaligned));
  734. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned == NULL) {
  735. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  736. "%s: allocation failed for mon link desc pool\n",
  737. __func__);
  738. goto fail;
  739. }
  740. dp_pdev->link_desc_banks[i].size = last_bank_size;
  741. dp_pdev->link_desc_banks[i].base_vaddr =
  742. (void *)((unsigned long)
  743. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) +
  744. ((unsigned long)
  745. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) %
  746. link_desc_align));
  747. dp_pdev->link_desc_banks[i].base_paddr =
  748. (unsigned long)
  749. (dp_pdev->link_desc_banks[i].base_paddr_unaligned) +
  750. ((unsigned long)
  751. (dp_pdev->link_desc_banks[i].base_vaddr) -
  752. (unsigned long)
  753. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned));
  754. }
  755. /* Allocate and setup link descriptor idle list for HW internal use */
  756. entry_size = hal_srng_get_entrysize(soc->hal_soc, RXDMA_MONITOR_DESC);
  757. total_mem_size = entry_size * total_link_descs;
  758. mon_desc_srng = dp_pdev->rxdma_mon_desc_ring.hal_srng;
  759. num_replenish_buf = 0;
  760. if (total_mem_size <= max_alloc_size) {
  761. void *desc;
  762. hal_srng_access_start_unlocked(soc->hal_soc, mon_desc_srng);
  763. for (i = 0; i < MAX_MON_LINK_DESC_BANKS &&
  764. dp_pdev->link_desc_banks[i].base_paddr; i++) {
  765. uint32_t num_entries =
  766. (dp_pdev->link_desc_banks[i].size -
  767. (unsigned long)
  768. (dp_pdev->link_desc_banks[i].base_vaddr) -
  769. (unsigned long)
  770. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned))
  771. / link_desc_size;
  772. unsigned long paddr =
  773. (unsigned long)
  774. (dp_pdev->link_desc_banks[i].base_paddr);
  775. unsigned long vaddr =
  776. (unsigned long)
  777. (dp_pdev->link_desc_banks[i].base_vaddr);
  778. while (num_entries && (desc =
  779. hal_srng_src_get_next(soc->hal_soc,
  780. mon_desc_srng))) {
  781. hal_set_link_desc_addr(desc, i, paddr);
  782. num_entries--;
  783. num_replenish_buf++;
  784. paddr += link_desc_size;
  785. vaddr += link_desc_size;
  786. }
  787. }
  788. hal_srng_access_end_unlocked(soc->hal_soc, mon_desc_srng);
  789. } else {
  790. qdf_assert(0);
  791. }
  792. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  793. "%s: successfully replenished %d buffer\n",
  794. __func__, num_replenish_buf);
  795. return 0;
  796. fail:
  797. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  798. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  799. qdf_mem_free_consistent(soc->osdev, NULL,
  800. dp_pdev->link_desc_banks[i].size,
  801. dp_pdev->link_desc_banks[i].base_vaddr_unaligned,
  802. dp_pdev->link_desc_banks[i].base_paddr_unaligned, 0);
  803. }
  804. }
  805. return QDF_STATUS_E_FAILURE;
  806. }
  807. /*
  808. * Free link descriptor pool that was setup HW
  809. */
  810. static void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  811. {
  812. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  813. int i;
  814. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  815. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  816. qdf_mem_free_consistent(soc->osdev, NULL,
  817. dp_pdev->link_desc_banks[i].size,
  818. dp_pdev->link_desc_banks[i].base_vaddr_unaligned,
  819. dp_pdev->link_desc_banks[i].base_paddr_unaligned, 0);
  820. }
  821. }
  822. }
  823. /**
  824. * dp_rx_pdev_mon_attach() - attach DP RX for monitor mode
  825. * @pdev: core txrx pdev context
  826. *
  827. * This function will attach a DP RX for monitor mode instance into
  828. * the main device (SOC) context. Will allocate dp rx resource and
  829. * initialize resources.
  830. *
  831. * Return: QDF_STATUS_SUCCESS: success
  832. * QDF_STATUS_E_RESOURCES: Error return
  833. */
  834. QDF_STATUS
  835. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  836. uint8_t pdev_id = pdev->pdev_id;
  837. struct dp_soc *soc = pdev->soc;
  838. QDF_STATUS status;
  839. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  840. "%s: pdev attach id=%d\n", __func__, pdev_id);
  841. status = dp_rx_pdev_mon_buf_attach(pdev);
  842. if (!QDF_IS_STATUS_SUCCESS(status)) {
  843. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  844. "%s: dp_rx_pdev_mon_buf_attach() failed \n", __func__);
  845. return status;
  846. }
  847. status = dp_rx_pdev_mon_status_attach(pdev);
  848. if (!QDF_IS_STATUS_SUCCESS(status)) {
  849. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  850. "%s: dp_rx_pdev_mon_status_attach() failed \n",
  851. __func__);
  852. return status;
  853. }
  854. status = dp_mon_link_desc_pool_setup(soc, pdev_id);
  855. if (!QDF_IS_STATUS_SUCCESS(status)) {
  856. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  857. "%s: dp_mon_link_desc_pool_setup() failed \n",
  858. __func__);
  859. return status;
  860. }
  861. return QDF_STATUS_SUCCESS;
  862. }
  863. /**
  864. * dp_rx_pdev_mon_detach() - detach dp rx for monitor mode
  865. * @pdev: core txrx pdev context
  866. *
  867. * This function will detach DP RX for monitor mode from
  868. * main device context. will free DP Rx resources for
  869. * monitor mode
  870. *
  871. * Return: QDF_STATUS_SUCCESS: success
  872. * QDF_STATUS_E_RESOURCES: Error return
  873. */
  874. QDF_STATUS
  875. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  876. uint8_t pdev_id = pdev->pdev_id;
  877. struct dp_soc *soc = pdev->soc;
  878. dp_mon_link_desc_pool_cleanup(soc, pdev_id);
  879. dp_rx_pdev_mon_status_detach(pdev);
  880. dp_rx_pdev_mon_buf_detach(pdev);
  881. return QDF_STATUS_SUCCESS;
  882. }