cam_cpas_soc.c 27 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/device.h>
  6. #include <linux/of.h>
  7. #include <linux/module.h>
  8. #include <linux/kernel.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <dt-bindings/msm-camera.h>
  12. #include "cam_cpas_api.h"
  13. #include "cam_cpas_hw_intf.h"
  14. #include "cam_cpas_hw.h"
  15. #include "cam_cpas_soc.h"
  16. static uint cpas_dump;
  17. module_param(cpas_dump, uint, 0644);
  18. void cam_cpas_dump_axi_vote_info(
  19. const struct cam_cpas_client *cpas_client,
  20. const char *identifier,
  21. struct cam_axi_vote *axi_vote)
  22. {
  23. int i;
  24. if (!cpas_dump)
  25. return;
  26. if (!axi_vote || (axi_vote->num_paths >
  27. CAM_CPAS_MAX_PATHS_PER_CLIENT)) {
  28. CAM_ERR(CAM_PERF, "Invalid num_paths %d",
  29. axi_vote ? axi_vote->num_paths : -1);
  30. return;
  31. }
  32. for (i = 0; i < axi_vote->num_paths; i++) {
  33. CAM_INFO(CAM_PERF,
  34. "Client [%s][%d] : [%s], Path=[%d] [%d], camnoc[%llu], mnoc_ab[%llu], mnoc_ib[%llu]",
  35. cpas_client->data.identifier, cpas_client->data.cell_index,
  36. identifier,
  37. axi_vote->axi_path[i].path_data_type,
  38. axi_vote->axi_path[i].transac_type,
  39. axi_vote->axi_path[i].camnoc_bw,
  40. axi_vote->axi_path[i].mnoc_ab_bw,
  41. axi_vote->axi_path[i].mnoc_ib_bw);
  42. }
  43. }
  44. void cam_cpas_util_debug_parse_data(
  45. struct cam_cpas_private_soc *soc_private)
  46. {
  47. int i, j;
  48. struct cam_cpas_tree_node *curr_node = NULL;
  49. if (!cpas_dump)
  50. return;
  51. for (i = 0; i < CAM_CPAS_MAX_TREE_NODES; i++) {
  52. if (!soc_private->tree_node[i])
  53. break;
  54. curr_node = soc_private->tree_node[i];
  55. CAM_INFO(CAM_CPAS,
  56. "NODE cell_idx: %d, level: %d, name: %s, axi_port_idx: %d, merge_type: %d, parent_name: %s camnoc_max_needed: %d",
  57. curr_node->cell_idx, curr_node->level_idx,
  58. curr_node->node_name, curr_node->axi_port_idx,
  59. curr_node->merge_type, curr_node->parent_node ?
  60. curr_node->parent_node->node_name : "no parent",
  61. curr_node->camnoc_max_needed);
  62. if (curr_node->level_idx)
  63. continue;
  64. CAM_INFO(CAM_CPAS, "path_type: %d, transac_type: %s",
  65. curr_node->path_data_type,
  66. cam_cpas_axi_util_trans_type_to_string(
  67. curr_node->path_trans_type));
  68. for (j = 0; j < CAM_CPAS_PATH_DATA_MAX; j++) {
  69. CAM_INFO(CAM_CPAS, "Constituent path: %d",
  70. curr_node->constituent_paths[j] ? j : -1);
  71. }
  72. }
  73. CAM_INFO(CAM_CPAS, "NUMBER OF NODES PARSED: %d", i);
  74. }
  75. int cam_cpas_node_tree_cleanup(struct cam_cpas *cpas_core,
  76. struct cam_cpas_private_soc *soc_private)
  77. {
  78. int i = 0;
  79. for (i = 0; i < CAM_CPAS_MAX_TREE_NODES; i++) {
  80. if (soc_private->tree_node[i]) {
  81. of_node_put(soc_private->tree_node[i]->tree_dev_node);
  82. kfree(soc_private->tree_node[i]);
  83. soc_private->tree_node[i] = NULL;
  84. }
  85. }
  86. for (i = 0; i < CAM_CPAS_MAX_TREE_LEVELS; i++) {
  87. if (soc_private->level_node[i]) {
  88. of_node_put(soc_private->level_node[i]);
  89. soc_private->level_node[i] = NULL;
  90. }
  91. }
  92. if (soc_private->camera_bus_node) {
  93. of_node_put(soc_private->camera_bus_node);
  94. soc_private->camera_bus_node = NULL;
  95. }
  96. mutex_destroy(&cpas_core->tree_lock);
  97. return 0;
  98. }
  99. static int cam_cpas_util_path_type_to_idx(uint32_t *path_data_type)
  100. {
  101. if (*path_data_type >= CAM_CPAS_PATH_DATA_CONSO_OFFSET) {
  102. *path_data_type = CAM_CPAS_MAX_GRAN_PATHS_PER_CLIENT +
  103. (*path_data_type % CAM_CPAS_MAX_GRAN_PATHS_PER_CLIENT);
  104. }
  105. else {
  106. *path_data_type %= CAM_CPAS_MAX_GRAN_PATHS_PER_CLIENT;
  107. }
  108. if (*path_data_type >= CAM_CPAS_PATH_DATA_MAX) {
  109. CAM_ERR(CAM_CPAS, "index Invalid: %u", *path_data_type);
  110. return -EINVAL;
  111. }
  112. return 0;
  113. }
  114. static int cam_cpas_update_camnoc_node(struct cam_cpas *cpas_core,
  115. struct device_node *curr_node,
  116. struct cam_cpas_tree_node *cpas_node_ptr,
  117. int *camnoc_idx)
  118. {
  119. struct device_node *camnoc_node;
  120. int rc;
  121. camnoc_node = of_find_node_by_name(curr_node,
  122. "qcom,axi-port-camnoc");
  123. if (camnoc_node) {
  124. if (*camnoc_idx >=
  125. CAM_CPAS_MAX_AXI_PORTS) {
  126. CAM_ERR(CAM_CPAS, "CAMNOC axi index overshoot %d",
  127. *camnoc_idx);
  128. return -EINVAL;
  129. }
  130. cpas_core->camnoc_axi_port[*camnoc_idx]
  131. .axi_port_node = camnoc_node;
  132. rc = of_property_read_string(
  133. curr_node,
  134. "qcom,axi-port-name",
  135. &cpas_core->camnoc_axi_port[*camnoc_idx]
  136. .axi_port_name);
  137. if (rc) {
  138. CAM_ERR(CAM_CPAS,
  139. "fail to read camnoc-port-name rc=%d",
  140. rc);
  141. return rc;
  142. }
  143. cpas_node_ptr->camnoc_axi_port_idx = *camnoc_idx;
  144. cpas_core->num_camnoc_axi_ports++;
  145. (*camnoc_idx)++;
  146. }
  147. return 0;
  148. }
  149. static int cam_cpas_parse_node_tree(struct cam_cpas *cpas_core,
  150. struct device_node *of_node, struct cam_cpas_private_soc *soc_private)
  151. {
  152. struct device_node *camera_bus_node;
  153. struct device_node *level_node;
  154. struct device_node *curr_node;
  155. struct device_node *parent_node;
  156. struct device_node *mnoc_node;
  157. int mnoc_idx = 0, camnoc_idx = 0, level_idx = 0;
  158. uint32_t path_idx;
  159. bool camnoc_max_needed = false;
  160. struct cam_cpas_tree_node *curr_node_ptr = NULL;
  161. struct cam_cpas_client *curr_client = NULL;
  162. const char *client_name = NULL;
  163. uint32_t client_idx = 0, cell_idx = 0;
  164. int rc = 0, count = 0, i;
  165. camera_bus_node = of_get_child_by_name(of_node, "camera-bus-nodes");
  166. if (!camera_bus_node) {
  167. CAM_ERR(CAM_CPAS, "Camera Bus node not found in cpas DT node");
  168. return -EINVAL;
  169. }
  170. soc_private->camera_bus_node = camera_bus_node;
  171. for_each_available_child_of_node(camera_bus_node, level_node) {
  172. rc = of_property_read_u32(level_node, "level-index",
  173. &level_idx);
  174. if (rc) {
  175. CAM_ERR(CAM_CPAS, "Error reading level idx rc: %d", rc);
  176. return rc;
  177. }
  178. if (level_idx >= CAM_CPAS_MAX_TREE_LEVELS) {
  179. CAM_ERR(CAM_CPAS, "Invalid level idx: %d", level_idx);
  180. return -EINVAL;
  181. }
  182. soc_private->level_node[level_idx] = level_node;
  183. }
  184. for (level_idx = (CAM_CPAS_MAX_TREE_LEVELS - 1); level_idx >= 0;
  185. level_idx--) {
  186. level_node = soc_private->level_node[level_idx];
  187. if (!level_node)
  188. continue;
  189. camnoc_max_needed = of_property_read_bool(level_node,
  190. "camnoc-max-needed");
  191. for_each_available_child_of_node(level_node, curr_node) {
  192. curr_node_ptr =
  193. kzalloc(sizeof(struct cam_cpas_tree_node),
  194. GFP_KERNEL);
  195. if (!curr_node_ptr)
  196. return -ENOMEM;
  197. curr_node_ptr->tree_dev_node = curr_node;
  198. rc = of_property_read_u32(curr_node, "cell-index",
  199. &curr_node_ptr->cell_idx);
  200. if (rc) {
  201. CAM_ERR(CAM_CPAS, "Node index not found");
  202. return rc;
  203. }
  204. if (curr_node_ptr->cell_idx >=
  205. CAM_CPAS_MAX_TREE_NODES) {
  206. CAM_ERR(CAM_CPAS, "Invalid cell idx: %d",
  207. curr_node_ptr->cell_idx);
  208. return -EINVAL;
  209. }
  210. soc_private->tree_node[curr_node_ptr->cell_idx] =
  211. curr_node_ptr;
  212. curr_node_ptr->level_idx = level_idx;
  213. rc = of_property_read_string(curr_node, "node-name",
  214. &curr_node_ptr->node_name);
  215. if (rc) {
  216. CAM_ERR(CAM_CPAS,
  217. "failed to read node-name rc=%d",
  218. rc);
  219. return rc;
  220. }
  221. curr_node_ptr->camnoc_max_needed = camnoc_max_needed;
  222. rc = of_property_read_u32(curr_node, "bus-width-factor",
  223. &curr_node_ptr->bus_width_factor);
  224. if (rc)
  225. curr_node_ptr->bus_width_factor = 1;
  226. rc = of_property_read_u32(curr_node,
  227. "traffic-merge-type",
  228. &curr_node_ptr->merge_type);
  229. curr_node_ptr->axi_port_idx = -1;
  230. mnoc_node = of_get_child_by_name(curr_node,
  231. "qcom,axi-port-mnoc");
  232. if (mnoc_node) {
  233. if (mnoc_idx >= CAM_CPAS_MAX_AXI_PORTS) {
  234. CAM_ERR(CAM_CPAS,
  235. "Invalid mnoc index: %d",
  236. mnoc_idx);
  237. return -EINVAL;
  238. }
  239. cpas_core->axi_port[mnoc_idx].axi_port_node
  240. = mnoc_node;
  241. if (soc_private->bus_icc_based) {
  242. struct of_phandle_args src_args = {0},
  243. dst_args = {0};
  244. rc = of_property_read_string(mnoc_node,
  245. "interconnect-names",
  246. &cpas_core->axi_port[mnoc_idx]
  247. .bus_client.common_data.name);
  248. if (rc) {
  249. CAM_ERR(CAM_CPAS,
  250. "failed to read interconnect-names rc=%d",
  251. rc);
  252. return rc;
  253. }
  254. rc = of_parse_phandle_with_args(
  255. mnoc_node, "interconnects",
  256. "#interconnect-cells", 0,
  257. &src_args);
  258. if (rc) {
  259. CAM_ERR(CAM_CPAS,
  260. "failed to read axi bus src info rc=%d",
  261. rc);
  262. return -EINVAL;
  263. }
  264. of_node_put(src_args.np);
  265. if (src_args.args_count != 1) {
  266. CAM_ERR(CAM_CPAS,
  267. "Invalid number of axi src args: %d",
  268. src_args.args_count);
  269. return -EINVAL;
  270. }
  271. cpas_core->axi_port[mnoc_idx].bus_client
  272. .common_data.src_id = src_args.args[0];
  273. rc = of_parse_phandle_with_args(
  274. mnoc_node, "interconnects",
  275. "#interconnect-cells", 1,
  276. &dst_args);
  277. if (rc) {
  278. CAM_ERR(CAM_CPAS,
  279. "failed to read axi bus dst info rc=%d",
  280. rc);
  281. return -EINVAL;
  282. }
  283. of_node_put(dst_args.np);
  284. if (dst_args.args_count != 1) {
  285. CAM_ERR(CAM_CPAS,
  286. "Invalid number of axi dst args: %d",
  287. dst_args.args_count);
  288. return -EINVAL;
  289. }
  290. cpas_core->axi_port[mnoc_idx].bus_client
  291. .common_data.dst_id = dst_args.args[0];
  292. cpas_core->axi_port[mnoc_idx].bus_client
  293. .common_data.num_usecases = 2;
  294. } else {
  295. rc = of_property_read_string(
  296. curr_node, "qcom,axi-port-name",
  297. &cpas_core->axi_port[mnoc_idx]
  298. .bus_client.common_data.name);
  299. if (rc) {
  300. CAM_ERR(CAM_CPAS,
  301. "failed to read mnoc-port-name rc=%d",
  302. rc);
  303. return rc;
  304. }
  305. }
  306. cpas_core->axi_port[mnoc_idx].axi_port_name =
  307. cpas_core->axi_port[mnoc_idx]
  308. .bus_client.common_data.name;
  309. cpas_core->axi_port
  310. [mnoc_idx].ib_bw_voting_needed
  311. = of_property_read_bool(curr_node,
  312. "ib-bw-voting-needed");
  313. curr_node_ptr->axi_port_idx = mnoc_idx;
  314. mnoc_idx++;
  315. cpas_core->num_axi_ports++;
  316. }
  317. if (!soc_private->control_camnoc_axi_clk) {
  318. rc = cam_cpas_update_camnoc_node(
  319. cpas_core, curr_node, curr_node_ptr,
  320. &camnoc_idx);
  321. if (rc) {
  322. CAM_ERR(CAM_CPAS,
  323. "Parse Camnoc port fail");
  324. return rc;
  325. }
  326. }
  327. rc = of_property_read_string(curr_node,
  328. "client-name", &client_name);
  329. if (!rc) {
  330. rc = of_property_read_u32(curr_node,
  331. "traffic-data", &curr_node_ptr->path_data_type);
  332. if (rc) {
  333. CAM_ERR(CAM_CPAS,
  334. "Path Data type not found");
  335. return rc;
  336. }
  337. rc = cam_cpas_util_path_type_to_idx(
  338. &curr_node_ptr->path_data_type);
  339. if (rc) {
  340. CAM_ERR(CAM_CPAS, "Incorrect path type for client: %s",
  341. client_name);
  342. return rc;
  343. }
  344. rc = of_property_read_u32(curr_node,
  345. "traffic-transaction-type",
  346. &curr_node_ptr->path_trans_type);
  347. if (rc) {
  348. CAM_ERR(CAM_CPAS,
  349. "Path Transac type not found");
  350. return rc;
  351. }
  352. if (curr_node_ptr->path_trans_type >=
  353. CAM_CPAS_TRANSACTION_MAX) {
  354. CAM_ERR(CAM_CPAS,
  355. "Invalid transac type: %d",
  356. curr_node_ptr->path_trans_type);
  357. return -EINVAL;
  358. }
  359. count = of_property_count_u32_elems(curr_node,
  360. "constituent-paths");
  361. for (i = 0; i < count; i++) {
  362. rc = of_property_read_u32_index(
  363. curr_node, "constituent-paths",
  364. i, &path_idx);
  365. if (rc) {
  366. CAM_ERR(CAM_CPAS,
  367. "No constituent path at %d", i);
  368. return rc;
  369. }
  370. rc = cam_cpas_util_path_type_to_idx(
  371. &path_idx);
  372. if (rc)
  373. return rc;
  374. curr_node_ptr->constituent_paths
  375. [path_idx] = true;
  376. }
  377. rc = cam_common_util_get_string_index(
  378. soc_private->client_name,
  379. soc_private->num_clients,
  380. client_name, &client_idx);
  381. if (rc) {
  382. CAM_ERR(CAM_CPAS,
  383. "client name not found in list: %s",
  384. client_name);
  385. return rc;
  386. }
  387. if (client_idx >= CAM_CPAS_MAX_CLIENTS)
  388. return -EINVAL;
  389. curr_client =
  390. cpas_core->cpas_client[client_idx];
  391. curr_client->tree_node_valid = true;
  392. curr_client->tree_node
  393. [curr_node_ptr->path_data_type]
  394. [curr_node_ptr->path_trans_type] =
  395. curr_node_ptr;
  396. CAM_DBG(CAM_CPAS,
  397. "CLIENT NODE ADDED: %d %d %s",
  398. curr_node_ptr->path_data_type,
  399. curr_node_ptr->path_trans_type,
  400. client_name);
  401. }
  402. parent_node = of_parse_phandle(curr_node,
  403. "parent-node", 0);
  404. if (parent_node) {
  405. of_property_read_u32(parent_node, "cell-index",
  406. &cell_idx);
  407. curr_node_ptr->parent_node =
  408. soc_private->tree_node[cell_idx];
  409. } else {
  410. CAM_DBG(CAM_CPAS,
  411. "no parent node at this level");
  412. }
  413. }
  414. }
  415. mutex_init(&cpas_core->tree_lock);
  416. cam_cpas_util_debug_parse_data(soc_private);
  417. return 0;
  418. }
  419. int cam_cpas_get_hw_features(struct platform_device *pdev,
  420. struct cam_cpas_private_soc *soc_private)
  421. {
  422. struct device_node *of_node;
  423. void *fuse;
  424. uint32_t fuse_addr, fuse_mask, fuse_shift;
  425. uint32_t val = 0, fuse_val = 0, feature;
  426. uint32_t enable_type = 0, hw_map = 0;
  427. int count = 0, i = 0, j = 0, num_feature = 0, num_fuse = 0;
  428. struct cam_cpas_feature_info *feature_info;
  429. of_node = pdev->dev.of_node;
  430. count = of_property_count_u32_elems(of_node, "cam_hw_fuse");
  431. CAM_DBG(CAM_CPAS, "fuse info elements count %d", count);
  432. if (count <= 0) {
  433. CAM_INFO(CAM_CPAS, "No or invalid fuse entries count: %d",
  434. count);
  435. goto end;
  436. } else if (count%5 != 0) {
  437. CAM_INFO(CAM_CPAS, "fuse entries should be multiple of 5 %d",
  438. count);
  439. goto end;
  440. }
  441. for (i = 0; (i + 5) <= count; i = i + 5) {
  442. of_property_read_u32_index(of_node, "cam_hw_fuse", i,
  443. &feature);
  444. of_property_read_u32_index(of_node, "cam_hw_fuse", i + 1,
  445. &fuse_addr);
  446. of_property_read_u32_index(of_node, "cam_hw_fuse", i + 2,
  447. &fuse_mask);
  448. of_property_read_u32_index(of_node, "cam_hw_fuse", i + 3,
  449. &enable_type);
  450. of_property_read_u32_index(of_node, "cam_hw_fuse", i + 4,
  451. &hw_map);
  452. val = ffs(fuse_mask);
  453. if (val == 0) {
  454. CAM_ERR(CAM_CPAS, "fuse_mask not valid 0x%x",
  455. fuse_mask);
  456. fuse_shift = 0;
  457. } else {
  458. fuse_shift = val - 1;
  459. }
  460. CAM_INFO(CAM_CPAS,
  461. "feature 0x%x addr 0x%x, mask 0x%x, shift 0x%x type 0x%x hw_map 0x%x",
  462. feature, fuse_addr, fuse_mask, fuse_shift, enable_type,
  463. hw_map);
  464. fuse = ioremap(fuse_addr, 4);
  465. if (fuse) {
  466. fuse_val = cam_io_r(fuse);
  467. for (j = 0; (j < num_fuse) && (j < CAM_CPAS_FUSES_MAX);
  468. j++) {
  469. if (soc_private->fuse_info.fuse_val[j].fuse_id
  470. == fuse_addr)
  471. break;
  472. }
  473. if (j >= CAM_CPAS_FUSES_MAX) {
  474. CAM_ERR(CAM_CPAS,
  475. "fuse_info array overflow! %d", j);
  476. goto end;
  477. }
  478. if (j == num_fuse) {
  479. soc_private->fuse_info.fuse_val[j].fuse_id =
  480. fuse_addr;
  481. soc_private->fuse_info.fuse_val[j].fuse_val =
  482. fuse_val;
  483. CAM_INFO(CAM_CPAS,
  484. "fuse_addr 0x%x, fuse_val %x",
  485. fuse_addr, fuse_val);
  486. num_fuse++;
  487. }
  488. } else {
  489. /* if fuse ioremap is failed, disable the feature */
  490. CAM_ERR(CAM_CPAS,
  491. "fuse register io remap failed fuse_addr:0x%x feature0x%x ",
  492. fuse_addr, feature);
  493. if (enable_type == CAM_CPAS_FEATURE_TYPE_ENABLE ||
  494. enable_type == CAM_CPAS_FEATURE_TYPE_DISABLE)
  495. fuse_val = (enable_type) ? ~fuse_mask :
  496. fuse_mask;
  497. else
  498. fuse_val = 0;
  499. }
  500. if (num_feature >= CAM_CPAS_MAX_FUSE_FEATURE) {
  501. CAM_ERR(CAM_CPAS, "feature_info array overflow %d",
  502. num_feature);
  503. goto end;
  504. }
  505. soc_private->feature_info[num_feature].feature =
  506. feature;
  507. soc_private->feature_info[num_feature].hw_map = hw_map;
  508. soc_private->feature_info[num_feature].type = enable_type;
  509. feature_info = &soc_private->feature_info[num_feature];
  510. if (enable_type != CAM_CPAS_FEATURE_TYPE_VALUE) {
  511. if (enable_type == CAM_CPAS_FEATURE_TYPE_ENABLE) {
  512. /*
  513. * fuse is for enable feature
  514. * if fust bit is set means feature is enabled
  515. * or HW is enabled
  516. */
  517. if (fuse_val & fuse_mask)
  518. feature_info->enable = true;
  519. else
  520. feature_info->enable = false;
  521. } else if (enable_type ==
  522. CAM_CPAS_FEATURE_TYPE_DISABLE){
  523. /*
  524. * fuse is for disable feature
  525. * if fust bit is set means feature is disabled
  526. * or HW is disabled
  527. */
  528. if (fuse_val & fuse_mask)
  529. feature_info->enable = false;
  530. else
  531. feature_info->enable = true;
  532. } else {
  533. CAM_ERR(CAM_CPAS,
  534. "Feature type not valid, type: %d",
  535. enable_type);
  536. goto end;
  537. }
  538. CAM_INFO(CAM_CPAS,
  539. "feature 0x%x enable=%d hw_map=0x%x",
  540. feature_info->feature, feature_info->enable,
  541. feature_info->hw_map);
  542. } else {
  543. feature_info->value =
  544. (fuse_val & fuse_mask) >> fuse_shift;
  545. CAM_INFO(CAM_CPAS,
  546. "feature 0x%x value=0x%x hw_map=0x%x",
  547. feature_info->feature, feature_info->value,
  548. feature_info->hw_map);
  549. }
  550. num_feature++;
  551. iounmap(fuse);
  552. }
  553. end:
  554. soc_private->fuse_info.num_fuses = num_fuse;
  555. soc_private->num_feature_info = num_feature;
  556. return 0;
  557. }
  558. int cam_cpas_get_custom_dt_info(struct cam_hw_info *cpas_hw,
  559. struct platform_device *pdev, struct cam_cpas_private_soc *soc_private)
  560. {
  561. struct device_node *of_node;
  562. struct of_phandle_args src_args = {0}, dst_args = {0};
  563. int count = 0, i = 0, rc = 0, num_bw_values = 0, num_levels = 0;
  564. struct cam_cpas *cpas_core = (struct cam_cpas *) cpas_hw->core_info;
  565. if (!soc_private || !pdev) {
  566. CAM_ERR(CAM_CPAS, "invalid input arg %pK %pK",
  567. soc_private, pdev);
  568. return -EINVAL;
  569. }
  570. of_node = pdev->dev.of_node;
  571. rc = of_property_read_string(of_node, "arch-compat",
  572. &soc_private->arch_compat);
  573. if (rc) {
  574. CAM_ERR(CAM_CPAS, "device %s failed to read arch-compat",
  575. pdev->name);
  576. return rc;
  577. }
  578. cam_cpas_get_hw_features(pdev, soc_private);
  579. soc_private->camnoc_axi_min_ib_bw = 0;
  580. rc = of_property_read_u64(of_node,
  581. "camnoc-axi-min-ib-bw",
  582. &soc_private->camnoc_axi_min_ib_bw);
  583. if (rc == -EOVERFLOW) {
  584. soc_private->camnoc_axi_min_ib_bw = 0;
  585. rc = of_property_read_u32(of_node,
  586. "camnoc-axi-min-ib-bw",
  587. (u32 *)&soc_private->camnoc_axi_min_ib_bw);
  588. }
  589. if (rc) {
  590. CAM_DBG(CAM_CPAS,
  591. "failed to read camnoc-axi-min-ib-bw rc:%d", rc);
  592. soc_private->camnoc_axi_min_ib_bw =
  593. CAM_CPAS_AXI_MIN_CAMNOC_IB_BW;
  594. }
  595. CAM_DBG(CAM_CPAS, "camnoc-axi-min-ib-bw = %llu",
  596. soc_private->camnoc_axi_min_ib_bw);
  597. soc_private->client_id_based = of_property_read_bool(of_node,
  598. "client-id-based");
  599. soc_private->bus_icc_based = of_property_read_bool(of_node,
  600. "interconnects");
  601. if (soc_private->bus_icc_based) {
  602. rc = of_property_read_string(of_node, "interconnect-names",
  603. &cpas_core->ahb_bus_client.common_data.name);
  604. if (rc) {
  605. CAM_ERR(CAM_CPAS,
  606. "device %s failed to read interconnect-names",
  607. pdev->name);
  608. return rc;
  609. }
  610. rc = of_parse_phandle_with_args(of_node, "interconnects",
  611. "#interconnect-cells", 0, &src_args);
  612. if (rc) {
  613. CAM_ERR(CAM_CPAS,
  614. "device %s failed to read ahb bus src info",
  615. pdev->name);
  616. return rc;
  617. }
  618. of_node_put(src_args.np);
  619. if (src_args.args_count != 1) {
  620. CAM_ERR(CAM_CPAS,
  621. "Invalid number of ahb src args: %d",
  622. src_args.args_count);
  623. return -EINVAL;
  624. }
  625. cpas_core->ahb_bus_client.common_data.src_id = src_args.args[0];
  626. rc = of_parse_phandle_with_args(of_node, "interconnects",
  627. "#interconnect-cells", 1, &dst_args);
  628. if (rc) {
  629. CAM_ERR(CAM_CPAS,
  630. "device %s failed to read ahb bus dst info",
  631. pdev->name);
  632. return rc;
  633. }
  634. of_node_put(dst_args.np);
  635. if (dst_args.args_count != 1) {
  636. CAM_ERR(CAM_CPAS,
  637. "Invalid number of ahb dst args: %d",
  638. dst_args.args_count);
  639. return -EINVAL;
  640. }
  641. cpas_core->ahb_bus_client.common_data.dst_id = dst_args.args[0];
  642. rc = of_property_read_u32(of_node, "cam-ahb-num-cases",
  643. &cpas_core->ahb_bus_client.common_data.num_usecases);
  644. if (rc) {
  645. CAM_ERR(CAM_CPAS,
  646. "device %s failed to read ahb num usecases",
  647. pdev->name);
  648. return rc;
  649. }
  650. if (cpas_core->ahb_bus_client.common_data.num_usecases >
  651. CAM_SOC_BUS_MAX_NUM_USECASES) {
  652. CAM_ERR(CAM_UTIL, "Invalid number of usecases: %d",
  653. cpas_core->ahb_bus_client.common_data
  654. .num_usecases);
  655. return -EINVAL;
  656. }
  657. num_bw_values = of_property_count_u32_elems(of_node,
  658. "cam-ahb-bw-KBps");
  659. if (num_bw_values <= 0) {
  660. CAM_ERR(CAM_UTIL, "Error counting ahb bw values");
  661. return -EINVAL;
  662. }
  663. CAM_DBG(CAM_CPAS, "AHB: num bw values %d", num_bw_values);
  664. num_levels = (num_bw_values / 2);
  665. if (num_levels !=
  666. cpas_core->ahb_bus_client.common_data.num_usecases) {
  667. CAM_ERR(CAM_UTIL, "Invalid number of levels: %d",
  668. num_bw_values/2);
  669. return -EINVAL;
  670. }
  671. for (i = 0; i < num_levels; i++) {
  672. rc = of_property_read_u32_index(of_node,
  673. "cam-ahb-bw-KBps",
  674. (i * 2),
  675. (uint32_t *) &cpas_core->ahb_bus_client
  676. .common_data.bw_pair[i].ab);
  677. if (rc) {
  678. CAM_ERR(CAM_UTIL,
  679. "Error reading ab bw value, rc=%d",
  680. rc);
  681. return rc;
  682. }
  683. rc = of_property_read_u32_index(of_node,
  684. "cam-ahb-bw-KBps",
  685. ((i * 2) + 1),
  686. (uint32_t *) &cpas_core->ahb_bus_client
  687. .common_data.bw_pair[i].ib);
  688. if (rc) {
  689. CAM_ERR(CAM_UTIL,
  690. "Error reading ib bw value, rc=%d",
  691. rc);
  692. return rc;
  693. }
  694. CAM_DBG(CAM_CPAS,
  695. "AHB: Level: %d, ab_value %llu, ib_value: %llu",
  696. i, cpas_core->ahb_bus_client.common_data
  697. .bw_pair[i].ab, cpas_core->ahb_bus_client
  698. .common_data.bw_pair[i].ib);
  699. }
  700. }
  701. count = of_property_count_strings(of_node, "client-names");
  702. if (count <= 0) {
  703. CAM_ERR(CAM_CPAS, "no client-names found");
  704. count = 0;
  705. return -EINVAL;
  706. } else if (count > CAM_CPAS_MAX_CLIENTS) {
  707. CAM_ERR(CAM_CPAS, "Number of clients %d greater than max %d",
  708. count, CAM_CPAS_MAX_CLIENTS);
  709. count = 0;
  710. return -EINVAL;
  711. }
  712. soc_private->num_clients = count;
  713. CAM_DBG(CAM_CPAS,
  714. "arch-compat=%s, client_id_based = %d, num_clients=%d",
  715. soc_private->arch_compat, soc_private->client_id_based,
  716. soc_private->num_clients);
  717. for (i = 0; i < soc_private->num_clients; i++) {
  718. rc = of_property_read_string_index(of_node,
  719. "client-names", i, &soc_private->client_name[i]);
  720. if (rc) {
  721. CAM_ERR(CAM_CPAS, "no client-name at cnt=%d", i);
  722. return -EINVAL;
  723. }
  724. cpas_core->cpas_client[i] =
  725. kzalloc(sizeof(struct cam_cpas_client), GFP_KERNEL);
  726. if (!cpas_core->cpas_client[i]) {
  727. rc = -ENOMEM;
  728. goto cleanup_clients;
  729. }
  730. CAM_DBG(CAM_CPAS, "Client[%d] : %s", i,
  731. soc_private->client_name[i]);
  732. }
  733. soc_private->control_camnoc_axi_clk = of_property_read_bool(of_node,
  734. "control-camnoc-axi-clk");
  735. if (soc_private->control_camnoc_axi_clk == true) {
  736. rc = of_property_read_u32(of_node, "camnoc-bus-width",
  737. &soc_private->camnoc_bus_width);
  738. if (rc || (soc_private->camnoc_bus_width == 0)) {
  739. CAM_ERR(CAM_CPAS, "Bus width not found rc=%d, %d",
  740. rc, soc_private->camnoc_bus_width);
  741. goto cleanup_clients;
  742. }
  743. rc = of_property_read_u32(of_node,
  744. "camnoc-axi-clk-bw-margin-perc",
  745. &soc_private->camnoc_axi_clk_bw_margin);
  746. if (rc) {
  747. /* this is not fatal, overwrite rc */
  748. rc = 0;
  749. soc_private->camnoc_axi_clk_bw_margin = 0;
  750. }
  751. }
  752. CAM_DBG(CAM_CPAS,
  753. "control_camnoc_axi_clk=%d, width=%d, margin=%d",
  754. soc_private->control_camnoc_axi_clk,
  755. soc_private->camnoc_bus_width,
  756. soc_private->camnoc_axi_clk_bw_margin);
  757. count = of_property_count_u32_elems(of_node, "vdd-corners");
  758. if ((count > 0) && (count <= CAM_REGULATOR_LEVEL_MAX) &&
  759. (of_property_count_strings(of_node, "vdd-corner-ahb-mapping") ==
  760. count)) {
  761. const char *ahb_string;
  762. for (i = 0; i < count; i++) {
  763. rc = of_property_read_u32_index(of_node, "vdd-corners",
  764. i, &soc_private->vdd_ahb[i].vdd_corner);
  765. if (rc) {
  766. CAM_ERR(CAM_CPAS,
  767. "vdd-corners failed at index=%d", i);
  768. rc = -ENODEV;
  769. goto cleanup_clients;
  770. }
  771. rc = of_property_read_string_index(of_node,
  772. "vdd-corner-ahb-mapping", i, &ahb_string);
  773. if (rc) {
  774. CAM_ERR(CAM_CPAS,
  775. "no ahb-mapping at index=%d", i);
  776. rc = -ENODEV;
  777. goto cleanup_clients;
  778. }
  779. rc = cam_soc_util_get_level_from_string(ahb_string,
  780. &soc_private->vdd_ahb[i].ahb_level);
  781. if (rc) {
  782. CAM_ERR(CAM_CPAS,
  783. "invalid ahb-string at index=%d", i);
  784. rc = -EINVAL;
  785. goto cleanup_clients;
  786. }
  787. CAM_DBG(CAM_CPAS,
  788. "Vdd-AHB mapping [%d] : [%d] [%s] [%d]", i,
  789. soc_private->vdd_ahb[i].vdd_corner,
  790. ahb_string, soc_private->vdd_ahb[i].ahb_level);
  791. }
  792. soc_private->num_vdd_ahb_mapping = count;
  793. }
  794. rc = cam_cpas_parse_node_tree(cpas_core, of_node, soc_private);
  795. if (rc) {
  796. CAM_ERR(CAM_CPAS, "Node tree parsing failed rc: %d", rc);
  797. goto cleanup_tree;
  798. }
  799. /* Optional rpmh bcm info */
  800. count = of_property_count_u32_elems(of_node, "rpmh-bcm-info");
  801. /*
  802. * We expect count=5(CAM_RPMH_BCM_INFO_MAX) if valid rpmh bcm info
  803. * is available.
  804. * 0 - Total number of BCMs
  805. * 1 - First BCM FE (front-end) register offset.
  806. * These represent requested clk plan by sw
  807. * 2 - First BCM BE (back-end) register offset.
  808. * These represent actual clk plan at hw
  809. * 3 - DDR BCM index
  810. * 4 - MMNOC BCM index
  811. */
  812. if (count == CAM_RPMH_BCM_INFO_MAX) {
  813. for (i = 0; i < count; i++) {
  814. rc = of_property_read_u32_index(of_node,
  815. "rpmh-bcm-info", i, &soc_private->rpmh_info[i]);
  816. if (rc) {
  817. CAM_ERR(CAM_CPAS,
  818. "Incorrect rpmh info at %d, count=%d",
  819. i, count);
  820. break;
  821. }
  822. CAM_DBG(CAM_CPAS, "RPMH BCM Info [%d]=0x%x",
  823. i, soc_private->rpmh_info[i]);
  824. }
  825. if (rc)
  826. soc_private->rpmh_info[CAM_RPMH_NUMBER_OF_BCMS] = 0;
  827. } else {
  828. CAM_DBG(CAM_CPAS, "RPMH BCM info not available in DT, count=%d",
  829. count);
  830. }
  831. return 0;
  832. cleanup_tree:
  833. cam_cpas_node_tree_cleanup(cpas_core, soc_private);
  834. cleanup_clients:
  835. cam_cpas_util_client_cleanup(cpas_hw);
  836. return rc;
  837. }
  838. int cam_cpas_soc_init_resources(struct cam_hw_soc_info *soc_info,
  839. irq_handler_t irq_handler, struct cam_hw_info *cpas_hw)
  840. {
  841. int rc = 0;
  842. rc = cam_soc_util_get_dt_properties(soc_info);
  843. if (rc) {
  844. CAM_ERR(CAM_CPAS, "failed in get_dt_properties, rc=%d", rc);
  845. return rc;
  846. }
  847. if (soc_info->irq_line && !irq_handler) {
  848. CAM_ERR(CAM_CPAS, "Invalid IRQ handler");
  849. return -EINVAL;
  850. }
  851. rc = cam_soc_util_request_platform_resource(soc_info, irq_handler,
  852. cpas_hw);
  853. if (rc) {
  854. CAM_ERR(CAM_CPAS, "failed in request_platform_resource, rc=%d",
  855. rc);
  856. return rc;
  857. }
  858. soc_info->soc_private = kzalloc(sizeof(struct cam_cpas_private_soc),
  859. GFP_KERNEL);
  860. if (!soc_info->soc_private) {
  861. rc = -ENOMEM;
  862. goto release_res;
  863. }
  864. rc = cam_cpas_get_custom_dt_info(cpas_hw, soc_info->pdev,
  865. soc_info->soc_private);
  866. if (rc) {
  867. CAM_ERR(CAM_CPAS, "failed in get_custom_info, rc=%d", rc);
  868. goto free_soc_private;
  869. }
  870. return rc;
  871. free_soc_private:
  872. kfree(soc_info->soc_private);
  873. release_res:
  874. cam_soc_util_release_platform_resource(soc_info);
  875. return rc;
  876. }
  877. int cam_cpas_soc_deinit_resources(struct cam_hw_soc_info *soc_info)
  878. {
  879. int rc;
  880. rc = cam_soc_util_release_platform_resource(soc_info);
  881. if (rc)
  882. CAM_ERR(CAM_CPAS, "release platform failed, rc=%d", rc);
  883. kfree(soc_info->soc_private);
  884. soc_info->soc_private = NULL;
  885. return rc;
  886. }
  887. int cam_cpas_soc_enable_resources(struct cam_hw_soc_info *soc_info,
  888. enum cam_vote_level default_level)
  889. {
  890. int rc = 0;
  891. rc = cam_soc_util_enable_platform_resource(soc_info, true,
  892. default_level, true);
  893. if (rc)
  894. CAM_ERR(CAM_CPAS, "enable platform resource failed, rc=%d", rc);
  895. return rc;
  896. }
  897. int cam_cpas_soc_disable_resources(struct cam_hw_soc_info *soc_info,
  898. bool disable_clocks, bool disable_irq)
  899. {
  900. int rc = 0;
  901. rc = cam_soc_util_disable_platform_resource(soc_info,
  902. disable_clocks, disable_irq);
  903. if (rc)
  904. CAM_ERR(CAM_CPAS, "disable platform failed, rc=%d", rc);
  905. return rc;
  906. }
  907. int cam_cpas_soc_disable_irq(struct cam_hw_soc_info *soc_info)
  908. {
  909. int rc = 0;
  910. rc = cam_soc_util_irq_disable(soc_info);
  911. if (rc)
  912. CAM_ERR(CAM_CPAS, "disable irq failed, rc=%d", rc);
  913. return rc;
  914. }