main.c 112 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #include "main.h"
  47. #include "qmi.h"
  48. #include "debug.h"
  49. #include "power.h"
  50. #include "genl.h"
  51. #define MAX_PROP_SIZE 32
  52. #define NUM_LOG_PAGES 10
  53. #define NUM_LOG_LONG_PAGES 4
  54. #define ICNSS_MAGIC 0x5abc5abc
  55. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  56. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  57. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  58. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  59. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  60. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  61. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  62. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  63. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  64. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  65. #define ICNSS_MAX_PROBE_CNT 2
  66. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  67. #define PROBE_TIMEOUT 15000
  68. #define SMP2P_SOC_WAKE_TIMEOUT 500
  69. #ifdef CONFIG_ICNSS2_DEBUG
  70. static unsigned long qmi_timeout = 3000;
  71. module_param(qmi_timeout, ulong, 0600);
  72. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  73. #else
  74. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  75. #endif
  76. static struct icnss_priv *penv;
  77. static struct work_struct wpss_loader;
  78. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  79. #define ICNSS_EVENT_PENDING 2989
  80. #define ICNSS_EVENT_SYNC BIT(0)
  81. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  82. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  83. ICNSS_EVENT_SYNC)
  84. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  85. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  86. #define SMP2P_GET_MAX_RETRY 4
  87. #define SMP2P_GET_RETRY_DELAY_MS 500
  88. #define RAMDUMP_NUM_DEVICES 256
  89. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  90. #define WLAN_EN_TEMP_THRESHOLD 5000
  91. #define WLAN_EN_DELAY 500
  92. #define ICNSS_RPROC_LEN 10
  93. static DEFINE_IDA(rd_minor_id);
  94. enum icnss_pdr_cause_index {
  95. ICNSS_FW_CRASH,
  96. ICNSS_ROOT_PD_CRASH,
  97. ICNSS_ROOT_PD_SHUTDOWN,
  98. ICNSS_HOST_ERROR,
  99. };
  100. static const char * const icnss_pdr_cause[] = {
  101. [ICNSS_FW_CRASH] = "FW crash",
  102. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  103. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  104. [ICNSS_HOST_ERROR] = "Host error",
  105. };
  106. static void icnss_set_plat_priv(struct icnss_priv *priv)
  107. {
  108. penv = priv;
  109. }
  110. static struct icnss_priv *icnss_get_plat_priv()
  111. {
  112. return penv;
  113. }
  114. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  115. struct kobj_attribute *attr,
  116. const char *buf, size_t count)
  117. {
  118. struct icnss_priv *priv = icnss_get_plat_priv();
  119. atomic_set(&priv->is_shutdown, true);
  120. icnss_pr_dbg("Received shutdown indication");
  121. return count;
  122. }
  123. static struct kobj_attribute icnss_sysfs_attribute =
  124. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  125. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  126. {
  127. if (atomic_inc_return(&priv->pm_count) != 1)
  128. return;
  129. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  130. atomic_read(&priv->pm_count));
  131. pm_stay_awake(&priv->pdev->dev);
  132. priv->stats.pm_stay_awake++;
  133. }
  134. static void icnss_pm_relax(struct icnss_priv *priv)
  135. {
  136. int r = atomic_dec_return(&priv->pm_count);
  137. WARN_ON(r < 0);
  138. if (r != 0)
  139. return;
  140. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  141. atomic_read(&priv->pm_count));
  142. pm_relax(&priv->pdev->dev);
  143. priv->stats.pm_relax++;
  144. }
  145. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  146. {
  147. switch (type) {
  148. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  149. return "SERVER_ARRIVE";
  150. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  151. return "SERVER_EXIT";
  152. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  153. return "FW_READY";
  154. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  155. return "REGISTER_DRIVER";
  156. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  157. return "UNREGISTER_DRIVER";
  158. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  159. return "PD_SERVICE_DOWN";
  160. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  161. return "FW_EARLY_CRASH_IND";
  162. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  163. return "IDLE_SHUTDOWN";
  164. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  165. return "IDLE_RESTART";
  166. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  167. return "FW_INIT_DONE";
  168. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  169. return "QDSS_TRACE_REQ_MEM";
  170. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  171. return "QDSS_TRACE_SAVE";
  172. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  173. return "QDSS_TRACE_FREE";
  174. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  175. return "M3_DUMP_UPLOAD";
  176. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  177. return "QDSS_TRACE_REQ_DATA";
  178. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  179. return "SUBSYS_RESTART_LEVEL";
  180. case ICNSS_DRIVER_EVENT_MAX:
  181. return "EVENT_MAX";
  182. }
  183. return "UNKNOWN";
  184. };
  185. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  186. {
  187. switch (type) {
  188. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  189. return "SOC_WAKE_REQUEST";
  190. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  191. return "SOC_WAKE_RELEASE";
  192. case ICNSS_SOC_WAKE_EVENT_MAX:
  193. return "SOC_EVENT_MAX";
  194. }
  195. return "UNKNOWN";
  196. };
  197. int icnss_driver_event_post(struct icnss_priv *priv,
  198. enum icnss_driver_event_type type,
  199. u32 flags, void *data)
  200. {
  201. struct icnss_driver_event *event;
  202. unsigned long irq_flags;
  203. int gfp = GFP_KERNEL;
  204. int ret = 0;
  205. if (!priv)
  206. return -ENODEV;
  207. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  208. icnss_driver_event_to_str(type), type, current->comm,
  209. flags, priv->state);
  210. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  211. icnss_pr_err("Invalid Event type: %d, can't post", type);
  212. return -EINVAL;
  213. }
  214. if (in_interrupt() || irqs_disabled())
  215. gfp = GFP_ATOMIC;
  216. event = kzalloc(sizeof(*event), gfp);
  217. if (event == NULL)
  218. return -ENOMEM;
  219. icnss_pm_stay_awake(priv);
  220. event->type = type;
  221. event->data = data;
  222. init_completion(&event->complete);
  223. event->ret = ICNSS_EVENT_PENDING;
  224. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  225. spin_lock_irqsave(&priv->event_lock, irq_flags);
  226. list_add_tail(&event->list, &priv->event_list);
  227. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  228. priv->stats.events[type].posted++;
  229. queue_work(priv->event_wq, &priv->event_work);
  230. if (!(flags & ICNSS_EVENT_SYNC))
  231. goto out;
  232. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  233. wait_for_completion(&event->complete);
  234. else
  235. ret = wait_for_completion_interruptible(&event->complete);
  236. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  237. icnss_driver_event_to_str(type), type, priv->state, ret,
  238. event->ret);
  239. spin_lock_irqsave(&priv->event_lock, irq_flags);
  240. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  241. event->sync = false;
  242. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  243. ret = -EINTR;
  244. goto out;
  245. }
  246. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  247. ret = event->ret;
  248. kfree(event);
  249. out:
  250. icnss_pm_relax(priv);
  251. return ret;
  252. }
  253. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  254. enum icnss_soc_wake_event_type type,
  255. u32 flags, void *data)
  256. {
  257. struct icnss_soc_wake_event *event;
  258. unsigned long irq_flags;
  259. int gfp = GFP_KERNEL;
  260. int ret = 0;
  261. if (!priv)
  262. return -ENODEV;
  263. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  264. icnss_soc_wake_event_to_str(type),
  265. type, current->comm, flags, priv->state);
  266. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  267. icnss_pr_err("Invalid Event type: %d, can't post", type);
  268. return -EINVAL;
  269. }
  270. if (in_interrupt() || irqs_disabled())
  271. gfp = GFP_ATOMIC;
  272. event = kzalloc(sizeof(*event), gfp);
  273. if (!event)
  274. return -ENOMEM;
  275. icnss_pm_stay_awake(priv);
  276. event->type = type;
  277. event->data = data;
  278. init_completion(&event->complete);
  279. event->ret = ICNSS_EVENT_PENDING;
  280. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  281. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  282. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  283. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  284. priv->stats.soc_wake_events[type].posted++;
  285. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  286. if (!(flags & ICNSS_EVENT_SYNC))
  287. goto out;
  288. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  289. wait_for_completion(&event->complete);
  290. else
  291. ret = wait_for_completion_interruptible(&event->complete);
  292. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  293. icnss_soc_wake_event_to_str(type),
  294. type, priv->state, ret, event->ret);
  295. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  296. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  297. event->sync = false;
  298. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  299. ret = -EINTR;
  300. goto out;
  301. }
  302. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  303. ret = event->ret;
  304. kfree(event);
  305. out:
  306. icnss_pm_relax(priv);
  307. return ret;
  308. }
  309. bool icnss_is_fw_ready(void)
  310. {
  311. if (!penv)
  312. return false;
  313. else
  314. return test_bit(ICNSS_FW_READY, &penv->state);
  315. }
  316. EXPORT_SYMBOL(icnss_is_fw_ready);
  317. void icnss_block_shutdown(bool status)
  318. {
  319. if (!penv)
  320. return;
  321. if (status) {
  322. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  323. reinit_completion(&penv->unblock_shutdown);
  324. } else {
  325. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  326. complete(&penv->unblock_shutdown);
  327. }
  328. }
  329. EXPORT_SYMBOL(icnss_block_shutdown);
  330. bool icnss_is_fw_down(void)
  331. {
  332. struct icnss_priv *priv = icnss_get_plat_priv();
  333. if (!priv)
  334. return false;
  335. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  336. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  337. test_bit(ICNSS_REJUVENATE, &priv->state);
  338. }
  339. EXPORT_SYMBOL(icnss_is_fw_down);
  340. unsigned long icnss_get_device_config(void)
  341. {
  342. struct icnss_priv *priv = icnss_get_plat_priv();
  343. if (!priv)
  344. return 0;
  345. return priv->device_config;
  346. }
  347. EXPORT_SYMBOL(icnss_get_device_config);
  348. bool icnss_is_rejuvenate(void)
  349. {
  350. if (!penv)
  351. return false;
  352. else
  353. return test_bit(ICNSS_REJUVENATE, &penv->state);
  354. }
  355. EXPORT_SYMBOL(icnss_is_rejuvenate);
  356. bool icnss_is_pdr(void)
  357. {
  358. if (!penv)
  359. return false;
  360. else
  361. return test_bit(ICNSS_PDR, &penv->state);
  362. }
  363. EXPORT_SYMBOL(icnss_is_pdr);
  364. static int icnss_send_smp2p(struct icnss_priv *priv,
  365. enum icnss_smp2p_msg_id msg_id,
  366. enum smp2p_out_entry smp2p_entry)
  367. {
  368. unsigned int value = 0;
  369. int ret;
  370. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  371. return -EINVAL;
  372. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  373. if (msg_id == ICNSS_RESET_MSG) {
  374. priv->smp2p_info[smp2p_entry].seq = 0;
  375. ret = qcom_smem_state_update_bits(
  376. priv->smp2p_info[smp2p_entry].smem_state,
  377. ICNSS_SMEM_VALUE_MASK,
  378. 0);
  379. if (ret)
  380. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  381. ret, icnss_smp2p_str[smp2p_entry]);
  382. return ret;
  383. }
  384. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  385. return -ENODEV;
  386. value |= priv->smp2p_info[smp2p_entry].seq++;
  387. value <<= ICNSS_SMEM_SEQ_NO_POS;
  388. value |= msg_id;
  389. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  390. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  391. reinit_completion(&penv->smp2p_soc_wake_wait);
  392. ret = qcom_smem_state_update_bits(
  393. priv->smp2p_info[smp2p_entry].smem_state,
  394. ICNSS_SMEM_VALUE_MASK,
  395. value);
  396. if (ret) {
  397. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  398. icnss_smp2p_str[smp2p_entry]);
  399. } else {
  400. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  401. msg_id == ICNSS_SOC_WAKE_REL) {
  402. if (!wait_for_completion_timeout(
  403. &priv->smp2p_soc_wake_wait,
  404. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  405. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  406. icnss_smp2p_str[smp2p_entry]);
  407. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  408. ICNSS_ASSERT(0);
  409. }
  410. }
  411. }
  412. return ret;
  413. }
  414. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  415. {
  416. struct icnss_priv *priv = ctx;
  417. if (priv)
  418. priv->force_err_fatal = true;
  419. icnss_pr_err("Received force error fatal request from FW\n");
  420. return IRQ_HANDLED;
  421. }
  422. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  423. {
  424. struct icnss_priv *priv = ctx;
  425. struct icnss_uevent_fw_down_data fw_down_data = {0};
  426. icnss_pr_err("Received early crash indication from FW\n");
  427. if (priv) {
  428. set_bit(ICNSS_FW_DOWN, &priv->state);
  429. icnss_ignore_fw_timeout(true);
  430. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  431. clear_bit(ICNSS_FW_READY, &priv->state);
  432. fw_down_data.crashed = true;
  433. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  434. &fw_down_data);
  435. }
  436. }
  437. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  438. 0, NULL);
  439. return IRQ_HANDLED;
  440. }
  441. static void register_fw_error_notifications(struct device *dev)
  442. {
  443. struct icnss_priv *priv = dev_get_drvdata(dev);
  444. struct device_node *dev_node;
  445. int irq = 0, ret = 0;
  446. if (!priv)
  447. return;
  448. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  449. if (!dev_node) {
  450. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  451. return;
  452. }
  453. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  454. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  455. ret = irq = of_irq_get_byname(dev_node,
  456. "qcom,smp2p-force-fatal-error");
  457. if (ret < 0) {
  458. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  459. irq);
  460. return;
  461. }
  462. }
  463. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  464. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  465. "wlanfw-err", priv);
  466. if (ret < 0) {
  467. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  468. irq, ret);
  469. return;
  470. }
  471. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  472. priv->fw_error_fatal_irq = irq;
  473. }
  474. static void register_early_crash_notifications(struct device *dev)
  475. {
  476. struct icnss_priv *priv = dev_get_drvdata(dev);
  477. struct device_node *dev_node;
  478. int irq = 0, ret = 0;
  479. if (!priv)
  480. return;
  481. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  482. if (!dev_node) {
  483. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  484. return;
  485. }
  486. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  487. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  488. ret = irq = of_irq_get_byname(dev_node,
  489. "qcom,smp2p-early-crash-ind");
  490. if (ret < 0) {
  491. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  492. irq);
  493. return;
  494. }
  495. }
  496. ret = devm_request_threaded_irq(dev, irq, NULL,
  497. fw_crash_indication_handler,
  498. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  499. "wlanfw-early-crash-ind", priv);
  500. if (ret < 0) {
  501. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  502. irq, ret);
  503. return;
  504. }
  505. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  506. priv->fw_early_crash_irq = irq;
  507. }
  508. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  509. {
  510. struct thermal_zone_device *thermal_dev;
  511. const char *tsens;
  512. int ret;
  513. ret = of_property_read_string(priv->pdev->dev.of_node,
  514. "tsens",
  515. &tsens);
  516. if (ret)
  517. return ret;
  518. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  519. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  520. if (IS_ERR(thermal_dev)) {
  521. icnss_pr_err("Fail to get thermal zone. ret: %d",
  522. PTR_ERR(thermal_dev));
  523. return PTR_ERR(thermal_dev);
  524. }
  525. ret = thermal_zone_get_temp(thermal_dev, temp);
  526. if (ret)
  527. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  528. return ret;
  529. }
  530. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  531. {
  532. struct icnss_priv *priv = ctx;
  533. if (priv)
  534. complete(&priv->smp2p_soc_wake_wait);
  535. return IRQ_HANDLED;
  536. }
  537. static void register_soc_wake_notif(struct device *dev)
  538. {
  539. struct icnss_priv *priv = dev_get_drvdata(dev);
  540. struct device_node *dev_node;
  541. int irq = 0, ret = 0;
  542. if (!priv)
  543. return;
  544. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  545. if (!dev_node) {
  546. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  547. return;
  548. }
  549. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  550. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  551. ret = irq = of_irq_get_byname(dev_node,
  552. "qcom,smp2p-soc-wake-ack");
  553. if (ret < 0) {
  554. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  555. irq);
  556. return;
  557. }
  558. }
  559. ret = devm_request_threaded_irq(dev, irq, NULL,
  560. fw_soc_wake_ack_handler,
  561. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  562. IRQF_TRIGGER_FALLING,
  563. "wlanfw-soc-wake-ack", priv);
  564. if (ret < 0) {
  565. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  566. irq, ret);
  567. return;
  568. }
  569. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  570. priv->fw_soc_wake_ack_irq = irq;
  571. }
  572. int icnss_call_driver_uevent(struct icnss_priv *priv,
  573. enum icnss_uevent uevent, void *data)
  574. {
  575. struct icnss_uevent_data uevent_data;
  576. if (!priv->ops || !priv->ops->uevent)
  577. return 0;
  578. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  579. priv->state, uevent);
  580. uevent_data.uevent = uevent;
  581. uevent_data.data = data;
  582. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  583. }
  584. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  585. {
  586. int i;
  587. int ret = 0;
  588. ret = icnss_qmi_get_dms_mac(priv);
  589. if (ret == 0 && priv->dms.mac_valid)
  590. goto qmi_send;
  591. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  592. * Thus assert on failure to get MAC from DMS even after retries
  593. */
  594. if (priv->use_nv_mac) {
  595. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  596. if (priv->dms.mac_valid)
  597. break;
  598. ret = icnss_qmi_get_dms_mac(priv);
  599. if (ret != -EAGAIN)
  600. break;
  601. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  602. }
  603. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  604. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  605. ICNSS_ASSERT(0);
  606. return -EINVAL;
  607. }
  608. }
  609. qmi_send:
  610. if (priv->dms.mac_valid)
  611. ret =
  612. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  613. ARRAY_SIZE(priv->dms.mac));
  614. return ret;
  615. }
  616. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  617. enum smp2p_out_entry smp2p_entry)
  618. {
  619. int retry = 0;
  620. int error;
  621. if (priv->smp2p_info[smp2p_entry].smem_state)
  622. return;
  623. retry:
  624. priv->smp2p_info[smp2p_entry].smem_state =
  625. qcom_smem_state_get(&priv->pdev->dev,
  626. icnss_smp2p_str[smp2p_entry],
  627. &priv->smp2p_info[smp2p_entry].smem_bit);
  628. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  629. if (retry++ < SMP2P_GET_MAX_RETRY) {
  630. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  631. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  632. error, icnss_smp2p_str[smp2p_entry]);
  633. msleep(SMP2P_GET_RETRY_DELAY_MS);
  634. goto retry;
  635. }
  636. ICNSS_ASSERT(0);
  637. return;
  638. }
  639. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  640. }
  641. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  642. void *data)
  643. {
  644. int ret = 0;
  645. int temp = 0;
  646. bool ignore_assert = false;
  647. if (!priv)
  648. return -ENODEV;
  649. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  650. clear_bit(ICNSS_FW_DOWN, &priv->state);
  651. clear_bit(ICNSS_FW_READY, &priv->state);
  652. icnss_ignore_fw_timeout(false);
  653. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  654. icnss_pr_err("QMI Server already in Connected State\n");
  655. ICNSS_ASSERT(0);
  656. }
  657. ret = icnss_connect_to_fw_server(priv, data);
  658. if (ret)
  659. goto fail;
  660. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  661. ret = wlfw_ind_register_send_sync_msg(priv);
  662. if (ret < 0) {
  663. if (ret == -EALREADY) {
  664. ret = 0;
  665. goto qmi_registered;
  666. }
  667. ignore_assert = true;
  668. goto fail;
  669. }
  670. if (priv->device_id == WCN6750_DEVICE_ID) {
  671. if (!icnss_get_temperature(priv, &temp)) {
  672. icnss_pr_dbg("Temperature: %d\n", temp);
  673. if (temp < WLAN_EN_TEMP_THRESHOLD)
  674. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  675. }
  676. ret = wlfw_host_cap_send_sync(priv);
  677. if (ret < 0)
  678. goto fail;
  679. }
  680. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  681. if (!priv->msa_va) {
  682. icnss_pr_err("Invalid MSA address\n");
  683. ret = -EINVAL;
  684. goto fail;
  685. }
  686. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  687. if (ret < 0) {
  688. ignore_assert = true;
  689. goto fail;
  690. }
  691. ret = wlfw_msa_ready_send_sync_msg(priv);
  692. if (ret < 0) {
  693. ignore_assert = true;
  694. goto fail;
  695. }
  696. }
  697. ret = wlfw_cap_send_sync_msg(priv);
  698. if (ret < 0) {
  699. ignore_assert = true;
  700. goto fail;
  701. }
  702. ret = icnss_hw_power_on(priv);
  703. if (ret)
  704. goto fail;
  705. if (priv->device_id == WCN6750_DEVICE_ID) {
  706. ret = wlfw_device_info_send_msg(priv);
  707. if (ret < 0) {
  708. ignore_assert = true;
  709. goto device_info_failure;
  710. }
  711. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  712. priv->mem_base_pa,
  713. priv->mem_base_size);
  714. if (!priv->mem_base_va) {
  715. icnss_pr_err("Ioremap failed for bar address\n");
  716. goto device_info_failure;
  717. }
  718. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  719. &priv->mem_base_pa,
  720. priv->mem_base_va);
  721. if (priv->mhi_state_info_pa)
  722. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  723. priv->mhi_state_info_pa,
  724. PAGE_SIZE);
  725. if (!priv->mhi_state_info_va)
  726. icnss_pr_err("Ioremap failed for MHI info address\n");
  727. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  728. &priv->mhi_state_info_pa,
  729. priv->mhi_state_info_va);
  730. }
  731. if (priv->bdf_download_support) {
  732. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  733. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  734. priv->ctrl_params.bdf_type);
  735. if (ret < 0)
  736. goto device_info_failure;
  737. }
  738. if (priv->device_id == WCN6750_DEVICE_ID) {
  739. if (!priv->fw_soc_wake_ack_irq)
  740. register_soc_wake_notif(&priv->pdev->dev);
  741. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  742. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  743. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  744. }
  745. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  746. if (priv->bdf_download_support) {
  747. ret = wlfw_cal_report_req(priv);
  748. if (ret < 0)
  749. goto device_info_failure;
  750. }
  751. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  752. dynamic_feature_mask);
  753. }
  754. if (!priv->fw_error_fatal_irq)
  755. register_fw_error_notifications(&priv->pdev->dev);
  756. if (!priv->fw_early_crash_irq)
  757. register_early_crash_notifications(&priv->pdev->dev);
  758. return ret;
  759. device_info_failure:
  760. icnss_hw_power_off(priv);
  761. fail:
  762. ICNSS_ASSERT(ignore_assert);
  763. qmi_registered:
  764. return ret;
  765. }
  766. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  767. {
  768. if (!priv)
  769. return -ENODEV;
  770. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  771. icnss_clear_server(priv);
  772. return 0;
  773. }
  774. static int icnss_call_driver_probe(struct icnss_priv *priv)
  775. {
  776. int ret = 0;
  777. int probe_cnt = 0;
  778. if (!priv->ops || !priv->ops->probe)
  779. return 0;
  780. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  781. return -EINVAL;
  782. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  783. icnss_hw_power_on(priv);
  784. icnss_block_shutdown(true);
  785. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  786. ret = priv->ops->probe(&priv->pdev->dev);
  787. probe_cnt++;
  788. if (ret != -EPROBE_DEFER)
  789. break;
  790. }
  791. if (ret < 0) {
  792. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  793. ret, priv->state, probe_cnt);
  794. icnss_block_shutdown(false);
  795. goto out;
  796. }
  797. icnss_block_shutdown(false);
  798. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  799. return 0;
  800. out:
  801. icnss_hw_power_off(priv);
  802. return ret;
  803. }
  804. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  805. {
  806. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  807. goto out;
  808. if (!priv->ops || !priv->ops->shutdown)
  809. goto out;
  810. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  811. goto out;
  812. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  813. priv->ops->shutdown(&priv->pdev->dev);
  814. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  815. out:
  816. return 0;
  817. }
  818. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  819. {
  820. int ret = 0;
  821. icnss_pm_relax(priv);
  822. icnss_call_driver_shutdown(priv);
  823. clear_bit(ICNSS_PDR, &priv->state);
  824. clear_bit(ICNSS_REJUVENATE, &priv->state);
  825. clear_bit(ICNSS_PD_RESTART, &priv->state);
  826. priv->early_crash_ind = false;
  827. priv->is_ssr = false;
  828. if (!priv->ops || !priv->ops->reinit)
  829. goto out;
  830. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  831. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  832. priv->state);
  833. goto out;
  834. }
  835. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  836. goto call_probe;
  837. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  838. icnss_hw_power_on(priv);
  839. icnss_block_shutdown(true);
  840. ret = priv->ops->reinit(&priv->pdev->dev);
  841. if (ret < 0) {
  842. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  843. ret, priv->state);
  844. if (!priv->allow_recursive_recovery)
  845. ICNSS_ASSERT(false);
  846. icnss_block_shutdown(false);
  847. goto out_power_off;
  848. }
  849. icnss_block_shutdown(false);
  850. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  851. return 0;
  852. call_probe:
  853. return icnss_call_driver_probe(priv);
  854. out_power_off:
  855. icnss_hw_power_off(priv);
  856. out:
  857. return ret;
  858. }
  859. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  860. {
  861. int ret = 0;
  862. if (!priv)
  863. return -ENODEV;
  864. set_bit(ICNSS_FW_READY, &priv->state);
  865. clear_bit(ICNSS_MODE_ON, &priv->state);
  866. atomic_set(&priv->soc_wake_ref_count, 0);
  867. if (priv->device_id == WCN6750_DEVICE_ID)
  868. icnss_free_qdss_mem(priv);
  869. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  870. icnss_hw_power_off(priv);
  871. if (!priv->pdev) {
  872. icnss_pr_err("Device is not ready\n");
  873. ret = -ENODEV;
  874. goto out;
  875. }
  876. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  877. ret = icnss_pd_restart_complete(priv);
  878. } else {
  879. if (priv->wpss_supported)
  880. icnss_setup_dms_mac(priv);
  881. ret = icnss_call_driver_probe(priv);
  882. }
  883. icnss_vreg_unvote(priv);
  884. out:
  885. return ret;
  886. }
  887. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  888. {
  889. int ret = 0;
  890. if (!priv)
  891. return -ENODEV;
  892. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  893. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  894. icnss_pr_info("Failed to download qdss configuration file");
  895. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state))
  896. ret = wlfw_wlan_mode_send_sync_msg(priv,
  897. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  898. else
  899. icnss_driver_event_fw_ready_ind(priv, NULL);
  900. return ret;
  901. }
  902. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  903. {
  904. struct platform_device *pdev = priv->pdev;
  905. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  906. int i, j;
  907. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  908. if (!qdss_mem[i].va && qdss_mem[i].size) {
  909. qdss_mem[i].va =
  910. dma_alloc_coherent(&pdev->dev,
  911. qdss_mem[i].size,
  912. &qdss_mem[i].pa,
  913. GFP_KERNEL);
  914. if (!qdss_mem[i].va) {
  915. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  916. qdss_mem[i].size,
  917. qdss_mem[i].type, i);
  918. break;
  919. }
  920. }
  921. }
  922. /* Best-effort allocation for QDSS trace */
  923. if (i < priv->qdss_mem_seg_len) {
  924. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  925. qdss_mem[j].type = 0;
  926. qdss_mem[j].size = 0;
  927. }
  928. priv->qdss_mem_seg_len = i;
  929. }
  930. return 0;
  931. }
  932. void icnss_free_qdss_mem(struct icnss_priv *priv)
  933. {
  934. struct platform_device *pdev = priv->pdev;
  935. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  936. int i;
  937. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  938. if (qdss_mem[i].va && qdss_mem[i].size) {
  939. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  940. &qdss_mem[i].pa, qdss_mem[i].size,
  941. qdss_mem[i].type);
  942. dma_free_coherent(&pdev->dev,
  943. qdss_mem[i].size, qdss_mem[i].va,
  944. qdss_mem[i].pa);
  945. qdss_mem[i].va = NULL;
  946. qdss_mem[i].pa = 0;
  947. qdss_mem[i].size = 0;
  948. qdss_mem[i].type = 0;
  949. }
  950. }
  951. priv->qdss_mem_seg_len = 0;
  952. }
  953. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  954. {
  955. int ret = 0;
  956. ret = icnss_alloc_qdss_mem(priv);
  957. if (ret < 0)
  958. return ret;
  959. return wlfw_qdss_trace_mem_info_send_sync(priv);
  960. }
  961. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  962. u64 pa, u32 size, int *seg_id)
  963. {
  964. int i = 0;
  965. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  966. u64 offset = 0;
  967. void *va = NULL;
  968. u64 local_pa;
  969. u32 local_size;
  970. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  971. local_pa = (u64)qdss_mem[i].pa;
  972. local_size = (u32)qdss_mem[i].size;
  973. if (pa == local_pa && size <= local_size) {
  974. va = qdss_mem[i].va;
  975. break;
  976. }
  977. if (pa > local_pa &&
  978. pa < local_pa + local_size &&
  979. pa + size <= local_pa + local_size) {
  980. offset = pa - local_pa;
  981. va = qdss_mem[i].va + offset;
  982. break;
  983. }
  984. }
  985. *seg_id = i;
  986. return va;
  987. }
  988. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  989. void *data)
  990. {
  991. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  992. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  993. int ret = 0;
  994. int i;
  995. void *va = NULL;
  996. u64 pa;
  997. u32 size;
  998. int seg_id = 0;
  999. if (!priv->qdss_mem_seg_len) {
  1000. icnss_pr_err("Memory for QDSS trace is not available\n");
  1001. return -ENOMEM;
  1002. }
  1003. if (event_data->mem_seg_len == 0) {
  1004. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1005. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1006. ICNSS_GENL_MSG_TYPE_QDSS,
  1007. event_data->file_name,
  1008. qdss_mem[i].size);
  1009. if (ret < 0) {
  1010. icnss_pr_err("Fail to save QDSS data: %d\n",
  1011. ret);
  1012. break;
  1013. }
  1014. }
  1015. } else {
  1016. for (i = 0; i < event_data->mem_seg_len; i++) {
  1017. pa = event_data->mem_seg[i].addr;
  1018. size = event_data->mem_seg[i].size;
  1019. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1020. size, &seg_id);
  1021. if (!va) {
  1022. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1023. &pa);
  1024. ret = -EINVAL;
  1025. break;
  1026. }
  1027. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1028. event_data->file_name, size);
  1029. if (ret < 0) {
  1030. icnss_pr_err("Fail to save QDSS data: %d\n",
  1031. ret);
  1032. break;
  1033. }
  1034. }
  1035. }
  1036. kfree(data);
  1037. return ret;
  1038. }
  1039. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1040. {
  1041. int dec, c = atomic_read(v);
  1042. do {
  1043. dec = c - 1;
  1044. if (unlikely(dec < 1))
  1045. break;
  1046. } while (!atomic_try_cmpxchg(v, &c, dec));
  1047. return dec;
  1048. }
  1049. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1050. void *data)
  1051. {
  1052. int ret = 0;
  1053. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1054. if (!priv)
  1055. return -ENODEV;
  1056. if (!data)
  1057. return -EINVAL;
  1058. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1059. event_data->total_size);
  1060. kfree(data);
  1061. return ret;
  1062. }
  1063. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1064. {
  1065. int ret = 0;
  1066. if (!priv)
  1067. return -ENODEV;
  1068. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1069. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1070. atomic_read(&priv->soc_wake_ref_count));
  1071. return 0;
  1072. }
  1073. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1074. ICNSS_SMP2P_OUT_SOC_WAKE);
  1075. if (!ret)
  1076. atomic_inc(&priv->soc_wake_ref_count);
  1077. return ret;
  1078. }
  1079. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1080. {
  1081. int ret = 0;
  1082. if (!priv)
  1083. return -ENODEV;
  1084. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1085. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1086. priv->soc_wake_ref_count);
  1087. return 0;
  1088. }
  1089. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1090. ICNSS_SMP2P_OUT_SOC_WAKE);
  1091. return ret;
  1092. }
  1093. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1094. void *data)
  1095. {
  1096. int ret = 0;
  1097. int probe_cnt = 0;
  1098. if (priv->ops)
  1099. return -EEXIST;
  1100. priv->ops = data;
  1101. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1102. set_bit(ICNSS_FW_READY, &priv->state);
  1103. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1104. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1105. priv->state);
  1106. return -ENODEV;
  1107. }
  1108. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1109. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1110. priv->state);
  1111. goto out;
  1112. }
  1113. ret = icnss_hw_power_on(priv);
  1114. if (ret)
  1115. goto out;
  1116. icnss_block_shutdown(true);
  1117. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1118. ret = priv->ops->probe(&priv->pdev->dev);
  1119. probe_cnt++;
  1120. if (ret != -EPROBE_DEFER)
  1121. break;
  1122. }
  1123. if (ret) {
  1124. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1125. ret, priv->state, probe_cnt);
  1126. icnss_block_shutdown(false);
  1127. goto power_off;
  1128. }
  1129. icnss_block_shutdown(false);
  1130. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1131. return 0;
  1132. power_off:
  1133. icnss_hw_power_off(priv);
  1134. out:
  1135. return ret;
  1136. }
  1137. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1138. void *data)
  1139. {
  1140. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1141. priv->ops = NULL;
  1142. goto out;
  1143. }
  1144. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1145. icnss_block_shutdown(true);
  1146. if (priv->ops)
  1147. priv->ops->remove(&priv->pdev->dev);
  1148. icnss_block_shutdown(false);
  1149. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1150. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1151. priv->ops = NULL;
  1152. icnss_hw_power_off(priv);
  1153. out:
  1154. return 0;
  1155. }
  1156. static int icnss_fw_crashed(struct icnss_priv *priv,
  1157. struct icnss_event_pd_service_down_data *event_data)
  1158. {
  1159. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1160. set_bit(ICNSS_PD_RESTART, &priv->state);
  1161. clear_bit(ICNSS_FW_READY, &priv->state);
  1162. icnss_pm_stay_awake(priv);
  1163. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1164. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1165. if (event_data && event_data->fw_rejuvenate)
  1166. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1167. return 0;
  1168. }
  1169. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1170. struct icnss_uevent_hang_data *hang_data)
  1171. {
  1172. if (!priv->hang_event_data_va)
  1173. return -EINVAL;
  1174. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1175. priv->hang_event_data_len,
  1176. GFP_ATOMIC);
  1177. if (!priv->hang_event_data)
  1178. return -ENOMEM;
  1179. // Update the hang event params
  1180. hang_data->hang_event_data = priv->hang_event_data;
  1181. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1182. return 0;
  1183. }
  1184. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1185. {
  1186. struct icnss_uevent_hang_data hang_data = {0};
  1187. int ret = 0xFF;
  1188. if (priv->early_crash_ind) {
  1189. ret = icnss_update_hang_event_data(priv, &hang_data);
  1190. if (ret)
  1191. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1192. }
  1193. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1194. &hang_data);
  1195. if (!ret) {
  1196. kfree(priv->hang_event_data);
  1197. priv->hang_event_data = NULL;
  1198. }
  1199. return 0;
  1200. }
  1201. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1202. void *data)
  1203. {
  1204. struct icnss_event_pd_service_down_data *event_data = data;
  1205. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1206. icnss_ignore_fw_timeout(false);
  1207. goto out;
  1208. }
  1209. if (priv->force_err_fatal)
  1210. ICNSS_ASSERT(0);
  1211. if (priv->device_id == WCN6750_DEVICE_ID) {
  1212. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1213. ICNSS_SMP2P_OUT_POWER_SAVE);
  1214. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1215. ICNSS_SMP2P_OUT_SOC_WAKE);
  1216. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1217. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1218. }
  1219. icnss_send_hang_event_data(priv);
  1220. if (priv->early_crash_ind) {
  1221. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1222. event_data->crashed, priv->state);
  1223. goto out;
  1224. }
  1225. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1226. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1227. event_data->crashed, priv->state);
  1228. if (!priv->allow_recursive_recovery)
  1229. ICNSS_ASSERT(0);
  1230. goto out;
  1231. }
  1232. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1233. icnss_fw_crashed(priv, event_data);
  1234. out:
  1235. kfree(data);
  1236. return 0;
  1237. }
  1238. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1239. void *data)
  1240. {
  1241. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1242. icnss_ignore_fw_timeout(false);
  1243. goto out;
  1244. }
  1245. priv->early_crash_ind = true;
  1246. icnss_fw_crashed(priv, NULL);
  1247. out:
  1248. kfree(data);
  1249. return 0;
  1250. }
  1251. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1252. void *data)
  1253. {
  1254. int ret = 0;
  1255. if (!priv->ops || !priv->ops->idle_shutdown)
  1256. return 0;
  1257. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1258. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1259. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1260. ret = -EBUSY;
  1261. } else {
  1262. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1263. priv->state);
  1264. icnss_block_shutdown(true);
  1265. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1266. icnss_block_shutdown(false);
  1267. }
  1268. return ret;
  1269. }
  1270. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1271. void *data)
  1272. {
  1273. int ret = 0;
  1274. if (!priv->ops || !priv->ops->idle_restart)
  1275. return 0;
  1276. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1277. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1278. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1279. ret = -EBUSY;
  1280. } else {
  1281. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1282. priv->state);
  1283. icnss_block_shutdown(true);
  1284. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1285. icnss_block_shutdown(false);
  1286. }
  1287. return ret;
  1288. }
  1289. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1290. {
  1291. icnss_free_qdss_mem(priv);
  1292. return 0;
  1293. }
  1294. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1295. void *data)
  1296. {
  1297. struct icnss_m3_upload_segments_req_data *event_data = data;
  1298. struct qcom_dump_segment segment;
  1299. int i, status = 0, ret = 0;
  1300. struct list_head head;
  1301. if (!dump_enabled()) {
  1302. icnss_pr_info("Dump collection is not enabled\n");
  1303. return ret;
  1304. }
  1305. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1306. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1307. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1308. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1309. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1310. return ret;
  1311. INIT_LIST_HEAD(&head);
  1312. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1313. memset(&segment, 0, sizeof(segment));
  1314. segment.va = devm_ioremap(&priv->pdev->dev,
  1315. event_data->m3_segment[i].addr,
  1316. event_data->m3_segment[i].size);
  1317. if (!segment.va) {
  1318. icnss_pr_err("Failed to ioremap M3 Dump region");
  1319. ret = -ENOMEM;
  1320. goto send_resp;
  1321. }
  1322. segment.size = event_data->m3_segment[i].size;
  1323. list_add(&segment.node, &head);
  1324. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1325. event_data->m3_segment[i].name);
  1326. switch (event_data->m3_segment[i].type) {
  1327. case QMI_M3_SEGMENT_PHYAREG_V01:
  1328. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1329. break;
  1330. case QMI_M3_SEGMENT_PHYDBG_V01:
  1331. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1332. break;
  1333. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1334. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1335. break;
  1336. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1337. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1338. break;
  1339. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1340. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1341. break;
  1342. default:
  1343. icnss_pr_err("Invalid Segment type: %d",
  1344. event_data->m3_segment[i].type);
  1345. }
  1346. if (ret) {
  1347. status = ret;
  1348. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1349. event_data->m3_segment[i].name, ret);
  1350. }
  1351. list_del(&segment.node);
  1352. }
  1353. send_resp:
  1354. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1355. status);
  1356. return ret;
  1357. }
  1358. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1359. {
  1360. int ret = 0;
  1361. struct icnss_subsys_restart_level_data *event_data = data;
  1362. if (!priv)
  1363. return -ENODEV;
  1364. if (!data)
  1365. return -EINVAL;
  1366. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1367. kfree(data);
  1368. return ret;
  1369. }
  1370. static void icnss_driver_event_work(struct work_struct *work)
  1371. {
  1372. struct icnss_priv *priv =
  1373. container_of(work, struct icnss_priv, event_work);
  1374. struct icnss_driver_event *event;
  1375. unsigned long flags;
  1376. int ret;
  1377. icnss_pm_stay_awake(priv);
  1378. spin_lock_irqsave(&priv->event_lock, flags);
  1379. while (!list_empty(&priv->event_list)) {
  1380. event = list_first_entry(&priv->event_list,
  1381. struct icnss_driver_event, list);
  1382. list_del(&event->list);
  1383. spin_unlock_irqrestore(&priv->event_lock, flags);
  1384. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1385. icnss_driver_event_to_str(event->type),
  1386. event->sync ? "-sync" : "", event->type,
  1387. priv->state);
  1388. switch (event->type) {
  1389. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1390. ret = icnss_driver_event_server_arrive(priv,
  1391. event->data);
  1392. break;
  1393. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1394. ret = icnss_driver_event_server_exit(priv);
  1395. break;
  1396. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1397. ret = icnss_driver_event_fw_ready_ind(priv,
  1398. event->data);
  1399. break;
  1400. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1401. ret = icnss_driver_event_register_driver(priv,
  1402. event->data);
  1403. break;
  1404. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1405. ret = icnss_driver_event_unregister_driver(priv,
  1406. event->data);
  1407. break;
  1408. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1409. ret = icnss_driver_event_pd_service_down(priv,
  1410. event->data);
  1411. break;
  1412. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1413. ret = icnss_driver_event_early_crash_ind(priv,
  1414. event->data);
  1415. break;
  1416. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1417. ret = icnss_driver_event_idle_shutdown(priv,
  1418. event->data);
  1419. break;
  1420. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1421. ret = icnss_driver_event_idle_restart(priv,
  1422. event->data);
  1423. break;
  1424. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1425. ret = icnss_driver_event_fw_init_done(priv,
  1426. event->data);
  1427. break;
  1428. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1429. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1430. break;
  1431. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1432. ret = icnss_qdss_trace_save_hdlr(priv,
  1433. event->data);
  1434. break;
  1435. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1436. ret = icnss_qdss_trace_free_hdlr(priv);
  1437. break;
  1438. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1439. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1440. break;
  1441. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1442. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1443. event->data);
  1444. break;
  1445. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1446. ret = icnss_subsys_restart_level(priv, event->data);
  1447. break;
  1448. default:
  1449. icnss_pr_err("Invalid Event type: %d", event->type);
  1450. kfree(event);
  1451. continue;
  1452. }
  1453. priv->stats.events[event->type].processed++;
  1454. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1455. icnss_driver_event_to_str(event->type),
  1456. event->sync ? "-sync" : "", event->type, ret,
  1457. priv->state);
  1458. spin_lock_irqsave(&priv->event_lock, flags);
  1459. if (event->sync) {
  1460. event->ret = ret;
  1461. complete(&event->complete);
  1462. continue;
  1463. }
  1464. spin_unlock_irqrestore(&priv->event_lock, flags);
  1465. kfree(event);
  1466. spin_lock_irqsave(&priv->event_lock, flags);
  1467. }
  1468. spin_unlock_irqrestore(&priv->event_lock, flags);
  1469. icnss_pm_relax(priv);
  1470. }
  1471. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1472. {
  1473. struct icnss_priv *priv =
  1474. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1475. struct icnss_soc_wake_event *event;
  1476. unsigned long flags;
  1477. int ret;
  1478. icnss_pm_stay_awake(priv);
  1479. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1480. while (!list_empty(&priv->soc_wake_msg_list)) {
  1481. event = list_first_entry(&priv->soc_wake_msg_list,
  1482. struct icnss_soc_wake_event, list);
  1483. list_del(&event->list);
  1484. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1485. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1486. icnss_soc_wake_event_to_str(event->type),
  1487. event->sync ? "-sync" : "", event->type,
  1488. priv->state);
  1489. switch (event->type) {
  1490. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1491. ret = icnss_event_soc_wake_request(priv,
  1492. event->data);
  1493. break;
  1494. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1495. ret = icnss_event_soc_wake_release(priv,
  1496. event->data);
  1497. break;
  1498. default:
  1499. icnss_pr_err("Invalid Event type: %d", event->type);
  1500. kfree(event);
  1501. continue;
  1502. }
  1503. priv->stats.soc_wake_events[event->type].processed++;
  1504. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1505. icnss_soc_wake_event_to_str(event->type),
  1506. event->sync ? "-sync" : "", event->type, ret,
  1507. priv->state);
  1508. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1509. if (event->sync) {
  1510. event->ret = ret;
  1511. complete(&event->complete);
  1512. continue;
  1513. }
  1514. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1515. kfree(event);
  1516. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1517. }
  1518. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1519. icnss_pm_relax(priv);
  1520. }
  1521. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1522. {
  1523. int ret = 0;
  1524. struct qcom_dump_segment segment;
  1525. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1526. struct list_head head;
  1527. if (!dump_enabled()) {
  1528. icnss_pr_info("Dump collection is not enabled\n");
  1529. return ret;
  1530. }
  1531. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1532. return ret;
  1533. INIT_LIST_HEAD(&head);
  1534. memset(&segment, 0, sizeof(segment));
  1535. segment.va = priv->msa_va;
  1536. segment.size = priv->msa_mem_size;
  1537. list_add(&segment.node, &head);
  1538. if (!msa0_dump_dev->dev) {
  1539. icnss_pr_err("Created Dump Device not found\n");
  1540. return 0;
  1541. }
  1542. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1543. if (ret) {
  1544. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1545. return ret;
  1546. }
  1547. list_del(&segment.node);
  1548. return ret;
  1549. }
  1550. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1551. void *data)
  1552. {
  1553. struct qcom_ssr_notify_data *notif = data;
  1554. int ret = 0;
  1555. if (!notif->crashed) {
  1556. if (atomic_read(&priv->is_shutdown)) {
  1557. atomic_set(&priv->is_shutdown, false);
  1558. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1559. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1560. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1561. clear_bit(ICNSS_FW_READY, &priv->state);
  1562. icnss_driver_event_post(priv,
  1563. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1564. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1565. NULL);
  1566. }
  1567. }
  1568. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1569. if (!wait_for_completion_timeout(
  1570. &priv->unblock_shutdown,
  1571. msecs_to_jiffies(PROBE_TIMEOUT)))
  1572. icnss_pr_err("modem block shutdown timeout\n");
  1573. }
  1574. ret = wlfw_send_modem_shutdown_msg(priv);
  1575. if (ret < 0)
  1576. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1577. ret);
  1578. }
  1579. }
  1580. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1581. {
  1582. switch (code) {
  1583. case QCOM_SSR_BEFORE_POWERUP:
  1584. return "BEFORE_POWERUP";
  1585. case QCOM_SSR_AFTER_POWERUP:
  1586. return "AFTER_POWERUP";
  1587. case QCOM_SSR_BEFORE_SHUTDOWN:
  1588. return "BEFORE_SHUTDOWN";
  1589. case QCOM_SSR_AFTER_SHUTDOWN:
  1590. return "AFTER_SHUTDOWN";
  1591. default:
  1592. return "UNKNOWN";
  1593. }
  1594. };
  1595. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1596. unsigned long code,
  1597. void *data)
  1598. {
  1599. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1600. wpss_early_ssr_nb);
  1601. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1602. icnss_qcom_ssr_notify_state_to_str(code), code);
  1603. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1604. set_bit(ICNSS_FW_DOWN, &priv->state);
  1605. icnss_ignore_fw_timeout(true);
  1606. }
  1607. return NOTIFY_DONE;
  1608. }
  1609. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1610. unsigned long code,
  1611. void *data)
  1612. {
  1613. struct icnss_event_pd_service_down_data *event_data;
  1614. struct qcom_ssr_notify_data *notif = data;
  1615. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1616. wpss_ssr_nb);
  1617. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1618. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1619. icnss_qcom_ssr_notify_state_to_str(code), code);
  1620. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1621. icnss_pr_info("Collecting msa0 segment dump\n");
  1622. icnss_msa0_ramdump(priv);
  1623. goto out;
  1624. }
  1625. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1626. goto out;
  1627. priv->is_ssr = true;
  1628. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1629. priv->state, notif->crashed);
  1630. set_bit(ICNSS_FW_DOWN, &priv->state);
  1631. if (notif->crashed)
  1632. priv->stats.recovery.root_pd_crash++;
  1633. else
  1634. priv->stats.recovery.root_pd_shutdown++;
  1635. icnss_ignore_fw_timeout(true);
  1636. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1637. if (event_data == NULL)
  1638. return notifier_from_errno(-ENOMEM);
  1639. event_data->crashed = notif->crashed;
  1640. fw_down_data.crashed = !!notif->crashed;
  1641. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1642. clear_bit(ICNSS_FW_READY, &priv->state);
  1643. fw_down_data.crashed = !!notif->crashed;
  1644. icnss_call_driver_uevent(priv,
  1645. ICNSS_UEVENT_FW_DOWN,
  1646. &fw_down_data);
  1647. }
  1648. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1649. ICNSS_EVENT_SYNC, event_data);
  1650. out:
  1651. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1652. return NOTIFY_OK;
  1653. }
  1654. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1655. unsigned long code,
  1656. void *data)
  1657. {
  1658. struct icnss_event_pd_service_down_data *event_data;
  1659. struct qcom_ssr_notify_data *notif = data;
  1660. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1661. modem_ssr_nb);
  1662. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1663. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1664. icnss_qcom_ssr_notify_state_to_str(code), code);
  1665. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1666. icnss_pr_info("Collecting msa0 segment dump\n");
  1667. icnss_msa0_ramdump(priv);
  1668. goto out;
  1669. }
  1670. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1671. goto out;
  1672. priv->is_ssr = true;
  1673. if (notif->crashed) {
  1674. priv->stats.recovery.root_pd_crash++;
  1675. priv->root_pd_shutdown = false;
  1676. } else {
  1677. priv->stats.recovery.root_pd_shutdown++;
  1678. priv->root_pd_shutdown = true;
  1679. }
  1680. icnss_update_state_send_modem_shutdown(priv, data);
  1681. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1682. set_bit(ICNSS_FW_DOWN, &priv->state);
  1683. icnss_ignore_fw_timeout(true);
  1684. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1685. clear_bit(ICNSS_FW_READY, &priv->state);
  1686. fw_down_data.crashed = !!notif->crashed;
  1687. icnss_call_driver_uevent(priv,
  1688. ICNSS_UEVENT_FW_DOWN,
  1689. &fw_down_data);
  1690. }
  1691. goto out;
  1692. }
  1693. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1694. priv->state, notif->crashed);
  1695. set_bit(ICNSS_FW_DOWN, &priv->state);
  1696. icnss_ignore_fw_timeout(true);
  1697. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1698. if (event_data == NULL)
  1699. return notifier_from_errno(-ENOMEM);
  1700. event_data->crashed = notif->crashed;
  1701. fw_down_data.crashed = !!notif->crashed;
  1702. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1703. clear_bit(ICNSS_FW_READY, &priv->state);
  1704. fw_down_data.crashed = !!notif->crashed;
  1705. icnss_call_driver_uevent(priv,
  1706. ICNSS_UEVENT_FW_DOWN,
  1707. &fw_down_data);
  1708. }
  1709. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1710. ICNSS_EVENT_SYNC, event_data);
  1711. out:
  1712. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1713. return NOTIFY_OK;
  1714. }
  1715. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1716. {
  1717. int ret = 0;
  1718. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1719. priv->wpss_early_notify_handler =
  1720. qcom_register_early_ssr_notifier("wpss",
  1721. &priv->wpss_early_ssr_nb);
  1722. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1723. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1724. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1725. }
  1726. return ret;
  1727. }
  1728. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1729. {
  1730. int ret = 0;
  1731. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1732. /*
  1733. * Assign priority of icnss wpss notifier callback over IPA
  1734. * modem notifier callback which is 0
  1735. */
  1736. priv->wpss_ssr_nb.priority = 1;
  1737. priv->wpss_notify_handler =
  1738. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1739. if (IS_ERR(priv->wpss_notify_handler)) {
  1740. ret = PTR_ERR(priv->wpss_notify_handler);
  1741. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1742. }
  1743. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1744. return ret;
  1745. }
  1746. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1747. {
  1748. int ret = 0;
  1749. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1750. /*
  1751. * Assign priority of icnss modem notifier callback over IPA
  1752. * modem notifier callback which is 0
  1753. */
  1754. priv->modem_ssr_nb.priority = 1;
  1755. priv->modem_notify_handler =
  1756. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  1757. if (IS_ERR(priv->modem_notify_handler)) {
  1758. ret = PTR_ERR(priv->modem_notify_handler);
  1759. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1760. }
  1761. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1762. return ret;
  1763. }
  1764. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1765. {
  1766. if (IS_ERR(priv->wpss_early_notify_handler))
  1767. return;
  1768. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1769. &priv->wpss_early_ssr_nb);
  1770. priv->wpss_early_notify_handler = NULL;
  1771. }
  1772. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1773. {
  1774. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1775. return 0;
  1776. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1777. &priv->wpss_ssr_nb);
  1778. priv->wpss_notify_handler = NULL;
  1779. return 0;
  1780. }
  1781. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1782. {
  1783. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1784. return 0;
  1785. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1786. &priv->modem_ssr_nb);
  1787. priv->modem_notify_handler = NULL;
  1788. return 0;
  1789. }
  1790. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1791. {
  1792. struct icnss_priv *priv = priv_cb;
  1793. struct icnss_event_pd_service_down_data *event_data;
  1794. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1795. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1796. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1797. state, priv->state);
  1798. switch (state) {
  1799. case SERVREG_SERVICE_STATE_DOWN:
  1800. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1801. if (!event_data)
  1802. return;
  1803. event_data->crashed = true;
  1804. if (!priv->is_ssr) {
  1805. set_bit(ICNSS_PDR, &penv->state);
  1806. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1807. cause = ICNSS_HOST_ERROR;
  1808. priv->stats.recovery.pdr_host_error++;
  1809. } else {
  1810. cause = ICNSS_FW_CRASH;
  1811. priv->stats.recovery.pdr_fw_crash++;
  1812. }
  1813. } else if (priv->root_pd_shutdown) {
  1814. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1815. event_data->crashed = false;
  1816. }
  1817. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  1818. priv->state, icnss_pdr_cause[cause]);
  1819. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1820. set_bit(ICNSS_FW_DOWN, &priv->state);
  1821. icnss_ignore_fw_timeout(true);
  1822. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1823. clear_bit(ICNSS_FW_READY, &priv->state);
  1824. fw_down_data.crashed = event_data->crashed;
  1825. icnss_call_driver_uevent(priv,
  1826. ICNSS_UEVENT_FW_DOWN,
  1827. &fw_down_data);
  1828. }
  1829. }
  1830. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  1831. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1832. ICNSS_EVENT_SYNC, event_data);
  1833. break;
  1834. case SERVREG_SERVICE_STATE_UP:
  1835. clear_bit(ICNSS_FW_DOWN, &priv->state);
  1836. break;
  1837. default:
  1838. break;
  1839. }
  1840. return;
  1841. }
  1842. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  1843. {
  1844. struct pdr_handle *handle = NULL;
  1845. struct pdr_service *service = NULL;
  1846. int err = 0;
  1847. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  1848. if (IS_ERR_OR_NULL(handle)) {
  1849. err = PTR_ERR(handle);
  1850. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  1851. goto out;
  1852. }
  1853. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  1854. if (IS_ERR_OR_NULL(service)) {
  1855. err = PTR_ERR(service);
  1856. icnss_pr_err("Failed to add lookup, err %d", err);
  1857. goto out;
  1858. }
  1859. priv->pdr_handle = handle;
  1860. priv->pdr_service = service;
  1861. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  1862. icnss_pr_info("PDR registration happened");
  1863. out:
  1864. return err;
  1865. }
  1866. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  1867. {
  1868. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  1869. return;
  1870. pdr_handle_release(priv->pdr_handle);
  1871. }
  1872. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  1873. {
  1874. int ret = 0;
  1875. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  1876. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  1877. ret = PTR_ERR(priv->icnss_ramdump_class);
  1878. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  1879. return ret;
  1880. }
  1881. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  1882. ICNSS_RAMDUMP_NAME);
  1883. if (ret < 0) {
  1884. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  1885. goto fail_alloc_major;
  1886. }
  1887. return 0;
  1888. fail_alloc_major:
  1889. class_destroy(priv->icnss_ramdump_class);
  1890. return ret;
  1891. }
  1892. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  1893. {
  1894. int ret = 0;
  1895. struct icnss_ramdump_info *ramdump_info;
  1896. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  1897. if (!ramdump_info)
  1898. return ERR_PTR(-ENOMEM);
  1899. if (!dev_name) {
  1900. icnss_pr_err("%s: Invalid device name.\n", __func__);
  1901. return NULL;
  1902. }
  1903. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  1904. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  1905. if (ramdump_info->minor < 0) {
  1906. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  1907. ramdump_info->minor);
  1908. ret = -ENODEV;
  1909. goto fail_out_of_minors;
  1910. }
  1911. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  1912. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  1913. ramdump_info->minor),
  1914. ramdump_info, ramdump_info->name);
  1915. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  1916. ret = PTR_ERR(ramdump_info->dev);
  1917. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  1918. ramdump_info->name, ret);
  1919. goto fail_device_create;
  1920. }
  1921. return (void *)ramdump_info;
  1922. fail_device_create:
  1923. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  1924. fail_out_of_minors:
  1925. kfree(ramdump_info);
  1926. return ERR_PTR(ret);
  1927. }
  1928. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  1929. {
  1930. int ret = 0;
  1931. if (!priv || !priv->pdev) {
  1932. icnss_pr_err("Platform priv or pdev is NULL\n");
  1933. return -EINVAL;
  1934. }
  1935. ret = icnss_ramdump_devnode_init(priv);
  1936. if (ret)
  1937. return ret;
  1938. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  1939. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  1940. icnss_pr_err("Failed to create msa0 dump device!");
  1941. return -ENOMEM;
  1942. }
  1943. if (priv->device_id == WCN6750_DEVICE_ID) {
  1944. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  1945. ICNSS_M3_SEGMENT(
  1946. ICNSS_M3_SEGMENT_PHYAREG));
  1947. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1948. !priv->m3_dump_phyareg->dev) {
  1949. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  1950. return -ENOMEM;
  1951. }
  1952. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  1953. ICNSS_M3_SEGMENT(
  1954. ICNSS_M3_SEGMENT_PHYA));
  1955. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1956. !priv->m3_dump_phydbg->dev) {
  1957. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  1958. return -ENOMEM;
  1959. }
  1960. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  1961. ICNSS_M3_SEGMENT(
  1962. ICNSS_M3_SEGMENT_WMACREG));
  1963. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1964. !priv->m3_dump_wmac0reg->dev) {
  1965. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  1966. return -ENOMEM;
  1967. }
  1968. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  1969. ICNSS_M3_SEGMENT(
  1970. ICNSS_M3_SEGMENT_WCSSDBG));
  1971. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1972. !priv->m3_dump_wcssdbg->dev) {
  1973. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  1974. return -ENOMEM;
  1975. }
  1976. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  1977. ICNSS_M3_SEGMENT(
  1978. ICNSS_M3_SEGMENT_PHYAM3));
  1979. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  1980. !priv->m3_dump_phyapdmem->dev) {
  1981. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  1982. return -ENOMEM;
  1983. }
  1984. }
  1985. return 0;
  1986. }
  1987. static int icnss_enable_recovery(struct icnss_priv *priv)
  1988. {
  1989. int ret;
  1990. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  1991. icnss_pr_dbg("Recovery disabled through module parameter\n");
  1992. return 0;
  1993. }
  1994. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  1995. icnss_pr_dbg("SSR disabled through module parameter\n");
  1996. goto enable_pdr;
  1997. }
  1998. ret = icnss_register_ramdump_devices(priv);
  1999. if (ret)
  2000. return ret;
  2001. if (priv->wpss_supported) {
  2002. icnss_wpss_early_ssr_register_notifier(priv);
  2003. icnss_wpss_ssr_register_notifier(priv);
  2004. return 0;
  2005. }
  2006. icnss_modem_ssr_register_notifier(priv);
  2007. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2008. icnss_pr_dbg("PDR disabled through module parameter\n");
  2009. return 0;
  2010. }
  2011. enable_pdr:
  2012. ret = icnss_pd_restart_enable(priv);
  2013. if (ret)
  2014. return ret;
  2015. return 0;
  2016. }
  2017. static int icnss_dev_id_match(struct icnss_priv *priv,
  2018. struct device_info *dev_info)
  2019. {
  2020. while (dev_info->device_id) {
  2021. if (priv->device_id == dev_info->device_id)
  2022. return 1;
  2023. dev_info++;
  2024. }
  2025. return 0;
  2026. }
  2027. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2028. unsigned long *thermal_state)
  2029. {
  2030. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2031. *thermal_state = icnss_tcdev->max_thermal_state;
  2032. return 0;
  2033. }
  2034. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2035. unsigned long *thermal_state)
  2036. {
  2037. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2038. *thermal_state = icnss_tcdev->curr_thermal_state;
  2039. return 0;
  2040. }
  2041. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2042. unsigned long thermal_state)
  2043. {
  2044. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2045. struct device *dev = &penv->pdev->dev;
  2046. int ret = 0;
  2047. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2048. return 0;
  2049. if (thermal_state > icnss_tcdev->max_thermal_state)
  2050. return -EINVAL;
  2051. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2052. thermal_state, icnss_tcdev->tcdev_id);
  2053. mutex_lock(&penv->tcdev_lock);
  2054. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2055. icnss_tcdev->tcdev_id);
  2056. if (!ret)
  2057. icnss_tcdev->curr_thermal_state = thermal_state;
  2058. mutex_unlock(&penv->tcdev_lock);
  2059. if (ret) {
  2060. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2061. ret, icnss_tcdev->tcdev_id);
  2062. return ret;
  2063. }
  2064. return 0;
  2065. }
  2066. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2067. .get_max_state = icnss_tcdev_get_max_state,
  2068. .get_cur_state = icnss_tcdev_get_cur_state,
  2069. .set_cur_state = icnss_tcdev_set_cur_state,
  2070. };
  2071. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2072. int tcdev_id)
  2073. {
  2074. struct icnss_priv *priv = dev_get_drvdata(dev);
  2075. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2076. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2077. struct device_node *dev_node;
  2078. int ret = 0;
  2079. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2080. if (!icnss_tcdev)
  2081. return -ENOMEM;
  2082. icnss_tcdev->tcdev_id = tcdev_id;
  2083. icnss_tcdev->max_thermal_state = max_state;
  2084. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2085. "qcom,icnss_cdev%d", tcdev_id);
  2086. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2087. if (!dev_node) {
  2088. icnss_pr_err("Failed to get cooling device node\n");
  2089. return -EINVAL;
  2090. }
  2091. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2092. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2093. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2094. dev_node,
  2095. cdev_node_name, icnss_tcdev,
  2096. &icnss_cooling_ops);
  2097. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2098. ret = PTR_ERR(icnss_tcdev->tcdev);
  2099. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2100. ret, icnss_tcdev->tcdev_id);
  2101. } else {
  2102. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2103. icnss_tcdev->tcdev_id);
  2104. list_add(&icnss_tcdev->tcdev_list,
  2105. &priv->icnss_tcdev_list);
  2106. }
  2107. } else {
  2108. icnss_pr_dbg("Cooling device registration not supported");
  2109. ret = -EOPNOTSUPP;
  2110. }
  2111. return ret;
  2112. }
  2113. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2114. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2115. {
  2116. struct icnss_priv *priv = dev_get_drvdata(dev);
  2117. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2118. while (!list_empty(&priv->icnss_tcdev_list)) {
  2119. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2120. struct icnss_thermal_cdev,
  2121. tcdev_list);
  2122. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2123. list_del(&icnss_tcdev->tcdev_list);
  2124. kfree(icnss_tcdev);
  2125. }
  2126. }
  2127. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2128. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2129. unsigned long *thermal_state,
  2130. int tcdev_id)
  2131. {
  2132. struct icnss_priv *priv = dev_get_drvdata(dev);
  2133. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2134. mutex_lock(&priv->tcdev_lock);
  2135. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2136. if (icnss_tcdev->tcdev_id != tcdev_id)
  2137. continue;
  2138. *thermal_state = icnss_tcdev->curr_thermal_state;
  2139. mutex_unlock(&priv->tcdev_lock);
  2140. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2141. icnss_tcdev->curr_thermal_state, tcdev_id);
  2142. return 0;
  2143. }
  2144. mutex_unlock(&priv->tcdev_lock);
  2145. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2146. return -EINVAL;
  2147. }
  2148. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2149. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2150. int cmd_len, void *cb_ctx,
  2151. int (*cb)(void *ctx, void *event, int event_len))
  2152. {
  2153. struct icnss_priv *priv = icnss_get_plat_priv();
  2154. int ret;
  2155. if (!priv)
  2156. return -ENODEV;
  2157. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2158. return -EINVAL;
  2159. priv->get_info_cb = cb;
  2160. priv->get_info_cb_ctx = cb_ctx;
  2161. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2162. if (ret) {
  2163. priv->get_info_cb = NULL;
  2164. priv->get_info_cb_ctx = NULL;
  2165. }
  2166. return ret;
  2167. }
  2168. EXPORT_SYMBOL(icnss_qmi_send);
  2169. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2170. struct module *owner, const char *mod_name)
  2171. {
  2172. int ret = 0;
  2173. struct icnss_priv *priv = icnss_get_plat_priv();
  2174. if (!priv || !priv->pdev) {
  2175. ret = -ENODEV;
  2176. goto out;
  2177. }
  2178. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2179. if (priv->ops) {
  2180. icnss_pr_err("Driver already registered\n");
  2181. ret = -EEXIST;
  2182. goto out;
  2183. }
  2184. if (!ops->dev_info) {
  2185. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2186. return -EINVAL;
  2187. }
  2188. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2189. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2190. ops->dev_info->name);
  2191. return -ENODEV;
  2192. }
  2193. if (!ops->probe || !ops->remove) {
  2194. ret = -EINVAL;
  2195. goto out;
  2196. }
  2197. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2198. 0, ops);
  2199. if (ret == -EINTR)
  2200. ret = 0;
  2201. out:
  2202. return ret;
  2203. }
  2204. EXPORT_SYMBOL(__icnss_register_driver);
  2205. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2206. {
  2207. int ret;
  2208. struct icnss_priv *priv = icnss_get_plat_priv();
  2209. if (!priv || !priv->pdev) {
  2210. ret = -ENODEV;
  2211. goto out;
  2212. }
  2213. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2214. if (!priv->ops) {
  2215. icnss_pr_err("Driver not registered\n");
  2216. ret = -ENOENT;
  2217. goto out;
  2218. }
  2219. ret = icnss_driver_event_post(priv,
  2220. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2221. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2222. out:
  2223. return ret;
  2224. }
  2225. EXPORT_SYMBOL(icnss_unregister_driver);
  2226. static struct icnss_msi_config msi_config = {
  2227. .total_vectors = 28,
  2228. .total_users = 2,
  2229. .users = (struct icnss_msi_user[]) {
  2230. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2231. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2232. },
  2233. };
  2234. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2235. {
  2236. priv->msi_config = &msi_config;
  2237. return 0;
  2238. }
  2239. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2240. int *num_vectors, u32 *user_base_data,
  2241. u32 *base_vector)
  2242. {
  2243. struct icnss_priv *priv = dev_get_drvdata(dev);
  2244. struct icnss_msi_config *msi_config;
  2245. int idx;
  2246. if (!priv)
  2247. return -ENODEV;
  2248. msi_config = priv->msi_config;
  2249. if (!msi_config) {
  2250. icnss_pr_err("MSI is not supported.\n");
  2251. return -EINVAL;
  2252. }
  2253. for (idx = 0; idx < msi_config->total_users; idx++) {
  2254. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2255. *num_vectors = msi_config->users[idx].num_vectors;
  2256. *user_base_data = msi_config->users[idx].base_vector
  2257. + priv->msi_base_data;
  2258. *base_vector = msi_config->users[idx].base_vector;
  2259. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2260. user_name, *num_vectors, *user_base_data,
  2261. *base_vector);
  2262. return 0;
  2263. }
  2264. }
  2265. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2266. return -EINVAL;
  2267. }
  2268. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2269. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2270. {
  2271. struct icnss_priv *priv = dev_get_drvdata(dev);
  2272. int irq_num;
  2273. irq_num = priv->srng_irqs[vector];
  2274. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2275. irq_num, vector);
  2276. return irq_num;
  2277. }
  2278. EXPORT_SYMBOL(icnss_get_msi_irq);
  2279. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2280. u32 *msi_addr_high)
  2281. {
  2282. struct icnss_priv *priv = dev_get_drvdata(dev);
  2283. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2284. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2285. }
  2286. EXPORT_SYMBOL(icnss_get_msi_address);
  2287. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2288. irqreturn_t (*handler)(int, void *),
  2289. unsigned long flags, const char *name, void *ctx)
  2290. {
  2291. int ret = 0;
  2292. unsigned int irq;
  2293. struct ce_irq_list *irq_entry;
  2294. struct icnss_priv *priv = dev_get_drvdata(dev);
  2295. if (!priv || !priv->pdev) {
  2296. ret = -ENODEV;
  2297. goto out;
  2298. }
  2299. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2300. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2301. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2302. ret = -EINVAL;
  2303. goto out;
  2304. }
  2305. irq = priv->ce_irqs[ce_id];
  2306. irq_entry = &priv->ce_irq_list[ce_id];
  2307. if (irq_entry->handler || irq_entry->irq) {
  2308. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2309. irq, ce_id);
  2310. ret = -EEXIST;
  2311. goto out;
  2312. }
  2313. ret = request_irq(irq, handler, flags, name, ctx);
  2314. if (ret) {
  2315. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2316. irq, ce_id, ret);
  2317. goto out;
  2318. }
  2319. irq_entry->irq = irq;
  2320. irq_entry->handler = handler;
  2321. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2322. penv->stats.ce_irqs[ce_id].request++;
  2323. out:
  2324. return ret;
  2325. }
  2326. EXPORT_SYMBOL(icnss_ce_request_irq);
  2327. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2328. {
  2329. int ret = 0;
  2330. unsigned int irq;
  2331. struct ce_irq_list *irq_entry;
  2332. if (!penv || !penv->pdev || !dev) {
  2333. ret = -ENODEV;
  2334. goto out;
  2335. }
  2336. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2337. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2338. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2339. ret = -EINVAL;
  2340. goto out;
  2341. }
  2342. irq = penv->ce_irqs[ce_id];
  2343. irq_entry = &penv->ce_irq_list[ce_id];
  2344. if (!irq_entry->handler || !irq_entry->irq) {
  2345. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2346. ret = -EEXIST;
  2347. goto out;
  2348. }
  2349. free_irq(irq, ctx);
  2350. irq_entry->irq = 0;
  2351. irq_entry->handler = NULL;
  2352. penv->stats.ce_irqs[ce_id].free++;
  2353. out:
  2354. return ret;
  2355. }
  2356. EXPORT_SYMBOL(icnss_ce_free_irq);
  2357. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2358. {
  2359. unsigned int irq;
  2360. if (!penv || !penv->pdev || !dev) {
  2361. icnss_pr_err("Platform driver not initialized\n");
  2362. return;
  2363. }
  2364. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2365. penv->state);
  2366. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2367. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2368. return;
  2369. }
  2370. penv->stats.ce_irqs[ce_id].enable++;
  2371. irq = penv->ce_irqs[ce_id];
  2372. enable_irq(irq);
  2373. }
  2374. EXPORT_SYMBOL(icnss_enable_irq);
  2375. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2376. {
  2377. unsigned int irq;
  2378. if (!penv || !penv->pdev || !dev) {
  2379. icnss_pr_err("Platform driver not initialized\n");
  2380. return;
  2381. }
  2382. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2383. penv->state);
  2384. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2385. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2386. ce_id);
  2387. return;
  2388. }
  2389. irq = penv->ce_irqs[ce_id];
  2390. disable_irq(irq);
  2391. penv->stats.ce_irqs[ce_id].disable++;
  2392. }
  2393. EXPORT_SYMBOL(icnss_disable_irq);
  2394. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2395. {
  2396. char *fw_build_timestamp = NULL;
  2397. struct icnss_priv *priv = dev_get_drvdata(dev);
  2398. if (!priv) {
  2399. icnss_pr_err("Platform driver not initialized\n");
  2400. return -EINVAL;
  2401. }
  2402. info->v_addr = priv->mem_base_va;
  2403. info->p_addr = priv->mem_base_pa;
  2404. info->chip_id = priv->chip_info.chip_id;
  2405. info->chip_family = priv->chip_info.chip_family;
  2406. info->board_id = priv->board_id;
  2407. info->soc_id = priv->soc_id;
  2408. info->fw_version = priv->fw_version_info.fw_version;
  2409. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2410. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2411. strlcpy(info->fw_build_timestamp,
  2412. priv->fw_version_info.fw_build_timestamp,
  2413. WLFW_MAX_TIMESTAMP_LEN + 1);
  2414. return 0;
  2415. }
  2416. EXPORT_SYMBOL(icnss_get_soc_info);
  2417. int icnss_get_mhi_state(struct device *dev)
  2418. {
  2419. struct icnss_priv *priv = dev_get_drvdata(dev);
  2420. if (!priv) {
  2421. icnss_pr_err("Platform driver not initialized\n");
  2422. return -EINVAL;
  2423. }
  2424. if (!priv->mhi_state_info_va)
  2425. return -ENOMEM;
  2426. return ioread32(priv->mhi_state_info_va);
  2427. }
  2428. EXPORT_SYMBOL(icnss_get_mhi_state);
  2429. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2430. {
  2431. int ret;
  2432. struct icnss_priv *priv;
  2433. if (!dev)
  2434. return -ENODEV;
  2435. priv = dev_get_drvdata(dev);
  2436. if (!priv) {
  2437. icnss_pr_err("Platform driver not initialized\n");
  2438. return -EINVAL;
  2439. }
  2440. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2441. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2442. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2443. priv->state);
  2444. return -EINVAL;
  2445. }
  2446. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2447. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2448. if (ret)
  2449. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2450. ret, fw_log_mode);
  2451. return ret;
  2452. }
  2453. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2454. int icnss_force_wake_request(struct device *dev)
  2455. {
  2456. struct icnss_priv *priv;
  2457. if (!dev)
  2458. return -ENODEV;
  2459. priv = dev_get_drvdata(dev);
  2460. if (!priv) {
  2461. icnss_pr_err("Platform driver not initialized\n");
  2462. return -EINVAL;
  2463. }
  2464. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2465. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2466. atomic_read(&priv->soc_wake_ref_count));
  2467. return 0;
  2468. }
  2469. icnss_pr_soc_wake("Calling SOC Wake request");
  2470. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2471. 0, NULL);
  2472. return 0;
  2473. }
  2474. EXPORT_SYMBOL(icnss_force_wake_request);
  2475. int icnss_force_wake_release(struct device *dev)
  2476. {
  2477. struct icnss_priv *priv;
  2478. if (!dev)
  2479. return -ENODEV;
  2480. priv = dev_get_drvdata(dev);
  2481. if (!priv) {
  2482. icnss_pr_err("Platform driver not initialized\n");
  2483. return -EINVAL;
  2484. }
  2485. icnss_pr_soc_wake("Calling SOC Wake response");
  2486. if (atomic_read(&priv->soc_wake_ref_count) &&
  2487. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2488. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2489. atomic_read(&priv->soc_wake_ref_count));
  2490. return 0;
  2491. }
  2492. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2493. 0, NULL);
  2494. return 0;
  2495. }
  2496. EXPORT_SYMBOL(icnss_force_wake_release);
  2497. int icnss_is_device_awake(struct device *dev)
  2498. {
  2499. struct icnss_priv *priv = dev_get_drvdata(dev);
  2500. if (!priv) {
  2501. icnss_pr_err("Platform driver not initialized\n");
  2502. return -EINVAL;
  2503. }
  2504. return atomic_read(&priv->soc_wake_ref_count);
  2505. }
  2506. EXPORT_SYMBOL(icnss_is_device_awake);
  2507. int icnss_is_pci_ep_awake(struct device *dev)
  2508. {
  2509. struct icnss_priv *priv = dev_get_drvdata(dev);
  2510. if (!priv) {
  2511. icnss_pr_err("Platform driver not initialized\n");
  2512. return -EINVAL;
  2513. }
  2514. if (!priv->mhi_state_info_va)
  2515. return -ENOMEM;
  2516. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2517. }
  2518. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2519. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2520. uint32_t mem_type, uint32_t data_len,
  2521. uint8_t *output)
  2522. {
  2523. int ret = 0;
  2524. struct icnss_priv *priv = dev_get_drvdata(dev);
  2525. if (priv->magic != ICNSS_MAGIC) {
  2526. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2527. dev, priv, priv->magic);
  2528. return -EINVAL;
  2529. }
  2530. if (!output || data_len == 0
  2531. || data_len > WLFW_MAX_DATA_SIZE) {
  2532. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2533. output, data_len);
  2534. ret = -EINVAL;
  2535. goto out;
  2536. }
  2537. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2538. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2539. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2540. priv->state);
  2541. ret = -EINVAL;
  2542. goto out;
  2543. }
  2544. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2545. data_len, output);
  2546. out:
  2547. return ret;
  2548. }
  2549. EXPORT_SYMBOL(icnss_athdiag_read);
  2550. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2551. uint32_t mem_type, uint32_t data_len,
  2552. uint8_t *input)
  2553. {
  2554. int ret = 0;
  2555. struct icnss_priv *priv = dev_get_drvdata(dev);
  2556. if (priv->magic != ICNSS_MAGIC) {
  2557. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2558. dev, priv, priv->magic);
  2559. return -EINVAL;
  2560. }
  2561. if (!input || data_len == 0
  2562. || data_len > WLFW_MAX_DATA_SIZE) {
  2563. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2564. input, data_len);
  2565. ret = -EINVAL;
  2566. goto out;
  2567. }
  2568. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2569. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2570. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2571. priv->state);
  2572. ret = -EINVAL;
  2573. goto out;
  2574. }
  2575. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2576. data_len, input);
  2577. out:
  2578. return ret;
  2579. }
  2580. EXPORT_SYMBOL(icnss_athdiag_write);
  2581. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2582. enum icnss_driver_mode mode,
  2583. const char *host_version)
  2584. {
  2585. struct icnss_priv *priv = dev_get_drvdata(dev);
  2586. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2587. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2588. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2589. priv->state);
  2590. return -EINVAL;
  2591. }
  2592. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2593. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2594. priv->state);
  2595. return -EINVAL;
  2596. }
  2597. if (priv->wpss_supported &&
  2598. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2599. icnss_setup_dms_mac(priv);
  2600. return icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2601. }
  2602. EXPORT_SYMBOL(icnss_wlan_enable);
  2603. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2604. {
  2605. struct icnss_priv *priv = dev_get_drvdata(dev);
  2606. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2607. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2608. priv->state);
  2609. return 0;
  2610. }
  2611. return icnss_send_wlan_disable_to_fw(priv);
  2612. }
  2613. EXPORT_SYMBOL(icnss_wlan_disable);
  2614. bool icnss_is_qmi_disable(struct device *dev)
  2615. {
  2616. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2617. }
  2618. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2619. int icnss_get_ce_id(struct device *dev, int irq)
  2620. {
  2621. int i;
  2622. if (!penv || !penv->pdev || !dev)
  2623. return -ENODEV;
  2624. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2625. if (penv->ce_irqs[i] == irq)
  2626. return i;
  2627. }
  2628. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2629. return -EINVAL;
  2630. }
  2631. EXPORT_SYMBOL(icnss_get_ce_id);
  2632. int icnss_get_irq(struct device *dev, int ce_id)
  2633. {
  2634. int irq;
  2635. if (!penv || !penv->pdev || !dev)
  2636. return -ENODEV;
  2637. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2638. return -EINVAL;
  2639. irq = penv->ce_irqs[ce_id];
  2640. return irq;
  2641. }
  2642. EXPORT_SYMBOL(icnss_get_irq);
  2643. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2644. {
  2645. struct icnss_priv *priv = dev_get_drvdata(dev);
  2646. if (!priv) {
  2647. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2648. return NULL;
  2649. }
  2650. return priv->iommu_domain;
  2651. }
  2652. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2653. int icnss_smmu_map(struct device *dev,
  2654. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2655. {
  2656. struct icnss_priv *priv = dev_get_drvdata(dev);
  2657. int flag = IOMMU_READ | IOMMU_WRITE;
  2658. bool dma_coherent = false;
  2659. unsigned long iova;
  2660. int prop_len = 0;
  2661. size_t len;
  2662. int ret = 0;
  2663. if (!priv) {
  2664. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2665. dev, priv);
  2666. return -EINVAL;
  2667. }
  2668. if (!iova_addr) {
  2669. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2670. &paddr, size);
  2671. return -EINVAL;
  2672. }
  2673. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2674. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2675. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2676. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2677. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2678. iova,
  2679. &priv->smmu_iova_ipa_start,
  2680. priv->smmu_iova_ipa_len);
  2681. return -ENOMEM;
  2682. }
  2683. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2684. icnss_pr_dbg("dma-coherent is %s\n",
  2685. dma_coherent ? "enabled" : "disabled");
  2686. if (dma_coherent)
  2687. flag |= IOMMU_CACHE;
  2688. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2689. ret = iommu_map(priv->iommu_domain, iova,
  2690. rounddown(paddr, PAGE_SIZE), len,
  2691. flag);
  2692. if (ret) {
  2693. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2694. return ret;
  2695. }
  2696. priv->smmu_iova_ipa_current = iova + len;
  2697. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2698. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2699. return 0;
  2700. }
  2701. EXPORT_SYMBOL(icnss_smmu_map);
  2702. int icnss_smmu_unmap(struct device *dev,
  2703. uint32_t iova_addr, size_t size)
  2704. {
  2705. struct icnss_priv *priv = dev_get_drvdata(dev);
  2706. unsigned long iova;
  2707. size_t len, unmapped_len;
  2708. if (!priv) {
  2709. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2710. dev, priv);
  2711. return -EINVAL;
  2712. }
  2713. if (!iova_addr) {
  2714. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2715. size);
  2716. return -EINVAL;
  2717. }
  2718. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2719. PAGE_SIZE);
  2720. iova = rounddown(iova_addr, PAGE_SIZE);
  2721. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2722. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2723. iova,
  2724. &priv->smmu_iova_ipa_start,
  2725. priv->smmu_iova_ipa_len);
  2726. return -ENOMEM;
  2727. }
  2728. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2729. iova, len);
  2730. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2731. if (unmapped_len != len) {
  2732. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2733. return -EINVAL;
  2734. }
  2735. priv->smmu_iova_ipa_current = iova;
  2736. return 0;
  2737. }
  2738. EXPORT_SYMBOL(icnss_smmu_unmap);
  2739. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2740. {
  2741. return socinfo_get_serial_number();
  2742. }
  2743. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2744. int icnss_trigger_recovery(struct device *dev)
  2745. {
  2746. int ret = 0;
  2747. struct icnss_priv *priv = dev_get_drvdata(dev);
  2748. if (priv->magic != ICNSS_MAGIC) {
  2749. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2750. ret = -EINVAL;
  2751. goto out;
  2752. }
  2753. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2754. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2755. priv->state);
  2756. ret = -EPERM;
  2757. goto out;
  2758. }
  2759. if (priv->device_id == WCN6750_DEVICE_ID) {
  2760. icnss_pr_vdbg("Initiate Root PD restart");
  2761. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2762. ICNSS_SMP2P_OUT_POWER_SAVE);
  2763. if (!ret)
  2764. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2765. return ret;
  2766. }
  2767. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2768. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2769. priv->state);
  2770. ret = -EOPNOTSUPP;
  2771. goto out;
  2772. }
  2773. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2774. priv->state);
  2775. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2776. if (!ret)
  2777. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2778. out:
  2779. return ret;
  2780. }
  2781. EXPORT_SYMBOL(icnss_trigger_recovery);
  2782. int icnss_idle_shutdown(struct device *dev)
  2783. {
  2784. struct icnss_priv *priv = dev_get_drvdata(dev);
  2785. if (!priv) {
  2786. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2787. return -EINVAL;
  2788. }
  2789. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2790. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2791. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  2792. return -EBUSY;
  2793. }
  2794. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  2795. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2796. }
  2797. EXPORT_SYMBOL(icnss_idle_shutdown);
  2798. int icnss_idle_restart(struct device *dev)
  2799. {
  2800. struct icnss_priv *priv = dev_get_drvdata(dev);
  2801. if (!priv) {
  2802. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2803. return -EINVAL;
  2804. }
  2805. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2806. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2807. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  2808. return -EBUSY;
  2809. }
  2810. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  2811. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2812. }
  2813. EXPORT_SYMBOL(icnss_idle_restart);
  2814. int icnss_exit_power_save(struct device *dev)
  2815. {
  2816. struct icnss_priv *priv = dev_get_drvdata(dev);
  2817. icnss_pr_vdbg("Calling Exit Power Save\n");
  2818. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2819. !test_bit(ICNSS_MODE_ON, &priv->state))
  2820. return 0;
  2821. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  2822. ICNSS_SMP2P_OUT_POWER_SAVE);
  2823. }
  2824. EXPORT_SYMBOL(icnss_exit_power_save);
  2825. int icnss_prevent_l1(struct device *dev)
  2826. {
  2827. struct icnss_priv *priv = dev_get_drvdata(dev);
  2828. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2829. !test_bit(ICNSS_MODE_ON, &priv->state))
  2830. return 0;
  2831. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  2832. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2833. }
  2834. EXPORT_SYMBOL(icnss_prevent_l1);
  2835. void icnss_allow_l1(struct device *dev)
  2836. {
  2837. struct icnss_priv *priv = dev_get_drvdata(dev);
  2838. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2839. !test_bit(ICNSS_MODE_ON, &priv->state))
  2840. return;
  2841. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  2842. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2843. }
  2844. EXPORT_SYMBOL(icnss_allow_l1);
  2845. void icnss_allow_recursive_recovery(struct device *dev)
  2846. {
  2847. struct icnss_priv *priv = dev_get_drvdata(dev);
  2848. priv->allow_recursive_recovery = true;
  2849. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  2850. }
  2851. void icnss_disallow_recursive_recovery(struct device *dev)
  2852. {
  2853. struct icnss_priv *priv = dev_get_drvdata(dev);
  2854. priv->allow_recursive_recovery = false;
  2855. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  2856. }
  2857. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  2858. {
  2859. struct kobject *icnss_kobject;
  2860. int ret = 0;
  2861. atomic_set(&priv->is_shutdown, false);
  2862. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  2863. if (!icnss_kobject) {
  2864. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  2865. return -EINVAL;
  2866. }
  2867. priv->icnss_kobject = icnss_kobject;
  2868. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  2869. if (ret) {
  2870. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  2871. return ret;
  2872. }
  2873. return ret;
  2874. }
  2875. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  2876. {
  2877. struct kobject *icnss_kobject;
  2878. icnss_kobject = priv->icnss_kobject;
  2879. if (icnss_kobject)
  2880. kobject_put(icnss_kobject);
  2881. }
  2882. static ssize_t qdss_tr_start_store(struct device *dev,
  2883. struct device_attribute *attr,
  2884. const char *buf, size_t count)
  2885. {
  2886. struct icnss_priv *priv = dev_get_drvdata(dev);
  2887. wlfw_qdss_trace_start(priv);
  2888. icnss_pr_dbg("Received QDSS start command\n");
  2889. return count;
  2890. }
  2891. static ssize_t qdss_tr_stop_store(struct device *dev,
  2892. struct device_attribute *attr,
  2893. const char *user_buf, size_t count)
  2894. {
  2895. struct icnss_priv *priv = dev_get_drvdata(dev);
  2896. u32 option = 0;
  2897. if (sscanf(user_buf, "%du", &option) != 1)
  2898. return -EINVAL;
  2899. wlfw_qdss_trace_stop(priv, option);
  2900. icnss_pr_dbg("Received QDSS stop command\n");
  2901. return count;
  2902. }
  2903. static ssize_t qdss_conf_download_store(struct device *dev,
  2904. struct device_attribute *attr,
  2905. const char *buf, size_t count)
  2906. {
  2907. struct icnss_priv *priv = dev_get_drvdata(dev);
  2908. icnss_wlfw_qdss_dnld_send_sync(priv);
  2909. icnss_pr_dbg("Received QDSS download config command\n");
  2910. return count;
  2911. }
  2912. static ssize_t hw_trc_override_store(struct device *dev,
  2913. struct device_attribute *attr,
  2914. const char *buf, size_t count)
  2915. {
  2916. struct icnss_priv *priv = dev_get_drvdata(dev);
  2917. int tmp = 0;
  2918. if (sscanf(buf, "%du", &tmp) != 1)
  2919. return -EINVAL;
  2920. priv->hw_trc_override = tmp;
  2921. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2922. return count;
  2923. }
  2924. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  2925. {
  2926. struct icnss_priv *priv = icnss_get_plat_priv();
  2927. phandle rproc_phandle;
  2928. int ret;
  2929. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  2930. &rproc_phandle)) {
  2931. icnss_pr_err("error reading rproc phandle\n");
  2932. return;
  2933. }
  2934. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  2935. if (IS_ERR_OR_NULL(priv->rproc)) {
  2936. icnss_pr_err("rproc not found");
  2937. return;
  2938. }
  2939. ret = rproc_boot(priv->rproc);
  2940. if (ret) {
  2941. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  2942. rproc_put(priv->rproc);
  2943. }
  2944. }
  2945. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  2946. {
  2947. if (priv && priv->rproc) {
  2948. rproc_shutdown(priv->rproc);
  2949. rproc_put(priv->rproc);
  2950. priv->rproc = NULL;
  2951. }
  2952. }
  2953. static ssize_t wpss_boot_store(struct device *dev,
  2954. struct device_attribute *attr,
  2955. const char *buf, size_t count)
  2956. {
  2957. struct icnss_priv *priv = dev_get_drvdata(dev);
  2958. int wpss_rproc = 0;
  2959. if (!priv->wpss_supported)
  2960. return count;
  2961. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  2962. icnss_pr_err("Failed to read wpss rproc info");
  2963. return -EINVAL;
  2964. }
  2965. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  2966. if (wpss_rproc == 1)
  2967. schedule_work(&wpss_loader);
  2968. else if (wpss_rproc == 0)
  2969. icnss_wpss_unload(priv);
  2970. return count;
  2971. }
  2972. static ssize_t wlan_en_delay_store(struct device *dev,
  2973. struct device_attribute *attr,
  2974. const char *buf, size_t count)
  2975. {
  2976. struct icnss_priv *priv = dev_get_drvdata(dev);
  2977. uint32_t wlan_en_delay = 0;
  2978. if (priv->device_id != WCN6750_DEVICE_ID)
  2979. return count;
  2980. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  2981. icnss_pr_err("Failed to read wlan_en_delay");
  2982. return -EINVAL;
  2983. }
  2984. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  2985. priv->wlan_en_delay_ms = wlan_en_delay;
  2986. return count;
  2987. }
  2988. static DEVICE_ATTR_WO(qdss_tr_start);
  2989. static DEVICE_ATTR_WO(qdss_tr_stop);
  2990. static DEVICE_ATTR_WO(qdss_conf_download);
  2991. static DEVICE_ATTR_WO(hw_trc_override);
  2992. static DEVICE_ATTR_WO(wpss_boot);
  2993. static DEVICE_ATTR_WO(wlan_en_delay);
  2994. static struct attribute *icnss_attrs[] = {
  2995. &dev_attr_qdss_tr_start.attr,
  2996. &dev_attr_qdss_tr_stop.attr,
  2997. &dev_attr_qdss_conf_download.attr,
  2998. &dev_attr_hw_trc_override.attr,
  2999. &dev_attr_wpss_boot.attr,
  3000. &dev_attr_wlan_en_delay.attr,
  3001. NULL,
  3002. };
  3003. static struct attribute_group icnss_attr_group = {
  3004. .attrs = icnss_attrs,
  3005. };
  3006. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3007. {
  3008. struct device *dev = &priv->pdev->dev;
  3009. int ret;
  3010. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3011. if (ret) {
  3012. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3013. ret);
  3014. goto out;
  3015. }
  3016. return 0;
  3017. out:
  3018. return ret;
  3019. }
  3020. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3021. {
  3022. sysfs_remove_link(kernel_kobj, "icnss");
  3023. }
  3024. static int icnss_sysfs_create(struct icnss_priv *priv)
  3025. {
  3026. int ret = 0;
  3027. ret = devm_device_add_group(&priv->pdev->dev,
  3028. &icnss_attr_group);
  3029. if (ret) {
  3030. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3031. ret);
  3032. goto out;
  3033. }
  3034. icnss_create_sysfs_link(priv);
  3035. ret = icnss_create_shutdown_sysfs(priv);
  3036. if (ret)
  3037. goto remove_icnss_group;
  3038. return 0;
  3039. remove_icnss_group:
  3040. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3041. out:
  3042. return ret;
  3043. }
  3044. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3045. {
  3046. icnss_destroy_shutdown_sysfs(priv);
  3047. icnss_remove_sysfs_link(priv);
  3048. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3049. }
  3050. static int icnss_resource_parse(struct icnss_priv *priv)
  3051. {
  3052. int ret = 0, i = 0;
  3053. struct platform_device *pdev = priv->pdev;
  3054. struct device *dev = &pdev->dev;
  3055. struct resource *res;
  3056. u32 int_prop;
  3057. ret = icnss_get_vreg(priv);
  3058. if (ret) {
  3059. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3060. goto out;
  3061. }
  3062. ret = icnss_get_clk(priv);
  3063. if (ret) {
  3064. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3065. goto put_vreg;
  3066. }
  3067. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3068. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3069. "membase");
  3070. if (!res) {
  3071. icnss_pr_err("Memory base not found in DT\n");
  3072. ret = -EINVAL;
  3073. goto put_clk;
  3074. }
  3075. priv->mem_base_pa = res->start;
  3076. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3077. resource_size(res));
  3078. if (!priv->mem_base_va) {
  3079. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3080. &priv->mem_base_pa);
  3081. ret = -EINVAL;
  3082. goto put_clk;
  3083. }
  3084. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3085. &priv->mem_base_pa,
  3086. priv->mem_base_va);
  3087. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3088. res = platform_get_resource(priv->pdev,
  3089. IORESOURCE_IRQ, i);
  3090. if (!res) {
  3091. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3092. ret = -ENODEV;
  3093. goto put_clk;
  3094. } else {
  3095. priv->ce_irqs[i] = res->start;
  3096. }
  3097. }
  3098. } else if (priv->device_id == WCN6750_DEVICE_ID) {
  3099. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3100. "msi_addr");
  3101. if (!res) {
  3102. icnss_pr_err("MSI address not found in DT\n");
  3103. ret = -EINVAL;
  3104. goto put_clk;
  3105. }
  3106. priv->msi_addr_pa = res->start;
  3107. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3108. PAGE_SIZE,
  3109. DMA_FROM_DEVICE, 0);
  3110. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3111. icnss_pr_err("MSI: failed to map msi address\n");
  3112. priv->msi_addr_iova = 0;
  3113. ret = -ENOMEM;
  3114. goto put_clk;
  3115. }
  3116. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3117. &priv->msi_addr_pa,
  3118. priv->msi_addr_iova);
  3119. ret = of_property_read_u32_index(dev->of_node,
  3120. "interrupts",
  3121. 1,
  3122. &int_prop);
  3123. if (ret) {
  3124. icnss_pr_dbg("Read interrupt prop failed");
  3125. goto put_clk;
  3126. }
  3127. priv->msi_base_data = int_prop + 32;
  3128. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3129. priv->msi_base_data, int_prop);
  3130. icnss_get_msi_assignment(priv);
  3131. for (i = 0; i < msi_config.total_vectors; i++) {
  3132. res = platform_get_resource(priv->pdev,
  3133. IORESOURCE_IRQ, i);
  3134. if (!res) {
  3135. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3136. ret = -ENODEV;
  3137. goto put_clk;
  3138. } else {
  3139. priv->srng_irqs[i] = res->start;
  3140. }
  3141. }
  3142. }
  3143. return 0;
  3144. put_clk:
  3145. icnss_put_clk(priv);
  3146. put_vreg:
  3147. icnss_put_vreg(priv);
  3148. out:
  3149. return ret;
  3150. }
  3151. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3152. {
  3153. int ret = 0;
  3154. struct platform_device *pdev = priv->pdev;
  3155. struct device *dev = &pdev->dev;
  3156. struct device_node *np = NULL;
  3157. u64 prop_size = 0;
  3158. const __be32 *addrp = NULL;
  3159. np = of_parse_phandle(dev->of_node,
  3160. "qcom,wlan-msa-fixed-region", 0);
  3161. if (np) {
  3162. addrp = of_get_address(np, 0, &prop_size, NULL);
  3163. if (!addrp) {
  3164. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3165. ret = -EINVAL;
  3166. of_node_put(np);
  3167. goto out;
  3168. }
  3169. priv->msa_pa = of_translate_address(np, addrp);
  3170. if (priv->msa_pa == OF_BAD_ADDR) {
  3171. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3172. ret = -EINVAL;
  3173. of_node_put(np);
  3174. goto out;
  3175. }
  3176. of_node_put(np);
  3177. priv->msa_va = memremap(priv->msa_pa,
  3178. (unsigned long)prop_size, MEMREMAP_WT);
  3179. if (!priv->msa_va) {
  3180. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3181. &priv->msa_pa);
  3182. ret = -EINVAL;
  3183. goto out;
  3184. }
  3185. priv->msa_mem_size = prop_size;
  3186. } else {
  3187. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3188. &priv->msa_mem_size);
  3189. if (ret || priv->msa_mem_size == 0) {
  3190. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3191. priv->msa_mem_size, ret);
  3192. goto out;
  3193. }
  3194. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3195. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3196. if (!priv->msa_va) {
  3197. icnss_pr_err("DMA alloc failed for MSA\n");
  3198. ret = -ENOMEM;
  3199. goto out;
  3200. }
  3201. }
  3202. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3203. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3204. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3205. "qcom,fw-prefix");
  3206. return 0;
  3207. out:
  3208. return ret;
  3209. }
  3210. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3211. struct device *dev, unsigned long iova,
  3212. int flags, void *handler_token)
  3213. {
  3214. struct icnss_priv *priv = handler_token;
  3215. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3216. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3217. if (!priv) {
  3218. icnss_pr_err("priv is NULL\n");
  3219. return -ENODEV;
  3220. }
  3221. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3222. fw_down_data.crashed = true;
  3223. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3224. &fw_down_data);
  3225. }
  3226. icnss_trigger_recovery(&priv->pdev->dev);
  3227. /* IOMMU driver requires non-zero return value to print debug info. */
  3228. return -EINVAL;
  3229. }
  3230. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3231. {
  3232. int ret = 0;
  3233. struct platform_device *pdev = priv->pdev;
  3234. struct device *dev = &pdev->dev;
  3235. const char *iommu_dma_type;
  3236. struct resource *res;
  3237. u32 addr_win[2];
  3238. ret = of_property_read_u32_array(dev->of_node,
  3239. "qcom,iommu-dma-addr-pool",
  3240. addr_win,
  3241. ARRAY_SIZE(addr_win));
  3242. if (ret) {
  3243. icnss_pr_err("SMMU IOVA base not found\n");
  3244. } else {
  3245. priv->smmu_iova_start = addr_win[0];
  3246. priv->smmu_iova_len = addr_win[1];
  3247. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3248. &priv->smmu_iova_start,
  3249. priv->smmu_iova_len);
  3250. priv->iommu_domain =
  3251. iommu_get_domain_for_dev(&pdev->dev);
  3252. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3253. &iommu_dma_type);
  3254. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3255. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3256. priv->smmu_s1_enable = true;
  3257. if (priv->device_id == WCN6750_DEVICE_ID)
  3258. iommu_set_fault_handler(priv->iommu_domain,
  3259. icnss_smmu_fault_handler,
  3260. priv);
  3261. }
  3262. res = platform_get_resource_byname(pdev,
  3263. IORESOURCE_MEM,
  3264. "smmu_iova_ipa");
  3265. if (!res) {
  3266. icnss_pr_err("SMMU IOVA IPA not found\n");
  3267. } else {
  3268. priv->smmu_iova_ipa_start = res->start;
  3269. priv->smmu_iova_ipa_current = res->start;
  3270. priv->smmu_iova_ipa_len = resource_size(res);
  3271. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3272. &priv->smmu_iova_ipa_start,
  3273. priv->smmu_iova_ipa_len);
  3274. }
  3275. }
  3276. return 0;
  3277. }
  3278. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3279. {
  3280. if (!priv)
  3281. return -ENODEV;
  3282. if (!priv->smmu_iova_len)
  3283. return -EINVAL;
  3284. *addr = priv->smmu_iova_start;
  3285. *size = priv->smmu_iova_len;
  3286. return 0;
  3287. }
  3288. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3289. {
  3290. if (!priv)
  3291. return -ENODEV;
  3292. if (!priv->smmu_iova_ipa_len)
  3293. return -EINVAL;
  3294. *addr = priv->smmu_iova_ipa_start;
  3295. *size = priv->smmu_iova_ipa_len;
  3296. return 0;
  3297. }
  3298. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3299. char *name)
  3300. {
  3301. if (!priv)
  3302. return;
  3303. if (!priv->use_prefix_path) {
  3304. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3305. return;
  3306. }
  3307. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3308. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3309. ADRASTEA_PATH_PREFIX "%s", name);
  3310. else
  3311. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3312. QCA6750_PATH_PREFIX "%s", name);
  3313. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3314. }
  3315. static const struct platform_device_id icnss_platform_id_table[] = {
  3316. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3317. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3318. { },
  3319. };
  3320. static const struct of_device_id icnss_dt_match[] = {
  3321. {
  3322. .compatible = "qcom,wcn6750",
  3323. .data = (void *)&icnss_platform_id_table[0]},
  3324. {
  3325. .compatible = "qcom,icnss",
  3326. .data = (void *)&icnss_platform_id_table[1]},
  3327. { },
  3328. };
  3329. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3330. static void icnss_init_control_params(struct icnss_priv *priv)
  3331. {
  3332. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3333. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3334. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3335. if (priv->device_id == WCN6750_DEVICE_ID ||
  3336. of_property_read_bool(priv->pdev->dev.of_node,
  3337. "wpss-support-enable"))
  3338. priv->wpss_supported = true;
  3339. if (of_property_read_bool(priv->pdev->dev.of_node,
  3340. "bdf-download-support"))
  3341. priv->bdf_download_support = true;
  3342. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3343. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3344. }
  3345. static void icnss_read_device_configs(struct icnss_priv *priv)
  3346. {
  3347. if (of_property_read_bool(priv->pdev->dev.of_node,
  3348. "wlan-ipa-disabled")) {
  3349. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3350. }
  3351. }
  3352. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3353. {
  3354. pm_runtime_get_sync(&priv->pdev->dev);
  3355. pm_runtime_forbid(&priv->pdev->dev);
  3356. pm_runtime_set_active(&priv->pdev->dev);
  3357. pm_runtime_enable(&priv->pdev->dev);
  3358. }
  3359. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3360. {
  3361. pm_runtime_disable(&priv->pdev->dev);
  3362. pm_runtime_allow(&priv->pdev->dev);
  3363. pm_runtime_put_sync(&priv->pdev->dev);
  3364. }
  3365. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3366. {
  3367. return of_property_read_bool(priv->pdev->dev.of_node,
  3368. "use-nv-mac");
  3369. }
  3370. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3371. {
  3372. struct icnss_subsys_restart_level_data *restart_level_data;
  3373. icnss_pr_info("rproc name: %s recovery disable: %d",
  3374. rproc->name, rproc->recovery_disabled);
  3375. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3376. if (!restart_level_data)
  3377. return;
  3378. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3379. if (rproc->recovery_disabled)
  3380. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3381. else
  3382. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3383. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3384. 0, restart_level_data);
  3385. }
  3386. }
  3387. static int icnss_probe(struct platform_device *pdev)
  3388. {
  3389. int ret = 0;
  3390. struct device *dev = &pdev->dev;
  3391. struct icnss_priv *priv;
  3392. const struct of_device_id *of_id;
  3393. const struct platform_device_id *device_id;
  3394. if (dev_get_drvdata(dev)) {
  3395. icnss_pr_err("Driver is already initialized\n");
  3396. return -EEXIST;
  3397. }
  3398. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3399. if (!of_id || !of_id->data) {
  3400. icnss_pr_err("Failed to find of match device!\n");
  3401. ret = -ENODEV;
  3402. goto out_reset_drvdata;
  3403. }
  3404. device_id = of_id->data;
  3405. icnss_pr_dbg("Platform driver probe\n");
  3406. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3407. if (!priv)
  3408. return -ENOMEM;
  3409. priv->magic = ICNSS_MAGIC;
  3410. dev_set_drvdata(dev, priv);
  3411. priv->pdev = pdev;
  3412. priv->device_id = device_id->driver_data;
  3413. priv->is_chain1_supported = true;
  3414. INIT_LIST_HEAD(&priv->vreg_list);
  3415. INIT_LIST_HEAD(&priv->clk_list);
  3416. icnss_allow_recursive_recovery(dev);
  3417. icnss_init_control_params(priv);
  3418. icnss_read_device_configs(priv);
  3419. ret = icnss_resource_parse(priv);
  3420. if (ret)
  3421. goto out_reset_drvdata;
  3422. ret = icnss_msa_dt_parse(priv);
  3423. if (ret)
  3424. goto out_free_resources;
  3425. ret = icnss_smmu_dt_parse(priv);
  3426. if (ret)
  3427. goto out_free_resources;
  3428. spin_lock_init(&priv->event_lock);
  3429. spin_lock_init(&priv->on_off_lock);
  3430. spin_lock_init(&priv->soc_wake_msg_lock);
  3431. mutex_init(&priv->dev_lock);
  3432. mutex_init(&priv->tcdev_lock);
  3433. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3434. if (!priv->event_wq) {
  3435. icnss_pr_err("Workqueue creation failed\n");
  3436. ret = -EFAULT;
  3437. goto smmu_cleanup;
  3438. }
  3439. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3440. INIT_LIST_HEAD(&priv->event_list);
  3441. ret = icnss_register_fw_service(priv);
  3442. if (ret < 0) {
  3443. icnss_pr_err("fw service registration failed: %d\n", ret);
  3444. goto out_destroy_wq;
  3445. }
  3446. icnss_enable_recovery(priv);
  3447. icnss_debugfs_create(priv);
  3448. icnss_sysfs_create(priv);
  3449. ret = device_init_wakeup(&priv->pdev->dev, true);
  3450. if (ret)
  3451. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3452. ret);
  3453. icnss_set_plat_priv(priv);
  3454. init_completion(&priv->unblock_shutdown);
  3455. if (priv->device_id == WCN6750_DEVICE_ID) {
  3456. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3457. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3458. if (!priv->soc_wake_wq) {
  3459. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3460. ret = -EFAULT;
  3461. goto out_unregister_fw_service;
  3462. }
  3463. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3464. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3465. ret = icnss_genl_init();
  3466. if (ret < 0)
  3467. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3468. init_completion(&priv->smp2p_soc_wake_wait);
  3469. icnss_runtime_pm_init(priv);
  3470. icnss_aop_mbox_init(priv);
  3471. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3472. priv->bdf_download_support = true;
  3473. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3474. }
  3475. if (priv->wpss_supported) {
  3476. ret = icnss_dms_init(priv);
  3477. if (ret)
  3478. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3479. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3480. icnss_pr_dbg("NV MAC feature is %s\n",
  3481. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3482. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3483. }
  3484. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3485. icnss_pr_info("Platform driver probed successfully\n");
  3486. return 0;
  3487. out_unregister_fw_service:
  3488. icnss_unregister_fw_service(priv);
  3489. out_destroy_wq:
  3490. destroy_workqueue(priv->event_wq);
  3491. smmu_cleanup:
  3492. priv->iommu_domain = NULL;
  3493. out_free_resources:
  3494. icnss_put_resources(priv);
  3495. out_reset_drvdata:
  3496. dev_set_drvdata(dev, NULL);
  3497. return ret;
  3498. }
  3499. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3500. {
  3501. if (IS_ERR_OR_NULL(ramdump_info))
  3502. return;
  3503. device_unregister(ramdump_info->dev);
  3504. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3505. kfree(ramdump_info);
  3506. }
  3507. static int icnss_remove(struct platform_device *pdev)
  3508. {
  3509. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3510. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3511. device_init_wakeup(&priv->pdev->dev, false);
  3512. icnss_debugfs_destroy(priv);
  3513. icnss_sysfs_destroy(priv);
  3514. complete_all(&priv->unblock_shutdown);
  3515. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3516. if (priv->wpss_supported) {
  3517. icnss_dms_deinit(priv);
  3518. icnss_wpss_early_ssr_unregister_notifier(priv);
  3519. icnss_wpss_ssr_unregister_notifier(priv);
  3520. } else {
  3521. icnss_modem_ssr_unregister_notifier(priv);
  3522. icnss_pdr_unregister_notifier(priv);
  3523. }
  3524. if (priv->device_id == WCN6750_DEVICE_ID) {
  3525. icnss_genl_exit();
  3526. icnss_runtime_pm_deinit(priv);
  3527. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3528. mbox_free_channel(priv->mbox_chan);
  3529. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3530. complete_all(&priv->smp2p_soc_wake_wait);
  3531. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3532. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3533. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3534. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3535. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3536. if (priv->soc_wake_wq)
  3537. destroy_workqueue(priv->soc_wake_wq);
  3538. }
  3539. class_destroy(priv->icnss_ramdump_class);
  3540. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3541. icnss_unregister_fw_service(priv);
  3542. if (priv->event_wq)
  3543. destroy_workqueue(priv->event_wq);
  3544. priv->iommu_domain = NULL;
  3545. icnss_hw_power_off(priv);
  3546. icnss_put_resources(priv);
  3547. dev_set_drvdata(&pdev->dev, NULL);
  3548. return 0;
  3549. }
  3550. #ifdef CONFIG_PM_SLEEP
  3551. static int icnss_pm_suspend(struct device *dev)
  3552. {
  3553. struct icnss_priv *priv = dev_get_drvdata(dev);
  3554. int ret = 0;
  3555. if (priv->magic != ICNSS_MAGIC) {
  3556. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3557. dev, priv, priv->magic);
  3558. return -EINVAL;
  3559. }
  3560. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3561. if (!priv->ops || !priv->ops->pm_suspend ||
  3562. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3563. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3564. return 0;
  3565. ret = priv->ops->pm_suspend(dev);
  3566. if (ret == 0) {
  3567. if (priv->device_id == WCN6750_DEVICE_ID) {
  3568. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3569. !test_bit(ICNSS_MODE_ON, &priv->state))
  3570. return 0;
  3571. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3572. ICNSS_SMP2P_OUT_POWER_SAVE);
  3573. }
  3574. priv->stats.pm_suspend++;
  3575. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3576. } else {
  3577. priv->stats.pm_suspend_err++;
  3578. }
  3579. return ret;
  3580. }
  3581. static int icnss_pm_resume(struct device *dev)
  3582. {
  3583. struct icnss_priv *priv = dev_get_drvdata(dev);
  3584. int ret = 0;
  3585. if (priv->magic != ICNSS_MAGIC) {
  3586. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3587. dev, priv, priv->magic);
  3588. return -EINVAL;
  3589. }
  3590. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3591. if (!priv->ops || !priv->ops->pm_resume ||
  3592. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3593. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3594. goto out;
  3595. ret = priv->ops->pm_resume(dev);
  3596. out:
  3597. if (ret == 0) {
  3598. priv->stats.pm_resume++;
  3599. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3600. } else {
  3601. priv->stats.pm_resume_err++;
  3602. }
  3603. return ret;
  3604. }
  3605. static int icnss_pm_suspend_noirq(struct device *dev)
  3606. {
  3607. struct icnss_priv *priv = dev_get_drvdata(dev);
  3608. int ret = 0;
  3609. if (priv->magic != ICNSS_MAGIC) {
  3610. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3611. dev, priv, priv->magic);
  3612. return -EINVAL;
  3613. }
  3614. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3615. if (!priv->ops || !priv->ops->suspend_noirq ||
  3616. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3617. goto out;
  3618. ret = priv->ops->suspend_noirq(dev);
  3619. out:
  3620. if (ret == 0) {
  3621. priv->stats.pm_suspend_noirq++;
  3622. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3623. } else {
  3624. priv->stats.pm_suspend_noirq_err++;
  3625. }
  3626. return ret;
  3627. }
  3628. static int icnss_pm_resume_noirq(struct device *dev)
  3629. {
  3630. struct icnss_priv *priv = dev_get_drvdata(dev);
  3631. int ret = 0;
  3632. if (priv->magic != ICNSS_MAGIC) {
  3633. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3634. dev, priv, priv->magic);
  3635. return -EINVAL;
  3636. }
  3637. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3638. if (!priv->ops || !priv->ops->resume_noirq ||
  3639. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3640. goto out;
  3641. ret = priv->ops->resume_noirq(dev);
  3642. out:
  3643. if (ret == 0) {
  3644. priv->stats.pm_resume_noirq++;
  3645. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3646. } else {
  3647. priv->stats.pm_resume_noirq_err++;
  3648. }
  3649. return ret;
  3650. }
  3651. static int icnss_pm_runtime_suspend(struct device *dev)
  3652. {
  3653. struct icnss_priv *priv = dev_get_drvdata(dev);
  3654. int ret = 0;
  3655. if (priv->device_id != WCN6750_DEVICE_ID) {
  3656. icnss_pr_err("Ignore runtime suspend:\n");
  3657. goto out;
  3658. }
  3659. if (priv->magic != ICNSS_MAGIC) {
  3660. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3661. dev, priv, priv->magic);
  3662. return -EINVAL;
  3663. }
  3664. if (!priv->ops || !priv->ops->runtime_suspend ||
  3665. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3666. goto out;
  3667. icnss_pr_vdbg("Runtime suspend\n");
  3668. ret = priv->ops->runtime_suspend(dev);
  3669. if (!ret) {
  3670. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3671. !test_bit(ICNSS_MODE_ON, &priv->state))
  3672. return 0;
  3673. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3674. ICNSS_SMP2P_OUT_POWER_SAVE);
  3675. }
  3676. out:
  3677. return ret;
  3678. }
  3679. static int icnss_pm_runtime_resume(struct device *dev)
  3680. {
  3681. struct icnss_priv *priv = dev_get_drvdata(dev);
  3682. int ret = 0;
  3683. if (priv->device_id != WCN6750_DEVICE_ID) {
  3684. icnss_pr_err("Ignore runtime resume:\n");
  3685. goto out;
  3686. }
  3687. if (priv->magic != ICNSS_MAGIC) {
  3688. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3689. dev, priv, priv->magic);
  3690. return -EINVAL;
  3691. }
  3692. if (!priv->ops || !priv->ops->runtime_resume ||
  3693. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3694. goto out;
  3695. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3696. ret = priv->ops->runtime_resume(dev);
  3697. out:
  3698. return ret;
  3699. }
  3700. static int icnss_pm_runtime_idle(struct device *dev)
  3701. {
  3702. struct icnss_priv *priv = dev_get_drvdata(dev);
  3703. if (priv->device_id != WCN6750_DEVICE_ID) {
  3704. icnss_pr_err("Ignore runtime idle:\n");
  3705. goto out;
  3706. }
  3707. icnss_pr_vdbg("Runtime idle\n");
  3708. pm_request_autosuspend(dev);
  3709. out:
  3710. return -EBUSY;
  3711. }
  3712. #endif
  3713. static const struct dev_pm_ops icnss_pm_ops = {
  3714. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3715. icnss_pm_resume)
  3716. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  3717. icnss_pm_resume_noirq)
  3718. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  3719. icnss_pm_runtime_idle)
  3720. };
  3721. static struct platform_driver icnss_driver = {
  3722. .probe = icnss_probe,
  3723. .remove = icnss_remove,
  3724. .driver = {
  3725. .name = "icnss2",
  3726. .pm = &icnss_pm_ops,
  3727. .of_match_table = icnss_dt_match,
  3728. },
  3729. };
  3730. static int __init icnss_initialize(void)
  3731. {
  3732. icnss_debug_init();
  3733. return platform_driver_register(&icnss_driver);
  3734. }
  3735. static void __exit icnss_exit(void)
  3736. {
  3737. platform_driver_unregister(&icnss_driver);
  3738. icnss_debug_deinit();
  3739. }
  3740. module_init(icnss_initialize);
  3741. module_exit(icnss_exit);
  3742. MODULE_LICENSE("GPL v2");
  3743. MODULE_DESCRIPTION("iWCN CORE platform driver");