qmi.c 97 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define CONN_ROAM_FILE_NAME "wlan-connection-roaming"
  28. #define INI_EXT ".ini"
  29. #define INI_FILE_NAME_LEN 100
  30. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  31. #ifdef CONFIG_CNSS2_DEBUG
  32. #define QDSS_DEBUG_FILE_STR "debug_"
  33. #else
  34. #define QDSS_DEBUG_FILE_STR ""
  35. #endif
  36. #define HW_V1_NUMBER "v1"
  37. #define HW_V2_NUMBER "v2"
  38. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  39. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  40. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  41. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  42. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  43. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  44. #define DMS_QMI_MAX_MSG_LEN SZ_256
  45. #define MAX_SHADOW_REG_RESERVED 2
  46. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  47. MAX_SHADOW_REG_RESERVED)
  48. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  49. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  50. #ifdef CONFIG_CNSS2_DEBUG
  51. static bool ignore_qmi_failure;
  52. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  53. void cnss_ignore_qmi_failure(bool ignore)
  54. {
  55. ignore_qmi_failure = ignore;
  56. }
  57. #else
  58. #define CNSS_QMI_ASSERT() do { } while (0)
  59. void cnss_ignore_qmi_failure(bool ignore) { }
  60. #endif
  61. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  62. {
  63. switch (mode) {
  64. case CNSS_MISSION:
  65. return "MISSION";
  66. case CNSS_FTM:
  67. return "FTM";
  68. case CNSS_EPPING:
  69. return "EPPING";
  70. case CNSS_WALTEST:
  71. return "WALTEST";
  72. case CNSS_OFF:
  73. return "OFF";
  74. case CNSS_CCPM:
  75. return "CCPM";
  76. case CNSS_QVIT:
  77. return "QVIT";
  78. case CNSS_CALIBRATION:
  79. return "CALIBRATION";
  80. default:
  81. return "UNKNOWN";
  82. }
  83. }
  84. static int qmi_send_wait(struct qmi_handle *qmi, void *req, void *rsp,
  85. struct qmi_elem_info *req_ei,
  86. struct qmi_elem_info *rsp_ei,
  87. int req_id, size_t req_len,
  88. unsigned long timeout)
  89. {
  90. struct qmi_txn txn;
  91. int ret;
  92. char *err_msg;
  93. struct qmi_response_type_v01 *resp = rsp;
  94. ret = qmi_txn_init(qmi, &txn, rsp_ei, rsp);
  95. if (ret < 0) {
  96. err_msg = "Qmi fail: fail to init txn,";
  97. goto out;
  98. }
  99. ret = qmi_send_request(qmi, NULL, &txn, req_id,
  100. req_len, req_ei, req);
  101. if (ret < 0) {
  102. qmi_txn_cancel(&txn);
  103. err_msg = "Qmi fail: fail to send req,";
  104. goto out;
  105. }
  106. ret = qmi_txn_wait(&txn, timeout);
  107. if (ret < 0) {
  108. err_msg = "Qmi fail: wait timeout,";
  109. goto out;
  110. } else if (resp->result != QMI_RESULT_SUCCESS_V01) {
  111. err_msg = "Qmi fail: request rejected,";
  112. cnss_pr_err("Qmi fail: respons with error:%d\n",
  113. resp->error);
  114. ret = -resp->result;
  115. goto out;
  116. }
  117. cnss_pr_dbg("req %x success\n", req_id);
  118. return 0;
  119. out:
  120. cnss_pr_err("%s req %x, ret %d\n", err_msg, req_id, ret);
  121. return ret;
  122. }
  123. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  124. {
  125. struct wlfw_ind_register_req_msg_v01 *req;
  126. struct wlfw_ind_register_resp_msg_v01 *resp;
  127. struct qmi_txn txn;
  128. int ret = 0;
  129. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  130. plat_priv->driver_state);
  131. req = kzalloc(sizeof(*req), GFP_KERNEL);
  132. if (!req)
  133. return -ENOMEM;
  134. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  135. if (!resp) {
  136. kfree(req);
  137. return -ENOMEM;
  138. }
  139. req->client_id_valid = 1;
  140. req->client_id = WLFW_CLIENT_ID;
  141. req->request_mem_enable_valid = 1;
  142. req->request_mem_enable = 1;
  143. req->fw_mem_ready_enable_valid = 1;
  144. req->fw_mem_ready_enable = 1;
  145. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  146. req->fw_init_done_enable_valid = 1;
  147. req->fw_init_done_enable = 1;
  148. req->pin_connect_result_enable_valid = 1;
  149. req->pin_connect_result_enable = 1;
  150. req->cal_done_enable_valid = 1;
  151. req->cal_done_enable = 1;
  152. req->qdss_trace_req_mem_enable_valid = 1;
  153. req->qdss_trace_req_mem_enable = 1;
  154. req->qdss_trace_save_enable_valid = 1;
  155. req->qdss_trace_save_enable = 1;
  156. req->qdss_trace_free_enable_valid = 1;
  157. req->qdss_trace_free_enable = 1;
  158. req->respond_get_info_enable_valid = 1;
  159. req->respond_get_info_enable = 1;
  160. req->wfc_call_twt_config_enable_valid = 1;
  161. req->wfc_call_twt_config_enable = 1;
  162. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  163. wlfw_ind_register_resp_msg_v01_ei, resp);
  164. if (ret < 0) {
  165. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  166. ret);
  167. goto out;
  168. }
  169. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  170. QMI_WLFW_IND_REGISTER_REQ_V01,
  171. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  172. wlfw_ind_register_req_msg_v01_ei, req);
  173. if (ret < 0) {
  174. qmi_txn_cancel(&txn);
  175. cnss_pr_err("Failed to send indication register request, err: %d\n",
  176. ret);
  177. goto out;
  178. }
  179. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  180. if (ret < 0) {
  181. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  182. ret);
  183. goto out;
  184. }
  185. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  186. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  187. resp->resp.result, resp->resp.error);
  188. ret = -resp->resp.result;
  189. goto out;
  190. }
  191. if (resp->fw_status_valid) {
  192. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  193. ret = -EALREADY;
  194. goto qmi_registered;
  195. }
  196. }
  197. kfree(req);
  198. kfree(resp);
  199. return 0;
  200. out:
  201. CNSS_QMI_ASSERT();
  202. qmi_registered:
  203. kfree(req);
  204. kfree(resp);
  205. return ret;
  206. }
  207. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  208. struct wlfw_host_cap_req_msg_v01 *req)
  209. {
  210. if (plat_priv->device_id == KIWI_DEVICE_ID) {
  211. req->mlo_capable_valid = 1;
  212. req->mlo_capable = 1;
  213. req->mlo_chip_id_valid = 1;
  214. req->mlo_chip_id = 0;
  215. req->mlo_group_id_valid = 1;
  216. req->mlo_group_id = 0;
  217. req->max_mlo_peer_valid = 1;
  218. /* Max peer number generally won't change for the same device
  219. * but needs to be synced with host driver.
  220. */
  221. req->max_mlo_peer = 32;
  222. req->mlo_num_chips_valid = 1;
  223. req->mlo_num_chips = 1;
  224. req->mlo_chip_info_valid = 1;
  225. req->mlo_chip_info[0].chip_id = 0;
  226. req->mlo_chip_info[0].num_local_links = 2;
  227. req->mlo_chip_info[0].hw_link_id[0] = 0;
  228. req->mlo_chip_info[0].hw_link_id[1] = 1;
  229. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  230. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  231. }
  232. }
  233. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  234. {
  235. struct wlfw_host_cap_req_msg_v01 *req;
  236. struct wlfw_host_cap_resp_msg_v01 *resp;
  237. struct qmi_txn txn;
  238. int ret = 0;
  239. u64 iova_start = 0, iova_size = 0,
  240. iova_ipa_start = 0, iova_ipa_size = 0;
  241. u64 feature_list = 0;
  242. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  243. plat_priv->driver_state);
  244. req = kzalloc(sizeof(*req), GFP_KERNEL);
  245. if (!req)
  246. return -ENOMEM;
  247. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  248. if (!resp) {
  249. kfree(req);
  250. return -ENOMEM;
  251. }
  252. req->num_clients_valid = 1;
  253. req->num_clients = 1;
  254. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  255. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  256. if (req->wake_msi) {
  257. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  258. req->wake_msi_valid = 1;
  259. }
  260. req->bdf_support_valid = 1;
  261. req->bdf_support = 1;
  262. req->m3_support_valid = 1;
  263. req->m3_support = 1;
  264. req->m3_cache_support_valid = 1;
  265. req->m3_cache_support = 1;
  266. req->cal_done_valid = 1;
  267. req->cal_done = plat_priv->cal_done;
  268. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  269. if (!cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  270. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  271. &iova_ipa_size)) {
  272. req->ddr_range_valid = 1;
  273. req->ddr_range[0].start = iova_start;
  274. req->ddr_range[0].size = iova_size + iova_ipa_size;
  275. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  276. req->ddr_range[0].start, req->ddr_range[0].size);
  277. }
  278. req->host_build_type_valid = 1;
  279. req->host_build_type = cnss_get_host_build_type();
  280. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  281. ret = cnss_get_feature_list(plat_priv, &feature_list);
  282. if (!ret) {
  283. req->feature_list_valid = 1;
  284. req->feature_list = feature_list;
  285. cnss_pr_dbg("Sending feature list 0x%llx\n",
  286. req->feature_list);
  287. }
  288. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  289. wlfw_host_cap_resp_msg_v01_ei, resp);
  290. if (ret < 0) {
  291. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  292. ret);
  293. goto out;
  294. }
  295. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  296. QMI_WLFW_HOST_CAP_REQ_V01,
  297. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  298. wlfw_host_cap_req_msg_v01_ei, req);
  299. if (ret < 0) {
  300. qmi_txn_cancel(&txn);
  301. cnss_pr_err("Failed to send host capability request, err: %d\n",
  302. ret);
  303. goto out;
  304. }
  305. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  306. if (ret < 0) {
  307. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  308. ret);
  309. goto out;
  310. }
  311. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  312. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  313. resp->resp.result, resp->resp.error);
  314. ret = -resp->resp.result;
  315. goto out;
  316. }
  317. kfree(req);
  318. kfree(resp);
  319. return 0;
  320. out:
  321. CNSS_QMI_ASSERT();
  322. kfree(req);
  323. kfree(resp);
  324. return ret;
  325. }
  326. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  327. {
  328. struct wlfw_respond_mem_req_msg_v01 *req;
  329. struct wlfw_respond_mem_resp_msg_v01 *resp;
  330. struct qmi_txn txn;
  331. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  332. int ret = 0, i;
  333. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  334. plat_priv->driver_state);
  335. req = kzalloc(sizeof(*req), GFP_KERNEL);
  336. if (!req)
  337. return -ENOMEM;
  338. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  339. if (!resp) {
  340. kfree(req);
  341. return -ENOMEM;
  342. }
  343. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  344. for (i = 0; i < req->mem_seg_len; i++) {
  345. if (!fw_mem[i].pa || !fw_mem[i].size) {
  346. if (fw_mem[i].type == 0) {
  347. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  348. i);
  349. ret = -EINVAL;
  350. goto out;
  351. }
  352. cnss_pr_err("Memory for FW is not available for type: %u\n",
  353. fw_mem[i].type);
  354. ret = -ENOMEM;
  355. goto out;
  356. }
  357. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  358. fw_mem[i].va, &fw_mem[i].pa,
  359. fw_mem[i].size, fw_mem[i].type);
  360. req->mem_seg[i].addr = fw_mem[i].pa;
  361. req->mem_seg[i].size = fw_mem[i].size;
  362. req->mem_seg[i].type = fw_mem[i].type;
  363. }
  364. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  365. wlfw_respond_mem_resp_msg_v01_ei, resp);
  366. if (ret < 0) {
  367. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  368. ret);
  369. goto out;
  370. }
  371. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  372. QMI_WLFW_RESPOND_MEM_REQ_V01,
  373. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  374. wlfw_respond_mem_req_msg_v01_ei, req);
  375. if (ret < 0) {
  376. qmi_txn_cancel(&txn);
  377. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  378. ret);
  379. goto out;
  380. }
  381. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  382. if (ret < 0) {
  383. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  384. ret);
  385. goto out;
  386. }
  387. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  388. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  389. resp->resp.result, resp->resp.error);
  390. ret = -resp->resp.result;
  391. goto out;
  392. }
  393. kfree(req);
  394. kfree(resp);
  395. return 0;
  396. out:
  397. CNSS_QMI_ASSERT();
  398. kfree(req);
  399. kfree(resp);
  400. return ret;
  401. }
  402. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  403. {
  404. struct wlfw_cap_req_msg_v01 *req;
  405. struct wlfw_cap_resp_msg_v01 *resp;
  406. struct qmi_txn txn;
  407. char *fw_build_timestamp;
  408. int ret = 0, i;
  409. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  410. plat_priv->driver_state);
  411. req = kzalloc(sizeof(*req), GFP_KERNEL);
  412. if (!req)
  413. return -ENOMEM;
  414. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  415. if (!resp) {
  416. kfree(req);
  417. return -ENOMEM;
  418. }
  419. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  420. wlfw_cap_resp_msg_v01_ei, resp);
  421. if (ret < 0) {
  422. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  423. ret);
  424. goto out;
  425. }
  426. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  427. QMI_WLFW_CAP_REQ_V01,
  428. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  429. wlfw_cap_req_msg_v01_ei, req);
  430. if (ret < 0) {
  431. qmi_txn_cancel(&txn);
  432. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  433. ret);
  434. goto out;
  435. }
  436. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  437. if (ret < 0) {
  438. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  439. ret);
  440. goto out;
  441. }
  442. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  443. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  444. resp->resp.result, resp->resp.error);
  445. ret = -resp->resp.result;
  446. goto out;
  447. }
  448. if (resp->chip_info_valid) {
  449. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  450. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  451. }
  452. if (resp->board_info_valid)
  453. plat_priv->board_info.board_id = resp->board_info.board_id;
  454. else
  455. plat_priv->board_info.board_id = 0xFF;
  456. if (resp->soc_info_valid)
  457. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  458. if (resp->fw_version_info_valid) {
  459. plat_priv->fw_version_info.fw_version =
  460. resp->fw_version_info.fw_version;
  461. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  462. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  463. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  464. resp->fw_version_info.fw_build_timestamp,
  465. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  466. }
  467. if (resp->fw_build_id_valid) {
  468. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  469. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  470. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  471. }
  472. if (resp->voltage_mv_valid) {
  473. plat_priv->cpr_info.voltage = resp->voltage_mv;
  474. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  475. plat_priv->cpr_info.voltage);
  476. cnss_update_cpr_info(plat_priv);
  477. }
  478. if (resp->time_freq_hz_valid) {
  479. plat_priv->device_freq_hz = resp->time_freq_hz;
  480. cnss_pr_dbg("Device frequency is %d HZ\n",
  481. plat_priv->device_freq_hz);
  482. }
  483. if (resp->otp_version_valid)
  484. plat_priv->otp_version = resp->otp_version;
  485. if (resp->dev_mem_info_valid) {
  486. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  487. plat_priv->dev_mem_info[i].start =
  488. resp->dev_mem_info[i].start;
  489. plat_priv->dev_mem_info[i].size =
  490. resp->dev_mem_info[i].size;
  491. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  492. i, plat_priv->dev_mem_info[i].start,
  493. plat_priv->dev_mem_info[i].size);
  494. }
  495. }
  496. if (resp->fw_caps_valid)
  497. plat_priv->fw_pcie_gen_switch =
  498. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  499. if (resp->hang_data_length_valid &&
  500. resp->hang_data_length &&
  501. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  502. plat_priv->hang_event_data_len = resp->hang_data_length;
  503. else
  504. plat_priv->hang_event_data_len = 0;
  505. if (resp->hang_data_addr_offset_valid)
  506. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  507. else
  508. plat_priv->hang_data_addr_offset = 0;
  509. if (resp->ol_cpr_cfg_valid)
  510. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  511. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  512. plat_priv->chip_info.chip_id,
  513. plat_priv->chip_info.chip_family,
  514. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  515. plat_priv->otp_version);
  516. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s\n",
  517. plat_priv->fw_version_info.fw_version,
  518. plat_priv->fw_version_info.fw_build_timestamp,
  519. plat_priv->fw_build_id);
  520. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  521. plat_priv->hang_event_data_len,
  522. plat_priv->hang_data_addr_offset);
  523. kfree(req);
  524. kfree(resp);
  525. return 0;
  526. out:
  527. CNSS_QMI_ASSERT();
  528. kfree(req);
  529. kfree(resp);
  530. return ret;
  531. }
  532. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  533. u32 bdf_type, char *filename,
  534. u32 filename_len)
  535. {
  536. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  537. int ret = 0;
  538. switch (bdf_type) {
  539. case CNSS_BDF_ELF:
  540. /* Board ID will be equal or less than 0xFF in GF mask case */
  541. if (plat_priv->board_info.board_id == 0xFF) {
  542. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  543. snprintf(filename_tmp, filename_len,
  544. ELF_BDF_FILE_NAME_GF);
  545. else
  546. snprintf(filename_tmp, filename_len,
  547. ELF_BDF_FILE_NAME);
  548. } else if (plat_priv->board_info.board_id < 0xFF) {
  549. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  550. snprintf(filename_tmp, filename_len,
  551. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  552. plat_priv->board_info.board_id);
  553. else
  554. snprintf(filename_tmp, filename_len,
  555. ELF_BDF_FILE_NAME_PREFIX "%02x",
  556. plat_priv->board_info.board_id);
  557. } else {
  558. snprintf(filename_tmp, filename_len,
  559. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  560. plat_priv->board_info.board_id >> 8 & 0xFF,
  561. plat_priv->board_info.board_id & 0xFF);
  562. }
  563. break;
  564. case CNSS_BDF_BIN:
  565. if (plat_priv->board_info.board_id == 0xFF) {
  566. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  567. snprintf(filename_tmp, filename_len,
  568. BIN_BDF_FILE_NAME_GF);
  569. else
  570. snprintf(filename_tmp, filename_len,
  571. BIN_BDF_FILE_NAME);
  572. } else if (plat_priv->board_info.board_id < 0xFF) {
  573. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  574. snprintf(filename_tmp, filename_len,
  575. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  576. plat_priv->board_info.board_id);
  577. else
  578. snprintf(filename_tmp, filename_len,
  579. BIN_BDF_FILE_NAME_PREFIX "%02x",
  580. plat_priv->board_info.board_id);
  581. } else {
  582. snprintf(filename_tmp, filename_len,
  583. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  584. plat_priv->board_info.board_id >> 8 & 0xFF,
  585. plat_priv->board_info.board_id & 0xFF);
  586. }
  587. break;
  588. case CNSS_BDF_REGDB:
  589. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  590. break;
  591. case CNSS_BDF_HDS:
  592. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  593. break;
  594. default:
  595. cnss_pr_err("Invalid BDF type: %d\n",
  596. plat_priv->ctrl_params.bdf_type);
  597. ret = -EINVAL;
  598. break;
  599. }
  600. if (!ret)
  601. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  602. return ret;
  603. }
  604. int cnss_wlfw_ini_file_send_sync(struct cnss_plat_data *plat_priv,
  605. enum wlfw_ini_file_type_v01 file_type)
  606. {
  607. struct wlfw_ini_file_download_req_msg_v01 *req;
  608. struct wlfw_ini_file_download_resp_msg_v01 *resp;
  609. struct qmi_txn txn;
  610. int ret = 0;
  611. const struct firmware *fw;
  612. char filename[INI_FILE_NAME_LEN] = {0};
  613. char tmp_filename[INI_FILE_NAME_LEN] = {0};
  614. const u8 *temp;
  615. unsigned int remaining;
  616. bool backup_supported = false;
  617. cnss_pr_info("INI File %u download\n", file_type);
  618. req = kzalloc(sizeof(*req), GFP_KERNEL);
  619. if (!req)
  620. return -ENOMEM;
  621. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  622. if (!resp) {
  623. kfree(req);
  624. return -ENOMEM;
  625. }
  626. switch (file_type) {
  627. case WLFW_CONN_ROAM_INI_V01:
  628. snprintf(tmp_filename, sizeof(tmp_filename),
  629. CONN_ROAM_FILE_NAME);
  630. backup_supported = true;
  631. break;
  632. default:
  633. cnss_pr_err("Invalid file type: %u\n", file_type);
  634. ret = -EINVAL;
  635. goto err_req_fw;
  636. }
  637. snprintf(filename, sizeof(filename), "%s%s", tmp_filename, INI_EXT);
  638. /* Fetch the file */
  639. ret = firmware_request_nowarn(&fw, filename, &plat_priv->plat_dev->dev);
  640. if (ret) {
  641. cnss_pr_err("Failed to get INI file %s (%d), Backup file: %s",
  642. filename, ret,
  643. backup_supported ? "Supported" : "Not Supported");
  644. if (!backup_supported)
  645. goto err_req_fw;
  646. snprintf(filename, sizeof(filename),
  647. "%s-%s%s", tmp_filename, "backup", INI_EXT);
  648. ret = firmware_request_nowarn(&fw, filename,
  649. &plat_priv->plat_dev->dev);
  650. if (ret) {
  651. cnss_pr_err("Failed to get INI file %s (%d)", filename,
  652. ret);
  653. goto err_req_fw;
  654. }
  655. }
  656. temp = fw->data;
  657. remaining = fw->size;
  658. cnss_pr_dbg("Downloading INI file: %s, size: %u\n", filename,
  659. remaining);
  660. while (remaining) {
  661. req->file_type_valid = 1;
  662. req->file_type = file_type;
  663. req->total_size_valid = 1;
  664. req->total_size = remaining;
  665. req->seg_id_valid = 1;
  666. req->data_valid = 1;
  667. req->end_valid = 1;
  668. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  669. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  670. } else {
  671. req->data_len = remaining;
  672. req->end = 1;
  673. }
  674. memcpy(req->data, temp, req->data_len);
  675. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  676. wlfw_ini_file_download_resp_msg_v01_ei,
  677. resp);
  678. if (ret < 0) {
  679. cnss_pr_err("Failed to initialize txn for INI file download request, err: %d\n",
  680. ret);
  681. goto err;
  682. }
  683. ret = qmi_send_request
  684. (&plat_priv->qmi_wlfw, NULL, &txn,
  685. QMI_WLFW_INI_FILE_DOWNLOAD_REQ_V01,
  686. WLFW_INI_FILE_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  687. wlfw_ini_file_download_req_msg_v01_ei, req);
  688. if (ret < 0) {
  689. qmi_txn_cancel(&txn);
  690. cnss_pr_err("Failed to send INI File download request, err: %d\n",
  691. ret);
  692. goto err;
  693. }
  694. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  695. if (ret < 0) {
  696. cnss_pr_err("Failed to wait for response of INI File download request, err: %d\n",
  697. ret);
  698. goto err;
  699. }
  700. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  701. cnss_pr_err("INI file download request failed, result: %d, err: %d\n",
  702. resp->resp.result, resp->resp.error);
  703. ret = -resp->resp.result;
  704. goto err;
  705. }
  706. remaining -= req->data_len;
  707. temp += req->data_len;
  708. req->seg_id++;
  709. }
  710. release_firmware(fw);
  711. kfree(req);
  712. kfree(resp);
  713. return 0;
  714. err:
  715. release_firmware(fw);
  716. err_req_fw:
  717. kfree(req);
  718. kfree(resp);
  719. return ret;
  720. }
  721. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  722. u32 bdf_type)
  723. {
  724. struct wlfw_bdf_download_req_msg_v01 *req;
  725. struct wlfw_bdf_download_resp_msg_v01 *resp;
  726. struct qmi_txn txn;
  727. char filename[MAX_FIRMWARE_NAME_LEN];
  728. const struct firmware *fw_entry = NULL;
  729. const u8 *temp;
  730. unsigned int remaining;
  731. int ret = 0;
  732. cnss_pr_dbg("Sending BDF download message, state: 0x%lx, type: %d\n",
  733. plat_priv->driver_state, bdf_type);
  734. req = kzalloc(sizeof(*req), GFP_KERNEL);
  735. if (!req)
  736. return -ENOMEM;
  737. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  738. if (!resp) {
  739. kfree(req);
  740. return -ENOMEM;
  741. }
  742. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  743. filename, sizeof(filename));
  744. if (ret)
  745. goto err_req_fw;
  746. if (bdf_type == CNSS_BDF_REGDB)
  747. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  748. filename);
  749. else
  750. ret = firmware_request_nowarn(&fw_entry, filename,
  751. &plat_priv->plat_dev->dev);
  752. if (ret) {
  753. cnss_pr_err("Failed to load BDF: %s, ret: %d\n", filename, ret);
  754. goto err_req_fw;
  755. }
  756. temp = fw_entry->data;
  757. remaining = fw_entry->size;
  758. cnss_pr_dbg("Downloading BDF: %s, size: %u\n", filename, remaining);
  759. while (remaining) {
  760. req->valid = 1;
  761. req->file_id_valid = 1;
  762. req->file_id = plat_priv->board_info.board_id;
  763. req->total_size_valid = 1;
  764. req->total_size = remaining;
  765. req->seg_id_valid = 1;
  766. req->data_valid = 1;
  767. req->end_valid = 1;
  768. req->bdf_type_valid = 1;
  769. req->bdf_type = bdf_type;
  770. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  771. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  772. } else {
  773. req->data_len = remaining;
  774. req->end = 1;
  775. }
  776. memcpy(req->data, temp, req->data_len);
  777. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  778. wlfw_bdf_download_resp_msg_v01_ei, resp);
  779. if (ret < 0) {
  780. cnss_pr_err("Failed to initialize txn for BDF download request, err: %d\n",
  781. ret);
  782. goto err_send;
  783. }
  784. ret = qmi_send_request
  785. (&plat_priv->qmi_wlfw, NULL, &txn,
  786. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  787. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  788. wlfw_bdf_download_req_msg_v01_ei, req);
  789. if (ret < 0) {
  790. qmi_txn_cancel(&txn);
  791. cnss_pr_err("Failed to send respond BDF download request, err: %d\n",
  792. ret);
  793. goto err_send;
  794. }
  795. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  796. if (ret < 0) {
  797. cnss_pr_err("Failed to wait for response of BDF download request, err: %d\n",
  798. ret);
  799. goto err_send;
  800. }
  801. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  802. cnss_pr_err("BDF download request failed, result: %d, err: %d\n",
  803. resp->resp.result, resp->resp.error);
  804. ret = -resp->resp.result;
  805. goto err_send;
  806. }
  807. remaining -= req->data_len;
  808. temp += req->data_len;
  809. req->seg_id++;
  810. }
  811. release_firmware(fw_entry);
  812. if (resp->host_bdf_data_valid) {
  813. /* QCA6490 enable S3E regulator for IPA configuration only */
  814. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  815. cnss_enable_int_pow_amp_vreg(plat_priv);
  816. plat_priv->cbc_file_download =
  817. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  818. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  819. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  820. plat_priv->cbc_file_download);
  821. }
  822. kfree(req);
  823. kfree(resp);
  824. return 0;
  825. err_send:
  826. release_firmware(fw_entry);
  827. err_req_fw:
  828. if (!(bdf_type == CNSS_BDF_REGDB ||
  829. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  830. ret == -EAGAIN))
  831. CNSS_QMI_ASSERT();
  832. kfree(req);
  833. kfree(resp);
  834. return ret;
  835. }
  836. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  837. {
  838. struct wlfw_m3_info_req_msg_v01 *req;
  839. struct wlfw_m3_info_resp_msg_v01 *resp;
  840. struct qmi_txn txn;
  841. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  842. int ret = 0;
  843. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  844. plat_priv->driver_state);
  845. req = kzalloc(sizeof(*req), GFP_KERNEL);
  846. if (!req)
  847. return -ENOMEM;
  848. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  849. if (!resp) {
  850. kfree(req);
  851. return -ENOMEM;
  852. }
  853. if (!m3_mem->pa || !m3_mem->size) {
  854. cnss_pr_err("Memory for M3 is not available\n");
  855. ret = -ENOMEM;
  856. goto out;
  857. }
  858. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  859. m3_mem->va, &m3_mem->pa, m3_mem->size);
  860. req->addr = plat_priv->m3_mem.pa;
  861. req->size = plat_priv->m3_mem.size;
  862. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  863. wlfw_m3_info_resp_msg_v01_ei, resp);
  864. if (ret < 0) {
  865. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  866. ret);
  867. goto out;
  868. }
  869. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  870. QMI_WLFW_M3_INFO_REQ_V01,
  871. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  872. wlfw_m3_info_req_msg_v01_ei, req);
  873. if (ret < 0) {
  874. qmi_txn_cancel(&txn);
  875. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  876. ret);
  877. goto out;
  878. }
  879. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  880. if (ret < 0) {
  881. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  882. ret);
  883. goto out;
  884. }
  885. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  886. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  887. resp->resp.result, resp->resp.error);
  888. ret = -resp->resp.result;
  889. goto out;
  890. }
  891. kfree(req);
  892. kfree(resp);
  893. return 0;
  894. out:
  895. CNSS_QMI_ASSERT();
  896. kfree(req);
  897. kfree(resp);
  898. return ret;
  899. }
  900. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  901. u8 *mac, u32 mac_len)
  902. {
  903. struct wlfw_mac_addr_req_msg_v01 req;
  904. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  905. struct qmi_txn txn;
  906. int ret;
  907. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  908. return -EINVAL;
  909. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  910. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  911. if (ret < 0) {
  912. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  913. ret);
  914. ret = -EIO;
  915. goto out;
  916. }
  917. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  918. mac, plat_priv->driver_state);
  919. memcpy(req.mac_addr, mac, mac_len);
  920. req.mac_addr_valid = 1;
  921. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  922. QMI_WLFW_MAC_ADDR_REQ_V01,
  923. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  924. wlfw_mac_addr_req_msg_v01_ei, &req);
  925. if (ret < 0) {
  926. qmi_txn_cancel(&txn);
  927. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  928. ret = -EIO;
  929. goto out;
  930. }
  931. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  932. if (ret < 0) {
  933. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  934. ret);
  935. ret = -EIO;
  936. goto out;
  937. }
  938. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  939. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  940. resp.resp.result);
  941. ret = -resp.resp.result;
  942. }
  943. out:
  944. return ret;
  945. }
  946. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  947. u32 total_size)
  948. {
  949. int ret = 0;
  950. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  951. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  952. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  953. unsigned int remaining;
  954. struct qmi_txn txn;
  955. cnss_pr_dbg("%s\n", __func__);
  956. req = kzalloc(sizeof(*req), GFP_KERNEL);
  957. if (!req)
  958. return -ENOMEM;
  959. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  960. if (!resp) {
  961. kfree(req);
  962. return -ENOMEM;
  963. }
  964. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  965. if (!p_qdss_trace_data) {
  966. ret = ENOMEM;
  967. goto end;
  968. }
  969. remaining = total_size;
  970. p_qdss_trace_data_temp = p_qdss_trace_data;
  971. while (remaining && resp->end == 0) {
  972. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  973. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  974. if (ret < 0) {
  975. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  976. ret);
  977. goto fail;
  978. }
  979. ret = qmi_send_request
  980. (&plat_priv->qmi_wlfw, NULL, &txn,
  981. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  982. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  983. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  984. if (ret < 0) {
  985. qmi_txn_cancel(&txn);
  986. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  987. ret);
  988. goto fail;
  989. }
  990. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  991. if (ret < 0) {
  992. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  993. ret);
  994. goto fail;
  995. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  996. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  997. resp->resp.result, resp->resp.error);
  998. ret = -resp->resp.result;
  999. goto fail;
  1000. } else {
  1001. ret = 0;
  1002. }
  1003. cnss_pr_dbg("%s: response total size %d data len %d",
  1004. __func__, resp->total_size, resp->data_len);
  1005. if ((resp->total_size_valid == 1 &&
  1006. resp->total_size == total_size) &&
  1007. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  1008. (resp->data_valid == 1 &&
  1009. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01)) {
  1010. memcpy(p_qdss_trace_data_temp,
  1011. resp->data, resp->data_len);
  1012. } else {
  1013. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  1014. __func__,
  1015. total_size, req->seg_id,
  1016. resp->total_size_valid,
  1017. resp->total_size,
  1018. resp->seg_id_valid,
  1019. resp->seg_id,
  1020. resp->data_valid,
  1021. resp->data_len);
  1022. ret = -1;
  1023. goto fail;
  1024. }
  1025. remaining -= resp->data_len;
  1026. p_qdss_trace_data_temp += resp->data_len;
  1027. req->seg_id++;
  1028. }
  1029. if (remaining == 0 && (resp->end_valid && resp->end)) {
  1030. ret = cnss_genl_send_msg(p_qdss_trace_data,
  1031. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  1032. total_size);
  1033. if (ret < 0) {
  1034. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  1035. ret);
  1036. ret = -1;
  1037. goto fail;
  1038. }
  1039. } else {
  1040. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  1041. __func__,
  1042. remaining, resp->end_valid, resp->end);
  1043. ret = -1;
  1044. goto fail;
  1045. }
  1046. fail:
  1047. kfree(p_qdss_trace_data);
  1048. end:
  1049. kfree(req);
  1050. kfree(resp);
  1051. return ret;
  1052. }
  1053. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  1054. char *filename, u32 filename_len)
  1055. {
  1056. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  1057. char *debug_str = QDSS_DEBUG_FILE_STR;
  1058. if (plat_priv->device_id == KIWI_DEVICE_ID)
  1059. debug_str = "";
  1060. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  1061. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1062. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  1063. else
  1064. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1065. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  1066. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  1067. }
  1068. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1069. {
  1070. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  1071. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  1072. struct qmi_txn txn;
  1073. const struct firmware *fw_entry = NULL;
  1074. const u8 *temp;
  1075. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  1076. unsigned int remaining;
  1077. int ret = 0;
  1078. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  1079. plat_priv->driver_state);
  1080. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1081. if (!req)
  1082. return -ENOMEM;
  1083. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1084. if (!resp) {
  1085. kfree(req);
  1086. return -ENOMEM;
  1087. }
  1088. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  1089. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  1090. qdss_cfg_filename);
  1091. if (ret) {
  1092. cnss_pr_dbg("Unable to load %s\n",
  1093. qdss_cfg_filename);
  1094. goto err_req_fw;
  1095. }
  1096. temp = fw_entry->data;
  1097. remaining = fw_entry->size;
  1098. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  1099. qdss_cfg_filename, remaining);
  1100. while (remaining) {
  1101. req->total_size_valid = 1;
  1102. req->total_size = remaining;
  1103. req->seg_id_valid = 1;
  1104. req->data_valid = 1;
  1105. req->end_valid = 1;
  1106. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1107. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  1108. } else {
  1109. req->data_len = remaining;
  1110. req->end = 1;
  1111. }
  1112. memcpy(req->data, temp, req->data_len);
  1113. ret = qmi_txn_init
  1114. (&plat_priv->qmi_wlfw, &txn,
  1115. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  1116. resp);
  1117. if (ret < 0) {
  1118. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  1119. ret);
  1120. goto err_send;
  1121. }
  1122. ret = qmi_send_request
  1123. (&plat_priv->qmi_wlfw, NULL, &txn,
  1124. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  1125. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  1126. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  1127. if (ret < 0) {
  1128. qmi_txn_cancel(&txn);
  1129. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  1130. ret);
  1131. goto err_send;
  1132. }
  1133. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1134. if (ret < 0) {
  1135. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  1136. ret);
  1137. goto err_send;
  1138. }
  1139. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1140. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  1141. resp->resp.result, resp->resp.error);
  1142. ret = -resp->resp.result;
  1143. goto err_send;
  1144. }
  1145. remaining -= req->data_len;
  1146. temp += req->data_len;
  1147. req->seg_id++;
  1148. }
  1149. release_firmware(fw_entry);
  1150. kfree(req);
  1151. kfree(resp);
  1152. return 0;
  1153. err_send:
  1154. release_firmware(fw_entry);
  1155. err_req_fw:
  1156. kfree(req);
  1157. kfree(resp);
  1158. return ret;
  1159. }
  1160. static int wlfw_send_qdss_trace_mode_req
  1161. (struct cnss_plat_data *plat_priv,
  1162. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1163. unsigned long long option)
  1164. {
  1165. int rc = 0;
  1166. int tmp = 0;
  1167. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1168. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1169. struct qmi_txn txn;
  1170. if (!plat_priv)
  1171. return -ENODEV;
  1172. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1173. if (!req)
  1174. return -ENOMEM;
  1175. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1176. if (!resp) {
  1177. kfree(req);
  1178. return -ENOMEM;
  1179. }
  1180. req->mode_valid = 1;
  1181. req->mode = mode;
  1182. req->option_valid = 1;
  1183. req->option = option;
  1184. tmp = plat_priv->hw_trc_override;
  1185. req->hw_trc_disable_override_valid = 1;
  1186. req->hw_trc_disable_override =
  1187. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1188. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1189. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1190. __func__, mode, option, req->hw_trc_disable_override);
  1191. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1192. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1193. if (rc < 0) {
  1194. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1195. rc);
  1196. goto out;
  1197. }
  1198. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1199. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1200. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1201. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1202. if (rc < 0) {
  1203. qmi_txn_cancel(&txn);
  1204. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1205. goto out;
  1206. }
  1207. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1208. if (rc < 0) {
  1209. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1210. rc);
  1211. goto out;
  1212. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1213. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1214. resp->resp.result, resp->resp.error);
  1215. rc = -resp->resp.result;
  1216. goto out;
  1217. }
  1218. kfree(resp);
  1219. kfree(req);
  1220. return rc;
  1221. out:
  1222. kfree(resp);
  1223. kfree(req);
  1224. CNSS_QMI_ASSERT();
  1225. return rc;
  1226. }
  1227. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1228. {
  1229. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1230. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1231. }
  1232. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1233. {
  1234. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1235. option);
  1236. }
  1237. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1238. enum cnss_driver_mode mode)
  1239. {
  1240. struct wlfw_wlan_mode_req_msg_v01 *req;
  1241. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1242. struct qmi_txn txn;
  1243. int ret = 0;
  1244. if (!plat_priv)
  1245. return -ENODEV;
  1246. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1247. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1248. if (mode == CNSS_OFF &&
  1249. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1250. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1251. return 0;
  1252. }
  1253. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1254. if (!req)
  1255. return -ENOMEM;
  1256. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1257. if (!resp) {
  1258. kfree(req);
  1259. return -ENOMEM;
  1260. }
  1261. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1262. req->hw_debug_valid = 1;
  1263. req->hw_debug = 0;
  1264. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1265. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1266. if (ret < 0) {
  1267. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1268. cnss_qmi_mode_to_str(mode), mode, ret);
  1269. goto out;
  1270. }
  1271. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1272. QMI_WLFW_WLAN_MODE_REQ_V01,
  1273. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1274. wlfw_wlan_mode_req_msg_v01_ei, req);
  1275. if (ret < 0) {
  1276. qmi_txn_cancel(&txn);
  1277. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1278. cnss_qmi_mode_to_str(mode), mode, ret);
  1279. goto out;
  1280. }
  1281. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1282. if (ret < 0) {
  1283. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1284. cnss_qmi_mode_to_str(mode), mode, ret);
  1285. goto out;
  1286. }
  1287. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1288. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1289. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1290. resp->resp.error);
  1291. ret = -resp->resp.result;
  1292. goto out;
  1293. }
  1294. kfree(req);
  1295. kfree(resp);
  1296. return 0;
  1297. out:
  1298. if (mode == CNSS_OFF) {
  1299. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1300. ret = 0;
  1301. } else {
  1302. CNSS_QMI_ASSERT();
  1303. }
  1304. kfree(req);
  1305. kfree(resp);
  1306. return ret;
  1307. }
  1308. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1309. struct cnss_wlan_enable_cfg *config,
  1310. const char *host_version)
  1311. {
  1312. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1313. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1314. struct qmi_txn txn;
  1315. u32 i;
  1316. int ret = 0;
  1317. if (!plat_priv)
  1318. return -ENODEV;
  1319. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1320. plat_priv->driver_state);
  1321. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1322. if (!req)
  1323. return -ENOMEM;
  1324. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1325. if (!resp) {
  1326. kfree(req);
  1327. return -ENOMEM;
  1328. }
  1329. req->host_version_valid = 1;
  1330. strlcpy(req->host_version, host_version,
  1331. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1332. req->tgt_cfg_valid = 1;
  1333. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1334. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1335. else
  1336. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1337. for (i = 0; i < req->tgt_cfg_len; i++) {
  1338. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1339. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1340. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1341. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1342. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1343. }
  1344. req->svc_cfg_valid = 1;
  1345. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1346. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1347. else
  1348. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1349. for (i = 0; i < req->svc_cfg_len; i++) {
  1350. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1351. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1352. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1353. }
  1354. if (plat_priv->device_id != KIWI_DEVICE_ID) {
  1355. req->shadow_reg_v2_valid = 1;
  1356. if (config->num_shadow_reg_v2_cfg >
  1357. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1358. req->shadow_reg_v2_len = QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1359. else
  1360. req->shadow_reg_v2_len = config->num_shadow_reg_v2_cfg;
  1361. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1362. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01)
  1363. * req->shadow_reg_v2_len);
  1364. } else {
  1365. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1366. config->num_shadow_reg_v3_cfg);
  1367. req->shadow_reg_v3_valid = 1;
  1368. if (config->num_shadow_reg_v3_cfg >
  1369. MAX_NUM_SHADOW_REG_V3)
  1370. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1371. else
  1372. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1373. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1374. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01)
  1375. * req->shadow_reg_v3_len);
  1376. }
  1377. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1378. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1379. if (ret < 0) {
  1380. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1381. ret);
  1382. goto out;
  1383. }
  1384. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1385. QMI_WLFW_WLAN_CFG_REQ_V01,
  1386. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1387. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1388. if (ret < 0) {
  1389. qmi_txn_cancel(&txn);
  1390. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1391. ret);
  1392. goto out;
  1393. }
  1394. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1395. if (ret < 0) {
  1396. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1397. ret);
  1398. goto out;
  1399. }
  1400. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1401. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1402. resp->resp.result, resp->resp.error);
  1403. ret = -resp->resp.result;
  1404. goto out;
  1405. }
  1406. kfree(req);
  1407. kfree(resp);
  1408. return 0;
  1409. out:
  1410. CNSS_QMI_ASSERT();
  1411. kfree(req);
  1412. kfree(resp);
  1413. return ret;
  1414. }
  1415. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1416. u32 offset, u32 mem_type,
  1417. u32 data_len, u8 *data)
  1418. {
  1419. struct wlfw_athdiag_read_req_msg_v01 *req;
  1420. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1421. struct qmi_txn txn;
  1422. int ret = 0;
  1423. if (!plat_priv)
  1424. return -ENODEV;
  1425. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1426. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1427. data, data_len);
  1428. return -EINVAL;
  1429. }
  1430. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1431. plat_priv->driver_state, offset, mem_type, data_len);
  1432. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1433. if (!req)
  1434. return -ENOMEM;
  1435. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1436. if (!resp) {
  1437. kfree(req);
  1438. return -ENOMEM;
  1439. }
  1440. req->offset = offset;
  1441. req->mem_type = mem_type;
  1442. req->data_len = data_len;
  1443. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1444. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1445. if (ret < 0) {
  1446. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1447. ret);
  1448. goto out;
  1449. }
  1450. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1451. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1452. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1453. wlfw_athdiag_read_req_msg_v01_ei, req);
  1454. if (ret < 0) {
  1455. qmi_txn_cancel(&txn);
  1456. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1457. ret);
  1458. goto out;
  1459. }
  1460. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1461. if (ret < 0) {
  1462. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1463. ret);
  1464. goto out;
  1465. }
  1466. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1467. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1468. resp->resp.result, resp->resp.error);
  1469. ret = -resp->resp.result;
  1470. goto out;
  1471. }
  1472. if (!resp->data_valid || resp->data_len != data_len) {
  1473. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1474. resp->data_valid, resp->data_len);
  1475. ret = -EINVAL;
  1476. goto out;
  1477. }
  1478. memcpy(data, resp->data, resp->data_len);
  1479. kfree(req);
  1480. kfree(resp);
  1481. return 0;
  1482. out:
  1483. kfree(req);
  1484. kfree(resp);
  1485. return ret;
  1486. }
  1487. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1488. u32 offset, u32 mem_type,
  1489. u32 data_len, u8 *data)
  1490. {
  1491. struct wlfw_athdiag_write_req_msg_v01 *req;
  1492. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1493. struct qmi_txn txn;
  1494. int ret = 0;
  1495. if (!plat_priv)
  1496. return -ENODEV;
  1497. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1498. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1499. data, data_len);
  1500. return -EINVAL;
  1501. }
  1502. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1503. plat_priv->driver_state, offset, mem_type, data_len, data);
  1504. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1505. if (!req)
  1506. return -ENOMEM;
  1507. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1508. if (!resp) {
  1509. kfree(req);
  1510. return -ENOMEM;
  1511. }
  1512. req->offset = offset;
  1513. req->mem_type = mem_type;
  1514. req->data_len = data_len;
  1515. memcpy(req->data, data, data_len);
  1516. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1517. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1518. if (ret < 0) {
  1519. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1520. ret);
  1521. goto out;
  1522. }
  1523. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1524. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1525. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1526. wlfw_athdiag_write_req_msg_v01_ei, req);
  1527. if (ret < 0) {
  1528. qmi_txn_cancel(&txn);
  1529. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1530. ret);
  1531. goto out;
  1532. }
  1533. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1534. if (ret < 0) {
  1535. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1536. ret);
  1537. goto out;
  1538. }
  1539. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1540. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1541. resp->resp.result, resp->resp.error);
  1542. ret = -resp->resp.result;
  1543. goto out;
  1544. }
  1545. kfree(req);
  1546. kfree(resp);
  1547. return 0;
  1548. out:
  1549. kfree(req);
  1550. kfree(resp);
  1551. return ret;
  1552. }
  1553. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1554. u8 fw_log_mode)
  1555. {
  1556. struct wlfw_ini_req_msg_v01 *req;
  1557. struct wlfw_ini_resp_msg_v01 *resp;
  1558. struct qmi_txn txn;
  1559. int ret = 0;
  1560. if (!plat_priv)
  1561. return -ENODEV;
  1562. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1563. plat_priv->driver_state, fw_log_mode);
  1564. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1565. if (!req)
  1566. return -ENOMEM;
  1567. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1568. if (!resp) {
  1569. kfree(req);
  1570. return -ENOMEM;
  1571. }
  1572. req->enablefwlog_valid = 1;
  1573. req->enablefwlog = fw_log_mode;
  1574. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1575. wlfw_ini_resp_msg_v01_ei, resp);
  1576. if (ret < 0) {
  1577. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1578. fw_log_mode, ret);
  1579. goto out;
  1580. }
  1581. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1582. QMI_WLFW_INI_REQ_V01,
  1583. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1584. wlfw_ini_req_msg_v01_ei, req);
  1585. if (ret < 0) {
  1586. qmi_txn_cancel(&txn);
  1587. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1588. fw_log_mode, ret);
  1589. goto out;
  1590. }
  1591. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1592. if (ret < 0) {
  1593. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1594. fw_log_mode, ret);
  1595. goto out;
  1596. }
  1597. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1598. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1599. fw_log_mode, resp->resp.result, resp->resp.error);
  1600. ret = -resp->resp.result;
  1601. goto out;
  1602. }
  1603. kfree(req);
  1604. kfree(resp);
  1605. return 0;
  1606. out:
  1607. kfree(req);
  1608. kfree(resp);
  1609. return ret;
  1610. }
  1611. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1612. {
  1613. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1614. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1615. struct qmi_txn txn;
  1616. int ret = 0;
  1617. if (!plat_priv)
  1618. return -ENODEV;
  1619. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1620. !plat_priv->fw_pcie_gen_switch) {
  1621. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1622. return 0;
  1623. }
  1624. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1625. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1626. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1627. plat_priv->pcie_gen_speed;
  1628. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1629. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1630. if (ret < 0) {
  1631. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1632. ret);
  1633. goto out;
  1634. }
  1635. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1636. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1637. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1638. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1639. if (ret < 0) {
  1640. qmi_txn_cancel(&txn);
  1641. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1642. goto out;
  1643. }
  1644. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1645. if (ret < 0) {
  1646. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1647. ret);
  1648. goto out;
  1649. }
  1650. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1651. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1652. plat_priv->pcie_gen_speed, resp.resp.result,
  1653. resp.resp.error);
  1654. ret = -resp.resp.result;
  1655. }
  1656. out:
  1657. /* Reset PCIE Gen speed after one time use */
  1658. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1659. return ret;
  1660. }
  1661. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1662. {
  1663. struct wlfw_antenna_switch_req_msg_v01 *req;
  1664. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1665. struct qmi_txn txn;
  1666. int ret = 0;
  1667. if (!plat_priv)
  1668. return -ENODEV;
  1669. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1670. plat_priv->driver_state);
  1671. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1672. if (!req)
  1673. return -ENOMEM;
  1674. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1675. if (!resp) {
  1676. kfree(req);
  1677. return -ENOMEM;
  1678. }
  1679. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1680. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1681. if (ret < 0) {
  1682. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1683. ret);
  1684. goto out;
  1685. }
  1686. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1687. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1688. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1689. wlfw_antenna_switch_req_msg_v01_ei, req);
  1690. if (ret < 0) {
  1691. qmi_txn_cancel(&txn);
  1692. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1693. ret);
  1694. goto out;
  1695. }
  1696. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1697. if (ret < 0) {
  1698. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1699. ret);
  1700. goto out;
  1701. }
  1702. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1703. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1704. resp->resp.result, resp->resp.error);
  1705. ret = -resp->resp.result;
  1706. goto out;
  1707. }
  1708. if (resp->antenna_valid)
  1709. plat_priv->antenna = resp->antenna;
  1710. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1711. resp->antenna_valid, resp->antenna);
  1712. kfree(req);
  1713. kfree(resp);
  1714. return 0;
  1715. out:
  1716. kfree(req);
  1717. kfree(resp);
  1718. return ret;
  1719. }
  1720. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1721. {
  1722. struct wlfw_antenna_grant_req_msg_v01 *req;
  1723. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1724. struct qmi_txn txn;
  1725. int ret = 0;
  1726. if (!plat_priv)
  1727. return -ENODEV;
  1728. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1729. plat_priv->driver_state, plat_priv->grant);
  1730. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1731. if (!req)
  1732. return -ENOMEM;
  1733. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1734. if (!resp) {
  1735. kfree(req);
  1736. return -ENOMEM;
  1737. }
  1738. req->grant_valid = 1;
  1739. req->grant = plat_priv->grant;
  1740. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1741. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1742. if (ret < 0) {
  1743. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1744. ret);
  1745. goto out;
  1746. }
  1747. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1748. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1749. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1750. wlfw_antenna_grant_req_msg_v01_ei, req);
  1751. if (ret < 0) {
  1752. qmi_txn_cancel(&txn);
  1753. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1754. ret);
  1755. goto out;
  1756. }
  1757. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1758. if (ret < 0) {
  1759. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1760. ret);
  1761. goto out;
  1762. }
  1763. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1764. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1765. resp->resp.result, resp->resp.error);
  1766. ret = -resp->resp.result;
  1767. goto out;
  1768. }
  1769. kfree(req);
  1770. kfree(resp);
  1771. return 0;
  1772. out:
  1773. kfree(req);
  1774. kfree(resp);
  1775. return ret;
  1776. }
  1777. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1778. {
  1779. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1780. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1781. struct qmi_txn txn;
  1782. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1783. int ret = 0;
  1784. int i;
  1785. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1786. plat_priv->driver_state);
  1787. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1788. if (!req)
  1789. return -ENOMEM;
  1790. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1791. if (!resp) {
  1792. kfree(req);
  1793. return -ENOMEM;
  1794. }
  1795. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1796. for (i = 0; i < req->mem_seg_len; i++) {
  1797. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1798. qdss_mem[i].va, &qdss_mem[i].pa,
  1799. qdss_mem[i].size, qdss_mem[i].type);
  1800. req->mem_seg[i].addr = qdss_mem[i].pa;
  1801. req->mem_seg[i].size = qdss_mem[i].size;
  1802. req->mem_seg[i].type = qdss_mem[i].type;
  1803. }
  1804. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1805. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1806. if (ret < 0) {
  1807. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1808. ret);
  1809. goto out;
  1810. }
  1811. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1812. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1813. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1814. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1815. if (ret < 0) {
  1816. qmi_txn_cancel(&txn);
  1817. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1818. ret);
  1819. goto out;
  1820. }
  1821. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1822. if (ret < 0) {
  1823. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1824. ret);
  1825. goto out;
  1826. }
  1827. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1828. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  1829. resp->resp.result, resp->resp.error);
  1830. ret = -resp->resp.result;
  1831. goto out;
  1832. }
  1833. kfree(req);
  1834. kfree(resp);
  1835. return 0;
  1836. out:
  1837. kfree(req);
  1838. kfree(resp);
  1839. return ret;
  1840. }
  1841. static int cnss_wlfw_wfc_call_status_send_sync
  1842. (struct cnss_plat_data *plat_priv,
  1843. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  1844. {
  1845. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1846. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1847. struct qmi_txn txn;
  1848. int ret = 0;
  1849. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1850. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  1851. return -EINVAL;
  1852. }
  1853. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1854. if (!req)
  1855. return -ENOMEM;
  1856. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1857. if (!resp) {
  1858. kfree(req);
  1859. return -ENOMEM;
  1860. }
  1861. /**
  1862. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  1863. * But in r2 update QMI structure is expanded and as an effect qmi
  1864. * decoded structures have padding. Thus we cannot use buffer design.
  1865. * For backward compatibility for r1 design copy only wfc_call_active
  1866. * value in hex buffer.
  1867. */
  1868. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  1869. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  1870. /* wfc_call_active is mandatory in IMS indication */
  1871. req->wfc_call_active_valid = 1;
  1872. req->wfc_call_active = ind_msg->wfc_call_active;
  1873. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  1874. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  1875. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  1876. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  1877. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  1878. req->twt_ims_start = ind_msg->twt_ims_start;
  1879. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  1880. req->twt_ims_int = ind_msg->twt_ims_int;
  1881. req->media_quality_valid = ind_msg->media_quality_valid;
  1882. req->media_quality =
  1883. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  1884. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1885. plat_priv->driver_state);
  1886. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1887. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1888. if (ret < 0) {
  1889. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1890. ret);
  1891. goto out;
  1892. }
  1893. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1894. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1895. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1896. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1897. if (ret < 0) {
  1898. qmi_txn_cancel(&txn);
  1899. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1900. ret);
  1901. goto out;
  1902. }
  1903. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1904. if (ret < 0) {
  1905. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1906. ret);
  1907. goto out;
  1908. }
  1909. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1910. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1911. resp->resp.result, resp->resp.error);
  1912. ret = -resp->resp.result;
  1913. goto out;
  1914. }
  1915. ret = 0;
  1916. out:
  1917. kfree(req);
  1918. kfree(resp);
  1919. return ret;
  1920. }
  1921. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  1922. {
  1923. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  1924. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  1925. struct qmi_txn txn;
  1926. int ret = 0;
  1927. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  1928. plat_priv->dynamic_feature,
  1929. plat_priv->driver_state);
  1930. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1931. if (!req)
  1932. return -ENOMEM;
  1933. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1934. if (!resp) {
  1935. kfree(req);
  1936. return -ENOMEM;
  1937. }
  1938. req->mask_valid = 1;
  1939. req->mask = plat_priv->dynamic_feature;
  1940. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1941. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  1942. if (ret < 0) {
  1943. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  1944. ret);
  1945. goto out;
  1946. }
  1947. ret = qmi_send_request
  1948. (&plat_priv->qmi_wlfw, NULL, &txn,
  1949. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  1950. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  1951. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  1952. if (ret < 0) {
  1953. qmi_txn_cancel(&txn);
  1954. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  1955. ret);
  1956. goto out;
  1957. }
  1958. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1959. if (ret < 0) {
  1960. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  1961. ret);
  1962. goto out;
  1963. }
  1964. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1965. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  1966. resp->resp.result, resp->resp.error);
  1967. ret = -resp->resp.result;
  1968. goto out;
  1969. }
  1970. out:
  1971. kfree(req);
  1972. kfree(resp);
  1973. return ret;
  1974. }
  1975. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  1976. void *cmd, int cmd_len)
  1977. {
  1978. struct wlfw_get_info_req_msg_v01 *req;
  1979. struct wlfw_get_info_resp_msg_v01 *resp;
  1980. struct qmi_txn txn;
  1981. int ret = 0;
  1982. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  1983. type, cmd_len, plat_priv->driver_state);
  1984. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  1985. return -EINVAL;
  1986. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1987. if (!req)
  1988. return -ENOMEM;
  1989. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1990. if (!resp) {
  1991. kfree(req);
  1992. return -ENOMEM;
  1993. }
  1994. req->type = type;
  1995. req->data_len = cmd_len;
  1996. memcpy(req->data, cmd, req->data_len);
  1997. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1998. wlfw_get_info_resp_msg_v01_ei, resp);
  1999. if (ret < 0) {
  2000. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  2001. ret);
  2002. goto out;
  2003. }
  2004. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2005. QMI_WLFW_GET_INFO_REQ_V01,
  2006. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2007. wlfw_get_info_req_msg_v01_ei, req);
  2008. if (ret < 0) {
  2009. qmi_txn_cancel(&txn);
  2010. cnss_pr_err("Failed to send get info request, err: %d\n",
  2011. ret);
  2012. goto out;
  2013. }
  2014. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2015. if (ret < 0) {
  2016. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  2017. ret);
  2018. goto out;
  2019. }
  2020. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2021. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  2022. resp->resp.result, resp->resp.error);
  2023. ret = -resp->resp.result;
  2024. goto out;
  2025. }
  2026. kfree(req);
  2027. kfree(resp);
  2028. return 0;
  2029. out:
  2030. kfree(req);
  2031. kfree(resp);
  2032. return ret;
  2033. }
  2034. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  2035. {
  2036. return QMI_WLFW_TIMEOUT_MS;
  2037. }
  2038. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2039. struct sockaddr_qrtr *sq,
  2040. struct qmi_txn *txn, const void *data)
  2041. {
  2042. struct cnss_plat_data *plat_priv =
  2043. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2044. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  2045. int i;
  2046. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  2047. if (!txn) {
  2048. cnss_pr_err("Spurious indication\n");
  2049. return;
  2050. }
  2051. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  2052. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  2053. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  2054. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2055. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  2056. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  2057. if (plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  2058. plat_priv->fw_mem[i].attrs |=
  2059. DMA_ATTR_FORCE_CONTIGUOUS;
  2060. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  2061. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  2062. }
  2063. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  2064. 0, NULL);
  2065. }
  2066. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2067. struct sockaddr_qrtr *sq,
  2068. struct qmi_txn *txn, const void *data)
  2069. {
  2070. struct cnss_plat_data *plat_priv =
  2071. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2072. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  2073. if (!txn) {
  2074. cnss_pr_err("Spurious indication\n");
  2075. return;
  2076. }
  2077. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  2078. 0, NULL);
  2079. }
  2080. /**
  2081. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  2082. *
  2083. * This event is not required for HST/ HSP as FW calibration done is
  2084. * provided in QMI_WLFW_CAL_DONE_IND_V01
  2085. */
  2086. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2087. struct sockaddr_qrtr *sq,
  2088. struct qmi_txn *txn, const void *data)
  2089. {
  2090. struct cnss_plat_data *plat_priv =
  2091. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2092. struct cnss_cal_info *cal_info;
  2093. if (!txn) {
  2094. cnss_pr_err("Spurious indication\n");
  2095. return;
  2096. }
  2097. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  2098. plat_priv->device_id == QCA6490_DEVICE_ID) {
  2099. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  2100. return;
  2101. }
  2102. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  2103. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2104. if (!cal_info)
  2105. return;
  2106. cal_info->cal_status = CNSS_CAL_DONE;
  2107. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2108. 0, cal_info);
  2109. }
  2110. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2111. struct sockaddr_qrtr *sq,
  2112. struct qmi_txn *txn, const void *data)
  2113. {
  2114. struct cnss_plat_data *plat_priv =
  2115. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2116. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  2117. if (!txn) {
  2118. cnss_pr_err("Spurious indication\n");
  2119. return;
  2120. }
  2121. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  2122. }
  2123. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  2124. struct sockaddr_qrtr *sq,
  2125. struct qmi_txn *txn, const void *data)
  2126. {
  2127. struct cnss_plat_data *plat_priv =
  2128. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2129. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  2130. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  2131. if (!txn) {
  2132. cnss_pr_err("Spurious indication\n");
  2133. return;
  2134. }
  2135. if (ind_msg->pwr_pin_result_valid)
  2136. plat_priv->pin_result.fw_pwr_pin_result =
  2137. ind_msg->pwr_pin_result;
  2138. if (ind_msg->phy_io_pin_result_valid)
  2139. plat_priv->pin_result.fw_phy_io_pin_result =
  2140. ind_msg->phy_io_pin_result;
  2141. if (ind_msg->rf_pin_result_valid)
  2142. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  2143. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  2144. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  2145. ind_msg->rf_pin_result);
  2146. }
  2147. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  2148. u32 cal_file_download_size)
  2149. {
  2150. struct wlfw_cal_report_req_msg_v01 req = {0};
  2151. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  2152. struct qmi_txn txn;
  2153. int ret = 0;
  2154. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  2155. cal_file_download_size, plat_priv->driver_state);
  2156. req.cal_file_download_size_valid = 1;
  2157. req.cal_file_download_size = cal_file_download_size;
  2158. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2159. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2160. if (ret < 0) {
  2161. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2162. ret);
  2163. goto out;
  2164. }
  2165. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2166. QMI_WLFW_CAL_REPORT_REQ_V01,
  2167. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2168. wlfw_cal_report_req_msg_v01_ei, &req);
  2169. if (ret < 0) {
  2170. qmi_txn_cancel(&txn);
  2171. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2172. ret);
  2173. goto out;
  2174. }
  2175. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2176. if (ret < 0) {
  2177. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2178. ret);
  2179. goto out;
  2180. }
  2181. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2182. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2183. resp.resp.result, resp.resp.error);
  2184. ret = -resp.resp.result;
  2185. goto out;
  2186. }
  2187. out:
  2188. return ret;
  2189. }
  2190. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2191. struct sockaddr_qrtr *sq,
  2192. struct qmi_txn *txn, const void *data)
  2193. {
  2194. struct cnss_plat_data *plat_priv =
  2195. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2196. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2197. struct cnss_cal_info *cal_info;
  2198. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2199. ind->cal_file_upload_size);
  2200. cnss_pr_info("Calibration took %d ms\n",
  2201. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2202. if (!txn) {
  2203. cnss_pr_err("Spurious indication\n");
  2204. return;
  2205. }
  2206. if (ind->cal_file_upload_size_valid)
  2207. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2208. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2209. if (!cal_info)
  2210. return;
  2211. cal_info->cal_status = CNSS_CAL_DONE;
  2212. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2213. 0, cal_info);
  2214. }
  2215. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2216. struct sockaddr_qrtr *sq,
  2217. struct qmi_txn *txn,
  2218. const void *data)
  2219. {
  2220. struct cnss_plat_data *plat_priv =
  2221. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2222. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2223. int i;
  2224. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2225. if (!txn) {
  2226. cnss_pr_err("Spurious indication\n");
  2227. return;
  2228. }
  2229. if (plat_priv->qdss_mem_seg_len) {
  2230. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2231. plat_priv->qdss_mem_seg_len);
  2232. return;
  2233. }
  2234. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2235. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2236. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2237. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2238. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2239. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2240. }
  2241. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2242. 0, NULL);
  2243. }
  2244. /**
  2245. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2246. *
  2247. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2248. * fw memory segment for dumping to file system. Only one type of mem can be
  2249. * saved per indication and is provided in mem seg index 0.
  2250. *
  2251. * Return: None
  2252. */
  2253. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2254. struct sockaddr_qrtr *sq,
  2255. struct qmi_txn *txn,
  2256. const void *data)
  2257. {
  2258. struct cnss_plat_data *plat_priv =
  2259. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2260. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2261. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2262. int i = 0;
  2263. if (!txn || !data) {
  2264. cnss_pr_err("Spurious indication\n");
  2265. return;
  2266. }
  2267. cnss_pr_dbg("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2268. ind_msg->source, ind_msg->mem_seg_valid,
  2269. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2270. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2271. if (!event_data)
  2272. return;
  2273. event_data->mem_type = ind_msg->mem_seg[0].type;
  2274. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2275. event_data->total_size = ind_msg->total_size;
  2276. if (ind_msg->mem_seg_valid) {
  2277. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2278. cnss_pr_err("Invalid seg len indication\n");
  2279. goto free_event_data;
  2280. }
  2281. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2282. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2283. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2284. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2285. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2286. goto free_event_data;
  2287. }
  2288. cnss_pr_dbg("seg-%d: addr 0x%llx size 0x%x\n",
  2289. i, ind_msg->mem_seg[i].addr,
  2290. ind_msg->mem_seg[i].size);
  2291. }
  2292. }
  2293. if (ind_msg->file_name_valid)
  2294. strlcpy(event_data->file_name, ind_msg->file_name,
  2295. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2296. if (ind_msg->source == 1) {
  2297. if (!ind_msg->file_name_valid)
  2298. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2299. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2300. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2301. 0, event_data);
  2302. } else {
  2303. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2304. if (!ind_msg->file_name_valid)
  2305. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2306. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2307. } else {
  2308. if (!ind_msg->file_name_valid)
  2309. strlcpy(event_data->file_name, "fw_mem_dump",
  2310. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2311. }
  2312. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2313. 0, event_data);
  2314. }
  2315. return;
  2316. free_event_data:
  2317. kfree(event_data);
  2318. }
  2319. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2320. struct sockaddr_qrtr *sq,
  2321. struct qmi_txn *txn,
  2322. const void *data)
  2323. {
  2324. struct cnss_plat_data *plat_priv =
  2325. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2326. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2327. 0, NULL);
  2328. }
  2329. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2330. struct sockaddr_qrtr *sq,
  2331. struct qmi_txn *txn,
  2332. const void *data)
  2333. {
  2334. struct cnss_plat_data *plat_priv =
  2335. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2336. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2337. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2338. if (!txn) {
  2339. cnss_pr_err("Spurious indication\n");
  2340. return;
  2341. }
  2342. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2343. ind_msg->data_len, ind_msg->type,
  2344. ind_msg->is_last, ind_msg->seq_no);
  2345. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2346. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2347. (void *)ind_msg->data,
  2348. ind_msg->data_len);
  2349. }
  2350. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2351. (struct cnss_plat_data *plat_priv,
  2352. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2353. {
  2354. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2355. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2356. struct qmi_txn txn;
  2357. int ret = 0;
  2358. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2359. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2360. return -EINVAL;
  2361. }
  2362. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2363. if (!req)
  2364. return -ENOMEM;
  2365. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2366. if (!resp) {
  2367. kfree(req);
  2368. return -ENOMEM;
  2369. }
  2370. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2371. req->twt_sta_start = ind_msg->twt_sta_start;
  2372. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2373. req->twt_sta_int = ind_msg->twt_sta_int;
  2374. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2375. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2376. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2377. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2378. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2379. req->twt_sta_dl = req->twt_sta_dl;
  2380. req->twt_sta_config_changed_valid =
  2381. ind_msg->twt_sta_config_changed_valid;
  2382. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2383. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2384. plat_priv->driver_state);
  2385. ret =
  2386. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2387. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2388. resp);
  2389. if (ret < 0) {
  2390. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2391. ret);
  2392. goto out;
  2393. }
  2394. ret =
  2395. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2396. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2397. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2398. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2399. if (ret < 0) {
  2400. qmi_txn_cancel(&txn);
  2401. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2402. goto out;
  2403. }
  2404. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2405. if (ret < 0) {
  2406. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2407. goto out;
  2408. }
  2409. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2410. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2411. resp->resp.result, resp->resp.error);
  2412. ret = -resp->resp.result;
  2413. goto out;
  2414. }
  2415. ret = 0;
  2416. out:
  2417. kfree(req);
  2418. kfree(resp);
  2419. return ret;
  2420. }
  2421. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2422. void *data)
  2423. {
  2424. int ret;
  2425. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2426. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2427. kfree(data);
  2428. return ret;
  2429. }
  2430. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2431. struct sockaddr_qrtr *sq,
  2432. struct qmi_txn *txn,
  2433. const void *data)
  2434. {
  2435. struct cnss_plat_data *plat_priv =
  2436. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2437. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2438. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2439. if (!txn) {
  2440. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2441. return;
  2442. }
  2443. if (!ind_msg) {
  2444. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2445. return;
  2446. }
  2447. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2448. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2449. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2450. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2451. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2452. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2453. ind_msg->twt_sta_config_changed_valid,
  2454. ind_msg->twt_sta_config_changed);
  2455. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2456. if (!event_data)
  2457. return;
  2458. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2459. event_data);
  2460. }
  2461. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2462. {
  2463. .type = QMI_INDICATION,
  2464. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2465. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2466. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2467. .fn = cnss_wlfw_request_mem_ind_cb
  2468. },
  2469. {
  2470. .type = QMI_INDICATION,
  2471. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2472. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2473. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2474. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2475. },
  2476. {
  2477. .type = QMI_INDICATION,
  2478. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2479. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2480. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2481. .fn = cnss_wlfw_fw_ready_ind_cb
  2482. },
  2483. {
  2484. .type = QMI_INDICATION,
  2485. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2486. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2487. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2488. .fn = cnss_wlfw_fw_init_done_ind_cb
  2489. },
  2490. {
  2491. .type = QMI_INDICATION,
  2492. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2493. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2494. .decoded_size =
  2495. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2496. .fn = cnss_wlfw_pin_result_ind_cb
  2497. },
  2498. {
  2499. .type = QMI_INDICATION,
  2500. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2501. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2502. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2503. .fn = cnss_wlfw_cal_done_ind_cb
  2504. },
  2505. {
  2506. .type = QMI_INDICATION,
  2507. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2508. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2509. .decoded_size =
  2510. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2511. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2512. },
  2513. {
  2514. .type = QMI_INDICATION,
  2515. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2516. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2517. .decoded_size =
  2518. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2519. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2520. },
  2521. {
  2522. .type = QMI_INDICATION,
  2523. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2524. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2525. .decoded_size =
  2526. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2527. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2528. },
  2529. {
  2530. .type = QMI_INDICATION,
  2531. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2532. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2533. .decoded_size =
  2534. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2535. .fn = cnss_wlfw_respond_get_info_ind_cb
  2536. },
  2537. {
  2538. .type = QMI_INDICATION,
  2539. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2540. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2541. .decoded_size =
  2542. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2543. .fn = cnss_wlfw_process_twt_cfg_ind
  2544. },
  2545. {}
  2546. };
  2547. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2548. void *data)
  2549. {
  2550. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2551. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2552. struct sockaddr_qrtr sq = { 0 };
  2553. int ret = 0;
  2554. if (!event_data)
  2555. return -EINVAL;
  2556. sq.sq_family = AF_QIPCRTR;
  2557. sq.sq_node = event_data->node;
  2558. sq.sq_port = event_data->port;
  2559. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2560. sizeof(sq), 0);
  2561. if (ret < 0) {
  2562. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2563. goto out;
  2564. }
  2565. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2566. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2567. plat_priv->driver_state);
  2568. kfree(data);
  2569. return 0;
  2570. out:
  2571. CNSS_QMI_ASSERT();
  2572. kfree(data);
  2573. return ret;
  2574. }
  2575. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2576. {
  2577. int ret = 0;
  2578. if (!plat_priv)
  2579. return -ENODEV;
  2580. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2581. cnss_pr_err("Unexpected WLFW server arrive\n");
  2582. CNSS_ASSERT(0);
  2583. return -EINVAL;
  2584. }
  2585. cnss_ignore_qmi_failure(false);
  2586. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2587. if (ret < 0)
  2588. goto out;
  2589. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2590. if (ret < 0) {
  2591. if (ret == -EALREADY)
  2592. ret = 0;
  2593. goto out;
  2594. }
  2595. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2596. if (ret < 0)
  2597. goto out;
  2598. return 0;
  2599. out:
  2600. return ret;
  2601. }
  2602. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2603. {
  2604. int ret;
  2605. if (!plat_priv)
  2606. return -ENODEV;
  2607. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2608. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2609. plat_priv->driver_state);
  2610. cnss_qmi_deinit(plat_priv);
  2611. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2612. ret = cnss_qmi_init(plat_priv);
  2613. if (ret < 0) {
  2614. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2615. CNSS_ASSERT(0);
  2616. }
  2617. return 0;
  2618. }
  2619. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2620. struct qmi_service *service)
  2621. {
  2622. struct cnss_plat_data *plat_priv =
  2623. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2624. struct cnss_qmi_event_server_arrive_data *event_data;
  2625. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2626. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2627. plat_priv->driver_state);
  2628. return 0;
  2629. }
  2630. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2631. service->node, service->port);
  2632. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2633. if (!event_data)
  2634. return -ENOMEM;
  2635. event_data->node = service->node;
  2636. event_data->port = service->port;
  2637. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2638. 0, event_data);
  2639. return 0;
  2640. }
  2641. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2642. struct qmi_service *service)
  2643. {
  2644. struct cnss_plat_data *plat_priv =
  2645. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2646. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2647. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2648. plat_priv->driver_state);
  2649. return;
  2650. }
  2651. cnss_pr_dbg("WLFW server exiting\n");
  2652. if (plat_priv) {
  2653. cnss_ignore_qmi_failure(true);
  2654. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2655. }
  2656. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2657. 0, NULL);
  2658. }
  2659. static struct qmi_ops qmi_wlfw_ops = {
  2660. .new_server = wlfw_new_server,
  2661. .del_server = wlfw_del_server,
  2662. };
  2663. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2664. {
  2665. int ret = 0;
  2666. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2667. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2668. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2669. if (ret < 0) {
  2670. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2671. ret);
  2672. goto out;
  2673. }
  2674. ret = qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2675. WLFW_SERVICE_VERS_V01, WLFW_SERVICE_INS_ID_V01);
  2676. if (ret < 0)
  2677. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2678. out:
  2679. return ret;
  2680. }
  2681. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2682. {
  2683. qmi_handle_release(&plat_priv->qmi_wlfw);
  2684. }
  2685. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2686. {
  2687. struct dms_get_mac_address_req_msg_v01 req;
  2688. struct dms_get_mac_address_resp_msg_v01 resp;
  2689. struct qmi_txn txn;
  2690. int ret = 0;
  2691. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2692. cnss_pr_err("DMS QMI connection not established\n");
  2693. return -EINVAL;
  2694. }
  2695. cnss_pr_dbg("Requesting DMS MAC address");
  2696. memset(&resp, 0, sizeof(resp));
  2697. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2698. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2699. if (ret < 0) {
  2700. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2701. ret);
  2702. goto out;
  2703. }
  2704. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2705. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2706. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2707. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2708. dms_get_mac_address_req_msg_v01_ei, &req);
  2709. if (ret < 0) {
  2710. qmi_txn_cancel(&txn);
  2711. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2712. ret);
  2713. goto out;
  2714. }
  2715. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2716. if (ret < 0) {
  2717. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2718. ret);
  2719. goto out;
  2720. }
  2721. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2722. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2723. resp.resp.result, resp.resp.error);
  2724. ret = -resp.resp.result;
  2725. goto out;
  2726. }
  2727. if (!resp.mac_address_valid ||
  2728. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2729. cnss_pr_err("Invalid MAC address received from DMS\n");
  2730. plat_priv->dms.mac_valid = false;
  2731. goto out;
  2732. }
  2733. plat_priv->dms.mac_valid = true;
  2734. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2735. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2736. out:
  2737. return ret;
  2738. }
  2739. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2740. unsigned int node, unsigned int port)
  2741. {
  2742. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2743. struct sockaddr_qrtr sq = {0};
  2744. int ret = 0;
  2745. sq.sq_family = AF_QIPCRTR;
  2746. sq.sq_node = node;
  2747. sq.sq_port = port;
  2748. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  2749. sizeof(sq), 0);
  2750. if (ret < 0) {
  2751. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  2752. node, port);
  2753. goto out;
  2754. }
  2755. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2756. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  2757. plat_priv->driver_state);
  2758. out:
  2759. return ret;
  2760. }
  2761. static int dms_new_server(struct qmi_handle *qmi_dms,
  2762. struct qmi_service *service)
  2763. {
  2764. struct cnss_plat_data *plat_priv =
  2765. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2766. if (!service)
  2767. return -EINVAL;
  2768. return cnss_dms_connect_to_server(plat_priv, service->node,
  2769. service->port);
  2770. }
  2771. static void dms_del_server(struct qmi_handle *qmi_dms,
  2772. struct qmi_service *service)
  2773. {
  2774. struct cnss_plat_data *plat_priv =
  2775. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2776. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2777. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  2778. plat_priv->driver_state);
  2779. }
  2780. static struct qmi_ops qmi_dms_ops = {
  2781. .new_server = dms_new_server,
  2782. .del_server = dms_del_server,
  2783. };
  2784. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  2785. {
  2786. int ret = 0;
  2787. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  2788. &qmi_dms_ops, NULL);
  2789. if (ret < 0) {
  2790. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  2791. goto out;
  2792. }
  2793. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  2794. DMS_SERVICE_VERS_V01, 0);
  2795. if (ret < 0)
  2796. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  2797. out:
  2798. return ret;
  2799. }
  2800. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  2801. {
  2802. qmi_handle_release(&plat_priv->qmi_dms);
  2803. }
  2804. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  2805. {
  2806. int ret;
  2807. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  2808. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  2809. struct qmi_txn txn;
  2810. if (!plat_priv)
  2811. return -ENODEV;
  2812. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  2813. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2814. if (!req)
  2815. return -ENOMEM;
  2816. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2817. if (!resp) {
  2818. kfree(req);
  2819. return -ENOMEM;
  2820. }
  2821. req->antenna = plat_priv->antenna;
  2822. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2823. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  2824. if (ret < 0) {
  2825. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  2826. ret);
  2827. goto out;
  2828. }
  2829. ret = qmi_send_request
  2830. (&plat_priv->coex_qmi, NULL, &txn,
  2831. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  2832. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  2833. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  2834. if (ret < 0) {
  2835. qmi_txn_cancel(&txn);
  2836. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  2837. ret);
  2838. goto out;
  2839. }
  2840. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2841. if (ret < 0) {
  2842. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  2843. ret);
  2844. goto out;
  2845. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2846. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  2847. resp->resp.result, resp->resp.error);
  2848. ret = -resp->resp.result;
  2849. goto out;
  2850. }
  2851. if (resp->grant_valid)
  2852. plat_priv->grant = resp->grant;
  2853. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  2854. kfree(resp);
  2855. kfree(req);
  2856. return 0;
  2857. out:
  2858. kfree(resp);
  2859. kfree(req);
  2860. return ret;
  2861. }
  2862. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  2863. {
  2864. int ret;
  2865. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  2866. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  2867. struct qmi_txn txn;
  2868. if (!plat_priv)
  2869. return -ENODEV;
  2870. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  2871. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2872. if (!req)
  2873. return -ENOMEM;
  2874. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2875. if (!resp) {
  2876. kfree(req);
  2877. return -ENOMEM;
  2878. }
  2879. req->antenna = plat_priv->antenna;
  2880. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2881. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  2882. if (ret < 0) {
  2883. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  2884. ret);
  2885. goto out;
  2886. }
  2887. ret = qmi_send_request
  2888. (&plat_priv->coex_qmi, NULL, &txn,
  2889. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  2890. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  2891. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  2892. if (ret < 0) {
  2893. qmi_txn_cancel(&txn);
  2894. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  2895. ret);
  2896. goto out;
  2897. }
  2898. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2899. if (ret < 0) {
  2900. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  2901. ret);
  2902. goto out;
  2903. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2904. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  2905. resp->resp.result, resp->resp.error);
  2906. ret = -resp->resp.result;
  2907. goto out;
  2908. }
  2909. kfree(resp);
  2910. kfree(req);
  2911. return 0;
  2912. out:
  2913. kfree(resp);
  2914. kfree(req);
  2915. return ret;
  2916. }
  2917. int cnss_send_subsys_restart_level_msg(struct cnss_plat_data *plat_priv)
  2918. {
  2919. int ret;
  2920. struct wlfw_subsys_restart_level_req_msg_v01 req;
  2921. struct wlfw_subsys_restart_level_resp_msg_v01 resp;
  2922. u8 pcss_enabled;
  2923. if (!plat_priv)
  2924. return -ENODEV;
  2925. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  2926. cnss_pr_err("Can't send pcss cmd before fw ready\n");
  2927. return -EINVAL;
  2928. }
  2929. pcss_enabled = plat_priv->recovery_pcss_enabled;
  2930. cnss_pr_dbg("Sending pcss recovery status: %d\n", pcss_enabled);
  2931. req.restart_level_type_valid = 1;
  2932. req.restart_level_type = pcss_enabled;
  2933. ret = qmi_send_wait(&plat_priv->qmi_wlfw, &req, &resp,
  2934. wlfw_subsys_restart_level_req_msg_v01_ei,
  2935. wlfw_subsys_restart_level_resp_msg_v01_ei,
  2936. QMI_WLFW_SUBSYS_RESTART_LEVEL_REQ_V01,
  2937. WLFW_SUBSYS_RESTART_LEVEL_REQ_MSG_V01_MAX_MSG_LEN,
  2938. QMI_WLFW_TIMEOUT_JF);
  2939. return ret;
  2940. }
  2941. static int coex_new_server(struct qmi_handle *qmi,
  2942. struct qmi_service *service)
  2943. {
  2944. struct cnss_plat_data *plat_priv =
  2945. container_of(qmi, struct cnss_plat_data, coex_qmi);
  2946. struct sockaddr_qrtr sq = { 0 };
  2947. int ret = 0;
  2948. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  2949. service->node, service->port);
  2950. sq.sq_family = AF_QIPCRTR;
  2951. sq.sq_node = service->node;
  2952. sq.sq_port = service->port;
  2953. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  2954. if (ret < 0) {
  2955. cnss_pr_err("Fail to connect to remote service port\n");
  2956. return ret;
  2957. }
  2958. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  2959. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  2960. plat_priv->driver_state);
  2961. return 0;
  2962. }
  2963. static void coex_del_server(struct qmi_handle *qmi,
  2964. struct qmi_service *service)
  2965. {
  2966. struct cnss_plat_data *plat_priv =
  2967. container_of(qmi, struct cnss_plat_data, coex_qmi);
  2968. cnss_pr_dbg("COEX server exit\n");
  2969. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  2970. }
  2971. static struct qmi_ops coex_qmi_ops = {
  2972. .new_server = coex_new_server,
  2973. .del_server = coex_del_server,
  2974. };
  2975. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  2976. { int ret;
  2977. ret = qmi_handle_init(&plat_priv->coex_qmi,
  2978. COEX_SERVICE_MAX_MSG_LEN,
  2979. &coex_qmi_ops, NULL);
  2980. if (ret < 0)
  2981. return ret;
  2982. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  2983. COEX_SERVICE_VERS_V01, 0);
  2984. return ret;
  2985. }
  2986. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  2987. {
  2988. qmi_handle_release(&plat_priv->coex_qmi);
  2989. }
  2990. /* IMS Service */
  2991. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  2992. {
  2993. int ret;
  2994. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  2995. struct qmi_txn *txn;
  2996. if (!plat_priv)
  2997. return -ENODEV;
  2998. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  2999. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3000. if (!req)
  3001. return -ENOMEM;
  3002. req->wfc_call_status_valid = 1;
  3003. req->wfc_call_status = 1;
  3004. txn = &plat_priv->txn;
  3005. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  3006. if (ret < 0) {
  3007. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  3008. ret);
  3009. goto out;
  3010. }
  3011. ret = qmi_send_request
  3012. (&plat_priv->ims_qmi, NULL, txn,
  3013. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3014. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  3015. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  3016. if (ret < 0) {
  3017. qmi_txn_cancel(txn);
  3018. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  3019. ret);
  3020. goto out;
  3021. }
  3022. kfree(req);
  3023. return 0;
  3024. out:
  3025. kfree(req);
  3026. return ret;
  3027. }
  3028. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  3029. struct sockaddr_qrtr *sq,
  3030. struct qmi_txn *txn,
  3031. const void *data)
  3032. {
  3033. const
  3034. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  3035. data;
  3036. cnss_pr_dbg("Received IMS subscribe indication response\n");
  3037. if (!txn) {
  3038. cnss_pr_err("spurious response\n");
  3039. return;
  3040. }
  3041. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3042. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  3043. resp->resp.result, resp->resp.error);
  3044. txn->result = -resp->resp.result;
  3045. }
  3046. }
  3047. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  3048. void *data)
  3049. {
  3050. int ret;
  3051. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3052. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  3053. kfree(data);
  3054. return ret;
  3055. }
  3056. static void
  3057. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  3058. struct sockaddr_qrtr *sq,
  3059. struct qmi_txn *txn, const void *data)
  3060. {
  3061. struct cnss_plat_data *plat_priv =
  3062. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  3063. const
  3064. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3065. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  3066. if (!txn) {
  3067. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  3068. return;
  3069. }
  3070. if (!ind_msg) {
  3071. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  3072. return;
  3073. }
  3074. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  3075. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  3076. ind_msg->all_wfc_calls_held,
  3077. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  3078. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  3079. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  3080. ind_msg->media_quality_valid, ind_msg->media_quality);
  3081. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  3082. if (!event_data)
  3083. return;
  3084. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  3085. 0, event_data);
  3086. }
  3087. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  3088. {
  3089. .type = QMI_RESPONSE,
  3090. .msg_id =
  3091. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3092. .ei =
  3093. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  3094. .decoded_size = sizeof(struct
  3095. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  3096. .fn = ims_subscribe_for_indication_resp_cb
  3097. },
  3098. {
  3099. .type = QMI_INDICATION,
  3100. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  3101. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  3102. .decoded_size =
  3103. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  3104. .fn = cnss_ims_process_wfc_call_ind_cb
  3105. },
  3106. {}
  3107. };
  3108. static int ims_new_server(struct qmi_handle *qmi,
  3109. struct qmi_service *service)
  3110. {
  3111. struct cnss_plat_data *plat_priv =
  3112. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3113. struct sockaddr_qrtr sq = { 0 };
  3114. int ret = 0;
  3115. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  3116. service->node, service->port);
  3117. sq.sq_family = AF_QIPCRTR;
  3118. sq.sq_node = service->node;
  3119. sq.sq_port = service->port;
  3120. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3121. if (ret < 0) {
  3122. cnss_pr_err("Fail to connect to remote service port\n");
  3123. return ret;
  3124. }
  3125. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3126. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  3127. plat_priv->driver_state);
  3128. ret = ims_subscribe_for_indication_send_async(plat_priv);
  3129. return ret;
  3130. }
  3131. static void ims_del_server(struct qmi_handle *qmi,
  3132. struct qmi_service *service)
  3133. {
  3134. struct cnss_plat_data *plat_priv =
  3135. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3136. cnss_pr_dbg("IMS server exit\n");
  3137. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3138. }
  3139. static struct qmi_ops ims_qmi_ops = {
  3140. .new_server = ims_new_server,
  3141. .del_server = ims_del_server,
  3142. };
  3143. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  3144. { int ret;
  3145. ret = qmi_handle_init(&plat_priv->ims_qmi,
  3146. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  3147. &ims_qmi_ops, qmi_ims_msg_handlers);
  3148. if (ret < 0)
  3149. return ret;
  3150. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  3151. IMSPRIVATE_SERVICE_VERS_V01, 0);
  3152. return ret;
  3153. }
  3154. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  3155. {
  3156. qmi_handle_release(&plat_priv->ims_qmi);
  3157. }