main.c 104 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/version.h>
  20. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  21. #include <linux/panic_notifier.h>
  22. #endif
  23. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  24. #include <soc/qcom/minidump.h>
  25. #endif
  26. #include "cnss_plat_ipc_qmi.h"
  27. #include "cnss_utils.h"
  28. #include "main.h"
  29. #include "bus.h"
  30. #include "debug.h"
  31. #include "genl.h"
  32. #include "reg.h"
  33. #define CNSS_DUMP_FORMAT_VER 0x11
  34. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  35. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  36. #define CNSS_DUMP_NAME "CNSS_WLAN"
  37. #define CNSS_DUMP_DESC_SIZE 0x1000
  38. #define CNSS_DUMP_SEG_VER 0x1
  39. #define FILE_SYSTEM_READY 1
  40. #define FW_READY_TIMEOUT 20000
  41. #define FW_ASSERT_TIMEOUT 5000
  42. #define CNSS_EVENT_PENDING 2989
  43. #define POWER_RESET_MIN_DELAY_MS 100
  44. #define CNSS_QUIRKS_DEFAULT 0
  45. #ifdef CONFIG_CNSS_EMULATION
  46. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  47. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  48. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  49. #else
  50. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  51. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  52. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  53. #endif
  54. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  55. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  56. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  57. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  58. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  59. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  60. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  61. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  62. enum cnss_cal_db_op {
  63. CNSS_CAL_DB_UPLOAD,
  64. CNSS_CAL_DB_DOWNLOAD,
  65. CNSS_CAL_DB_INVALID_OP,
  66. };
  67. enum cnss_recovery_type {
  68. CNSS_WLAN_RECOVERY = 0x1,
  69. CNSS_PCSS_RECOVERY = 0x2,
  70. };
  71. static struct cnss_plat_data *plat_env;
  72. static DECLARE_RWSEM(cnss_pm_sem);
  73. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  74. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  75. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  76. };
  77. static struct cnss_fw_files FW_FILES_DEFAULT = {
  78. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  79. "utfbd.bin", "epping.bin", "evicted.bin"
  80. };
  81. struct cnss_driver_event {
  82. struct list_head list;
  83. enum cnss_driver_event_type type;
  84. bool sync;
  85. struct completion complete;
  86. int ret;
  87. void *data;
  88. };
  89. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  90. struct cnss_plat_data *plat_priv)
  91. {
  92. plat_env = plat_priv;
  93. }
  94. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  95. {
  96. return plat_env;
  97. }
  98. /**
  99. * cnss_get_mem_seg_count - Get segment count of memory
  100. * @type: memory type
  101. * @seg: segment count
  102. *
  103. * Return: 0 on success, negative value on failure
  104. */
  105. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  106. {
  107. struct cnss_plat_data *plat_priv;
  108. plat_priv = cnss_get_plat_priv(NULL);
  109. if (!plat_priv)
  110. return -ENODEV;
  111. switch (type) {
  112. case CNSS_REMOTE_MEM_TYPE_FW:
  113. *seg = plat_priv->fw_mem_seg_len;
  114. break;
  115. case CNSS_REMOTE_MEM_TYPE_QDSS:
  116. *seg = plat_priv->qdss_mem_seg_len;
  117. break;
  118. default:
  119. return -EINVAL;
  120. }
  121. return 0;
  122. }
  123. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  124. /**
  125. * cnss_get_mem_segment_info - Get memory info of different type
  126. * @type: memory type
  127. * @segment: array to save the segment info
  128. * @seg: segment count
  129. *
  130. * Return: 0 on success, negative value on failure
  131. */
  132. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  133. struct cnss_mem_segment segment[],
  134. u32 segment_count)
  135. {
  136. struct cnss_plat_data *plat_priv;
  137. u32 i;
  138. plat_priv = cnss_get_plat_priv(NULL);
  139. if (!plat_priv)
  140. return -ENODEV;
  141. switch (type) {
  142. case CNSS_REMOTE_MEM_TYPE_FW:
  143. if (segment_count > plat_priv->fw_mem_seg_len)
  144. segment_count = plat_priv->fw_mem_seg_len;
  145. for (i = 0; i < segment_count; i++) {
  146. segment[i].size = plat_priv->fw_mem[i].size;
  147. segment[i].va = plat_priv->fw_mem[i].va;
  148. segment[i].pa = plat_priv->fw_mem[i].pa;
  149. }
  150. break;
  151. case CNSS_REMOTE_MEM_TYPE_QDSS:
  152. if (segment_count > plat_priv->qdss_mem_seg_len)
  153. segment_count = plat_priv->qdss_mem_seg_len;
  154. for (i = 0; i < segment_count; i++) {
  155. segment[i].size = plat_priv->qdss_mem[i].size;
  156. segment[i].va = plat_priv->qdss_mem[i].va;
  157. segment[i].pa = plat_priv->qdss_mem[i].pa;
  158. }
  159. break;
  160. default:
  161. return -EINVAL;
  162. }
  163. return 0;
  164. }
  165. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  166. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  167. enum cnss_feature_v01 feature)
  168. {
  169. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  170. return -EINVAL;
  171. plat_priv->feature_list |= 1 << feature;
  172. return 0;
  173. }
  174. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  175. enum cnss_feature_v01 feature)
  176. {
  177. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  178. return -EINVAL;
  179. plat_priv->feature_list &= ~(1 << feature);
  180. return 0;
  181. }
  182. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  183. u64 *feature_list)
  184. {
  185. if (unlikely(!plat_priv))
  186. return -EINVAL;
  187. *feature_list = plat_priv->feature_list;
  188. return 0;
  189. }
  190. static int cnss_pm_notify(struct notifier_block *b,
  191. unsigned long event, void *p)
  192. {
  193. switch (event) {
  194. case PM_SUSPEND_PREPARE:
  195. down_write(&cnss_pm_sem);
  196. break;
  197. case PM_POST_SUSPEND:
  198. up_write(&cnss_pm_sem);
  199. break;
  200. }
  201. return NOTIFY_DONE;
  202. }
  203. static struct notifier_block cnss_pm_notifier = {
  204. .notifier_call = cnss_pm_notify,
  205. };
  206. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  207. {
  208. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  209. return;
  210. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  211. plat_priv->driver_state,
  212. atomic_read(&plat_priv->pm_count));
  213. pm_stay_awake(&plat_priv->plat_dev->dev);
  214. }
  215. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  216. {
  217. int r = atomic_dec_return(&plat_priv->pm_count);
  218. WARN_ON(r < 0);
  219. if (r != 0)
  220. return;
  221. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  222. plat_priv->driver_state,
  223. atomic_read(&plat_priv->pm_count));
  224. pm_relax(&plat_priv->plat_dev->dev);
  225. }
  226. void cnss_lock_pm_sem(struct device *dev)
  227. {
  228. down_read(&cnss_pm_sem);
  229. }
  230. EXPORT_SYMBOL(cnss_lock_pm_sem);
  231. void cnss_release_pm_sem(struct device *dev)
  232. {
  233. up_read(&cnss_pm_sem);
  234. }
  235. EXPORT_SYMBOL(cnss_release_pm_sem);
  236. int cnss_get_fw_files_for_target(struct device *dev,
  237. struct cnss_fw_files *pfw_files,
  238. u32 target_type, u32 target_version)
  239. {
  240. if (!pfw_files)
  241. return -ENODEV;
  242. switch (target_version) {
  243. case QCA6174_REV3_VERSION:
  244. case QCA6174_REV3_2_VERSION:
  245. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  246. break;
  247. default:
  248. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  249. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  250. target_type, target_version);
  251. break;
  252. }
  253. return 0;
  254. }
  255. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  256. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  257. {
  258. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  259. if (!plat_priv)
  260. return -ENODEV;
  261. if (!cap)
  262. return -EINVAL;
  263. *cap = plat_priv->cap;
  264. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  265. return 0;
  266. }
  267. EXPORT_SYMBOL(cnss_get_platform_cap);
  268. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  269. {
  270. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  271. if (!plat_priv)
  272. return;
  273. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  274. }
  275. EXPORT_SYMBOL(cnss_request_pm_qos);
  276. void cnss_remove_pm_qos(struct device *dev)
  277. {
  278. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  279. if (!plat_priv)
  280. return;
  281. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  282. }
  283. EXPORT_SYMBOL(cnss_remove_pm_qos);
  284. int cnss_wlan_enable(struct device *dev,
  285. struct cnss_wlan_enable_cfg *config,
  286. enum cnss_driver_mode mode,
  287. const char *host_version)
  288. {
  289. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  290. int ret = 0;
  291. if (!plat_priv)
  292. return -ENODEV;
  293. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  294. return 0;
  295. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  296. return 0;
  297. if (!config || !host_version) {
  298. cnss_pr_err("Invalid config or host_version pointer\n");
  299. return -EINVAL;
  300. }
  301. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  302. mode, config, host_version);
  303. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  304. goto skip_cfg;
  305. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  306. if (ret)
  307. goto out;
  308. skip_cfg:
  309. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  310. out:
  311. return ret;
  312. }
  313. EXPORT_SYMBOL(cnss_wlan_enable);
  314. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  315. {
  316. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  317. int ret = 0;
  318. if (!plat_priv)
  319. return -ENODEV;
  320. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  321. return 0;
  322. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  323. return 0;
  324. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  325. cnss_bus_free_qdss_mem(plat_priv);
  326. return ret;
  327. }
  328. EXPORT_SYMBOL(cnss_wlan_disable);
  329. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  330. u32 data_len, u8 *output)
  331. {
  332. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  333. int ret = 0;
  334. if (!plat_priv) {
  335. cnss_pr_err("plat_priv is NULL!\n");
  336. return -EINVAL;
  337. }
  338. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  339. return 0;
  340. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  341. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  342. plat_priv->driver_state);
  343. ret = -EINVAL;
  344. goto out;
  345. }
  346. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  347. data_len, output);
  348. out:
  349. return ret;
  350. }
  351. EXPORT_SYMBOL(cnss_athdiag_read);
  352. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  353. u32 data_len, u8 *input)
  354. {
  355. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  356. int ret = 0;
  357. if (!plat_priv) {
  358. cnss_pr_err("plat_priv is NULL!\n");
  359. return -EINVAL;
  360. }
  361. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  362. return 0;
  363. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  364. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  365. plat_priv->driver_state);
  366. ret = -EINVAL;
  367. goto out;
  368. }
  369. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  370. data_len, input);
  371. out:
  372. return ret;
  373. }
  374. EXPORT_SYMBOL(cnss_athdiag_write);
  375. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  376. {
  377. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  378. if (!plat_priv)
  379. return -ENODEV;
  380. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  381. return 0;
  382. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  383. }
  384. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  385. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  386. {
  387. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  388. if (!plat_priv)
  389. return -EINVAL;
  390. if (plat_priv->device_id != QCA6490_DEVICE_ID ||
  391. !plat_priv->fw_pcie_gen_switch)
  392. return -EOPNOTSUPP;
  393. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  394. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  395. return -EINVAL;
  396. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  397. plat_priv->pcie_gen_speed = pcie_gen_speed;
  398. return 0;
  399. }
  400. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  401. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  402. {
  403. int ret = 0;
  404. if (!plat_priv)
  405. return -ENODEV;
  406. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  407. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  408. if (ret)
  409. goto out;
  410. if (plat_priv->hds_enabled)
  411. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  412. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  413. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  414. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  415. plat_priv->ctrl_params.bdf_type);
  416. if (ret)
  417. goto out;
  418. ret = cnss_bus_load_m3(plat_priv);
  419. if (ret)
  420. goto out;
  421. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  422. if (ret)
  423. goto out;
  424. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  425. return 0;
  426. out:
  427. return ret;
  428. }
  429. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  430. {
  431. int ret = 0;
  432. if (!plat_priv->antenna) {
  433. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  434. if (ret)
  435. goto out;
  436. }
  437. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  438. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  439. if (ret)
  440. goto out;
  441. }
  442. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  443. if (ret)
  444. goto out;
  445. return 0;
  446. out:
  447. return ret;
  448. }
  449. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  450. {
  451. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  452. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  453. }
  454. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  455. {
  456. u32 i;
  457. int ret = 0;
  458. struct cnss_plat_ipc_daemon_config *cfg;
  459. ret = cnss_qmi_get_dms_mac(plat_priv);
  460. if (ret == 0 && plat_priv->dms.mac_valid)
  461. goto qmi_send;
  462. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  463. * Thus assert on failure to get MAC from DMS even after retries
  464. */
  465. if (plat_priv->use_nv_mac) {
  466. /* Check if Daemon says platform support DMS MAC provisioning */
  467. cfg = cnss_plat_ipc_qmi_daemon_config();
  468. if (cfg) {
  469. if (!cfg->dms_mac_addr_supported) {
  470. cnss_pr_err("DMS MAC address not supported\n");
  471. CNSS_ASSERT(0);
  472. return -EINVAL;
  473. }
  474. }
  475. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  476. if (plat_priv->dms.mac_valid)
  477. break;
  478. ret = cnss_qmi_get_dms_mac(plat_priv);
  479. if (ret == 0)
  480. break;
  481. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  482. }
  483. if (!plat_priv->dms.mac_valid) {
  484. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  485. CNSS_ASSERT(0);
  486. return -EINVAL;
  487. }
  488. }
  489. qmi_send:
  490. if (plat_priv->dms.mac_valid)
  491. ret =
  492. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  493. ARRAY_SIZE(plat_priv->dms.mac));
  494. return ret;
  495. }
  496. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  497. enum cnss_cal_db_op op, u32 *size)
  498. {
  499. int ret = 0;
  500. u32 timeout = cnss_get_timeout(plat_priv,
  501. CNSS_TIMEOUT_DAEMON_CONNECTION);
  502. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  503. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  504. if (op >= CNSS_CAL_DB_INVALID_OP)
  505. return -EINVAL;
  506. if (!plat_priv->cbc_file_download) {
  507. cnss_pr_info("CAL DB file not required as per BDF\n");
  508. return 0;
  509. }
  510. if (*size == 0) {
  511. cnss_pr_err("Invalid cal file size\n");
  512. return -EINVAL;
  513. }
  514. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  515. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  516. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  517. msecs_to_jiffies(timeout));
  518. if (!ret) {
  519. cnss_pr_err("Daemon not yet connected\n");
  520. CNSS_ASSERT(0);
  521. return ret;
  522. }
  523. }
  524. if (!plat_priv->cal_mem->va) {
  525. cnss_pr_err("CAL DB Memory not setup for FW\n");
  526. return -EINVAL;
  527. }
  528. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  529. if (op == CNSS_CAL_DB_DOWNLOAD) {
  530. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  531. ret = cnss_plat_ipc_qmi_file_download(client_id,
  532. CNSS_CAL_DB_FILE_NAME,
  533. plat_priv->cal_mem->va,
  534. size);
  535. } else {
  536. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  537. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  538. CNSS_CAL_DB_FILE_NAME,
  539. plat_priv->cal_mem->va,
  540. *size);
  541. }
  542. if (ret)
  543. cnss_pr_err("Cal DB file %s %s failure\n",
  544. CNSS_CAL_DB_FILE_NAME,
  545. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  546. else
  547. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  548. CNSS_CAL_DB_FILE_NAME,
  549. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  550. *size);
  551. return ret;
  552. }
  553. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  554. {
  555. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  556. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  557. return -EINVAL;
  558. }
  559. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  560. &plat_priv->cal_file_size);
  561. }
  562. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  563. u32 *cal_file_size)
  564. {
  565. /* To download pass the total size of cal DB mem allocated.
  566. * After cal file is download to mem, its size is updated in
  567. * return pointer
  568. */
  569. *cal_file_size = plat_priv->cal_mem->size;
  570. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  571. cal_file_size);
  572. }
  573. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  574. {
  575. int ret = 0;
  576. u32 cal_file_size = 0;
  577. if (!plat_priv)
  578. return -ENODEV;
  579. cnss_pr_dbg("Processing FW Init Done..\n");
  580. del_timer(&plat_priv->fw_boot_timer);
  581. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  582. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  583. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  584. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  585. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  586. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  587. }
  588. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  589. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  590. CNSS_WALTEST);
  591. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  592. cnss_request_antenna_sharing(plat_priv);
  593. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  594. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  595. plat_priv->cal_time = jiffies;
  596. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  597. CNSS_CALIBRATION);
  598. } else {
  599. ret = cnss_setup_dms_mac(plat_priv);
  600. ret = cnss_bus_call_driver_probe(plat_priv);
  601. }
  602. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  603. goto out;
  604. else if (ret)
  605. goto shutdown;
  606. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  607. return 0;
  608. shutdown:
  609. cnss_bus_dev_shutdown(plat_priv);
  610. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  611. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  612. out:
  613. return ret;
  614. }
  615. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  616. {
  617. switch (type) {
  618. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  619. return "SERVER_ARRIVE";
  620. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  621. return "SERVER_EXIT";
  622. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  623. return "REQUEST_MEM";
  624. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  625. return "FW_MEM_READY";
  626. case CNSS_DRIVER_EVENT_FW_READY:
  627. return "FW_READY";
  628. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  629. return "COLD_BOOT_CAL_START";
  630. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  631. return "COLD_BOOT_CAL_DONE";
  632. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  633. return "REGISTER_DRIVER";
  634. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  635. return "UNREGISTER_DRIVER";
  636. case CNSS_DRIVER_EVENT_RECOVERY:
  637. return "RECOVERY";
  638. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  639. return "FORCE_FW_ASSERT";
  640. case CNSS_DRIVER_EVENT_POWER_UP:
  641. return "POWER_UP";
  642. case CNSS_DRIVER_EVENT_POWER_DOWN:
  643. return "POWER_DOWN";
  644. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  645. return "IDLE_RESTART";
  646. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  647. return "IDLE_SHUTDOWN";
  648. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  649. return "IMS_WFC_CALL_IND";
  650. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  651. return "WLFW_TWC_CFG_IND";
  652. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  653. return "QDSS_TRACE_REQ_MEM";
  654. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  655. return "FW_MEM_FILE_SAVE";
  656. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  657. return "QDSS_TRACE_FREE";
  658. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  659. return "QDSS_TRACE_REQ_DATA";
  660. case CNSS_DRIVER_EVENT_MAX:
  661. return "EVENT_MAX";
  662. }
  663. return "UNKNOWN";
  664. };
  665. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  666. enum cnss_driver_event_type type,
  667. u32 flags, void *data)
  668. {
  669. struct cnss_driver_event *event;
  670. unsigned long irq_flags;
  671. int gfp = GFP_KERNEL;
  672. int ret = 0;
  673. if (!plat_priv)
  674. return -ENODEV;
  675. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  676. cnss_driver_event_to_str(type), type,
  677. flags ? "-sync" : "", plat_priv->driver_state, flags);
  678. if (type >= CNSS_DRIVER_EVENT_MAX) {
  679. cnss_pr_err("Invalid Event type: %d, can't post", type);
  680. return -EINVAL;
  681. }
  682. if (in_interrupt() || irqs_disabled())
  683. gfp = GFP_ATOMIC;
  684. event = kzalloc(sizeof(*event), gfp);
  685. if (!event)
  686. return -ENOMEM;
  687. cnss_pm_stay_awake(plat_priv);
  688. event->type = type;
  689. event->data = data;
  690. init_completion(&event->complete);
  691. event->ret = CNSS_EVENT_PENDING;
  692. event->sync = !!(flags & CNSS_EVENT_SYNC);
  693. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  694. list_add_tail(&event->list, &plat_priv->event_list);
  695. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  696. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  697. if (!(flags & CNSS_EVENT_SYNC))
  698. goto out;
  699. if (flags & CNSS_EVENT_UNKILLABLE)
  700. wait_for_completion(&event->complete);
  701. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  702. ret = wait_for_completion_killable(&event->complete);
  703. else
  704. ret = wait_for_completion_interruptible(&event->complete);
  705. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  706. cnss_driver_event_to_str(type), type,
  707. plat_priv->driver_state, ret, event->ret);
  708. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  709. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  710. event->sync = false;
  711. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  712. ret = -EINTR;
  713. goto out;
  714. }
  715. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  716. ret = event->ret;
  717. kfree(event);
  718. out:
  719. cnss_pm_relax(plat_priv);
  720. return ret;
  721. }
  722. /**
  723. * cnss_get_timeout - Get timeout for corresponding type.
  724. * @plat_priv: Pointer to platform driver context.
  725. * @cnss_timeout_type: Timeout type.
  726. *
  727. * Return: Timeout in milliseconds.
  728. */
  729. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  730. enum cnss_timeout_type timeout_type)
  731. {
  732. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  733. switch (timeout_type) {
  734. case CNSS_TIMEOUT_QMI:
  735. return qmi_timeout;
  736. case CNSS_TIMEOUT_POWER_UP:
  737. return (qmi_timeout << 2);
  738. case CNSS_TIMEOUT_IDLE_RESTART:
  739. /* In idle restart power up sequence, we have fw_boot_timer to
  740. * handle FW initialization failure.
  741. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  742. * account for FW dump collection and FW re-initialization on
  743. * retry.
  744. */
  745. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  746. case CNSS_TIMEOUT_CALIBRATION:
  747. /* Similar to mission mode, in CBC if FW init fails
  748. * fw recovery is tried. Thus return 2x the CBC timeout.
  749. */
  750. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  751. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  752. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  753. case CNSS_TIMEOUT_RDDM:
  754. return CNSS_RDDM_TIMEOUT_MS;
  755. case CNSS_TIMEOUT_RECOVERY:
  756. return RECOVERY_TIMEOUT;
  757. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  758. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  759. default:
  760. return qmi_timeout;
  761. }
  762. }
  763. unsigned int cnss_get_boot_timeout(struct device *dev)
  764. {
  765. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  766. if (!plat_priv) {
  767. cnss_pr_err("plat_priv is NULL\n");
  768. return 0;
  769. }
  770. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  771. }
  772. EXPORT_SYMBOL(cnss_get_boot_timeout);
  773. int cnss_power_up(struct device *dev)
  774. {
  775. int ret = 0;
  776. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  777. unsigned int timeout;
  778. if (!plat_priv) {
  779. cnss_pr_err("plat_priv is NULL\n");
  780. return -ENODEV;
  781. }
  782. cnss_pr_dbg("Powering up device\n");
  783. ret = cnss_driver_event_post(plat_priv,
  784. CNSS_DRIVER_EVENT_POWER_UP,
  785. CNSS_EVENT_SYNC, NULL);
  786. if (ret)
  787. goto out;
  788. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  789. goto out;
  790. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  791. reinit_completion(&plat_priv->power_up_complete);
  792. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  793. msecs_to_jiffies(timeout));
  794. if (!ret) {
  795. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  796. timeout);
  797. ret = -EAGAIN;
  798. goto out;
  799. }
  800. return 0;
  801. out:
  802. return ret;
  803. }
  804. EXPORT_SYMBOL(cnss_power_up);
  805. int cnss_power_down(struct device *dev)
  806. {
  807. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  808. if (!plat_priv) {
  809. cnss_pr_err("plat_priv is NULL\n");
  810. return -ENODEV;
  811. }
  812. cnss_pr_dbg("Powering down device\n");
  813. return cnss_driver_event_post(plat_priv,
  814. CNSS_DRIVER_EVENT_POWER_DOWN,
  815. CNSS_EVENT_SYNC, NULL);
  816. }
  817. EXPORT_SYMBOL(cnss_power_down);
  818. int cnss_idle_restart(struct device *dev)
  819. {
  820. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  821. unsigned int timeout;
  822. int ret = 0;
  823. if (!plat_priv) {
  824. cnss_pr_err("plat_priv is NULL\n");
  825. return -ENODEV;
  826. }
  827. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  828. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  829. return -EBUSY;
  830. }
  831. cnss_pr_dbg("Doing idle restart\n");
  832. reinit_completion(&plat_priv->power_up_complete);
  833. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  834. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  835. ret = -EINVAL;
  836. goto out;
  837. }
  838. ret = cnss_driver_event_post(plat_priv,
  839. CNSS_DRIVER_EVENT_IDLE_RESTART,
  840. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  841. if (ret)
  842. goto out;
  843. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  844. ret = cnss_bus_call_driver_probe(plat_priv);
  845. goto out;
  846. }
  847. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  848. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  849. msecs_to_jiffies(timeout));
  850. if (plat_priv->power_up_error) {
  851. ret = plat_priv->power_up_error;
  852. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  853. cnss_pr_dbg("Power up error:%d, exiting\n",
  854. plat_priv->power_up_error);
  855. goto out;
  856. }
  857. if (!ret) {
  858. /* This exception occurs after attempting retry of FW recovery.
  859. * Thus we can safely power off the device.
  860. */
  861. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  862. timeout);
  863. ret = -ETIMEDOUT;
  864. cnss_power_down(dev);
  865. CNSS_ASSERT(0);
  866. goto out;
  867. }
  868. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  869. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  870. del_timer(&plat_priv->fw_boot_timer);
  871. ret = -EINVAL;
  872. goto out;
  873. }
  874. mutex_unlock(&plat_priv->driver_ops_lock);
  875. return 0;
  876. out:
  877. mutex_unlock(&plat_priv->driver_ops_lock);
  878. return ret;
  879. }
  880. EXPORT_SYMBOL(cnss_idle_restart);
  881. int cnss_idle_shutdown(struct device *dev)
  882. {
  883. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  884. unsigned int timeout;
  885. int ret;
  886. if (!plat_priv) {
  887. cnss_pr_err("plat_priv is NULL\n");
  888. return -ENODEV;
  889. }
  890. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  891. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  892. return -EAGAIN;
  893. }
  894. cnss_pr_dbg("Doing idle shutdown\n");
  895. if (!test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) &&
  896. !test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  897. goto skip_wait;
  898. reinit_completion(&plat_priv->recovery_complete);
  899. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY);
  900. ret = wait_for_completion_timeout(&plat_priv->recovery_complete,
  901. msecs_to_jiffies(timeout));
  902. if (!ret) {
  903. cnss_pr_err("Timeout (%ums) waiting for recovery to complete\n",
  904. timeout);
  905. CNSS_ASSERT(0);
  906. }
  907. skip_wait:
  908. return cnss_driver_event_post(plat_priv,
  909. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  910. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  911. }
  912. EXPORT_SYMBOL(cnss_idle_shutdown);
  913. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  914. {
  915. int ret = 0;
  916. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  917. if (ret) {
  918. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  919. goto out;
  920. }
  921. ret = cnss_get_clk(plat_priv);
  922. if (ret) {
  923. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  924. goto put_vreg;
  925. }
  926. ret = cnss_get_pinctrl(plat_priv);
  927. if (ret) {
  928. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  929. goto put_clk;
  930. }
  931. return 0;
  932. put_clk:
  933. cnss_put_clk(plat_priv);
  934. put_vreg:
  935. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  936. out:
  937. return ret;
  938. }
  939. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  940. {
  941. cnss_put_clk(plat_priv);
  942. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  943. }
  944. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  945. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  946. unsigned long code,
  947. void *ss_handle)
  948. {
  949. struct cnss_plat_data *plat_priv =
  950. container_of(nb, struct cnss_plat_data, modem_nb);
  951. struct cnss_esoc_info *esoc_info;
  952. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  953. if (!plat_priv)
  954. return NOTIFY_DONE;
  955. esoc_info = &plat_priv->esoc_info;
  956. if (code == SUBSYS_AFTER_POWERUP)
  957. esoc_info->modem_current_status = 1;
  958. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  959. esoc_info->modem_current_status = 0;
  960. else
  961. return NOTIFY_DONE;
  962. if (!cnss_bus_call_driver_modem_status(plat_priv,
  963. esoc_info->modem_current_status))
  964. return NOTIFY_DONE;
  965. return NOTIFY_OK;
  966. }
  967. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  968. {
  969. int ret = 0;
  970. struct device *dev;
  971. struct cnss_esoc_info *esoc_info;
  972. struct esoc_desc *esoc_desc;
  973. const char *client_desc;
  974. dev = &plat_priv->plat_dev->dev;
  975. esoc_info = &plat_priv->esoc_info;
  976. esoc_info->notify_modem_status =
  977. of_property_read_bool(dev->of_node,
  978. "qcom,notify-modem-status");
  979. if (!esoc_info->notify_modem_status)
  980. goto out;
  981. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  982. &client_desc);
  983. if (ret) {
  984. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  985. } else {
  986. esoc_desc = devm_register_esoc_client(dev, client_desc);
  987. if (IS_ERR_OR_NULL(esoc_desc)) {
  988. ret = PTR_RET(esoc_desc);
  989. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  990. ret);
  991. goto out;
  992. }
  993. esoc_info->esoc_desc = esoc_desc;
  994. }
  995. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  996. esoc_info->modem_current_status = 0;
  997. esoc_info->modem_notify_handler =
  998. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  999. esoc_info->esoc_desc->name :
  1000. "modem", &plat_priv->modem_nb);
  1001. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1002. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1003. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1004. ret);
  1005. goto unreg_esoc;
  1006. }
  1007. return 0;
  1008. unreg_esoc:
  1009. if (esoc_info->esoc_desc)
  1010. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1011. out:
  1012. return ret;
  1013. }
  1014. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1015. {
  1016. struct device *dev;
  1017. struct cnss_esoc_info *esoc_info;
  1018. dev = &plat_priv->plat_dev->dev;
  1019. esoc_info = &plat_priv->esoc_info;
  1020. if (esoc_info->notify_modem_status)
  1021. subsys_notif_unregister_notifier
  1022. (esoc_info->modem_notify_handler,
  1023. &plat_priv->modem_nb);
  1024. if (esoc_info->esoc_desc)
  1025. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1026. }
  1027. #else
  1028. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1029. {
  1030. return 0;
  1031. }
  1032. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1033. #endif
  1034. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1035. {
  1036. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1037. int ret = 0;
  1038. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1039. return 0;
  1040. enable_irq(sol_gpio->dev_sol_irq);
  1041. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1042. if (ret)
  1043. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1044. ret);
  1045. return ret;
  1046. }
  1047. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1048. {
  1049. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1050. int ret = 0;
  1051. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1052. return 0;
  1053. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1054. if (ret)
  1055. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1056. ret);
  1057. disable_irq(sol_gpio->dev_sol_irq);
  1058. return ret;
  1059. }
  1060. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1061. {
  1062. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1063. if (sol_gpio->dev_sol_gpio < 0)
  1064. return -EINVAL;
  1065. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1066. }
  1067. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1068. {
  1069. struct cnss_plat_data *plat_priv = data;
  1070. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1071. sol_gpio->dev_sol_counter++;
  1072. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1073. irq, sol_gpio->dev_sol_counter);
  1074. /* Make sure abort current suspend */
  1075. cnss_pm_stay_awake(plat_priv);
  1076. cnss_pm_relax(plat_priv);
  1077. pm_system_wakeup();
  1078. cnss_bus_handle_dev_sol_irq(plat_priv);
  1079. return IRQ_HANDLED;
  1080. }
  1081. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1082. {
  1083. struct device *dev = &plat_priv->plat_dev->dev;
  1084. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1085. int ret = 0;
  1086. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1087. "wlan-dev-sol-gpio", 0);
  1088. if (sol_gpio->dev_sol_gpio < 0)
  1089. goto out;
  1090. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1091. sol_gpio->dev_sol_gpio);
  1092. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1093. if (ret) {
  1094. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1095. ret);
  1096. goto out;
  1097. }
  1098. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1099. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1100. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1101. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1102. if (ret) {
  1103. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1104. goto free_gpio;
  1105. }
  1106. return 0;
  1107. free_gpio:
  1108. gpio_free(sol_gpio->dev_sol_gpio);
  1109. out:
  1110. return ret;
  1111. }
  1112. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1113. {
  1114. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1115. if (sol_gpio->dev_sol_gpio < 0)
  1116. return;
  1117. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1118. gpio_free(sol_gpio->dev_sol_gpio);
  1119. }
  1120. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1121. {
  1122. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1123. if (sol_gpio->host_sol_gpio < 0)
  1124. return -EINVAL;
  1125. if (value)
  1126. cnss_pr_dbg("Assert host SOL GPIO\n");
  1127. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1128. return 0;
  1129. }
  1130. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1131. {
  1132. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1133. if (sol_gpio->host_sol_gpio < 0)
  1134. return -EINVAL;
  1135. return gpio_get_value(sol_gpio->host_sol_gpio);
  1136. }
  1137. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1138. {
  1139. struct device *dev = &plat_priv->plat_dev->dev;
  1140. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1141. int ret = 0;
  1142. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1143. "wlan-host-sol-gpio", 0);
  1144. if (sol_gpio->host_sol_gpio < 0)
  1145. goto out;
  1146. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1147. sol_gpio->host_sol_gpio);
  1148. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1149. if (ret) {
  1150. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1151. ret);
  1152. goto out;
  1153. }
  1154. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1155. return 0;
  1156. out:
  1157. return ret;
  1158. }
  1159. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1160. {
  1161. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1162. if (sol_gpio->host_sol_gpio < 0)
  1163. return;
  1164. gpio_free(sol_gpio->host_sol_gpio);
  1165. }
  1166. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1167. {
  1168. int ret;
  1169. ret = cnss_init_dev_sol_gpio(plat_priv);
  1170. if (ret)
  1171. goto out;
  1172. ret = cnss_init_host_sol_gpio(plat_priv);
  1173. if (ret)
  1174. goto deinit_dev_sol;
  1175. return 0;
  1176. deinit_dev_sol:
  1177. cnss_deinit_dev_sol_gpio(plat_priv);
  1178. out:
  1179. return ret;
  1180. }
  1181. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1182. {
  1183. cnss_deinit_host_sol_gpio(plat_priv);
  1184. cnss_deinit_dev_sol_gpio(plat_priv);
  1185. }
  1186. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1187. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1188. {
  1189. struct cnss_plat_data *plat_priv;
  1190. int ret = 0;
  1191. if (!subsys_desc->dev) {
  1192. cnss_pr_err("dev from subsys_desc is NULL\n");
  1193. return -ENODEV;
  1194. }
  1195. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1196. if (!plat_priv) {
  1197. cnss_pr_err("plat_priv is NULL\n");
  1198. return -ENODEV;
  1199. }
  1200. if (!plat_priv->driver_state) {
  1201. cnss_pr_dbg("Powerup is ignored\n");
  1202. return 0;
  1203. }
  1204. ret = cnss_bus_dev_powerup(plat_priv);
  1205. if (ret)
  1206. __pm_relax(plat_priv->recovery_ws);
  1207. return ret;
  1208. }
  1209. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1210. bool force_stop)
  1211. {
  1212. struct cnss_plat_data *plat_priv;
  1213. if (!subsys_desc->dev) {
  1214. cnss_pr_err("dev from subsys_desc is NULL\n");
  1215. return -ENODEV;
  1216. }
  1217. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1218. if (!plat_priv) {
  1219. cnss_pr_err("plat_priv is NULL\n");
  1220. return -ENODEV;
  1221. }
  1222. if (!plat_priv->driver_state) {
  1223. cnss_pr_dbg("shutdown is ignored\n");
  1224. return 0;
  1225. }
  1226. return cnss_bus_dev_shutdown(plat_priv);
  1227. }
  1228. void cnss_device_crashed(struct device *dev)
  1229. {
  1230. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1231. struct cnss_subsys_info *subsys_info;
  1232. if (!plat_priv)
  1233. return;
  1234. subsys_info = &plat_priv->subsys_info;
  1235. if (subsys_info->subsys_device) {
  1236. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1237. subsys_set_crash_status(subsys_info->subsys_device, true);
  1238. subsystem_restart_dev(subsys_info->subsys_device);
  1239. }
  1240. }
  1241. EXPORT_SYMBOL(cnss_device_crashed);
  1242. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1243. {
  1244. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1245. if (!plat_priv) {
  1246. cnss_pr_err("plat_priv is NULL\n");
  1247. return;
  1248. }
  1249. cnss_bus_dev_crash_shutdown(plat_priv);
  1250. }
  1251. static int cnss_subsys_ramdump(int enable,
  1252. const struct subsys_desc *subsys_desc)
  1253. {
  1254. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1255. if (!plat_priv) {
  1256. cnss_pr_err("plat_priv is NULL\n");
  1257. return -ENODEV;
  1258. }
  1259. if (!enable)
  1260. return 0;
  1261. return cnss_bus_dev_ramdump(plat_priv);
  1262. }
  1263. static void cnss_recovery_work_handler(struct work_struct *work)
  1264. {
  1265. }
  1266. #else
  1267. static void cnss_recovery_work_handler(struct work_struct *work)
  1268. {
  1269. int ret;
  1270. struct cnss_plat_data *plat_priv =
  1271. container_of(work, struct cnss_plat_data, recovery_work);
  1272. if (!plat_priv->recovery_enabled)
  1273. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1274. cnss_bus_dev_shutdown(plat_priv);
  1275. cnss_bus_dev_ramdump(plat_priv);
  1276. msleep(POWER_RESET_MIN_DELAY_MS);
  1277. ret = cnss_bus_dev_powerup(plat_priv);
  1278. if (ret)
  1279. __pm_relax(plat_priv->recovery_ws);
  1280. return;
  1281. }
  1282. void cnss_device_crashed(struct device *dev)
  1283. {
  1284. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1285. if (!plat_priv)
  1286. return;
  1287. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1288. schedule_work(&plat_priv->recovery_work);
  1289. }
  1290. EXPORT_SYMBOL(cnss_device_crashed);
  1291. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1292. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1293. {
  1294. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1295. struct cnss_ramdump_info *ramdump_info;
  1296. if (!plat_priv)
  1297. return NULL;
  1298. ramdump_info = &plat_priv->ramdump_info;
  1299. *size = ramdump_info->ramdump_size;
  1300. return ramdump_info->ramdump_va;
  1301. }
  1302. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1303. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1304. {
  1305. switch (reason) {
  1306. case CNSS_REASON_DEFAULT:
  1307. return "DEFAULT";
  1308. case CNSS_REASON_LINK_DOWN:
  1309. return "LINK_DOWN";
  1310. case CNSS_REASON_RDDM:
  1311. return "RDDM";
  1312. case CNSS_REASON_TIMEOUT:
  1313. return "TIMEOUT";
  1314. }
  1315. return "UNKNOWN";
  1316. };
  1317. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1318. enum cnss_recovery_reason reason)
  1319. {
  1320. plat_priv->recovery_count++;
  1321. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1322. goto self_recovery;
  1323. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1324. cnss_pr_dbg("Skip device recovery\n");
  1325. return 0;
  1326. }
  1327. /* FW recovery sequence has multiple steps and firmware load requires
  1328. * linux PM in awake state. Thus hold the cnss wake source until
  1329. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1330. * time taken in this process.
  1331. */
  1332. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1333. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1334. true);
  1335. switch (reason) {
  1336. case CNSS_REASON_LINK_DOWN:
  1337. if (!cnss_bus_check_link_status(plat_priv)) {
  1338. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1339. return 0;
  1340. }
  1341. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1342. &plat_priv->ctrl_params.quirks))
  1343. goto self_recovery;
  1344. if (!cnss_bus_recover_link_down(plat_priv)) {
  1345. /* clear recovery bit here to avoid skipping
  1346. * the recovery work for RDDM later
  1347. */
  1348. clear_bit(CNSS_DRIVER_RECOVERY,
  1349. &plat_priv->driver_state);
  1350. return 0;
  1351. }
  1352. break;
  1353. case CNSS_REASON_RDDM:
  1354. cnss_bus_collect_dump_info(plat_priv, false);
  1355. break;
  1356. case CNSS_REASON_DEFAULT:
  1357. case CNSS_REASON_TIMEOUT:
  1358. break;
  1359. default:
  1360. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1361. cnss_recovery_reason_to_str(reason), reason);
  1362. break;
  1363. }
  1364. cnss_bus_device_crashed(plat_priv);
  1365. return 0;
  1366. self_recovery:
  1367. cnss_pr_dbg("Going for self recovery\n");
  1368. cnss_bus_dev_shutdown(plat_priv);
  1369. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1370. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1371. &plat_priv->ctrl_params.quirks);
  1372. cnss_bus_dev_powerup(plat_priv);
  1373. return 0;
  1374. }
  1375. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1376. void *data)
  1377. {
  1378. struct cnss_recovery_data *recovery_data = data;
  1379. int ret = 0;
  1380. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1381. cnss_recovery_reason_to_str(recovery_data->reason),
  1382. recovery_data->reason);
  1383. if (!plat_priv->driver_state) {
  1384. cnss_pr_err("Improper driver state, ignore recovery\n");
  1385. ret = -EINVAL;
  1386. goto out;
  1387. }
  1388. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1389. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1390. ret = -EINVAL;
  1391. goto out;
  1392. }
  1393. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1394. cnss_pr_err("Recovery is already in progress\n");
  1395. CNSS_ASSERT(0);
  1396. ret = -EINVAL;
  1397. goto out;
  1398. }
  1399. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1400. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1401. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1402. ret = -EINVAL;
  1403. goto out;
  1404. }
  1405. switch (plat_priv->device_id) {
  1406. case QCA6174_DEVICE_ID:
  1407. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1408. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1409. &plat_priv->driver_state)) {
  1410. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1411. ret = -EINVAL;
  1412. goto out;
  1413. }
  1414. break;
  1415. default:
  1416. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1417. set_bit(CNSS_FW_BOOT_RECOVERY,
  1418. &plat_priv->driver_state);
  1419. }
  1420. break;
  1421. }
  1422. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1423. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1424. out:
  1425. kfree(data);
  1426. return ret;
  1427. }
  1428. int cnss_self_recovery(struct device *dev,
  1429. enum cnss_recovery_reason reason)
  1430. {
  1431. cnss_schedule_recovery(dev, reason);
  1432. return 0;
  1433. }
  1434. EXPORT_SYMBOL(cnss_self_recovery);
  1435. void cnss_schedule_recovery(struct device *dev,
  1436. enum cnss_recovery_reason reason)
  1437. {
  1438. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1439. struct cnss_recovery_data *data;
  1440. int gfp = GFP_KERNEL;
  1441. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1442. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1443. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1444. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1445. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1446. return;
  1447. }
  1448. if (in_interrupt() || irqs_disabled())
  1449. gfp = GFP_ATOMIC;
  1450. data = kzalloc(sizeof(*data), gfp);
  1451. if (!data)
  1452. return;
  1453. data->reason = reason;
  1454. cnss_driver_event_post(plat_priv,
  1455. CNSS_DRIVER_EVENT_RECOVERY,
  1456. 0, data);
  1457. }
  1458. EXPORT_SYMBOL(cnss_schedule_recovery);
  1459. int cnss_force_fw_assert(struct device *dev)
  1460. {
  1461. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1462. if (!plat_priv) {
  1463. cnss_pr_err("plat_priv is NULL\n");
  1464. return -ENODEV;
  1465. }
  1466. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1467. cnss_pr_info("Forced FW assert is not supported\n");
  1468. return -EOPNOTSUPP;
  1469. }
  1470. if (cnss_bus_is_device_down(plat_priv)) {
  1471. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1472. return 0;
  1473. }
  1474. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1475. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1476. return 0;
  1477. }
  1478. if (in_interrupt() || irqs_disabled())
  1479. cnss_driver_event_post(plat_priv,
  1480. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1481. 0, NULL);
  1482. else
  1483. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1484. return 0;
  1485. }
  1486. EXPORT_SYMBOL(cnss_force_fw_assert);
  1487. int cnss_force_collect_rddm(struct device *dev)
  1488. {
  1489. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1490. unsigned int timeout;
  1491. int ret = 0;
  1492. if (!plat_priv) {
  1493. cnss_pr_err("plat_priv is NULL\n");
  1494. return -ENODEV;
  1495. }
  1496. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1497. cnss_pr_info("Force collect rddm is not supported\n");
  1498. return -EOPNOTSUPP;
  1499. }
  1500. if (cnss_bus_is_device_down(plat_priv)) {
  1501. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1502. goto wait_rddm;
  1503. }
  1504. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1505. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1506. goto wait_rddm;
  1507. }
  1508. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1509. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1510. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1511. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1512. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1513. return 0;
  1514. }
  1515. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1516. if (ret)
  1517. return ret;
  1518. wait_rddm:
  1519. reinit_completion(&plat_priv->rddm_complete);
  1520. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1521. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1522. msecs_to_jiffies(timeout));
  1523. if (!ret) {
  1524. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1525. timeout);
  1526. ret = -ETIMEDOUT;
  1527. } else if (ret > 0) {
  1528. ret = 0;
  1529. }
  1530. return ret;
  1531. }
  1532. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1533. int cnss_qmi_send_get(struct device *dev)
  1534. {
  1535. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1536. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1537. return 0;
  1538. return cnss_bus_qmi_send_get(plat_priv);
  1539. }
  1540. EXPORT_SYMBOL(cnss_qmi_send_get);
  1541. int cnss_qmi_send_put(struct device *dev)
  1542. {
  1543. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1544. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1545. return 0;
  1546. return cnss_bus_qmi_send_put(plat_priv);
  1547. }
  1548. EXPORT_SYMBOL(cnss_qmi_send_put);
  1549. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1550. int cmd_len, void *cb_ctx,
  1551. int (*cb)(void *ctx, void *event, int event_len))
  1552. {
  1553. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1554. int ret;
  1555. if (!plat_priv)
  1556. return -ENODEV;
  1557. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1558. return -EINVAL;
  1559. plat_priv->get_info_cb = cb;
  1560. plat_priv->get_info_cb_ctx = cb_ctx;
  1561. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1562. if (ret) {
  1563. plat_priv->get_info_cb = NULL;
  1564. plat_priv->get_info_cb_ctx = NULL;
  1565. }
  1566. return ret;
  1567. }
  1568. EXPORT_SYMBOL(cnss_qmi_send);
  1569. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1570. {
  1571. int ret = 0;
  1572. u32 retry = 0, timeout;
  1573. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1574. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1575. goto out;
  1576. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1577. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1578. goto out;
  1579. }
  1580. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1581. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1582. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1583. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1584. CNSS_ASSERT(0);
  1585. return -EINVAL;
  1586. }
  1587. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1588. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1589. break;
  1590. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1591. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1592. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1593. CNSS_ASSERT(0);
  1594. ret = -EINVAL;
  1595. goto mark_cal_fail;
  1596. }
  1597. }
  1598. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1599. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1600. timeout = cnss_get_timeout(plat_priv,
  1601. CNSS_TIMEOUT_CALIBRATION);
  1602. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1603. timeout / 1000);
  1604. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1605. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1606. msecs_to_jiffies(timeout));
  1607. }
  1608. reinit_completion(&plat_priv->cal_complete);
  1609. ret = cnss_bus_dev_powerup(plat_priv);
  1610. mark_cal_fail:
  1611. if (ret) {
  1612. complete(&plat_priv->cal_complete);
  1613. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1614. /* Set CBC done in driver state to mark attempt and note error
  1615. * since calibration cannot be retried at boot.
  1616. */
  1617. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1618. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1619. }
  1620. out:
  1621. return ret;
  1622. }
  1623. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1624. void *data)
  1625. {
  1626. struct cnss_cal_info *cal_info = data;
  1627. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1628. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1629. goto out;
  1630. switch (cal_info->cal_status) {
  1631. case CNSS_CAL_DONE:
  1632. cnss_pr_dbg("Calibration completed successfully\n");
  1633. plat_priv->cal_done = true;
  1634. break;
  1635. case CNSS_CAL_TIMEOUT:
  1636. case CNSS_CAL_FAILURE:
  1637. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1638. cal_info->cal_status);
  1639. break;
  1640. default:
  1641. cnss_pr_err("Unknown calibration status: %u\n",
  1642. cal_info->cal_status);
  1643. break;
  1644. }
  1645. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1646. cnss_bus_free_qdss_mem(plat_priv);
  1647. cnss_release_antenna_sharing(plat_priv);
  1648. cnss_bus_dev_shutdown(plat_priv);
  1649. msleep(POWER_RESET_MIN_DELAY_MS);
  1650. complete(&plat_priv->cal_complete);
  1651. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1652. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1653. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1654. cnss_cal_mem_upload_to_file(plat_priv);
  1655. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1656. goto out;
  1657. cnss_pr_dbg("Schedule WLAN driver load\n");
  1658. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1659. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1660. 0);
  1661. }
  1662. out:
  1663. kfree(data);
  1664. return 0;
  1665. }
  1666. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1667. {
  1668. int ret;
  1669. ret = cnss_bus_dev_powerup(plat_priv);
  1670. if (ret)
  1671. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1672. return ret;
  1673. }
  1674. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1675. {
  1676. cnss_bus_dev_shutdown(plat_priv);
  1677. return 0;
  1678. }
  1679. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1680. {
  1681. int ret = 0;
  1682. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1683. if (ret < 0)
  1684. return ret;
  1685. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1686. }
  1687. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1688. u32 mem_seg_len, u64 pa, u32 size)
  1689. {
  1690. int i = 0;
  1691. u64 offset = 0;
  1692. void *va = NULL;
  1693. u64 local_pa;
  1694. u32 local_size;
  1695. for (i = 0; i < mem_seg_len; i++) {
  1696. local_pa = (u64)fw_mem[i].pa;
  1697. local_size = (u32)fw_mem[i].size;
  1698. if (pa == local_pa && size <= local_size) {
  1699. va = fw_mem[i].va;
  1700. break;
  1701. }
  1702. if (pa > local_pa &&
  1703. pa < local_pa + local_size &&
  1704. pa + size <= local_pa + local_size) {
  1705. offset = pa - local_pa;
  1706. va = fw_mem[i].va + offset;
  1707. break;
  1708. }
  1709. }
  1710. return va;
  1711. }
  1712. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1713. void *data)
  1714. {
  1715. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1716. struct cnss_fw_mem *fw_mem_seg;
  1717. int ret = 0L;
  1718. void *va = NULL;
  1719. u32 i, fw_mem_seg_len;
  1720. switch (event_data->mem_type) {
  1721. case QMI_WLFW_MEM_TYPE_DDR_V01:
  1722. if (!plat_priv->fw_mem_seg_len)
  1723. goto invalid_mem_save;
  1724. fw_mem_seg = plat_priv->fw_mem;
  1725. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  1726. break;
  1727. case QMI_WLFW_MEM_QDSS_V01:
  1728. if (!plat_priv->qdss_mem_seg_len)
  1729. goto invalid_mem_save;
  1730. fw_mem_seg = plat_priv->qdss_mem;
  1731. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  1732. break;
  1733. default:
  1734. goto invalid_mem_save;
  1735. }
  1736. for (i = 0; i < event_data->mem_seg_len; i++) {
  1737. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  1738. event_data->mem_seg[i].addr,
  1739. event_data->mem_seg[i].size);
  1740. if (!va) {
  1741. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  1742. &event_data->mem_seg[i].addr,
  1743. event_data->mem_type);
  1744. ret = -EINVAL;
  1745. break;
  1746. }
  1747. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  1748. event_data->file_name,
  1749. event_data->mem_seg[i].size);
  1750. if (ret < 0) {
  1751. cnss_pr_err("Fail to save fw mem data: %d\n",
  1752. ret);
  1753. break;
  1754. }
  1755. }
  1756. kfree(data);
  1757. return ret;
  1758. invalid_mem_save:
  1759. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  1760. event_data->mem_type);
  1761. kfree(data);
  1762. return -EINVAL;
  1763. }
  1764. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  1765. {
  1766. cnss_bus_free_qdss_mem(plat_priv);
  1767. return 0;
  1768. }
  1769. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  1770. void *data)
  1771. {
  1772. int ret = 0;
  1773. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1774. if (!plat_priv)
  1775. return -ENODEV;
  1776. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  1777. event_data->total_size);
  1778. kfree(data);
  1779. return ret;
  1780. }
  1781. static void cnss_driver_event_work(struct work_struct *work)
  1782. {
  1783. struct cnss_plat_data *plat_priv =
  1784. container_of(work, struct cnss_plat_data, event_work);
  1785. struct cnss_driver_event *event;
  1786. unsigned long flags;
  1787. int ret = 0;
  1788. if (!plat_priv) {
  1789. cnss_pr_err("plat_priv is NULL!\n");
  1790. return;
  1791. }
  1792. cnss_pm_stay_awake(plat_priv);
  1793. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1794. while (!list_empty(&plat_priv->event_list)) {
  1795. event = list_first_entry(&plat_priv->event_list,
  1796. struct cnss_driver_event, list);
  1797. list_del(&event->list);
  1798. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1799. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  1800. cnss_driver_event_to_str(event->type),
  1801. event->sync ? "-sync" : "", event->type,
  1802. plat_priv->driver_state);
  1803. switch (event->type) {
  1804. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1805. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  1806. break;
  1807. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  1808. ret = cnss_wlfw_server_exit(plat_priv);
  1809. break;
  1810. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  1811. ret = cnss_bus_alloc_fw_mem(plat_priv);
  1812. if (ret)
  1813. break;
  1814. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  1815. break;
  1816. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  1817. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  1818. break;
  1819. case CNSS_DRIVER_EVENT_FW_READY:
  1820. ret = cnss_fw_ready_hdlr(plat_priv);
  1821. break;
  1822. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  1823. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  1824. break;
  1825. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  1826. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  1827. event->data);
  1828. break;
  1829. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1830. ret = cnss_bus_register_driver_hdlr(plat_priv,
  1831. event->data);
  1832. break;
  1833. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1834. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  1835. break;
  1836. case CNSS_DRIVER_EVENT_RECOVERY:
  1837. ret = cnss_driver_recovery_hdlr(plat_priv,
  1838. event->data);
  1839. break;
  1840. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1841. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1842. break;
  1843. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1844. set_bit(CNSS_DRIVER_IDLE_RESTART,
  1845. &plat_priv->driver_state);
  1846. /* fall through */
  1847. case CNSS_DRIVER_EVENT_POWER_UP:
  1848. ret = cnss_power_up_hdlr(plat_priv);
  1849. break;
  1850. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1851. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  1852. &plat_priv->driver_state);
  1853. /* fall through */
  1854. case CNSS_DRIVER_EVENT_POWER_DOWN:
  1855. ret = cnss_power_down_hdlr(plat_priv);
  1856. break;
  1857. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1858. ret = cnss_process_wfc_call_ind_event(plat_priv,
  1859. event->data);
  1860. break;
  1861. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1862. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  1863. event->data);
  1864. break;
  1865. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1866. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  1867. break;
  1868. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1869. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  1870. event->data);
  1871. break;
  1872. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1873. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  1874. break;
  1875. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1876. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  1877. event->data);
  1878. break;
  1879. default:
  1880. cnss_pr_err("Invalid driver event type: %d",
  1881. event->type);
  1882. kfree(event);
  1883. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1884. continue;
  1885. }
  1886. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1887. if (event->sync) {
  1888. event->ret = ret;
  1889. complete(&event->complete);
  1890. continue;
  1891. }
  1892. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1893. kfree(event);
  1894. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1895. }
  1896. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1897. cnss_pm_relax(plat_priv);
  1898. }
  1899. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1900. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  1901. {
  1902. int ret = 0;
  1903. struct cnss_subsys_info *subsys_info;
  1904. subsys_info = &plat_priv->subsys_info;
  1905. subsys_info->subsys_desc.name = "wlan";
  1906. subsys_info->subsys_desc.owner = THIS_MODULE;
  1907. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  1908. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  1909. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  1910. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  1911. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  1912. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  1913. if (IS_ERR(subsys_info->subsys_device)) {
  1914. ret = PTR_ERR(subsys_info->subsys_device);
  1915. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  1916. goto out;
  1917. }
  1918. subsys_info->subsys_handle =
  1919. subsystem_get(subsys_info->subsys_desc.name);
  1920. if (!subsys_info->subsys_handle) {
  1921. cnss_pr_err("Failed to get subsys_handle!\n");
  1922. ret = -EINVAL;
  1923. goto unregister_subsys;
  1924. } else if (IS_ERR(subsys_info->subsys_handle)) {
  1925. ret = PTR_ERR(subsys_info->subsys_handle);
  1926. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  1927. goto unregister_subsys;
  1928. }
  1929. return 0;
  1930. unregister_subsys:
  1931. subsys_unregister(subsys_info->subsys_device);
  1932. out:
  1933. return ret;
  1934. }
  1935. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  1936. {
  1937. struct cnss_subsys_info *subsys_info;
  1938. subsys_info = &plat_priv->subsys_info;
  1939. subsystem_put(subsys_info->subsys_handle);
  1940. subsys_unregister(subsys_info->subsys_device);
  1941. }
  1942. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  1943. {
  1944. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  1945. return create_ramdump_device(subsys_info->subsys_desc.name,
  1946. subsys_info->subsys_desc.dev);
  1947. }
  1948. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  1949. void *ramdump_dev)
  1950. {
  1951. destroy_ramdump_device(ramdump_dev);
  1952. }
  1953. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  1954. {
  1955. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  1956. struct ramdump_segment segment;
  1957. memset(&segment, 0, sizeof(segment));
  1958. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  1959. segment.size = ramdump_info->ramdump_size;
  1960. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  1961. }
  1962. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  1963. {
  1964. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  1965. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  1966. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  1967. struct ramdump_segment *ramdump_segs, *s;
  1968. struct cnss_dump_meta_info meta_info = {0};
  1969. int i, ret = 0;
  1970. ramdump_segs = kcalloc(dump_data->nentries + 1,
  1971. sizeof(*ramdump_segs),
  1972. GFP_KERNEL);
  1973. if (!ramdump_segs)
  1974. return -ENOMEM;
  1975. s = ramdump_segs + 1;
  1976. for (i = 0; i < dump_data->nentries; i++) {
  1977. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  1978. cnss_pr_err("Unsupported dump type: %d",
  1979. dump_seg->type);
  1980. continue;
  1981. }
  1982. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  1983. meta_info.entry[dump_seg->type].type = dump_seg->type;
  1984. meta_info.entry[dump_seg->type].entry_start = i + 1;
  1985. }
  1986. meta_info.entry[dump_seg->type].entry_num++;
  1987. s->address = dump_seg->address;
  1988. s->v_address = (void __iomem *)dump_seg->v_address;
  1989. s->size = dump_seg->size;
  1990. s++;
  1991. dump_seg++;
  1992. }
  1993. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  1994. meta_info.version = CNSS_RAMDUMP_VERSION;
  1995. meta_info.chipset = plat_priv->device_id;
  1996. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  1997. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  1998. ramdump_segs->size = sizeof(meta_info);
  1999. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2000. dump_data->nentries + 1);
  2001. kfree(ramdump_segs);
  2002. return ret;
  2003. }
  2004. #else
  2005. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2006. void *data)
  2007. {
  2008. struct cnss_plat_data *plat_priv =
  2009. container_of(nb, struct cnss_plat_data, panic_nb);
  2010. cnss_bus_dev_crash_shutdown(plat_priv);
  2011. return NOTIFY_DONE;
  2012. }
  2013. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2014. {
  2015. int ret;
  2016. if (!plat_priv)
  2017. return -ENODEV;
  2018. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2019. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2020. &plat_priv->panic_nb);
  2021. if (ret) {
  2022. cnss_pr_err("Failed to register panic handler\n");
  2023. return -EINVAL;
  2024. }
  2025. return 0;
  2026. }
  2027. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2028. {
  2029. int ret;
  2030. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2031. &plat_priv->panic_nb);
  2032. if (ret)
  2033. cnss_pr_err("Failed to unregister panic handler\n");
  2034. }
  2035. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2036. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2037. {
  2038. return &plat_priv->plat_dev->dev;
  2039. }
  2040. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2041. void *ramdump_dev)
  2042. {
  2043. }
  2044. #endif
  2045. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2046. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2047. {
  2048. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2049. struct qcom_dump_segment segment;
  2050. struct list_head head;
  2051. INIT_LIST_HEAD(&head);
  2052. memset(&segment, 0, sizeof(segment));
  2053. segment.va = ramdump_info->ramdump_va;
  2054. segment.size = ramdump_info->ramdump_size;
  2055. list_add(&segment.node, &head);
  2056. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2057. }
  2058. #else
  2059. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2060. {
  2061. return 0;
  2062. }
  2063. /* Using completion event inside dynamically allocated ramdump_desc
  2064. * may result a race between freeing the event after setting it to
  2065. * complete inside dev coredump free callback and the thread that is
  2066. * waiting for completion.
  2067. */
  2068. DECLARE_COMPLETION(dump_done);
  2069. #define TIMEOUT_SAVE_DUMP_MS 30000
  2070. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2071. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2072. { \
  2073. if (class == ELFCLASS32) \
  2074. return sizeof(struct elf32_##__xhdr); \
  2075. else \
  2076. return sizeof(struct elf64_##__xhdr); \
  2077. }
  2078. SIZEOF_ELF_STRUCT(phdr)
  2079. SIZEOF_ELF_STRUCT(hdr)
  2080. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2081. do { \
  2082. if (class == ELFCLASS32) \
  2083. ((struct elf32_##__xhdr *)arg)->member = value; \
  2084. else \
  2085. ((struct elf64_##__xhdr *)arg)->member = value; \
  2086. } while (0)
  2087. #define set_ehdr_property(arg, class, member, value) \
  2088. set_xhdr_property(hdr, arg, class, member, value)
  2089. #define set_phdr_property(arg, class, member, value) \
  2090. set_xhdr_property(phdr, arg, class, member, value)
  2091. /* These replace qcom_ramdump driver APIs called from common API
  2092. * cnss_do_elf_dump() by the ones defined here.
  2093. */
  2094. #define qcom_dump_segment cnss_qcom_dump_segment
  2095. #define qcom_elf_dump cnss_qcom_elf_dump
  2096. #define dump_enabled cnss_dump_enabled
  2097. struct cnss_qcom_dump_segment {
  2098. struct list_head node;
  2099. dma_addr_t da;
  2100. void *va;
  2101. size_t size;
  2102. };
  2103. struct cnss_qcom_ramdump_desc {
  2104. void *data;
  2105. struct completion dump_done;
  2106. };
  2107. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2108. void *data, size_t datalen)
  2109. {
  2110. struct cnss_qcom_ramdump_desc *desc = data;
  2111. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2112. datalen);
  2113. }
  2114. static void cnss_qcom_devcd_freev(void *data)
  2115. {
  2116. struct cnss_qcom_ramdump_desc *desc = data;
  2117. cnss_pr_dbg("Free dump data for dev coredump\n");
  2118. complete(&dump_done);
  2119. vfree(desc->data);
  2120. kfree(desc);
  2121. }
  2122. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2123. gfp_t gfp)
  2124. {
  2125. struct cnss_qcom_ramdump_desc *desc;
  2126. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2127. int ret;
  2128. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2129. if (!desc)
  2130. return -ENOMEM;
  2131. desc->data = data;
  2132. reinit_completion(&dump_done);
  2133. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2134. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2135. ret = wait_for_completion_timeout(&dump_done,
  2136. msecs_to_jiffies(timeout));
  2137. if (!ret)
  2138. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2139. timeout);
  2140. return ret ? 0 : -ETIMEDOUT;
  2141. }
  2142. /* Since the elf32 and elf64 identification is identical apart from
  2143. * the class, use elf32 by default.
  2144. */
  2145. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2146. {
  2147. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2148. ehdr->e_ident[EI_CLASS] = class;
  2149. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2150. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2151. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2152. }
  2153. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2154. unsigned char class)
  2155. {
  2156. struct cnss_qcom_dump_segment *segment;
  2157. void *phdr, *ehdr;
  2158. size_t data_size, offset;
  2159. int phnum = 0;
  2160. void *data;
  2161. void __iomem *ptr;
  2162. if (!segs || list_empty(segs))
  2163. return -EINVAL;
  2164. data_size = sizeof_elf_hdr(class);
  2165. list_for_each_entry(segment, segs, node) {
  2166. data_size += sizeof_elf_phdr(class) + segment->size;
  2167. phnum++;
  2168. }
  2169. data = vmalloc(data_size);
  2170. if (!data)
  2171. return -ENOMEM;
  2172. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2173. ehdr = data;
  2174. memset(ehdr, 0, sizeof_elf_hdr(class));
  2175. init_elf_identification(ehdr, class);
  2176. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2177. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2178. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2179. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2180. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2181. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2182. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2183. phdr = data + sizeof_elf_hdr(class);
  2184. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2185. list_for_each_entry(segment, segs, node) {
  2186. memset(phdr, 0, sizeof_elf_phdr(class));
  2187. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2188. set_phdr_property(phdr, class, p_offset, offset);
  2189. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2190. set_phdr_property(phdr, class, p_paddr, segment->da);
  2191. set_phdr_property(phdr, class, p_filesz, segment->size);
  2192. set_phdr_property(phdr, class, p_memsz, segment->size);
  2193. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2194. set_phdr_property(phdr, class, p_align, 0);
  2195. if (segment->va) {
  2196. memcpy(data + offset, segment->va, segment->size);
  2197. } else {
  2198. ptr = devm_ioremap(dev, segment->da, segment->size);
  2199. if (!ptr) {
  2200. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2201. &segment->da, segment->size);
  2202. memset(data + offset, 0xff, segment->size);
  2203. } else {
  2204. memcpy_fromio(data + offset, ptr,
  2205. segment->size);
  2206. }
  2207. }
  2208. offset += segment->size;
  2209. phdr += sizeof_elf_phdr(class);
  2210. }
  2211. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2212. }
  2213. /* Saving dump to file system is always needed in this case. */
  2214. static bool cnss_dump_enabled(void)
  2215. {
  2216. return true;
  2217. }
  2218. #endif /* CONFIG_QCOM_RAMDUMP */
  2219. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2220. {
  2221. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2222. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2223. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2224. struct qcom_dump_segment *seg;
  2225. struct cnss_dump_meta_info meta_info = {0};
  2226. struct list_head head;
  2227. int i, ret = 0;
  2228. if (!dump_enabled()) {
  2229. cnss_pr_info("Dump collection is not enabled\n");
  2230. return ret;
  2231. }
  2232. INIT_LIST_HEAD(&head);
  2233. for (i = 0; i < dump_data->nentries; i++) {
  2234. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2235. cnss_pr_err("Unsupported dump type: %d",
  2236. dump_seg->type);
  2237. continue;
  2238. }
  2239. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2240. if (!seg)
  2241. continue;
  2242. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2243. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2244. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2245. }
  2246. meta_info.entry[dump_seg->type].entry_num++;
  2247. seg->da = dump_seg->address;
  2248. seg->va = dump_seg->v_address;
  2249. seg->size = dump_seg->size;
  2250. list_add_tail(&seg->node, &head);
  2251. dump_seg++;
  2252. }
  2253. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2254. if (!seg)
  2255. goto do_elf_dump;
  2256. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2257. meta_info.version = CNSS_RAMDUMP_VERSION;
  2258. meta_info.chipset = plat_priv->device_id;
  2259. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2260. seg->va = &meta_info;
  2261. seg->size = sizeof(meta_info);
  2262. list_add(&seg->node, &head);
  2263. do_elf_dump:
  2264. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2265. while (!list_empty(&head)) {
  2266. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2267. list_del(&seg->node);
  2268. kfree(seg);
  2269. }
  2270. return ret;
  2271. }
  2272. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2273. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2274. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2275. {
  2276. struct cnss_ramdump_info *ramdump_info;
  2277. struct msm_dump_entry dump_entry;
  2278. ramdump_info = &plat_priv->ramdump_info;
  2279. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2280. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2281. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2282. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2283. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2284. sizeof(ramdump_info->dump_data.name));
  2285. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2286. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2287. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2288. &dump_entry);
  2289. }
  2290. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2291. {
  2292. int ret = 0;
  2293. struct device *dev;
  2294. struct cnss_ramdump_info *ramdump_info;
  2295. u32 ramdump_size = 0;
  2296. dev = &plat_priv->plat_dev->dev;
  2297. ramdump_info = &plat_priv->ramdump_info;
  2298. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2299. &ramdump_size) == 0) {
  2300. ramdump_info->ramdump_va =
  2301. dma_alloc_coherent(dev, ramdump_size,
  2302. &ramdump_info->ramdump_pa,
  2303. GFP_KERNEL);
  2304. if (ramdump_info->ramdump_va)
  2305. ramdump_info->ramdump_size = ramdump_size;
  2306. }
  2307. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2308. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2309. if (ramdump_info->ramdump_size == 0) {
  2310. cnss_pr_info("Ramdump will not be collected");
  2311. goto out;
  2312. }
  2313. ret = cnss_init_dump_entry(plat_priv);
  2314. if (ret) {
  2315. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2316. goto free_ramdump;
  2317. }
  2318. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2319. if (!ramdump_info->ramdump_dev) {
  2320. cnss_pr_err("Failed to create ramdump device!");
  2321. ret = -ENOMEM;
  2322. goto free_ramdump;
  2323. }
  2324. return 0;
  2325. free_ramdump:
  2326. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2327. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2328. out:
  2329. return ret;
  2330. }
  2331. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2332. {
  2333. struct device *dev;
  2334. struct cnss_ramdump_info *ramdump_info;
  2335. dev = &plat_priv->plat_dev->dev;
  2336. ramdump_info = &plat_priv->ramdump_info;
  2337. if (ramdump_info->ramdump_dev)
  2338. cnss_destroy_ramdump_device(plat_priv,
  2339. ramdump_info->ramdump_dev);
  2340. if (ramdump_info->ramdump_va)
  2341. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2342. ramdump_info->ramdump_va,
  2343. ramdump_info->ramdump_pa);
  2344. }
  2345. /**
  2346. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2347. * @ret: Error returned by msm_dump_data_register_nominidump
  2348. *
  2349. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2350. * ignore failure.
  2351. *
  2352. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2353. */
  2354. static int cnss_ignore_dump_data_reg_fail(int ret)
  2355. {
  2356. return ret;
  2357. }
  2358. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2359. {
  2360. int ret = 0;
  2361. struct cnss_ramdump_info_v2 *info_v2;
  2362. struct cnss_dump_data *dump_data;
  2363. struct msm_dump_entry dump_entry;
  2364. struct device *dev = &plat_priv->plat_dev->dev;
  2365. u32 ramdump_size = 0;
  2366. info_v2 = &plat_priv->ramdump_info_v2;
  2367. dump_data = &info_v2->dump_data;
  2368. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2369. &ramdump_size) == 0)
  2370. info_v2->ramdump_size = ramdump_size;
  2371. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2372. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2373. if (!info_v2->dump_data_vaddr)
  2374. return -ENOMEM;
  2375. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2376. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2377. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2378. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2379. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2380. sizeof(dump_data->name));
  2381. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2382. dump_entry.addr = virt_to_phys(dump_data);
  2383. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2384. &dump_entry);
  2385. if (ret) {
  2386. ret = cnss_ignore_dump_data_reg_fail(ret);
  2387. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2388. ret ? "Error" : "Ignoring", ret);
  2389. goto free_ramdump;
  2390. }
  2391. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2392. if (!info_v2->ramdump_dev) {
  2393. cnss_pr_err("Failed to create ramdump device!\n");
  2394. ret = -ENOMEM;
  2395. goto free_ramdump;
  2396. }
  2397. return 0;
  2398. free_ramdump:
  2399. kfree(info_v2->dump_data_vaddr);
  2400. info_v2->dump_data_vaddr = NULL;
  2401. return ret;
  2402. }
  2403. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2404. {
  2405. struct cnss_ramdump_info_v2 *info_v2;
  2406. info_v2 = &plat_priv->ramdump_info_v2;
  2407. if (info_v2->ramdump_dev)
  2408. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2409. kfree(info_v2->dump_data_vaddr);
  2410. info_v2->dump_data_vaddr = NULL;
  2411. info_v2->dump_data_valid = false;
  2412. }
  2413. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2414. {
  2415. int ret = 0;
  2416. switch (plat_priv->device_id) {
  2417. case QCA6174_DEVICE_ID:
  2418. ret = cnss_register_ramdump_v1(plat_priv);
  2419. break;
  2420. case QCA6290_DEVICE_ID:
  2421. case QCA6390_DEVICE_ID:
  2422. case QCA6490_DEVICE_ID:
  2423. case KIWI_DEVICE_ID:
  2424. ret = cnss_register_ramdump_v2(plat_priv);
  2425. break;
  2426. default:
  2427. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2428. ret = -ENODEV;
  2429. break;
  2430. }
  2431. return ret;
  2432. }
  2433. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2434. {
  2435. switch (plat_priv->device_id) {
  2436. case QCA6174_DEVICE_ID:
  2437. cnss_unregister_ramdump_v1(plat_priv);
  2438. break;
  2439. case QCA6290_DEVICE_ID:
  2440. case QCA6390_DEVICE_ID:
  2441. case QCA6490_DEVICE_ID:
  2442. case KIWI_DEVICE_ID:
  2443. cnss_unregister_ramdump_v2(plat_priv);
  2444. break;
  2445. default:
  2446. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2447. break;
  2448. }
  2449. }
  2450. #else
  2451. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2452. {
  2453. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2454. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2455. struct device *dev = &plat_priv->plat_dev->dev;
  2456. u32 ramdump_size = 0;
  2457. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2458. &ramdump_size) == 0)
  2459. info_v2->ramdump_size = ramdump_size;
  2460. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2461. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2462. if (!info_v2->dump_data_vaddr)
  2463. return -ENOMEM;
  2464. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2465. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2466. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2467. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2468. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2469. sizeof(dump_data->name));
  2470. info_v2->ramdump_dev = dev;
  2471. return 0;
  2472. }
  2473. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2474. {
  2475. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2476. info_v2->ramdump_dev = NULL;
  2477. kfree(info_v2->dump_data_vaddr);
  2478. info_v2->dump_data_vaddr = NULL;
  2479. info_v2->dump_data_valid = false;
  2480. }
  2481. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2482. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2483. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2484. phys_addr_t *pa, unsigned long attrs)
  2485. {
  2486. struct sg_table sgt;
  2487. int ret;
  2488. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2489. if (ret) {
  2490. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2491. va, &dma, size, attrs);
  2492. return -EINVAL;
  2493. }
  2494. *pa = page_to_phys(sg_page(sgt.sgl));
  2495. sg_free_table(&sgt);
  2496. return 0;
  2497. }
  2498. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2499. enum cnss_fw_dump_type type, int seg_no,
  2500. void *va, phys_addr_t pa, size_t size)
  2501. {
  2502. struct md_region md_entry;
  2503. int ret;
  2504. switch (type) {
  2505. case CNSS_FW_IMAGE:
  2506. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2507. seg_no);
  2508. break;
  2509. case CNSS_FW_RDDM:
  2510. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2511. seg_no);
  2512. break;
  2513. case CNSS_FW_REMOTE_HEAP:
  2514. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2515. seg_no);
  2516. break;
  2517. default:
  2518. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2519. return -EINVAL;
  2520. }
  2521. md_entry.phys_addr = pa;
  2522. md_entry.virt_addr = (uintptr_t)va;
  2523. md_entry.size = size;
  2524. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2525. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2526. md_entry.name, va, &pa, size);
  2527. ret = msm_minidump_add_region(&md_entry);
  2528. if (ret < 0)
  2529. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2530. return ret;
  2531. }
  2532. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2533. enum cnss_fw_dump_type type, int seg_no,
  2534. void *va, phys_addr_t pa, size_t size)
  2535. {
  2536. struct md_region md_entry;
  2537. int ret;
  2538. switch (type) {
  2539. case CNSS_FW_IMAGE:
  2540. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2541. seg_no);
  2542. break;
  2543. case CNSS_FW_RDDM:
  2544. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2545. seg_no);
  2546. break;
  2547. case CNSS_FW_REMOTE_HEAP:
  2548. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2549. seg_no);
  2550. break;
  2551. default:
  2552. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2553. return -EINVAL;
  2554. }
  2555. md_entry.phys_addr = pa;
  2556. md_entry.virt_addr = (uintptr_t)va;
  2557. md_entry.size = size;
  2558. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2559. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2560. md_entry.name, va, &pa, size);
  2561. ret = msm_minidump_remove_region(&md_entry);
  2562. if (ret)
  2563. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2564. ret);
  2565. return ret;
  2566. }
  2567. #else
  2568. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2569. phys_addr_t *pa, unsigned long attrs)
  2570. {
  2571. return 0;
  2572. }
  2573. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2574. enum cnss_fw_dump_type type, int seg_no,
  2575. void *va, phys_addr_t pa, size_t size)
  2576. {
  2577. return 0;
  2578. }
  2579. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2580. enum cnss_fw_dump_type type, int seg_no,
  2581. void *va, phys_addr_t pa, size_t size)
  2582. {
  2583. return 0;
  2584. }
  2585. #endif /* CONFIG_QCOM_MINIDUMP */
  2586. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2587. const struct firmware **fw_entry,
  2588. const char *filename)
  2589. {
  2590. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2591. return request_firmware_direct(fw_entry, filename,
  2592. &plat_priv->plat_dev->dev);
  2593. else
  2594. return firmware_request_nowarn(fw_entry, filename,
  2595. &plat_priv->plat_dev->dev);
  2596. }
  2597. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2598. /**
  2599. * cnss_register_bus_scale() - Setup interconnect voting data
  2600. * @plat_priv: Platform data structure
  2601. *
  2602. * For different interconnect path configured in device tree setup voting data
  2603. * for list of bandwidth requirements.
  2604. *
  2605. * Result: 0 for success. -EINVAL if not configured
  2606. */
  2607. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2608. {
  2609. int ret = -EINVAL;
  2610. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  2611. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2612. struct device *dev = &plat_priv->plat_dev->dev;
  2613. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  2614. ret = of_property_read_u32(dev->of_node,
  2615. "qcom,icc-path-count",
  2616. &plat_priv->icc.path_count);
  2617. if (ret) {
  2618. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  2619. return 0;
  2620. }
  2621. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  2622. "qcom,bus-bw-cfg-count",
  2623. &plat_priv->icc.bus_bw_cfg_count);
  2624. if (ret) {
  2625. cnss_pr_err("Failed to get Bus BW Config table size\n");
  2626. goto cleanup;
  2627. }
  2628. cfg_arr_size = plat_priv->icc.path_count *
  2629. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  2630. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  2631. if (!cfg_arr) {
  2632. cnss_pr_err("Failed to alloc cfg table mem\n");
  2633. ret = -ENOMEM;
  2634. goto cleanup;
  2635. }
  2636. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  2637. "qcom,bus-bw-cfg", cfg_arr,
  2638. cfg_arr_size);
  2639. if (ret) {
  2640. cnss_pr_err("Invalid Bus BW Config Table\n");
  2641. goto cleanup;
  2642. }
  2643. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  2644. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  2645. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  2646. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  2647. GFP_KERNEL);
  2648. if (!bus_bw_info) {
  2649. ret = -ENOMEM;
  2650. goto out;
  2651. }
  2652. ret = of_property_read_string_index(dev->of_node,
  2653. "interconnect-names", idx,
  2654. &bus_bw_info->icc_name);
  2655. if (ret)
  2656. goto out;
  2657. bus_bw_info->icc_path =
  2658. of_icc_get(&plat_priv->plat_dev->dev,
  2659. bus_bw_info->icc_name);
  2660. if (IS_ERR(bus_bw_info->icc_path)) {
  2661. ret = PTR_ERR(bus_bw_info->icc_path);
  2662. if (ret != -EPROBE_DEFER) {
  2663. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  2664. bus_bw_info->icc_name, ret);
  2665. goto out;
  2666. }
  2667. }
  2668. bus_bw_info->cfg_table =
  2669. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  2670. sizeof(*bus_bw_info->cfg_table),
  2671. GFP_KERNEL);
  2672. if (!bus_bw_info->cfg_table) {
  2673. ret = -ENOMEM;
  2674. goto out;
  2675. }
  2676. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  2677. bus_bw_info->icc_name);
  2678. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  2679. CNSS_ICC_VOTE_MAX);
  2680. i < plat_priv->icc.bus_bw_cfg_count;
  2681. i++, j += 2) {
  2682. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  2683. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  2684. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  2685. i, bus_bw_info->cfg_table[i].avg_bw,
  2686. bus_bw_info->cfg_table[i].peak_bw);
  2687. }
  2688. list_add_tail(&bus_bw_info->list,
  2689. &plat_priv->icc.list_head);
  2690. }
  2691. kfree(cfg_arr);
  2692. return 0;
  2693. out:
  2694. list_for_each_entry_safe(bus_bw_info, tmp,
  2695. &plat_priv->icc.list_head, list) {
  2696. list_del(&bus_bw_info->list);
  2697. }
  2698. cleanup:
  2699. kfree(cfg_arr);
  2700. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2701. return ret;
  2702. }
  2703. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  2704. {
  2705. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2706. list_for_each_entry_safe(bus_bw_info, tmp,
  2707. &plat_priv->icc.list_head, list) {
  2708. list_del(&bus_bw_info->list);
  2709. if (bus_bw_info->icc_path)
  2710. icc_put(bus_bw_info->icc_path);
  2711. }
  2712. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2713. }
  2714. #else
  2715. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2716. {
  2717. return 0;
  2718. }
  2719. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  2720. #endif /* CONFIG_INTERCONNECT */
  2721. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  2722. {
  2723. struct cnss_plat_data *plat_priv = cb_ctx;
  2724. if (!plat_priv) {
  2725. cnss_pr_err("%s: Invalid context\n", __func__);
  2726. return;
  2727. }
  2728. if (status) {
  2729. cnss_pr_info("CNSS Daemon connected\n");
  2730. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2731. complete(&plat_priv->daemon_connected);
  2732. } else {
  2733. cnss_pr_info("CNSS Daemon disconnected\n");
  2734. reinit_completion(&plat_priv->daemon_connected);
  2735. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2736. }
  2737. }
  2738. static ssize_t enable_hds_store(struct device *dev,
  2739. struct device_attribute *attr,
  2740. const char *buf, size_t count)
  2741. {
  2742. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2743. unsigned int enable_hds = 0;
  2744. if (!plat_priv)
  2745. return -ENODEV;
  2746. if (sscanf(buf, "%du", &enable_hds) != 1) {
  2747. cnss_pr_err("Invalid enable_hds sysfs command\n");
  2748. return -EINVAL;
  2749. }
  2750. if (enable_hds)
  2751. plat_priv->hds_enabled = true;
  2752. else
  2753. plat_priv->hds_enabled = false;
  2754. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  2755. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  2756. return count;
  2757. }
  2758. static ssize_t recovery_show(struct device *dev,
  2759. struct device_attribute *attr,
  2760. char *buf)
  2761. {
  2762. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2763. u32 buf_size = PAGE_SIZE;
  2764. u32 curr_len = 0;
  2765. u32 buf_written = 0;
  2766. if (!plat_priv)
  2767. return -ENODEV;
  2768. buf_written = scnprintf(buf, buf_size,
  2769. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  2770. "BIT0 -- wlan fw recovery\n"
  2771. "BIT1 -- wlan pcss recovery\n"
  2772. "---------------------------------\n");
  2773. curr_len += buf_written;
  2774. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2775. "WLAN recovery %s[%d]\n",
  2776. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  2777. plat_priv->recovery_enabled);
  2778. curr_len += buf_written;
  2779. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2780. "WLAN PCSS recovery %s[%d]\n",
  2781. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  2782. plat_priv->recovery_pcss_enabled);
  2783. curr_len += buf_written;
  2784. /*
  2785. * Now size of curr_len is not over page size for sure,
  2786. * later if new item or none-fixed size item added, need
  2787. * add check to make sure curr_len is not over page size.
  2788. */
  2789. return curr_len;
  2790. }
  2791. static ssize_t recovery_store(struct device *dev,
  2792. struct device_attribute *attr,
  2793. const char *buf, size_t count)
  2794. {
  2795. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2796. unsigned int recovery = 0;
  2797. int ret;
  2798. if (!plat_priv)
  2799. return -ENODEV;
  2800. if (sscanf(buf, "%du", &recovery) != 1) {
  2801. cnss_pr_err("Invalid recovery sysfs command\n");
  2802. return -EINVAL;
  2803. }
  2804. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  2805. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  2806. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  2807. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  2808. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  2809. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  2810. ret = cnss_send_subsys_restart_level_msg(plat_priv);
  2811. if (ret < 0) {
  2812. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  2813. plat_priv->recovery_pcss_enabled = false;
  2814. return -EINVAL;
  2815. }
  2816. return count;
  2817. }
  2818. static ssize_t shutdown_store(struct device *dev,
  2819. struct device_attribute *attr,
  2820. const char *buf, size_t count)
  2821. {
  2822. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2823. if (plat_priv) {
  2824. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  2825. del_timer(&plat_priv->fw_boot_timer);
  2826. complete_all(&plat_priv->power_up_complete);
  2827. complete_all(&plat_priv->cal_complete);
  2828. }
  2829. cnss_pr_dbg("Received shutdown notification\n");
  2830. return count;
  2831. }
  2832. static ssize_t fs_ready_store(struct device *dev,
  2833. struct device_attribute *attr,
  2834. const char *buf, size_t count)
  2835. {
  2836. int fs_ready = 0;
  2837. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2838. if (sscanf(buf, "%du", &fs_ready) != 1)
  2839. return -EINVAL;
  2840. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  2841. fs_ready, count);
  2842. if (!plat_priv) {
  2843. cnss_pr_err("plat_priv is NULL\n");
  2844. return count;
  2845. }
  2846. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  2847. cnss_pr_dbg("QMI is bypassed\n");
  2848. return count;
  2849. }
  2850. switch (plat_priv->device_id) {
  2851. case QCA6290_DEVICE_ID:
  2852. case QCA6390_DEVICE_ID:
  2853. case QCA6490_DEVICE_ID:
  2854. case KIWI_DEVICE_ID:
  2855. break;
  2856. default:
  2857. cnss_pr_err("Not supported for device ID 0x%lx\n",
  2858. plat_priv->device_id);
  2859. return count;
  2860. }
  2861. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  2862. cnss_driver_event_post(plat_priv,
  2863. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  2864. 0, NULL);
  2865. }
  2866. return count;
  2867. }
  2868. static ssize_t qdss_trace_start_store(struct device *dev,
  2869. struct device_attribute *attr,
  2870. const char *buf, size_t count)
  2871. {
  2872. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2873. wlfw_qdss_trace_start(plat_priv);
  2874. cnss_pr_dbg("Received QDSS start command\n");
  2875. return count;
  2876. }
  2877. static ssize_t qdss_trace_stop_store(struct device *dev,
  2878. struct device_attribute *attr,
  2879. const char *buf, size_t count)
  2880. {
  2881. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2882. u32 option = 0;
  2883. if (sscanf(buf, "%du", &option) != 1)
  2884. return -EINVAL;
  2885. wlfw_qdss_trace_stop(plat_priv, option);
  2886. cnss_pr_dbg("Received QDSS stop command\n");
  2887. return count;
  2888. }
  2889. static ssize_t qdss_conf_download_store(struct device *dev,
  2890. struct device_attribute *attr,
  2891. const char *buf, size_t count)
  2892. {
  2893. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2894. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  2895. cnss_pr_dbg("Received QDSS download config command\n");
  2896. return count;
  2897. }
  2898. static ssize_t hw_trace_override_store(struct device *dev,
  2899. struct device_attribute *attr,
  2900. const char *buf, size_t count)
  2901. {
  2902. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2903. int tmp = 0;
  2904. if (sscanf(buf, "%du", &tmp) != 1)
  2905. return -EINVAL;
  2906. plat_priv->hw_trc_override = tmp;
  2907. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2908. return count;
  2909. }
  2910. static ssize_t charger_mode_store(struct device *dev,
  2911. struct device_attribute *attr,
  2912. const char *buf, size_t count)
  2913. {
  2914. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2915. int tmp = 0;
  2916. if (sscanf(buf, "%du", &tmp) != 1)
  2917. return -EINVAL;
  2918. plat_priv->charger_mode = tmp;
  2919. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  2920. return count;
  2921. }
  2922. static DEVICE_ATTR_WO(fs_ready);
  2923. static DEVICE_ATTR_WO(shutdown);
  2924. static DEVICE_ATTR_RW(recovery);
  2925. static DEVICE_ATTR_WO(enable_hds);
  2926. static DEVICE_ATTR_WO(qdss_trace_start);
  2927. static DEVICE_ATTR_WO(qdss_trace_stop);
  2928. static DEVICE_ATTR_WO(qdss_conf_download);
  2929. static DEVICE_ATTR_WO(hw_trace_override);
  2930. static DEVICE_ATTR_WO(charger_mode);
  2931. static struct attribute *cnss_attrs[] = {
  2932. &dev_attr_fs_ready.attr,
  2933. &dev_attr_shutdown.attr,
  2934. &dev_attr_recovery.attr,
  2935. &dev_attr_enable_hds.attr,
  2936. &dev_attr_qdss_trace_start.attr,
  2937. &dev_attr_qdss_trace_stop.attr,
  2938. &dev_attr_qdss_conf_download.attr,
  2939. &dev_attr_hw_trace_override.attr,
  2940. &dev_attr_charger_mode.attr,
  2941. NULL,
  2942. };
  2943. static struct attribute_group cnss_attr_group = {
  2944. .attrs = cnss_attrs,
  2945. };
  2946. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  2947. {
  2948. struct device *dev = &plat_priv->plat_dev->dev;
  2949. int ret;
  2950. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "cnss");
  2951. if (ret) {
  2952. cnss_pr_err("Failed to create cnss link, err = %d\n",
  2953. ret);
  2954. goto out;
  2955. }
  2956. /* This is only for backward compatibility. */
  2957. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "shutdown_wlan");
  2958. if (ret) {
  2959. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  2960. ret);
  2961. goto rm_cnss_link;
  2962. }
  2963. return 0;
  2964. rm_cnss_link:
  2965. sysfs_remove_link(kernel_kobj, "cnss");
  2966. out:
  2967. return ret;
  2968. }
  2969. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  2970. {
  2971. sysfs_remove_link(kernel_kobj, "shutdown_wlan");
  2972. sysfs_remove_link(kernel_kobj, "cnss");
  2973. }
  2974. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  2975. {
  2976. int ret = 0;
  2977. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  2978. &cnss_attr_group);
  2979. if (ret) {
  2980. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  2981. ret);
  2982. goto out;
  2983. }
  2984. cnss_create_sysfs_link(plat_priv);
  2985. return 0;
  2986. out:
  2987. return ret;
  2988. }
  2989. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  2990. {
  2991. cnss_remove_sysfs_link(plat_priv);
  2992. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  2993. }
  2994. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  2995. {
  2996. spin_lock_init(&plat_priv->event_lock);
  2997. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  2998. WQ_UNBOUND, 1);
  2999. if (!plat_priv->event_wq) {
  3000. cnss_pr_err("Failed to create event workqueue!\n");
  3001. return -EFAULT;
  3002. }
  3003. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3004. INIT_LIST_HEAD(&plat_priv->event_list);
  3005. return 0;
  3006. }
  3007. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3008. {
  3009. destroy_workqueue(plat_priv->event_wq);
  3010. }
  3011. static int cnss_reboot_notifier(struct notifier_block *nb,
  3012. unsigned long action,
  3013. void *data)
  3014. {
  3015. struct cnss_plat_data *plat_priv =
  3016. container_of(nb, struct cnss_plat_data, reboot_nb);
  3017. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3018. del_timer(&plat_priv->fw_boot_timer);
  3019. complete_all(&plat_priv->power_up_complete);
  3020. complete_all(&plat_priv->cal_complete);
  3021. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3022. return NOTIFY_DONE;
  3023. }
  3024. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3025. {
  3026. int ret;
  3027. ret = cnss_init_sol_gpio(plat_priv);
  3028. if (ret)
  3029. return ret;
  3030. timer_setup(&plat_priv->fw_boot_timer,
  3031. cnss_bus_fw_boot_timeout_hdlr, 0);
  3032. ret = register_pm_notifier(&cnss_pm_notifier);
  3033. if (ret)
  3034. cnss_pr_err("Failed to register PM notifier, err = %d\n", ret);
  3035. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3036. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3037. if (ret)
  3038. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3039. ret);
  3040. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3041. if (ret)
  3042. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3043. ret);
  3044. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3045. init_completion(&plat_priv->power_up_complete);
  3046. init_completion(&plat_priv->cal_complete);
  3047. init_completion(&plat_priv->rddm_complete);
  3048. init_completion(&plat_priv->recovery_complete);
  3049. init_completion(&plat_priv->daemon_connected);
  3050. mutex_init(&plat_priv->dev_lock);
  3051. mutex_init(&plat_priv->driver_ops_lock);
  3052. plat_priv->recovery_ws =
  3053. wakeup_source_register(&plat_priv->plat_dev->dev,
  3054. "CNSS_FW_RECOVERY");
  3055. if (!plat_priv->recovery_ws)
  3056. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3057. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3058. cnss_daemon_connection_update_cb,
  3059. plat_priv);
  3060. if (ret)
  3061. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3062. ret);
  3063. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3064. return 0;
  3065. }
  3066. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3067. {
  3068. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3069. plat_priv);
  3070. complete_all(&plat_priv->recovery_complete);
  3071. complete_all(&plat_priv->rddm_complete);
  3072. complete_all(&plat_priv->cal_complete);
  3073. complete_all(&plat_priv->power_up_complete);
  3074. complete_all(&plat_priv->daemon_connected);
  3075. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3076. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3077. unregister_pm_notifier(&cnss_pm_notifier);
  3078. del_timer(&plat_priv->fw_boot_timer);
  3079. wakeup_source_unregister(plat_priv->recovery_ws);
  3080. cnss_deinit_sol_gpio(plat_priv);
  3081. kfree(plat_priv->sram_dump);
  3082. }
  3083. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3084. {
  3085. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3086. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3087. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3088. "qcom,wlan-cbc-enabled");
  3089. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3090. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3091. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3092. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3093. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3094. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3095. * enabled by default
  3096. */
  3097. plat_priv->adsp_pc_enabled = true;
  3098. }
  3099. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3100. {
  3101. struct device *dev = &plat_priv->plat_dev->dev;
  3102. plat_priv->use_pm_domain =
  3103. of_property_read_bool(dev->of_node, "use-pm-domain");
  3104. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3105. }
  3106. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3107. {
  3108. struct device *dev = &plat_priv->plat_dev->dev;
  3109. plat_priv->set_wlaon_pwr_ctrl =
  3110. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3111. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3112. plat_priv->set_wlaon_pwr_ctrl);
  3113. }
  3114. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3115. {
  3116. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3117. "qcom,converged-dt") ||
  3118. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3119. "qcom,same-dt-multi-dev") ||
  3120. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3121. "qcom,multi-wlan-exchg"));
  3122. }
  3123. static const struct platform_device_id cnss_platform_id_table[] = {
  3124. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3125. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3126. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3127. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3128. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3129. { .name = "qcaconv", .driver_data = 0, },
  3130. { },
  3131. };
  3132. static const struct of_device_id cnss_of_match_table[] = {
  3133. {
  3134. .compatible = "qcom,cnss",
  3135. .data = (void *)&cnss_platform_id_table[0]},
  3136. {
  3137. .compatible = "qcom,cnss-qca6290",
  3138. .data = (void *)&cnss_platform_id_table[1]},
  3139. {
  3140. .compatible = "qcom,cnss-qca6390",
  3141. .data = (void *)&cnss_platform_id_table[2]},
  3142. {
  3143. .compatible = "qcom,cnss-qca6490",
  3144. .data = (void *)&cnss_platform_id_table[3]},
  3145. {
  3146. .compatible = "qcom,cnss-kiwi",
  3147. .data = (void *)&cnss_platform_id_table[4]},
  3148. {
  3149. .compatible = "qcom,cnss-qca-converged",
  3150. .data = (void *)&cnss_platform_id_table[5]},
  3151. { },
  3152. };
  3153. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3154. static inline bool
  3155. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3156. {
  3157. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3158. "use-nv-mac");
  3159. }
  3160. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3161. {
  3162. struct device_node *child;
  3163. u32 id, i;
  3164. int id_n, device_identifier_gpio, ret;
  3165. u8 gpio_value;
  3166. if (!plat_priv->is_converged_dt)
  3167. return 0;
  3168. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3169. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3170. if (ret) {
  3171. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3172. return ret;
  3173. }
  3174. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3175. gpio_value = gpio_get_value(device_identifier_gpio);
  3176. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3177. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3178. child) {
  3179. if (strcmp(child->name, "chip_cfg"))
  3180. continue;
  3181. id_n = of_property_count_u32_elems(child, "supported-ids");
  3182. if (id_n <= 0) {
  3183. cnss_pr_err("Device id is NOT set\n");
  3184. return -EINVAL;
  3185. }
  3186. for (i = 0; i < id_n; i++) {
  3187. ret = of_property_read_u32_index(child,
  3188. "supported-ids",
  3189. i, &id);
  3190. if (ret) {
  3191. cnss_pr_err("Failed to read supported ids\n");
  3192. return -EINVAL;
  3193. }
  3194. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3195. plat_priv->plat_dev->dev.of_node = child;
  3196. plat_priv->device_id = QCA6490_DEVICE_ID;
  3197. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3198. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3199. child->name, i, id);
  3200. return 0;
  3201. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3202. plat_priv->plat_dev->dev.of_node = child;
  3203. plat_priv->device_id = KIWI_DEVICE_ID;
  3204. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3205. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3206. child->name, i, id);
  3207. return 0;
  3208. }
  3209. }
  3210. }
  3211. return -EINVAL;
  3212. }
  3213. static inline bool
  3214. cnss_is_converged_dt(struct cnss_plat_data *plat_priv)
  3215. {
  3216. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3217. "qcom,converged-dt");
  3218. }
  3219. static int cnss_probe(struct platform_device *plat_dev)
  3220. {
  3221. int ret = 0;
  3222. struct cnss_plat_data *plat_priv;
  3223. const struct of_device_id *of_id;
  3224. const struct platform_device_id *device_id;
  3225. int retry = 0;
  3226. if (cnss_get_plat_priv(plat_dev)) {
  3227. cnss_pr_err("Driver is already initialized!\n");
  3228. ret = -EEXIST;
  3229. goto out;
  3230. }
  3231. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  3232. if (!of_id || !of_id->data) {
  3233. cnss_pr_err("Failed to find of match device!\n");
  3234. ret = -ENODEV;
  3235. goto out;
  3236. }
  3237. device_id = of_id->data;
  3238. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  3239. GFP_KERNEL);
  3240. if (!plat_priv) {
  3241. ret = -ENOMEM;
  3242. goto out;
  3243. }
  3244. plat_priv->plat_dev = plat_dev;
  3245. plat_priv->device_id = device_id->driver_data;
  3246. plat_priv->is_converged_dt = cnss_is_converged_dt(plat_priv);
  3247. plat_priv->use_fw_path_with_prefix =
  3248. cnss_use_fw_path_with_prefix(plat_priv);
  3249. ret = cnss_get_dev_cfg_node(plat_priv);
  3250. if (ret) {
  3251. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  3252. goto reset_plat_dev;
  3253. }
  3254. plat_priv->bus_type = cnss_get_bus_type(plat_priv->device_id);
  3255. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  3256. cnss_set_plat_priv(plat_dev, plat_priv);
  3257. platform_set_drvdata(plat_dev, plat_priv);
  3258. INIT_LIST_HEAD(&plat_priv->vreg_list);
  3259. INIT_LIST_HEAD(&plat_priv->clk_list);
  3260. cnss_get_pm_domain_info(plat_priv);
  3261. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  3262. cnss_power_misc_params_init(plat_priv);
  3263. cnss_get_tcs_info(plat_priv);
  3264. cnss_get_cpr_info(plat_priv);
  3265. cnss_aop_mbox_init(plat_priv);
  3266. cnss_init_control_params(plat_priv);
  3267. ret = cnss_get_resources(plat_priv);
  3268. if (ret)
  3269. goto reset_ctx;
  3270. ret = cnss_register_esoc(plat_priv);
  3271. if (ret)
  3272. goto free_res;
  3273. ret = cnss_register_bus_scale(plat_priv);
  3274. if (ret)
  3275. goto unreg_esoc;
  3276. ret = cnss_create_sysfs(plat_priv);
  3277. if (ret)
  3278. goto unreg_bus_scale;
  3279. ret = cnss_event_work_init(plat_priv);
  3280. if (ret)
  3281. goto remove_sysfs;
  3282. ret = cnss_qmi_init(plat_priv);
  3283. if (ret)
  3284. goto deinit_event_work;
  3285. ret = cnss_dms_init(plat_priv);
  3286. if (ret)
  3287. goto deinit_qmi;
  3288. ret = cnss_debugfs_create(plat_priv);
  3289. if (ret)
  3290. goto deinit_dms;
  3291. ret = cnss_misc_init(plat_priv);
  3292. if (ret)
  3293. goto destroy_debugfs;
  3294. /* Make sure all platform related init are done before
  3295. * device power on and bus init.
  3296. */
  3297. if (!test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks)) {
  3298. retry:
  3299. ret = cnss_power_on_device(plat_priv);
  3300. if (ret)
  3301. goto deinit_misc;
  3302. ret = cnss_bus_init(plat_priv);
  3303. if (ret) {
  3304. if ((ret != -EPROBE_DEFER) &&
  3305. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3306. cnss_power_off_device(plat_priv);
  3307. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3308. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3309. goto retry;
  3310. }
  3311. goto power_off;
  3312. }
  3313. }
  3314. cnss_register_coex_service(plat_priv);
  3315. cnss_register_ims_service(plat_priv);
  3316. ret = cnss_genl_init();
  3317. if (ret < 0)
  3318. cnss_pr_err("CNSS genl init failed %d\n", ret);
  3319. cnss_pr_info("Platform driver probed successfully.\n");
  3320. return 0;
  3321. power_off:
  3322. if (!test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3323. cnss_power_off_device(plat_priv);
  3324. deinit_misc:
  3325. cnss_misc_deinit(plat_priv);
  3326. destroy_debugfs:
  3327. cnss_debugfs_destroy(plat_priv);
  3328. deinit_dms:
  3329. cnss_dms_deinit(plat_priv);
  3330. deinit_qmi:
  3331. cnss_qmi_deinit(plat_priv);
  3332. deinit_event_work:
  3333. cnss_event_work_deinit(plat_priv);
  3334. remove_sysfs:
  3335. cnss_remove_sysfs(plat_priv);
  3336. unreg_bus_scale:
  3337. cnss_unregister_bus_scale(plat_priv);
  3338. unreg_esoc:
  3339. cnss_unregister_esoc(plat_priv);
  3340. free_res:
  3341. cnss_put_resources(plat_priv);
  3342. reset_ctx:
  3343. platform_set_drvdata(plat_dev, NULL);
  3344. reset_plat_dev:
  3345. cnss_set_plat_priv(plat_dev, NULL);
  3346. out:
  3347. return ret;
  3348. }
  3349. static int cnss_remove(struct platform_device *plat_dev)
  3350. {
  3351. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  3352. cnss_genl_exit();
  3353. cnss_unregister_ims_service(plat_priv);
  3354. cnss_unregister_coex_service(plat_priv);
  3355. cnss_bus_deinit(plat_priv);
  3356. cnss_misc_deinit(plat_priv);
  3357. cnss_debugfs_destroy(plat_priv);
  3358. cnss_dms_deinit(plat_priv);
  3359. cnss_qmi_deinit(plat_priv);
  3360. cnss_event_work_deinit(plat_priv);
  3361. cnss_remove_sysfs(plat_priv);
  3362. cnss_unregister_bus_scale(plat_priv);
  3363. cnss_unregister_esoc(plat_priv);
  3364. cnss_put_resources(plat_priv);
  3365. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  3366. mbox_free_channel(plat_priv->mbox_chan);
  3367. platform_set_drvdata(plat_dev, NULL);
  3368. plat_env = NULL;
  3369. return 0;
  3370. }
  3371. static struct platform_driver cnss_platform_driver = {
  3372. .probe = cnss_probe,
  3373. .remove = cnss_remove,
  3374. .driver = {
  3375. .name = "cnss2",
  3376. .of_match_table = cnss_of_match_table,
  3377. #ifdef CONFIG_CNSS_ASYNC
  3378. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3379. #endif
  3380. },
  3381. };
  3382. /**
  3383. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  3384. *
  3385. * Valid device tree node means a node with "compatible" property from the
  3386. * device match table and "status" property is not disabled.
  3387. *
  3388. * Return: true if valid device tree node found, false if not found
  3389. */
  3390. static bool cnss_is_valid_dt_node_found(void)
  3391. {
  3392. struct device_node *dn = NULL;
  3393. for_each_matching_node(dn, cnss_of_match_table) {
  3394. if (of_device_is_available(dn))
  3395. break;
  3396. }
  3397. if (dn)
  3398. return true;
  3399. return false;
  3400. }
  3401. static int __init cnss_initialize(void)
  3402. {
  3403. int ret = 0;
  3404. if (!cnss_is_valid_dt_node_found())
  3405. return -ENODEV;
  3406. cnss_debug_init();
  3407. ret = platform_driver_register(&cnss_platform_driver);
  3408. if (ret)
  3409. cnss_debug_deinit();
  3410. return ret;
  3411. }
  3412. static void __exit cnss_exit(void)
  3413. {
  3414. platform_driver_unregister(&cnss_platform_driver);
  3415. cnss_debug_deinit();
  3416. }
  3417. module_init(cnss_initialize);
  3418. module_exit(cnss_exit);
  3419. MODULE_LICENSE("GPL v2");
  3420. MODULE_DESCRIPTION("CNSS2 Platform Driver");