main.c 108 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/version.h>
  20. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  21. #include <linux/panic_notifier.h>
  22. #endif
  23. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  24. #include <soc/qcom/minidump.h>
  25. #endif
  26. #include "cnss_plat_ipc_qmi.h"
  27. #include "cnss_utils.h"
  28. #include "main.h"
  29. #include "bus.h"
  30. #include "debug.h"
  31. #include "genl.h"
  32. #include "reg.h"
  33. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  34. #include "smcinvoke.h"
  35. #include "smcinvoke_object.h"
  36. #include "IClientEnv.h"
  37. #define HW_STATE_UID 0x108
  38. #define HW_OP_GET_STATE 1
  39. #define HW_WIFI_UID 0x508
  40. #define FEATURE_NOT_SUPPORTED 12
  41. #define PERIPHERAL_NOT_FOUND 10
  42. #endif
  43. #define CNSS_DUMP_FORMAT_VER 0x11
  44. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  45. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  46. #define CNSS_DUMP_NAME "CNSS_WLAN"
  47. #define CNSS_DUMP_DESC_SIZE 0x1000
  48. #define CNSS_DUMP_SEG_VER 0x1
  49. #define FILE_SYSTEM_READY 1
  50. #define FW_READY_TIMEOUT 20000
  51. #define FW_ASSERT_TIMEOUT 5000
  52. #define CNSS_EVENT_PENDING 2989
  53. #define POWER_RESET_MIN_DELAY_MS 100
  54. #define CNSS_QUIRKS_DEFAULT 0
  55. #ifdef CONFIG_CNSS_EMULATION
  56. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  57. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  58. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  59. #else
  60. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  61. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  62. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  63. #endif
  64. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  65. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  66. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  67. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  68. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  69. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  70. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  71. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  72. enum cnss_cal_db_op {
  73. CNSS_CAL_DB_UPLOAD,
  74. CNSS_CAL_DB_DOWNLOAD,
  75. CNSS_CAL_DB_INVALID_OP,
  76. };
  77. enum cnss_recovery_type {
  78. CNSS_WLAN_RECOVERY = 0x1,
  79. CNSS_PCSS_RECOVERY = 0x2,
  80. };
  81. static struct cnss_plat_data *plat_env;
  82. static bool cnss_allow_driver_loading;
  83. static DECLARE_RWSEM(cnss_pm_sem);
  84. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  85. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  86. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  87. };
  88. static struct cnss_fw_files FW_FILES_DEFAULT = {
  89. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  90. "utfbd.bin", "epping.bin", "evicted.bin"
  91. };
  92. struct cnss_driver_event {
  93. struct list_head list;
  94. enum cnss_driver_event_type type;
  95. bool sync;
  96. struct completion complete;
  97. int ret;
  98. void *data;
  99. };
  100. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  101. struct cnss_plat_data *plat_priv)
  102. {
  103. plat_env = plat_priv;
  104. }
  105. bool cnss_check_driver_loading_allowed(void)
  106. {
  107. return cnss_allow_driver_loading;
  108. }
  109. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  110. {
  111. return plat_env;
  112. }
  113. /**
  114. * cnss_get_mem_seg_count - Get segment count of memory
  115. * @type: memory type
  116. * @seg: segment count
  117. *
  118. * Return: 0 on success, negative value on failure
  119. */
  120. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  121. {
  122. struct cnss_plat_data *plat_priv;
  123. plat_priv = cnss_get_plat_priv(NULL);
  124. if (!plat_priv)
  125. return -ENODEV;
  126. switch (type) {
  127. case CNSS_REMOTE_MEM_TYPE_FW:
  128. *seg = plat_priv->fw_mem_seg_len;
  129. break;
  130. case CNSS_REMOTE_MEM_TYPE_QDSS:
  131. *seg = plat_priv->qdss_mem_seg_len;
  132. break;
  133. default:
  134. return -EINVAL;
  135. }
  136. return 0;
  137. }
  138. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  139. /**
  140. * cnss_get_mem_segment_info - Get memory info of different type
  141. * @type: memory type
  142. * @segment: array to save the segment info
  143. * @seg: segment count
  144. *
  145. * Return: 0 on success, negative value on failure
  146. */
  147. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  148. struct cnss_mem_segment segment[],
  149. u32 segment_count)
  150. {
  151. struct cnss_plat_data *plat_priv;
  152. u32 i;
  153. plat_priv = cnss_get_plat_priv(NULL);
  154. if (!plat_priv)
  155. return -ENODEV;
  156. switch (type) {
  157. case CNSS_REMOTE_MEM_TYPE_FW:
  158. if (segment_count > plat_priv->fw_mem_seg_len)
  159. segment_count = plat_priv->fw_mem_seg_len;
  160. for (i = 0; i < segment_count; i++) {
  161. segment[i].size = plat_priv->fw_mem[i].size;
  162. segment[i].va = plat_priv->fw_mem[i].va;
  163. segment[i].pa = plat_priv->fw_mem[i].pa;
  164. }
  165. break;
  166. case CNSS_REMOTE_MEM_TYPE_QDSS:
  167. if (segment_count > plat_priv->qdss_mem_seg_len)
  168. segment_count = plat_priv->qdss_mem_seg_len;
  169. for (i = 0; i < segment_count; i++) {
  170. segment[i].size = plat_priv->qdss_mem[i].size;
  171. segment[i].va = plat_priv->qdss_mem[i].va;
  172. segment[i].pa = plat_priv->qdss_mem[i].pa;
  173. }
  174. break;
  175. default:
  176. return -EINVAL;
  177. }
  178. return 0;
  179. }
  180. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  181. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  182. enum cnss_feature_v01 feature)
  183. {
  184. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  185. return -EINVAL;
  186. plat_priv->feature_list |= 1 << feature;
  187. return 0;
  188. }
  189. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  190. enum cnss_feature_v01 feature)
  191. {
  192. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  193. return -EINVAL;
  194. plat_priv->feature_list &= ~(1 << feature);
  195. return 0;
  196. }
  197. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  198. u64 *feature_list)
  199. {
  200. if (unlikely(!plat_priv))
  201. return -EINVAL;
  202. *feature_list = plat_priv->feature_list;
  203. return 0;
  204. }
  205. static int cnss_pm_notify(struct notifier_block *b,
  206. unsigned long event, void *p)
  207. {
  208. switch (event) {
  209. case PM_SUSPEND_PREPARE:
  210. down_write(&cnss_pm_sem);
  211. break;
  212. case PM_POST_SUSPEND:
  213. up_write(&cnss_pm_sem);
  214. break;
  215. }
  216. return NOTIFY_DONE;
  217. }
  218. static struct notifier_block cnss_pm_notifier = {
  219. .notifier_call = cnss_pm_notify,
  220. };
  221. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  222. {
  223. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  224. return;
  225. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  226. plat_priv->driver_state,
  227. atomic_read(&plat_priv->pm_count));
  228. pm_stay_awake(&plat_priv->plat_dev->dev);
  229. }
  230. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  231. {
  232. int r = atomic_dec_return(&plat_priv->pm_count);
  233. WARN_ON(r < 0);
  234. if (r != 0)
  235. return;
  236. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  237. plat_priv->driver_state,
  238. atomic_read(&plat_priv->pm_count));
  239. pm_relax(&plat_priv->plat_dev->dev);
  240. }
  241. void cnss_lock_pm_sem(struct device *dev)
  242. {
  243. down_read(&cnss_pm_sem);
  244. }
  245. EXPORT_SYMBOL(cnss_lock_pm_sem);
  246. void cnss_release_pm_sem(struct device *dev)
  247. {
  248. up_read(&cnss_pm_sem);
  249. }
  250. EXPORT_SYMBOL(cnss_release_pm_sem);
  251. int cnss_get_fw_files_for_target(struct device *dev,
  252. struct cnss_fw_files *pfw_files,
  253. u32 target_type, u32 target_version)
  254. {
  255. if (!pfw_files)
  256. return -ENODEV;
  257. switch (target_version) {
  258. case QCA6174_REV3_VERSION:
  259. case QCA6174_REV3_2_VERSION:
  260. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  261. break;
  262. default:
  263. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  264. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  265. target_type, target_version);
  266. break;
  267. }
  268. return 0;
  269. }
  270. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  271. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  272. {
  273. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  274. if (!plat_priv)
  275. return -ENODEV;
  276. if (!cap)
  277. return -EINVAL;
  278. *cap = plat_priv->cap;
  279. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  280. return 0;
  281. }
  282. EXPORT_SYMBOL(cnss_get_platform_cap);
  283. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  284. {
  285. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  286. if (!plat_priv)
  287. return;
  288. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  289. }
  290. EXPORT_SYMBOL(cnss_request_pm_qos);
  291. void cnss_remove_pm_qos(struct device *dev)
  292. {
  293. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  294. if (!plat_priv)
  295. return;
  296. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  297. }
  298. EXPORT_SYMBOL(cnss_remove_pm_qos);
  299. int cnss_wlan_enable(struct device *dev,
  300. struct cnss_wlan_enable_cfg *config,
  301. enum cnss_driver_mode mode,
  302. const char *host_version)
  303. {
  304. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  305. int ret = 0;
  306. if (!plat_priv)
  307. return -ENODEV;
  308. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  309. return 0;
  310. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  311. return 0;
  312. if (!config || !host_version) {
  313. cnss_pr_err("Invalid config or host_version pointer\n");
  314. return -EINVAL;
  315. }
  316. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  317. mode, config, host_version);
  318. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  319. goto skip_cfg;
  320. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  321. if (ret)
  322. goto out;
  323. skip_cfg:
  324. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  325. out:
  326. return ret;
  327. }
  328. EXPORT_SYMBOL(cnss_wlan_enable);
  329. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  330. {
  331. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  332. int ret = 0;
  333. if (!plat_priv)
  334. return -ENODEV;
  335. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  336. return 0;
  337. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  338. return 0;
  339. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  340. cnss_bus_free_qdss_mem(plat_priv);
  341. return ret;
  342. }
  343. EXPORT_SYMBOL(cnss_wlan_disable);
  344. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  345. u32 data_len, u8 *output)
  346. {
  347. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  348. int ret = 0;
  349. if (!plat_priv) {
  350. cnss_pr_err("plat_priv is NULL!\n");
  351. return -EINVAL;
  352. }
  353. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  354. return 0;
  355. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  356. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  357. plat_priv->driver_state);
  358. ret = -EINVAL;
  359. goto out;
  360. }
  361. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  362. data_len, output);
  363. out:
  364. return ret;
  365. }
  366. EXPORT_SYMBOL(cnss_athdiag_read);
  367. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  368. u32 data_len, u8 *input)
  369. {
  370. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  371. int ret = 0;
  372. if (!plat_priv) {
  373. cnss_pr_err("plat_priv is NULL!\n");
  374. return -EINVAL;
  375. }
  376. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  377. return 0;
  378. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  379. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  380. plat_priv->driver_state);
  381. ret = -EINVAL;
  382. goto out;
  383. }
  384. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  385. data_len, input);
  386. out:
  387. return ret;
  388. }
  389. EXPORT_SYMBOL(cnss_athdiag_write);
  390. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  391. {
  392. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  393. if (!plat_priv)
  394. return -ENODEV;
  395. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  396. return 0;
  397. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  398. }
  399. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  400. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  401. {
  402. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  403. if (!plat_priv)
  404. return -EINVAL;
  405. if (plat_priv->device_id != QCA6490_DEVICE_ID ||
  406. !plat_priv->fw_pcie_gen_switch)
  407. return -EOPNOTSUPP;
  408. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  409. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  410. return -EINVAL;
  411. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  412. plat_priv->pcie_gen_speed = pcie_gen_speed;
  413. return 0;
  414. }
  415. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  416. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  417. {
  418. int ret = 0;
  419. if (!plat_priv)
  420. return -ENODEV;
  421. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  422. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  423. if (ret)
  424. goto out;
  425. if (plat_priv->hds_enabled)
  426. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  427. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  428. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  429. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  430. plat_priv->ctrl_params.bdf_type);
  431. if (ret)
  432. goto out;
  433. ret = cnss_bus_load_m3(plat_priv);
  434. if (ret)
  435. goto out;
  436. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  437. if (ret)
  438. goto out;
  439. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  440. return 0;
  441. out:
  442. return ret;
  443. }
  444. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  445. {
  446. int ret = 0;
  447. if (!plat_priv->antenna) {
  448. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  449. if (ret)
  450. goto out;
  451. }
  452. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  453. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  454. if (ret)
  455. goto out;
  456. }
  457. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  458. if (ret)
  459. goto out;
  460. return 0;
  461. out:
  462. return ret;
  463. }
  464. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  465. {
  466. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  467. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  468. }
  469. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  470. {
  471. u32 i;
  472. int ret = 0;
  473. struct cnss_plat_ipc_daemon_config *cfg;
  474. ret = cnss_qmi_get_dms_mac(plat_priv);
  475. if (ret == 0 && plat_priv->dms.mac_valid)
  476. goto qmi_send;
  477. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  478. * Thus assert on failure to get MAC from DMS even after retries
  479. */
  480. if (plat_priv->use_nv_mac) {
  481. /* Check if Daemon says platform support DMS MAC provisioning */
  482. cfg = cnss_plat_ipc_qmi_daemon_config();
  483. if (cfg) {
  484. if (!cfg->dms_mac_addr_supported) {
  485. cnss_pr_err("DMS MAC address not supported\n");
  486. CNSS_ASSERT(0);
  487. return -EINVAL;
  488. }
  489. }
  490. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  491. if (plat_priv->dms.mac_valid)
  492. break;
  493. ret = cnss_qmi_get_dms_mac(plat_priv);
  494. if (ret == 0)
  495. break;
  496. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  497. }
  498. if (!plat_priv->dms.mac_valid) {
  499. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  500. CNSS_ASSERT(0);
  501. return -EINVAL;
  502. }
  503. }
  504. qmi_send:
  505. if (plat_priv->dms.mac_valid)
  506. ret =
  507. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  508. ARRAY_SIZE(plat_priv->dms.mac));
  509. return ret;
  510. }
  511. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  512. enum cnss_cal_db_op op, u32 *size)
  513. {
  514. int ret = 0;
  515. u32 timeout = cnss_get_timeout(plat_priv,
  516. CNSS_TIMEOUT_DAEMON_CONNECTION);
  517. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  518. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  519. if (op >= CNSS_CAL_DB_INVALID_OP)
  520. return -EINVAL;
  521. if (!plat_priv->cbc_file_download) {
  522. cnss_pr_info("CAL DB file not required as per BDF\n");
  523. return 0;
  524. }
  525. if (*size == 0) {
  526. cnss_pr_err("Invalid cal file size\n");
  527. return -EINVAL;
  528. }
  529. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  530. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  531. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  532. msecs_to_jiffies(timeout));
  533. if (!ret) {
  534. cnss_pr_err("Daemon not yet connected\n");
  535. CNSS_ASSERT(0);
  536. return ret;
  537. }
  538. }
  539. if (!plat_priv->cal_mem->va) {
  540. cnss_pr_err("CAL DB Memory not setup for FW\n");
  541. return -EINVAL;
  542. }
  543. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  544. if (op == CNSS_CAL_DB_DOWNLOAD) {
  545. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  546. ret = cnss_plat_ipc_qmi_file_download(client_id,
  547. CNSS_CAL_DB_FILE_NAME,
  548. plat_priv->cal_mem->va,
  549. size);
  550. } else {
  551. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  552. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  553. CNSS_CAL_DB_FILE_NAME,
  554. plat_priv->cal_mem->va,
  555. *size);
  556. }
  557. if (ret)
  558. cnss_pr_err("Cal DB file %s %s failure\n",
  559. CNSS_CAL_DB_FILE_NAME,
  560. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  561. else
  562. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  563. CNSS_CAL_DB_FILE_NAME,
  564. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  565. *size);
  566. return ret;
  567. }
  568. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  569. {
  570. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  571. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  572. return -EINVAL;
  573. }
  574. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  575. &plat_priv->cal_file_size);
  576. }
  577. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  578. u32 *cal_file_size)
  579. {
  580. /* To download pass the total size of cal DB mem allocated.
  581. * After cal file is download to mem, its size is updated in
  582. * return pointer
  583. */
  584. *cal_file_size = plat_priv->cal_mem->size;
  585. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  586. cal_file_size);
  587. }
  588. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  589. {
  590. int ret = 0;
  591. u32 cal_file_size = 0;
  592. if (!plat_priv)
  593. return -ENODEV;
  594. cnss_pr_dbg("Processing FW Init Done..\n");
  595. del_timer(&plat_priv->fw_boot_timer);
  596. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  597. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  598. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  599. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  600. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  601. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  602. }
  603. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  604. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  605. CNSS_WALTEST);
  606. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  607. cnss_request_antenna_sharing(plat_priv);
  608. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  609. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  610. plat_priv->cal_time = jiffies;
  611. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  612. CNSS_CALIBRATION);
  613. } else {
  614. ret = cnss_setup_dms_mac(plat_priv);
  615. ret = cnss_bus_call_driver_probe(plat_priv);
  616. }
  617. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  618. goto out;
  619. else if (ret)
  620. goto shutdown;
  621. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  622. return 0;
  623. shutdown:
  624. cnss_bus_dev_shutdown(plat_priv);
  625. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  626. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  627. out:
  628. return ret;
  629. }
  630. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  631. {
  632. switch (type) {
  633. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  634. return "SERVER_ARRIVE";
  635. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  636. return "SERVER_EXIT";
  637. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  638. return "REQUEST_MEM";
  639. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  640. return "FW_MEM_READY";
  641. case CNSS_DRIVER_EVENT_FW_READY:
  642. return "FW_READY";
  643. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  644. return "COLD_BOOT_CAL_START";
  645. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  646. return "COLD_BOOT_CAL_DONE";
  647. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  648. return "REGISTER_DRIVER";
  649. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  650. return "UNREGISTER_DRIVER";
  651. case CNSS_DRIVER_EVENT_RECOVERY:
  652. return "RECOVERY";
  653. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  654. return "FORCE_FW_ASSERT";
  655. case CNSS_DRIVER_EVENT_POWER_UP:
  656. return "POWER_UP";
  657. case CNSS_DRIVER_EVENT_POWER_DOWN:
  658. return "POWER_DOWN";
  659. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  660. return "IDLE_RESTART";
  661. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  662. return "IDLE_SHUTDOWN";
  663. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  664. return "IMS_WFC_CALL_IND";
  665. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  666. return "WLFW_TWC_CFG_IND";
  667. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  668. return "QDSS_TRACE_REQ_MEM";
  669. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  670. return "FW_MEM_FILE_SAVE";
  671. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  672. return "QDSS_TRACE_FREE";
  673. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  674. return "QDSS_TRACE_REQ_DATA";
  675. case CNSS_DRIVER_EVENT_MAX:
  676. return "EVENT_MAX";
  677. }
  678. return "UNKNOWN";
  679. };
  680. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  681. enum cnss_driver_event_type type,
  682. u32 flags, void *data)
  683. {
  684. struct cnss_driver_event *event;
  685. unsigned long irq_flags;
  686. int gfp = GFP_KERNEL;
  687. int ret = 0;
  688. if (!plat_priv)
  689. return -ENODEV;
  690. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  691. cnss_driver_event_to_str(type), type,
  692. flags ? "-sync" : "", plat_priv->driver_state, flags);
  693. if (type >= CNSS_DRIVER_EVENT_MAX) {
  694. cnss_pr_err("Invalid Event type: %d, can't post", type);
  695. return -EINVAL;
  696. }
  697. if (in_interrupt() || irqs_disabled())
  698. gfp = GFP_ATOMIC;
  699. event = kzalloc(sizeof(*event), gfp);
  700. if (!event)
  701. return -ENOMEM;
  702. cnss_pm_stay_awake(plat_priv);
  703. event->type = type;
  704. event->data = data;
  705. init_completion(&event->complete);
  706. event->ret = CNSS_EVENT_PENDING;
  707. event->sync = !!(flags & CNSS_EVENT_SYNC);
  708. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  709. list_add_tail(&event->list, &plat_priv->event_list);
  710. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  711. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  712. if (!(flags & CNSS_EVENT_SYNC))
  713. goto out;
  714. if (flags & CNSS_EVENT_UNKILLABLE)
  715. wait_for_completion(&event->complete);
  716. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  717. ret = wait_for_completion_killable(&event->complete);
  718. else
  719. ret = wait_for_completion_interruptible(&event->complete);
  720. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  721. cnss_driver_event_to_str(type), type,
  722. plat_priv->driver_state, ret, event->ret);
  723. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  724. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  725. event->sync = false;
  726. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  727. ret = -EINTR;
  728. goto out;
  729. }
  730. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  731. ret = event->ret;
  732. kfree(event);
  733. out:
  734. cnss_pm_relax(plat_priv);
  735. return ret;
  736. }
  737. /**
  738. * cnss_get_timeout - Get timeout for corresponding type.
  739. * @plat_priv: Pointer to platform driver context.
  740. * @cnss_timeout_type: Timeout type.
  741. *
  742. * Return: Timeout in milliseconds.
  743. */
  744. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  745. enum cnss_timeout_type timeout_type)
  746. {
  747. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  748. switch (timeout_type) {
  749. case CNSS_TIMEOUT_QMI:
  750. return qmi_timeout;
  751. case CNSS_TIMEOUT_POWER_UP:
  752. return (qmi_timeout << 2);
  753. case CNSS_TIMEOUT_IDLE_RESTART:
  754. /* In idle restart power up sequence, we have fw_boot_timer to
  755. * handle FW initialization failure.
  756. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  757. * account for FW dump collection and FW re-initialization on
  758. * retry.
  759. */
  760. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  761. case CNSS_TIMEOUT_CALIBRATION:
  762. /* Similar to mission mode, in CBC if FW init fails
  763. * fw recovery is tried. Thus return 2x the CBC timeout.
  764. */
  765. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  766. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  767. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  768. case CNSS_TIMEOUT_RDDM:
  769. return CNSS_RDDM_TIMEOUT_MS;
  770. case CNSS_TIMEOUT_RECOVERY:
  771. return RECOVERY_TIMEOUT;
  772. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  773. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  774. default:
  775. return qmi_timeout;
  776. }
  777. }
  778. unsigned int cnss_get_boot_timeout(struct device *dev)
  779. {
  780. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  781. if (!plat_priv) {
  782. cnss_pr_err("plat_priv is NULL\n");
  783. return 0;
  784. }
  785. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  786. }
  787. EXPORT_SYMBOL(cnss_get_boot_timeout);
  788. int cnss_power_up(struct device *dev)
  789. {
  790. int ret = 0;
  791. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  792. unsigned int timeout;
  793. if (!plat_priv) {
  794. cnss_pr_err("plat_priv is NULL\n");
  795. return -ENODEV;
  796. }
  797. cnss_pr_dbg("Powering up device\n");
  798. ret = cnss_driver_event_post(plat_priv,
  799. CNSS_DRIVER_EVENT_POWER_UP,
  800. CNSS_EVENT_SYNC, NULL);
  801. if (ret)
  802. goto out;
  803. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  804. goto out;
  805. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  806. reinit_completion(&plat_priv->power_up_complete);
  807. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  808. msecs_to_jiffies(timeout));
  809. if (!ret) {
  810. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  811. timeout);
  812. ret = -EAGAIN;
  813. goto out;
  814. }
  815. return 0;
  816. out:
  817. return ret;
  818. }
  819. EXPORT_SYMBOL(cnss_power_up);
  820. int cnss_power_down(struct device *dev)
  821. {
  822. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  823. if (!plat_priv) {
  824. cnss_pr_err("plat_priv is NULL\n");
  825. return -ENODEV;
  826. }
  827. cnss_pr_dbg("Powering down device\n");
  828. return cnss_driver_event_post(plat_priv,
  829. CNSS_DRIVER_EVENT_POWER_DOWN,
  830. CNSS_EVENT_SYNC, NULL);
  831. }
  832. EXPORT_SYMBOL(cnss_power_down);
  833. int cnss_idle_restart(struct device *dev)
  834. {
  835. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  836. unsigned int timeout;
  837. int ret = 0;
  838. if (!plat_priv) {
  839. cnss_pr_err("plat_priv is NULL\n");
  840. return -ENODEV;
  841. }
  842. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  843. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  844. return -EBUSY;
  845. }
  846. cnss_pr_dbg("Doing idle restart\n");
  847. reinit_completion(&plat_priv->power_up_complete);
  848. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  849. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  850. ret = -EINVAL;
  851. goto out;
  852. }
  853. ret = cnss_driver_event_post(plat_priv,
  854. CNSS_DRIVER_EVENT_IDLE_RESTART,
  855. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  856. if (ret)
  857. goto out;
  858. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  859. ret = cnss_bus_call_driver_probe(plat_priv);
  860. goto out;
  861. }
  862. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  863. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  864. msecs_to_jiffies(timeout));
  865. if (plat_priv->power_up_error) {
  866. ret = plat_priv->power_up_error;
  867. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  868. cnss_pr_dbg("Power up error:%d, exiting\n",
  869. plat_priv->power_up_error);
  870. goto out;
  871. }
  872. if (!ret) {
  873. /* This exception occurs after attempting retry of FW recovery.
  874. * Thus we can safely power off the device.
  875. */
  876. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  877. timeout);
  878. ret = -ETIMEDOUT;
  879. cnss_power_down(dev);
  880. CNSS_ASSERT(0);
  881. goto out;
  882. }
  883. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  884. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  885. del_timer(&plat_priv->fw_boot_timer);
  886. ret = -EINVAL;
  887. goto out;
  888. }
  889. mutex_unlock(&plat_priv->driver_ops_lock);
  890. return 0;
  891. out:
  892. mutex_unlock(&plat_priv->driver_ops_lock);
  893. return ret;
  894. }
  895. EXPORT_SYMBOL(cnss_idle_restart);
  896. int cnss_idle_shutdown(struct device *dev)
  897. {
  898. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  899. unsigned int timeout;
  900. int ret;
  901. if (!plat_priv) {
  902. cnss_pr_err("plat_priv is NULL\n");
  903. return -ENODEV;
  904. }
  905. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  906. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  907. return -EAGAIN;
  908. }
  909. cnss_pr_dbg("Doing idle shutdown\n");
  910. if (!test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) &&
  911. !test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  912. goto skip_wait;
  913. reinit_completion(&plat_priv->recovery_complete);
  914. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY);
  915. ret = wait_for_completion_timeout(&plat_priv->recovery_complete,
  916. msecs_to_jiffies(timeout));
  917. if (!ret) {
  918. cnss_pr_err("Timeout (%ums) waiting for recovery to complete\n",
  919. timeout);
  920. CNSS_ASSERT(0);
  921. }
  922. skip_wait:
  923. return cnss_driver_event_post(plat_priv,
  924. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  925. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  926. }
  927. EXPORT_SYMBOL(cnss_idle_shutdown);
  928. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  929. {
  930. int ret = 0;
  931. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  932. if (ret) {
  933. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  934. goto out;
  935. }
  936. ret = cnss_get_clk(plat_priv);
  937. if (ret) {
  938. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  939. goto put_vreg;
  940. }
  941. ret = cnss_get_pinctrl(plat_priv);
  942. if (ret) {
  943. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  944. goto put_clk;
  945. }
  946. return 0;
  947. put_clk:
  948. cnss_put_clk(plat_priv);
  949. put_vreg:
  950. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  951. out:
  952. return ret;
  953. }
  954. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  955. {
  956. cnss_put_clk(plat_priv);
  957. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  958. }
  959. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  960. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  961. unsigned long code,
  962. void *ss_handle)
  963. {
  964. struct cnss_plat_data *plat_priv =
  965. container_of(nb, struct cnss_plat_data, modem_nb);
  966. struct cnss_esoc_info *esoc_info;
  967. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  968. if (!plat_priv)
  969. return NOTIFY_DONE;
  970. esoc_info = &plat_priv->esoc_info;
  971. if (code == SUBSYS_AFTER_POWERUP)
  972. esoc_info->modem_current_status = 1;
  973. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  974. esoc_info->modem_current_status = 0;
  975. else
  976. return NOTIFY_DONE;
  977. if (!cnss_bus_call_driver_modem_status(plat_priv,
  978. esoc_info->modem_current_status))
  979. return NOTIFY_DONE;
  980. return NOTIFY_OK;
  981. }
  982. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  983. {
  984. int ret = 0;
  985. struct device *dev;
  986. struct cnss_esoc_info *esoc_info;
  987. struct esoc_desc *esoc_desc;
  988. const char *client_desc;
  989. dev = &plat_priv->plat_dev->dev;
  990. esoc_info = &plat_priv->esoc_info;
  991. esoc_info->notify_modem_status =
  992. of_property_read_bool(dev->of_node,
  993. "qcom,notify-modem-status");
  994. if (!esoc_info->notify_modem_status)
  995. goto out;
  996. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  997. &client_desc);
  998. if (ret) {
  999. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1000. } else {
  1001. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1002. if (IS_ERR_OR_NULL(esoc_desc)) {
  1003. ret = PTR_RET(esoc_desc);
  1004. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1005. ret);
  1006. goto out;
  1007. }
  1008. esoc_info->esoc_desc = esoc_desc;
  1009. }
  1010. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1011. esoc_info->modem_current_status = 0;
  1012. esoc_info->modem_notify_handler =
  1013. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1014. esoc_info->esoc_desc->name :
  1015. "modem", &plat_priv->modem_nb);
  1016. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1017. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1018. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1019. ret);
  1020. goto unreg_esoc;
  1021. }
  1022. return 0;
  1023. unreg_esoc:
  1024. if (esoc_info->esoc_desc)
  1025. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1026. out:
  1027. return ret;
  1028. }
  1029. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1030. {
  1031. struct device *dev;
  1032. struct cnss_esoc_info *esoc_info;
  1033. dev = &plat_priv->plat_dev->dev;
  1034. esoc_info = &plat_priv->esoc_info;
  1035. if (esoc_info->notify_modem_status)
  1036. subsys_notif_unregister_notifier
  1037. (esoc_info->modem_notify_handler,
  1038. &plat_priv->modem_nb);
  1039. if (esoc_info->esoc_desc)
  1040. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1041. }
  1042. #else
  1043. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1044. {
  1045. return 0;
  1046. }
  1047. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1048. #endif
  1049. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1050. {
  1051. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1052. int ret = 0;
  1053. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1054. return 0;
  1055. enable_irq(sol_gpio->dev_sol_irq);
  1056. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1057. if (ret)
  1058. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1059. ret);
  1060. return ret;
  1061. }
  1062. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1063. {
  1064. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1065. int ret = 0;
  1066. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1067. return 0;
  1068. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1069. if (ret)
  1070. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1071. ret);
  1072. disable_irq(sol_gpio->dev_sol_irq);
  1073. return ret;
  1074. }
  1075. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1076. {
  1077. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1078. if (sol_gpio->dev_sol_gpio < 0)
  1079. return -EINVAL;
  1080. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1081. }
  1082. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1083. {
  1084. struct cnss_plat_data *plat_priv = data;
  1085. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1086. sol_gpio->dev_sol_counter++;
  1087. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1088. irq, sol_gpio->dev_sol_counter);
  1089. /* Make sure abort current suspend */
  1090. cnss_pm_stay_awake(plat_priv);
  1091. cnss_pm_relax(plat_priv);
  1092. pm_system_wakeup();
  1093. cnss_bus_handle_dev_sol_irq(plat_priv);
  1094. return IRQ_HANDLED;
  1095. }
  1096. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1097. {
  1098. struct device *dev = &plat_priv->plat_dev->dev;
  1099. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1100. int ret = 0;
  1101. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1102. "wlan-dev-sol-gpio", 0);
  1103. if (sol_gpio->dev_sol_gpio < 0)
  1104. goto out;
  1105. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1106. sol_gpio->dev_sol_gpio);
  1107. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1108. if (ret) {
  1109. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1110. ret);
  1111. goto out;
  1112. }
  1113. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1114. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1115. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1116. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1117. if (ret) {
  1118. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1119. goto free_gpio;
  1120. }
  1121. return 0;
  1122. free_gpio:
  1123. gpio_free(sol_gpio->dev_sol_gpio);
  1124. out:
  1125. return ret;
  1126. }
  1127. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1128. {
  1129. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1130. if (sol_gpio->dev_sol_gpio < 0)
  1131. return;
  1132. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1133. gpio_free(sol_gpio->dev_sol_gpio);
  1134. }
  1135. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1136. {
  1137. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1138. if (sol_gpio->host_sol_gpio < 0)
  1139. return -EINVAL;
  1140. if (value)
  1141. cnss_pr_dbg("Assert host SOL GPIO\n");
  1142. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1143. return 0;
  1144. }
  1145. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1146. {
  1147. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1148. if (sol_gpio->host_sol_gpio < 0)
  1149. return -EINVAL;
  1150. return gpio_get_value(sol_gpio->host_sol_gpio);
  1151. }
  1152. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1153. {
  1154. struct device *dev = &plat_priv->plat_dev->dev;
  1155. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1156. int ret = 0;
  1157. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1158. "wlan-host-sol-gpio", 0);
  1159. if (sol_gpio->host_sol_gpio < 0)
  1160. goto out;
  1161. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1162. sol_gpio->host_sol_gpio);
  1163. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1164. if (ret) {
  1165. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1166. ret);
  1167. goto out;
  1168. }
  1169. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1170. return 0;
  1171. out:
  1172. return ret;
  1173. }
  1174. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1175. {
  1176. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1177. if (sol_gpio->host_sol_gpio < 0)
  1178. return;
  1179. gpio_free(sol_gpio->host_sol_gpio);
  1180. }
  1181. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1182. {
  1183. int ret;
  1184. ret = cnss_init_dev_sol_gpio(plat_priv);
  1185. if (ret)
  1186. goto out;
  1187. ret = cnss_init_host_sol_gpio(plat_priv);
  1188. if (ret)
  1189. goto deinit_dev_sol;
  1190. return 0;
  1191. deinit_dev_sol:
  1192. cnss_deinit_dev_sol_gpio(plat_priv);
  1193. out:
  1194. return ret;
  1195. }
  1196. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1197. {
  1198. cnss_deinit_host_sol_gpio(plat_priv);
  1199. cnss_deinit_dev_sol_gpio(plat_priv);
  1200. }
  1201. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1202. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1203. {
  1204. struct cnss_plat_data *plat_priv;
  1205. int ret = 0;
  1206. if (!subsys_desc->dev) {
  1207. cnss_pr_err("dev from subsys_desc is NULL\n");
  1208. return -ENODEV;
  1209. }
  1210. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1211. if (!plat_priv) {
  1212. cnss_pr_err("plat_priv is NULL\n");
  1213. return -ENODEV;
  1214. }
  1215. if (!plat_priv->driver_state) {
  1216. cnss_pr_dbg("Powerup is ignored\n");
  1217. return 0;
  1218. }
  1219. ret = cnss_bus_dev_powerup(plat_priv);
  1220. if (ret)
  1221. __pm_relax(plat_priv->recovery_ws);
  1222. return ret;
  1223. }
  1224. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1225. bool force_stop)
  1226. {
  1227. struct cnss_plat_data *plat_priv;
  1228. if (!subsys_desc->dev) {
  1229. cnss_pr_err("dev from subsys_desc is NULL\n");
  1230. return -ENODEV;
  1231. }
  1232. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1233. if (!plat_priv) {
  1234. cnss_pr_err("plat_priv is NULL\n");
  1235. return -ENODEV;
  1236. }
  1237. if (!plat_priv->driver_state) {
  1238. cnss_pr_dbg("shutdown is ignored\n");
  1239. return 0;
  1240. }
  1241. return cnss_bus_dev_shutdown(plat_priv);
  1242. }
  1243. void cnss_device_crashed(struct device *dev)
  1244. {
  1245. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1246. struct cnss_subsys_info *subsys_info;
  1247. if (!plat_priv)
  1248. return;
  1249. subsys_info = &plat_priv->subsys_info;
  1250. if (subsys_info->subsys_device) {
  1251. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1252. subsys_set_crash_status(subsys_info->subsys_device, true);
  1253. subsystem_restart_dev(subsys_info->subsys_device);
  1254. }
  1255. }
  1256. EXPORT_SYMBOL(cnss_device_crashed);
  1257. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1258. {
  1259. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1260. if (!plat_priv) {
  1261. cnss_pr_err("plat_priv is NULL\n");
  1262. return;
  1263. }
  1264. cnss_bus_dev_crash_shutdown(plat_priv);
  1265. }
  1266. static int cnss_subsys_ramdump(int enable,
  1267. const struct subsys_desc *subsys_desc)
  1268. {
  1269. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1270. if (!plat_priv) {
  1271. cnss_pr_err("plat_priv is NULL\n");
  1272. return -ENODEV;
  1273. }
  1274. if (!enable)
  1275. return 0;
  1276. return cnss_bus_dev_ramdump(plat_priv);
  1277. }
  1278. static void cnss_recovery_work_handler(struct work_struct *work)
  1279. {
  1280. }
  1281. #else
  1282. static void cnss_recovery_work_handler(struct work_struct *work)
  1283. {
  1284. int ret;
  1285. struct cnss_plat_data *plat_priv =
  1286. container_of(work, struct cnss_plat_data, recovery_work);
  1287. if (!plat_priv->recovery_enabled)
  1288. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1289. cnss_bus_dev_shutdown(plat_priv);
  1290. cnss_bus_dev_ramdump(plat_priv);
  1291. msleep(POWER_RESET_MIN_DELAY_MS);
  1292. ret = cnss_bus_dev_powerup(plat_priv);
  1293. if (ret)
  1294. __pm_relax(plat_priv->recovery_ws);
  1295. return;
  1296. }
  1297. void cnss_device_crashed(struct device *dev)
  1298. {
  1299. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1300. if (!plat_priv)
  1301. return;
  1302. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1303. schedule_work(&plat_priv->recovery_work);
  1304. }
  1305. EXPORT_SYMBOL(cnss_device_crashed);
  1306. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1307. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1308. {
  1309. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1310. struct cnss_ramdump_info *ramdump_info;
  1311. if (!plat_priv)
  1312. return NULL;
  1313. ramdump_info = &plat_priv->ramdump_info;
  1314. *size = ramdump_info->ramdump_size;
  1315. return ramdump_info->ramdump_va;
  1316. }
  1317. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1318. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1319. {
  1320. switch (reason) {
  1321. case CNSS_REASON_DEFAULT:
  1322. return "DEFAULT";
  1323. case CNSS_REASON_LINK_DOWN:
  1324. return "LINK_DOWN";
  1325. case CNSS_REASON_RDDM:
  1326. return "RDDM";
  1327. case CNSS_REASON_TIMEOUT:
  1328. return "TIMEOUT";
  1329. }
  1330. return "UNKNOWN";
  1331. };
  1332. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1333. enum cnss_recovery_reason reason)
  1334. {
  1335. plat_priv->recovery_count++;
  1336. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1337. goto self_recovery;
  1338. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1339. cnss_pr_dbg("Skip device recovery\n");
  1340. return 0;
  1341. }
  1342. /* FW recovery sequence has multiple steps and firmware load requires
  1343. * linux PM in awake state. Thus hold the cnss wake source until
  1344. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1345. * time taken in this process.
  1346. */
  1347. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1348. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1349. true);
  1350. switch (reason) {
  1351. case CNSS_REASON_LINK_DOWN:
  1352. if (!cnss_bus_check_link_status(plat_priv)) {
  1353. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1354. return 0;
  1355. }
  1356. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1357. &plat_priv->ctrl_params.quirks))
  1358. goto self_recovery;
  1359. if (!cnss_bus_recover_link_down(plat_priv)) {
  1360. /* clear recovery bit here to avoid skipping
  1361. * the recovery work for RDDM later
  1362. */
  1363. clear_bit(CNSS_DRIVER_RECOVERY,
  1364. &plat_priv->driver_state);
  1365. return 0;
  1366. }
  1367. break;
  1368. case CNSS_REASON_RDDM:
  1369. cnss_bus_collect_dump_info(plat_priv, false);
  1370. break;
  1371. case CNSS_REASON_DEFAULT:
  1372. case CNSS_REASON_TIMEOUT:
  1373. break;
  1374. default:
  1375. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1376. cnss_recovery_reason_to_str(reason), reason);
  1377. break;
  1378. }
  1379. cnss_bus_device_crashed(plat_priv);
  1380. return 0;
  1381. self_recovery:
  1382. cnss_pr_dbg("Going for self recovery\n");
  1383. cnss_bus_dev_shutdown(plat_priv);
  1384. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1385. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1386. &plat_priv->ctrl_params.quirks);
  1387. cnss_bus_dev_powerup(plat_priv);
  1388. return 0;
  1389. }
  1390. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1391. void *data)
  1392. {
  1393. struct cnss_recovery_data *recovery_data = data;
  1394. int ret = 0;
  1395. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1396. cnss_recovery_reason_to_str(recovery_data->reason),
  1397. recovery_data->reason);
  1398. if (!plat_priv->driver_state) {
  1399. cnss_pr_err("Improper driver state, ignore recovery\n");
  1400. ret = -EINVAL;
  1401. goto out;
  1402. }
  1403. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1404. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1405. ret = -EINVAL;
  1406. goto out;
  1407. }
  1408. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1409. cnss_pr_err("Recovery is already in progress\n");
  1410. CNSS_ASSERT(0);
  1411. ret = -EINVAL;
  1412. goto out;
  1413. }
  1414. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1415. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1416. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1417. ret = -EINVAL;
  1418. goto out;
  1419. }
  1420. switch (plat_priv->device_id) {
  1421. case QCA6174_DEVICE_ID:
  1422. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1423. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1424. &plat_priv->driver_state)) {
  1425. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1426. ret = -EINVAL;
  1427. goto out;
  1428. }
  1429. break;
  1430. default:
  1431. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1432. set_bit(CNSS_FW_BOOT_RECOVERY,
  1433. &plat_priv->driver_state);
  1434. }
  1435. break;
  1436. }
  1437. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1438. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1439. out:
  1440. kfree(data);
  1441. return ret;
  1442. }
  1443. int cnss_self_recovery(struct device *dev,
  1444. enum cnss_recovery_reason reason)
  1445. {
  1446. cnss_schedule_recovery(dev, reason);
  1447. return 0;
  1448. }
  1449. EXPORT_SYMBOL(cnss_self_recovery);
  1450. void cnss_schedule_recovery(struct device *dev,
  1451. enum cnss_recovery_reason reason)
  1452. {
  1453. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1454. struct cnss_recovery_data *data;
  1455. int gfp = GFP_KERNEL;
  1456. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1457. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1458. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1459. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1460. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1461. return;
  1462. }
  1463. if (in_interrupt() || irqs_disabled())
  1464. gfp = GFP_ATOMIC;
  1465. data = kzalloc(sizeof(*data), gfp);
  1466. if (!data)
  1467. return;
  1468. data->reason = reason;
  1469. cnss_driver_event_post(plat_priv,
  1470. CNSS_DRIVER_EVENT_RECOVERY,
  1471. 0, data);
  1472. }
  1473. EXPORT_SYMBOL(cnss_schedule_recovery);
  1474. int cnss_force_fw_assert(struct device *dev)
  1475. {
  1476. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1477. if (!plat_priv) {
  1478. cnss_pr_err("plat_priv is NULL\n");
  1479. return -ENODEV;
  1480. }
  1481. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1482. cnss_pr_info("Forced FW assert is not supported\n");
  1483. return -EOPNOTSUPP;
  1484. }
  1485. if (cnss_bus_is_device_down(plat_priv)) {
  1486. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1487. return 0;
  1488. }
  1489. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1490. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1491. return 0;
  1492. }
  1493. if (in_interrupt() || irqs_disabled())
  1494. cnss_driver_event_post(plat_priv,
  1495. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1496. 0, NULL);
  1497. else
  1498. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1499. return 0;
  1500. }
  1501. EXPORT_SYMBOL(cnss_force_fw_assert);
  1502. int cnss_force_collect_rddm(struct device *dev)
  1503. {
  1504. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1505. unsigned int timeout;
  1506. int ret = 0;
  1507. if (!plat_priv) {
  1508. cnss_pr_err("plat_priv is NULL\n");
  1509. return -ENODEV;
  1510. }
  1511. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1512. cnss_pr_info("Force collect rddm is not supported\n");
  1513. return -EOPNOTSUPP;
  1514. }
  1515. if (cnss_bus_is_device_down(plat_priv)) {
  1516. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1517. goto wait_rddm;
  1518. }
  1519. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1520. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1521. goto wait_rddm;
  1522. }
  1523. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1524. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1525. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1526. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1527. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1528. return 0;
  1529. }
  1530. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1531. if (ret)
  1532. return ret;
  1533. wait_rddm:
  1534. reinit_completion(&plat_priv->rddm_complete);
  1535. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1536. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1537. msecs_to_jiffies(timeout));
  1538. if (!ret) {
  1539. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1540. timeout);
  1541. ret = -ETIMEDOUT;
  1542. } else if (ret > 0) {
  1543. ret = 0;
  1544. }
  1545. return ret;
  1546. }
  1547. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1548. int cnss_qmi_send_get(struct device *dev)
  1549. {
  1550. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1551. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1552. return 0;
  1553. return cnss_bus_qmi_send_get(plat_priv);
  1554. }
  1555. EXPORT_SYMBOL(cnss_qmi_send_get);
  1556. int cnss_qmi_send_put(struct device *dev)
  1557. {
  1558. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1559. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1560. return 0;
  1561. return cnss_bus_qmi_send_put(plat_priv);
  1562. }
  1563. EXPORT_SYMBOL(cnss_qmi_send_put);
  1564. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1565. int cmd_len, void *cb_ctx,
  1566. int (*cb)(void *ctx, void *event, int event_len))
  1567. {
  1568. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1569. int ret;
  1570. if (!plat_priv)
  1571. return -ENODEV;
  1572. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1573. return -EINVAL;
  1574. plat_priv->get_info_cb = cb;
  1575. plat_priv->get_info_cb_ctx = cb_ctx;
  1576. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1577. if (ret) {
  1578. plat_priv->get_info_cb = NULL;
  1579. plat_priv->get_info_cb_ctx = NULL;
  1580. }
  1581. return ret;
  1582. }
  1583. EXPORT_SYMBOL(cnss_qmi_send);
  1584. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1585. {
  1586. int ret = 0;
  1587. u32 retry = 0, timeout;
  1588. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1589. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1590. goto out;
  1591. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1592. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1593. goto out;
  1594. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1595. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1596. goto out;
  1597. }
  1598. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1599. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1600. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1601. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1602. CNSS_ASSERT(0);
  1603. return -EINVAL;
  1604. }
  1605. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1606. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1607. break;
  1608. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1609. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1610. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1611. CNSS_ASSERT(0);
  1612. ret = -EINVAL;
  1613. goto mark_cal_fail;
  1614. }
  1615. }
  1616. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1617. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1618. timeout = cnss_get_timeout(plat_priv,
  1619. CNSS_TIMEOUT_CALIBRATION);
  1620. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1621. timeout / 1000);
  1622. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1623. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1624. msecs_to_jiffies(timeout));
  1625. }
  1626. reinit_completion(&plat_priv->cal_complete);
  1627. ret = cnss_bus_dev_powerup(plat_priv);
  1628. mark_cal_fail:
  1629. if (ret) {
  1630. complete(&plat_priv->cal_complete);
  1631. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1632. /* Set CBC done in driver state to mark attempt and note error
  1633. * since calibration cannot be retried at boot.
  1634. */
  1635. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1636. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1637. }
  1638. out:
  1639. return ret;
  1640. }
  1641. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1642. void *data)
  1643. {
  1644. struct cnss_cal_info *cal_info = data;
  1645. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1646. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1647. goto out;
  1648. switch (cal_info->cal_status) {
  1649. case CNSS_CAL_DONE:
  1650. cnss_pr_dbg("Calibration completed successfully\n");
  1651. plat_priv->cal_done = true;
  1652. break;
  1653. case CNSS_CAL_TIMEOUT:
  1654. case CNSS_CAL_FAILURE:
  1655. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1656. cal_info->cal_status);
  1657. break;
  1658. default:
  1659. cnss_pr_err("Unknown calibration status: %u\n",
  1660. cal_info->cal_status);
  1661. break;
  1662. }
  1663. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1664. cnss_bus_free_qdss_mem(plat_priv);
  1665. cnss_release_antenna_sharing(plat_priv);
  1666. cnss_bus_dev_shutdown(plat_priv);
  1667. msleep(POWER_RESET_MIN_DELAY_MS);
  1668. complete(&plat_priv->cal_complete);
  1669. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1670. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1671. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1672. cnss_cal_mem_upload_to_file(plat_priv);
  1673. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1674. goto out;
  1675. cnss_pr_dbg("Schedule WLAN driver load\n");
  1676. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1677. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1678. 0);
  1679. }
  1680. out:
  1681. kfree(data);
  1682. return 0;
  1683. }
  1684. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1685. {
  1686. int ret;
  1687. ret = cnss_bus_dev_powerup(plat_priv);
  1688. if (ret)
  1689. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1690. return ret;
  1691. }
  1692. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1693. {
  1694. cnss_bus_dev_shutdown(plat_priv);
  1695. return 0;
  1696. }
  1697. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1698. {
  1699. int ret = 0;
  1700. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1701. if (ret < 0)
  1702. return ret;
  1703. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1704. }
  1705. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1706. u32 mem_seg_len, u64 pa, u32 size)
  1707. {
  1708. int i = 0;
  1709. u64 offset = 0;
  1710. void *va = NULL;
  1711. u64 local_pa;
  1712. u32 local_size;
  1713. for (i = 0; i < mem_seg_len; i++) {
  1714. local_pa = (u64)fw_mem[i].pa;
  1715. local_size = (u32)fw_mem[i].size;
  1716. if (pa == local_pa && size <= local_size) {
  1717. va = fw_mem[i].va;
  1718. break;
  1719. }
  1720. if (pa > local_pa &&
  1721. pa < local_pa + local_size &&
  1722. pa + size <= local_pa + local_size) {
  1723. offset = pa - local_pa;
  1724. va = fw_mem[i].va + offset;
  1725. break;
  1726. }
  1727. }
  1728. return va;
  1729. }
  1730. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1731. void *data)
  1732. {
  1733. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1734. struct cnss_fw_mem *fw_mem_seg;
  1735. int ret = 0L;
  1736. void *va = NULL;
  1737. u32 i, fw_mem_seg_len;
  1738. switch (event_data->mem_type) {
  1739. case QMI_WLFW_MEM_TYPE_DDR_V01:
  1740. if (!plat_priv->fw_mem_seg_len)
  1741. goto invalid_mem_save;
  1742. fw_mem_seg = plat_priv->fw_mem;
  1743. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  1744. break;
  1745. case QMI_WLFW_MEM_QDSS_V01:
  1746. if (!plat_priv->qdss_mem_seg_len)
  1747. goto invalid_mem_save;
  1748. fw_mem_seg = plat_priv->qdss_mem;
  1749. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  1750. break;
  1751. default:
  1752. goto invalid_mem_save;
  1753. }
  1754. for (i = 0; i < event_data->mem_seg_len; i++) {
  1755. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  1756. event_data->mem_seg[i].addr,
  1757. event_data->mem_seg[i].size);
  1758. if (!va) {
  1759. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  1760. &event_data->mem_seg[i].addr,
  1761. event_data->mem_type);
  1762. ret = -EINVAL;
  1763. break;
  1764. }
  1765. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  1766. event_data->file_name,
  1767. event_data->mem_seg[i].size);
  1768. if (ret < 0) {
  1769. cnss_pr_err("Fail to save fw mem data: %d\n",
  1770. ret);
  1771. break;
  1772. }
  1773. }
  1774. kfree(data);
  1775. return ret;
  1776. invalid_mem_save:
  1777. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  1778. event_data->mem_type);
  1779. kfree(data);
  1780. return -EINVAL;
  1781. }
  1782. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  1783. {
  1784. cnss_bus_free_qdss_mem(plat_priv);
  1785. return 0;
  1786. }
  1787. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  1788. void *data)
  1789. {
  1790. int ret = 0;
  1791. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1792. if (!plat_priv)
  1793. return -ENODEV;
  1794. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  1795. event_data->total_size);
  1796. kfree(data);
  1797. return ret;
  1798. }
  1799. static void cnss_driver_event_work(struct work_struct *work)
  1800. {
  1801. struct cnss_plat_data *plat_priv =
  1802. container_of(work, struct cnss_plat_data, event_work);
  1803. struct cnss_driver_event *event;
  1804. unsigned long flags;
  1805. int ret = 0;
  1806. if (!plat_priv) {
  1807. cnss_pr_err("plat_priv is NULL!\n");
  1808. return;
  1809. }
  1810. cnss_pm_stay_awake(plat_priv);
  1811. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1812. while (!list_empty(&plat_priv->event_list)) {
  1813. event = list_first_entry(&plat_priv->event_list,
  1814. struct cnss_driver_event, list);
  1815. list_del(&event->list);
  1816. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1817. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  1818. cnss_driver_event_to_str(event->type),
  1819. event->sync ? "-sync" : "", event->type,
  1820. plat_priv->driver_state);
  1821. switch (event->type) {
  1822. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1823. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  1824. break;
  1825. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  1826. ret = cnss_wlfw_server_exit(plat_priv);
  1827. break;
  1828. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  1829. ret = cnss_bus_alloc_fw_mem(plat_priv);
  1830. if (ret)
  1831. break;
  1832. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  1833. break;
  1834. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  1835. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  1836. break;
  1837. case CNSS_DRIVER_EVENT_FW_READY:
  1838. ret = cnss_fw_ready_hdlr(plat_priv);
  1839. break;
  1840. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  1841. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  1842. break;
  1843. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  1844. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  1845. event->data);
  1846. break;
  1847. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1848. ret = cnss_bus_register_driver_hdlr(plat_priv,
  1849. event->data);
  1850. break;
  1851. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1852. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  1853. break;
  1854. case CNSS_DRIVER_EVENT_RECOVERY:
  1855. ret = cnss_driver_recovery_hdlr(plat_priv,
  1856. event->data);
  1857. break;
  1858. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1859. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1860. break;
  1861. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1862. set_bit(CNSS_DRIVER_IDLE_RESTART,
  1863. &plat_priv->driver_state);
  1864. /* fall through */
  1865. case CNSS_DRIVER_EVENT_POWER_UP:
  1866. ret = cnss_power_up_hdlr(plat_priv);
  1867. break;
  1868. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1869. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  1870. &plat_priv->driver_state);
  1871. /* fall through */
  1872. case CNSS_DRIVER_EVENT_POWER_DOWN:
  1873. ret = cnss_power_down_hdlr(plat_priv);
  1874. break;
  1875. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1876. ret = cnss_process_wfc_call_ind_event(plat_priv,
  1877. event->data);
  1878. break;
  1879. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1880. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  1881. event->data);
  1882. break;
  1883. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1884. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  1885. break;
  1886. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1887. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  1888. event->data);
  1889. break;
  1890. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1891. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  1892. break;
  1893. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1894. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  1895. event->data);
  1896. break;
  1897. default:
  1898. cnss_pr_err("Invalid driver event type: %d",
  1899. event->type);
  1900. kfree(event);
  1901. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1902. continue;
  1903. }
  1904. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1905. if (event->sync) {
  1906. event->ret = ret;
  1907. complete(&event->complete);
  1908. continue;
  1909. }
  1910. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1911. kfree(event);
  1912. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1913. }
  1914. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1915. cnss_pm_relax(plat_priv);
  1916. }
  1917. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1918. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  1919. {
  1920. int ret = 0;
  1921. struct cnss_subsys_info *subsys_info;
  1922. subsys_info = &plat_priv->subsys_info;
  1923. subsys_info->subsys_desc.name = "wlan";
  1924. subsys_info->subsys_desc.owner = THIS_MODULE;
  1925. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  1926. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  1927. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  1928. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  1929. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  1930. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  1931. if (IS_ERR(subsys_info->subsys_device)) {
  1932. ret = PTR_ERR(subsys_info->subsys_device);
  1933. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  1934. goto out;
  1935. }
  1936. subsys_info->subsys_handle =
  1937. subsystem_get(subsys_info->subsys_desc.name);
  1938. if (!subsys_info->subsys_handle) {
  1939. cnss_pr_err("Failed to get subsys_handle!\n");
  1940. ret = -EINVAL;
  1941. goto unregister_subsys;
  1942. } else if (IS_ERR(subsys_info->subsys_handle)) {
  1943. ret = PTR_ERR(subsys_info->subsys_handle);
  1944. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  1945. goto unregister_subsys;
  1946. }
  1947. return 0;
  1948. unregister_subsys:
  1949. subsys_unregister(subsys_info->subsys_device);
  1950. out:
  1951. return ret;
  1952. }
  1953. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  1954. {
  1955. struct cnss_subsys_info *subsys_info;
  1956. subsys_info = &plat_priv->subsys_info;
  1957. subsystem_put(subsys_info->subsys_handle);
  1958. subsys_unregister(subsys_info->subsys_device);
  1959. }
  1960. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  1961. {
  1962. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  1963. return create_ramdump_device(subsys_info->subsys_desc.name,
  1964. subsys_info->subsys_desc.dev);
  1965. }
  1966. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  1967. void *ramdump_dev)
  1968. {
  1969. destroy_ramdump_device(ramdump_dev);
  1970. }
  1971. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  1972. {
  1973. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  1974. struct ramdump_segment segment;
  1975. memset(&segment, 0, sizeof(segment));
  1976. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  1977. segment.size = ramdump_info->ramdump_size;
  1978. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  1979. }
  1980. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  1981. {
  1982. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  1983. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  1984. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  1985. struct ramdump_segment *ramdump_segs, *s;
  1986. struct cnss_dump_meta_info meta_info = {0};
  1987. int i, ret = 0;
  1988. ramdump_segs = kcalloc(dump_data->nentries + 1,
  1989. sizeof(*ramdump_segs),
  1990. GFP_KERNEL);
  1991. if (!ramdump_segs)
  1992. return -ENOMEM;
  1993. s = ramdump_segs + 1;
  1994. for (i = 0; i < dump_data->nentries; i++) {
  1995. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  1996. cnss_pr_err("Unsupported dump type: %d",
  1997. dump_seg->type);
  1998. continue;
  1999. }
  2000. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2001. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2002. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2003. }
  2004. meta_info.entry[dump_seg->type].entry_num++;
  2005. s->address = dump_seg->address;
  2006. s->v_address = (void __iomem *)dump_seg->v_address;
  2007. s->size = dump_seg->size;
  2008. s++;
  2009. dump_seg++;
  2010. }
  2011. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2012. meta_info.version = CNSS_RAMDUMP_VERSION;
  2013. meta_info.chipset = plat_priv->device_id;
  2014. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2015. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2016. ramdump_segs->size = sizeof(meta_info);
  2017. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2018. dump_data->nentries + 1);
  2019. kfree(ramdump_segs);
  2020. return ret;
  2021. }
  2022. #else
  2023. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2024. void *data)
  2025. {
  2026. struct cnss_plat_data *plat_priv =
  2027. container_of(nb, struct cnss_plat_data, panic_nb);
  2028. cnss_bus_dev_crash_shutdown(plat_priv);
  2029. return NOTIFY_DONE;
  2030. }
  2031. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2032. {
  2033. int ret;
  2034. if (!plat_priv)
  2035. return -ENODEV;
  2036. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2037. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2038. &plat_priv->panic_nb);
  2039. if (ret) {
  2040. cnss_pr_err("Failed to register panic handler\n");
  2041. return -EINVAL;
  2042. }
  2043. return 0;
  2044. }
  2045. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2046. {
  2047. int ret;
  2048. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2049. &plat_priv->panic_nb);
  2050. if (ret)
  2051. cnss_pr_err("Failed to unregister panic handler\n");
  2052. }
  2053. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2054. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2055. {
  2056. return &plat_priv->plat_dev->dev;
  2057. }
  2058. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2059. void *ramdump_dev)
  2060. {
  2061. }
  2062. #endif
  2063. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2064. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2065. {
  2066. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2067. struct qcom_dump_segment segment;
  2068. struct list_head head;
  2069. INIT_LIST_HEAD(&head);
  2070. memset(&segment, 0, sizeof(segment));
  2071. segment.va = ramdump_info->ramdump_va;
  2072. segment.size = ramdump_info->ramdump_size;
  2073. list_add(&segment.node, &head);
  2074. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2075. }
  2076. #else
  2077. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2078. {
  2079. return 0;
  2080. }
  2081. /* Using completion event inside dynamically allocated ramdump_desc
  2082. * may result a race between freeing the event after setting it to
  2083. * complete inside dev coredump free callback and the thread that is
  2084. * waiting for completion.
  2085. */
  2086. DECLARE_COMPLETION(dump_done);
  2087. #define TIMEOUT_SAVE_DUMP_MS 30000
  2088. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2089. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2090. { \
  2091. if (class == ELFCLASS32) \
  2092. return sizeof(struct elf32_##__xhdr); \
  2093. else \
  2094. return sizeof(struct elf64_##__xhdr); \
  2095. }
  2096. SIZEOF_ELF_STRUCT(phdr)
  2097. SIZEOF_ELF_STRUCT(hdr)
  2098. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2099. do { \
  2100. if (class == ELFCLASS32) \
  2101. ((struct elf32_##__xhdr *)arg)->member = value; \
  2102. else \
  2103. ((struct elf64_##__xhdr *)arg)->member = value; \
  2104. } while (0)
  2105. #define set_ehdr_property(arg, class, member, value) \
  2106. set_xhdr_property(hdr, arg, class, member, value)
  2107. #define set_phdr_property(arg, class, member, value) \
  2108. set_xhdr_property(phdr, arg, class, member, value)
  2109. /* These replace qcom_ramdump driver APIs called from common API
  2110. * cnss_do_elf_dump() by the ones defined here.
  2111. */
  2112. #define qcom_dump_segment cnss_qcom_dump_segment
  2113. #define qcom_elf_dump cnss_qcom_elf_dump
  2114. #define dump_enabled cnss_dump_enabled
  2115. struct cnss_qcom_dump_segment {
  2116. struct list_head node;
  2117. dma_addr_t da;
  2118. void *va;
  2119. size_t size;
  2120. };
  2121. struct cnss_qcom_ramdump_desc {
  2122. void *data;
  2123. struct completion dump_done;
  2124. };
  2125. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2126. void *data, size_t datalen)
  2127. {
  2128. struct cnss_qcom_ramdump_desc *desc = data;
  2129. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2130. datalen);
  2131. }
  2132. static void cnss_qcom_devcd_freev(void *data)
  2133. {
  2134. struct cnss_qcom_ramdump_desc *desc = data;
  2135. cnss_pr_dbg("Free dump data for dev coredump\n");
  2136. complete(&dump_done);
  2137. vfree(desc->data);
  2138. kfree(desc);
  2139. }
  2140. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2141. gfp_t gfp)
  2142. {
  2143. struct cnss_qcom_ramdump_desc *desc;
  2144. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2145. int ret;
  2146. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2147. if (!desc)
  2148. return -ENOMEM;
  2149. desc->data = data;
  2150. reinit_completion(&dump_done);
  2151. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2152. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2153. ret = wait_for_completion_timeout(&dump_done,
  2154. msecs_to_jiffies(timeout));
  2155. if (!ret)
  2156. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2157. timeout);
  2158. return ret ? 0 : -ETIMEDOUT;
  2159. }
  2160. /* Since the elf32 and elf64 identification is identical apart from
  2161. * the class, use elf32 by default.
  2162. */
  2163. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2164. {
  2165. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2166. ehdr->e_ident[EI_CLASS] = class;
  2167. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2168. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2169. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2170. }
  2171. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2172. unsigned char class)
  2173. {
  2174. struct cnss_qcom_dump_segment *segment;
  2175. void *phdr, *ehdr;
  2176. size_t data_size, offset;
  2177. int phnum = 0;
  2178. void *data;
  2179. void __iomem *ptr;
  2180. if (!segs || list_empty(segs))
  2181. return -EINVAL;
  2182. data_size = sizeof_elf_hdr(class);
  2183. list_for_each_entry(segment, segs, node) {
  2184. data_size += sizeof_elf_phdr(class) + segment->size;
  2185. phnum++;
  2186. }
  2187. data = vmalloc(data_size);
  2188. if (!data)
  2189. return -ENOMEM;
  2190. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2191. ehdr = data;
  2192. memset(ehdr, 0, sizeof_elf_hdr(class));
  2193. init_elf_identification(ehdr, class);
  2194. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2195. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2196. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2197. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2198. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2199. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2200. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2201. phdr = data + sizeof_elf_hdr(class);
  2202. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2203. list_for_each_entry(segment, segs, node) {
  2204. memset(phdr, 0, sizeof_elf_phdr(class));
  2205. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2206. set_phdr_property(phdr, class, p_offset, offset);
  2207. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2208. set_phdr_property(phdr, class, p_paddr, segment->da);
  2209. set_phdr_property(phdr, class, p_filesz, segment->size);
  2210. set_phdr_property(phdr, class, p_memsz, segment->size);
  2211. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2212. set_phdr_property(phdr, class, p_align, 0);
  2213. if (segment->va) {
  2214. memcpy(data + offset, segment->va, segment->size);
  2215. } else {
  2216. ptr = devm_ioremap(dev, segment->da, segment->size);
  2217. if (!ptr) {
  2218. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2219. &segment->da, segment->size);
  2220. memset(data + offset, 0xff, segment->size);
  2221. } else {
  2222. memcpy_fromio(data + offset, ptr,
  2223. segment->size);
  2224. }
  2225. }
  2226. offset += segment->size;
  2227. phdr += sizeof_elf_phdr(class);
  2228. }
  2229. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2230. }
  2231. /* Saving dump to file system is always needed in this case. */
  2232. static bool cnss_dump_enabled(void)
  2233. {
  2234. return true;
  2235. }
  2236. #endif /* CONFIG_QCOM_RAMDUMP */
  2237. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2238. {
  2239. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2240. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2241. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2242. struct qcom_dump_segment *seg;
  2243. struct cnss_dump_meta_info meta_info = {0};
  2244. struct list_head head;
  2245. int i, ret = 0;
  2246. if (!dump_enabled()) {
  2247. cnss_pr_info("Dump collection is not enabled\n");
  2248. return ret;
  2249. }
  2250. INIT_LIST_HEAD(&head);
  2251. for (i = 0; i < dump_data->nentries; i++) {
  2252. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2253. cnss_pr_err("Unsupported dump type: %d",
  2254. dump_seg->type);
  2255. continue;
  2256. }
  2257. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2258. if (!seg)
  2259. continue;
  2260. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2261. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2262. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2263. }
  2264. meta_info.entry[dump_seg->type].entry_num++;
  2265. seg->da = dump_seg->address;
  2266. seg->va = dump_seg->v_address;
  2267. seg->size = dump_seg->size;
  2268. list_add_tail(&seg->node, &head);
  2269. dump_seg++;
  2270. }
  2271. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2272. if (!seg)
  2273. goto do_elf_dump;
  2274. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2275. meta_info.version = CNSS_RAMDUMP_VERSION;
  2276. meta_info.chipset = plat_priv->device_id;
  2277. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2278. seg->va = &meta_info;
  2279. seg->size = sizeof(meta_info);
  2280. list_add(&seg->node, &head);
  2281. do_elf_dump:
  2282. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2283. while (!list_empty(&head)) {
  2284. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2285. list_del(&seg->node);
  2286. kfree(seg);
  2287. }
  2288. return ret;
  2289. }
  2290. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2291. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2292. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2293. {
  2294. struct cnss_ramdump_info *ramdump_info;
  2295. struct msm_dump_entry dump_entry;
  2296. ramdump_info = &plat_priv->ramdump_info;
  2297. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2298. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2299. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2300. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2301. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2302. sizeof(ramdump_info->dump_data.name));
  2303. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2304. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2305. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2306. &dump_entry);
  2307. }
  2308. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2309. {
  2310. int ret = 0;
  2311. struct device *dev;
  2312. struct cnss_ramdump_info *ramdump_info;
  2313. u32 ramdump_size = 0;
  2314. dev = &plat_priv->plat_dev->dev;
  2315. ramdump_info = &plat_priv->ramdump_info;
  2316. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2317. &ramdump_size) == 0) {
  2318. ramdump_info->ramdump_va =
  2319. dma_alloc_coherent(dev, ramdump_size,
  2320. &ramdump_info->ramdump_pa,
  2321. GFP_KERNEL);
  2322. if (ramdump_info->ramdump_va)
  2323. ramdump_info->ramdump_size = ramdump_size;
  2324. }
  2325. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2326. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2327. if (ramdump_info->ramdump_size == 0) {
  2328. cnss_pr_info("Ramdump will not be collected");
  2329. goto out;
  2330. }
  2331. ret = cnss_init_dump_entry(plat_priv);
  2332. if (ret) {
  2333. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2334. goto free_ramdump;
  2335. }
  2336. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2337. if (!ramdump_info->ramdump_dev) {
  2338. cnss_pr_err("Failed to create ramdump device!");
  2339. ret = -ENOMEM;
  2340. goto free_ramdump;
  2341. }
  2342. return 0;
  2343. free_ramdump:
  2344. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2345. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2346. out:
  2347. return ret;
  2348. }
  2349. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2350. {
  2351. struct device *dev;
  2352. struct cnss_ramdump_info *ramdump_info;
  2353. dev = &plat_priv->plat_dev->dev;
  2354. ramdump_info = &plat_priv->ramdump_info;
  2355. if (ramdump_info->ramdump_dev)
  2356. cnss_destroy_ramdump_device(plat_priv,
  2357. ramdump_info->ramdump_dev);
  2358. if (ramdump_info->ramdump_va)
  2359. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2360. ramdump_info->ramdump_va,
  2361. ramdump_info->ramdump_pa);
  2362. }
  2363. /**
  2364. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2365. * @ret: Error returned by msm_dump_data_register_nominidump
  2366. *
  2367. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2368. * ignore failure.
  2369. *
  2370. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2371. */
  2372. static int cnss_ignore_dump_data_reg_fail(int ret)
  2373. {
  2374. return ret;
  2375. }
  2376. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2377. {
  2378. int ret = 0;
  2379. struct cnss_ramdump_info_v2 *info_v2;
  2380. struct cnss_dump_data *dump_data;
  2381. struct msm_dump_entry dump_entry;
  2382. struct device *dev = &plat_priv->plat_dev->dev;
  2383. u32 ramdump_size = 0;
  2384. info_v2 = &plat_priv->ramdump_info_v2;
  2385. dump_data = &info_v2->dump_data;
  2386. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2387. &ramdump_size) == 0)
  2388. info_v2->ramdump_size = ramdump_size;
  2389. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2390. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2391. if (!info_v2->dump_data_vaddr)
  2392. return -ENOMEM;
  2393. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2394. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2395. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2396. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2397. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2398. sizeof(dump_data->name));
  2399. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2400. dump_entry.addr = virt_to_phys(dump_data);
  2401. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2402. &dump_entry);
  2403. if (ret) {
  2404. ret = cnss_ignore_dump_data_reg_fail(ret);
  2405. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2406. ret ? "Error" : "Ignoring", ret);
  2407. goto free_ramdump;
  2408. }
  2409. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2410. if (!info_v2->ramdump_dev) {
  2411. cnss_pr_err("Failed to create ramdump device!\n");
  2412. ret = -ENOMEM;
  2413. goto free_ramdump;
  2414. }
  2415. return 0;
  2416. free_ramdump:
  2417. kfree(info_v2->dump_data_vaddr);
  2418. info_v2->dump_data_vaddr = NULL;
  2419. return ret;
  2420. }
  2421. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2422. {
  2423. struct cnss_ramdump_info_v2 *info_v2;
  2424. info_v2 = &plat_priv->ramdump_info_v2;
  2425. if (info_v2->ramdump_dev)
  2426. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2427. kfree(info_v2->dump_data_vaddr);
  2428. info_v2->dump_data_vaddr = NULL;
  2429. info_v2->dump_data_valid = false;
  2430. }
  2431. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2432. {
  2433. int ret = 0;
  2434. switch (plat_priv->device_id) {
  2435. case QCA6174_DEVICE_ID:
  2436. ret = cnss_register_ramdump_v1(plat_priv);
  2437. break;
  2438. case QCA6290_DEVICE_ID:
  2439. case QCA6390_DEVICE_ID:
  2440. case QCA6490_DEVICE_ID:
  2441. case KIWI_DEVICE_ID:
  2442. case MANGO_DEVICE_ID:
  2443. ret = cnss_register_ramdump_v2(plat_priv);
  2444. break;
  2445. default:
  2446. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2447. ret = -ENODEV;
  2448. break;
  2449. }
  2450. return ret;
  2451. }
  2452. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2453. {
  2454. switch (plat_priv->device_id) {
  2455. case QCA6174_DEVICE_ID:
  2456. cnss_unregister_ramdump_v1(plat_priv);
  2457. break;
  2458. case QCA6290_DEVICE_ID:
  2459. case QCA6390_DEVICE_ID:
  2460. case QCA6490_DEVICE_ID:
  2461. case KIWI_DEVICE_ID:
  2462. case MANGO_DEVICE_ID:
  2463. cnss_unregister_ramdump_v2(plat_priv);
  2464. break;
  2465. default:
  2466. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2467. break;
  2468. }
  2469. }
  2470. #else
  2471. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2472. {
  2473. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2474. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2475. struct device *dev = &plat_priv->plat_dev->dev;
  2476. u32 ramdump_size = 0;
  2477. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2478. &ramdump_size) == 0)
  2479. info_v2->ramdump_size = ramdump_size;
  2480. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2481. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2482. if (!info_v2->dump_data_vaddr)
  2483. return -ENOMEM;
  2484. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2485. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2486. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2487. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2488. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2489. sizeof(dump_data->name));
  2490. info_v2->ramdump_dev = dev;
  2491. return 0;
  2492. }
  2493. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2494. {
  2495. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2496. info_v2->ramdump_dev = NULL;
  2497. kfree(info_v2->dump_data_vaddr);
  2498. info_v2->dump_data_vaddr = NULL;
  2499. info_v2->dump_data_valid = false;
  2500. }
  2501. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2502. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2503. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2504. phys_addr_t *pa, unsigned long attrs)
  2505. {
  2506. struct sg_table sgt;
  2507. int ret;
  2508. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2509. if (ret) {
  2510. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2511. va, &dma, size, attrs);
  2512. return -EINVAL;
  2513. }
  2514. *pa = page_to_phys(sg_page(sgt.sgl));
  2515. sg_free_table(&sgt);
  2516. return 0;
  2517. }
  2518. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2519. enum cnss_fw_dump_type type, int seg_no,
  2520. void *va, phys_addr_t pa, size_t size)
  2521. {
  2522. struct md_region md_entry;
  2523. int ret;
  2524. switch (type) {
  2525. case CNSS_FW_IMAGE:
  2526. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2527. seg_no);
  2528. break;
  2529. case CNSS_FW_RDDM:
  2530. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2531. seg_no);
  2532. break;
  2533. case CNSS_FW_REMOTE_HEAP:
  2534. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2535. seg_no);
  2536. break;
  2537. default:
  2538. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2539. return -EINVAL;
  2540. }
  2541. md_entry.phys_addr = pa;
  2542. md_entry.virt_addr = (uintptr_t)va;
  2543. md_entry.size = size;
  2544. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2545. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2546. md_entry.name, va, &pa, size);
  2547. ret = msm_minidump_add_region(&md_entry);
  2548. if (ret < 0)
  2549. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2550. return ret;
  2551. }
  2552. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2553. enum cnss_fw_dump_type type, int seg_no,
  2554. void *va, phys_addr_t pa, size_t size)
  2555. {
  2556. struct md_region md_entry;
  2557. int ret;
  2558. switch (type) {
  2559. case CNSS_FW_IMAGE:
  2560. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2561. seg_no);
  2562. break;
  2563. case CNSS_FW_RDDM:
  2564. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2565. seg_no);
  2566. break;
  2567. case CNSS_FW_REMOTE_HEAP:
  2568. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2569. seg_no);
  2570. break;
  2571. default:
  2572. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2573. return -EINVAL;
  2574. }
  2575. md_entry.phys_addr = pa;
  2576. md_entry.virt_addr = (uintptr_t)va;
  2577. md_entry.size = size;
  2578. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2579. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2580. md_entry.name, va, &pa, size);
  2581. ret = msm_minidump_remove_region(&md_entry);
  2582. if (ret)
  2583. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2584. ret);
  2585. return ret;
  2586. }
  2587. #else
  2588. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2589. phys_addr_t *pa, unsigned long attrs)
  2590. {
  2591. return 0;
  2592. }
  2593. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2594. enum cnss_fw_dump_type type, int seg_no,
  2595. void *va, phys_addr_t pa, size_t size)
  2596. {
  2597. return 0;
  2598. }
  2599. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2600. enum cnss_fw_dump_type type, int seg_no,
  2601. void *va, phys_addr_t pa, size_t size)
  2602. {
  2603. return 0;
  2604. }
  2605. #endif /* CONFIG_QCOM_MINIDUMP */
  2606. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2607. const struct firmware **fw_entry,
  2608. const char *filename)
  2609. {
  2610. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2611. return request_firmware_direct(fw_entry, filename,
  2612. &plat_priv->plat_dev->dev);
  2613. else
  2614. return firmware_request_nowarn(fw_entry, filename,
  2615. &plat_priv->plat_dev->dev);
  2616. }
  2617. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2618. /**
  2619. * cnss_register_bus_scale() - Setup interconnect voting data
  2620. * @plat_priv: Platform data structure
  2621. *
  2622. * For different interconnect path configured in device tree setup voting data
  2623. * for list of bandwidth requirements.
  2624. *
  2625. * Result: 0 for success. -EINVAL if not configured
  2626. */
  2627. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2628. {
  2629. int ret = -EINVAL;
  2630. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  2631. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2632. struct device *dev = &plat_priv->plat_dev->dev;
  2633. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  2634. ret = of_property_read_u32(dev->of_node,
  2635. "qcom,icc-path-count",
  2636. &plat_priv->icc.path_count);
  2637. if (ret) {
  2638. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  2639. return 0;
  2640. }
  2641. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  2642. "qcom,bus-bw-cfg-count",
  2643. &plat_priv->icc.bus_bw_cfg_count);
  2644. if (ret) {
  2645. cnss_pr_err("Failed to get Bus BW Config table size\n");
  2646. goto cleanup;
  2647. }
  2648. cfg_arr_size = plat_priv->icc.path_count *
  2649. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  2650. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  2651. if (!cfg_arr) {
  2652. cnss_pr_err("Failed to alloc cfg table mem\n");
  2653. ret = -ENOMEM;
  2654. goto cleanup;
  2655. }
  2656. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  2657. "qcom,bus-bw-cfg", cfg_arr,
  2658. cfg_arr_size);
  2659. if (ret) {
  2660. cnss_pr_err("Invalid Bus BW Config Table\n");
  2661. goto cleanup;
  2662. }
  2663. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  2664. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  2665. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  2666. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  2667. GFP_KERNEL);
  2668. if (!bus_bw_info) {
  2669. ret = -ENOMEM;
  2670. goto out;
  2671. }
  2672. ret = of_property_read_string_index(dev->of_node,
  2673. "interconnect-names", idx,
  2674. &bus_bw_info->icc_name);
  2675. if (ret)
  2676. goto out;
  2677. bus_bw_info->icc_path =
  2678. of_icc_get(&plat_priv->plat_dev->dev,
  2679. bus_bw_info->icc_name);
  2680. if (IS_ERR(bus_bw_info->icc_path)) {
  2681. ret = PTR_ERR(bus_bw_info->icc_path);
  2682. if (ret != -EPROBE_DEFER) {
  2683. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  2684. bus_bw_info->icc_name, ret);
  2685. goto out;
  2686. }
  2687. }
  2688. bus_bw_info->cfg_table =
  2689. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  2690. sizeof(*bus_bw_info->cfg_table),
  2691. GFP_KERNEL);
  2692. if (!bus_bw_info->cfg_table) {
  2693. ret = -ENOMEM;
  2694. goto out;
  2695. }
  2696. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  2697. bus_bw_info->icc_name);
  2698. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  2699. CNSS_ICC_VOTE_MAX);
  2700. i < plat_priv->icc.bus_bw_cfg_count;
  2701. i++, j += 2) {
  2702. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  2703. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  2704. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  2705. i, bus_bw_info->cfg_table[i].avg_bw,
  2706. bus_bw_info->cfg_table[i].peak_bw);
  2707. }
  2708. list_add_tail(&bus_bw_info->list,
  2709. &plat_priv->icc.list_head);
  2710. }
  2711. kfree(cfg_arr);
  2712. return 0;
  2713. out:
  2714. list_for_each_entry_safe(bus_bw_info, tmp,
  2715. &plat_priv->icc.list_head, list) {
  2716. list_del(&bus_bw_info->list);
  2717. }
  2718. cleanup:
  2719. kfree(cfg_arr);
  2720. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2721. return ret;
  2722. }
  2723. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  2724. {
  2725. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2726. list_for_each_entry_safe(bus_bw_info, tmp,
  2727. &plat_priv->icc.list_head, list) {
  2728. list_del(&bus_bw_info->list);
  2729. if (bus_bw_info->icc_path)
  2730. icc_put(bus_bw_info->icc_path);
  2731. }
  2732. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2733. }
  2734. #else
  2735. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2736. {
  2737. return 0;
  2738. }
  2739. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  2740. #endif /* CONFIG_INTERCONNECT */
  2741. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  2742. {
  2743. struct cnss_plat_data *plat_priv = cb_ctx;
  2744. if (!plat_priv) {
  2745. cnss_pr_err("%s: Invalid context\n", __func__);
  2746. return;
  2747. }
  2748. if (status) {
  2749. cnss_pr_info("CNSS Daemon connected\n");
  2750. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2751. complete(&plat_priv->daemon_connected);
  2752. } else {
  2753. cnss_pr_info("CNSS Daemon disconnected\n");
  2754. reinit_completion(&plat_priv->daemon_connected);
  2755. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2756. }
  2757. }
  2758. static ssize_t enable_hds_store(struct device *dev,
  2759. struct device_attribute *attr,
  2760. const char *buf, size_t count)
  2761. {
  2762. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2763. unsigned int enable_hds = 0;
  2764. if (!plat_priv)
  2765. return -ENODEV;
  2766. if (sscanf(buf, "%du", &enable_hds) != 1) {
  2767. cnss_pr_err("Invalid enable_hds sysfs command\n");
  2768. return -EINVAL;
  2769. }
  2770. if (enable_hds)
  2771. plat_priv->hds_enabled = true;
  2772. else
  2773. plat_priv->hds_enabled = false;
  2774. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  2775. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  2776. return count;
  2777. }
  2778. static ssize_t recovery_show(struct device *dev,
  2779. struct device_attribute *attr,
  2780. char *buf)
  2781. {
  2782. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2783. u32 buf_size = PAGE_SIZE;
  2784. u32 curr_len = 0;
  2785. u32 buf_written = 0;
  2786. if (!plat_priv)
  2787. return -ENODEV;
  2788. buf_written = scnprintf(buf, buf_size,
  2789. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  2790. "BIT0 -- wlan fw recovery\n"
  2791. "BIT1 -- wlan pcss recovery\n"
  2792. "---------------------------------\n");
  2793. curr_len += buf_written;
  2794. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2795. "WLAN recovery %s[%d]\n",
  2796. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  2797. plat_priv->recovery_enabled);
  2798. curr_len += buf_written;
  2799. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2800. "WLAN PCSS recovery %s[%d]\n",
  2801. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  2802. plat_priv->recovery_pcss_enabled);
  2803. curr_len += buf_written;
  2804. /*
  2805. * Now size of curr_len is not over page size for sure,
  2806. * later if new item or none-fixed size item added, need
  2807. * add check to make sure curr_len is not over page size.
  2808. */
  2809. return curr_len;
  2810. }
  2811. static ssize_t recovery_store(struct device *dev,
  2812. struct device_attribute *attr,
  2813. const char *buf, size_t count)
  2814. {
  2815. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2816. unsigned int recovery = 0;
  2817. int ret;
  2818. if (!plat_priv)
  2819. return -ENODEV;
  2820. if (sscanf(buf, "%du", &recovery) != 1) {
  2821. cnss_pr_err("Invalid recovery sysfs command\n");
  2822. return -EINVAL;
  2823. }
  2824. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  2825. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  2826. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  2827. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  2828. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  2829. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  2830. ret = cnss_send_subsys_restart_level_msg(plat_priv);
  2831. if (ret < 0) {
  2832. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  2833. plat_priv->recovery_pcss_enabled = false;
  2834. return -EINVAL;
  2835. }
  2836. return count;
  2837. }
  2838. static ssize_t shutdown_store(struct device *dev,
  2839. struct device_attribute *attr,
  2840. const char *buf, size_t count)
  2841. {
  2842. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2843. if (plat_priv) {
  2844. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  2845. del_timer(&plat_priv->fw_boot_timer);
  2846. complete_all(&plat_priv->power_up_complete);
  2847. complete_all(&plat_priv->cal_complete);
  2848. }
  2849. cnss_pr_dbg("Received shutdown notification\n");
  2850. return count;
  2851. }
  2852. static ssize_t fs_ready_store(struct device *dev,
  2853. struct device_attribute *attr,
  2854. const char *buf, size_t count)
  2855. {
  2856. int fs_ready = 0;
  2857. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2858. if (sscanf(buf, "%du", &fs_ready) != 1)
  2859. return -EINVAL;
  2860. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  2861. fs_ready, count);
  2862. if (!plat_priv) {
  2863. cnss_pr_err("plat_priv is NULL\n");
  2864. return count;
  2865. }
  2866. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  2867. cnss_pr_dbg("QMI is bypassed\n");
  2868. return count;
  2869. }
  2870. switch (plat_priv->device_id) {
  2871. case QCA6290_DEVICE_ID:
  2872. case QCA6390_DEVICE_ID:
  2873. case QCA6490_DEVICE_ID:
  2874. case KIWI_DEVICE_ID:
  2875. case MANGO_DEVICE_ID:
  2876. break;
  2877. default:
  2878. cnss_pr_err("Not supported for device ID 0x%lx\n",
  2879. plat_priv->device_id);
  2880. return count;
  2881. }
  2882. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  2883. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  2884. cnss_driver_event_post(plat_priv,
  2885. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  2886. 0, NULL);
  2887. }
  2888. return count;
  2889. }
  2890. static ssize_t qdss_trace_start_store(struct device *dev,
  2891. struct device_attribute *attr,
  2892. const char *buf, size_t count)
  2893. {
  2894. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2895. wlfw_qdss_trace_start(plat_priv);
  2896. cnss_pr_dbg("Received QDSS start command\n");
  2897. return count;
  2898. }
  2899. static ssize_t qdss_trace_stop_store(struct device *dev,
  2900. struct device_attribute *attr,
  2901. const char *buf, size_t count)
  2902. {
  2903. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2904. u32 option = 0;
  2905. if (sscanf(buf, "%du", &option) != 1)
  2906. return -EINVAL;
  2907. wlfw_qdss_trace_stop(plat_priv, option);
  2908. cnss_pr_dbg("Received QDSS stop command\n");
  2909. return count;
  2910. }
  2911. static ssize_t qdss_conf_download_store(struct device *dev,
  2912. struct device_attribute *attr,
  2913. const char *buf, size_t count)
  2914. {
  2915. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2916. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  2917. cnss_pr_dbg("Received QDSS download config command\n");
  2918. return count;
  2919. }
  2920. static ssize_t hw_trace_override_store(struct device *dev,
  2921. struct device_attribute *attr,
  2922. const char *buf, size_t count)
  2923. {
  2924. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2925. int tmp = 0;
  2926. if (sscanf(buf, "%du", &tmp) != 1)
  2927. return -EINVAL;
  2928. plat_priv->hw_trc_override = tmp;
  2929. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2930. return count;
  2931. }
  2932. static ssize_t charger_mode_store(struct device *dev,
  2933. struct device_attribute *attr,
  2934. const char *buf, size_t count)
  2935. {
  2936. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2937. int tmp = 0;
  2938. if (sscanf(buf, "%du", &tmp) != 1)
  2939. return -EINVAL;
  2940. plat_priv->charger_mode = tmp;
  2941. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  2942. return count;
  2943. }
  2944. static DEVICE_ATTR_WO(fs_ready);
  2945. static DEVICE_ATTR_WO(shutdown);
  2946. static DEVICE_ATTR_RW(recovery);
  2947. static DEVICE_ATTR_WO(enable_hds);
  2948. static DEVICE_ATTR_WO(qdss_trace_start);
  2949. static DEVICE_ATTR_WO(qdss_trace_stop);
  2950. static DEVICE_ATTR_WO(qdss_conf_download);
  2951. static DEVICE_ATTR_WO(hw_trace_override);
  2952. static DEVICE_ATTR_WO(charger_mode);
  2953. static struct attribute *cnss_attrs[] = {
  2954. &dev_attr_fs_ready.attr,
  2955. &dev_attr_shutdown.attr,
  2956. &dev_attr_recovery.attr,
  2957. &dev_attr_enable_hds.attr,
  2958. &dev_attr_qdss_trace_start.attr,
  2959. &dev_attr_qdss_trace_stop.attr,
  2960. &dev_attr_qdss_conf_download.attr,
  2961. &dev_attr_hw_trace_override.attr,
  2962. &dev_attr_charger_mode.attr,
  2963. NULL,
  2964. };
  2965. static struct attribute_group cnss_attr_group = {
  2966. .attrs = cnss_attrs,
  2967. };
  2968. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  2969. {
  2970. struct device *dev = &plat_priv->plat_dev->dev;
  2971. int ret;
  2972. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "cnss");
  2973. if (ret) {
  2974. cnss_pr_err("Failed to create cnss link, err = %d\n",
  2975. ret);
  2976. goto out;
  2977. }
  2978. /* This is only for backward compatibility. */
  2979. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "shutdown_wlan");
  2980. if (ret) {
  2981. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  2982. ret);
  2983. goto rm_cnss_link;
  2984. }
  2985. return 0;
  2986. rm_cnss_link:
  2987. sysfs_remove_link(kernel_kobj, "cnss");
  2988. out:
  2989. return ret;
  2990. }
  2991. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  2992. {
  2993. sysfs_remove_link(kernel_kobj, "shutdown_wlan");
  2994. sysfs_remove_link(kernel_kobj, "cnss");
  2995. }
  2996. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  2997. {
  2998. int ret = 0;
  2999. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3000. &cnss_attr_group);
  3001. if (ret) {
  3002. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3003. ret);
  3004. goto out;
  3005. }
  3006. cnss_create_sysfs_link(plat_priv);
  3007. return 0;
  3008. out:
  3009. return ret;
  3010. }
  3011. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3012. {
  3013. cnss_remove_sysfs_link(plat_priv);
  3014. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3015. }
  3016. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3017. {
  3018. spin_lock_init(&plat_priv->event_lock);
  3019. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3020. WQ_UNBOUND, 1);
  3021. if (!plat_priv->event_wq) {
  3022. cnss_pr_err("Failed to create event workqueue!\n");
  3023. return -EFAULT;
  3024. }
  3025. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3026. INIT_LIST_HEAD(&plat_priv->event_list);
  3027. return 0;
  3028. }
  3029. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3030. {
  3031. destroy_workqueue(plat_priv->event_wq);
  3032. }
  3033. static int cnss_reboot_notifier(struct notifier_block *nb,
  3034. unsigned long action,
  3035. void *data)
  3036. {
  3037. struct cnss_plat_data *plat_priv =
  3038. container_of(nb, struct cnss_plat_data, reboot_nb);
  3039. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3040. del_timer(&plat_priv->fw_boot_timer);
  3041. complete_all(&plat_priv->power_up_complete);
  3042. complete_all(&plat_priv->cal_complete);
  3043. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3044. return NOTIFY_DONE;
  3045. }
  3046. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3047. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3048. {
  3049. struct Object client_env;
  3050. struct Object app_object;
  3051. u32 wifi_uid = HW_WIFI_UID;
  3052. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3053. int ret;
  3054. u8 state = 0;
  3055. /* get rootObj */
  3056. ret = get_client_env_object(&client_env);
  3057. if (ret) {
  3058. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3059. goto end;
  3060. }
  3061. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3062. if (ret) {
  3063. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3064. if (ret == FEATURE_NOT_SUPPORTED) {
  3065. ret = 0; /* Do not Assert */
  3066. cnss_pr_dbg("Secure HW feature not supported\n");
  3067. }
  3068. goto exit_release_clientenv;
  3069. }
  3070. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3071. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3072. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3073. ObjectCounts_pack(1, 1, 0, 0));
  3074. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3075. if (ret) {
  3076. if (ret == PERIPHERAL_NOT_FOUND) {
  3077. ret = 0; /* Do not Assert */
  3078. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3079. }
  3080. goto exit_release_app_obj;
  3081. }
  3082. if (state == 1)
  3083. set_bit(CNSS_WLAN_HW_DISABLED,
  3084. &plat_priv->driver_state);
  3085. else
  3086. clear_bit(CNSS_WLAN_HW_DISABLED,
  3087. &plat_priv->driver_state);
  3088. exit_release_app_obj:
  3089. Object_release(app_object);
  3090. exit_release_clientenv:
  3091. Object_release(client_env);
  3092. end:
  3093. if (ret) {
  3094. cnss_pr_err("Unable to get HW disable status\n");
  3095. CNSS_ASSERT(0);
  3096. }
  3097. return ret;
  3098. }
  3099. #else
  3100. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3101. {
  3102. return 0;
  3103. }
  3104. #endif
  3105. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3106. {
  3107. int ret;
  3108. ret = cnss_init_sol_gpio(plat_priv);
  3109. if (ret)
  3110. return ret;
  3111. timer_setup(&plat_priv->fw_boot_timer,
  3112. cnss_bus_fw_boot_timeout_hdlr, 0);
  3113. ret = register_pm_notifier(&cnss_pm_notifier);
  3114. if (ret)
  3115. cnss_pr_err("Failed to register PM notifier, err = %d\n", ret);
  3116. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3117. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3118. if (ret)
  3119. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3120. ret);
  3121. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3122. if (ret)
  3123. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3124. ret);
  3125. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3126. init_completion(&plat_priv->power_up_complete);
  3127. init_completion(&plat_priv->cal_complete);
  3128. init_completion(&plat_priv->rddm_complete);
  3129. init_completion(&plat_priv->recovery_complete);
  3130. init_completion(&plat_priv->daemon_connected);
  3131. mutex_init(&plat_priv->dev_lock);
  3132. mutex_init(&plat_priv->driver_ops_lock);
  3133. plat_priv->recovery_ws =
  3134. wakeup_source_register(&plat_priv->plat_dev->dev,
  3135. "CNSS_FW_RECOVERY");
  3136. if (!plat_priv->recovery_ws)
  3137. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3138. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3139. cnss_daemon_connection_update_cb,
  3140. plat_priv);
  3141. if (ret)
  3142. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3143. ret);
  3144. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3145. return 0;
  3146. }
  3147. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3148. {
  3149. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3150. plat_priv);
  3151. complete_all(&plat_priv->recovery_complete);
  3152. complete_all(&plat_priv->rddm_complete);
  3153. complete_all(&plat_priv->cal_complete);
  3154. complete_all(&plat_priv->power_up_complete);
  3155. complete_all(&plat_priv->daemon_connected);
  3156. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3157. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3158. unregister_pm_notifier(&cnss_pm_notifier);
  3159. del_timer(&plat_priv->fw_boot_timer);
  3160. wakeup_source_unregister(plat_priv->recovery_ws);
  3161. cnss_deinit_sol_gpio(plat_priv);
  3162. kfree(plat_priv->sram_dump);
  3163. }
  3164. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3165. {
  3166. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3167. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3168. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3169. "qcom,wlan-cbc-enabled");
  3170. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3171. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3172. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3173. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3174. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3175. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3176. * enabled by default
  3177. */
  3178. plat_priv->adsp_pc_enabled = true;
  3179. }
  3180. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3181. {
  3182. struct device *dev = &plat_priv->plat_dev->dev;
  3183. plat_priv->use_pm_domain =
  3184. of_property_read_bool(dev->of_node, "use-pm-domain");
  3185. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3186. }
  3187. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3188. {
  3189. struct device *dev = &plat_priv->plat_dev->dev;
  3190. plat_priv->set_wlaon_pwr_ctrl =
  3191. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3192. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3193. plat_priv->set_wlaon_pwr_ctrl);
  3194. }
  3195. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3196. {
  3197. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3198. "qcom,converged-dt") ||
  3199. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3200. "qcom,same-dt-multi-dev") ||
  3201. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3202. "qcom,multi-wlan-exchg"));
  3203. }
  3204. static const struct platform_device_id cnss_platform_id_table[] = {
  3205. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3206. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3207. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3208. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3209. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3210. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3211. { .name = "qcaconv", .driver_data = 0, },
  3212. { },
  3213. };
  3214. static const struct of_device_id cnss_of_match_table[] = {
  3215. {
  3216. .compatible = "qcom,cnss",
  3217. .data = (void *)&cnss_platform_id_table[0]},
  3218. {
  3219. .compatible = "qcom,cnss-qca6290",
  3220. .data = (void *)&cnss_platform_id_table[1]},
  3221. {
  3222. .compatible = "qcom,cnss-qca6390",
  3223. .data = (void *)&cnss_platform_id_table[2]},
  3224. {
  3225. .compatible = "qcom,cnss-qca6490",
  3226. .data = (void *)&cnss_platform_id_table[3]},
  3227. {
  3228. .compatible = "qcom,cnss-kiwi",
  3229. .data = (void *)&cnss_platform_id_table[4]},
  3230. {
  3231. .compatible = "qcom,cnss-mango",
  3232. .data = (void *)&cnss_platform_id_table[5]},
  3233. {
  3234. .compatible = "qcom,cnss-qca-converged",
  3235. .data = (void *)&cnss_platform_id_table[6]},
  3236. { },
  3237. };
  3238. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3239. static inline bool
  3240. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3241. {
  3242. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3243. "use-nv-mac");
  3244. }
  3245. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3246. {
  3247. struct device_node *child;
  3248. u32 id, i;
  3249. int id_n, device_identifier_gpio, ret;
  3250. u8 gpio_value;
  3251. if (!plat_priv->is_converged_dt)
  3252. return 0;
  3253. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3254. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3255. if (ret) {
  3256. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3257. return ret;
  3258. }
  3259. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3260. gpio_value = gpio_get_value(device_identifier_gpio);
  3261. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3262. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3263. child) {
  3264. if (strcmp(child->name, "chip_cfg"))
  3265. continue;
  3266. id_n = of_property_count_u32_elems(child, "supported-ids");
  3267. if (id_n <= 0) {
  3268. cnss_pr_err("Device id is NOT set\n");
  3269. return -EINVAL;
  3270. }
  3271. for (i = 0; i < id_n; i++) {
  3272. ret = of_property_read_u32_index(child,
  3273. "supported-ids",
  3274. i, &id);
  3275. if (ret) {
  3276. cnss_pr_err("Failed to read supported ids\n");
  3277. return -EINVAL;
  3278. }
  3279. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3280. plat_priv->plat_dev->dev.of_node = child;
  3281. plat_priv->device_id = QCA6490_DEVICE_ID;
  3282. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3283. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3284. child->name, i, id);
  3285. return 0;
  3286. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3287. plat_priv->plat_dev->dev.of_node = child;
  3288. plat_priv->device_id = KIWI_DEVICE_ID;
  3289. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3290. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3291. child->name, i, id);
  3292. return 0;
  3293. }
  3294. }
  3295. }
  3296. return -EINVAL;
  3297. }
  3298. static inline bool
  3299. cnss_is_converged_dt(struct cnss_plat_data *plat_priv)
  3300. {
  3301. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3302. "qcom,converged-dt");
  3303. }
  3304. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3305. {
  3306. int ret = 0;
  3307. int retry = 0;
  3308. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3309. return 0;
  3310. retry:
  3311. ret = cnss_power_on_device(plat_priv);
  3312. if (ret)
  3313. goto end;
  3314. ret = cnss_bus_init(plat_priv);
  3315. if (ret) {
  3316. if ((ret != -EPROBE_DEFER) &&
  3317. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3318. cnss_power_off_device(plat_priv);
  3319. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3320. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3321. goto retry;
  3322. }
  3323. goto power_off;
  3324. }
  3325. power_off:
  3326. cnss_power_off_device(plat_priv);
  3327. end:
  3328. return ret;
  3329. }
  3330. int cnss_wlan_hw_enable(void)
  3331. {
  3332. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3333. int ret = 0;
  3334. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  3335. return 0;
  3336. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3337. ret = cnss_wlan_device_init(plat_priv);
  3338. if (ret) {
  3339. CNSS_ASSERT(0);
  3340. return ret;
  3341. }
  3342. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  3343. cnss_driver_event_post(plat_priv,
  3344. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3345. 0, NULL);
  3346. if (plat_priv->driver_ops)
  3347. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  3348. return ret;
  3349. }
  3350. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  3351. static int cnss_probe(struct platform_device *plat_dev)
  3352. {
  3353. int ret = 0;
  3354. struct cnss_plat_data *plat_priv;
  3355. const struct of_device_id *of_id;
  3356. const struct platform_device_id *device_id;
  3357. if (cnss_get_plat_priv(plat_dev)) {
  3358. cnss_pr_err("Driver is already initialized!\n");
  3359. ret = -EEXIST;
  3360. goto out;
  3361. }
  3362. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  3363. if (!of_id || !of_id->data) {
  3364. cnss_pr_err("Failed to find of match device!\n");
  3365. ret = -ENODEV;
  3366. goto out;
  3367. }
  3368. device_id = of_id->data;
  3369. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  3370. GFP_KERNEL);
  3371. if (!plat_priv) {
  3372. ret = -ENOMEM;
  3373. goto out;
  3374. }
  3375. plat_priv->plat_dev = plat_dev;
  3376. plat_priv->device_id = device_id->driver_data;
  3377. plat_priv->is_converged_dt = cnss_is_converged_dt(plat_priv);
  3378. plat_priv->use_fw_path_with_prefix =
  3379. cnss_use_fw_path_with_prefix(plat_priv);
  3380. ret = cnss_get_dev_cfg_node(plat_priv);
  3381. if (ret) {
  3382. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  3383. goto reset_plat_dev;
  3384. }
  3385. plat_priv->bus_type = cnss_get_bus_type(plat_priv->device_id);
  3386. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  3387. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  3388. cnss_set_plat_priv(plat_dev, plat_priv);
  3389. platform_set_drvdata(plat_dev, plat_priv);
  3390. INIT_LIST_HEAD(&plat_priv->vreg_list);
  3391. INIT_LIST_HEAD(&plat_priv->clk_list);
  3392. cnss_get_pm_domain_info(plat_priv);
  3393. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  3394. cnss_power_misc_params_init(plat_priv);
  3395. cnss_get_tcs_info(plat_priv);
  3396. cnss_get_cpr_info(plat_priv);
  3397. cnss_aop_mbox_init(plat_priv);
  3398. cnss_init_control_params(plat_priv);
  3399. ret = cnss_get_resources(plat_priv);
  3400. if (ret)
  3401. goto reset_ctx;
  3402. ret = cnss_register_esoc(plat_priv);
  3403. if (ret)
  3404. goto free_res;
  3405. ret = cnss_register_bus_scale(plat_priv);
  3406. if (ret)
  3407. goto unreg_esoc;
  3408. ret = cnss_create_sysfs(plat_priv);
  3409. if (ret)
  3410. goto unreg_bus_scale;
  3411. ret = cnss_event_work_init(plat_priv);
  3412. if (ret)
  3413. goto remove_sysfs;
  3414. ret = cnss_qmi_init(plat_priv);
  3415. if (ret)
  3416. goto deinit_event_work;
  3417. ret = cnss_dms_init(plat_priv);
  3418. if (ret)
  3419. goto deinit_qmi;
  3420. ret = cnss_debugfs_create(plat_priv);
  3421. if (ret)
  3422. goto deinit_dms;
  3423. ret = cnss_misc_init(plat_priv);
  3424. if (ret)
  3425. goto destroy_debugfs;
  3426. ret = cnss_wlan_hw_disable_check(plat_priv);
  3427. if (ret)
  3428. goto deinit_misc;
  3429. /* Make sure all platform related init are done before
  3430. * device power on and bus init.
  3431. */
  3432. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  3433. ret = cnss_wlan_device_init(plat_priv);
  3434. if (ret)
  3435. goto deinit_misc;
  3436. } else {
  3437. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  3438. }
  3439. cnss_register_coex_service(plat_priv);
  3440. cnss_register_ims_service(plat_priv);
  3441. ret = cnss_genl_init();
  3442. if (ret < 0)
  3443. cnss_pr_err("CNSS genl init failed %d\n", ret);
  3444. cnss_pr_info("Platform driver probed successfully.\n");
  3445. return 0;
  3446. deinit_misc:
  3447. cnss_misc_deinit(plat_priv);
  3448. destroy_debugfs:
  3449. cnss_debugfs_destroy(plat_priv);
  3450. deinit_dms:
  3451. cnss_dms_deinit(plat_priv);
  3452. deinit_qmi:
  3453. cnss_qmi_deinit(plat_priv);
  3454. deinit_event_work:
  3455. cnss_event_work_deinit(plat_priv);
  3456. remove_sysfs:
  3457. cnss_remove_sysfs(plat_priv);
  3458. unreg_bus_scale:
  3459. cnss_unregister_bus_scale(plat_priv);
  3460. unreg_esoc:
  3461. cnss_unregister_esoc(plat_priv);
  3462. free_res:
  3463. cnss_put_resources(plat_priv);
  3464. reset_ctx:
  3465. platform_set_drvdata(plat_dev, NULL);
  3466. reset_plat_dev:
  3467. cnss_set_plat_priv(plat_dev, NULL);
  3468. out:
  3469. return ret;
  3470. }
  3471. static int cnss_remove(struct platform_device *plat_dev)
  3472. {
  3473. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  3474. cnss_genl_exit();
  3475. cnss_unregister_ims_service(plat_priv);
  3476. cnss_unregister_coex_service(plat_priv);
  3477. cnss_bus_deinit(plat_priv);
  3478. cnss_misc_deinit(plat_priv);
  3479. cnss_debugfs_destroy(plat_priv);
  3480. cnss_dms_deinit(plat_priv);
  3481. cnss_qmi_deinit(plat_priv);
  3482. cnss_event_work_deinit(plat_priv);
  3483. cnss_remove_sysfs(plat_priv);
  3484. cnss_unregister_bus_scale(plat_priv);
  3485. cnss_unregister_esoc(plat_priv);
  3486. cnss_put_resources(plat_priv);
  3487. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  3488. mbox_free_channel(plat_priv->mbox_chan);
  3489. platform_set_drvdata(plat_dev, NULL);
  3490. plat_env = NULL;
  3491. return 0;
  3492. }
  3493. static struct platform_driver cnss_platform_driver = {
  3494. .probe = cnss_probe,
  3495. .remove = cnss_remove,
  3496. .driver = {
  3497. .name = "cnss2",
  3498. .of_match_table = cnss_of_match_table,
  3499. #ifdef CONFIG_CNSS_ASYNC
  3500. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3501. #endif
  3502. },
  3503. };
  3504. static bool cnss_check_compatible_node(void)
  3505. {
  3506. struct device_node *dn = NULL;
  3507. for_each_matching_node(dn, cnss_of_match_table) {
  3508. if (of_device_is_available(dn)) {
  3509. cnss_allow_driver_loading = true;
  3510. return true;
  3511. }
  3512. }
  3513. return false;
  3514. }
  3515. /**
  3516. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  3517. *
  3518. * Valid device tree node means a node with "compatible" property from the
  3519. * device match table and "status" property is not disabled.
  3520. *
  3521. * Return: true if valid device tree node found, false if not found
  3522. */
  3523. static bool cnss_is_valid_dt_node_found(void)
  3524. {
  3525. struct device_node *dn = NULL;
  3526. for_each_matching_node(dn, cnss_of_match_table) {
  3527. if (of_device_is_available(dn))
  3528. break;
  3529. }
  3530. if (dn)
  3531. return true;
  3532. return false;
  3533. }
  3534. static int __init cnss_initialize(void)
  3535. {
  3536. int ret = 0;
  3537. if (!cnss_is_valid_dt_node_found())
  3538. return -ENODEV;
  3539. if (!cnss_check_compatible_node())
  3540. return ret;
  3541. cnss_debug_init();
  3542. ret = platform_driver_register(&cnss_platform_driver);
  3543. if (ret)
  3544. cnss_debug_deinit();
  3545. return ret;
  3546. }
  3547. static void __exit cnss_exit(void)
  3548. {
  3549. platform_driver_unregister(&cnss_platform_driver);
  3550. cnss_debug_deinit();
  3551. }
  3552. module_init(cnss_initialize);
  3553. module_exit(cnss_exit);
  3554. MODULE_LICENSE("GPL v2");
  3555. MODULE_DESCRIPTION("CNSS2 Platform Driver");