cam_icp_subdev.c 8.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/io.h>
  8. #include <linux/of.h>
  9. #include <linux/module.h>
  10. #include <linux/kernel.h>
  11. #include <linux/iommu.h>
  12. #include <linux/timer.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/videodev2.h>
  15. #include <media/v4l2-fh.h>
  16. #include <media/v4l2-device.h>
  17. #include <media/v4l2-event.h>
  18. #include <media/v4l2-ioctl.h>
  19. #include <media/v4l2-subdev.h>
  20. #include <media/cam_req_mgr.h>
  21. #include <media/cam_defs.h>
  22. #include <media/cam_icp.h>
  23. #include "cam_req_mgr_dev.h"
  24. #include "cam_subdev.h"
  25. #include "cam_node.h"
  26. #include "cam_context.h"
  27. #include "cam_icp_context.h"
  28. #include "cam_hw_mgr_intf.h"
  29. #include "cam_icp_hw_mgr_intf.h"
  30. #include "cam_debug_util.h"
  31. #include "cam_smmu_api.h"
  32. #include "camera_main.h"
  33. #include "cam_common_util.h"
  34. #include "cam_context_utils.h"
  35. #define CAM_ICP_DEV_NAME "cam-icp"
  36. struct cam_icp_subdev {
  37. struct cam_subdev sd;
  38. struct cam_node *node;
  39. struct cam_context ctx[CAM_ICP_CTX_MAX];
  40. struct cam_icp_context ctx_icp[CAM_ICP_CTX_MAX];
  41. struct mutex icp_lock;
  42. int32_t open_cnt;
  43. int32_t reserved;
  44. };
  45. static struct cam_icp_subdev g_icp_dev;
  46. static const struct of_device_id cam_icp_dt_match[] = {
  47. {.compatible = "qcom,cam-icp"},
  48. {}
  49. };
  50. static int cam_icp_dev_err_inject_cb(void *err_param)
  51. {
  52. int i = 0;
  53. for (i = 0; i < CAM_ICP_CTX_MAX; i++) {
  54. if (g_icp_dev.ctx[i].dev_hdl ==
  55. ((struct cam_err_inject_param *)err_param)->dev_hdl) {
  56. CAM_INFO(CAM_ICP, "ICP err inject dev_hdl found:%d",
  57. g_icp_dev.ctx[i].dev_hdl);
  58. cam_context_add_err_inject(&g_icp_dev.ctx[i], err_param);
  59. return 0;
  60. }
  61. }
  62. CAM_ERR(CAM_ICP, "No dev hdl found");
  63. return -ENODEV;
  64. }
  65. static void cam_icp_dev_iommu_fault_handler(struct cam_smmu_pf_info *pf_smmu_info)
  66. {
  67. int i, rc;
  68. struct cam_node *node = NULL;
  69. struct cam_hw_dump_pf_args pf_args = {0};
  70. if (!pf_smmu_info || !pf_smmu_info->token) {
  71. CAM_ERR(CAM_ICP, "invalid token in page handler cb");
  72. return;
  73. }
  74. node = (struct cam_node *)pf_smmu_info->token;
  75. pf_args.pf_smmu_info = pf_smmu_info;
  76. for (i = 0; i < node->ctx_size; i++) {
  77. cam_context_dump_pf_info(&(node->ctx_list[i]), &pf_args);
  78. if (pf_args.pf_context_info.ctx_found)
  79. /* found ctx and packet of the faulted address */
  80. break;
  81. }
  82. if (i == node->ctx_size) {
  83. /* Faulted ctx not found. Report PF to userspace */
  84. rc = cam_context_send_pf_evt(NULL, &pf_args);
  85. if (rc)
  86. CAM_ERR(CAM_ICP,
  87. "Failed to notify PF event to userspace rc: %d", rc);
  88. }
  89. }
  90. static void cam_icp_dev_mini_dump_cb(void *priv, void *args)
  91. {
  92. struct cam_context *ctx = NULL;
  93. if (!priv || !args) {
  94. CAM_ERR(CAM_ICP, "Invalid param priv: %pK args %pK", priv, args);
  95. return;
  96. }
  97. ctx = (struct cam_context *)priv;
  98. cam_context_mini_dump_from_hw(ctx, args);
  99. }
  100. static int cam_icp_subdev_open(struct v4l2_subdev *sd,
  101. struct v4l2_subdev_fh *fh)
  102. {
  103. struct cam_hw_mgr_intf *hw_mgr_intf = NULL;
  104. struct cam_node *node = v4l2_get_subdevdata(sd);
  105. int rc = 0;
  106. cam_req_mgr_rwsem_read_op(CAM_SUBDEV_LOCK);
  107. mutex_lock(&g_icp_dev.icp_lock);
  108. if (g_icp_dev.open_cnt >= 1) {
  109. CAM_ERR(CAM_ICP, "ICP subdev is already opened");
  110. rc = -EALREADY;
  111. goto end;
  112. }
  113. if (!node) {
  114. CAM_ERR(CAM_ICP, "Invalid args");
  115. rc = -EINVAL;
  116. goto end;
  117. }
  118. hw_mgr_intf = &node->hw_mgr_intf;
  119. rc = hw_mgr_intf->hw_open(hw_mgr_intf->hw_mgr_priv, NULL);
  120. if (rc < 0) {
  121. CAM_ERR(CAM_ICP, "FW download failed");
  122. goto end;
  123. }
  124. g_icp_dev.open_cnt++;
  125. end:
  126. mutex_unlock(&g_icp_dev.icp_lock);
  127. cam_req_mgr_rwsem_read_op(CAM_SUBDEV_UNLOCK);
  128. return rc;
  129. }
  130. static int cam_icp_subdev_close_internal(struct v4l2_subdev *sd,
  131. struct v4l2_subdev_fh *fh)
  132. {
  133. int rc = 0;
  134. struct cam_hw_mgr_intf *hw_mgr_intf = NULL;
  135. struct cam_node *node = v4l2_get_subdevdata(sd);
  136. mutex_lock(&g_icp_dev.icp_lock);
  137. if (g_icp_dev.open_cnt <= 0) {
  138. CAM_DBG(CAM_ICP, "ICP subdev is already closed");
  139. goto end;
  140. }
  141. g_icp_dev.open_cnt--;
  142. if (!node) {
  143. CAM_ERR(CAM_ICP, "Invalid args");
  144. rc = -EINVAL;
  145. goto end;
  146. }
  147. hw_mgr_intf = &node->hw_mgr_intf;
  148. if (!hw_mgr_intf) {
  149. CAM_ERR(CAM_ICP, "hw_mgr_intf is not initialized");
  150. rc = -EINVAL;
  151. goto end;
  152. }
  153. rc = cam_node_shutdown(node);
  154. if (rc < 0) {
  155. CAM_ERR(CAM_ICP, "HW close failed");
  156. goto end;
  157. }
  158. end:
  159. mutex_unlock(&g_icp_dev.icp_lock);
  160. return rc;
  161. }
  162. static int cam_icp_subdev_close(struct v4l2_subdev *sd,
  163. struct v4l2_subdev_fh *fh)
  164. {
  165. bool crm_active = cam_req_mgr_is_open();
  166. if (crm_active) {
  167. CAM_DBG(CAM_ICP, "CRM is ACTIVE, close should be from CRM");
  168. return 0;
  169. }
  170. return cam_icp_subdev_close_internal(sd, fh);
  171. }
  172. const struct v4l2_subdev_internal_ops cam_icp_subdev_internal_ops = {
  173. .open = cam_icp_subdev_open,
  174. .close = cam_icp_subdev_close,
  175. };
  176. static int cam_icp_component_bind(struct device *dev,
  177. struct device *master_dev, void *data)
  178. {
  179. int rc = 0, i = 0;
  180. struct cam_node *node;
  181. struct cam_hw_mgr_intf *hw_mgr_intf;
  182. int iommu_hdl = -1;
  183. struct platform_device *pdev = to_platform_device(dev);
  184. if (!pdev) {
  185. CAM_ERR(CAM_ICP, "pdev is NULL");
  186. return -EINVAL;
  187. }
  188. g_icp_dev.sd.pdev = pdev;
  189. g_icp_dev.sd.internal_ops = &cam_icp_subdev_internal_ops;
  190. g_icp_dev.sd.close_seq_prior = CAM_SD_CLOSE_MEDIUM_PRIORITY;
  191. rc = cam_subdev_probe(&g_icp_dev.sd, pdev, CAM_ICP_DEV_NAME,
  192. CAM_ICP_DEVICE_TYPE);
  193. if (rc) {
  194. CAM_ERR(CAM_ICP, "ICP cam_subdev_probe failed");
  195. goto probe_fail;
  196. }
  197. node = (struct cam_node *) g_icp_dev.sd.token;
  198. hw_mgr_intf = kzalloc(sizeof(*hw_mgr_intf), GFP_KERNEL);
  199. if (!hw_mgr_intf) {
  200. rc = -ENOMEM;
  201. CAM_ERR(CAM_ICP, "Memory allocation fail");
  202. goto hw_alloc_fail;
  203. }
  204. rc = cam_icp_hw_mgr_init(pdev->dev.of_node, (uint64_t *)hw_mgr_intf,
  205. &iommu_hdl, cam_icp_dev_mini_dump_cb);
  206. if (rc) {
  207. CAM_ERR(CAM_ICP, "ICP HW manager init failed: %d", rc);
  208. goto hw_init_fail;
  209. }
  210. for (i = 0; i < CAM_ICP_CTX_MAX; i++) {
  211. g_icp_dev.ctx_icp[i].base = &g_icp_dev.ctx[i];
  212. rc = cam_icp_context_init(&g_icp_dev.ctx_icp[i],
  213. hw_mgr_intf, i, iommu_hdl);
  214. if (rc) {
  215. CAM_ERR(CAM_ICP, "ICP context init failed");
  216. goto ctx_fail;
  217. }
  218. }
  219. rc = cam_node_init(node, hw_mgr_intf, g_icp_dev.ctx,
  220. CAM_ICP_CTX_MAX, CAM_ICP_DEV_NAME);
  221. if (rc) {
  222. CAM_ERR(CAM_ICP, "ICP node init failed");
  223. goto ctx_fail;
  224. }
  225. cam_common_register_err_inject_cb(cam_icp_dev_err_inject_cb,
  226. CAM_COMMON_ERR_INJECT_HW_ICP);
  227. node->sd_handler = cam_icp_subdev_close_internal;
  228. cam_smmu_set_client_page_fault_handler(iommu_hdl,
  229. cam_icp_dev_iommu_fault_handler, node);
  230. g_icp_dev.open_cnt = 0;
  231. mutex_init(&g_icp_dev.icp_lock);
  232. CAM_DBG(CAM_ICP, "Component bound successfully");
  233. return rc;
  234. ctx_fail:
  235. for (--i; i >= 0; i--)
  236. cam_icp_context_deinit(&g_icp_dev.ctx_icp[i]);
  237. hw_init_fail:
  238. kfree(hw_mgr_intf);
  239. hw_alloc_fail:
  240. cam_subdev_remove(&g_icp_dev.sd);
  241. probe_fail:
  242. return rc;
  243. }
  244. static void cam_icp_component_unbind(struct device *dev,
  245. struct device *master_dev, void *data)
  246. {
  247. int i;
  248. struct v4l2_subdev *sd;
  249. struct platform_device *pdev = to_platform_device(dev);
  250. if (!pdev) {
  251. CAM_ERR(CAM_ICP, "pdev is NULL");
  252. return;
  253. }
  254. sd = platform_get_drvdata(pdev);
  255. if (!sd) {
  256. CAM_ERR(CAM_ICP, "V4l2 subdev is NULL");
  257. return;
  258. }
  259. for (i = 0; i < CAM_ICP_CTX_MAX; i++)
  260. cam_icp_context_deinit(&g_icp_dev.ctx_icp[i]);
  261. cam_icp_hw_mgr_deinit();
  262. cam_node_deinit(g_icp_dev.node);
  263. cam_subdev_remove(&g_icp_dev.sd);
  264. mutex_destroy(&g_icp_dev.icp_lock);
  265. }
  266. const static struct component_ops cam_icp_component_ops = {
  267. .bind = cam_icp_component_bind,
  268. .unbind = cam_icp_component_unbind,
  269. };
  270. static int cam_icp_probe(struct platform_device *pdev)
  271. {
  272. int rc = 0;
  273. CAM_DBG(CAM_ICP, "Adding ICP component");
  274. rc = component_add(&pdev->dev, &cam_icp_component_ops);
  275. if (rc)
  276. CAM_ERR(CAM_ICP, "failed to add component rc: %d", rc);
  277. return rc;
  278. }
  279. static int cam_icp_remove(struct platform_device *pdev)
  280. {
  281. component_del(&pdev->dev, &cam_icp_component_ops);
  282. return 0;
  283. }
  284. struct platform_driver cam_icp_driver = {
  285. .probe = cam_icp_probe,
  286. .remove = cam_icp_remove,
  287. .driver = {
  288. .name = "cam_icp",
  289. .owner = THIS_MODULE,
  290. .of_match_table = cam_icp_dt_match,
  291. .suppress_bind_attrs = true,
  292. },
  293. };
  294. int cam_icp_init_module(void)
  295. {
  296. return platform_driver_register(&cam_icp_driver);
  297. }
  298. void cam_icp_exit_module(void)
  299. {
  300. platform_driver_unregister(&cam_icp_driver);
  301. }
  302. MODULE_DESCRIPTION("MSM ICP driver");
  303. MODULE_LICENSE("GPL v2");