main.c 119 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #include <linux/soc/qcom/slatecom_interface.h>
  47. #include "main.h"
  48. #include "qmi.h"
  49. #include "debug.h"
  50. #include "power.h"
  51. #include "genl.h"
  52. #define MAX_PROP_SIZE 32
  53. #define NUM_LOG_PAGES 10
  54. #define NUM_LOG_LONG_PAGES 4
  55. #define ICNSS_MAGIC 0x5abc5abc
  56. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  57. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  58. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  59. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  60. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  61. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  62. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  63. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  64. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  65. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  66. #define ICNSS_MAX_PROBE_CNT 2
  67. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  68. #define PROBE_TIMEOUT 15000
  69. #define SMP2P_SOC_WAKE_TIMEOUT 500
  70. #ifdef CONFIG_ICNSS2_DEBUG
  71. static unsigned long qmi_timeout = 3000;
  72. module_param(qmi_timeout, ulong, 0600);
  73. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  74. #else
  75. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  76. #endif
  77. #define ICNSS_RECOVERY_TIMEOUT 60000
  78. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  79. #define ICNSS_CAL_TIMEOUT 40000
  80. static struct icnss_priv *penv;
  81. static struct work_struct wpss_loader;
  82. static struct work_struct wpss_ssr_work;
  83. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  84. #define ICNSS_EVENT_PENDING 2989
  85. #define ICNSS_EVENT_SYNC BIT(0)
  86. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  87. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  88. ICNSS_EVENT_SYNC)
  89. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  90. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  91. #define SMP2P_GET_MAX_RETRY 4
  92. #define SMP2P_GET_RETRY_DELAY_MS 500
  93. #define RAMDUMP_NUM_DEVICES 256
  94. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  95. #define WLAN_EN_TEMP_THRESHOLD 5000
  96. #define WLAN_EN_DELAY 500
  97. #define ICNSS_RPROC_LEN 10
  98. static DEFINE_IDA(rd_minor_id);
  99. enum icnss_pdr_cause_index {
  100. ICNSS_FW_CRASH,
  101. ICNSS_ROOT_PD_CRASH,
  102. ICNSS_ROOT_PD_SHUTDOWN,
  103. ICNSS_HOST_ERROR,
  104. };
  105. static const char * const icnss_pdr_cause[] = {
  106. [ICNSS_FW_CRASH] = "FW crash",
  107. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  108. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  109. [ICNSS_HOST_ERROR] = "Host error",
  110. };
  111. static void icnss_set_plat_priv(struct icnss_priv *priv)
  112. {
  113. penv = priv;
  114. }
  115. static struct icnss_priv *icnss_get_plat_priv(void)
  116. {
  117. return penv;
  118. }
  119. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  120. {
  121. if (priv && priv->rproc) {
  122. rproc_shutdown(priv->rproc);
  123. rproc_put(priv->rproc);
  124. priv->rproc = NULL;
  125. }
  126. }
  127. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  128. struct kobj_attribute *attr,
  129. const char *buf, size_t count)
  130. {
  131. struct icnss_priv *priv = icnss_get_plat_priv();
  132. icnss_pr_dbg("Received shutdown indication");
  133. atomic_set(&priv->is_shutdown, true);
  134. if (priv->wpss_supported && priv->device_id == ADRASTEA_DEVICE_ID)
  135. icnss_wpss_unload(priv);
  136. return count;
  137. }
  138. static struct kobj_attribute icnss_sysfs_attribute =
  139. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  140. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  141. {
  142. if (atomic_inc_return(&priv->pm_count) != 1)
  143. return;
  144. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  145. atomic_read(&priv->pm_count));
  146. pm_stay_awake(&priv->pdev->dev);
  147. priv->stats.pm_stay_awake++;
  148. }
  149. static void icnss_pm_relax(struct icnss_priv *priv)
  150. {
  151. int r = atomic_dec_return(&priv->pm_count);
  152. WARN_ON(r < 0);
  153. if (r != 0)
  154. return;
  155. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  156. atomic_read(&priv->pm_count));
  157. pm_relax(&priv->pdev->dev);
  158. priv->stats.pm_relax++;
  159. }
  160. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  161. {
  162. switch (type) {
  163. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  164. return "SERVER_ARRIVE";
  165. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  166. return "SERVER_EXIT";
  167. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  168. return "FW_READY";
  169. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  170. return "REGISTER_DRIVER";
  171. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  172. return "UNREGISTER_DRIVER";
  173. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  174. return "PD_SERVICE_DOWN";
  175. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  176. return "FW_EARLY_CRASH_IND";
  177. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  178. return "IDLE_SHUTDOWN";
  179. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  180. return "IDLE_RESTART";
  181. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  182. return "FW_INIT_DONE";
  183. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  184. return "QDSS_TRACE_REQ_MEM";
  185. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  186. return "QDSS_TRACE_SAVE";
  187. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  188. return "QDSS_TRACE_FREE";
  189. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  190. return "M3_DUMP_UPLOAD";
  191. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  192. return "QDSS_TRACE_REQ_DATA";
  193. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  194. return "SUBSYS_RESTART_LEVEL";
  195. case ICNSS_DRIVER_EVENT_MAX:
  196. return "EVENT_MAX";
  197. }
  198. return "UNKNOWN";
  199. };
  200. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  201. {
  202. switch (type) {
  203. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  204. return "SOC_WAKE_REQUEST";
  205. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  206. return "SOC_WAKE_RELEASE";
  207. case ICNSS_SOC_WAKE_EVENT_MAX:
  208. return "SOC_EVENT_MAX";
  209. }
  210. return "UNKNOWN";
  211. };
  212. int icnss_driver_event_post(struct icnss_priv *priv,
  213. enum icnss_driver_event_type type,
  214. u32 flags, void *data)
  215. {
  216. struct icnss_driver_event *event;
  217. unsigned long irq_flags;
  218. int gfp = GFP_KERNEL;
  219. int ret = 0;
  220. if (!priv)
  221. return -ENODEV;
  222. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  223. icnss_driver_event_to_str(type), type, current->comm,
  224. flags, priv->state);
  225. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  226. icnss_pr_err("Invalid Event type: %d, can't post", type);
  227. return -EINVAL;
  228. }
  229. if (in_interrupt() || irqs_disabled())
  230. gfp = GFP_ATOMIC;
  231. event = kzalloc(sizeof(*event), gfp);
  232. if (event == NULL)
  233. return -ENOMEM;
  234. icnss_pm_stay_awake(priv);
  235. event->type = type;
  236. event->data = data;
  237. init_completion(&event->complete);
  238. event->ret = ICNSS_EVENT_PENDING;
  239. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  240. spin_lock_irqsave(&priv->event_lock, irq_flags);
  241. list_add_tail(&event->list, &priv->event_list);
  242. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  243. priv->stats.events[type].posted++;
  244. queue_work(priv->event_wq, &priv->event_work);
  245. if (!(flags & ICNSS_EVENT_SYNC))
  246. goto out;
  247. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  248. wait_for_completion(&event->complete);
  249. else
  250. ret = wait_for_completion_interruptible(&event->complete);
  251. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  252. icnss_driver_event_to_str(type), type, priv->state, ret,
  253. event->ret);
  254. spin_lock_irqsave(&priv->event_lock, irq_flags);
  255. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  256. event->sync = false;
  257. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  258. ret = -EINTR;
  259. goto out;
  260. }
  261. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  262. ret = event->ret;
  263. kfree(event);
  264. out:
  265. icnss_pm_relax(priv);
  266. return ret;
  267. }
  268. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  269. enum icnss_soc_wake_event_type type,
  270. u32 flags, void *data)
  271. {
  272. struct icnss_soc_wake_event *event;
  273. unsigned long irq_flags;
  274. int gfp = GFP_KERNEL;
  275. int ret = 0;
  276. if (!priv)
  277. return -ENODEV;
  278. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  279. icnss_soc_wake_event_to_str(type),
  280. type, current->comm, flags, priv->state);
  281. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  282. icnss_pr_err("Invalid Event type: %d, can't post", type);
  283. return -EINVAL;
  284. }
  285. if (in_interrupt() || irqs_disabled())
  286. gfp = GFP_ATOMIC;
  287. event = kzalloc(sizeof(*event), gfp);
  288. if (!event)
  289. return -ENOMEM;
  290. icnss_pm_stay_awake(priv);
  291. event->type = type;
  292. event->data = data;
  293. init_completion(&event->complete);
  294. event->ret = ICNSS_EVENT_PENDING;
  295. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  296. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  297. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  298. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  299. priv->stats.soc_wake_events[type].posted++;
  300. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  301. if (!(flags & ICNSS_EVENT_SYNC))
  302. goto out;
  303. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  304. wait_for_completion(&event->complete);
  305. else
  306. ret = wait_for_completion_interruptible(&event->complete);
  307. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  308. icnss_soc_wake_event_to_str(type),
  309. type, priv->state, ret, event->ret);
  310. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  311. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  312. event->sync = false;
  313. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  314. ret = -EINTR;
  315. goto out;
  316. }
  317. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  318. ret = event->ret;
  319. kfree(event);
  320. out:
  321. icnss_pm_relax(priv);
  322. return ret;
  323. }
  324. bool icnss_is_fw_ready(void)
  325. {
  326. if (!penv)
  327. return false;
  328. else
  329. return test_bit(ICNSS_FW_READY, &penv->state);
  330. }
  331. EXPORT_SYMBOL(icnss_is_fw_ready);
  332. void icnss_block_shutdown(bool status)
  333. {
  334. if (!penv)
  335. return;
  336. if (status) {
  337. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  338. reinit_completion(&penv->unblock_shutdown);
  339. } else {
  340. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  341. complete(&penv->unblock_shutdown);
  342. }
  343. }
  344. EXPORT_SYMBOL(icnss_block_shutdown);
  345. bool icnss_is_fw_down(void)
  346. {
  347. struct icnss_priv *priv = icnss_get_plat_priv();
  348. if (!priv)
  349. return false;
  350. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  351. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  352. test_bit(ICNSS_REJUVENATE, &priv->state);
  353. }
  354. EXPORT_SYMBOL(icnss_is_fw_down);
  355. unsigned long icnss_get_device_config(void)
  356. {
  357. struct icnss_priv *priv = icnss_get_plat_priv();
  358. if (!priv)
  359. return 0;
  360. return priv->device_config;
  361. }
  362. EXPORT_SYMBOL(icnss_get_device_config);
  363. bool icnss_is_rejuvenate(void)
  364. {
  365. if (!penv)
  366. return false;
  367. else
  368. return test_bit(ICNSS_REJUVENATE, &penv->state);
  369. }
  370. EXPORT_SYMBOL(icnss_is_rejuvenate);
  371. bool icnss_is_pdr(void)
  372. {
  373. if (!penv)
  374. return false;
  375. else
  376. return test_bit(ICNSS_PDR, &penv->state);
  377. }
  378. EXPORT_SYMBOL(icnss_is_pdr);
  379. static int icnss_send_smp2p(struct icnss_priv *priv,
  380. enum icnss_smp2p_msg_id msg_id,
  381. enum smp2p_out_entry smp2p_entry)
  382. {
  383. unsigned int value = 0;
  384. int ret;
  385. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  386. return -EINVAL;
  387. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  388. if (msg_id == ICNSS_RESET_MSG) {
  389. priv->smp2p_info[smp2p_entry].seq = 0;
  390. ret = qcom_smem_state_update_bits(
  391. priv->smp2p_info[smp2p_entry].smem_state,
  392. ICNSS_SMEM_VALUE_MASK,
  393. 0);
  394. if (ret)
  395. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  396. ret, icnss_smp2p_str[smp2p_entry]);
  397. return ret;
  398. }
  399. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  400. return -ENODEV;
  401. value |= priv->smp2p_info[smp2p_entry].seq++;
  402. value <<= ICNSS_SMEM_SEQ_NO_POS;
  403. value |= msg_id;
  404. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  405. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  406. reinit_completion(&penv->smp2p_soc_wake_wait);
  407. ret = qcom_smem_state_update_bits(
  408. priv->smp2p_info[smp2p_entry].smem_state,
  409. ICNSS_SMEM_VALUE_MASK,
  410. value);
  411. if (ret) {
  412. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  413. icnss_smp2p_str[smp2p_entry]);
  414. } else {
  415. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  416. msg_id == ICNSS_SOC_WAKE_REL) {
  417. if (!wait_for_completion_timeout(
  418. &priv->smp2p_soc_wake_wait,
  419. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  420. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  421. icnss_smp2p_str[smp2p_entry]);
  422. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  423. ICNSS_ASSERT(0);
  424. }
  425. }
  426. }
  427. return ret;
  428. }
  429. bool icnss_is_low_power(void)
  430. {
  431. if (!penv)
  432. return false;
  433. else
  434. return test_bit(ICNSS_LOW_POWER, &penv->state);
  435. }
  436. EXPORT_SYMBOL(icnss_is_low_power);
  437. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  438. {
  439. struct icnss_priv *priv = ctx;
  440. if (priv)
  441. priv->force_err_fatal = true;
  442. icnss_pr_err("Received force error fatal request from FW\n");
  443. return IRQ_HANDLED;
  444. }
  445. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  446. {
  447. struct icnss_priv *priv = ctx;
  448. struct icnss_uevent_fw_down_data fw_down_data = {0};
  449. icnss_pr_err("Received early crash indication from FW\n");
  450. if (priv->wpss_self_recovery_enabled)
  451. mod_timer(&priv->wpss_ssr_timer,
  452. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  453. if (priv) {
  454. set_bit(ICNSS_FW_DOWN, &priv->state);
  455. icnss_ignore_fw_timeout(true);
  456. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  457. clear_bit(ICNSS_FW_READY, &priv->state);
  458. fw_down_data.crashed = true;
  459. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  460. &fw_down_data);
  461. }
  462. }
  463. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  464. 0, NULL);
  465. return IRQ_HANDLED;
  466. }
  467. static void register_fw_error_notifications(struct device *dev)
  468. {
  469. struct icnss_priv *priv = dev_get_drvdata(dev);
  470. struct device_node *dev_node;
  471. int irq = 0, ret = 0;
  472. if (!priv)
  473. return;
  474. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  475. if (!dev_node) {
  476. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  477. return;
  478. }
  479. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  480. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  481. ret = irq = of_irq_get_byname(dev_node,
  482. "qcom,smp2p-force-fatal-error");
  483. if (ret < 0) {
  484. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  485. irq);
  486. return;
  487. }
  488. }
  489. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  490. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  491. "wlanfw-err", priv);
  492. if (ret < 0) {
  493. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  494. irq, ret);
  495. return;
  496. }
  497. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  498. priv->fw_error_fatal_irq = irq;
  499. }
  500. static void register_early_crash_notifications(struct device *dev)
  501. {
  502. struct icnss_priv *priv = dev_get_drvdata(dev);
  503. struct device_node *dev_node;
  504. int irq = 0, ret = 0;
  505. if (!priv)
  506. return;
  507. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  508. if (!dev_node) {
  509. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  510. return;
  511. }
  512. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  513. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  514. ret = irq = of_irq_get_byname(dev_node,
  515. "qcom,smp2p-early-crash-ind");
  516. if (ret < 0) {
  517. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  518. irq);
  519. return;
  520. }
  521. }
  522. ret = devm_request_threaded_irq(dev, irq, NULL,
  523. fw_crash_indication_handler,
  524. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  525. "wlanfw-early-crash-ind", priv);
  526. if (ret < 0) {
  527. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  528. irq, ret);
  529. return;
  530. }
  531. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  532. priv->fw_early_crash_irq = irq;
  533. }
  534. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  535. {
  536. struct thermal_zone_device *thermal_dev;
  537. const char *tsens;
  538. int ret;
  539. ret = of_property_read_string(priv->pdev->dev.of_node,
  540. "tsens",
  541. &tsens);
  542. if (ret)
  543. return ret;
  544. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  545. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  546. if (IS_ERR(thermal_dev)) {
  547. icnss_pr_err("Fail to get thermal zone. ret: %d",
  548. PTR_ERR(thermal_dev));
  549. return PTR_ERR(thermal_dev);
  550. }
  551. ret = thermal_zone_get_temp(thermal_dev, temp);
  552. if (ret)
  553. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  554. return ret;
  555. }
  556. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  557. {
  558. struct icnss_priv *priv = ctx;
  559. if (priv)
  560. complete(&priv->smp2p_soc_wake_wait);
  561. return IRQ_HANDLED;
  562. }
  563. static void register_soc_wake_notif(struct device *dev)
  564. {
  565. struct icnss_priv *priv = dev_get_drvdata(dev);
  566. struct device_node *dev_node;
  567. int irq = 0, ret = 0;
  568. if (!priv)
  569. return;
  570. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  571. if (!dev_node) {
  572. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  573. return;
  574. }
  575. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  576. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  577. ret = irq = of_irq_get_byname(dev_node,
  578. "qcom,smp2p-soc-wake-ack");
  579. if (ret < 0) {
  580. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  581. irq);
  582. return;
  583. }
  584. }
  585. ret = devm_request_threaded_irq(dev, irq, NULL,
  586. fw_soc_wake_ack_handler,
  587. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  588. IRQF_TRIGGER_FALLING,
  589. "wlanfw-soc-wake-ack", priv);
  590. if (ret < 0) {
  591. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  592. irq, ret);
  593. return;
  594. }
  595. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  596. priv->fw_soc_wake_ack_irq = irq;
  597. }
  598. int icnss_call_driver_uevent(struct icnss_priv *priv,
  599. enum icnss_uevent uevent, void *data)
  600. {
  601. struct icnss_uevent_data uevent_data;
  602. if (!priv->ops || !priv->ops->uevent)
  603. return 0;
  604. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  605. priv->state, uevent);
  606. uevent_data.uevent = uevent;
  607. uevent_data.data = data;
  608. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  609. }
  610. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  611. {
  612. int i;
  613. int ret = 0;
  614. ret = icnss_qmi_get_dms_mac(priv);
  615. if (ret == 0 && priv->dms.mac_valid)
  616. goto qmi_send;
  617. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  618. * Thus assert on failure to get MAC from DMS even after retries
  619. */
  620. if (priv->use_nv_mac) {
  621. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  622. if (priv->dms.mac_valid)
  623. break;
  624. ret = icnss_qmi_get_dms_mac(priv);
  625. if (ret != -EAGAIN)
  626. break;
  627. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  628. }
  629. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  630. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  631. ICNSS_ASSERT(0);
  632. return -EINVAL;
  633. }
  634. }
  635. qmi_send:
  636. if (priv->dms.mac_valid)
  637. ret =
  638. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  639. ARRAY_SIZE(priv->dms.mac));
  640. return ret;
  641. }
  642. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  643. enum smp2p_out_entry smp2p_entry)
  644. {
  645. int retry = 0;
  646. int error;
  647. if (priv->smp2p_info[smp2p_entry].smem_state)
  648. return;
  649. retry:
  650. priv->smp2p_info[smp2p_entry].smem_state =
  651. qcom_smem_state_get(&priv->pdev->dev,
  652. icnss_smp2p_str[smp2p_entry],
  653. &priv->smp2p_info[smp2p_entry].smem_bit);
  654. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  655. if (retry++ < SMP2P_GET_MAX_RETRY) {
  656. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  657. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  658. error, icnss_smp2p_str[smp2p_entry]);
  659. msleep(SMP2P_GET_RETRY_DELAY_MS);
  660. goto retry;
  661. }
  662. ICNSS_ASSERT(0);
  663. return;
  664. }
  665. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  666. }
  667. static inline
  668. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  669. {
  670. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  671. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  672. } else {
  673. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  674. }
  675. }
  676. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  677. {
  678. switch (val) {
  679. case WLAN_RF_SLATE:
  680. return WLFW_WLAN_RF_SLATE_V01;
  681. case WLAN_RF_APACHE:
  682. return WLFW_WLAN_RF_APACHE_V01;
  683. default:
  684. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  685. }
  686. }
  687. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  688. void *data)
  689. {
  690. int ret = 0;
  691. int temp = 0;
  692. bool ignore_assert = false;
  693. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  694. if (!priv)
  695. return -ENODEV;
  696. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  697. clear_bit(ICNSS_FW_DOWN, &priv->state);
  698. clear_bit(ICNSS_FW_READY, &priv->state);
  699. icnss_ignore_fw_timeout(false);
  700. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  701. icnss_pr_err("QMI Server already in Connected State\n");
  702. ICNSS_ASSERT(0);
  703. }
  704. ret = icnss_connect_to_fw_server(priv, data);
  705. if (ret)
  706. goto fail;
  707. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  708. if (priv->is_slate_rfa) {
  709. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  710. reinit_completion(&priv->slate_boot_complete);
  711. icnss_pr_dbg("Waiting for slate boot up notification, 0x%lx\n",
  712. priv->state);
  713. wait_for_completion(&priv->slate_boot_complete);
  714. }
  715. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  716. icnss_pr_info("sent wlan boot init command\n");
  717. }
  718. ret = wlfw_ind_register_send_sync_msg(priv);
  719. if (ret < 0) {
  720. if (ret == -EALREADY) {
  721. ret = 0;
  722. goto qmi_registered;
  723. }
  724. ignore_assert = true;
  725. goto fail;
  726. }
  727. if (priv->is_rf_subtype_valid) {
  728. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  729. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  730. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  731. if (ret < 0)
  732. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  733. ret);
  734. } else {
  735. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  736. priv->rf_subtype);
  737. }
  738. }
  739. if (priv->device_id == WCN6750_DEVICE_ID) {
  740. if (!icnss_get_temperature(priv, &temp)) {
  741. icnss_pr_dbg("Temperature: %d\n", temp);
  742. if (temp < WLAN_EN_TEMP_THRESHOLD)
  743. icnss_set_wlan_en_delay(priv);
  744. }
  745. ret = wlfw_host_cap_send_sync(priv);
  746. if (ret < 0)
  747. goto fail;
  748. }
  749. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  750. if (!priv->msa_va) {
  751. icnss_pr_err("Invalid MSA address\n");
  752. ret = -EINVAL;
  753. goto fail;
  754. }
  755. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  756. if (ret < 0) {
  757. ignore_assert = true;
  758. goto fail;
  759. }
  760. ret = wlfw_msa_ready_send_sync_msg(priv);
  761. if (ret < 0) {
  762. ignore_assert = true;
  763. goto fail;
  764. }
  765. }
  766. ret = wlfw_cap_send_sync_msg(priv);
  767. if (ret < 0) {
  768. ignore_assert = true;
  769. goto fail;
  770. }
  771. ret = icnss_hw_power_on(priv);
  772. if (ret)
  773. goto fail;
  774. if (priv->device_id == WCN6750_DEVICE_ID) {
  775. ret = wlfw_device_info_send_msg(priv);
  776. if (ret < 0) {
  777. ignore_assert = true;
  778. goto device_info_failure;
  779. }
  780. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  781. priv->mem_base_pa,
  782. priv->mem_base_size);
  783. if (!priv->mem_base_va) {
  784. icnss_pr_err("Ioremap failed for bar address\n");
  785. goto device_info_failure;
  786. }
  787. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  788. &priv->mem_base_pa,
  789. priv->mem_base_va);
  790. if (priv->mhi_state_info_pa)
  791. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  792. priv->mhi_state_info_pa,
  793. PAGE_SIZE);
  794. if (!priv->mhi_state_info_va)
  795. icnss_pr_err("Ioremap failed for MHI info address\n");
  796. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  797. &priv->mhi_state_info_pa,
  798. priv->mhi_state_info_va);
  799. }
  800. if (priv->bdf_download_support) {
  801. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  802. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  803. priv->ctrl_params.bdf_type);
  804. if (ret < 0)
  805. goto device_info_failure;
  806. }
  807. if (priv->device_id == WCN6750_DEVICE_ID) {
  808. if (!priv->fw_soc_wake_ack_irq)
  809. register_soc_wake_notif(&priv->pdev->dev);
  810. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  811. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  812. }
  813. if (priv->wpss_supported)
  814. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  815. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  816. if (priv->bdf_download_support) {
  817. ret = wlfw_cal_report_req(priv);
  818. if (ret < 0)
  819. goto device_info_failure;
  820. }
  821. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  822. dynamic_feature_mask);
  823. }
  824. if (!priv->fw_error_fatal_irq)
  825. register_fw_error_notifications(&priv->pdev->dev);
  826. if (!priv->fw_early_crash_irq)
  827. register_early_crash_notifications(&priv->pdev->dev);
  828. if (priv->psf_supported)
  829. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  830. return ret;
  831. device_info_failure:
  832. icnss_hw_power_off(priv);
  833. fail:
  834. ICNSS_ASSERT(ignore_assert);
  835. qmi_registered:
  836. return ret;
  837. }
  838. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  839. {
  840. if (!priv)
  841. return -ENODEV;
  842. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  843. icnss_clear_server(priv);
  844. if (priv->psf_supported)
  845. priv->last_updated_voltage = 0;
  846. return 0;
  847. }
  848. static int icnss_call_driver_probe(struct icnss_priv *priv)
  849. {
  850. int ret = 0;
  851. int probe_cnt = 0;
  852. if (!priv->ops || !priv->ops->probe)
  853. return 0;
  854. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  855. return -EINVAL;
  856. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  857. icnss_hw_power_on(priv);
  858. icnss_block_shutdown(true);
  859. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  860. ret = priv->ops->probe(&priv->pdev->dev);
  861. probe_cnt++;
  862. if (ret != -EPROBE_DEFER)
  863. break;
  864. }
  865. if (ret < 0) {
  866. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  867. ret, priv->state, probe_cnt);
  868. icnss_block_shutdown(false);
  869. goto out;
  870. }
  871. icnss_block_shutdown(false);
  872. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  873. return 0;
  874. out:
  875. icnss_hw_power_off(priv);
  876. return ret;
  877. }
  878. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  879. {
  880. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  881. goto out;
  882. if (!priv->ops || !priv->ops->shutdown)
  883. goto out;
  884. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  885. goto out;
  886. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  887. priv->ops->shutdown(&priv->pdev->dev);
  888. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  889. out:
  890. return 0;
  891. }
  892. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  893. {
  894. int ret = 0;
  895. icnss_pm_relax(priv);
  896. icnss_call_driver_shutdown(priv);
  897. clear_bit(ICNSS_PDR, &priv->state);
  898. clear_bit(ICNSS_REJUVENATE, &priv->state);
  899. clear_bit(ICNSS_PD_RESTART, &priv->state);
  900. clear_bit(ICNSS_LOW_POWER, &priv->state);
  901. priv->early_crash_ind = false;
  902. priv->is_ssr = false;
  903. if (!priv->ops || !priv->ops->reinit)
  904. goto out;
  905. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  906. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  907. priv->state);
  908. goto out;
  909. }
  910. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  911. goto call_probe;
  912. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  913. icnss_hw_power_on(priv);
  914. icnss_block_shutdown(true);
  915. ret = priv->ops->reinit(&priv->pdev->dev);
  916. if (ret < 0) {
  917. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  918. ret, priv->state);
  919. if (!priv->allow_recursive_recovery)
  920. ICNSS_ASSERT(false);
  921. icnss_block_shutdown(false);
  922. goto out_power_off;
  923. }
  924. icnss_block_shutdown(false);
  925. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  926. return 0;
  927. call_probe:
  928. return icnss_call_driver_probe(priv);
  929. out_power_off:
  930. icnss_hw_power_off(priv);
  931. out:
  932. return ret;
  933. }
  934. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  935. {
  936. int ret = 0;
  937. if (!priv)
  938. return -ENODEV;
  939. del_timer(&priv->recovery_timer);
  940. set_bit(ICNSS_FW_READY, &priv->state);
  941. clear_bit(ICNSS_MODE_ON, &priv->state);
  942. atomic_set(&priv->soc_wake_ref_count, 0);
  943. if (priv->device_id == WCN6750_DEVICE_ID)
  944. icnss_free_qdss_mem(priv);
  945. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  946. icnss_hw_power_off(priv);
  947. if (!priv->pdev) {
  948. icnss_pr_err("Device is not ready\n");
  949. ret = -ENODEV;
  950. goto out;
  951. }
  952. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state)) {
  953. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  954. icnss_pr_info("sent wlan boot complete command\n");
  955. }
  956. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  957. ret = icnss_pd_restart_complete(priv);
  958. } else {
  959. if (priv->wpss_supported)
  960. icnss_setup_dms_mac(priv);
  961. ret = icnss_call_driver_probe(priv);
  962. }
  963. icnss_vreg_unvote(priv);
  964. out:
  965. return ret;
  966. }
  967. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  968. {
  969. int ret = 0;
  970. if (!priv)
  971. return -ENODEV;
  972. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  973. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  974. icnss_pr_info("Failed to download qdss configuration file");
  975. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  976. mod_timer(&priv->recovery_timer,
  977. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  978. ret = wlfw_wlan_mode_send_sync_msg(priv,
  979. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  980. } else {
  981. icnss_driver_event_fw_ready_ind(priv, NULL);
  982. }
  983. return ret;
  984. }
  985. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  986. {
  987. struct platform_device *pdev = priv->pdev;
  988. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  989. int i, j;
  990. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  991. if (!qdss_mem[i].va && qdss_mem[i].size) {
  992. qdss_mem[i].va =
  993. dma_alloc_coherent(&pdev->dev,
  994. qdss_mem[i].size,
  995. &qdss_mem[i].pa,
  996. GFP_KERNEL);
  997. if (!qdss_mem[i].va) {
  998. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  999. qdss_mem[i].size,
  1000. qdss_mem[i].type, i);
  1001. break;
  1002. }
  1003. }
  1004. }
  1005. /* Best-effort allocation for QDSS trace */
  1006. if (i < priv->qdss_mem_seg_len) {
  1007. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1008. qdss_mem[j].type = 0;
  1009. qdss_mem[j].size = 0;
  1010. }
  1011. priv->qdss_mem_seg_len = i;
  1012. }
  1013. return 0;
  1014. }
  1015. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1016. {
  1017. struct platform_device *pdev = priv->pdev;
  1018. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1019. int i;
  1020. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1021. if (qdss_mem[i].va && qdss_mem[i].size) {
  1022. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1023. &qdss_mem[i].pa, qdss_mem[i].size,
  1024. qdss_mem[i].type);
  1025. dma_free_coherent(&pdev->dev,
  1026. qdss_mem[i].size, qdss_mem[i].va,
  1027. qdss_mem[i].pa);
  1028. qdss_mem[i].va = NULL;
  1029. qdss_mem[i].pa = 0;
  1030. qdss_mem[i].size = 0;
  1031. qdss_mem[i].type = 0;
  1032. }
  1033. }
  1034. priv->qdss_mem_seg_len = 0;
  1035. }
  1036. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1037. {
  1038. int ret = 0;
  1039. ret = icnss_alloc_qdss_mem(priv);
  1040. if (ret < 0)
  1041. return ret;
  1042. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1043. }
  1044. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1045. u64 pa, u32 size, int *seg_id)
  1046. {
  1047. int i = 0;
  1048. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1049. u64 offset = 0;
  1050. void *va = NULL;
  1051. u64 local_pa;
  1052. u32 local_size;
  1053. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1054. local_pa = (u64)qdss_mem[i].pa;
  1055. local_size = (u32)qdss_mem[i].size;
  1056. if (pa == local_pa && size <= local_size) {
  1057. va = qdss_mem[i].va;
  1058. break;
  1059. }
  1060. if (pa > local_pa &&
  1061. pa < local_pa + local_size &&
  1062. pa + size <= local_pa + local_size) {
  1063. offset = pa - local_pa;
  1064. va = qdss_mem[i].va + offset;
  1065. break;
  1066. }
  1067. }
  1068. *seg_id = i;
  1069. return va;
  1070. }
  1071. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1072. void *data)
  1073. {
  1074. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1075. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1076. int ret = 0;
  1077. int i;
  1078. void *va = NULL;
  1079. u64 pa;
  1080. u32 size;
  1081. int seg_id = 0;
  1082. if (!priv->qdss_mem_seg_len) {
  1083. icnss_pr_err("Memory for QDSS trace is not available\n");
  1084. return -ENOMEM;
  1085. }
  1086. if (event_data->mem_seg_len == 0) {
  1087. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1088. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1089. ICNSS_GENL_MSG_TYPE_QDSS,
  1090. event_data->file_name,
  1091. qdss_mem[i].size);
  1092. if (ret < 0) {
  1093. icnss_pr_err("Fail to save QDSS data: %d\n",
  1094. ret);
  1095. break;
  1096. }
  1097. }
  1098. } else {
  1099. for (i = 0; i < event_data->mem_seg_len; i++) {
  1100. pa = event_data->mem_seg[i].addr;
  1101. size = event_data->mem_seg[i].size;
  1102. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1103. size, &seg_id);
  1104. if (!va) {
  1105. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1106. &pa);
  1107. ret = -EINVAL;
  1108. break;
  1109. }
  1110. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1111. event_data->file_name, size);
  1112. if (ret < 0) {
  1113. icnss_pr_err("Fail to save QDSS data: %d\n",
  1114. ret);
  1115. break;
  1116. }
  1117. }
  1118. }
  1119. kfree(data);
  1120. return ret;
  1121. }
  1122. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1123. {
  1124. int dec, c = atomic_read(v);
  1125. do {
  1126. dec = c - 1;
  1127. if (unlikely(dec < 1))
  1128. break;
  1129. } while (!atomic_try_cmpxchg(v, &c, dec));
  1130. return dec;
  1131. }
  1132. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1133. void *data)
  1134. {
  1135. int ret = 0;
  1136. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1137. if (!priv)
  1138. return -ENODEV;
  1139. if (!data)
  1140. return -EINVAL;
  1141. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1142. event_data->total_size);
  1143. kfree(data);
  1144. return ret;
  1145. }
  1146. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1147. {
  1148. int ret = 0;
  1149. if (!priv)
  1150. return -ENODEV;
  1151. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1152. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1153. atomic_read(&priv->soc_wake_ref_count));
  1154. return 0;
  1155. }
  1156. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1157. ICNSS_SMP2P_OUT_SOC_WAKE);
  1158. if (!ret)
  1159. atomic_inc(&priv->soc_wake_ref_count);
  1160. return ret;
  1161. }
  1162. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1163. {
  1164. int ret = 0;
  1165. if (!priv)
  1166. return -ENODEV;
  1167. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1168. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1169. priv->soc_wake_ref_count);
  1170. return 0;
  1171. }
  1172. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1173. ICNSS_SMP2P_OUT_SOC_WAKE);
  1174. return ret;
  1175. }
  1176. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1177. void *data)
  1178. {
  1179. int ret = 0;
  1180. int probe_cnt = 0;
  1181. if (priv->ops)
  1182. return -EEXIST;
  1183. priv->ops = data;
  1184. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1185. set_bit(ICNSS_FW_READY, &priv->state);
  1186. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1187. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1188. priv->state);
  1189. return -ENODEV;
  1190. }
  1191. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1192. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1193. priv->state);
  1194. goto out;
  1195. }
  1196. ret = icnss_hw_power_on(priv);
  1197. if (ret)
  1198. goto out;
  1199. icnss_block_shutdown(true);
  1200. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1201. ret = priv->ops->probe(&priv->pdev->dev);
  1202. probe_cnt++;
  1203. if (ret != -EPROBE_DEFER)
  1204. break;
  1205. }
  1206. if (ret) {
  1207. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1208. ret, priv->state, probe_cnt);
  1209. icnss_block_shutdown(false);
  1210. goto power_off;
  1211. }
  1212. icnss_block_shutdown(false);
  1213. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1214. return 0;
  1215. power_off:
  1216. icnss_hw_power_off(priv);
  1217. out:
  1218. return ret;
  1219. }
  1220. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1221. void *data)
  1222. {
  1223. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1224. priv->ops = NULL;
  1225. goto out;
  1226. }
  1227. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1228. icnss_block_shutdown(true);
  1229. if (priv->ops)
  1230. priv->ops->remove(&priv->pdev->dev);
  1231. icnss_block_shutdown(false);
  1232. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1233. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1234. priv->ops = NULL;
  1235. icnss_hw_power_off(priv);
  1236. out:
  1237. return 0;
  1238. }
  1239. static int icnss_fw_crashed(struct icnss_priv *priv,
  1240. struct icnss_event_pd_service_down_data *event_data)
  1241. {
  1242. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1243. set_bit(ICNSS_PD_RESTART, &priv->state);
  1244. clear_bit(ICNSS_FW_READY, &priv->state);
  1245. icnss_pm_stay_awake(priv);
  1246. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1247. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1248. if (event_data && event_data->fw_rejuvenate)
  1249. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1250. return 0;
  1251. }
  1252. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1253. struct icnss_uevent_hang_data *hang_data)
  1254. {
  1255. if (!priv->hang_event_data_va)
  1256. return -EINVAL;
  1257. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1258. priv->hang_event_data_len,
  1259. GFP_ATOMIC);
  1260. if (!priv->hang_event_data)
  1261. return -ENOMEM;
  1262. // Update the hang event params
  1263. hang_data->hang_event_data = priv->hang_event_data;
  1264. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1265. return 0;
  1266. }
  1267. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1268. {
  1269. struct icnss_uevent_hang_data hang_data = {0};
  1270. int ret = 0xFF;
  1271. if (priv->early_crash_ind) {
  1272. ret = icnss_update_hang_event_data(priv, &hang_data);
  1273. if (ret)
  1274. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1275. }
  1276. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1277. &hang_data);
  1278. if (!ret) {
  1279. kfree(priv->hang_event_data);
  1280. priv->hang_event_data = NULL;
  1281. }
  1282. return 0;
  1283. }
  1284. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1285. void *data)
  1286. {
  1287. struct icnss_event_pd_service_down_data *event_data = data;
  1288. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1289. icnss_ignore_fw_timeout(false);
  1290. goto out;
  1291. }
  1292. if (priv->force_err_fatal)
  1293. ICNSS_ASSERT(0);
  1294. if (priv->device_id == WCN6750_DEVICE_ID) {
  1295. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1296. ICNSS_SMP2P_OUT_SOC_WAKE);
  1297. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1298. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1299. }
  1300. if (priv->wpss_supported)
  1301. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1302. ICNSS_SMP2P_OUT_POWER_SAVE);
  1303. icnss_send_hang_event_data(priv);
  1304. if (priv->early_crash_ind) {
  1305. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1306. event_data->crashed, priv->state);
  1307. goto out;
  1308. }
  1309. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1310. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1311. event_data->crashed, priv->state);
  1312. if (!priv->allow_recursive_recovery)
  1313. ICNSS_ASSERT(0);
  1314. goto out;
  1315. }
  1316. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1317. icnss_fw_crashed(priv, event_data);
  1318. out:
  1319. kfree(data);
  1320. return 0;
  1321. }
  1322. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1323. void *data)
  1324. {
  1325. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1326. icnss_ignore_fw_timeout(false);
  1327. goto out;
  1328. }
  1329. priv->early_crash_ind = true;
  1330. icnss_fw_crashed(priv, NULL);
  1331. out:
  1332. kfree(data);
  1333. return 0;
  1334. }
  1335. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1336. void *data)
  1337. {
  1338. int ret = 0;
  1339. if (!priv->ops || !priv->ops->idle_shutdown)
  1340. return 0;
  1341. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1342. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1343. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1344. ret = -EBUSY;
  1345. } else {
  1346. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1347. priv->state);
  1348. icnss_block_shutdown(true);
  1349. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1350. icnss_block_shutdown(false);
  1351. }
  1352. return ret;
  1353. }
  1354. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1355. void *data)
  1356. {
  1357. int ret = 0;
  1358. if (!priv->ops || !priv->ops->idle_restart)
  1359. return 0;
  1360. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1361. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1362. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1363. ret = -EBUSY;
  1364. } else {
  1365. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1366. priv->state);
  1367. icnss_block_shutdown(true);
  1368. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1369. icnss_block_shutdown(false);
  1370. }
  1371. return ret;
  1372. }
  1373. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1374. {
  1375. icnss_free_qdss_mem(priv);
  1376. return 0;
  1377. }
  1378. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1379. void *data)
  1380. {
  1381. struct icnss_m3_upload_segments_req_data *event_data = data;
  1382. struct qcom_dump_segment segment;
  1383. int i, status = 0, ret = 0;
  1384. struct list_head head;
  1385. if (!dump_enabled()) {
  1386. icnss_pr_info("Dump collection is not enabled\n");
  1387. return ret;
  1388. }
  1389. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1390. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1391. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1392. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1393. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1394. return ret;
  1395. INIT_LIST_HEAD(&head);
  1396. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1397. memset(&segment, 0, sizeof(segment));
  1398. segment.va = devm_ioremap(&priv->pdev->dev,
  1399. event_data->m3_segment[i].addr,
  1400. event_data->m3_segment[i].size);
  1401. if (!segment.va) {
  1402. icnss_pr_err("Failed to ioremap M3 Dump region");
  1403. ret = -ENOMEM;
  1404. goto send_resp;
  1405. }
  1406. segment.size = event_data->m3_segment[i].size;
  1407. list_add(&segment.node, &head);
  1408. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1409. event_data->m3_segment[i].name);
  1410. switch (event_data->m3_segment[i].type) {
  1411. case QMI_M3_SEGMENT_PHYAREG_V01:
  1412. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1413. break;
  1414. case QMI_M3_SEGMENT_PHYDBG_V01:
  1415. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1416. break;
  1417. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1418. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1419. break;
  1420. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1421. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1422. break;
  1423. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1424. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1425. break;
  1426. default:
  1427. icnss_pr_err("Invalid Segment type: %d",
  1428. event_data->m3_segment[i].type);
  1429. }
  1430. if (ret) {
  1431. status = ret;
  1432. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1433. event_data->m3_segment[i].name, ret);
  1434. }
  1435. list_del(&segment.node);
  1436. }
  1437. send_resp:
  1438. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1439. status);
  1440. return ret;
  1441. }
  1442. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1443. {
  1444. int ret = 0;
  1445. struct icnss_subsys_restart_level_data *event_data = data;
  1446. if (!priv)
  1447. return -ENODEV;
  1448. if (!data)
  1449. return -EINVAL;
  1450. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1451. kfree(data);
  1452. return ret;
  1453. }
  1454. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1455. {
  1456. int ret;
  1457. struct icnss_priv *priv = icnss_get_plat_priv();
  1458. rproc_shutdown(priv->rproc);
  1459. ret = rproc_boot(priv->rproc);
  1460. if (ret) {
  1461. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1462. rproc_put(priv->rproc);
  1463. }
  1464. }
  1465. static void icnss_driver_event_work(struct work_struct *work)
  1466. {
  1467. struct icnss_priv *priv =
  1468. container_of(work, struct icnss_priv, event_work);
  1469. struct icnss_driver_event *event;
  1470. unsigned long flags;
  1471. int ret;
  1472. icnss_pm_stay_awake(priv);
  1473. spin_lock_irqsave(&priv->event_lock, flags);
  1474. while (!list_empty(&priv->event_list)) {
  1475. event = list_first_entry(&priv->event_list,
  1476. struct icnss_driver_event, list);
  1477. list_del(&event->list);
  1478. spin_unlock_irqrestore(&priv->event_lock, flags);
  1479. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1480. icnss_driver_event_to_str(event->type),
  1481. event->sync ? "-sync" : "", event->type,
  1482. priv->state);
  1483. switch (event->type) {
  1484. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1485. ret = icnss_driver_event_server_arrive(priv,
  1486. event->data);
  1487. break;
  1488. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1489. ret = icnss_driver_event_server_exit(priv);
  1490. break;
  1491. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1492. ret = icnss_driver_event_fw_ready_ind(priv,
  1493. event->data);
  1494. break;
  1495. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1496. ret = icnss_driver_event_register_driver(priv,
  1497. event->data);
  1498. break;
  1499. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1500. ret = icnss_driver_event_unregister_driver(priv,
  1501. event->data);
  1502. break;
  1503. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1504. ret = icnss_driver_event_pd_service_down(priv,
  1505. event->data);
  1506. break;
  1507. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1508. ret = icnss_driver_event_early_crash_ind(priv,
  1509. event->data);
  1510. break;
  1511. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1512. ret = icnss_driver_event_idle_shutdown(priv,
  1513. event->data);
  1514. break;
  1515. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1516. ret = icnss_driver_event_idle_restart(priv,
  1517. event->data);
  1518. break;
  1519. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1520. ret = icnss_driver_event_fw_init_done(priv,
  1521. event->data);
  1522. break;
  1523. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1524. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1525. break;
  1526. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1527. ret = icnss_qdss_trace_save_hdlr(priv,
  1528. event->data);
  1529. break;
  1530. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1531. ret = icnss_qdss_trace_free_hdlr(priv);
  1532. break;
  1533. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1534. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1535. break;
  1536. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1537. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1538. event->data);
  1539. break;
  1540. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1541. ret = icnss_subsys_restart_level(priv, event->data);
  1542. break;
  1543. default:
  1544. icnss_pr_err("Invalid Event type: %d", event->type);
  1545. kfree(event);
  1546. continue;
  1547. }
  1548. priv->stats.events[event->type].processed++;
  1549. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1550. icnss_driver_event_to_str(event->type),
  1551. event->sync ? "-sync" : "", event->type, ret,
  1552. priv->state);
  1553. spin_lock_irqsave(&priv->event_lock, flags);
  1554. if (event->sync) {
  1555. event->ret = ret;
  1556. complete(&event->complete);
  1557. continue;
  1558. }
  1559. spin_unlock_irqrestore(&priv->event_lock, flags);
  1560. kfree(event);
  1561. spin_lock_irqsave(&priv->event_lock, flags);
  1562. }
  1563. spin_unlock_irqrestore(&priv->event_lock, flags);
  1564. icnss_pm_relax(priv);
  1565. }
  1566. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1567. {
  1568. struct icnss_priv *priv =
  1569. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1570. struct icnss_soc_wake_event *event;
  1571. unsigned long flags;
  1572. int ret;
  1573. icnss_pm_stay_awake(priv);
  1574. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1575. while (!list_empty(&priv->soc_wake_msg_list)) {
  1576. event = list_first_entry(&priv->soc_wake_msg_list,
  1577. struct icnss_soc_wake_event, list);
  1578. list_del(&event->list);
  1579. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1580. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1581. icnss_soc_wake_event_to_str(event->type),
  1582. event->sync ? "-sync" : "", event->type,
  1583. priv->state);
  1584. switch (event->type) {
  1585. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1586. ret = icnss_event_soc_wake_request(priv,
  1587. event->data);
  1588. break;
  1589. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1590. ret = icnss_event_soc_wake_release(priv,
  1591. event->data);
  1592. break;
  1593. default:
  1594. icnss_pr_err("Invalid Event type: %d", event->type);
  1595. kfree(event);
  1596. continue;
  1597. }
  1598. priv->stats.soc_wake_events[event->type].processed++;
  1599. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1600. icnss_soc_wake_event_to_str(event->type),
  1601. event->sync ? "-sync" : "", event->type, ret,
  1602. priv->state);
  1603. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1604. if (event->sync) {
  1605. event->ret = ret;
  1606. complete(&event->complete);
  1607. continue;
  1608. }
  1609. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1610. kfree(event);
  1611. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1612. }
  1613. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1614. icnss_pm_relax(priv);
  1615. }
  1616. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1617. {
  1618. int ret = 0;
  1619. struct qcom_dump_segment segment;
  1620. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1621. struct list_head head;
  1622. if (!dump_enabled()) {
  1623. icnss_pr_info("Dump collection is not enabled\n");
  1624. return ret;
  1625. }
  1626. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1627. return ret;
  1628. INIT_LIST_HEAD(&head);
  1629. memset(&segment, 0, sizeof(segment));
  1630. segment.va = priv->msa_va;
  1631. segment.size = priv->msa_mem_size;
  1632. list_add(&segment.node, &head);
  1633. if (!msa0_dump_dev->dev) {
  1634. icnss_pr_err("Created Dump Device not found\n");
  1635. return 0;
  1636. }
  1637. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1638. if (ret) {
  1639. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1640. return ret;
  1641. }
  1642. list_del(&segment.node);
  1643. return ret;
  1644. }
  1645. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1646. void *data)
  1647. {
  1648. struct qcom_ssr_notify_data *notif = data;
  1649. int ret = 0;
  1650. if (!notif->crashed) {
  1651. if (atomic_read(&priv->is_shutdown)) {
  1652. atomic_set(&priv->is_shutdown, false);
  1653. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1654. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1655. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1656. clear_bit(ICNSS_FW_READY, &priv->state);
  1657. icnss_driver_event_post(priv,
  1658. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1659. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1660. NULL);
  1661. }
  1662. }
  1663. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1664. if (!wait_for_completion_timeout(
  1665. &priv->unblock_shutdown,
  1666. msecs_to_jiffies(PROBE_TIMEOUT)))
  1667. icnss_pr_err("modem block shutdown timeout\n");
  1668. }
  1669. ret = wlfw_send_modem_shutdown_msg(priv);
  1670. if (ret < 0)
  1671. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1672. ret);
  1673. }
  1674. }
  1675. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1676. {
  1677. switch (code) {
  1678. case QCOM_SSR_BEFORE_POWERUP:
  1679. return "BEFORE_POWERUP";
  1680. case QCOM_SSR_AFTER_POWERUP:
  1681. return "AFTER_POWERUP";
  1682. case QCOM_SSR_BEFORE_SHUTDOWN:
  1683. return "BEFORE_SHUTDOWN";
  1684. case QCOM_SSR_AFTER_SHUTDOWN:
  1685. return "AFTER_SHUTDOWN";
  1686. default:
  1687. return "UNKNOWN";
  1688. }
  1689. };
  1690. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1691. unsigned long code,
  1692. void *data)
  1693. {
  1694. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1695. wpss_early_ssr_nb);
  1696. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1697. icnss_qcom_ssr_notify_state_to_str(code), code);
  1698. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1699. set_bit(ICNSS_FW_DOWN, &priv->state);
  1700. icnss_ignore_fw_timeout(true);
  1701. }
  1702. return NOTIFY_DONE;
  1703. }
  1704. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1705. unsigned long code,
  1706. void *data)
  1707. {
  1708. struct icnss_event_pd_service_down_data *event_data;
  1709. struct qcom_ssr_notify_data *notif = data;
  1710. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1711. wpss_ssr_nb);
  1712. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1713. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1714. icnss_qcom_ssr_notify_state_to_str(code), code);
  1715. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1716. icnss_pr_info("Collecting msa0 segment dump\n");
  1717. icnss_msa0_ramdump(priv);
  1718. goto out;
  1719. }
  1720. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1721. goto out;
  1722. if (priv->wpss_self_recovery_enabled)
  1723. del_timer(&priv->wpss_ssr_timer);
  1724. priv->is_ssr = true;
  1725. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1726. priv->state, notif->crashed);
  1727. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1728. icnss_update_state_send_modem_shutdown(priv, data);
  1729. set_bit(ICNSS_FW_DOWN, &priv->state);
  1730. icnss_ignore_fw_timeout(true);
  1731. if (notif->crashed)
  1732. priv->stats.recovery.root_pd_crash++;
  1733. else
  1734. priv->stats.recovery.root_pd_shutdown++;
  1735. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1736. if (event_data == NULL)
  1737. return notifier_from_errno(-ENOMEM);
  1738. event_data->crashed = notif->crashed;
  1739. fw_down_data.crashed = !!notif->crashed;
  1740. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1741. clear_bit(ICNSS_FW_READY, &priv->state);
  1742. fw_down_data.crashed = !!notif->crashed;
  1743. icnss_call_driver_uevent(priv,
  1744. ICNSS_UEVENT_FW_DOWN,
  1745. &fw_down_data);
  1746. }
  1747. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1748. ICNSS_EVENT_SYNC, event_data);
  1749. if (notif->crashed)
  1750. mod_timer(&priv->recovery_timer,
  1751. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1752. out:
  1753. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1754. return NOTIFY_OK;
  1755. }
  1756. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1757. unsigned long code,
  1758. void *data)
  1759. {
  1760. struct icnss_event_pd_service_down_data *event_data;
  1761. struct qcom_ssr_notify_data *notif = data;
  1762. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1763. modem_ssr_nb);
  1764. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1765. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1766. icnss_qcom_ssr_notify_state_to_str(code), code);
  1767. switch (code) {
  1768. case QCOM_SSR_BEFORE_SHUTDOWN:
  1769. if (!notif->crashed &&
  1770. priv->low_power_support) { /* Hibernate */
  1771. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1772. icnss_driver_event_post(
  1773. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1774. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1775. set_bit(ICNSS_LOW_POWER, &priv->state);
  1776. }
  1777. break;
  1778. case QCOM_SSR_AFTER_SHUTDOWN:
  1779. /* Collect ramdump only when there was a crash. */
  1780. if (notif->crashed) {
  1781. icnss_pr_info("Collecting msa0 segment dump\n");
  1782. icnss_msa0_ramdump(priv);
  1783. }
  1784. if (test_bit(ICNSS_LOW_POWER, &priv->state) &&
  1785. priv->low_power_support)
  1786. clear_bit(ICNSS_LOW_POWER, &priv->state);
  1787. goto out;
  1788. default:
  1789. goto out;
  1790. }
  1791. priv->is_ssr = true;
  1792. if (notif->crashed) {
  1793. priv->stats.recovery.root_pd_crash++;
  1794. priv->root_pd_shutdown = false;
  1795. } else {
  1796. priv->stats.recovery.root_pd_shutdown++;
  1797. priv->root_pd_shutdown = true;
  1798. }
  1799. icnss_update_state_send_modem_shutdown(priv, data);
  1800. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1801. set_bit(ICNSS_FW_DOWN, &priv->state);
  1802. icnss_ignore_fw_timeout(true);
  1803. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1804. clear_bit(ICNSS_FW_READY, &priv->state);
  1805. fw_down_data.crashed = !!notif->crashed;
  1806. icnss_call_driver_uevent(priv,
  1807. ICNSS_UEVENT_FW_DOWN,
  1808. &fw_down_data);
  1809. }
  1810. goto out;
  1811. }
  1812. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1813. priv->state, notif->crashed);
  1814. set_bit(ICNSS_FW_DOWN, &priv->state);
  1815. icnss_ignore_fw_timeout(true);
  1816. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1817. if (event_data == NULL)
  1818. return notifier_from_errno(-ENOMEM);
  1819. event_data->crashed = notif->crashed;
  1820. fw_down_data.crashed = !!notif->crashed;
  1821. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1822. clear_bit(ICNSS_FW_READY, &priv->state);
  1823. fw_down_data.crashed = !!notif->crashed;
  1824. icnss_call_driver_uevent(priv,
  1825. ICNSS_UEVENT_FW_DOWN,
  1826. &fw_down_data);
  1827. }
  1828. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1829. ICNSS_EVENT_SYNC, event_data);
  1830. if (notif->crashed)
  1831. mod_timer(&priv->recovery_timer,
  1832. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1833. out:
  1834. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1835. return NOTIFY_OK;
  1836. }
  1837. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1838. {
  1839. int ret = 0;
  1840. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1841. priv->wpss_early_notify_handler =
  1842. qcom_register_early_ssr_notifier("wpss",
  1843. &priv->wpss_early_ssr_nb);
  1844. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1845. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1846. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1847. }
  1848. return ret;
  1849. }
  1850. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1851. {
  1852. int ret = 0;
  1853. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1854. /*
  1855. * Assign priority of icnss wpss notifier callback over IPA
  1856. * modem notifier callback which is 0
  1857. */
  1858. priv->wpss_ssr_nb.priority = 1;
  1859. priv->wpss_notify_handler =
  1860. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1861. if (IS_ERR(priv->wpss_notify_handler)) {
  1862. ret = PTR_ERR(priv->wpss_notify_handler);
  1863. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1864. }
  1865. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1866. return ret;
  1867. }
  1868. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1869. unsigned long code,
  1870. void *data)
  1871. {
  1872. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1873. slate_ssr_nb);
  1874. int ret = 0;
  1875. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1876. if (code == QCOM_SSR_AFTER_POWERUP) {
  1877. set_bit(ICNSS_SLATE_UP, &priv->state);
  1878. complete(&priv->slate_boot_complete);
  1879. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1880. priv->state);
  1881. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1882. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1883. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1884. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1885. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1886. priv->state);
  1887. goto skip_pdr;
  1888. }
  1889. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1890. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1891. if (ret < 0) {
  1892. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1893. ret, priv->state);
  1894. goto skip_pdr;
  1895. }
  1896. }
  1897. skip_pdr:
  1898. return NOTIFY_OK;
  1899. }
  1900. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  1901. {
  1902. int ret = 0;
  1903. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  1904. priv->slate_notify_handler =
  1905. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  1906. if (IS_ERR(priv->slate_notify_handler)) {
  1907. ret = PTR_ERR(priv->slate_notify_handler);
  1908. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  1909. }
  1910. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  1911. return ret;
  1912. }
  1913. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  1914. {
  1915. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  1916. return 0;
  1917. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  1918. &priv->slate_ssr_nb);
  1919. priv->slate_notify_handler = NULL;
  1920. return 0;
  1921. }
  1922. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1923. {
  1924. int ret = 0;
  1925. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1926. /*
  1927. * Assign priority of icnss modem notifier callback over IPA
  1928. * modem notifier callback which is 0
  1929. */
  1930. priv->modem_ssr_nb.priority = 1;
  1931. priv->modem_notify_handler =
  1932. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  1933. if (IS_ERR(priv->modem_notify_handler)) {
  1934. ret = PTR_ERR(priv->modem_notify_handler);
  1935. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1936. }
  1937. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1938. return ret;
  1939. }
  1940. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1941. {
  1942. if (IS_ERR(priv->wpss_early_notify_handler))
  1943. return;
  1944. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1945. &priv->wpss_early_ssr_nb);
  1946. priv->wpss_early_notify_handler = NULL;
  1947. }
  1948. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1949. {
  1950. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1951. return 0;
  1952. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1953. &priv->wpss_ssr_nb);
  1954. priv->wpss_notify_handler = NULL;
  1955. return 0;
  1956. }
  1957. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1958. {
  1959. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1960. return 0;
  1961. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1962. &priv->modem_ssr_nb);
  1963. priv->modem_notify_handler = NULL;
  1964. return 0;
  1965. }
  1966. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1967. {
  1968. struct icnss_priv *priv = priv_cb;
  1969. struct icnss_event_pd_service_down_data *event_data;
  1970. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1971. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1972. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1973. state, priv->state);
  1974. switch (state) {
  1975. case SERVREG_SERVICE_STATE_DOWN:
  1976. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1977. if (!event_data)
  1978. return;
  1979. event_data->crashed = true;
  1980. if (!priv->is_ssr) {
  1981. set_bit(ICNSS_PDR, &penv->state);
  1982. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1983. cause = ICNSS_HOST_ERROR;
  1984. priv->stats.recovery.pdr_host_error++;
  1985. } else {
  1986. cause = ICNSS_FW_CRASH;
  1987. priv->stats.recovery.pdr_fw_crash++;
  1988. }
  1989. } else if (priv->root_pd_shutdown) {
  1990. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1991. event_data->crashed = false;
  1992. }
  1993. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  1994. priv->state, icnss_pdr_cause[cause]);
  1995. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1996. set_bit(ICNSS_FW_DOWN, &priv->state);
  1997. icnss_ignore_fw_timeout(true);
  1998. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1999. clear_bit(ICNSS_FW_READY, &priv->state);
  2000. fw_down_data.crashed = event_data->crashed;
  2001. icnss_call_driver_uevent(priv,
  2002. ICNSS_UEVENT_FW_DOWN,
  2003. &fw_down_data);
  2004. }
  2005. }
  2006. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2007. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2008. ICNSS_EVENT_SYNC, event_data);
  2009. if (event_data->crashed)
  2010. mod_timer(&priv->recovery_timer,
  2011. jiffies +
  2012. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2013. break;
  2014. case SERVREG_SERVICE_STATE_UP:
  2015. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2016. break;
  2017. default:
  2018. break;
  2019. }
  2020. return;
  2021. }
  2022. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2023. {
  2024. struct pdr_handle *handle = NULL;
  2025. struct pdr_service *service = NULL;
  2026. int err = 0;
  2027. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2028. if (IS_ERR_OR_NULL(handle)) {
  2029. err = PTR_ERR(handle);
  2030. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2031. goto out;
  2032. }
  2033. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2034. if (IS_ERR_OR_NULL(service)) {
  2035. err = PTR_ERR(service);
  2036. icnss_pr_err("Failed to add lookup, err %d", err);
  2037. goto out;
  2038. }
  2039. priv->pdr_handle = handle;
  2040. priv->pdr_service = service;
  2041. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2042. icnss_pr_info("PDR registration happened");
  2043. out:
  2044. return err;
  2045. }
  2046. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2047. {
  2048. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2049. return;
  2050. pdr_handle_release(priv->pdr_handle);
  2051. }
  2052. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2053. {
  2054. int ret = 0;
  2055. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2056. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2057. ret = PTR_ERR(priv->icnss_ramdump_class);
  2058. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2059. return ret;
  2060. }
  2061. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2062. ICNSS_RAMDUMP_NAME);
  2063. if (ret < 0) {
  2064. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2065. goto fail_alloc_major;
  2066. }
  2067. return 0;
  2068. fail_alloc_major:
  2069. class_destroy(priv->icnss_ramdump_class);
  2070. return ret;
  2071. }
  2072. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2073. {
  2074. int ret = 0;
  2075. struct icnss_ramdump_info *ramdump_info;
  2076. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2077. if (!ramdump_info)
  2078. return ERR_PTR(-ENOMEM);
  2079. if (!dev_name) {
  2080. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2081. return NULL;
  2082. }
  2083. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2084. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2085. if (ramdump_info->minor < 0) {
  2086. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2087. ramdump_info->minor);
  2088. ret = -ENODEV;
  2089. goto fail_out_of_minors;
  2090. }
  2091. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2092. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2093. ramdump_info->minor),
  2094. ramdump_info, ramdump_info->name);
  2095. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2096. ret = PTR_ERR(ramdump_info->dev);
  2097. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2098. ramdump_info->name, ret);
  2099. goto fail_device_create;
  2100. }
  2101. return (void *)ramdump_info;
  2102. fail_device_create:
  2103. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2104. fail_out_of_minors:
  2105. kfree(ramdump_info);
  2106. return ERR_PTR(ret);
  2107. }
  2108. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2109. {
  2110. int ret = 0;
  2111. if (!priv || !priv->pdev) {
  2112. icnss_pr_err("Platform priv or pdev is NULL\n");
  2113. return -EINVAL;
  2114. }
  2115. ret = icnss_ramdump_devnode_init(priv);
  2116. if (ret)
  2117. return ret;
  2118. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2119. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2120. icnss_pr_err("Failed to create msa0 dump device!");
  2121. return -ENOMEM;
  2122. }
  2123. if (priv->device_id == WCN6750_DEVICE_ID) {
  2124. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2125. ICNSS_M3_SEGMENT(
  2126. ICNSS_M3_SEGMENT_PHYAREG));
  2127. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2128. !priv->m3_dump_phyareg->dev) {
  2129. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2130. return -ENOMEM;
  2131. }
  2132. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2133. ICNSS_M3_SEGMENT(
  2134. ICNSS_M3_SEGMENT_PHYA));
  2135. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2136. !priv->m3_dump_phydbg->dev) {
  2137. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2138. return -ENOMEM;
  2139. }
  2140. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2141. ICNSS_M3_SEGMENT(
  2142. ICNSS_M3_SEGMENT_WMACREG));
  2143. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2144. !priv->m3_dump_wmac0reg->dev) {
  2145. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2146. return -ENOMEM;
  2147. }
  2148. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2149. ICNSS_M3_SEGMENT(
  2150. ICNSS_M3_SEGMENT_WCSSDBG));
  2151. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2152. !priv->m3_dump_wcssdbg->dev) {
  2153. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2154. return -ENOMEM;
  2155. }
  2156. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2157. ICNSS_M3_SEGMENT(
  2158. ICNSS_M3_SEGMENT_PHYAM3));
  2159. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2160. !priv->m3_dump_phyapdmem->dev) {
  2161. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2162. return -ENOMEM;
  2163. }
  2164. }
  2165. return 0;
  2166. }
  2167. static int icnss_enable_recovery(struct icnss_priv *priv)
  2168. {
  2169. int ret;
  2170. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2171. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2172. return 0;
  2173. }
  2174. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2175. icnss_pr_dbg("SSR disabled through module parameter\n");
  2176. goto enable_pdr;
  2177. }
  2178. ret = icnss_register_ramdump_devices(priv);
  2179. if (ret)
  2180. return ret;
  2181. if (priv->wpss_supported) {
  2182. icnss_wpss_early_ssr_register_notifier(priv);
  2183. icnss_wpss_ssr_register_notifier(priv);
  2184. return 0;
  2185. }
  2186. icnss_modem_ssr_register_notifier(priv);
  2187. if (priv->is_slate_rfa)
  2188. icnss_slate_ssr_register_notifier(priv);
  2189. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2190. icnss_pr_dbg("PDR disabled through module parameter\n");
  2191. return 0;
  2192. }
  2193. enable_pdr:
  2194. ret = icnss_pd_restart_enable(priv);
  2195. if (ret)
  2196. return ret;
  2197. return 0;
  2198. }
  2199. static int icnss_dev_id_match(struct icnss_priv *priv,
  2200. struct device_info *dev_info)
  2201. {
  2202. while (dev_info->device_id) {
  2203. if (priv->device_id == dev_info->device_id)
  2204. return 1;
  2205. dev_info++;
  2206. }
  2207. return 0;
  2208. }
  2209. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2210. unsigned long *thermal_state)
  2211. {
  2212. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2213. *thermal_state = icnss_tcdev->max_thermal_state;
  2214. return 0;
  2215. }
  2216. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2217. unsigned long *thermal_state)
  2218. {
  2219. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2220. *thermal_state = icnss_tcdev->curr_thermal_state;
  2221. return 0;
  2222. }
  2223. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2224. unsigned long thermal_state)
  2225. {
  2226. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2227. struct device *dev = &penv->pdev->dev;
  2228. int ret = 0;
  2229. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2230. return 0;
  2231. if (thermal_state > icnss_tcdev->max_thermal_state)
  2232. return -EINVAL;
  2233. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2234. thermal_state, icnss_tcdev->tcdev_id);
  2235. mutex_lock(&penv->tcdev_lock);
  2236. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2237. icnss_tcdev->tcdev_id);
  2238. if (!ret)
  2239. icnss_tcdev->curr_thermal_state = thermal_state;
  2240. mutex_unlock(&penv->tcdev_lock);
  2241. if (ret) {
  2242. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2243. ret, icnss_tcdev->tcdev_id);
  2244. return ret;
  2245. }
  2246. return 0;
  2247. }
  2248. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2249. .get_max_state = icnss_tcdev_get_max_state,
  2250. .get_cur_state = icnss_tcdev_get_cur_state,
  2251. .set_cur_state = icnss_tcdev_set_cur_state,
  2252. };
  2253. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2254. int tcdev_id)
  2255. {
  2256. struct icnss_priv *priv = dev_get_drvdata(dev);
  2257. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2258. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2259. struct device_node *dev_node;
  2260. int ret = 0;
  2261. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2262. if (!icnss_tcdev)
  2263. return -ENOMEM;
  2264. icnss_tcdev->tcdev_id = tcdev_id;
  2265. icnss_tcdev->max_thermal_state = max_state;
  2266. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2267. "qcom,icnss_cdev%d", tcdev_id);
  2268. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2269. if (!dev_node) {
  2270. icnss_pr_err("Failed to get cooling device node\n");
  2271. return -EINVAL;
  2272. }
  2273. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2274. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2275. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2276. dev_node,
  2277. cdev_node_name, icnss_tcdev,
  2278. &icnss_cooling_ops);
  2279. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2280. ret = PTR_ERR(icnss_tcdev->tcdev);
  2281. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2282. ret, icnss_tcdev->tcdev_id);
  2283. } else {
  2284. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2285. icnss_tcdev->tcdev_id);
  2286. list_add(&icnss_tcdev->tcdev_list,
  2287. &priv->icnss_tcdev_list);
  2288. }
  2289. } else {
  2290. icnss_pr_dbg("Cooling device registration not supported");
  2291. ret = -EOPNOTSUPP;
  2292. }
  2293. return ret;
  2294. }
  2295. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2296. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2297. {
  2298. struct icnss_priv *priv = dev_get_drvdata(dev);
  2299. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2300. while (!list_empty(&priv->icnss_tcdev_list)) {
  2301. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2302. struct icnss_thermal_cdev,
  2303. tcdev_list);
  2304. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2305. list_del(&icnss_tcdev->tcdev_list);
  2306. kfree(icnss_tcdev);
  2307. }
  2308. }
  2309. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2310. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2311. unsigned long *thermal_state,
  2312. int tcdev_id)
  2313. {
  2314. struct icnss_priv *priv = dev_get_drvdata(dev);
  2315. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2316. mutex_lock(&priv->tcdev_lock);
  2317. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2318. if (icnss_tcdev->tcdev_id != tcdev_id)
  2319. continue;
  2320. *thermal_state = icnss_tcdev->curr_thermal_state;
  2321. mutex_unlock(&priv->tcdev_lock);
  2322. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2323. icnss_tcdev->curr_thermal_state, tcdev_id);
  2324. return 0;
  2325. }
  2326. mutex_unlock(&priv->tcdev_lock);
  2327. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2328. return -EINVAL;
  2329. }
  2330. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2331. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2332. int cmd_len, void *cb_ctx,
  2333. int (*cb)(void *ctx, void *event, int event_len))
  2334. {
  2335. struct icnss_priv *priv = icnss_get_plat_priv();
  2336. int ret;
  2337. if (!priv)
  2338. return -ENODEV;
  2339. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2340. return -EINVAL;
  2341. priv->get_info_cb = cb;
  2342. priv->get_info_cb_ctx = cb_ctx;
  2343. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2344. if (ret) {
  2345. priv->get_info_cb = NULL;
  2346. priv->get_info_cb_ctx = NULL;
  2347. }
  2348. return ret;
  2349. }
  2350. EXPORT_SYMBOL(icnss_qmi_send);
  2351. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2352. struct module *owner, const char *mod_name)
  2353. {
  2354. int ret = 0;
  2355. struct icnss_priv *priv = icnss_get_plat_priv();
  2356. if (!priv || !priv->pdev) {
  2357. ret = -ENODEV;
  2358. goto out;
  2359. }
  2360. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2361. if (priv->ops) {
  2362. icnss_pr_err("Driver already registered\n");
  2363. ret = -EEXIST;
  2364. goto out;
  2365. }
  2366. if (!ops->dev_info) {
  2367. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2368. return -EINVAL;
  2369. }
  2370. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2371. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2372. ops->dev_info->name);
  2373. return -ENODEV;
  2374. }
  2375. if (!ops->probe || !ops->remove) {
  2376. ret = -EINVAL;
  2377. goto out;
  2378. }
  2379. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2380. 0, ops);
  2381. if (ret == -EINTR)
  2382. ret = 0;
  2383. out:
  2384. return ret;
  2385. }
  2386. EXPORT_SYMBOL(__icnss_register_driver);
  2387. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2388. {
  2389. int ret;
  2390. struct icnss_priv *priv = icnss_get_plat_priv();
  2391. if (!priv || !priv->pdev) {
  2392. ret = -ENODEV;
  2393. goto out;
  2394. }
  2395. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2396. if (!priv->ops) {
  2397. icnss_pr_err("Driver not registered\n");
  2398. ret = -ENOENT;
  2399. goto out;
  2400. }
  2401. ret = icnss_driver_event_post(priv,
  2402. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2403. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2404. out:
  2405. return ret;
  2406. }
  2407. EXPORT_SYMBOL(icnss_unregister_driver);
  2408. static struct icnss_msi_config msi_config = {
  2409. .total_vectors = 28,
  2410. .total_users = 2,
  2411. .users = (struct icnss_msi_user[]) {
  2412. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2413. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2414. },
  2415. };
  2416. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2417. {
  2418. priv->msi_config = &msi_config;
  2419. return 0;
  2420. }
  2421. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2422. int *num_vectors, u32 *user_base_data,
  2423. u32 *base_vector)
  2424. {
  2425. struct icnss_priv *priv = dev_get_drvdata(dev);
  2426. struct icnss_msi_config *msi_config;
  2427. int idx;
  2428. if (!priv)
  2429. return -ENODEV;
  2430. msi_config = priv->msi_config;
  2431. if (!msi_config) {
  2432. icnss_pr_err("MSI is not supported.\n");
  2433. return -EINVAL;
  2434. }
  2435. for (idx = 0; idx < msi_config->total_users; idx++) {
  2436. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2437. *num_vectors = msi_config->users[idx].num_vectors;
  2438. *user_base_data = msi_config->users[idx].base_vector
  2439. + priv->msi_base_data;
  2440. *base_vector = msi_config->users[idx].base_vector;
  2441. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2442. user_name, *num_vectors, *user_base_data,
  2443. *base_vector);
  2444. return 0;
  2445. }
  2446. }
  2447. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2448. return -EINVAL;
  2449. }
  2450. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2451. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2452. {
  2453. struct icnss_priv *priv = dev_get_drvdata(dev);
  2454. int irq_num;
  2455. irq_num = priv->srng_irqs[vector];
  2456. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2457. irq_num, vector);
  2458. return irq_num;
  2459. }
  2460. EXPORT_SYMBOL(icnss_get_msi_irq);
  2461. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2462. u32 *msi_addr_high)
  2463. {
  2464. struct icnss_priv *priv = dev_get_drvdata(dev);
  2465. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2466. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2467. }
  2468. EXPORT_SYMBOL(icnss_get_msi_address);
  2469. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2470. irqreturn_t (*handler)(int, void *),
  2471. unsigned long flags, const char *name, void *ctx)
  2472. {
  2473. int ret = 0;
  2474. unsigned int irq;
  2475. struct ce_irq_list *irq_entry;
  2476. struct icnss_priv *priv = dev_get_drvdata(dev);
  2477. if (!priv || !priv->pdev) {
  2478. ret = -ENODEV;
  2479. goto out;
  2480. }
  2481. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2482. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2483. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2484. ret = -EINVAL;
  2485. goto out;
  2486. }
  2487. irq = priv->ce_irqs[ce_id];
  2488. irq_entry = &priv->ce_irq_list[ce_id];
  2489. if (irq_entry->handler || irq_entry->irq) {
  2490. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2491. irq, ce_id);
  2492. ret = -EEXIST;
  2493. goto out;
  2494. }
  2495. ret = request_irq(irq, handler, flags, name, ctx);
  2496. if (ret) {
  2497. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2498. irq, ce_id, ret);
  2499. goto out;
  2500. }
  2501. irq_entry->irq = irq;
  2502. irq_entry->handler = handler;
  2503. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2504. penv->stats.ce_irqs[ce_id].request++;
  2505. out:
  2506. return ret;
  2507. }
  2508. EXPORT_SYMBOL(icnss_ce_request_irq);
  2509. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2510. {
  2511. int ret = 0;
  2512. unsigned int irq;
  2513. struct ce_irq_list *irq_entry;
  2514. if (!penv || !penv->pdev || !dev) {
  2515. ret = -ENODEV;
  2516. goto out;
  2517. }
  2518. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2519. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2520. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2521. ret = -EINVAL;
  2522. goto out;
  2523. }
  2524. irq = penv->ce_irqs[ce_id];
  2525. irq_entry = &penv->ce_irq_list[ce_id];
  2526. if (!irq_entry->handler || !irq_entry->irq) {
  2527. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2528. ret = -EEXIST;
  2529. goto out;
  2530. }
  2531. free_irq(irq, ctx);
  2532. irq_entry->irq = 0;
  2533. irq_entry->handler = NULL;
  2534. penv->stats.ce_irqs[ce_id].free++;
  2535. out:
  2536. return ret;
  2537. }
  2538. EXPORT_SYMBOL(icnss_ce_free_irq);
  2539. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2540. {
  2541. unsigned int irq;
  2542. if (!penv || !penv->pdev || !dev) {
  2543. icnss_pr_err("Platform driver not initialized\n");
  2544. return;
  2545. }
  2546. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2547. penv->state);
  2548. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2549. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2550. return;
  2551. }
  2552. penv->stats.ce_irqs[ce_id].enable++;
  2553. irq = penv->ce_irqs[ce_id];
  2554. enable_irq(irq);
  2555. }
  2556. EXPORT_SYMBOL(icnss_enable_irq);
  2557. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2558. {
  2559. unsigned int irq;
  2560. if (!penv || !penv->pdev || !dev) {
  2561. icnss_pr_err("Platform driver not initialized\n");
  2562. return;
  2563. }
  2564. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2565. penv->state);
  2566. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2567. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2568. ce_id);
  2569. return;
  2570. }
  2571. irq = penv->ce_irqs[ce_id];
  2572. disable_irq(irq);
  2573. penv->stats.ce_irqs[ce_id].disable++;
  2574. }
  2575. EXPORT_SYMBOL(icnss_disable_irq);
  2576. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2577. {
  2578. char *fw_build_timestamp = NULL;
  2579. struct icnss_priv *priv = dev_get_drvdata(dev);
  2580. if (!priv) {
  2581. icnss_pr_err("Platform driver not initialized\n");
  2582. return -EINVAL;
  2583. }
  2584. info->v_addr = priv->mem_base_va;
  2585. info->p_addr = priv->mem_base_pa;
  2586. info->chip_id = priv->chip_info.chip_id;
  2587. info->chip_family = priv->chip_info.chip_family;
  2588. info->board_id = priv->board_id;
  2589. info->soc_id = priv->soc_id;
  2590. info->fw_version = priv->fw_version_info.fw_version;
  2591. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2592. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2593. strlcpy(info->fw_build_timestamp,
  2594. priv->fw_version_info.fw_build_timestamp,
  2595. WLFW_MAX_TIMESTAMP_LEN + 1);
  2596. strlcpy(info->fw_build_id, priv->fw_build_id,
  2597. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2598. return 0;
  2599. }
  2600. EXPORT_SYMBOL(icnss_get_soc_info);
  2601. int icnss_get_mhi_state(struct device *dev)
  2602. {
  2603. struct icnss_priv *priv = dev_get_drvdata(dev);
  2604. if (!priv) {
  2605. icnss_pr_err("Platform driver not initialized\n");
  2606. return -EINVAL;
  2607. }
  2608. if (!priv->mhi_state_info_va)
  2609. return -ENOMEM;
  2610. return ioread32(priv->mhi_state_info_va);
  2611. }
  2612. EXPORT_SYMBOL(icnss_get_mhi_state);
  2613. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2614. {
  2615. int ret;
  2616. struct icnss_priv *priv;
  2617. if (!dev)
  2618. return -ENODEV;
  2619. priv = dev_get_drvdata(dev);
  2620. if (!priv) {
  2621. icnss_pr_err("Platform driver not initialized\n");
  2622. return -EINVAL;
  2623. }
  2624. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2625. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2626. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2627. priv->state);
  2628. return -EINVAL;
  2629. }
  2630. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2631. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2632. if (ret)
  2633. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2634. ret, fw_log_mode);
  2635. return ret;
  2636. }
  2637. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2638. int icnss_force_wake_request(struct device *dev)
  2639. {
  2640. struct icnss_priv *priv;
  2641. if (!dev)
  2642. return -ENODEV;
  2643. priv = dev_get_drvdata(dev);
  2644. if (!priv) {
  2645. icnss_pr_err("Platform driver not initialized\n");
  2646. return -EINVAL;
  2647. }
  2648. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2649. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2650. atomic_read(&priv->soc_wake_ref_count));
  2651. return 0;
  2652. }
  2653. icnss_pr_soc_wake("Calling SOC Wake request");
  2654. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2655. 0, NULL);
  2656. return 0;
  2657. }
  2658. EXPORT_SYMBOL(icnss_force_wake_request);
  2659. int icnss_force_wake_release(struct device *dev)
  2660. {
  2661. struct icnss_priv *priv;
  2662. if (!dev)
  2663. return -ENODEV;
  2664. priv = dev_get_drvdata(dev);
  2665. if (!priv) {
  2666. icnss_pr_err("Platform driver not initialized\n");
  2667. return -EINVAL;
  2668. }
  2669. icnss_pr_soc_wake("Calling SOC Wake response");
  2670. if (atomic_read(&priv->soc_wake_ref_count) &&
  2671. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2672. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2673. atomic_read(&priv->soc_wake_ref_count));
  2674. return 0;
  2675. }
  2676. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2677. 0, NULL);
  2678. return 0;
  2679. }
  2680. EXPORT_SYMBOL(icnss_force_wake_release);
  2681. int icnss_is_device_awake(struct device *dev)
  2682. {
  2683. struct icnss_priv *priv = dev_get_drvdata(dev);
  2684. if (!priv) {
  2685. icnss_pr_err("Platform driver not initialized\n");
  2686. return -EINVAL;
  2687. }
  2688. return atomic_read(&priv->soc_wake_ref_count);
  2689. }
  2690. EXPORT_SYMBOL(icnss_is_device_awake);
  2691. int icnss_is_pci_ep_awake(struct device *dev)
  2692. {
  2693. struct icnss_priv *priv = dev_get_drvdata(dev);
  2694. if (!priv) {
  2695. icnss_pr_err("Platform driver not initialized\n");
  2696. return -EINVAL;
  2697. }
  2698. if (!priv->mhi_state_info_va)
  2699. return -ENOMEM;
  2700. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2701. }
  2702. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2703. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2704. uint32_t mem_type, uint32_t data_len,
  2705. uint8_t *output)
  2706. {
  2707. int ret = 0;
  2708. struct icnss_priv *priv = dev_get_drvdata(dev);
  2709. if (priv->magic != ICNSS_MAGIC) {
  2710. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2711. dev, priv, priv->magic);
  2712. return -EINVAL;
  2713. }
  2714. if (!output || data_len == 0
  2715. || data_len > WLFW_MAX_DATA_SIZE) {
  2716. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2717. output, data_len);
  2718. ret = -EINVAL;
  2719. goto out;
  2720. }
  2721. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2722. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2723. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2724. priv->state);
  2725. ret = -EINVAL;
  2726. goto out;
  2727. }
  2728. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2729. data_len, output);
  2730. out:
  2731. return ret;
  2732. }
  2733. EXPORT_SYMBOL(icnss_athdiag_read);
  2734. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2735. uint32_t mem_type, uint32_t data_len,
  2736. uint8_t *input)
  2737. {
  2738. int ret = 0;
  2739. struct icnss_priv *priv = dev_get_drvdata(dev);
  2740. if (priv->magic != ICNSS_MAGIC) {
  2741. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2742. dev, priv, priv->magic);
  2743. return -EINVAL;
  2744. }
  2745. if (!input || data_len == 0
  2746. || data_len > WLFW_MAX_DATA_SIZE) {
  2747. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2748. input, data_len);
  2749. ret = -EINVAL;
  2750. goto out;
  2751. }
  2752. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2753. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2754. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2755. priv->state);
  2756. ret = -EINVAL;
  2757. goto out;
  2758. }
  2759. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2760. data_len, input);
  2761. out:
  2762. return ret;
  2763. }
  2764. EXPORT_SYMBOL(icnss_athdiag_write);
  2765. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2766. enum icnss_driver_mode mode,
  2767. const char *host_version)
  2768. {
  2769. struct icnss_priv *priv = dev_get_drvdata(dev);
  2770. int temp = 0;
  2771. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2772. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2773. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2774. priv->state);
  2775. return -EINVAL;
  2776. }
  2777. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2778. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2779. priv->state);
  2780. return -EINVAL;
  2781. }
  2782. if (priv->wpss_supported &&
  2783. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2784. icnss_setup_dms_mac(priv);
  2785. if (priv->device_id == WCN6750_DEVICE_ID) {
  2786. if (!icnss_get_temperature(priv, &temp)) {
  2787. icnss_pr_dbg("Temperature: %d\n", temp);
  2788. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2789. icnss_set_wlan_en_delay(priv);
  2790. }
  2791. }
  2792. return icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2793. }
  2794. EXPORT_SYMBOL(icnss_wlan_enable);
  2795. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2796. {
  2797. struct icnss_priv *priv = dev_get_drvdata(dev);
  2798. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2799. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2800. priv->state);
  2801. return 0;
  2802. }
  2803. return icnss_send_wlan_disable_to_fw(priv);
  2804. }
  2805. EXPORT_SYMBOL(icnss_wlan_disable);
  2806. bool icnss_is_qmi_disable(struct device *dev)
  2807. {
  2808. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2809. }
  2810. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2811. int icnss_get_ce_id(struct device *dev, int irq)
  2812. {
  2813. int i;
  2814. if (!penv || !penv->pdev || !dev)
  2815. return -ENODEV;
  2816. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2817. if (penv->ce_irqs[i] == irq)
  2818. return i;
  2819. }
  2820. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2821. return -EINVAL;
  2822. }
  2823. EXPORT_SYMBOL(icnss_get_ce_id);
  2824. int icnss_get_irq(struct device *dev, int ce_id)
  2825. {
  2826. int irq;
  2827. if (!penv || !penv->pdev || !dev)
  2828. return -ENODEV;
  2829. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2830. return -EINVAL;
  2831. irq = penv->ce_irqs[ce_id];
  2832. return irq;
  2833. }
  2834. EXPORT_SYMBOL(icnss_get_irq);
  2835. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2836. {
  2837. struct icnss_priv *priv = dev_get_drvdata(dev);
  2838. if (!priv) {
  2839. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2840. return NULL;
  2841. }
  2842. return priv->iommu_domain;
  2843. }
  2844. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2845. int icnss_smmu_map(struct device *dev,
  2846. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2847. {
  2848. struct icnss_priv *priv = dev_get_drvdata(dev);
  2849. int flag = IOMMU_READ | IOMMU_WRITE;
  2850. bool dma_coherent = false;
  2851. unsigned long iova;
  2852. int prop_len = 0;
  2853. size_t len;
  2854. int ret = 0;
  2855. if (!priv) {
  2856. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2857. dev, priv);
  2858. return -EINVAL;
  2859. }
  2860. if (!iova_addr) {
  2861. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2862. &paddr, size);
  2863. return -EINVAL;
  2864. }
  2865. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2866. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2867. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2868. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2869. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2870. iova,
  2871. &priv->smmu_iova_ipa_start,
  2872. priv->smmu_iova_ipa_len);
  2873. return -ENOMEM;
  2874. }
  2875. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2876. icnss_pr_dbg("dma-coherent is %s\n",
  2877. dma_coherent ? "enabled" : "disabled");
  2878. if (dma_coherent)
  2879. flag |= IOMMU_CACHE;
  2880. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2881. ret = iommu_map(priv->iommu_domain, iova,
  2882. rounddown(paddr, PAGE_SIZE), len,
  2883. flag);
  2884. if (ret) {
  2885. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2886. return ret;
  2887. }
  2888. priv->smmu_iova_ipa_current = iova + len;
  2889. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2890. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2891. return 0;
  2892. }
  2893. EXPORT_SYMBOL(icnss_smmu_map);
  2894. int icnss_smmu_unmap(struct device *dev,
  2895. uint32_t iova_addr, size_t size)
  2896. {
  2897. struct icnss_priv *priv = dev_get_drvdata(dev);
  2898. unsigned long iova;
  2899. size_t len, unmapped_len;
  2900. if (!priv) {
  2901. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2902. dev, priv);
  2903. return -EINVAL;
  2904. }
  2905. if (!iova_addr) {
  2906. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2907. size);
  2908. return -EINVAL;
  2909. }
  2910. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2911. PAGE_SIZE);
  2912. iova = rounddown(iova_addr, PAGE_SIZE);
  2913. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2914. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2915. iova,
  2916. &priv->smmu_iova_ipa_start,
  2917. priv->smmu_iova_ipa_len);
  2918. return -ENOMEM;
  2919. }
  2920. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2921. iova, len);
  2922. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2923. if (unmapped_len != len) {
  2924. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2925. return -EINVAL;
  2926. }
  2927. priv->smmu_iova_ipa_current = iova;
  2928. return 0;
  2929. }
  2930. EXPORT_SYMBOL(icnss_smmu_unmap);
  2931. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2932. {
  2933. return socinfo_get_serial_number();
  2934. }
  2935. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2936. int icnss_trigger_recovery(struct device *dev)
  2937. {
  2938. int ret = 0;
  2939. struct icnss_priv *priv = dev_get_drvdata(dev);
  2940. if (priv->magic != ICNSS_MAGIC) {
  2941. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2942. ret = -EINVAL;
  2943. goto out;
  2944. }
  2945. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2946. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2947. priv->state);
  2948. ret = -EPERM;
  2949. goto out;
  2950. }
  2951. if (priv->wpss_supported) {
  2952. icnss_pr_vdbg("Initiate Root PD restart");
  2953. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2954. ICNSS_SMP2P_OUT_POWER_SAVE);
  2955. if (!ret)
  2956. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2957. return ret;
  2958. }
  2959. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2960. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2961. priv->state);
  2962. ret = -EOPNOTSUPP;
  2963. goto out;
  2964. }
  2965. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2966. priv->state);
  2967. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2968. if (!ret)
  2969. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2970. out:
  2971. return ret;
  2972. }
  2973. EXPORT_SYMBOL(icnss_trigger_recovery);
  2974. int icnss_idle_shutdown(struct device *dev)
  2975. {
  2976. struct icnss_priv *priv = dev_get_drvdata(dev);
  2977. if (!priv) {
  2978. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2979. return -EINVAL;
  2980. }
  2981. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2982. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2983. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  2984. return -EBUSY;
  2985. }
  2986. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  2987. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2988. }
  2989. EXPORT_SYMBOL(icnss_idle_shutdown);
  2990. int icnss_idle_restart(struct device *dev)
  2991. {
  2992. struct icnss_priv *priv = dev_get_drvdata(dev);
  2993. if (!priv) {
  2994. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2995. return -EINVAL;
  2996. }
  2997. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2998. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2999. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3000. return -EBUSY;
  3001. }
  3002. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3003. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3004. }
  3005. EXPORT_SYMBOL(icnss_idle_restart);
  3006. int icnss_exit_power_save(struct device *dev)
  3007. {
  3008. struct icnss_priv *priv = dev_get_drvdata(dev);
  3009. icnss_pr_vdbg("Calling Exit Power Save\n");
  3010. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3011. !test_bit(ICNSS_MODE_ON, &priv->state))
  3012. return 0;
  3013. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3014. ICNSS_SMP2P_OUT_POWER_SAVE);
  3015. }
  3016. EXPORT_SYMBOL(icnss_exit_power_save);
  3017. int icnss_prevent_l1(struct device *dev)
  3018. {
  3019. struct icnss_priv *priv = dev_get_drvdata(dev);
  3020. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3021. !test_bit(ICNSS_MODE_ON, &priv->state))
  3022. return 0;
  3023. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3024. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3025. }
  3026. EXPORT_SYMBOL(icnss_prevent_l1);
  3027. void icnss_allow_l1(struct device *dev)
  3028. {
  3029. struct icnss_priv *priv = dev_get_drvdata(dev);
  3030. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3031. !test_bit(ICNSS_MODE_ON, &priv->state))
  3032. return;
  3033. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3034. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3035. }
  3036. EXPORT_SYMBOL(icnss_allow_l1);
  3037. void icnss_allow_recursive_recovery(struct device *dev)
  3038. {
  3039. struct icnss_priv *priv = dev_get_drvdata(dev);
  3040. priv->allow_recursive_recovery = true;
  3041. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3042. }
  3043. void icnss_disallow_recursive_recovery(struct device *dev)
  3044. {
  3045. struct icnss_priv *priv = dev_get_drvdata(dev);
  3046. priv->allow_recursive_recovery = false;
  3047. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3048. }
  3049. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3050. {
  3051. struct kobject *icnss_kobject;
  3052. int ret = 0;
  3053. atomic_set(&priv->is_shutdown, false);
  3054. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3055. if (!icnss_kobject) {
  3056. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3057. return -EINVAL;
  3058. }
  3059. priv->icnss_kobject = icnss_kobject;
  3060. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3061. if (ret) {
  3062. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3063. return ret;
  3064. }
  3065. return ret;
  3066. }
  3067. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3068. {
  3069. struct kobject *icnss_kobject;
  3070. icnss_kobject = priv->icnss_kobject;
  3071. if (icnss_kobject)
  3072. kobject_put(icnss_kobject);
  3073. }
  3074. static ssize_t qdss_tr_start_store(struct device *dev,
  3075. struct device_attribute *attr,
  3076. const char *buf, size_t count)
  3077. {
  3078. struct icnss_priv *priv = dev_get_drvdata(dev);
  3079. wlfw_qdss_trace_start(priv);
  3080. icnss_pr_dbg("Received QDSS start command\n");
  3081. return count;
  3082. }
  3083. static ssize_t qdss_tr_stop_store(struct device *dev,
  3084. struct device_attribute *attr,
  3085. const char *user_buf, size_t count)
  3086. {
  3087. struct icnss_priv *priv = dev_get_drvdata(dev);
  3088. u32 option = 0;
  3089. if (sscanf(user_buf, "%du", &option) != 1)
  3090. return -EINVAL;
  3091. wlfw_qdss_trace_stop(priv, option);
  3092. icnss_pr_dbg("Received QDSS stop command\n");
  3093. return count;
  3094. }
  3095. static ssize_t qdss_conf_download_store(struct device *dev,
  3096. struct device_attribute *attr,
  3097. const char *buf, size_t count)
  3098. {
  3099. struct icnss_priv *priv = dev_get_drvdata(dev);
  3100. icnss_wlfw_qdss_dnld_send_sync(priv);
  3101. icnss_pr_dbg("Received QDSS download config command\n");
  3102. return count;
  3103. }
  3104. static ssize_t hw_trc_override_store(struct device *dev,
  3105. struct device_attribute *attr,
  3106. const char *buf, size_t count)
  3107. {
  3108. struct icnss_priv *priv = dev_get_drvdata(dev);
  3109. int tmp = 0;
  3110. if (sscanf(buf, "%du", &tmp) != 1)
  3111. return -EINVAL;
  3112. priv->hw_trc_override = tmp;
  3113. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3114. return count;
  3115. }
  3116. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3117. {
  3118. struct icnss_priv *priv = icnss_get_plat_priv();
  3119. phandle rproc_phandle;
  3120. int ret;
  3121. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3122. &rproc_phandle)) {
  3123. icnss_pr_err("error reading rproc phandle\n");
  3124. return;
  3125. }
  3126. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3127. if (IS_ERR_OR_NULL(priv->rproc)) {
  3128. icnss_pr_err("rproc not found");
  3129. return;
  3130. }
  3131. ret = rproc_boot(priv->rproc);
  3132. if (ret) {
  3133. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3134. rproc_put(priv->rproc);
  3135. }
  3136. }
  3137. static ssize_t wpss_boot_store(struct device *dev,
  3138. struct device_attribute *attr,
  3139. const char *buf, size_t count)
  3140. {
  3141. struct icnss_priv *priv = dev_get_drvdata(dev);
  3142. int wpss_rproc = 0;
  3143. if (!priv->wpss_supported)
  3144. return count;
  3145. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3146. icnss_pr_err("Failed to read wpss rproc info");
  3147. return -EINVAL;
  3148. }
  3149. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3150. if (wpss_rproc == 1)
  3151. schedule_work(&wpss_loader);
  3152. else if (wpss_rproc == 0)
  3153. icnss_wpss_unload(priv);
  3154. return count;
  3155. }
  3156. static ssize_t wlan_en_delay_store(struct device *dev,
  3157. struct device_attribute *attr,
  3158. const char *buf, size_t count)
  3159. {
  3160. struct icnss_priv *priv = dev_get_drvdata(dev);
  3161. uint32_t wlan_en_delay = 0;
  3162. if (priv->device_id != WCN6750_DEVICE_ID)
  3163. return count;
  3164. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3165. icnss_pr_err("Failed to read wlan_en_delay");
  3166. return -EINVAL;
  3167. }
  3168. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3169. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3170. return count;
  3171. }
  3172. static DEVICE_ATTR_WO(qdss_tr_start);
  3173. static DEVICE_ATTR_WO(qdss_tr_stop);
  3174. static DEVICE_ATTR_WO(qdss_conf_download);
  3175. static DEVICE_ATTR_WO(hw_trc_override);
  3176. static DEVICE_ATTR_WO(wpss_boot);
  3177. static DEVICE_ATTR_WO(wlan_en_delay);
  3178. static struct attribute *icnss_attrs[] = {
  3179. &dev_attr_qdss_tr_start.attr,
  3180. &dev_attr_qdss_tr_stop.attr,
  3181. &dev_attr_qdss_conf_download.attr,
  3182. &dev_attr_hw_trc_override.attr,
  3183. &dev_attr_wpss_boot.attr,
  3184. &dev_attr_wlan_en_delay.attr,
  3185. NULL,
  3186. };
  3187. static struct attribute_group icnss_attr_group = {
  3188. .attrs = icnss_attrs,
  3189. };
  3190. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3191. {
  3192. struct device *dev = &priv->pdev->dev;
  3193. int ret;
  3194. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3195. if (ret) {
  3196. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3197. ret);
  3198. goto out;
  3199. }
  3200. return 0;
  3201. out:
  3202. return ret;
  3203. }
  3204. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3205. {
  3206. sysfs_remove_link(kernel_kobj, "icnss");
  3207. }
  3208. static int icnss_sysfs_create(struct icnss_priv *priv)
  3209. {
  3210. int ret = 0;
  3211. ret = devm_device_add_group(&priv->pdev->dev,
  3212. &icnss_attr_group);
  3213. if (ret) {
  3214. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3215. ret);
  3216. goto out;
  3217. }
  3218. icnss_create_sysfs_link(priv);
  3219. ret = icnss_create_shutdown_sysfs(priv);
  3220. if (ret)
  3221. goto remove_icnss_group;
  3222. return 0;
  3223. remove_icnss_group:
  3224. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3225. out:
  3226. return ret;
  3227. }
  3228. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3229. {
  3230. icnss_destroy_shutdown_sysfs(priv);
  3231. icnss_remove_sysfs_link(priv);
  3232. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3233. }
  3234. static int icnss_resource_parse(struct icnss_priv *priv)
  3235. {
  3236. int ret = 0, i = 0;
  3237. struct platform_device *pdev = priv->pdev;
  3238. struct device *dev = &pdev->dev;
  3239. struct resource *res;
  3240. u32 int_prop;
  3241. ret = icnss_get_vreg(priv);
  3242. if (ret) {
  3243. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3244. goto out;
  3245. }
  3246. ret = icnss_get_clk(priv);
  3247. if (ret) {
  3248. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3249. goto put_vreg;
  3250. }
  3251. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3252. ret = icnss_get_psf_info(priv);
  3253. if (ret < 0)
  3254. goto out;
  3255. priv->psf_supported = true;
  3256. }
  3257. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3258. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3259. "membase");
  3260. if (!res) {
  3261. icnss_pr_err("Memory base not found in DT\n");
  3262. ret = -EINVAL;
  3263. goto put_clk;
  3264. }
  3265. priv->mem_base_pa = res->start;
  3266. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3267. resource_size(res));
  3268. if (!priv->mem_base_va) {
  3269. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3270. &priv->mem_base_pa);
  3271. ret = -EINVAL;
  3272. goto put_clk;
  3273. }
  3274. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3275. &priv->mem_base_pa,
  3276. priv->mem_base_va);
  3277. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3278. res = platform_get_resource(priv->pdev,
  3279. IORESOURCE_IRQ, i);
  3280. if (!res) {
  3281. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3282. ret = -ENODEV;
  3283. goto put_clk;
  3284. } else {
  3285. priv->ce_irqs[i] = res->start;
  3286. }
  3287. }
  3288. if (of_property_read_bool(pdev->dev.of_node,
  3289. "qcom,is_low_power")) {
  3290. priv->low_power_support = true;
  3291. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3292. }
  3293. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3294. &priv->rf_subtype) == 0) {
  3295. priv->is_rf_subtype_valid = true;
  3296. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3297. }
  3298. if (of_property_read_bool(pdev->dev.of_node,
  3299. "qcom,is_slate_rfa")) {
  3300. priv->is_slate_rfa = true;
  3301. icnss_pr_err("SLATE rfa is enabled\n");
  3302. }
  3303. } else if (priv->device_id == WCN6750_DEVICE_ID) {
  3304. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3305. "msi_addr");
  3306. if (!res) {
  3307. icnss_pr_err("MSI address not found in DT\n");
  3308. ret = -EINVAL;
  3309. goto put_clk;
  3310. }
  3311. priv->msi_addr_pa = res->start;
  3312. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3313. PAGE_SIZE,
  3314. DMA_FROM_DEVICE, 0);
  3315. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3316. icnss_pr_err("MSI: failed to map msi address\n");
  3317. priv->msi_addr_iova = 0;
  3318. ret = -ENOMEM;
  3319. goto put_clk;
  3320. }
  3321. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3322. &priv->msi_addr_pa,
  3323. priv->msi_addr_iova);
  3324. ret = of_property_read_u32_index(dev->of_node,
  3325. "interrupts",
  3326. 1,
  3327. &int_prop);
  3328. if (ret) {
  3329. icnss_pr_dbg("Read interrupt prop failed");
  3330. goto put_clk;
  3331. }
  3332. priv->msi_base_data = int_prop + 32;
  3333. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3334. priv->msi_base_data, int_prop);
  3335. icnss_get_msi_assignment(priv);
  3336. for (i = 0; i < msi_config.total_vectors; i++) {
  3337. res = platform_get_resource(priv->pdev,
  3338. IORESOURCE_IRQ, i);
  3339. if (!res) {
  3340. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3341. ret = -ENODEV;
  3342. goto put_clk;
  3343. } else {
  3344. priv->srng_irqs[i] = res->start;
  3345. }
  3346. }
  3347. }
  3348. return 0;
  3349. put_clk:
  3350. icnss_put_clk(priv);
  3351. put_vreg:
  3352. icnss_put_vreg(priv);
  3353. out:
  3354. return ret;
  3355. }
  3356. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3357. {
  3358. int ret = 0;
  3359. struct platform_device *pdev = priv->pdev;
  3360. struct device *dev = &pdev->dev;
  3361. struct device_node *np = NULL;
  3362. u64 prop_size = 0;
  3363. const __be32 *addrp = NULL;
  3364. np = of_parse_phandle(dev->of_node,
  3365. "qcom,wlan-msa-fixed-region", 0);
  3366. if (np) {
  3367. addrp = of_get_address(np, 0, &prop_size, NULL);
  3368. if (!addrp) {
  3369. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3370. ret = -EINVAL;
  3371. of_node_put(np);
  3372. goto out;
  3373. }
  3374. priv->msa_pa = of_translate_address(np, addrp);
  3375. if (priv->msa_pa == OF_BAD_ADDR) {
  3376. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3377. ret = -EINVAL;
  3378. of_node_put(np);
  3379. goto out;
  3380. }
  3381. of_node_put(np);
  3382. priv->msa_va = memremap(priv->msa_pa,
  3383. (unsigned long)prop_size, MEMREMAP_WT);
  3384. if (!priv->msa_va) {
  3385. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3386. &priv->msa_pa);
  3387. ret = -EINVAL;
  3388. goto out;
  3389. }
  3390. priv->msa_mem_size = prop_size;
  3391. } else {
  3392. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3393. &priv->msa_mem_size);
  3394. if (ret || priv->msa_mem_size == 0) {
  3395. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3396. priv->msa_mem_size, ret);
  3397. goto out;
  3398. }
  3399. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3400. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3401. if (!priv->msa_va) {
  3402. icnss_pr_err("DMA alloc failed for MSA\n");
  3403. ret = -ENOMEM;
  3404. goto out;
  3405. }
  3406. }
  3407. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3408. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3409. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3410. "qcom,fw-prefix");
  3411. return 0;
  3412. out:
  3413. return ret;
  3414. }
  3415. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3416. struct device *dev, unsigned long iova,
  3417. int flags, void *handler_token)
  3418. {
  3419. struct icnss_priv *priv = handler_token;
  3420. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3421. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3422. if (!priv) {
  3423. icnss_pr_err("priv is NULL\n");
  3424. return -ENODEV;
  3425. }
  3426. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3427. fw_down_data.crashed = true;
  3428. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3429. &fw_down_data);
  3430. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3431. &fw_down_data);
  3432. }
  3433. icnss_trigger_recovery(&priv->pdev->dev);
  3434. /* IOMMU driver requires non-zero return value to print debug info. */
  3435. return -EINVAL;
  3436. }
  3437. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3438. {
  3439. int ret = 0;
  3440. struct platform_device *pdev = priv->pdev;
  3441. struct device *dev = &pdev->dev;
  3442. const char *iommu_dma_type;
  3443. struct resource *res;
  3444. u32 addr_win[2];
  3445. ret = of_property_read_u32_array(dev->of_node,
  3446. "qcom,iommu-dma-addr-pool",
  3447. addr_win,
  3448. ARRAY_SIZE(addr_win));
  3449. if (ret) {
  3450. icnss_pr_err("SMMU IOVA base not found\n");
  3451. } else {
  3452. priv->smmu_iova_start = addr_win[0];
  3453. priv->smmu_iova_len = addr_win[1];
  3454. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3455. &priv->smmu_iova_start,
  3456. priv->smmu_iova_len);
  3457. priv->iommu_domain =
  3458. iommu_get_domain_for_dev(&pdev->dev);
  3459. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3460. &iommu_dma_type);
  3461. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3462. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3463. priv->smmu_s1_enable = true;
  3464. if (priv->device_id == WCN6750_DEVICE_ID)
  3465. iommu_set_fault_handler(priv->iommu_domain,
  3466. icnss_smmu_fault_handler,
  3467. priv);
  3468. }
  3469. res = platform_get_resource_byname(pdev,
  3470. IORESOURCE_MEM,
  3471. "smmu_iova_ipa");
  3472. if (!res) {
  3473. icnss_pr_err("SMMU IOVA IPA not found\n");
  3474. } else {
  3475. priv->smmu_iova_ipa_start = res->start;
  3476. priv->smmu_iova_ipa_current = res->start;
  3477. priv->smmu_iova_ipa_len = resource_size(res);
  3478. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3479. &priv->smmu_iova_ipa_start,
  3480. priv->smmu_iova_ipa_len);
  3481. }
  3482. }
  3483. return 0;
  3484. }
  3485. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3486. {
  3487. if (!priv)
  3488. return -ENODEV;
  3489. if (!priv->smmu_iova_len)
  3490. return -EINVAL;
  3491. *addr = priv->smmu_iova_start;
  3492. *size = priv->smmu_iova_len;
  3493. return 0;
  3494. }
  3495. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3496. {
  3497. if (!priv)
  3498. return -ENODEV;
  3499. if (!priv->smmu_iova_ipa_len)
  3500. return -EINVAL;
  3501. *addr = priv->smmu_iova_ipa_start;
  3502. *size = priv->smmu_iova_ipa_len;
  3503. return 0;
  3504. }
  3505. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3506. char *name)
  3507. {
  3508. if (!priv)
  3509. return;
  3510. if (!priv->use_prefix_path) {
  3511. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3512. return;
  3513. }
  3514. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3515. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3516. ADRASTEA_PATH_PREFIX "%s", name);
  3517. else
  3518. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3519. QCA6750_PATH_PREFIX "%s", name);
  3520. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3521. }
  3522. static const struct platform_device_id icnss_platform_id_table[] = {
  3523. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3524. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3525. { },
  3526. };
  3527. static const struct of_device_id icnss_dt_match[] = {
  3528. {
  3529. .compatible = "qcom,wcn6750",
  3530. .data = (void *)&icnss_platform_id_table[0]},
  3531. {
  3532. .compatible = "qcom,icnss",
  3533. .data = (void *)&icnss_platform_id_table[1]},
  3534. { },
  3535. };
  3536. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3537. static void icnss_init_control_params(struct icnss_priv *priv)
  3538. {
  3539. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3540. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3541. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3542. if (priv->device_id == WCN6750_DEVICE_ID ||
  3543. of_property_read_bool(priv->pdev->dev.of_node,
  3544. "wpss-support-enable"))
  3545. priv->wpss_supported = true;
  3546. if (of_property_read_bool(priv->pdev->dev.of_node,
  3547. "bdf-download-support"))
  3548. priv->bdf_download_support = true;
  3549. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3550. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3551. }
  3552. static void icnss_read_device_configs(struct icnss_priv *priv)
  3553. {
  3554. if (of_property_read_bool(priv->pdev->dev.of_node,
  3555. "wlan-ipa-disabled")) {
  3556. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3557. }
  3558. if (of_property_read_bool(priv->pdev->dev.of_node,
  3559. "qcom,wpss-self-recovery"))
  3560. priv->wpss_self_recovery_enabled = true;
  3561. }
  3562. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3563. {
  3564. pm_runtime_get_sync(&priv->pdev->dev);
  3565. pm_runtime_forbid(&priv->pdev->dev);
  3566. pm_runtime_set_active(&priv->pdev->dev);
  3567. pm_runtime_enable(&priv->pdev->dev);
  3568. }
  3569. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3570. {
  3571. pm_runtime_disable(&priv->pdev->dev);
  3572. pm_runtime_allow(&priv->pdev->dev);
  3573. pm_runtime_put_sync(&priv->pdev->dev);
  3574. }
  3575. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3576. {
  3577. return of_property_read_bool(priv->pdev->dev.of_node,
  3578. "use-nv-mac");
  3579. }
  3580. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3581. {
  3582. struct icnss_subsys_restart_level_data *restart_level_data;
  3583. icnss_pr_info("rproc name: %s recovery disable: %d",
  3584. rproc->name, rproc->recovery_disabled);
  3585. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3586. if (!restart_level_data)
  3587. return;
  3588. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3589. if (rproc->recovery_disabled)
  3590. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3591. else
  3592. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3593. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3594. 0, restart_level_data);
  3595. }
  3596. }
  3597. static int icnss_probe(struct platform_device *pdev)
  3598. {
  3599. int ret = 0;
  3600. struct device *dev = &pdev->dev;
  3601. struct icnss_priv *priv;
  3602. const struct of_device_id *of_id;
  3603. const struct platform_device_id *device_id;
  3604. if (dev_get_drvdata(dev)) {
  3605. icnss_pr_err("Driver is already initialized\n");
  3606. return -EEXIST;
  3607. }
  3608. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3609. if (!of_id || !of_id->data) {
  3610. icnss_pr_err("Failed to find of match device!\n");
  3611. ret = -ENODEV;
  3612. goto out_reset_drvdata;
  3613. }
  3614. device_id = of_id->data;
  3615. icnss_pr_dbg("Platform driver probe\n");
  3616. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3617. if (!priv)
  3618. return -ENOMEM;
  3619. priv->magic = ICNSS_MAGIC;
  3620. dev_set_drvdata(dev, priv);
  3621. priv->pdev = pdev;
  3622. priv->device_id = device_id->driver_data;
  3623. priv->is_chain1_supported = true;
  3624. INIT_LIST_HEAD(&priv->vreg_list);
  3625. INIT_LIST_HEAD(&priv->clk_list);
  3626. icnss_allow_recursive_recovery(dev);
  3627. icnss_init_control_params(priv);
  3628. icnss_read_device_configs(priv);
  3629. ret = icnss_resource_parse(priv);
  3630. if (ret)
  3631. goto out_reset_drvdata;
  3632. ret = icnss_msa_dt_parse(priv);
  3633. if (ret)
  3634. goto out_free_resources;
  3635. ret = icnss_smmu_dt_parse(priv);
  3636. if (ret)
  3637. goto out_free_resources;
  3638. spin_lock_init(&priv->event_lock);
  3639. spin_lock_init(&priv->on_off_lock);
  3640. spin_lock_init(&priv->soc_wake_msg_lock);
  3641. mutex_init(&priv->dev_lock);
  3642. mutex_init(&priv->tcdev_lock);
  3643. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3644. if (!priv->event_wq) {
  3645. icnss_pr_err("Workqueue creation failed\n");
  3646. ret = -EFAULT;
  3647. goto smmu_cleanup;
  3648. }
  3649. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3650. INIT_LIST_HEAD(&priv->event_list);
  3651. ret = icnss_register_fw_service(priv);
  3652. if (ret < 0) {
  3653. icnss_pr_err("fw service registration failed: %d\n", ret);
  3654. goto out_destroy_wq;
  3655. }
  3656. icnss_enable_recovery(priv);
  3657. icnss_debugfs_create(priv);
  3658. icnss_sysfs_create(priv);
  3659. ret = device_init_wakeup(&priv->pdev->dev, true);
  3660. if (ret)
  3661. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3662. ret);
  3663. icnss_set_plat_priv(priv);
  3664. init_completion(&priv->unblock_shutdown);
  3665. if (priv->is_slate_rfa)
  3666. init_completion(&priv->slate_boot_complete);
  3667. if (priv->device_id == WCN6750_DEVICE_ID) {
  3668. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3669. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3670. if (!priv->soc_wake_wq) {
  3671. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3672. ret = -EFAULT;
  3673. goto out_unregister_fw_service;
  3674. }
  3675. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3676. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3677. ret = icnss_genl_init();
  3678. if (ret < 0)
  3679. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3680. init_completion(&priv->smp2p_soc_wake_wait);
  3681. icnss_runtime_pm_init(priv);
  3682. icnss_aop_mbox_init(priv);
  3683. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3684. priv->bdf_download_support = true;
  3685. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3686. }
  3687. if (priv->wpss_supported) {
  3688. ret = icnss_dms_init(priv);
  3689. if (ret)
  3690. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3691. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3692. icnss_pr_dbg("NV MAC feature is %s\n",
  3693. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3694. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3695. }
  3696. timer_setup(&priv->recovery_timer,
  3697. icnss_recovery_timeout_hdlr, 0);
  3698. if (priv->wpss_self_recovery_enabled) {
  3699. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3700. timer_setup(&priv->wpss_ssr_timer,
  3701. icnss_wpss_ssr_timeout_hdlr, 0);
  3702. }
  3703. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3704. icnss_pr_info("Platform driver probed successfully\n");
  3705. return 0;
  3706. out_unregister_fw_service:
  3707. icnss_unregister_fw_service(priv);
  3708. out_destroy_wq:
  3709. destroy_workqueue(priv->event_wq);
  3710. smmu_cleanup:
  3711. priv->iommu_domain = NULL;
  3712. out_free_resources:
  3713. icnss_put_resources(priv);
  3714. out_reset_drvdata:
  3715. dev_set_drvdata(dev, NULL);
  3716. return ret;
  3717. }
  3718. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3719. {
  3720. if (IS_ERR_OR_NULL(ramdump_info))
  3721. return;
  3722. device_unregister(ramdump_info->dev);
  3723. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3724. kfree(ramdump_info);
  3725. }
  3726. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3727. {
  3728. if (priv->batt_psy)
  3729. power_supply_put(penv->batt_psy);
  3730. if (priv->psf_supported) {
  3731. flush_workqueue(priv->soc_update_wq);
  3732. destroy_workqueue(priv->soc_update_wq);
  3733. power_supply_unreg_notifier(&priv->psf_nb);
  3734. }
  3735. }
  3736. static int icnss_remove(struct platform_device *pdev)
  3737. {
  3738. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3739. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3740. del_timer(&priv->recovery_timer);
  3741. if (priv->wpss_self_recovery_enabled)
  3742. del_timer(&priv->wpss_ssr_timer);
  3743. device_init_wakeup(&priv->pdev->dev, false);
  3744. icnss_debugfs_destroy(priv);
  3745. icnss_unregister_power_supply_notifier(penv);
  3746. icnss_sysfs_destroy(priv);
  3747. complete_all(&priv->unblock_shutdown);
  3748. if (priv->is_slate_rfa)
  3749. icnss_slate_ssr_unregister_notifier(priv);
  3750. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3751. if (priv->wpss_supported) {
  3752. icnss_dms_deinit(priv);
  3753. icnss_wpss_early_ssr_unregister_notifier(priv);
  3754. icnss_wpss_ssr_unregister_notifier(priv);
  3755. } else {
  3756. icnss_modem_ssr_unregister_notifier(priv);
  3757. icnss_pdr_unregister_notifier(priv);
  3758. }
  3759. if (priv->device_id == WCN6750_DEVICE_ID) {
  3760. icnss_genl_exit();
  3761. icnss_runtime_pm_deinit(priv);
  3762. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3763. mbox_free_channel(priv->mbox_chan);
  3764. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3765. complete_all(&priv->smp2p_soc_wake_wait);
  3766. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3767. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3768. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3769. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3770. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3771. if (priv->soc_wake_wq)
  3772. destroy_workqueue(priv->soc_wake_wq);
  3773. }
  3774. class_destroy(priv->icnss_ramdump_class);
  3775. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3776. icnss_unregister_fw_service(priv);
  3777. if (priv->event_wq)
  3778. destroy_workqueue(priv->event_wq);
  3779. priv->iommu_domain = NULL;
  3780. icnss_hw_power_off(priv);
  3781. icnss_put_resources(priv);
  3782. dev_set_drvdata(&pdev->dev, NULL);
  3783. return 0;
  3784. }
  3785. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  3786. {
  3787. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  3788. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  3789. ICNSS_ASSERT(0);
  3790. }
  3791. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  3792. {
  3793. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  3794. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  3795. priv->state);
  3796. schedule_work(&wpss_ssr_work);
  3797. }
  3798. #ifdef CONFIG_PM_SLEEP
  3799. static int icnss_pm_suspend(struct device *dev)
  3800. {
  3801. struct icnss_priv *priv = dev_get_drvdata(dev);
  3802. int ret = 0;
  3803. if (priv->magic != ICNSS_MAGIC) {
  3804. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3805. dev, priv, priv->magic);
  3806. return -EINVAL;
  3807. }
  3808. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3809. if (!priv->ops || !priv->ops->pm_suspend ||
  3810. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3811. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3812. return 0;
  3813. ret = priv->ops->pm_suspend(dev);
  3814. if (ret == 0) {
  3815. if (priv->device_id == WCN6750_DEVICE_ID) {
  3816. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3817. !test_bit(ICNSS_MODE_ON, &priv->state))
  3818. return 0;
  3819. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3820. ICNSS_SMP2P_OUT_POWER_SAVE);
  3821. }
  3822. priv->stats.pm_suspend++;
  3823. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3824. } else {
  3825. priv->stats.pm_suspend_err++;
  3826. }
  3827. return ret;
  3828. }
  3829. static int icnss_pm_resume(struct device *dev)
  3830. {
  3831. struct icnss_priv *priv = dev_get_drvdata(dev);
  3832. int ret = 0;
  3833. if (priv->magic != ICNSS_MAGIC) {
  3834. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3835. dev, priv, priv->magic);
  3836. return -EINVAL;
  3837. }
  3838. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3839. if (!priv->ops || !priv->ops->pm_resume ||
  3840. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3841. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3842. goto out;
  3843. ret = priv->ops->pm_resume(dev);
  3844. out:
  3845. if (ret == 0) {
  3846. priv->stats.pm_resume++;
  3847. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3848. } else {
  3849. priv->stats.pm_resume_err++;
  3850. }
  3851. return ret;
  3852. }
  3853. static int icnss_pm_suspend_noirq(struct device *dev)
  3854. {
  3855. struct icnss_priv *priv = dev_get_drvdata(dev);
  3856. int ret = 0;
  3857. if (priv->magic != ICNSS_MAGIC) {
  3858. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3859. dev, priv, priv->magic);
  3860. return -EINVAL;
  3861. }
  3862. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3863. if (!priv->ops || !priv->ops->suspend_noirq ||
  3864. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3865. goto out;
  3866. ret = priv->ops->suspend_noirq(dev);
  3867. out:
  3868. if (ret == 0) {
  3869. priv->stats.pm_suspend_noirq++;
  3870. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3871. } else {
  3872. priv->stats.pm_suspend_noirq_err++;
  3873. }
  3874. return ret;
  3875. }
  3876. static int icnss_pm_resume_noirq(struct device *dev)
  3877. {
  3878. struct icnss_priv *priv = dev_get_drvdata(dev);
  3879. int ret = 0;
  3880. if (priv->magic != ICNSS_MAGIC) {
  3881. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3882. dev, priv, priv->magic);
  3883. return -EINVAL;
  3884. }
  3885. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3886. if (!priv->ops || !priv->ops->resume_noirq ||
  3887. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3888. goto out;
  3889. ret = priv->ops->resume_noirq(dev);
  3890. out:
  3891. if (ret == 0) {
  3892. priv->stats.pm_resume_noirq++;
  3893. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3894. } else {
  3895. priv->stats.pm_resume_noirq_err++;
  3896. }
  3897. return ret;
  3898. }
  3899. static int icnss_pm_runtime_suspend(struct device *dev)
  3900. {
  3901. struct icnss_priv *priv = dev_get_drvdata(dev);
  3902. int ret = 0;
  3903. if (priv->device_id != WCN6750_DEVICE_ID) {
  3904. icnss_pr_err("Ignore runtime suspend:\n");
  3905. goto out;
  3906. }
  3907. if (priv->magic != ICNSS_MAGIC) {
  3908. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3909. dev, priv, priv->magic);
  3910. return -EINVAL;
  3911. }
  3912. if (!priv->ops || !priv->ops->runtime_suspend ||
  3913. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3914. goto out;
  3915. icnss_pr_vdbg("Runtime suspend\n");
  3916. ret = priv->ops->runtime_suspend(dev);
  3917. if (!ret) {
  3918. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3919. !test_bit(ICNSS_MODE_ON, &priv->state))
  3920. return 0;
  3921. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3922. ICNSS_SMP2P_OUT_POWER_SAVE);
  3923. }
  3924. out:
  3925. return ret;
  3926. }
  3927. static int icnss_pm_runtime_resume(struct device *dev)
  3928. {
  3929. struct icnss_priv *priv = dev_get_drvdata(dev);
  3930. int ret = 0;
  3931. if (priv->device_id != WCN6750_DEVICE_ID) {
  3932. icnss_pr_err("Ignore runtime resume:\n");
  3933. goto out;
  3934. }
  3935. if (priv->magic != ICNSS_MAGIC) {
  3936. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3937. dev, priv, priv->magic);
  3938. return -EINVAL;
  3939. }
  3940. if (!priv->ops || !priv->ops->runtime_resume ||
  3941. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3942. goto out;
  3943. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3944. ret = priv->ops->runtime_resume(dev);
  3945. out:
  3946. return ret;
  3947. }
  3948. static int icnss_pm_runtime_idle(struct device *dev)
  3949. {
  3950. struct icnss_priv *priv = dev_get_drvdata(dev);
  3951. if (priv->device_id != WCN6750_DEVICE_ID) {
  3952. icnss_pr_err("Ignore runtime idle:\n");
  3953. goto out;
  3954. }
  3955. icnss_pr_vdbg("Runtime idle\n");
  3956. pm_request_autosuspend(dev);
  3957. out:
  3958. return -EBUSY;
  3959. }
  3960. #endif
  3961. static const struct dev_pm_ops icnss_pm_ops = {
  3962. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3963. icnss_pm_resume)
  3964. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  3965. icnss_pm_resume_noirq)
  3966. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  3967. icnss_pm_runtime_idle)
  3968. };
  3969. static struct platform_driver icnss_driver = {
  3970. .probe = icnss_probe,
  3971. .remove = icnss_remove,
  3972. .driver = {
  3973. .name = "icnss2",
  3974. .pm = &icnss_pm_ops,
  3975. .of_match_table = icnss_dt_match,
  3976. },
  3977. };
  3978. static int __init icnss_initialize(void)
  3979. {
  3980. icnss_debug_init();
  3981. return platform_driver_register(&icnss_driver);
  3982. }
  3983. static void __exit icnss_exit(void)
  3984. {
  3985. platform_driver_unregister(&icnss_driver);
  3986. icnss_debug_deinit();
  3987. }
  3988. module_init(icnss_initialize);
  3989. module_exit(icnss_exit);
  3990. MODULE_LICENSE("GPL v2");
  3991. MODULE_DESCRIPTION("iWCN CORE platform driver");