rx_mpdu_end.h 6.7 KB

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  1. /*
  2. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _RX_MPDU_END_H_
  19. #define _RX_MPDU_END_H_
  20. #if !defined(__ASSEMBLER__)
  21. #endif
  22. #define NUM_OF_DWORDS_RX_MPDU_END 2
  23. struct rx_mpdu_end {
  24. uint32_t rxpcu_mpdu_filter_in_category : 2,
  25. sw_frame_group_id : 7,
  26. reserved_0 : 7,
  27. phy_ppdu_id : 16;
  28. uint32_t reserved_1a : 11,
  29. unsup_ktype_short_frame : 1,
  30. rx_in_tx_decrypt_byp : 1,
  31. overflow_err : 1,
  32. mpdu_length_err : 1,
  33. tkip_mic_err : 1,
  34. decrypt_err : 1,
  35. unencrypted_frame_err : 1,
  36. pn_fields_contain_valid_info : 1,
  37. fcs_err : 1,
  38. msdu_length_err : 1,
  39. rxdma0_destination_ring : 2,
  40. rxdma1_destination_ring : 2,
  41. decrypt_status_code : 3,
  42. rx_bitmap_not_updated : 1,
  43. reserved_1b : 3;
  44. };
  45. #define RX_MPDU_END_0_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET 0x00000000
  46. #define RX_MPDU_END_0_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB 0
  47. #define RX_MPDU_END_0_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK 0x00000003
  48. #define RX_MPDU_END_0_SW_FRAME_GROUP_ID_OFFSET 0x00000000
  49. #define RX_MPDU_END_0_SW_FRAME_GROUP_ID_LSB 2
  50. #define RX_MPDU_END_0_SW_FRAME_GROUP_ID_MASK 0x000001fc
  51. #define RX_MPDU_END_0_RESERVED_0_OFFSET 0x00000000
  52. #define RX_MPDU_END_0_RESERVED_0_LSB 9
  53. #define RX_MPDU_END_0_RESERVED_0_MASK 0x0000fe00
  54. #define RX_MPDU_END_0_PHY_PPDU_ID_OFFSET 0x00000000
  55. #define RX_MPDU_END_0_PHY_PPDU_ID_LSB 16
  56. #define RX_MPDU_END_0_PHY_PPDU_ID_MASK 0xffff0000
  57. #define RX_MPDU_END_1_RESERVED_1A_OFFSET 0x00000004
  58. #define RX_MPDU_END_1_RESERVED_1A_LSB 0
  59. #define RX_MPDU_END_1_RESERVED_1A_MASK 0x000007ff
  60. #define RX_MPDU_END_1_UNSUP_KTYPE_SHORT_FRAME_OFFSET 0x00000004
  61. #define RX_MPDU_END_1_UNSUP_KTYPE_SHORT_FRAME_LSB 11
  62. #define RX_MPDU_END_1_UNSUP_KTYPE_SHORT_FRAME_MASK 0x00000800
  63. #define RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_OFFSET 0x00000004
  64. #define RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_LSB 12
  65. #define RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_MASK 0x00001000
  66. #define RX_MPDU_END_1_OVERFLOW_ERR_OFFSET 0x00000004
  67. #define RX_MPDU_END_1_OVERFLOW_ERR_LSB 13
  68. #define RX_MPDU_END_1_OVERFLOW_ERR_MASK 0x00002000
  69. #define RX_MPDU_END_1_MPDU_LENGTH_ERR_OFFSET 0x00000004
  70. #define RX_MPDU_END_1_MPDU_LENGTH_ERR_LSB 14
  71. #define RX_MPDU_END_1_MPDU_LENGTH_ERR_MASK 0x00004000
  72. #define RX_MPDU_END_1_TKIP_MIC_ERR_OFFSET 0x00000004
  73. #define RX_MPDU_END_1_TKIP_MIC_ERR_LSB 15
  74. #define RX_MPDU_END_1_TKIP_MIC_ERR_MASK 0x00008000
  75. #define RX_MPDU_END_1_DECRYPT_ERR_OFFSET 0x00000004
  76. #define RX_MPDU_END_1_DECRYPT_ERR_LSB 16
  77. #define RX_MPDU_END_1_DECRYPT_ERR_MASK 0x00010000
  78. #define RX_MPDU_END_1_UNENCRYPTED_FRAME_ERR_OFFSET 0x00000004
  79. #define RX_MPDU_END_1_UNENCRYPTED_FRAME_ERR_LSB 17
  80. #define RX_MPDU_END_1_UNENCRYPTED_FRAME_ERR_MASK 0x00020000
  81. #define RX_MPDU_END_1_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000004
  82. #define RX_MPDU_END_1_PN_FIELDS_CONTAIN_VALID_INFO_LSB 18
  83. #define RX_MPDU_END_1_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x00040000
  84. #define RX_MPDU_END_1_FCS_ERR_OFFSET 0x00000004
  85. #define RX_MPDU_END_1_FCS_ERR_LSB 19
  86. #define RX_MPDU_END_1_FCS_ERR_MASK 0x00080000
  87. #define RX_MPDU_END_1_MSDU_LENGTH_ERR_OFFSET 0x00000004
  88. #define RX_MPDU_END_1_MSDU_LENGTH_ERR_LSB 20
  89. #define RX_MPDU_END_1_MSDU_LENGTH_ERR_MASK 0x00100000
  90. #define RX_MPDU_END_1_RXDMA0_DESTINATION_RING_OFFSET 0x00000004
  91. #define RX_MPDU_END_1_RXDMA0_DESTINATION_RING_LSB 21
  92. #define RX_MPDU_END_1_RXDMA0_DESTINATION_RING_MASK 0x00600000
  93. #define RX_MPDU_END_1_RXDMA1_DESTINATION_RING_OFFSET 0x00000004
  94. #define RX_MPDU_END_1_RXDMA1_DESTINATION_RING_LSB 23
  95. #define RX_MPDU_END_1_RXDMA1_DESTINATION_RING_MASK 0x01800000
  96. #define RX_MPDU_END_1_DECRYPT_STATUS_CODE_OFFSET 0x00000004
  97. #define RX_MPDU_END_1_DECRYPT_STATUS_CODE_LSB 25
  98. #define RX_MPDU_END_1_DECRYPT_STATUS_CODE_MASK 0x0e000000
  99. #define RX_MPDU_END_1_RX_BITMAP_NOT_UPDATED_OFFSET 0x00000004
  100. #define RX_MPDU_END_1_RX_BITMAP_NOT_UPDATED_LSB 28
  101. #define RX_MPDU_END_1_RX_BITMAP_NOT_UPDATED_MASK 0x10000000
  102. #define RX_MPDU_END_1_RESERVED_1B_OFFSET 0x00000004
  103. #define RX_MPDU_END_1_RESERVED_1B_LSB 29
  104. #define RX_MPDU_END_1_RESERVED_1B_MASK 0xe0000000
  105. #endif