ce_src_desc.h 4.7 KB

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  1. /*
  2. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _CE_SRC_DESC_H_
  19. #define _CE_SRC_DESC_H_
  20. #if !defined(__ASSEMBLER__)
  21. #endif
  22. #define NUM_OF_DWORDS_CE_SRC_DESC 4
  23. struct ce_src_desc {
  24. uint32_t src_buffer_low : 32;
  25. uint32_t src_buffer_high : 8,
  26. toeplitz_en : 1,
  27. src_swap : 1,
  28. dest_swap : 1,
  29. gather : 1,
  30. ce_res_0 : 4,
  31. length : 16;
  32. uint32_t fw_metadata : 16,
  33. ce_res_1 : 16;
  34. uint32_t ce_res_2 : 20,
  35. ring_id : 8,
  36. looping_count : 4;
  37. };
  38. #define CE_SRC_DESC_0_SRC_BUFFER_LOW_OFFSET 0x00000000
  39. #define CE_SRC_DESC_0_SRC_BUFFER_LOW_LSB 0
  40. #define CE_SRC_DESC_0_SRC_BUFFER_LOW_MASK 0xffffffff
  41. #define CE_SRC_DESC_1_SRC_BUFFER_HIGH_OFFSET 0x00000004
  42. #define CE_SRC_DESC_1_SRC_BUFFER_HIGH_LSB 0
  43. #define CE_SRC_DESC_1_SRC_BUFFER_HIGH_MASK 0x000000ff
  44. #define CE_SRC_DESC_1_TOEPLITZ_EN_OFFSET 0x00000004
  45. #define CE_SRC_DESC_1_TOEPLITZ_EN_LSB 8
  46. #define CE_SRC_DESC_1_TOEPLITZ_EN_MASK 0x00000100
  47. #define CE_SRC_DESC_1_SRC_SWAP_OFFSET 0x00000004
  48. #define CE_SRC_DESC_1_SRC_SWAP_LSB 9
  49. #define CE_SRC_DESC_1_SRC_SWAP_MASK 0x00000200
  50. #define CE_SRC_DESC_1_DEST_SWAP_OFFSET 0x00000004
  51. #define CE_SRC_DESC_1_DEST_SWAP_LSB 10
  52. #define CE_SRC_DESC_1_DEST_SWAP_MASK 0x00000400
  53. #define CE_SRC_DESC_1_GATHER_OFFSET 0x00000004
  54. #define CE_SRC_DESC_1_GATHER_LSB 11
  55. #define CE_SRC_DESC_1_GATHER_MASK 0x00000800
  56. #define CE_SRC_DESC_1_CE_RES_0_OFFSET 0x00000004
  57. #define CE_SRC_DESC_1_CE_RES_0_LSB 12
  58. #define CE_SRC_DESC_1_CE_RES_0_MASK 0x0000f000
  59. #define CE_SRC_DESC_1_LENGTH_OFFSET 0x00000004
  60. #define CE_SRC_DESC_1_LENGTH_LSB 16
  61. #define CE_SRC_DESC_1_LENGTH_MASK 0xffff0000
  62. #define CE_SRC_DESC_2_FW_METADATA_OFFSET 0x00000008
  63. #define CE_SRC_DESC_2_FW_METADATA_LSB 0
  64. #define CE_SRC_DESC_2_FW_METADATA_MASK 0x0000ffff
  65. #define CE_SRC_DESC_2_CE_RES_1_OFFSET 0x00000008
  66. #define CE_SRC_DESC_2_CE_RES_1_LSB 16
  67. #define CE_SRC_DESC_2_CE_RES_1_MASK 0xffff0000
  68. #define CE_SRC_DESC_3_CE_RES_2_OFFSET 0x0000000c
  69. #define CE_SRC_DESC_3_CE_RES_2_LSB 0
  70. #define CE_SRC_DESC_3_CE_RES_2_MASK 0x000fffff
  71. #define CE_SRC_DESC_3_RING_ID_OFFSET 0x0000000c
  72. #define CE_SRC_DESC_3_RING_ID_LSB 20
  73. #define CE_SRC_DESC_3_RING_ID_MASK 0x0ff00000
  74. #define CE_SRC_DESC_3_LOOPING_COUNT_OFFSET 0x0000000c
  75. #define CE_SRC_DESC_3_LOOPING_COUNT_LSB 28
  76. #define CE_SRC_DESC_3_LOOPING_COUNT_MASK 0xf0000000
  77. #endif