rx_msdu_desc_info.h 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361
  1. /*
  2. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _RX_MSDU_DESC_INFO_H_
  17. #define _RX_MSDU_DESC_INFO_H_
  18. #if !defined(__ASSEMBLER__)
  19. #endif
  20. #define NUM_OF_DWORDS_RX_MSDU_DESC_INFO 1
  21. struct rx_msdu_desc_info {
  22. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  23. uint32_t first_msdu_in_mpdu_flag : 1, // [0:0]
  24. last_msdu_in_mpdu_flag : 1, // [1:1]
  25. msdu_continuation : 1, // [2:2]
  26. msdu_length : 14, // [16:3]
  27. msdu_drop : 1, // [17:17]
  28. sa_is_valid : 1, // [18:18]
  29. da_is_valid : 1, // [19:19]
  30. da_is_mcbc : 1, // [20:20]
  31. l3_header_padding_msb : 1, // [21:21]
  32. tcp_udp_chksum_fail : 1, // [22:22]
  33. ip_chksum_fail : 1, // [23:23]
  34. fr_ds : 1, // [24:24]
  35. to_ds : 1, // [25:25]
  36. intra_bss : 1, // [26:26]
  37. dest_chip_id : 2, // [28:27]
  38. decap_format : 2, // [30:29]
  39. dest_chip_pmac_id : 1; // [31:31]
  40. #else
  41. uint32_t dest_chip_pmac_id : 1, // [31:31]
  42. decap_format : 2, // [30:29]
  43. dest_chip_id : 2, // [28:27]
  44. intra_bss : 1, // [26:26]
  45. to_ds : 1, // [25:25]
  46. fr_ds : 1, // [24:24]
  47. ip_chksum_fail : 1, // [23:23]
  48. tcp_udp_chksum_fail : 1, // [22:22]
  49. l3_header_padding_msb : 1, // [21:21]
  50. da_is_mcbc : 1, // [20:20]
  51. da_is_valid : 1, // [19:19]
  52. sa_is_valid : 1, // [18:18]
  53. msdu_drop : 1, // [17:17]
  54. msdu_length : 14, // [16:3]
  55. msdu_continuation : 1, // [2:2]
  56. last_msdu_in_mpdu_flag : 1, // [1:1]
  57. first_msdu_in_mpdu_flag : 1; // [0:0]
  58. #endif
  59. };
  60. /* Description FIRST_MSDU_IN_MPDU_FLAG
  61. Parsed from RX_MSDU_END TLV . In the case MSDU spans over
  62. multiple buffers, this field will be valid in the Last
  63. buffer used by the MSDU
  64. <enum 0 Not_first_msdu> This is not the first MSDU in the
  65. MPDU.
  66. <enum 1 first_msdu> This MSDU is the first one in the MPDU.
  67. <legal all>
  68. */
  69. #define RX_MSDU_DESC_INFO_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000
  70. #define RX_MSDU_DESC_INFO_FIRST_MSDU_IN_MPDU_FLAG_LSB 0
  71. #define RX_MSDU_DESC_INFO_FIRST_MSDU_IN_MPDU_FLAG_MSB 0
  72. #define RX_MSDU_DESC_INFO_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001
  73. /* Description LAST_MSDU_IN_MPDU_FLAG
  74. Consumer: WBM/REO/SW/FW
  75. Producer: RXDMA
  76. Parsed from RX_MSDU_END TLV . In the case MSDU spans over
  77. multiple buffers, this field will be valid in the Last
  78. buffer used by the MSDU
  79. <enum 0 Not_last_msdu> There are more MSDUs linked to this
  80. MSDU that belongs to this MPDU
  81. <enum 1 Last_msdu> this MSDU is the last one in the MPDU.
  82. This setting is only allowed in combination with 'Msdu_continuation'
  83. set to 0. This implies that when an msdu is spread out over
  84. multiple buffers and thus msdu_continuation is set, only
  85. for the very last buffer of the msdu, can the 'last_msdu_in_mpdu_flag'
  86. be set.
  87. When both first_msdu_in_mpdu_flag and last_msdu_in_mpdu_flag
  88. are set, the MPDU that this MSDU belongs to only contains
  89. a single MSDU.
  90. <legal all>
  91. */
  92. #define RX_MSDU_DESC_INFO_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000
  93. #define RX_MSDU_DESC_INFO_LAST_MSDU_IN_MPDU_FLAG_LSB 1
  94. #define RX_MSDU_DESC_INFO_LAST_MSDU_IN_MPDU_FLAG_MSB 1
  95. #define RX_MSDU_DESC_INFO_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002
  96. /* Description MSDU_CONTINUATION
  97. When set, this MSDU buffer was not able to hold the entire
  98. MSDU. The next buffer will therefor contain additional
  99. information related to this MSDU.
  100. <legal all>
  101. */
  102. #define RX_MSDU_DESC_INFO_MSDU_CONTINUATION_OFFSET 0x00000000
  103. #define RX_MSDU_DESC_INFO_MSDU_CONTINUATION_LSB 2
  104. #define RX_MSDU_DESC_INFO_MSDU_CONTINUATION_MSB 2
  105. #define RX_MSDU_DESC_INFO_MSDU_CONTINUATION_MASK 0x00000004
  106. /* Description MSDU_LENGTH
  107. Parsed from RX_MSDU_START TLV . In the case MSDU spans over
  108. multiple buffers, this field will be valid in the First
  109. buffer used by MSDU.
  110. Full MSDU length in bytes after decapsulation.
  111. This field is still valid for MPDU frames without A-MSDU.
  112. It still represents MSDU length after decapsulation
  113. Or in case of RAW MPDUs, it indicates the length of the
  114. entire MPDU (without FCS field)
  115. <legal all>
  116. */
  117. #define RX_MSDU_DESC_INFO_MSDU_LENGTH_OFFSET 0x00000000
  118. #define RX_MSDU_DESC_INFO_MSDU_LENGTH_LSB 3
  119. #define RX_MSDU_DESC_INFO_MSDU_LENGTH_MSB 16
  120. #define RX_MSDU_DESC_INFO_MSDU_LENGTH_MASK 0x0001fff8
  121. /* Description MSDU_DROP
  122. Parsed from RX_MSDU_END TLV . In the case MSDU spans over
  123. multiple buffers, this field will be valid in the Last
  124. buffer used by the MSDU
  125. When set, REO shall drop this MSDU and not forward it to
  126. any other ring...
  127. <legal all>
  128. */
  129. #define RX_MSDU_DESC_INFO_MSDU_DROP_OFFSET 0x00000000
  130. #define RX_MSDU_DESC_INFO_MSDU_DROP_LSB 17
  131. #define RX_MSDU_DESC_INFO_MSDU_DROP_MSB 17
  132. #define RX_MSDU_DESC_INFO_MSDU_DROP_MASK 0x00020000
  133. /* Description SA_IS_VALID
  134. Parsed from RX_MSDU_END TLV . In the case MSDU spans over
  135. multiple buffers, this field will be valid in the Last
  136. buffer used by the MSDU
  137. Indicates that OLE found a valid SA entry for this MSDU
  138. <legal all>
  139. */
  140. #define RX_MSDU_DESC_INFO_SA_IS_VALID_OFFSET 0x00000000
  141. #define RX_MSDU_DESC_INFO_SA_IS_VALID_LSB 18
  142. #define RX_MSDU_DESC_INFO_SA_IS_VALID_MSB 18
  143. #define RX_MSDU_DESC_INFO_SA_IS_VALID_MASK 0x00040000
  144. /* Description DA_IS_VALID
  145. Parsed from RX_MSDU_END TLV . In the case MSDU spans over
  146. multiple buffers, this field will be valid in the Last
  147. buffer used by the MSDU
  148. Indicates that OLE found a valid DA entry for this MSDU
  149. <legal all>
  150. */
  151. #define RX_MSDU_DESC_INFO_DA_IS_VALID_OFFSET 0x00000000
  152. #define RX_MSDU_DESC_INFO_DA_IS_VALID_LSB 19
  153. #define RX_MSDU_DESC_INFO_DA_IS_VALID_MSB 19
  154. #define RX_MSDU_DESC_INFO_DA_IS_VALID_MASK 0x00080000
  155. /* Description DA_IS_MCBC
  156. Field Only valid if "da_is_valid" is set
  157. Indicates the DA address was a Multicast of Broadcast address
  158. for this MSDU
  159. <legal all>
  160. */
  161. #define RX_MSDU_DESC_INFO_DA_IS_MCBC_OFFSET 0x00000000
  162. #define RX_MSDU_DESC_INFO_DA_IS_MCBC_LSB 20
  163. #define RX_MSDU_DESC_INFO_DA_IS_MCBC_MSB 20
  164. #define RX_MSDU_DESC_INFO_DA_IS_MCBC_MASK 0x00100000
  165. /* Description L3_HEADER_PADDING_MSB
  166. Passed on from 'RX_MSDU_END' TLV (only the MSB is reported
  167. as the LSB is always zero)
  168. Number of bytes padded to make sure that the L3 header will
  169. always start of a Dword boundary
  170. <legal all>
  171. */
  172. #define RX_MSDU_DESC_INFO_L3_HEADER_PADDING_MSB_OFFSET 0x00000000
  173. #define RX_MSDU_DESC_INFO_L3_HEADER_PADDING_MSB_LSB 21
  174. #define RX_MSDU_DESC_INFO_L3_HEADER_PADDING_MSB_MSB 21
  175. #define RX_MSDU_DESC_INFO_L3_HEADER_PADDING_MSB_MASK 0x00200000
  176. /* Description TCP_UDP_CHKSUM_FAIL
  177. Passed on from 'RX_ATTENTION' TLV
  178. Indicates that the computed checksum did not match the checksum
  179. in the TCP/UDP header.
  180. <legal all>
  181. */
  182. #define RX_MSDU_DESC_INFO_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000000
  183. #define RX_MSDU_DESC_INFO_TCP_UDP_CHKSUM_FAIL_LSB 22
  184. #define RX_MSDU_DESC_INFO_TCP_UDP_CHKSUM_FAIL_MSB 22
  185. #define RX_MSDU_DESC_INFO_TCP_UDP_CHKSUM_FAIL_MASK 0x00400000
  186. /* Description IP_CHKSUM_FAIL
  187. Passed on from 'RX_ATTENTION' TLV
  188. Indicates that the computed checksum did not match the checksum
  189. in the IP header.
  190. <legal all>
  191. */
  192. #define RX_MSDU_DESC_INFO_IP_CHKSUM_FAIL_OFFSET 0x00000000
  193. #define RX_MSDU_DESC_INFO_IP_CHKSUM_FAIL_LSB 23
  194. #define RX_MSDU_DESC_INFO_IP_CHKSUM_FAIL_MSB 23
  195. #define RX_MSDU_DESC_INFO_IP_CHKSUM_FAIL_MASK 0x00800000
  196. /* Description FR_DS
  197. Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START'
  198. TLV
  199. Set if the 'from DS' bit is set in the frame control.
  200. <legal all>
  201. */
  202. #define RX_MSDU_DESC_INFO_FR_DS_OFFSET 0x00000000
  203. #define RX_MSDU_DESC_INFO_FR_DS_LSB 24
  204. #define RX_MSDU_DESC_INFO_FR_DS_MSB 24
  205. #define RX_MSDU_DESC_INFO_FR_DS_MASK 0x01000000
  206. /* Description TO_DS
  207. Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START'
  208. TLV
  209. Set if the 'to DS' bit is set in the frame control.
  210. <legal all>
  211. */
  212. #define RX_MSDU_DESC_INFO_TO_DS_OFFSET 0x00000000
  213. #define RX_MSDU_DESC_INFO_TO_DS_LSB 25
  214. #define RX_MSDU_DESC_INFO_TO_DS_MSB 25
  215. #define RX_MSDU_DESC_INFO_TO_DS_MASK 0x02000000
  216. /* Description INTRA_BSS
  217. This packet needs intra-BSS routing by SW as the 'vdev_id'
  218. for the destination is the same as the 'vdev_id' (from 'RX_MPDU_PCU_START')
  219. that this MSDU was got in.
  220. <legal all>
  221. */
  222. #define RX_MSDU_DESC_INFO_INTRA_BSS_OFFSET 0x00000000
  223. #define RX_MSDU_DESC_INFO_INTRA_BSS_LSB 26
  224. #define RX_MSDU_DESC_INFO_INTRA_BSS_MSB 26
  225. #define RX_MSDU_DESC_INFO_INTRA_BSS_MASK 0x04000000
  226. /* Description DEST_CHIP_ID
  227. If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY'
  228. to support intra-BSS routing with multi-chip multi-link
  229. operation.
  230. This indicates into which chip's TCL the packet should be
  231. queued.
  232. <legal all>
  233. */
  234. #define RX_MSDU_DESC_INFO_DEST_CHIP_ID_OFFSET 0x00000000
  235. #define RX_MSDU_DESC_INFO_DEST_CHIP_ID_LSB 27
  236. #define RX_MSDU_DESC_INFO_DEST_CHIP_ID_MSB 28
  237. #define RX_MSDU_DESC_INFO_DEST_CHIP_ID_MASK 0x18000000
  238. /* Description DECAP_FORMAT
  239. Indicates the format after decapsulation:
  240. <enum 0 RAW> No encapsulation
  241. <enum 1 Native_WiFi>
  242. <enum 2 Ethernet> Ethernet 2 (DIX) or 802.3 (uses SNAP/LLC)
  243. <enum 3 802_3> Indicate Ethernet
  244. <legal all>
  245. */
  246. #define RX_MSDU_DESC_INFO_DECAP_FORMAT_OFFSET 0x00000000
  247. #define RX_MSDU_DESC_INFO_DECAP_FORMAT_LSB 29
  248. #define RX_MSDU_DESC_INFO_DECAP_FORMAT_MSB 30
  249. #define RX_MSDU_DESC_INFO_DECAP_FORMAT_MASK 0x60000000
  250. /* Description DEST_CHIP_PMAC_ID
  251. If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY'
  252. to support intra-BSS routing with multi-chip multi-link
  253. operation.
  254. This indicates into which link/'vdev' the packet should
  255. be queued in TCL.
  256. <legal all>
  257. */
  258. #define RX_MSDU_DESC_INFO_DEST_CHIP_PMAC_ID_OFFSET 0x00000000
  259. #define RX_MSDU_DESC_INFO_DEST_CHIP_PMAC_ID_LSB 31
  260. #define RX_MSDU_DESC_INFO_DEST_CHIP_PMAC_ID_MSB 31
  261. #define RX_MSDU_DESC_INFO_DEST_CHIP_PMAC_ID_MASK 0x80000000
  262. #endif // RX_MSDU_DESC_INFO