phytx_ppdu_header_info_request.h 3.4 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889
  1. /*
  2. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _PHYTX_PPDU_HEADER_INFO_REQUEST_H_
  17. #define _PHYTX_PPDU_HEADER_INFO_REQUEST_H_
  18. #if !defined(__ASSEMBLER__)
  19. #endif
  20. #define NUM_OF_WORDS_PHYTX_PPDU_HEADER_INFO_REQUEST 2
  21. #define NUM_OF_DWORDS_PHYTX_PPDU_HEADER_INFO_REQUEST 1
  22. struct phytx_ppdu_header_info_request {
  23. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  24. uint16_t request_type : 5, // [4:0]
  25. reserved : 11; // [15:5]
  26. uint16_t tlv32_padding : 16; // [15:0]
  27. #else
  28. uint16_t reserved : 11, // [15:5]
  29. request_type : 5; // [4:0]
  30. uint16_t tlv32_padding : 16; // [15:0]
  31. #endif
  32. };
  33. /* Description REQUEST_TYPE
  34. Reason for the request by PHY
  35. <enum 0 request_L_SIG_B>
  36. <enum 1 request_L_SIG_A>
  37. <enum 2 request_USER_DESC>
  38. <enum 3 request_HT_SIG>
  39. <enum 4 request_VHT_SIG_A>
  40. <enum 5 request_VHT_SIG_B >
  41. <enum 6 request_TX_SERVICE>
  42. <enum 7 request_HE_SIG_A>
  43. <enum 8 request_HE_SIG_B>
  44. <enum 9 request_U_SIG>
  45. <enum 10 request_EHT_SIG>
  46. <legal 0-10>
  47. */
  48. #define PHYTX_PPDU_HEADER_INFO_REQUEST_REQUEST_TYPE_OFFSET 0x00000000
  49. #define PHYTX_PPDU_HEADER_INFO_REQUEST_REQUEST_TYPE_LSB 0
  50. #define PHYTX_PPDU_HEADER_INFO_REQUEST_REQUEST_TYPE_MSB 4
  51. #define PHYTX_PPDU_HEADER_INFO_REQUEST_REQUEST_TYPE_MASK 0x0000001f
  52. /* Description RESERVED
  53. <legal 0>
  54. */
  55. #define PHYTX_PPDU_HEADER_INFO_REQUEST_RESERVED_OFFSET 0x00000000
  56. #define PHYTX_PPDU_HEADER_INFO_REQUEST_RESERVED_LSB 5
  57. #define PHYTX_PPDU_HEADER_INFO_REQUEST_RESERVED_MSB 15
  58. #define PHYTX_PPDU_HEADER_INFO_REQUEST_RESERVED_MASK 0x0000ffe0
  59. /* Description TLV32_PADDING
  60. Automatic WORD padding inserted while converting TLV16 to
  61. TLV32 for 64 bit ARCH
  62. <legal 0>
  63. */
  64. #define PHYTX_PPDU_HEADER_INFO_REQUEST_TLV32_PADDING_OFFSET 0x00000002
  65. #define PHYTX_PPDU_HEADER_INFO_REQUEST_TLV32_PADDING_LSB 0
  66. #define PHYTX_PPDU_HEADER_INFO_REQUEST_TLV32_PADDING_MSB 15
  67. #define PHYTX_PPDU_HEADER_INFO_REQUEST_TLV32_PADDING_MASK 0x0000ffff
  68. #endif // PHYTX_PPDU_HEADER_INFO_REQUEST