tx_msdu_extension.h 27 KB

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  1. /*
  2. * Copyright (c) 2016 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. // $ATH_LICENSE_HW_HDR_C$
  19. //
  20. // DO NOT EDIT! This file is automatically generated
  21. // These definitions are tied to a particular hardware layout
  22. #ifndef _TX_MSDU_EXTENSION_H_
  23. #define _TX_MSDU_EXTENSION_H_
  24. #if !defined(__ASSEMBLER__)
  25. #endif
  26. // ################ START SUMMARY #################
  27. //
  28. // Dword Fields
  29. // 0 tso_enable[0], ipv4_checksum_en[1], udp_over_ipv4_checksum_en[2], udp_over_ipv6_checksum_en[3], tcp_over_ipv4_checksum_en[4], tcp_over_ipv6_checksum_en[5], reserved_0a[6], tcp_flag[15:7], tcp_flag_mask[24:16], reserved_0b[31:25]
  30. // 1 l2_length[15:0], ip_length[31:16]
  31. // 2 tcp_seq_number[31:0]
  32. // 3 ip_identification[15:0], udp_length[31:16]
  33. // 4 checksum_offset[13:0], partial_checksum_en[14], reserved_4a[15], payload_start_offset[29:16], reserved_4b[31:30]
  34. // 5 payload_end_offset[13:0], reserved_5a[15:14], wds[16], reserved_5b[31:17]
  35. // 6 buf0_ptr_31_0[31:0]
  36. // 7 buf0_ptr_39_32[7:0], reserved_7a[15:8], buf0_len[31:16]
  37. // 8 buf1_ptr_31_0[31:0]
  38. // 9 buf1_ptr_39_32[7:0], reserved_9a[15:8], buf1_len[31:16]
  39. // 10 buf2_ptr_31_0[31:0]
  40. // 11 buf2_ptr_39_32[7:0], reserved_11a[15:8], buf2_len[31:16]
  41. // 12 buf3_ptr_31_0[31:0]
  42. // 13 buf3_ptr_39_32[7:0], reserved_13a[15:8], buf3_len[31:16]
  43. // 14 buf4_ptr_31_0[31:0]
  44. // 15 buf4_ptr_39_32[7:0], reserved_15a[15:8], buf4_len[31:16]
  45. // 16 buf5_ptr_31_0[31:0]
  46. // 17 buf5_ptr_39_32[7:0], reserved_17a[15:8], buf5_len[31:16]
  47. //
  48. // ################ END SUMMARY #################
  49. #define NUM_OF_DWORDS_TX_MSDU_EXTENSION 18
  50. struct tx_msdu_extension {
  51. uint32_t tso_enable : 1, //[0]
  52. ipv4_checksum_en : 1, //[1]
  53. udp_over_ipv4_checksum_en : 1, //[2]
  54. udp_over_ipv6_checksum_en : 1, //[3]
  55. tcp_over_ipv4_checksum_en : 1, //[4]
  56. tcp_over_ipv6_checksum_en : 1, //[5]
  57. reserved_0a : 1, //[6]
  58. tcp_flag : 9, //[15:7]
  59. tcp_flag_mask : 9, //[24:16]
  60. reserved_0b : 7; //[31:25]
  61. uint32_t l2_length : 16, //[15:0]
  62. ip_length : 16; //[31:16]
  63. uint32_t tcp_seq_number : 32; //[31:0]
  64. uint32_t ip_identification : 16, //[15:0]
  65. udp_length : 16; //[31:16]
  66. uint32_t checksum_offset : 14, //[13:0]
  67. partial_checksum_en : 1, //[14]
  68. reserved_4a : 1, //[15]
  69. payload_start_offset : 14, //[29:16]
  70. reserved_4b : 2; //[31:30]
  71. uint32_t payload_end_offset : 14, //[13:0]
  72. reserved_5a : 2, //[15:14]
  73. wds : 1, //[16]
  74. reserved_5b : 15; //[31:17]
  75. uint32_t buf0_ptr_31_0 : 32; //[31:0]
  76. uint32_t buf0_ptr_39_32 : 8, //[7:0]
  77. reserved_7a : 8, //[15:8]
  78. buf0_len : 16; //[31:16]
  79. uint32_t buf1_ptr_31_0 : 32; //[31:0]
  80. uint32_t buf1_ptr_39_32 : 8, //[7:0]
  81. reserved_9a : 8, //[15:8]
  82. buf1_len : 16; //[31:16]
  83. uint32_t buf2_ptr_31_0 : 32; //[31:0]
  84. uint32_t buf2_ptr_39_32 : 8, //[7:0]
  85. reserved_11a : 8, //[15:8]
  86. buf2_len : 16; //[31:16]
  87. uint32_t buf3_ptr_31_0 : 32; //[31:0]
  88. uint32_t buf3_ptr_39_32 : 8, //[7:0]
  89. reserved_13a : 8, //[15:8]
  90. buf3_len : 16; //[31:16]
  91. uint32_t buf4_ptr_31_0 : 32; //[31:0]
  92. uint32_t buf4_ptr_39_32 : 8, //[7:0]
  93. reserved_15a : 8, //[15:8]
  94. buf4_len : 16; //[31:16]
  95. uint32_t buf5_ptr_31_0 : 32; //[31:0]
  96. uint32_t buf5_ptr_39_32 : 8, //[7:0]
  97. reserved_17a : 8, //[15:8]
  98. buf5_len : 16; //[31:16]
  99. };
  100. /*
  101. tso_enable
  102. Enable transmit segmentation offload <legal all>
  103. ipv4_checksum_en
  104. Enable IPv4 checksum replacement
  105. udp_over_ipv4_checksum_en
  106. Enable UDP over IPv4 checksum replacement. UDP checksum
  107. over IPv4 is optional for TCP/IP stacks.
  108. udp_over_ipv6_checksum_en
  109. Enable UDP over IPv6 checksum replacement. UDP checksum
  110. over IPv6 is mandatory for TCP/IP stacks.
  111. tcp_over_ipv4_checksum_en
  112. Enable TCP checksum over IPv4 replacement
  113. tcp_over_ipv6_checksum_en
  114. Enable TCP checksum over IPv6 eplacement
  115. reserved_0a
  116. FW will set to 0, MAC will ignore.  <legal 0>
  117. tcp_flag
  118. TCP flags
  119. {NS,CWR,ECE,URG,ACK,PSH, RST ,SYN,FIN}<legal all>
  120. tcp_flag_mask
  121. TCP flag mask. Tcp_flag is inserted into the header
  122. based on the mask, if tso is enabled
  123. reserved_0b
  124. FW will set to 0, MAC will ignore.  <legal 0>
  125. l2_length
  126. L2 length for the msdu, if tso is enabled <legal all>
  127. ip_length
  128. Ip length for the msdu, if tso is enabled <legal all>
  129. tcp_seq_number
  130. Tcp_seq_number for the msdu, if tso is enabled <legal
  131. all>
  132. ip_identification
  133. Ip_identification for the msdu, if tso is enabled <legal
  134. all>
  135. udp_length
  136. TXDMA is copies this field into MSDU START TLV
  137. checksum_offset
  138. The calculated checksum from start offset to end offset
  139. will be added to the checksum at the offset given by this
  140. field<legal all>
  141. partial_checksum_en
  142. Partial Checksum Enable Bit.
  143. <legal 0-1>
  144. reserved_4a
  145. <Legal 0>
  146. payload_start_offset
  147. L4 checksum calculations will start fromt this offset
  148. <Legal all>
  149. reserved_4b
  150. <Legal 0>
  151. payload_end_offset
  152. L4 checksum calculations will end at this offset.
  153. <Legal all>
  154. reserved_5a
  155. <Legal 0>
  156. wds
  157. If set the current packet is 4-address frame. Required
  158. because an aggregate can include some frames with 3 address
  159. format and other frames with 4 address format. Used by the
  160. OLE during encapsulation.
  161. Note: there is also global wds tx control in the
  162. TX_PEER_ENTRY
  163. <legal all>
  164. reserved_5b
  165. <Legal 0>
  166. buf0_ptr_31_0
  167. Lower 32 bits of the first buffer pointer
  168. NOTE: SW/FW manages the 'cookie' info related to this
  169. buffer together with the 'cookie' info for this
  170. MSDU_EXTENSION descriptor
  171. <legal all>
  172. buf0_ptr_39_32
  173. Upper 8 bits of the first buffer pointer <legal all>
  174. reserved_7a
  175. <Legal 0>
  176. buf0_len
  177. Length of the first buffer <legal all>
  178. buf1_ptr_31_0
  179. Lower 32 bits of the second buffer pointer
  180. NOTE: SW/FW manages the 'cookie' info related to this
  181. buffer together with the 'cookie' info for this
  182. MSDU_EXTENSION descriptor
  183. <legal all>
  184. buf1_ptr_39_32
  185. Upper 8 bits of the second buffer pointer <legal all>
  186. reserved_9a
  187. <Legal 0>
  188. buf1_len
  189. Length of the second buffer <legal all>
  190. buf2_ptr_31_0
  191. Lower 32 bits of the third buffer pointer
  192. NOTE: SW/FW manages the 'cookie' info related to this
  193. buffer together with the 'cookie' info for this
  194. MSDU_EXTENSION descriptor
  195. <legal all>
  196. buf2_ptr_39_32
  197. Upper 8 bits of the third buffer pointer <legal all>
  198. reserved_11a
  199. <Legal 0>
  200. buf2_len
  201. Length of the third buffer <legal all>
  202. buf3_ptr_31_0
  203. Lower 32 bits of the fourth buffer pointer
  204. NOTE: SW/FW manages the 'cookie' info related to this
  205. buffer together with the 'cookie' info for this
  206. MSDU_EXTENSION descriptor
  207. <legal all>
  208. buf3_ptr_39_32
  209. Upper 8 bits of the fourth buffer pointer <legal all>
  210. reserved_13a
  211. <Legal 0>
  212. buf3_len
  213. Length of the fourth buffer <legal all>
  214. buf4_ptr_31_0
  215. Lower 32 bits of the fifth buffer pointer
  216. NOTE: SW/FW manages the 'cookie' info related to this
  217. buffer together with the 'cookie' info for this
  218. MSDU_EXTENSION descriptor
  219. <legal all>
  220. buf4_ptr_39_32
  221. Upper 8 bits of the fifth buffer pointer <legal all>
  222. reserved_15a
  223. <Legal 0>
  224. buf4_len
  225. Length of the fifth buffer <legal all>
  226. buf5_ptr_31_0
  227. Lower 32 bits of the sixth buffer pointer
  228. NOTE: SW/FW manages the 'cookie' info related to this
  229. buffer together with the 'cookie' info for this
  230. MSDU_EXTENSION descriptor
  231. <legal all>
  232. buf5_ptr_39_32
  233. Upper 8 bits of the sixth buffer pointer <legal all>
  234. reserved_17a
  235. <Legal 0>
  236. buf5_len
  237. Length of the sixth buffer <legal all>
  238. */
  239. /* Description TX_MSDU_EXTENSION_0_TSO_ENABLE
  240. Enable transmit segmentation offload <legal all>
  241. */
  242. #define TX_MSDU_EXTENSION_0_TSO_ENABLE_OFFSET 0x00000000
  243. #define TX_MSDU_EXTENSION_0_TSO_ENABLE_LSB 0
  244. #define TX_MSDU_EXTENSION_0_TSO_ENABLE_MASK 0x00000001
  245. /* Description TX_MSDU_EXTENSION_0_IPV4_CHECKSUM_EN
  246. Enable IPv4 checksum replacement
  247. */
  248. #define TX_MSDU_EXTENSION_0_IPV4_CHECKSUM_EN_OFFSET 0x00000000
  249. #define TX_MSDU_EXTENSION_0_IPV4_CHECKSUM_EN_LSB 1
  250. #define TX_MSDU_EXTENSION_0_IPV4_CHECKSUM_EN_MASK 0x00000002
  251. /* Description TX_MSDU_EXTENSION_0_UDP_OVER_IPV4_CHECKSUM_EN
  252. Enable UDP over IPv4 checksum replacement. UDP checksum
  253. over IPv4 is optional for TCP/IP stacks.
  254. */
  255. #define TX_MSDU_EXTENSION_0_UDP_OVER_IPV4_CHECKSUM_EN_OFFSET 0x00000000
  256. #define TX_MSDU_EXTENSION_0_UDP_OVER_IPV4_CHECKSUM_EN_LSB 2
  257. #define TX_MSDU_EXTENSION_0_UDP_OVER_IPV4_CHECKSUM_EN_MASK 0x00000004
  258. /* Description TX_MSDU_EXTENSION_0_UDP_OVER_IPV6_CHECKSUM_EN
  259. Enable UDP over IPv6 checksum replacement. UDP checksum
  260. over IPv6 is mandatory for TCP/IP stacks.
  261. */
  262. #define TX_MSDU_EXTENSION_0_UDP_OVER_IPV6_CHECKSUM_EN_OFFSET 0x00000000
  263. #define TX_MSDU_EXTENSION_0_UDP_OVER_IPV6_CHECKSUM_EN_LSB 3
  264. #define TX_MSDU_EXTENSION_0_UDP_OVER_IPV6_CHECKSUM_EN_MASK 0x00000008
  265. /* Description TX_MSDU_EXTENSION_0_TCP_OVER_IPV4_CHECKSUM_EN
  266. Enable TCP checksum over IPv4 replacement
  267. */
  268. #define TX_MSDU_EXTENSION_0_TCP_OVER_IPV4_CHECKSUM_EN_OFFSET 0x00000000
  269. #define TX_MSDU_EXTENSION_0_TCP_OVER_IPV4_CHECKSUM_EN_LSB 4
  270. #define TX_MSDU_EXTENSION_0_TCP_OVER_IPV4_CHECKSUM_EN_MASK 0x00000010
  271. /* Description TX_MSDU_EXTENSION_0_TCP_OVER_IPV6_CHECKSUM_EN
  272. Enable TCP checksum over IPv6 eplacement
  273. */
  274. #define TX_MSDU_EXTENSION_0_TCP_OVER_IPV6_CHECKSUM_EN_OFFSET 0x00000000
  275. #define TX_MSDU_EXTENSION_0_TCP_OVER_IPV6_CHECKSUM_EN_LSB 5
  276. #define TX_MSDU_EXTENSION_0_TCP_OVER_IPV6_CHECKSUM_EN_MASK 0x00000020
  277. /* Description TX_MSDU_EXTENSION_0_RESERVED_0A
  278. FW will set to 0, MAC will ignore.  <legal 0>
  279. */
  280. #define TX_MSDU_EXTENSION_0_RESERVED_0A_OFFSET 0x00000000
  281. #define TX_MSDU_EXTENSION_0_RESERVED_0A_LSB 6
  282. #define TX_MSDU_EXTENSION_0_RESERVED_0A_MASK 0x00000040
  283. /* Description TX_MSDU_EXTENSION_0_TCP_FLAG
  284. TCP flags
  285. {NS,CWR,ECE,URG,ACK,PSH, RST ,SYN,FIN}<legal all>
  286. */
  287. #define TX_MSDU_EXTENSION_0_TCP_FLAG_OFFSET 0x00000000
  288. #define TX_MSDU_EXTENSION_0_TCP_FLAG_LSB 7
  289. #define TX_MSDU_EXTENSION_0_TCP_FLAG_MASK 0x0000ff80
  290. /* Description TX_MSDU_EXTENSION_0_TCP_FLAG_MASK
  291. TCP flag mask. Tcp_flag is inserted into the header
  292. based on the mask, if tso is enabled
  293. */
  294. #define TX_MSDU_EXTENSION_0_TCP_FLAG_MASK_OFFSET 0x00000000
  295. #define TX_MSDU_EXTENSION_0_TCP_FLAG_MASK_LSB 16
  296. #define TX_MSDU_EXTENSION_0_TCP_FLAG_MASK_MASK 0x01ff0000
  297. /* Description TX_MSDU_EXTENSION_0_RESERVED_0B
  298. FW will set to 0, MAC will ignore.  <legal 0>
  299. */
  300. #define TX_MSDU_EXTENSION_0_RESERVED_0B_OFFSET 0x00000000
  301. #define TX_MSDU_EXTENSION_0_RESERVED_0B_LSB 25
  302. #define TX_MSDU_EXTENSION_0_RESERVED_0B_MASK 0xfe000000
  303. /* Description TX_MSDU_EXTENSION_1_L2_LENGTH
  304. L2 length for the msdu, if tso is enabled <legal all>
  305. */
  306. #define TX_MSDU_EXTENSION_1_L2_LENGTH_OFFSET 0x00000004
  307. #define TX_MSDU_EXTENSION_1_L2_LENGTH_LSB 0
  308. #define TX_MSDU_EXTENSION_1_L2_LENGTH_MASK 0x0000ffff
  309. /* Description TX_MSDU_EXTENSION_1_IP_LENGTH
  310. Ip length for the msdu, if tso is enabled <legal all>
  311. */
  312. #define TX_MSDU_EXTENSION_1_IP_LENGTH_OFFSET 0x00000004
  313. #define TX_MSDU_EXTENSION_1_IP_LENGTH_LSB 16
  314. #define TX_MSDU_EXTENSION_1_IP_LENGTH_MASK 0xffff0000
  315. /* Description TX_MSDU_EXTENSION_2_TCP_SEQ_NUMBER
  316. Tcp_seq_number for the msdu, if tso is enabled <legal
  317. all>
  318. */
  319. #define TX_MSDU_EXTENSION_2_TCP_SEQ_NUMBER_OFFSET 0x00000008
  320. #define TX_MSDU_EXTENSION_2_TCP_SEQ_NUMBER_LSB 0
  321. #define TX_MSDU_EXTENSION_2_TCP_SEQ_NUMBER_MASK 0xffffffff
  322. /* Description TX_MSDU_EXTENSION_3_IP_IDENTIFICATION
  323. Ip_identification for the msdu, if tso is enabled <legal
  324. all>
  325. */
  326. #define TX_MSDU_EXTENSION_3_IP_IDENTIFICATION_OFFSET 0x0000000c
  327. #define TX_MSDU_EXTENSION_3_IP_IDENTIFICATION_LSB 0
  328. #define TX_MSDU_EXTENSION_3_IP_IDENTIFICATION_MASK 0x0000ffff
  329. /* Description TX_MSDU_EXTENSION_3_UDP_LENGTH
  330. TXDMA is copies this field into MSDU START TLV
  331. */
  332. #define TX_MSDU_EXTENSION_3_UDP_LENGTH_OFFSET 0x0000000c
  333. #define TX_MSDU_EXTENSION_3_UDP_LENGTH_LSB 16
  334. #define TX_MSDU_EXTENSION_3_UDP_LENGTH_MASK 0xffff0000
  335. /* Description TX_MSDU_EXTENSION_4_CHECKSUM_OFFSET
  336. The calculated checksum from start offset to end offset
  337. will be added to the checksum at the offset given by this
  338. field<legal all>
  339. */
  340. #define TX_MSDU_EXTENSION_4_CHECKSUM_OFFSET_OFFSET 0x00000010
  341. #define TX_MSDU_EXTENSION_4_CHECKSUM_OFFSET_LSB 0
  342. #define TX_MSDU_EXTENSION_4_CHECKSUM_OFFSET_MASK 0x00003fff
  343. /* Description TX_MSDU_EXTENSION_4_PARTIAL_CHECKSUM_EN
  344. Partial Checksum Enable Bit.
  345. <legal 0-1>
  346. */
  347. #define TX_MSDU_EXTENSION_4_PARTIAL_CHECKSUM_EN_OFFSET 0x00000010
  348. #define TX_MSDU_EXTENSION_4_PARTIAL_CHECKSUM_EN_LSB 14
  349. #define TX_MSDU_EXTENSION_4_PARTIAL_CHECKSUM_EN_MASK 0x00004000
  350. /* Description TX_MSDU_EXTENSION_4_RESERVED_4A
  351. <Legal 0>
  352. */
  353. #define TX_MSDU_EXTENSION_4_RESERVED_4A_OFFSET 0x00000010
  354. #define TX_MSDU_EXTENSION_4_RESERVED_4A_LSB 15
  355. #define TX_MSDU_EXTENSION_4_RESERVED_4A_MASK 0x00008000
  356. /* Description TX_MSDU_EXTENSION_4_PAYLOAD_START_OFFSET
  357. L4 checksum calculations will start fromt this offset
  358. <Legal all>
  359. */
  360. #define TX_MSDU_EXTENSION_4_PAYLOAD_START_OFFSET_OFFSET 0x00000010
  361. #define TX_MSDU_EXTENSION_4_PAYLOAD_START_OFFSET_LSB 16
  362. #define TX_MSDU_EXTENSION_4_PAYLOAD_START_OFFSET_MASK 0x3fff0000
  363. /* Description TX_MSDU_EXTENSION_4_RESERVED_4B
  364. <Legal 0>
  365. */
  366. #define TX_MSDU_EXTENSION_4_RESERVED_4B_OFFSET 0x00000010
  367. #define TX_MSDU_EXTENSION_4_RESERVED_4B_LSB 30
  368. #define TX_MSDU_EXTENSION_4_RESERVED_4B_MASK 0xc0000000
  369. /* Description TX_MSDU_EXTENSION_5_PAYLOAD_END_OFFSET
  370. L4 checksum calculations will end at this offset.
  371. <Legal all>
  372. */
  373. #define TX_MSDU_EXTENSION_5_PAYLOAD_END_OFFSET_OFFSET 0x00000014
  374. #define TX_MSDU_EXTENSION_5_PAYLOAD_END_OFFSET_LSB 0
  375. #define TX_MSDU_EXTENSION_5_PAYLOAD_END_OFFSET_MASK 0x00003fff
  376. /* Description TX_MSDU_EXTENSION_5_RESERVED_5A
  377. <Legal 0>
  378. */
  379. #define TX_MSDU_EXTENSION_5_RESERVED_5A_OFFSET 0x00000014
  380. #define TX_MSDU_EXTENSION_5_RESERVED_5A_LSB 14
  381. #define TX_MSDU_EXTENSION_5_RESERVED_5A_MASK 0x0000c000
  382. /* Description TX_MSDU_EXTENSION_5_WDS
  383. If set the current packet is 4-address frame. Required
  384. because an aggregate can include some frames with 3 address
  385. format and other frames with 4 address format. Used by the
  386. OLE during encapsulation.
  387. Note: there is also global wds tx control in the
  388. TX_PEER_ENTRY
  389. <legal all>
  390. */
  391. #define TX_MSDU_EXTENSION_5_WDS_OFFSET 0x00000014
  392. #define TX_MSDU_EXTENSION_5_WDS_LSB 16
  393. #define TX_MSDU_EXTENSION_5_WDS_MASK 0x00010000
  394. /* Description TX_MSDU_EXTENSION_5_RESERVED_5B
  395. <Legal 0>
  396. */
  397. #define TX_MSDU_EXTENSION_5_RESERVED_5B_OFFSET 0x00000014
  398. #define TX_MSDU_EXTENSION_5_RESERVED_5B_LSB 17
  399. #define TX_MSDU_EXTENSION_5_RESERVED_5B_MASK 0xfffe0000
  400. /* Description TX_MSDU_EXTENSION_6_BUF0_PTR_31_0
  401. Lower 32 bits of the first buffer pointer
  402. NOTE: SW/FW manages the 'cookie' info related to this
  403. buffer together with the 'cookie' info for this
  404. MSDU_EXTENSION descriptor
  405. <legal all>
  406. */
  407. #define TX_MSDU_EXTENSION_6_BUF0_PTR_31_0_OFFSET 0x00000018
  408. #define TX_MSDU_EXTENSION_6_BUF0_PTR_31_0_LSB 0
  409. #define TX_MSDU_EXTENSION_6_BUF0_PTR_31_0_MASK 0xffffffff
  410. /* Description TX_MSDU_EXTENSION_7_BUF0_PTR_39_32
  411. Upper 8 bits of the first buffer pointer <legal all>
  412. */
  413. #define TX_MSDU_EXTENSION_7_BUF0_PTR_39_32_OFFSET 0x0000001c
  414. #define TX_MSDU_EXTENSION_7_BUF0_PTR_39_32_LSB 0
  415. #define TX_MSDU_EXTENSION_7_BUF0_PTR_39_32_MASK 0x000000ff
  416. /* Description TX_MSDU_EXTENSION_7_RESERVED_7A
  417. <Legal 0>
  418. */
  419. #define TX_MSDU_EXTENSION_7_RESERVED_7A_OFFSET 0x0000001c
  420. #define TX_MSDU_EXTENSION_7_RESERVED_7A_LSB 8
  421. #define TX_MSDU_EXTENSION_7_RESERVED_7A_MASK 0x0000ff00
  422. /* Description TX_MSDU_EXTENSION_7_BUF0_LEN
  423. Length of the first buffer <legal all>
  424. */
  425. #define TX_MSDU_EXTENSION_7_BUF0_LEN_OFFSET 0x0000001c
  426. #define TX_MSDU_EXTENSION_7_BUF0_LEN_LSB 16
  427. #define TX_MSDU_EXTENSION_7_BUF0_LEN_MASK 0xffff0000
  428. /* Description TX_MSDU_EXTENSION_8_BUF1_PTR_31_0
  429. Lower 32 bits of the second buffer pointer
  430. NOTE: SW/FW manages the 'cookie' info related to this
  431. buffer together with the 'cookie' info for this
  432. MSDU_EXTENSION descriptor
  433. <legal all>
  434. */
  435. #define TX_MSDU_EXTENSION_8_BUF1_PTR_31_0_OFFSET 0x00000020
  436. #define TX_MSDU_EXTENSION_8_BUF1_PTR_31_0_LSB 0
  437. #define TX_MSDU_EXTENSION_8_BUF1_PTR_31_0_MASK 0xffffffff
  438. /* Description TX_MSDU_EXTENSION_9_BUF1_PTR_39_32
  439. Upper 8 bits of the second buffer pointer <legal all>
  440. */
  441. #define TX_MSDU_EXTENSION_9_BUF1_PTR_39_32_OFFSET 0x00000024
  442. #define TX_MSDU_EXTENSION_9_BUF1_PTR_39_32_LSB 0
  443. #define TX_MSDU_EXTENSION_9_BUF1_PTR_39_32_MASK 0x000000ff
  444. /* Description TX_MSDU_EXTENSION_9_RESERVED_9A
  445. <Legal 0>
  446. */
  447. #define TX_MSDU_EXTENSION_9_RESERVED_9A_OFFSET 0x00000024
  448. #define TX_MSDU_EXTENSION_9_RESERVED_9A_LSB 8
  449. #define TX_MSDU_EXTENSION_9_RESERVED_9A_MASK 0x0000ff00
  450. /* Description TX_MSDU_EXTENSION_9_BUF1_LEN
  451. Length of the second buffer <legal all>
  452. */
  453. #define TX_MSDU_EXTENSION_9_BUF1_LEN_OFFSET 0x00000024
  454. #define TX_MSDU_EXTENSION_9_BUF1_LEN_LSB 16
  455. #define TX_MSDU_EXTENSION_9_BUF1_LEN_MASK 0xffff0000
  456. /* Description TX_MSDU_EXTENSION_10_BUF2_PTR_31_0
  457. Lower 32 bits of the third buffer pointer
  458. NOTE: SW/FW manages the 'cookie' info related to this
  459. buffer together with the 'cookie' info for this
  460. MSDU_EXTENSION descriptor
  461. <legal all>
  462. */
  463. #define TX_MSDU_EXTENSION_10_BUF2_PTR_31_0_OFFSET 0x00000028
  464. #define TX_MSDU_EXTENSION_10_BUF2_PTR_31_0_LSB 0
  465. #define TX_MSDU_EXTENSION_10_BUF2_PTR_31_0_MASK 0xffffffff
  466. /* Description TX_MSDU_EXTENSION_11_BUF2_PTR_39_32
  467. Upper 8 bits of the third buffer pointer <legal all>
  468. */
  469. #define TX_MSDU_EXTENSION_11_BUF2_PTR_39_32_OFFSET 0x0000002c
  470. #define TX_MSDU_EXTENSION_11_BUF2_PTR_39_32_LSB 0
  471. #define TX_MSDU_EXTENSION_11_BUF2_PTR_39_32_MASK 0x000000ff
  472. /* Description TX_MSDU_EXTENSION_11_RESERVED_11A
  473. <Legal 0>
  474. */
  475. #define TX_MSDU_EXTENSION_11_RESERVED_11A_OFFSET 0x0000002c
  476. #define TX_MSDU_EXTENSION_11_RESERVED_11A_LSB 8
  477. #define TX_MSDU_EXTENSION_11_RESERVED_11A_MASK 0x0000ff00
  478. /* Description TX_MSDU_EXTENSION_11_BUF2_LEN
  479. Length of the third buffer <legal all>
  480. */
  481. #define TX_MSDU_EXTENSION_11_BUF2_LEN_OFFSET 0x0000002c
  482. #define TX_MSDU_EXTENSION_11_BUF2_LEN_LSB 16
  483. #define TX_MSDU_EXTENSION_11_BUF2_LEN_MASK 0xffff0000
  484. /* Description TX_MSDU_EXTENSION_12_BUF3_PTR_31_0
  485. Lower 32 bits of the fourth buffer pointer
  486. NOTE: SW/FW manages the 'cookie' info related to this
  487. buffer together with the 'cookie' info for this
  488. MSDU_EXTENSION descriptor
  489. <legal all>
  490. */
  491. #define TX_MSDU_EXTENSION_12_BUF3_PTR_31_0_OFFSET 0x00000030
  492. #define TX_MSDU_EXTENSION_12_BUF3_PTR_31_0_LSB 0
  493. #define TX_MSDU_EXTENSION_12_BUF3_PTR_31_0_MASK 0xffffffff
  494. /* Description TX_MSDU_EXTENSION_13_BUF3_PTR_39_32
  495. Upper 8 bits of the fourth buffer pointer <legal all>
  496. */
  497. #define TX_MSDU_EXTENSION_13_BUF3_PTR_39_32_OFFSET 0x00000034
  498. #define TX_MSDU_EXTENSION_13_BUF3_PTR_39_32_LSB 0
  499. #define TX_MSDU_EXTENSION_13_BUF3_PTR_39_32_MASK 0x000000ff
  500. /* Description TX_MSDU_EXTENSION_13_RESERVED_13A
  501. <Legal 0>
  502. */
  503. #define TX_MSDU_EXTENSION_13_RESERVED_13A_OFFSET 0x00000034
  504. #define TX_MSDU_EXTENSION_13_RESERVED_13A_LSB 8
  505. #define TX_MSDU_EXTENSION_13_RESERVED_13A_MASK 0x0000ff00
  506. /* Description TX_MSDU_EXTENSION_13_BUF3_LEN
  507. Length of the fourth buffer <legal all>
  508. */
  509. #define TX_MSDU_EXTENSION_13_BUF3_LEN_OFFSET 0x00000034
  510. #define TX_MSDU_EXTENSION_13_BUF3_LEN_LSB 16
  511. #define TX_MSDU_EXTENSION_13_BUF3_LEN_MASK 0xffff0000
  512. /* Description TX_MSDU_EXTENSION_14_BUF4_PTR_31_0
  513. Lower 32 bits of the fifth buffer pointer
  514. NOTE: SW/FW manages the 'cookie' info related to this
  515. buffer together with the 'cookie' info for this
  516. MSDU_EXTENSION descriptor
  517. <legal all>
  518. */
  519. #define TX_MSDU_EXTENSION_14_BUF4_PTR_31_0_OFFSET 0x00000038
  520. #define TX_MSDU_EXTENSION_14_BUF4_PTR_31_0_LSB 0
  521. #define TX_MSDU_EXTENSION_14_BUF4_PTR_31_0_MASK 0xffffffff
  522. /* Description TX_MSDU_EXTENSION_15_BUF4_PTR_39_32
  523. Upper 8 bits of the fifth buffer pointer <legal all>
  524. */
  525. #define TX_MSDU_EXTENSION_15_BUF4_PTR_39_32_OFFSET 0x0000003c
  526. #define TX_MSDU_EXTENSION_15_BUF4_PTR_39_32_LSB 0
  527. #define TX_MSDU_EXTENSION_15_BUF4_PTR_39_32_MASK 0x000000ff
  528. /* Description TX_MSDU_EXTENSION_15_RESERVED_15A
  529. <Legal 0>
  530. */
  531. #define TX_MSDU_EXTENSION_15_RESERVED_15A_OFFSET 0x0000003c
  532. #define TX_MSDU_EXTENSION_15_RESERVED_15A_LSB 8
  533. #define TX_MSDU_EXTENSION_15_RESERVED_15A_MASK 0x0000ff00
  534. /* Description TX_MSDU_EXTENSION_15_BUF4_LEN
  535. Length of the fifth buffer <legal all>
  536. */
  537. #define TX_MSDU_EXTENSION_15_BUF4_LEN_OFFSET 0x0000003c
  538. #define TX_MSDU_EXTENSION_15_BUF4_LEN_LSB 16
  539. #define TX_MSDU_EXTENSION_15_BUF4_LEN_MASK 0xffff0000
  540. /* Description TX_MSDU_EXTENSION_16_BUF5_PTR_31_0
  541. Lower 32 bits of the sixth buffer pointer
  542. NOTE: SW/FW manages the 'cookie' info related to this
  543. buffer together with the 'cookie' info for this
  544. MSDU_EXTENSION descriptor
  545. <legal all>
  546. */
  547. #define TX_MSDU_EXTENSION_16_BUF5_PTR_31_0_OFFSET 0x00000040
  548. #define TX_MSDU_EXTENSION_16_BUF5_PTR_31_0_LSB 0
  549. #define TX_MSDU_EXTENSION_16_BUF5_PTR_31_0_MASK 0xffffffff
  550. /* Description TX_MSDU_EXTENSION_17_BUF5_PTR_39_32
  551. Upper 8 bits of the sixth buffer pointer <legal all>
  552. */
  553. #define TX_MSDU_EXTENSION_17_BUF5_PTR_39_32_OFFSET 0x00000044
  554. #define TX_MSDU_EXTENSION_17_BUF5_PTR_39_32_LSB 0
  555. #define TX_MSDU_EXTENSION_17_BUF5_PTR_39_32_MASK 0x000000ff
  556. /* Description TX_MSDU_EXTENSION_17_RESERVED_17A
  557. <Legal 0>
  558. */
  559. #define TX_MSDU_EXTENSION_17_RESERVED_17A_OFFSET 0x00000044
  560. #define TX_MSDU_EXTENSION_17_RESERVED_17A_LSB 8
  561. #define TX_MSDU_EXTENSION_17_RESERVED_17A_MASK 0x0000ff00
  562. /* Description TX_MSDU_EXTENSION_17_BUF5_LEN
  563. Length of the sixth buffer <legal all>
  564. */
  565. #define TX_MSDU_EXTENSION_17_BUF5_LEN_OFFSET 0x00000044
  566. #define TX_MSDU_EXTENSION_17_BUF5_LEN_LSB 16
  567. #define TX_MSDU_EXTENSION_17_BUF5_LEN_MASK 0xffff0000
  568. #endif // _TX_MSDU_EXTENSION_H_