reo_unblock_cache.h 11 KB

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  1. /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
  2. *
  3. * Permission to use, copy, modify, and/or distribute this software for any
  4. * purpose with or without fee is hereby granted, provided that the above
  5. * copyright notice and this permission notice appear in all copies.
  6. *
  7. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  8. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  9. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  10. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  11. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  12. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  13. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  14. */
  15. #ifndef _REO_UNBLOCK_CACHE_H_
  16. #define _REO_UNBLOCK_CACHE_H_
  17. #if !defined(__ASSEMBLER__)
  18. #endif
  19. #include "uniform_reo_cmd_header.h"
  20. #define NUM_OF_DWORDS_REO_UNBLOCK_CACHE 10
  21. #define NUM_OF_QWORDS_REO_UNBLOCK_CACHE 5
  22. struct reo_unblock_cache {
  23. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  24. struct uniform_reo_cmd_header cmd_header;
  25. uint32_t unblock_type : 1, // [0:0]
  26. cache_block_resource_index : 2, // [2:1]
  27. reserved_1a : 29; // [31:3]
  28. uint32_t reserved_2a : 32; // [31:0]
  29. uint32_t reserved_3a : 32; // [31:0]
  30. uint32_t reserved_4a : 32; // [31:0]
  31. uint32_t reserved_5a : 32; // [31:0]
  32. uint32_t reserved_6a : 32; // [31:0]
  33. uint32_t reserved_7a : 32; // [31:0]
  34. uint32_t reserved_8a : 32; // [31:0]
  35. uint32_t tlv64_padding : 32; // [31:0]
  36. #else
  37. struct uniform_reo_cmd_header cmd_header;
  38. uint32_t reserved_1a : 29, // [31:3]
  39. cache_block_resource_index : 2, // [2:1]
  40. unblock_type : 1; // [0:0]
  41. uint32_t reserved_2a : 32; // [31:0]
  42. uint32_t reserved_3a : 32; // [31:0]
  43. uint32_t reserved_4a : 32; // [31:0]
  44. uint32_t reserved_5a : 32; // [31:0]
  45. uint32_t reserved_6a : 32; // [31:0]
  46. uint32_t reserved_7a : 32; // [31:0]
  47. uint32_t reserved_8a : 32; // [31:0]
  48. uint32_t tlv64_padding : 32; // [31:0]
  49. #endif
  50. };
  51. /* Description CMD_HEADER
  52. Consumer: REO
  53. Producer: SW
  54. Details for command execution tracking purposes.
  55. */
  56. /* Description REO_CMD_NUMBER
  57. Consumer: REO/SW/DEBUG
  58. Producer: SW
  59. This number can be used by SW to track, identify and link
  60. the created commands with the command statusses
  61. <legal all>
  62. */
  63. #define REO_UNBLOCK_CACHE_CMD_HEADER_REO_CMD_NUMBER_OFFSET 0x0000000000000000
  64. #define REO_UNBLOCK_CACHE_CMD_HEADER_REO_CMD_NUMBER_LSB 0
  65. #define REO_UNBLOCK_CACHE_CMD_HEADER_REO_CMD_NUMBER_MSB 15
  66. #define REO_UNBLOCK_CACHE_CMD_HEADER_REO_CMD_NUMBER_MASK 0x000000000000ffff
  67. /* Description REO_STATUS_REQUIRED
  68. Consumer: REO
  69. Producer: SW
  70. <enum 0 NoStatus> REO does not need to generate a status
  71. TLV for the execution of this command
  72. <enum 1 StatusRequired> REO shall generate a status TLV
  73. for the execution of this command
  74. <legal all>
  75. */
  76. #define REO_UNBLOCK_CACHE_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET 0x0000000000000000
  77. #define REO_UNBLOCK_CACHE_CMD_HEADER_REO_STATUS_REQUIRED_LSB 16
  78. #define REO_UNBLOCK_CACHE_CMD_HEADER_REO_STATUS_REQUIRED_MSB 16
  79. #define REO_UNBLOCK_CACHE_CMD_HEADER_REO_STATUS_REQUIRED_MASK 0x0000000000010000
  80. /* Description RESERVED_0A
  81. <legal 0>
  82. */
  83. #define REO_UNBLOCK_CACHE_CMD_HEADER_RESERVED_0A_OFFSET 0x0000000000000000
  84. #define REO_UNBLOCK_CACHE_CMD_HEADER_RESERVED_0A_LSB 17
  85. #define REO_UNBLOCK_CACHE_CMD_HEADER_RESERVED_0A_MSB 31
  86. #define REO_UNBLOCK_CACHE_CMD_HEADER_RESERVED_0A_MASK 0x00000000fffe0000
  87. /* Description UNBLOCK_TYPE
  88. Unblock type
  89. <enum 0 unblock_resource_index> Unblock a block resource,
  90. whose index is given in field 'cache_block_resource_index'.
  91. If the indicated blocking resource is not in use (=> not
  92. blocking an address at the moment), the command status
  93. will indicate an error.
  94. <enum 1 unblock_cache> The entire cache usage is unblocked.
  95. If the entire cache is not in a blocked mode at the moment
  96. this command is received, the command status will indicate
  97. an error.
  98. Note that unlocking the "entire cache" has no changes to
  99. the current settings of the blocking resource settings
  100. <legal all>
  101. */
  102. #define REO_UNBLOCK_CACHE_UNBLOCK_TYPE_OFFSET 0x0000000000000000
  103. #define REO_UNBLOCK_CACHE_UNBLOCK_TYPE_LSB 32
  104. #define REO_UNBLOCK_CACHE_UNBLOCK_TYPE_MSB 32
  105. #define REO_UNBLOCK_CACHE_UNBLOCK_TYPE_MASK 0x0000000100000000
  106. /* Description CACHE_BLOCK_RESOURCE_INDEX
  107. Field not valid when field Unblock_type is set to unblock_cache.
  108. Indicates which of the four blocking resources in REO should
  109. be released from blocking a (descriptor) address.
  110. <legal all>
  111. */
  112. #define REO_UNBLOCK_CACHE_CACHE_BLOCK_RESOURCE_INDEX_OFFSET 0x0000000000000000
  113. #define REO_UNBLOCK_CACHE_CACHE_BLOCK_RESOURCE_INDEX_LSB 33
  114. #define REO_UNBLOCK_CACHE_CACHE_BLOCK_RESOURCE_INDEX_MSB 34
  115. #define REO_UNBLOCK_CACHE_CACHE_BLOCK_RESOURCE_INDEX_MASK 0x0000000600000000
  116. /* Description RESERVED_1A
  117. <legal 0>
  118. */
  119. #define REO_UNBLOCK_CACHE_RESERVED_1A_OFFSET 0x0000000000000000
  120. #define REO_UNBLOCK_CACHE_RESERVED_1A_LSB 35
  121. #define REO_UNBLOCK_CACHE_RESERVED_1A_MSB 63
  122. #define REO_UNBLOCK_CACHE_RESERVED_1A_MASK 0xfffffff800000000
  123. /* Description RESERVED_2A
  124. <legal 0>
  125. */
  126. #define REO_UNBLOCK_CACHE_RESERVED_2A_OFFSET 0x0000000000000008
  127. #define REO_UNBLOCK_CACHE_RESERVED_2A_LSB 0
  128. #define REO_UNBLOCK_CACHE_RESERVED_2A_MSB 31
  129. #define REO_UNBLOCK_CACHE_RESERVED_2A_MASK 0x00000000ffffffff
  130. /* Description RESERVED_3A
  131. <legal 0>
  132. */
  133. #define REO_UNBLOCK_CACHE_RESERVED_3A_OFFSET 0x0000000000000008
  134. #define REO_UNBLOCK_CACHE_RESERVED_3A_LSB 32
  135. #define REO_UNBLOCK_CACHE_RESERVED_3A_MSB 63
  136. #define REO_UNBLOCK_CACHE_RESERVED_3A_MASK 0xffffffff00000000
  137. /* Description RESERVED_4A
  138. <legal 0>
  139. */
  140. #define REO_UNBLOCK_CACHE_RESERVED_4A_OFFSET 0x0000000000000010
  141. #define REO_UNBLOCK_CACHE_RESERVED_4A_LSB 0
  142. #define REO_UNBLOCK_CACHE_RESERVED_4A_MSB 31
  143. #define REO_UNBLOCK_CACHE_RESERVED_4A_MASK 0x00000000ffffffff
  144. /* Description RESERVED_5A
  145. <legal 0>
  146. */
  147. #define REO_UNBLOCK_CACHE_RESERVED_5A_OFFSET 0x0000000000000010
  148. #define REO_UNBLOCK_CACHE_RESERVED_5A_LSB 32
  149. #define REO_UNBLOCK_CACHE_RESERVED_5A_MSB 63
  150. #define REO_UNBLOCK_CACHE_RESERVED_5A_MASK 0xffffffff00000000
  151. /* Description RESERVED_6A
  152. <legal 0>
  153. */
  154. #define REO_UNBLOCK_CACHE_RESERVED_6A_OFFSET 0x0000000000000018
  155. #define REO_UNBLOCK_CACHE_RESERVED_6A_LSB 0
  156. #define REO_UNBLOCK_CACHE_RESERVED_6A_MSB 31
  157. #define REO_UNBLOCK_CACHE_RESERVED_6A_MASK 0x00000000ffffffff
  158. /* Description RESERVED_7A
  159. <legal 0>
  160. */
  161. #define REO_UNBLOCK_CACHE_RESERVED_7A_OFFSET 0x0000000000000018
  162. #define REO_UNBLOCK_CACHE_RESERVED_7A_LSB 32
  163. #define REO_UNBLOCK_CACHE_RESERVED_7A_MSB 63
  164. #define REO_UNBLOCK_CACHE_RESERVED_7A_MASK 0xffffffff00000000
  165. /* Description RESERVED_8A
  166. <legal 0>
  167. */
  168. #define REO_UNBLOCK_CACHE_RESERVED_8A_OFFSET 0x0000000000000020
  169. #define REO_UNBLOCK_CACHE_RESERVED_8A_LSB 0
  170. #define REO_UNBLOCK_CACHE_RESERVED_8A_MSB 31
  171. #define REO_UNBLOCK_CACHE_RESERVED_8A_MASK 0x00000000ffffffff
  172. /* Description TLV64_PADDING
  173. Automatic DWORD padding inserted while converting TLV32
  174. to TLV64 for 64 bit ARCH
  175. <legal 0>
  176. */
  177. #define REO_UNBLOCK_CACHE_TLV64_PADDING_OFFSET 0x0000000000000020
  178. #define REO_UNBLOCK_CACHE_TLV64_PADDING_LSB 32
  179. #define REO_UNBLOCK_CACHE_TLV64_PADDING_MSB 63
  180. #define REO_UNBLOCK_CACHE_TLV64_PADDING_MASK 0xffffffff00000000
  181. #endif // REO_UNBLOCK_CACHE