dsi_panel.c 117 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dbg.h"
  15. #include "sde_dsc_helper.h"
  16. #include "sde_vdc_helper.h"
  17. /**
  18. * topology is currently defined by a set of following 3 values:
  19. * 1. num of layer mixers
  20. * 2. num of compression encoders
  21. * 3. num of interfaces
  22. */
  23. #define TOPOLOGY_SET_LEN 3
  24. #define MAX_TOPOLOGY 5
  25. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  26. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  27. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  28. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  29. #define MAX_PANEL_JITTER 10
  30. #define DEFAULT_PANEL_PREFILL_LINES 25
  31. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  32. #define MIN_PREFILL_LINES 40
  33. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  34. {
  35. char *bp;
  36. bp = buf;
  37. /* First 7 bytes are cmd header */
  38. *bp++ = 0x0A;
  39. *bp++ = 1;
  40. *bp++ = 0;
  41. *bp++ = 0;
  42. *bp++ = pps_delay_ms;
  43. *bp++ = 0;
  44. *bp++ = 128;
  45. }
  46. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  47. char *buf, int pps_id, u32 size)
  48. {
  49. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  50. buf += DSI_CMD_PPS_HDR_SIZE;
  51. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  52. size);
  53. }
  54. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  55. char *buf, int pps_id, u32 size)
  56. {
  57. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  58. buf += DSI_CMD_PPS_HDR_SIZE;
  59. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  60. size);
  61. }
  62. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  63. {
  64. int rc = 0;
  65. int i;
  66. struct regulator *vreg = NULL;
  67. for (i = 0; i < panel->power_info.count; i++) {
  68. vreg = devm_regulator_get(panel->parent,
  69. panel->power_info.vregs[i].vreg_name);
  70. rc = PTR_ERR_OR_ZERO(vreg);
  71. if (rc) {
  72. DSI_ERR("failed to get %s regulator\n",
  73. panel->power_info.vregs[i].vreg_name);
  74. goto error_put;
  75. }
  76. panel->power_info.vregs[i].vreg = vreg;
  77. }
  78. return rc;
  79. error_put:
  80. for (i = i - 1; i >= 0; i--) {
  81. devm_regulator_put(panel->power_info.vregs[i].vreg);
  82. panel->power_info.vregs[i].vreg = NULL;
  83. }
  84. return rc;
  85. }
  86. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  87. {
  88. int rc = 0;
  89. int i;
  90. for (i = panel->power_info.count - 1; i >= 0; i--)
  91. devm_regulator_put(panel->power_info.vregs[i].vreg);
  92. return rc;
  93. }
  94. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  95. {
  96. int rc = 0;
  97. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  98. if (gpio_is_valid(r_config->reset_gpio)) {
  99. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  100. if (rc) {
  101. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  102. goto error;
  103. }
  104. }
  105. if (gpio_is_valid(r_config->disp_en_gpio)) {
  106. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  107. if (rc) {
  108. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  109. goto error_release_reset;
  110. }
  111. }
  112. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  113. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  114. if (rc) {
  115. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  116. goto error_release_disp_en;
  117. }
  118. }
  119. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  120. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  121. if (rc) {
  122. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  123. goto error_release_mode_sel;
  124. }
  125. }
  126. if (gpio_is_valid(panel->panel_test_gpio)) {
  127. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  128. if (rc) {
  129. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  130. rc);
  131. panel->panel_test_gpio = -1;
  132. rc = 0;
  133. }
  134. }
  135. goto error;
  136. error_release_mode_sel:
  137. if (gpio_is_valid(panel->bl_config.en_gpio))
  138. gpio_free(panel->bl_config.en_gpio);
  139. error_release_disp_en:
  140. if (gpio_is_valid(r_config->disp_en_gpio))
  141. gpio_free(r_config->disp_en_gpio);
  142. error_release_reset:
  143. if (gpio_is_valid(r_config->reset_gpio))
  144. gpio_free(r_config->reset_gpio);
  145. error:
  146. return rc;
  147. }
  148. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  149. {
  150. int rc = 0;
  151. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  152. if (gpio_is_valid(r_config->reset_gpio))
  153. gpio_free(r_config->reset_gpio);
  154. if (gpio_is_valid(r_config->disp_en_gpio))
  155. gpio_free(r_config->disp_en_gpio);
  156. if (gpio_is_valid(panel->bl_config.en_gpio))
  157. gpio_free(panel->bl_config.en_gpio);
  158. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  159. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  160. if (gpio_is_valid(panel->panel_test_gpio))
  161. gpio_free(panel->panel_test_gpio);
  162. return rc;
  163. }
  164. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel, bool trusted_vm_env)
  165. {
  166. if (!panel) {
  167. DSI_ERR("Invalid panel param\n");
  168. return -EINVAL;
  169. }
  170. /* toggle reset-gpio by writing directly to register in trusted-vm */
  171. if (trusted_vm_env) {
  172. struct dsi_tlmm_gpio *gpio = NULL;
  173. void __iomem *io;
  174. u32 offset = 0x4;
  175. int i;
  176. for (i = 0; i < panel->tlmm_gpio_count; i++)
  177. if (!strcmp(panel->tlmm_gpio[i].name, "reset-gpio"))
  178. gpio = &panel->tlmm_gpio[i];
  179. if (!gpio) {
  180. DSI_ERR("reset gpio not found\n");
  181. return -EINVAL;
  182. }
  183. io = ioremap(gpio->addr, gpio->size);
  184. writel_relaxed(0, io + offset);
  185. iounmap(io);
  186. } else {
  187. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  188. if (!r_config) {
  189. DSI_ERR("Invalid panel reset configuration\n");
  190. return -EINVAL;
  191. }
  192. if (!gpio_is_valid(r_config->reset_gpio)) {
  193. DSI_ERR("failed to pull down gpio\n");
  194. return -EINVAL;
  195. }
  196. gpio_set_value(r_config->reset_gpio, 0);
  197. }
  198. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  199. DSI_INFO("GPIO pulled low to simulate ESD\n");
  200. return 0;
  201. }
  202. static int dsi_panel_reset(struct dsi_panel *panel)
  203. {
  204. int rc = 0;
  205. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  206. int i;
  207. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  208. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  209. if (rc) {
  210. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  211. goto exit;
  212. }
  213. }
  214. if (r_config->count) {
  215. rc = gpio_direction_output(r_config->reset_gpio,
  216. r_config->sequence[0].level);
  217. if (rc) {
  218. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  219. goto exit;
  220. }
  221. }
  222. for (i = 0; i < r_config->count; i++) {
  223. gpio_set_value(r_config->reset_gpio,
  224. r_config->sequence[i].level);
  225. if (r_config->sequence[i].sleep_ms)
  226. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  227. (r_config->sequence[i].sleep_ms * 1000) + 100);
  228. }
  229. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  230. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  231. if (rc)
  232. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  233. }
  234. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  235. bool out = true;
  236. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  237. || (panel->reset_config.mode_sel_state
  238. == MODE_GPIO_LOW))
  239. out = false;
  240. else if ((panel->reset_config.mode_sel_state
  241. == MODE_SEL_SINGLE_PORT) ||
  242. (panel->reset_config.mode_sel_state
  243. == MODE_GPIO_HIGH))
  244. out = true;
  245. rc = gpio_direction_output(
  246. panel->reset_config.lcd_mode_sel_gpio, out);
  247. if (rc)
  248. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  249. }
  250. if (gpio_is_valid(panel->panel_test_gpio)) {
  251. rc = gpio_direction_input(panel->panel_test_gpio);
  252. if (rc)
  253. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  254. rc);
  255. }
  256. exit:
  257. return rc;
  258. }
  259. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  260. {
  261. int rc = 0;
  262. struct pinctrl_state *state;
  263. if (panel->host_config.ext_bridge_mode)
  264. return 0;
  265. if (!panel->pinctrl.pinctrl)
  266. return 0;
  267. if (enable)
  268. state = panel->pinctrl.active;
  269. else
  270. state = panel->pinctrl.suspend;
  271. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  272. if (rc)
  273. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  274. panel->name, rc);
  275. return rc;
  276. }
  277. static int dsi_panel_power_on(struct dsi_panel *panel)
  278. {
  279. int rc = 0;
  280. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  281. if (rc) {
  282. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  283. panel->name, rc);
  284. goto exit;
  285. }
  286. rc = dsi_panel_set_pinctrl_state(panel, true);
  287. if (rc) {
  288. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  289. goto error_disable_vregs;
  290. }
  291. rc = dsi_panel_reset(panel);
  292. if (rc) {
  293. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  294. goto error_disable_gpio;
  295. }
  296. goto exit;
  297. error_disable_gpio:
  298. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  299. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  300. if (gpio_is_valid(panel->bl_config.en_gpio))
  301. gpio_set_value(panel->bl_config.en_gpio, 0);
  302. (void)dsi_panel_set_pinctrl_state(panel, false);
  303. error_disable_vregs:
  304. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  305. exit:
  306. return rc;
  307. }
  308. static int dsi_panel_power_off(struct dsi_panel *panel)
  309. {
  310. int rc = 0;
  311. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  312. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  313. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  314. !panel->reset_gpio_always_on)
  315. gpio_set_value(panel->reset_config.reset_gpio, 0);
  316. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  317. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  318. if (gpio_is_valid(panel->panel_test_gpio)) {
  319. rc = gpio_direction_input(panel->panel_test_gpio);
  320. if (rc)
  321. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  322. rc);
  323. }
  324. rc = dsi_panel_set_pinctrl_state(panel, false);
  325. if (rc) {
  326. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  327. rc);
  328. }
  329. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  330. if (rc)
  331. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  332. panel->name, rc);
  333. return rc;
  334. }
  335. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  336. enum dsi_cmd_set_type type)
  337. {
  338. int rc = 0, i = 0;
  339. ssize_t len;
  340. struct dsi_cmd_desc *cmds;
  341. u32 count;
  342. enum dsi_cmd_set_state state;
  343. struct dsi_display_mode *mode;
  344. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  345. if (!panel || !panel->cur_mode)
  346. return -EINVAL;
  347. mode = panel->cur_mode;
  348. cmds = mode->priv_info->cmd_sets[type].cmds;
  349. count = mode->priv_info->cmd_sets[type].count;
  350. state = mode->priv_info->cmd_sets[type].state;
  351. SDE_EVT32(type, state, count);
  352. if (count == 0) {
  353. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  354. panel->name, type);
  355. goto error;
  356. }
  357. for (i = 0; i < count; i++) {
  358. if (state == DSI_CMD_SET_STATE_LP)
  359. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  360. if (cmds->last_command)
  361. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  362. if (type == DSI_CMD_SET_VID_TO_CMD_SWITCH)
  363. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  364. len = ops->transfer(panel->host, &cmds->msg);
  365. if (len < 0) {
  366. rc = len;
  367. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  368. goto error;
  369. }
  370. if (cmds->post_wait_ms)
  371. usleep_range(cmds->post_wait_ms*1000,
  372. ((cmds->post_wait_ms*1000)+10));
  373. cmds++;
  374. }
  375. error:
  376. return rc;
  377. }
  378. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  379. {
  380. int rc = 0;
  381. if (panel->host_config.ext_bridge_mode)
  382. return 0;
  383. devm_pinctrl_put(panel->pinctrl.pinctrl);
  384. return rc;
  385. }
  386. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  387. {
  388. int rc = 0;
  389. if (panel->host_config.ext_bridge_mode)
  390. return 0;
  391. /* TODO: pinctrl is defined in dsi dt node */
  392. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  393. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  394. rc = PTR_ERR(panel->pinctrl.pinctrl);
  395. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  396. goto error;
  397. }
  398. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  399. "panel_active");
  400. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  401. rc = PTR_ERR(panel->pinctrl.active);
  402. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  403. goto error;
  404. }
  405. panel->pinctrl.suspend =
  406. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  407. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  408. rc = PTR_ERR(panel->pinctrl.suspend);
  409. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  410. goto error;
  411. }
  412. panel->pinctrl.pwm_pin =
  413. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  414. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  415. panel->pinctrl.pwm_pin = NULL;
  416. DSI_DEBUG("failed to get pinctrl pwm_pin");
  417. }
  418. error:
  419. return rc;
  420. }
  421. static int dsi_panel_wled_register(struct dsi_panel *panel,
  422. struct dsi_backlight_config *bl)
  423. {
  424. struct backlight_device *bd;
  425. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  426. if (!bd) {
  427. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  428. panel->name, -EPROBE_DEFER);
  429. return -EPROBE_DEFER;
  430. }
  431. bl->raw_bd = bd;
  432. return 0;
  433. }
  434. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  435. u32 bl_lvl)
  436. {
  437. int rc = 0;
  438. unsigned long mode_flags = 0;
  439. struct mipi_dsi_device *dsi = NULL;
  440. if (!panel || (bl_lvl > 0xffff)) {
  441. DSI_ERR("invalid params\n");
  442. return -EINVAL;
  443. }
  444. dsi = &panel->mipi_device;
  445. if (unlikely(panel->bl_config.lp_mode)) {
  446. mode_flags = dsi->mode_flags;
  447. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  448. }
  449. if (panel->bl_config.bl_inverted_dbv)
  450. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  451. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  452. if (rc < 0)
  453. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  454. if (unlikely(panel->bl_config.lp_mode))
  455. dsi->mode_flags = mode_flags;
  456. return rc;
  457. }
  458. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  459. u32 bl_lvl)
  460. {
  461. int rc = 0;
  462. u32 duty = 0;
  463. u32 period_ns = 0;
  464. struct dsi_backlight_config *bl;
  465. if (!panel) {
  466. DSI_ERR("Invalid Params\n");
  467. return -EINVAL;
  468. }
  469. bl = &panel->bl_config;
  470. if (!bl->pwm_bl) {
  471. DSI_ERR("pwm device not found\n");
  472. return -EINVAL;
  473. }
  474. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  475. duty = bl_lvl * period_ns;
  476. duty /= bl->bl_max_level;
  477. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  478. if (rc) {
  479. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  480. rc);
  481. goto error;
  482. }
  483. if (bl_lvl == 0 && bl->pwm_enabled) {
  484. pwm_disable(bl->pwm_bl);
  485. bl->pwm_enabled = false;
  486. return 0;
  487. }
  488. if (bl_lvl != 0 && !bl->pwm_enabled) {
  489. rc = pwm_enable(bl->pwm_bl);
  490. if (rc) {
  491. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  492. rc);
  493. goto error;
  494. }
  495. bl->pwm_enabled = true;
  496. }
  497. error:
  498. return rc;
  499. }
  500. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  501. {
  502. int rc = 0;
  503. struct dsi_backlight_config *bl = &panel->bl_config;
  504. if (panel->host_config.ext_bridge_mode)
  505. return 0;
  506. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  507. switch (bl->type) {
  508. case DSI_BACKLIGHT_WLED:
  509. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  510. break;
  511. case DSI_BACKLIGHT_DCS:
  512. rc = dsi_panel_update_backlight(panel, bl_lvl);
  513. break;
  514. case DSI_BACKLIGHT_EXTERNAL:
  515. break;
  516. case DSI_BACKLIGHT_PWM:
  517. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  518. break;
  519. default:
  520. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  521. rc = -ENOTSUPP;
  522. }
  523. return rc;
  524. }
  525. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  526. {
  527. u32 cur_bl_level;
  528. struct backlight_device *bd = bl->raw_bd;
  529. /* default the brightness level to 50% */
  530. cur_bl_level = bl->bl_max_level >> 1;
  531. switch (bl->type) {
  532. case DSI_BACKLIGHT_WLED:
  533. /* Try to query the backlight level from the backlight device */
  534. if (bd->ops && bd->ops->get_brightness)
  535. cur_bl_level = bd->ops->get_brightness(bd);
  536. break;
  537. case DSI_BACKLIGHT_DCS:
  538. case DSI_BACKLIGHT_EXTERNAL:
  539. case DSI_BACKLIGHT_PWM:
  540. default:
  541. /*
  542. * Ideally, we should read the backlight level from the
  543. * panel. For now, just set it default value.
  544. */
  545. break;
  546. }
  547. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  548. return cur_bl_level;
  549. }
  550. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  551. {
  552. struct dsi_backlight_config *bl = &panel->bl_config;
  553. bl->bl_level = dsi_panel_get_brightness(bl);
  554. }
  555. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  556. {
  557. int rc = 0;
  558. struct dsi_backlight_config *bl = &panel->bl_config;
  559. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  560. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  561. rc = PTR_ERR(bl->pwm_bl);
  562. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  563. rc);
  564. return rc;
  565. }
  566. if (panel->pinctrl.pwm_pin) {
  567. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  568. panel->pinctrl.pwm_pin);
  569. if (rc)
  570. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  571. panel->name, rc);
  572. }
  573. return 0;
  574. }
  575. static int dsi_panel_bl_register(struct dsi_panel *panel)
  576. {
  577. int rc = 0;
  578. struct dsi_backlight_config *bl = &panel->bl_config;
  579. if (panel->host_config.ext_bridge_mode)
  580. return 0;
  581. switch (bl->type) {
  582. case DSI_BACKLIGHT_WLED:
  583. rc = dsi_panel_wled_register(panel, bl);
  584. break;
  585. case DSI_BACKLIGHT_DCS:
  586. break;
  587. case DSI_BACKLIGHT_EXTERNAL:
  588. break;
  589. case DSI_BACKLIGHT_PWM:
  590. rc = dsi_panel_pwm_register(panel);
  591. break;
  592. default:
  593. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  594. rc = -ENOTSUPP;
  595. goto error;
  596. }
  597. error:
  598. return rc;
  599. }
  600. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  601. {
  602. struct dsi_backlight_config *bl = &panel->bl_config;
  603. devm_pwm_put(panel->parent, bl->pwm_bl);
  604. }
  605. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  606. {
  607. int rc = 0;
  608. struct dsi_backlight_config *bl = &panel->bl_config;
  609. if (panel->host_config.ext_bridge_mode)
  610. return 0;
  611. switch (bl->type) {
  612. case DSI_BACKLIGHT_WLED:
  613. break;
  614. case DSI_BACKLIGHT_DCS:
  615. break;
  616. case DSI_BACKLIGHT_EXTERNAL:
  617. break;
  618. case DSI_BACKLIGHT_PWM:
  619. dsi_panel_pwm_unregister(panel);
  620. break;
  621. default:
  622. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  623. rc = -ENOTSUPP;
  624. goto error;
  625. }
  626. error:
  627. return rc;
  628. }
  629. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  630. struct dsi_parser_utils *utils)
  631. {
  632. int rc = 0;
  633. u64 tmp64 = 0;
  634. struct dsi_display_mode *display_mode;
  635. struct dsi_display_mode_priv_info *priv_info;
  636. display_mode = container_of(mode, struct dsi_display_mode, timing);
  637. priv_info = display_mode->priv_info;
  638. rc = utils->read_u64(utils->data,
  639. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  640. if (rc == -EOVERFLOW) {
  641. tmp64 = 0;
  642. rc = utils->read_u32(utils->data,
  643. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  644. }
  645. mode->clk_rate_hz = !rc ? tmp64 : 0;
  646. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  647. mode->pclk_scale.numer = 1;
  648. mode->pclk_scale.denom = 1;
  649. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  650. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  651. &mode->mdp_transfer_time_us);
  652. if (!rc)
  653. display_mode->priv_info->mdp_transfer_time_us =
  654. mode->mdp_transfer_time_us;
  655. else
  656. display_mode->priv_info->mdp_transfer_time_us = 0;
  657. rc = utils->read_u32(utils->data,
  658. "qcom,mdss-dsi-panel-framerate",
  659. &mode->refresh_rate);
  660. if (rc) {
  661. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  662. rc);
  663. goto error;
  664. }
  665. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  666. &mode->h_active);
  667. if (rc) {
  668. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  669. rc);
  670. goto error;
  671. }
  672. rc = utils->read_u32(utils->data,
  673. "qcom,mdss-dsi-h-front-porch",
  674. &mode->h_front_porch);
  675. if (rc) {
  676. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  677. rc);
  678. goto error;
  679. }
  680. rc = utils->read_u32(utils->data,
  681. "qcom,mdss-dsi-h-back-porch",
  682. &mode->h_back_porch);
  683. if (rc) {
  684. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  685. rc);
  686. goto error;
  687. }
  688. rc = utils->read_u32(utils->data,
  689. "qcom,mdss-dsi-h-pulse-width",
  690. &mode->h_sync_width);
  691. if (rc) {
  692. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  693. rc);
  694. goto error;
  695. }
  696. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  697. &mode->h_skew);
  698. if (rc)
  699. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  700. rc);
  701. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  702. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  703. mode->h_sync_width);
  704. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  705. &mode->v_active);
  706. if (rc) {
  707. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  708. rc);
  709. goto error;
  710. }
  711. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  712. &mode->v_back_porch);
  713. if (rc) {
  714. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  715. rc);
  716. goto error;
  717. }
  718. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  719. &mode->v_front_porch);
  720. if (rc) {
  721. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  722. rc);
  723. goto error;
  724. }
  725. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  726. &mode->v_sync_width);
  727. if (rc) {
  728. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  729. rc);
  730. goto error;
  731. }
  732. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  733. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  734. mode->v_sync_width);
  735. error:
  736. return rc;
  737. }
  738. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  739. struct dsi_parser_utils *utils,
  740. const char *name)
  741. {
  742. int rc = 0;
  743. u32 bpp = 0;
  744. enum dsi_pixel_format fmt;
  745. const char *packing;
  746. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  747. if (rc) {
  748. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  749. name, rc);
  750. return rc;
  751. }
  752. host->bpp = bpp;
  753. switch (bpp) {
  754. case 3:
  755. fmt = DSI_PIXEL_FORMAT_RGB111;
  756. break;
  757. case 8:
  758. fmt = DSI_PIXEL_FORMAT_RGB332;
  759. break;
  760. case 12:
  761. fmt = DSI_PIXEL_FORMAT_RGB444;
  762. break;
  763. case 16:
  764. fmt = DSI_PIXEL_FORMAT_RGB565;
  765. break;
  766. case 18:
  767. fmt = DSI_PIXEL_FORMAT_RGB666;
  768. break;
  769. case 24:
  770. default:
  771. fmt = DSI_PIXEL_FORMAT_RGB888;
  772. break;
  773. }
  774. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  775. packing = utils->get_property(utils->data,
  776. "qcom,mdss-dsi-pixel-packing",
  777. NULL);
  778. if (packing && !strcmp(packing, "loose"))
  779. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  780. }
  781. host->dst_format = fmt;
  782. return rc;
  783. }
  784. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  785. struct dsi_parser_utils *utils,
  786. const char *name)
  787. {
  788. int rc = 0;
  789. bool lane_enabled;
  790. u32 num_of_lanes = 0;
  791. lane_enabled = utils->read_bool(utils->data,
  792. "qcom,mdss-dsi-lane-0-state");
  793. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  794. lane_enabled = utils->read_bool(utils->data,
  795. "qcom,mdss-dsi-lane-1-state");
  796. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  797. lane_enabled = utils->read_bool(utils->data,
  798. "qcom,mdss-dsi-lane-2-state");
  799. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  800. lane_enabled = utils->read_bool(utils->data,
  801. "qcom,mdss-dsi-lane-3-state");
  802. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  803. if (host->data_lanes & DSI_DATA_LANE_0)
  804. num_of_lanes++;
  805. if (host->data_lanes & DSI_DATA_LANE_1)
  806. num_of_lanes++;
  807. if (host->data_lanes & DSI_DATA_LANE_2)
  808. num_of_lanes++;
  809. if (host->data_lanes & DSI_DATA_LANE_3)
  810. num_of_lanes++;
  811. host->num_data_lanes = num_of_lanes;
  812. if (host->data_lanes == 0) {
  813. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  814. rc = -EINVAL;
  815. }
  816. return rc;
  817. }
  818. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  819. struct dsi_parser_utils *utils,
  820. const char *name)
  821. {
  822. int rc = 0;
  823. const char *swap_mode;
  824. swap_mode = utils->get_property(utils->data,
  825. "qcom,mdss-dsi-color-order", NULL);
  826. if (swap_mode) {
  827. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  828. host->swap_mode = DSI_COLOR_SWAP_RGB;
  829. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  830. host->swap_mode = DSI_COLOR_SWAP_RBG;
  831. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  832. host->swap_mode = DSI_COLOR_SWAP_BRG;
  833. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  834. host->swap_mode = DSI_COLOR_SWAP_GRB;
  835. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  836. host->swap_mode = DSI_COLOR_SWAP_GBR;
  837. } else {
  838. DSI_ERR("[%s] Unrecognized color order-%s\n",
  839. name, swap_mode);
  840. rc = -EINVAL;
  841. }
  842. } else {
  843. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  844. host->swap_mode = DSI_COLOR_SWAP_RGB;
  845. }
  846. /* bit swap on color channel is not defined in dt */
  847. host->bit_swap_red = false;
  848. host->bit_swap_green = false;
  849. host->bit_swap_blue = false;
  850. return rc;
  851. }
  852. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  853. struct dsi_parser_utils *utils,
  854. const char *name)
  855. {
  856. const char *trig;
  857. int rc = 0;
  858. trig = utils->get_property(utils->data,
  859. "qcom,mdss-dsi-mdp-trigger", NULL);
  860. if (trig) {
  861. if (!strcmp(trig, "none")) {
  862. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  863. } else if (!strcmp(trig, "trigger_te")) {
  864. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  865. } else if (!strcmp(trig, "trigger_sw")) {
  866. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  867. } else if (!strcmp(trig, "trigger_sw_te")) {
  868. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  869. } else {
  870. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  871. name, trig);
  872. rc = -EINVAL;
  873. }
  874. } else {
  875. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  876. name);
  877. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  878. }
  879. trig = utils->get_property(utils->data,
  880. "qcom,mdss-dsi-dma-trigger", NULL);
  881. if (trig) {
  882. if (!strcmp(trig, "none")) {
  883. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  884. } else if (!strcmp(trig, "trigger_te")) {
  885. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  886. } else if (!strcmp(trig, "trigger_sw")) {
  887. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  888. } else if (!strcmp(trig, "trigger_sw_seof")) {
  889. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  890. } else if (!strcmp(trig, "trigger_sw_te")) {
  891. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  892. } else {
  893. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  894. name, trig);
  895. rc = -EINVAL;
  896. }
  897. } else {
  898. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  899. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  900. }
  901. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  902. &host->te_mode);
  903. if (rc) {
  904. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  905. host->te_mode = 1;
  906. rc = 0;
  907. }
  908. return rc;
  909. }
  910. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  911. struct dsi_parser_utils *utils,
  912. const char *name)
  913. {
  914. u32 val = 0, line_no = 0, window = 0;
  915. int rc = 0;
  916. bool panel_cphy_mode = false;
  917. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  918. if (!rc) {
  919. host->t_clk_post = val;
  920. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  921. }
  922. val = 0;
  923. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  924. if (!rc) {
  925. host->t_clk_pre = val;
  926. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  927. }
  928. host->ignore_rx_eot = utils->read_bool(utils->data,
  929. "qcom,mdss-dsi-rx-eot-ignore");
  930. host->append_tx_eot = utils->read_bool(utils->data,
  931. "qcom,mdss-dsi-tx-eot-append");
  932. host->ext_bridge_mode = utils->read_bool(utils->data,
  933. "qcom,mdss-dsi-ext-bridge-mode");
  934. host->force_hs_clk_lane = utils->read_bool(utils->data,
  935. "qcom,mdss-dsi-force-clock-lane-hs");
  936. panel_cphy_mode = utils->read_bool(utils->data,
  937. "qcom,panel-cphy-mode");
  938. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  939. : DSI_PHY_TYPE_DPHY;
  940. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  941. &line_no);
  942. if (rc)
  943. host->dma_sched_line = 0;
  944. else
  945. host->dma_sched_line = line_no;
  946. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  947. &window);
  948. if (rc)
  949. host->dma_sched_window = 0;
  950. else
  951. host->dma_sched_window = window;
  952. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  953. host->dma_sched_line, host->dma_sched_window);
  954. return 0;
  955. }
  956. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  957. struct dsi_parser_utils *utils,
  958. const char *name)
  959. {
  960. int rc = 0;
  961. u32 val = 0;
  962. bool supported = false;
  963. struct dsi_split_link_config *split_link = &host->split_link;
  964. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  965. if (!supported) {
  966. DSI_DEBUG("[%s] Split link is not supported\n", name);
  967. split_link->split_link_enabled = false;
  968. return;
  969. }
  970. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  971. if (rc || val < 1) {
  972. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  973. split_link->num_sublinks = 2;
  974. } else {
  975. split_link->num_sublinks = val;
  976. }
  977. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  978. if (rc || val < 1) {
  979. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  980. split_link->lanes_per_sublink = 2;
  981. } else {
  982. split_link->lanes_per_sublink = val;
  983. }
  984. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  985. split_link->num_sublinks, split_link->lanes_per_sublink);
  986. split_link->split_link_enabled = true;
  987. }
  988. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  989. {
  990. int rc = 0;
  991. struct dsi_parser_utils *utils = &panel->utils;
  992. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  993. panel->name);
  994. if (rc) {
  995. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  996. panel->name, rc);
  997. goto error;
  998. }
  999. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1000. panel->name);
  1001. if (rc) {
  1002. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1003. panel->name, rc);
  1004. goto error;
  1005. }
  1006. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1007. panel->name);
  1008. if (rc) {
  1009. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1010. panel->name, rc);
  1011. goto error;
  1012. }
  1013. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1014. panel->name);
  1015. if (rc) {
  1016. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1017. panel->name, rc);
  1018. goto error;
  1019. }
  1020. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1021. panel->name);
  1022. if (rc) {
  1023. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1024. panel->name, rc);
  1025. goto error;
  1026. }
  1027. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1028. panel->name);
  1029. error:
  1030. return rc;
  1031. }
  1032. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1033. struct device_node *of_node)
  1034. {
  1035. int rc = 0;
  1036. u32 val = 0, i;
  1037. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1038. struct dsi_parser_utils *utils = &panel->utils;
  1039. const char *name = panel->name;
  1040. /**
  1041. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1042. * video mode when there is only one qsync min fps present.
  1043. */
  1044. rc = of_property_read_u32(of_node,
  1045. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1046. &val);
  1047. if (rc)
  1048. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1049. panel->name, rc);
  1050. qsync_caps->qsync_min_fps = val;
  1051. /**
  1052. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1053. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1054. * is defined.
  1055. */
  1056. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1057. "qcom,dsi-supported-qsync-min-fps-list");
  1058. if (qsync_caps->qsync_min_fps_list_len < 1)
  1059. goto qsync_support;
  1060. /**
  1061. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1062. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1063. */
  1064. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1065. qsync_caps->qsync_min_fps) {
  1066. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1067. name);
  1068. rc = -EINVAL;
  1069. goto error;
  1070. }
  1071. if (panel->dfps_caps.dfps_list_len !=
  1072. qsync_caps->qsync_min_fps_list_len) {
  1073. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1074. rc = -EINVAL;
  1075. goto error;
  1076. }
  1077. qsync_caps->qsync_min_fps_list =
  1078. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1079. GFP_KERNEL);
  1080. if (!qsync_caps->qsync_min_fps_list) {
  1081. rc = -ENOMEM;
  1082. goto error;
  1083. }
  1084. rc = utils->read_u32_array(utils->data,
  1085. "qcom,dsi-supported-qsync-min-fps-list",
  1086. qsync_caps->qsync_min_fps_list,
  1087. qsync_caps->qsync_min_fps_list_len);
  1088. if (rc) {
  1089. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1090. rc = -EINVAL;
  1091. goto error;
  1092. }
  1093. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1094. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1095. if (qsync_caps->qsync_min_fps_list[i] <
  1096. qsync_caps->qsync_min_fps)
  1097. qsync_caps->qsync_min_fps =
  1098. qsync_caps->qsync_min_fps_list[i];
  1099. }
  1100. qsync_support:
  1101. /* allow qsync support only if DFPS is with VFP approach */
  1102. if ((panel->dfps_caps.dfps_support) &&
  1103. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  1104. panel->qsync_caps.qsync_min_fps = 0;
  1105. error:
  1106. if (rc < 0) {
  1107. qsync_caps->qsync_min_fps = 0;
  1108. qsync_caps->qsync_min_fps_list_len = 0;
  1109. }
  1110. return rc;
  1111. }
  1112. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1113. {
  1114. int rc = 0;
  1115. bool supported = false;
  1116. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1117. struct dsi_parser_utils *utils = &panel->utils;
  1118. const char *name = panel->name;
  1119. const char *type;
  1120. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1121. if (!supported) {
  1122. dyn_clk_caps->dyn_clk_support = false;
  1123. return rc;
  1124. }
  1125. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  1126. "qcom,dsi-dyn-clk-list");
  1127. if (dyn_clk_caps->bit_clk_list_len < 1) {
  1128. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  1129. return -EINVAL;
  1130. }
  1131. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1132. sizeof(u32), GFP_KERNEL);
  1133. if (!dyn_clk_caps->bit_clk_list)
  1134. return -ENOMEM;
  1135. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1136. dyn_clk_caps->bit_clk_list,
  1137. dyn_clk_caps->bit_clk_list_len);
  1138. if (rc) {
  1139. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1140. return -EINVAL;
  1141. }
  1142. dyn_clk_caps->dyn_clk_support = true;
  1143. type = utils->get_property(utils->data,
  1144. "qcom,dsi-dyn-clk-type", NULL);
  1145. if (!type) {
  1146. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1147. dyn_clk_caps->maintain_const_fps = false;
  1148. return 0;
  1149. }
  1150. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1151. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1152. dyn_clk_caps->maintain_const_fps = true;
  1153. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1154. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1155. dyn_clk_caps->maintain_const_fps = true;
  1156. } else {
  1157. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1158. dyn_clk_caps->maintain_const_fps = false;
  1159. }
  1160. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1161. return 0;
  1162. }
  1163. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1164. {
  1165. int rc = 0;
  1166. bool supported = false;
  1167. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1168. struct dsi_parser_utils *utils = &panel->utils;
  1169. const char *name = panel->name;
  1170. const char *type;
  1171. u32 i;
  1172. supported = utils->read_bool(utils->data,
  1173. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1174. if (!supported) {
  1175. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1176. dfps_caps->dfps_support = false;
  1177. return rc;
  1178. }
  1179. type = utils->get_property(utils->data,
  1180. "qcom,mdss-dsi-pan-fps-update", NULL);
  1181. if (!type) {
  1182. DSI_ERR("[%s] dfps type not defined\n", name);
  1183. rc = -EINVAL;
  1184. goto error;
  1185. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1186. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1187. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1188. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1189. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1190. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1191. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1192. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1193. } else {
  1194. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1195. rc = -EINVAL;
  1196. goto error;
  1197. }
  1198. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1199. "qcom,dsi-supported-dfps-list");
  1200. if (dfps_caps->dfps_list_len < 1) {
  1201. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1202. rc = -EINVAL;
  1203. goto error;
  1204. }
  1205. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1206. GFP_KERNEL);
  1207. if (!dfps_caps->dfps_list) {
  1208. rc = -ENOMEM;
  1209. goto error;
  1210. }
  1211. rc = utils->read_u32_array(utils->data,
  1212. "qcom,dsi-supported-dfps-list",
  1213. dfps_caps->dfps_list,
  1214. dfps_caps->dfps_list_len);
  1215. if (rc) {
  1216. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1217. rc = -EINVAL;
  1218. goto error;
  1219. }
  1220. dfps_caps->dfps_support = true;
  1221. /* calculate max and min fps */
  1222. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1223. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1224. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1225. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1226. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1227. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1228. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1229. }
  1230. error:
  1231. return rc;
  1232. }
  1233. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1234. struct dsi_parser_utils *utils,
  1235. const char *name)
  1236. {
  1237. int rc = 0;
  1238. const char *traffic_mode;
  1239. u32 vc_id = 0;
  1240. u32 val = 0;
  1241. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1242. if (rc) {
  1243. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1244. cfg->pulse_mode_hsa_he = false;
  1245. } else if (val == 1) {
  1246. cfg->pulse_mode_hsa_he = true;
  1247. } else if (val == 0) {
  1248. cfg->pulse_mode_hsa_he = false;
  1249. } else {
  1250. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1251. name);
  1252. rc = -EINVAL;
  1253. goto error;
  1254. }
  1255. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1256. "qcom,mdss-dsi-hfp-power-mode");
  1257. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1258. "qcom,mdss-dsi-hbp-power-mode");
  1259. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1260. "qcom,mdss-dsi-hsa-power-mode");
  1261. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1262. "qcom,mdss-dsi-last-line-interleave");
  1263. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1264. "qcom,mdss-dsi-bllp-eof-power-mode");
  1265. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1266. "qcom,mdss-dsi-bllp-power-mode");
  1267. traffic_mode = utils->get_property(utils->data,
  1268. "qcom,mdss-dsi-traffic-mode",
  1269. NULL);
  1270. if (!traffic_mode) {
  1271. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1272. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1273. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1274. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1275. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1276. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1277. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1278. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1279. } else {
  1280. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1281. traffic_mode);
  1282. rc = -EINVAL;
  1283. goto error;
  1284. }
  1285. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1286. &vc_id);
  1287. if (rc) {
  1288. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1289. cfg->vc_id = 0;
  1290. } else {
  1291. cfg->vc_id = vc_id;
  1292. }
  1293. error:
  1294. return rc;
  1295. }
  1296. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1297. struct dsi_parser_utils *utils,
  1298. const char *name)
  1299. {
  1300. u32 val = 0;
  1301. int rc = 0;
  1302. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1303. if (rc) {
  1304. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1305. cfg->wr_mem_start = 0x2C;
  1306. } else {
  1307. cfg->wr_mem_start = val;
  1308. }
  1309. val = 0;
  1310. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1311. &val);
  1312. if (rc) {
  1313. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1314. cfg->wr_mem_continue = 0x3C;
  1315. } else {
  1316. cfg->wr_mem_continue = val;
  1317. }
  1318. /* TODO: fix following */
  1319. cfg->max_cmd_packets_interleave = 0;
  1320. val = 0;
  1321. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1322. &val);
  1323. if (rc) {
  1324. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1325. cfg->insert_dcs_command = true;
  1326. } else if (val == 1) {
  1327. cfg->insert_dcs_command = true;
  1328. } else if (val == 0) {
  1329. cfg->insert_dcs_command = false;
  1330. } else {
  1331. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1332. name);
  1333. rc = -EINVAL;
  1334. goto error;
  1335. }
  1336. error:
  1337. return rc;
  1338. }
  1339. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1340. {
  1341. int rc = 0;
  1342. struct dsi_parser_utils *utils = &panel->utils;
  1343. bool panel_mode_switch_enabled;
  1344. enum dsi_op_mode panel_mode;
  1345. const char *mode;
  1346. mode = utils->get_property(utils->data,
  1347. "qcom,mdss-dsi-panel-type", NULL);
  1348. if (!mode) {
  1349. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1350. panel_mode = DSI_OP_VIDEO_MODE;
  1351. } else if (!strcmp(mode, "dsi_video_mode")) {
  1352. panel_mode = DSI_OP_VIDEO_MODE;
  1353. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1354. panel_mode = DSI_OP_CMD_MODE;
  1355. } else {
  1356. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1357. rc = -EINVAL;
  1358. goto error;
  1359. }
  1360. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1361. "qcom,mdss-dsi-panel-mode-switch");
  1362. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1363. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1364. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1365. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1366. utils,
  1367. panel->name);
  1368. if (rc) {
  1369. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1370. panel->name, rc);
  1371. goto error;
  1372. }
  1373. }
  1374. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1375. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1376. utils,
  1377. panel->name);
  1378. if (rc) {
  1379. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1380. panel->name, rc);
  1381. goto error;
  1382. }
  1383. }
  1384. panel->poms_align_vsync = utils->read_bool(utils->data,
  1385. "qcom,poms-align-panel-vsync");
  1386. panel->panel_mode = panel_mode;
  1387. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1388. error:
  1389. return rc;
  1390. }
  1391. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1392. {
  1393. int rc = 0;
  1394. u32 val = 0;
  1395. const char *str;
  1396. struct dsi_panel_phy_props *props = &panel->phy_props;
  1397. struct dsi_parser_utils *utils = &panel->utils;
  1398. const char *name = panel->name;
  1399. rc = utils->read_u32(utils->data,
  1400. "qcom,mdss-pan-physical-width-dimension", &val);
  1401. if (rc) {
  1402. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1403. props->panel_width_mm = 0;
  1404. rc = 0;
  1405. } else {
  1406. props->panel_width_mm = val;
  1407. }
  1408. rc = utils->read_u32(utils->data,
  1409. "qcom,mdss-pan-physical-height-dimension",
  1410. &val);
  1411. if (rc) {
  1412. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1413. props->panel_height_mm = 0;
  1414. rc = 0;
  1415. } else {
  1416. props->panel_height_mm = val;
  1417. }
  1418. str = utils->get_property(utils->data,
  1419. "qcom,mdss-dsi-panel-orientation", NULL);
  1420. if (!str) {
  1421. props->rotation = DSI_PANEL_ROTATE_NONE;
  1422. } else if (!strcmp(str, "180")) {
  1423. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1424. } else if (!strcmp(str, "hflip")) {
  1425. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1426. } else if (!strcmp(str, "vflip")) {
  1427. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1428. } else {
  1429. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1430. rc = -EINVAL;
  1431. goto error;
  1432. }
  1433. error:
  1434. return rc;
  1435. }
  1436. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1437. "qcom,mdss-dsi-pre-on-command",
  1438. "qcom,mdss-dsi-on-command",
  1439. "qcom,mdss-dsi-post-panel-on-command",
  1440. "qcom,mdss-dsi-pre-off-command",
  1441. "qcom,mdss-dsi-off-command",
  1442. "qcom,mdss-dsi-post-off-command",
  1443. "qcom,mdss-dsi-pre-res-switch",
  1444. "qcom,mdss-dsi-res-switch",
  1445. "qcom,mdss-dsi-post-res-switch",
  1446. "qcom,cmd-to-video-mode-switch-commands",
  1447. "qcom,cmd-to-video-mode-post-switch-commands",
  1448. "qcom,video-to-cmd-mode-switch-commands",
  1449. "qcom,video-to-cmd-mode-post-switch-commands",
  1450. "qcom,mdss-dsi-panel-status-command",
  1451. "qcom,mdss-dsi-lp1-command",
  1452. "qcom,mdss-dsi-lp2-command",
  1453. "qcom,mdss-dsi-nolp-command",
  1454. "PPS not parsed from DTSI, generated dynamically",
  1455. "ROI not parsed from DTSI, generated dynamically",
  1456. "qcom,mdss-dsi-timing-switch-command",
  1457. "qcom,mdss-dsi-post-mode-switch-on-command",
  1458. "qcom,mdss-dsi-qsync-on-commands",
  1459. "qcom,mdss-dsi-qsync-off-commands",
  1460. };
  1461. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1462. "qcom,mdss-dsi-pre-on-command-state",
  1463. "qcom,mdss-dsi-on-command-state",
  1464. "qcom,mdss-dsi-post-on-command-state",
  1465. "qcom,mdss-dsi-pre-off-command-state",
  1466. "qcom,mdss-dsi-off-command-state",
  1467. "qcom,mdss-dsi-post-off-command-state",
  1468. "qcom,mdss-dsi-pre-res-switch-state",
  1469. "qcom,mdss-dsi-res-switch-state",
  1470. "qcom,mdss-dsi-post-res-switch-state",
  1471. "qcom,cmd-to-video-mode-switch-commands-state",
  1472. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1473. "qcom,video-to-cmd-mode-switch-commands-state",
  1474. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1475. "qcom,mdss-dsi-panel-status-command-state",
  1476. "qcom,mdss-dsi-lp1-command-state",
  1477. "qcom,mdss-dsi-lp2-command-state",
  1478. "qcom,mdss-dsi-nolp-command-state",
  1479. "PPS not parsed from DTSI, generated dynamically",
  1480. "ROI not parsed from DTSI, generated dynamically",
  1481. "qcom,mdss-dsi-timing-switch-command-state",
  1482. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1483. "qcom,mdss-dsi-qsync-on-commands-state",
  1484. "qcom,mdss-dsi-qsync-off-commands-state",
  1485. };
  1486. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1487. {
  1488. const u32 cmd_set_min_size = 7;
  1489. u32 count = 0;
  1490. u32 packet_length;
  1491. u32 tmp;
  1492. while (length >= cmd_set_min_size) {
  1493. packet_length = cmd_set_min_size;
  1494. tmp = ((data[5] << 8) | (data[6]));
  1495. packet_length += tmp;
  1496. if (packet_length > length) {
  1497. DSI_ERR("format error\n");
  1498. return -EINVAL;
  1499. }
  1500. length -= packet_length;
  1501. data += packet_length;
  1502. count++;
  1503. }
  1504. *cnt = count;
  1505. return 0;
  1506. }
  1507. int dsi_panel_create_cmd_packets(const char *data,
  1508. u32 length,
  1509. u32 count,
  1510. struct dsi_cmd_desc *cmd)
  1511. {
  1512. int rc = 0;
  1513. int i, j;
  1514. u8 *payload;
  1515. for (i = 0; i < count; i++) {
  1516. u32 size;
  1517. cmd[i].msg.type = data[0];
  1518. cmd[i].last_command = (data[1] == 1);
  1519. cmd[i].msg.channel = data[2];
  1520. cmd[i].msg.flags |= data[3];
  1521. cmd[i].msg.ctrl = 0;
  1522. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1523. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1524. size = cmd[i].msg.tx_len * sizeof(u8);
  1525. payload = kzalloc(size, GFP_KERNEL);
  1526. if (!payload) {
  1527. rc = -ENOMEM;
  1528. goto error_free_payloads;
  1529. }
  1530. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1531. payload[j] = data[7 + j];
  1532. cmd[i].msg.tx_buf = payload;
  1533. data += (7 + cmd[i].msg.tx_len);
  1534. }
  1535. return rc;
  1536. error_free_payloads:
  1537. for (i = i - 1; i >= 0; i--) {
  1538. cmd--;
  1539. kfree(cmd->msg.tx_buf);
  1540. }
  1541. return rc;
  1542. }
  1543. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1544. {
  1545. u32 i = 0;
  1546. struct dsi_cmd_desc *cmd;
  1547. for (i = 0; i < set->count; i++) {
  1548. cmd = &set->cmds[i];
  1549. kfree(cmd->msg.tx_buf);
  1550. }
  1551. }
  1552. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1553. {
  1554. kfree(set->cmds);
  1555. }
  1556. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1557. u32 packet_count)
  1558. {
  1559. u32 size;
  1560. size = packet_count * sizeof(*cmd->cmds);
  1561. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1562. if (!cmd->cmds)
  1563. return -ENOMEM;
  1564. cmd->count = packet_count;
  1565. return 0;
  1566. }
  1567. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1568. enum dsi_cmd_set_type type,
  1569. struct dsi_parser_utils *utils)
  1570. {
  1571. int rc = 0;
  1572. u32 length = 0;
  1573. const char *data;
  1574. const char *state;
  1575. u32 packet_count = 0;
  1576. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1577. &length);
  1578. if (!data) {
  1579. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1580. rc = -ENOTSUPP;
  1581. goto error;
  1582. }
  1583. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1584. cmd_set_prop_map[type], length);
  1585. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1586. 8, 1, data, length, false);
  1587. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1588. if (rc) {
  1589. DSI_ERR("commands failed, rc=%d\n", rc);
  1590. goto error;
  1591. }
  1592. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1593. packet_count, length);
  1594. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1595. if (rc) {
  1596. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1597. goto error;
  1598. }
  1599. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1600. cmd->cmds);
  1601. if (rc) {
  1602. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1603. goto error_free_mem;
  1604. }
  1605. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1606. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1607. cmd->state = DSI_CMD_SET_STATE_LP;
  1608. } else if (!strcmp(state, "dsi_hs_mode")) {
  1609. cmd->state = DSI_CMD_SET_STATE_HS;
  1610. } else {
  1611. DSI_ERR("[%s] command state unrecognized-%s\n",
  1612. cmd_set_state_map[type], state);
  1613. goto error_free_mem;
  1614. }
  1615. return rc;
  1616. error_free_mem:
  1617. kfree(cmd->cmds);
  1618. cmd->cmds = NULL;
  1619. error:
  1620. return rc;
  1621. }
  1622. static int dsi_panel_parse_cmd_sets(
  1623. struct dsi_display_mode_priv_info *priv_info,
  1624. struct dsi_parser_utils *utils)
  1625. {
  1626. int rc = 0;
  1627. struct dsi_panel_cmd_set *set;
  1628. u32 i;
  1629. if (!priv_info) {
  1630. DSI_ERR("invalid mode priv info\n");
  1631. return -EINVAL;
  1632. }
  1633. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1634. set = &priv_info->cmd_sets[i];
  1635. set->type = i;
  1636. set->count = 0;
  1637. if (i == DSI_CMD_SET_PPS) {
  1638. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1639. if (rc)
  1640. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1641. i, rc);
  1642. set->state = DSI_CMD_SET_STATE_LP;
  1643. } else {
  1644. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1645. if (rc)
  1646. DSI_DEBUG("failed to parse set %d\n", i);
  1647. }
  1648. }
  1649. rc = 0;
  1650. return rc;
  1651. }
  1652. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1653. {
  1654. int rc = 0;
  1655. int i;
  1656. u32 length = 0;
  1657. u32 count = 0;
  1658. u32 size = 0;
  1659. u32 *arr_32 = NULL;
  1660. const u32 *arr;
  1661. struct dsi_parser_utils *utils = &panel->utils;
  1662. struct dsi_reset_seq *seq;
  1663. if (panel->host_config.ext_bridge_mode)
  1664. return 0;
  1665. arr = utils->get_property(utils->data,
  1666. "qcom,mdss-dsi-reset-sequence", &length);
  1667. if (!arr) {
  1668. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1669. rc = -EINVAL;
  1670. goto error;
  1671. }
  1672. if (length & 0x1) {
  1673. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1674. panel->name);
  1675. rc = -EINVAL;
  1676. goto error;
  1677. }
  1678. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1679. length = length / sizeof(u32);
  1680. size = length * sizeof(u32);
  1681. arr_32 = kzalloc(size, GFP_KERNEL);
  1682. if (!arr_32) {
  1683. rc = -ENOMEM;
  1684. goto error;
  1685. }
  1686. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1687. arr_32, length);
  1688. if (rc) {
  1689. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1690. goto error_free_arr_32;
  1691. }
  1692. count = length / 2;
  1693. size = count * sizeof(*seq);
  1694. seq = kzalloc(size, GFP_KERNEL);
  1695. if (!seq) {
  1696. rc = -ENOMEM;
  1697. goto error_free_arr_32;
  1698. }
  1699. panel->reset_config.sequence = seq;
  1700. panel->reset_config.count = count;
  1701. for (i = 0; i < length; i += 2) {
  1702. seq->level = arr_32[i];
  1703. seq->sleep_ms = arr_32[i + 1];
  1704. seq++;
  1705. }
  1706. error_free_arr_32:
  1707. kfree(arr_32);
  1708. error:
  1709. return rc;
  1710. }
  1711. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1712. {
  1713. struct dsi_parser_utils *utils = &panel->utils;
  1714. const char *string;
  1715. int i, rc = 0;
  1716. panel->ulps_feature_enabled =
  1717. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1718. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1719. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1720. panel->ulps_suspend_enabled =
  1721. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1722. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1723. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1724. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1725. "qcom,mdss-dsi-te-using-wd");
  1726. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1727. "qcom,cmd-sync-wait-broadcast");
  1728. panel->lp11_init = utils->read_bool(utils->data,
  1729. "qcom,mdss-dsi-lp11-init");
  1730. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1731. "qcom,platform-reset-gpio-always-on");
  1732. panel->spr_info.enable = false;
  1733. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1734. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1735. if (!rc) {
  1736. // find match for pack-type string
  1737. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1738. if (msm_spr_pack_type_str[i] &&
  1739. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1740. panel->spr_info.enable = true;
  1741. panel->spr_info.pack_type = i;
  1742. break;
  1743. }
  1744. }
  1745. }
  1746. pr_debug("%s source side spr packing, pack-type %s\n",
  1747. panel->spr_info.enable ? "enable" : "disable",
  1748. panel->spr_info.enable ?
  1749. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1750. return 0;
  1751. }
  1752. static int dsi_panel_parse_jitter_config(
  1753. struct dsi_display_mode *mode,
  1754. struct dsi_parser_utils *utils)
  1755. {
  1756. int rc;
  1757. struct dsi_display_mode_priv_info *priv_info;
  1758. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1759. u64 jitter_val = 0;
  1760. priv_info = mode->priv_info;
  1761. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1762. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1763. if (rc) {
  1764. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1765. } else {
  1766. jitter_val = jitter[0];
  1767. jitter_val = div_u64(jitter_val, jitter[1]);
  1768. }
  1769. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1770. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1771. priv_info->panel_jitter_denom =
  1772. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1773. } else {
  1774. priv_info->panel_jitter_numer = jitter[0];
  1775. priv_info->panel_jitter_denom = jitter[1];
  1776. }
  1777. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1778. &priv_info->panel_prefill_lines);
  1779. if (rc) {
  1780. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1781. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1782. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1783. } else if (priv_info->panel_prefill_lines >=
  1784. DSI_V_TOTAL(&mode->timing)) {
  1785. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1786. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1787. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1788. }
  1789. return 0;
  1790. }
  1791. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1792. {
  1793. int rc = 0;
  1794. char *supply_name;
  1795. if (panel->host_config.ext_bridge_mode)
  1796. return 0;
  1797. if (!strcmp(panel->type, "primary"))
  1798. supply_name = "qcom,panel-supply-entries";
  1799. else
  1800. supply_name = "qcom,panel-sec-supply-entries";
  1801. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1802. &panel->power_info, supply_name);
  1803. if (rc) {
  1804. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1805. goto error;
  1806. }
  1807. error:
  1808. return rc;
  1809. }
  1810. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1811. struct msm_io_res *io_res)
  1812. {
  1813. struct list_head temp_head;
  1814. struct msm_io_mem_entry *io_mem, *pos, *tmp;
  1815. struct list_head *mem_list = &io_res->mem;
  1816. int i, rc = 0;
  1817. INIT_LIST_HEAD(&temp_head);
  1818. for (i = 0; i < panel->tlmm_gpio_count; i++) {
  1819. io_mem = kzalloc(sizeof(*io_mem), GFP_KERNEL);
  1820. if (!io_mem) {
  1821. rc = -ENOMEM;
  1822. goto parse_fail;
  1823. }
  1824. io_mem->base = panel->tlmm_gpio[i].addr;
  1825. io_mem->size = panel->tlmm_gpio[i].size;
  1826. list_add(&io_mem->list, &temp_head);
  1827. }
  1828. list_splice(&temp_head, mem_list);
  1829. goto end;
  1830. parse_fail:
  1831. list_for_each_entry_safe(pos, tmp, &temp_head, list) {
  1832. list_del(&pos->list);
  1833. kfree(pos);
  1834. }
  1835. end:
  1836. return rc;
  1837. }
  1838. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1839. {
  1840. int rc = 0;
  1841. const char *data;
  1842. struct dsi_parser_utils *utils = &panel->utils;
  1843. char *reset_gpio_name, *mode_set_gpio_name;
  1844. if (!strcmp(panel->type, "primary")) {
  1845. reset_gpio_name = "qcom,platform-reset-gpio";
  1846. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1847. } else {
  1848. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1849. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1850. }
  1851. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1852. reset_gpio_name, 0);
  1853. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1854. !panel->host_config.ext_bridge_mode) {
  1855. rc = panel->reset_config.reset_gpio;
  1856. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1857. goto error;
  1858. }
  1859. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1860. "qcom,5v-boost-gpio",
  1861. 0);
  1862. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1863. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1864. panel->name, rc);
  1865. panel->reset_config.disp_en_gpio =
  1866. utils->get_named_gpio(utils->data,
  1867. "qcom,platform-en-gpio", 0);
  1868. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1869. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1870. panel->name, rc);
  1871. }
  1872. }
  1873. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1874. utils->data, mode_set_gpio_name, 0);
  1875. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1876. DSI_DEBUG("mode gpio not specified\n");
  1877. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1878. data = utils->get_property(utils->data,
  1879. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1880. if (data) {
  1881. if (!strcmp(data, "single_port"))
  1882. panel->reset_config.mode_sel_state =
  1883. MODE_SEL_SINGLE_PORT;
  1884. else if (!strcmp(data, "dual_port"))
  1885. panel->reset_config.mode_sel_state =
  1886. MODE_SEL_DUAL_PORT;
  1887. else if (!strcmp(data, "high"))
  1888. panel->reset_config.mode_sel_state =
  1889. MODE_GPIO_HIGH;
  1890. else if (!strcmp(data, "low"))
  1891. panel->reset_config.mode_sel_state =
  1892. MODE_GPIO_LOW;
  1893. } else {
  1894. /* Set default mode as SPLIT mode */
  1895. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1896. }
  1897. /* TODO: release memory */
  1898. rc = dsi_panel_parse_reset_sequence(panel);
  1899. if (rc) {
  1900. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1901. panel->name, rc);
  1902. goto error;
  1903. }
  1904. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1905. "qcom,mdss-dsi-panel-test-pin",
  1906. 0);
  1907. if (!gpio_is_valid(panel->panel_test_gpio))
  1908. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1909. __LINE__);
  1910. error:
  1911. return rc;
  1912. }
  1913. static int dsi_panel_parse_tlmm_gpio(struct dsi_panel *panel)
  1914. {
  1915. struct dsi_parser_utils *utils = &panel->utils;
  1916. u32 base, size, pin;
  1917. int pin_count, address_count, name_count, i;
  1918. address_count = of_property_count_u32_elems(utils->data,
  1919. "qcom,dsi-panel-gpio-address");
  1920. if (address_count != 2) {
  1921. DSI_DEBUG("panel gpio address not defined\n");
  1922. return 0;
  1923. }
  1924. of_property_read_u32_index(utils->data,
  1925. "qcom,dsi-panel-gpio-address", 0, &base);
  1926. of_property_read_u32_index(utils->data,
  1927. "qcom,dsi-panel-gpio-address", 1, &size);
  1928. pin_count = of_property_count_u32_elems(utils->data,
  1929. "qcom,dsi-panel-gpio-pins");
  1930. name_count = of_property_count_strings(utils->data,
  1931. "qcom,dsi-panel-gpio-names");
  1932. if ((pin_count < 0) || (name_count < 0) || (pin_count != name_count)) {
  1933. DSI_ERR("invalid gpio pins/names\n");
  1934. return -EINVAL;
  1935. }
  1936. panel->tlmm_gpio = kcalloc(pin_count,
  1937. sizeof(struct dsi_tlmm_gpio), GFP_KERNEL);
  1938. if (!panel->tlmm_gpio)
  1939. return -ENOMEM;
  1940. panel->tlmm_gpio_count = pin_count;
  1941. for (i = 0; i < pin_count; i++) {
  1942. of_property_read_u32_index(utils->data,
  1943. "qcom,dsi-panel-gpio-pins", i, &pin);
  1944. panel->tlmm_gpio[i].num = pin;
  1945. panel->tlmm_gpio[i].addr = base + (pin * size);
  1946. panel->tlmm_gpio[i].size = size;
  1947. of_property_read_string_index(utils->data,
  1948. "qcom,dsi-panel-gpio-names", i,
  1949. &(panel->tlmm_gpio[i].name));
  1950. }
  1951. return 0;
  1952. }
  1953. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1954. {
  1955. int rc = 0;
  1956. u32 val;
  1957. struct dsi_backlight_config *config = &panel->bl_config;
  1958. struct dsi_parser_utils *utils = &panel->utils;
  1959. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1960. &val);
  1961. if (rc) {
  1962. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1963. goto error;
  1964. }
  1965. config->pwm_period_usecs = val;
  1966. error:
  1967. return rc;
  1968. }
  1969. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1970. {
  1971. int rc = 0;
  1972. u32 val = 0;
  1973. const char *bl_type = NULL;
  1974. const char *data = NULL;
  1975. const char *state = NULL;
  1976. struct dsi_parser_utils *utils = &panel->utils;
  1977. char *bl_name = NULL;
  1978. if (!strcmp(panel->type, "primary"))
  1979. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1980. else
  1981. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1982. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1983. if (!bl_type) {
  1984. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1985. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1986. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1987. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1988. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1989. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1990. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1991. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1992. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1993. } else {
  1994. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1995. panel->name, bl_type);
  1996. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1997. }
  1998. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1999. if (!data) {
  2000. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2001. } else if (!strcmp(data, "delay_until_first_frame")) {
  2002. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2003. } else {
  2004. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2005. panel->name, data);
  2006. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2007. }
  2008. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2009. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2010. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2011. if (rc) {
  2012. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2013. panel->name);
  2014. panel->bl_config.bl_min_level = 0;
  2015. } else {
  2016. panel->bl_config.bl_min_level = val;
  2017. }
  2018. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2019. if (rc) {
  2020. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2021. panel->name);
  2022. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2023. } else {
  2024. panel->bl_config.bl_max_level = val;
  2025. }
  2026. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2027. &val);
  2028. if (rc) {
  2029. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2030. panel->name);
  2031. panel->bl_config.brightness_max_level = 255;
  2032. rc = 0;
  2033. } else {
  2034. panel->bl_config.brightness_max_level = val;
  2035. }
  2036. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2037. "qcom,mdss-dsi-bl-inverted-dbv");
  2038. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2039. if (!state || !strcmp(state, "dsi_hs_mode"))
  2040. panel->bl_config.lp_mode = false;
  2041. else if (!strcmp(state, "dsi_lp_mode"))
  2042. panel->bl_config.lp_mode = true;
  2043. else
  2044. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2045. state);
  2046. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2047. rc = dsi_panel_parse_bl_pwm_config(panel);
  2048. if (rc) {
  2049. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2050. panel->name, rc);
  2051. goto error;
  2052. }
  2053. }
  2054. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2055. "qcom,platform-bklight-en-gpio",
  2056. 0);
  2057. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2058. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2059. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2060. panel->name, rc);
  2061. rc = -EPROBE_DEFER;
  2062. goto error;
  2063. } else {
  2064. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2065. panel->name, rc);
  2066. rc = 0;
  2067. goto error;
  2068. }
  2069. }
  2070. error:
  2071. return rc;
  2072. }
  2073. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2074. struct dsi_parser_utils *utils)
  2075. {
  2076. const char *data;
  2077. u32 len, i;
  2078. int rc = 0;
  2079. struct dsi_display_mode_priv_info *priv_info;
  2080. u64 pixel_clk_khz;
  2081. if (!mode || !mode->priv_info)
  2082. return -EINVAL;
  2083. priv_info = mode->priv_info;
  2084. data = utils->get_property(utils->data,
  2085. "qcom,mdss-dsi-panel-phy-timings", &len);
  2086. if (!data) {
  2087. DSI_DEBUG("Unable to read Phy timing settings\n");
  2088. } else {
  2089. priv_info->phy_timing_val =
  2090. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2091. if (!priv_info->phy_timing_val)
  2092. return -EINVAL;
  2093. for (i = 0; i < len; i++)
  2094. priv_info->phy_timing_val[i] = data[i];
  2095. priv_info->phy_timing_len = len;
  2096. }
  2097. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  2098. /*
  2099. * For command mode we update the pclk as part of
  2100. * function dsi_panel_calc_dsi_transfer_time( )
  2101. * as we set it based on dsi clock or mdp transfer time.
  2102. */
  2103. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2104. DSI_V_TOTAL(&mode->timing) *
  2105. mode->timing.refresh_rate);
  2106. do_div(pixel_clk_khz, 1000);
  2107. mode->pixel_clk_khz = pixel_clk_khz;
  2108. }
  2109. return rc;
  2110. }
  2111. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2112. struct dsi_parser_utils *utils)
  2113. {
  2114. u32 data;
  2115. int rc = -EINVAL;
  2116. int intf_width;
  2117. const char *compression;
  2118. struct dsi_display_mode_priv_info *priv_info;
  2119. if (!mode || !mode->priv_info)
  2120. return -EINVAL;
  2121. priv_info = mode->priv_info;
  2122. priv_info->dsc_enabled = false;
  2123. compression = utils->get_property(utils->data,
  2124. "qcom,compression-mode", NULL);
  2125. if (compression && !strcmp(compression, "dsc"))
  2126. priv_info->dsc_enabled = true;
  2127. if (!priv_info->dsc_enabled) {
  2128. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2129. return 0;
  2130. }
  2131. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2132. if (rc) {
  2133. priv_info->dsc.config.dsc_version_major = 0x1;
  2134. priv_info->dsc.config.dsc_version_minor = 0x1;
  2135. rc = 0;
  2136. } else {
  2137. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2138. * major version information
  2139. */
  2140. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2141. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2142. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2143. ((priv_info->dsc.config.dsc_version_minor
  2144. != 0x1) &&
  2145. (priv_info->dsc.config.dsc_version_minor
  2146. != 0x2))) {
  2147. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2148. __func__,
  2149. priv_info->dsc.config.dsc_version_major,
  2150. priv_info->dsc.config.dsc_version_minor
  2151. );
  2152. rc = -EINVAL;
  2153. goto error;
  2154. }
  2155. }
  2156. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2157. if (rc) {
  2158. priv_info->dsc.scr_rev = 0x0;
  2159. rc = 0;
  2160. } else {
  2161. priv_info->dsc.scr_rev = data & 0xff;
  2162. /* only one scr rev supported */
  2163. if (priv_info->dsc.scr_rev > 0x1) {
  2164. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2165. __func__, priv_info->dsc.scr_rev);
  2166. rc = -EINVAL;
  2167. goto error;
  2168. }
  2169. }
  2170. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2171. if (rc) {
  2172. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2173. goto error;
  2174. }
  2175. priv_info->dsc.config.slice_height = data;
  2176. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2177. if (rc) {
  2178. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2179. goto error;
  2180. }
  2181. priv_info->dsc.config.slice_width = data;
  2182. intf_width = mode->timing.h_active;
  2183. if (intf_width % priv_info->dsc.config.slice_width) {
  2184. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2185. intf_width, priv_info->dsc.config.slice_width);
  2186. rc = -EINVAL;
  2187. goto error;
  2188. }
  2189. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2190. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2191. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2192. if (rc) {
  2193. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2194. goto error;
  2195. } else if (!data || (data > 2)) {
  2196. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2197. goto error;
  2198. }
  2199. priv_info->dsc.slice_per_pkt = data;
  2200. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2201. &data);
  2202. if (rc) {
  2203. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2204. goto error;
  2205. }
  2206. priv_info->dsc.config.bits_per_component = data;
  2207. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2208. if (rc) {
  2209. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2210. data = 0;
  2211. }
  2212. priv_info->dsc.pps_delay_ms = data;
  2213. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2214. &data);
  2215. if (rc) {
  2216. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2217. goto error;
  2218. }
  2219. priv_info->dsc.config.bits_per_pixel = data << 4;
  2220. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2221. &data);
  2222. if (rc) {
  2223. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2224. rc = 0;
  2225. data = MSM_CHROMA_444;
  2226. }
  2227. priv_info->dsc.chroma_format = data;
  2228. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2229. &data);
  2230. if (rc) {
  2231. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2232. rc = 0;
  2233. data = MSM_RGB;
  2234. }
  2235. priv_info->dsc.source_color_space = data;
  2236. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2237. "qcom,mdss-dsc-block-prediction-enable");
  2238. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2239. priv_info->dsc.config.slice_width);
  2240. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2241. priv_info->dsc.scr_rev);
  2242. if (rc) {
  2243. DSI_DEBUG("failed populating dsc params\n");
  2244. rc = -EINVAL;
  2245. goto error;
  2246. }
  2247. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2248. if (rc) {
  2249. DSI_DEBUG("failed populating other dsc params\n");
  2250. rc = -EINVAL;
  2251. goto error;
  2252. }
  2253. priv_info->pclk_scale.numer =
  2254. priv_info->dsc.config.bits_per_pixel >> 4;
  2255. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2256. priv_info->dsc.chroma_format,
  2257. priv_info->dsc.config.bits_per_component);
  2258. mode->timing.dsc_enabled = true;
  2259. mode->timing.dsc = &priv_info->dsc;
  2260. mode->timing.pclk_scale = priv_info->pclk_scale;
  2261. error:
  2262. return rc;
  2263. }
  2264. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2265. struct dsi_parser_utils *utils, int traffic_mode, int panel_mode)
  2266. {
  2267. u32 data;
  2268. int rc = -EINVAL;
  2269. const char *compression;
  2270. struct dsi_display_mode_priv_info *priv_info;
  2271. int intf_width;
  2272. if (!mode || !mode->priv_info)
  2273. return -EINVAL;
  2274. priv_info = mode->priv_info;
  2275. priv_info->vdc_enabled = false;
  2276. compression = utils->get_property(utils->data,
  2277. "qcom,compression-mode", NULL);
  2278. if (compression && !strcmp(compression, "vdc"))
  2279. priv_info->vdc_enabled = true;
  2280. if (!priv_info->vdc_enabled) {
  2281. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2282. return 0;
  2283. }
  2284. priv_info->vdc.panel_mode = panel_mode;
  2285. priv_info->vdc.traffic_mode = traffic_mode;
  2286. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2287. if (rc) {
  2288. priv_info->vdc.version_major = 0x1;
  2289. priv_info->vdc.version_minor = 0x2;
  2290. priv_info->vdc.version_release = 0x0;
  2291. rc = 0;
  2292. } else {
  2293. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2294. * major version information
  2295. */
  2296. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2297. priv_info->vdc.version_minor = data & 0x0F;
  2298. if ((priv_info->vdc.version_major != 0x1) &&
  2299. ((priv_info->vdc.version_minor
  2300. != 0x2))) {
  2301. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2302. __func__,
  2303. priv_info->vdc.version_major,
  2304. priv_info->vdc.version_minor
  2305. );
  2306. rc = -EINVAL;
  2307. goto error;
  2308. }
  2309. }
  2310. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2311. if (rc) {
  2312. priv_info->vdc.version_release = 0x0;
  2313. rc = 0;
  2314. } else {
  2315. priv_info->vdc.version_release = data & 0xff;
  2316. /* only one release version is supported */
  2317. if (priv_info->vdc.version_release != 0x0) {
  2318. DSI_ERR("unsupported vdc release version %d\n",
  2319. priv_info->vdc.version_release);
  2320. rc = -EINVAL;
  2321. goto error;
  2322. }
  2323. }
  2324. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2325. priv_info->vdc.version_major,
  2326. priv_info->vdc.version_minor,
  2327. priv_info->vdc.version_release);
  2328. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2329. if (rc) {
  2330. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2331. goto error;
  2332. }
  2333. priv_info->vdc.slice_height = data;
  2334. /* slice height should be atleast 16 lines */
  2335. if (priv_info->vdc.slice_height < 16) {
  2336. DSI_ERR("invalid slice height %d\n",
  2337. priv_info->vdc.slice_height);
  2338. rc = -EINVAL;
  2339. goto error;
  2340. }
  2341. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2342. if (rc) {
  2343. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2344. goto error;
  2345. }
  2346. priv_info->vdc.slice_width = data;
  2347. /*
  2348. * slide-width should be multiple of 8
  2349. * slice-width should be atlease 64 pixels
  2350. */
  2351. if ((priv_info->vdc.slice_width & 7) ||
  2352. (priv_info->vdc.slice_width < 64)) {
  2353. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2354. rc = -EINVAL;
  2355. goto error;
  2356. }
  2357. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2358. if (rc) {
  2359. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2360. goto error;
  2361. } else if (!data || (data > 2)) {
  2362. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2363. rc = -EINVAL;
  2364. goto error;
  2365. }
  2366. intf_width = mode->timing.h_active;
  2367. priv_info->vdc.slice_per_pkt = data;
  2368. priv_info->vdc.frame_width = mode->timing.h_active;
  2369. priv_info->vdc.frame_height = mode->timing.v_active;
  2370. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2371. &data);
  2372. if (rc) {
  2373. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2374. goto error;
  2375. }
  2376. priv_info->vdc.bits_per_component = data;
  2377. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2378. if (rc) {
  2379. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2380. data = 0;
  2381. }
  2382. priv_info->vdc.pps_delay_ms = data;
  2383. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2384. &data);
  2385. if (rc) {
  2386. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2387. goto error;
  2388. }
  2389. priv_info->vdc.bits_per_pixel = data << 4;
  2390. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2391. &data);
  2392. if (rc) {
  2393. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2394. rc = 0;
  2395. data = MSM_CHROMA_444;
  2396. }
  2397. priv_info->vdc.chroma_format = data;
  2398. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2399. &data);
  2400. if (rc) {
  2401. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2402. rc = 0;
  2403. data = MSM_RGB;
  2404. }
  2405. priv_info->vdc.source_color_space = data;
  2406. rc = sde_vdc_populate_config(&priv_info->vdc,
  2407. intf_width, traffic_mode);
  2408. if (rc) {
  2409. DSI_DEBUG("failed populating vdc config\n");
  2410. rc = -EINVAL;
  2411. goto error;
  2412. }
  2413. priv_info->pclk_scale.numer =
  2414. priv_info->vdc.bits_per_pixel >> 4;
  2415. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2416. priv_info->vdc.chroma_format,
  2417. priv_info->vdc.bits_per_component);
  2418. mode->timing.vdc_enabled = true;
  2419. mode->timing.vdc = &priv_info->vdc;
  2420. mode->timing.pclk_scale = priv_info->pclk_scale;
  2421. error:
  2422. return rc;
  2423. }
  2424. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2425. {
  2426. int rc = 0;
  2427. struct drm_panel_hdr_properties *hdr_prop;
  2428. struct dsi_parser_utils *utils = &panel->utils;
  2429. hdr_prop = &panel->hdr_props;
  2430. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2431. "qcom,mdss-dsi-panel-hdr-enabled");
  2432. if (hdr_prop->hdr_enabled) {
  2433. rc = utils->read_u32_array(utils->data,
  2434. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2435. hdr_prop->display_primaries,
  2436. DISPLAY_PRIMARIES_MAX);
  2437. if (rc) {
  2438. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2439. __func__, __LINE__, rc);
  2440. hdr_prop->hdr_enabled = false;
  2441. return rc;
  2442. }
  2443. rc = utils->read_u32(utils->data,
  2444. "qcom,mdss-dsi-panel-peak-brightness",
  2445. &(hdr_prop->peak_brightness));
  2446. if (rc) {
  2447. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2448. __func__, __LINE__, rc);
  2449. hdr_prop->hdr_enabled = false;
  2450. return rc;
  2451. }
  2452. rc = utils->read_u32(utils->data,
  2453. "qcom,mdss-dsi-panel-blackness-level",
  2454. &(hdr_prop->blackness_level));
  2455. if (rc) {
  2456. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2457. __func__, __LINE__, rc);
  2458. hdr_prop->hdr_enabled = false;
  2459. return rc;
  2460. }
  2461. }
  2462. return 0;
  2463. }
  2464. static int dsi_panel_parse_topology(
  2465. struct dsi_display_mode_priv_info *priv_info,
  2466. struct dsi_parser_utils *utils,
  2467. int topology_override)
  2468. {
  2469. struct msm_display_topology *topology;
  2470. u32 top_count, top_sel, *array = NULL;
  2471. int i, len = 0;
  2472. int rc = -EINVAL;
  2473. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2474. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2475. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2476. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2477. return rc;
  2478. }
  2479. top_count = len / TOPOLOGY_SET_LEN;
  2480. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2481. if (!array)
  2482. return -ENOMEM;
  2483. rc = utils->read_u32_array(utils->data,
  2484. "qcom,display-topology", array, len);
  2485. if (rc) {
  2486. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2487. goto read_fail;
  2488. }
  2489. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2490. if (!topology) {
  2491. rc = -ENOMEM;
  2492. goto read_fail;
  2493. }
  2494. for (i = 0; i < top_count; i++) {
  2495. struct msm_display_topology *top = &topology[i];
  2496. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2497. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2498. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2499. }
  2500. if (topology_override >= 0 && topology_override < top_count) {
  2501. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2502. topology_override,
  2503. topology[topology_override].num_lm,
  2504. topology[topology_override].num_enc,
  2505. topology[topology_override].num_intf);
  2506. top_sel = topology_override;
  2507. goto parse_done;
  2508. }
  2509. rc = utils->read_u32(utils->data,
  2510. "qcom,default-topology-index", &top_sel);
  2511. if (rc) {
  2512. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2513. goto parse_fail;
  2514. }
  2515. if (top_sel >= top_count) {
  2516. rc = -EINVAL;
  2517. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2518. rc);
  2519. goto parse_fail;
  2520. }
  2521. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2522. topology[top_sel].num_lm,
  2523. topology[top_sel].num_enc,
  2524. topology[top_sel].num_intf);
  2525. parse_done:
  2526. memcpy(&priv_info->topology, &topology[top_sel],
  2527. sizeof(struct msm_display_topology));
  2528. parse_fail:
  2529. kfree(topology);
  2530. read_fail:
  2531. kfree(array);
  2532. return rc;
  2533. }
  2534. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2535. struct msm_roi_alignment *align)
  2536. {
  2537. int len = 0, rc = 0;
  2538. u32 value[6];
  2539. struct property *data;
  2540. if (!align)
  2541. return -EINVAL;
  2542. memset(align, 0, sizeof(*align));
  2543. data = utils->find_property(utils->data,
  2544. "qcom,panel-roi-alignment", &len);
  2545. len /= sizeof(u32);
  2546. if (!data) {
  2547. DSI_ERR("panel roi alignment not found\n");
  2548. rc = -EINVAL;
  2549. } else if (len != 6) {
  2550. DSI_ERR("incorrect roi alignment len %d\n", len);
  2551. rc = -EINVAL;
  2552. } else {
  2553. rc = utils->read_u32_array(utils->data,
  2554. "qcom,panel-roi-alignment", value, len);
  2555. if (rc)
  2556. DSI_DEBUG("error reading panel roi alignment values\n");
  2557. else {
  2558. align->xstart_pix_align = value[0];
  2559. align->ystart_pix_align = value[1];
  2560. align->width_pix_align = value[2];
  2561. align->height_pix_align = value[3];
  2562. align->min_width = value[4];
  2563. align->min_height = value[5];
  2564. }
  2565. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2566. align->xstart_pix_align,
  2567. align->width_pix_align,
  2568. align->ystart_pix_align,
  2569. align->height_pix_align,
  2570. align->min_width,
  2571. align->min_height);
  2572. }
  2573. return rc;
  2574. }
  2575. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2576. struct dsi_parser_utils *utils)
  2577. {
  2578. struct msm_roi_caps *roi_caps = NULL;
  2579. const char *data;
  2580. int rc = 0;
  2581. if (!mode || !mode->priv_info) {
  2582. DSI_ERR("invalid arguments\n");
  2583. return -EINVAL;
  2584. }
  2585. roi_caps = &mode->priv_info->roi_caps;
  2586. memset(roi_caps, 0, sizeof(*roi_caps));
  2587. data = utils->get_property(utils->data,
  2588. "qcom,partial-update-enabled", NULL);
  2589. if (data) {
  2590. if (!strcmp(data, "dual_roi"))
  2591. roi_caps->num_roi = 2;
  2592. else if (!strcmp(data, "single_roi"))
  2593. roi_caps->num_roi = 1;
  2594. else {
  2595. DSI_INFO(
  2596. "invalid value for qcom,partial-update-enabled: %s\n",
  2597. data);
  2598. return 0;
  2599. }
  2600. } else {
  2601. DSI_DEBUG("partial update disabled as the property is not set\n");
  2602. return 0;
  2603. }
  2604. roi_caps->merge_rois = utils->read_bool(utils->data,
  2605. "qcom,partial-update-roi-merge");
  2606. roi_caps->enabled = roi_caps->num_roi > 0;
  2607. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2608. roi_caps->enabled);
  2609. if (roi_caps->enabled)
  2610. rc = dsi_panel_parse_roi_alignment(utils,
  2611. &roi_caps->align);
  2612. if (rc)
  2613. memset(roi_caps, 0, sizeof(*roi_caps));
  2614. return rc;
  2615. }
  2616. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2617. struct dsi_parser_utils *utils)
  2618. {
  2619. bool vid_mode_support, cmd_mode_support;
  2620. if (!mode || !mode->priv_info) {
  2621. DSI_ERR("invalid arguments\n");
  2622. return -EINVAL;
  2623. }
  2624. vid_mode_support = utils->read_bool(utils->data,
  2625. "qcom,mdss-dsi-video-mode");
  2626. cmd_mode_support = utils->read_bool(utils->data,
  2627. "qcom,mdss-dsi-cmd-mode");
  2628. if (cmd_mode_support)
  2629. mode->panel_mode = DSI_OP_CMD_MODE;
  2630. else if (vid_mode_support)
  2631. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2632. else
  2633. return -EINVAL;
  2634. return 0;
  2635. };
  2636. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2637. {
  2638. int dms_enabled;
  2639. const char *data;
  2640. struct dsi_parser_utils *utils = &panel->utils;
  2641. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2642. dms_enabled = utils->read_bool(utils->data,
  2643. "qcom,dynamic-mode-switch-enabled");
  2644. if (!dms_enabled)
  2645. return 0;
  2646. data = utils->get_property(utils->data,
  2647. "qcom,dynamic-mode-switch-type", NULL);
  2648. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2649. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2650. } else {
  2651. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2652. panel->name, data);
  2653. return -EINVAL;
  2654. }
  2655. return 0;
  2656. };
  2657. /*
  2658. * The length of all the valid values to be checked should not be greater
  2659. * than the length of returned data from read command.
  2660. */
  2661. static bool
  2662. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2663. {
  2664. int i;
  2665. struct drm_panel_esd_config *config = &panel->esd_config;
  2666. for (i = 0; i < count; ++i) {
  2667. if (config->status_valid_params[i] >
  2668. config->status_cmds_rlen[i]) {
  2669. DSI_DEBUG("ignore valid params\n");
  2670. return false;
  2671. }
  2672. }
  2673. return true;
  2674. }
  2675. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2676. char *prop_key, u32 **target, u32 cmd_cnt)
  2677. {
  2678. int tmp;
  2679. if (!utils->find_property(utils->data, prop_key, &tmp))
  2680. return false;
  2681. tmp /= sizeof(u32);
  2682. if (tmp != cmd_cnt) {
  2683. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2684. tmp, cmd_cnt);
  2685. return false;
  2686. }
  2687. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2688. if (IS_ERR_OR_NULL(*target)) {
  2689. DSI_ERR("Error allocating memory for property\n");
  2690. return false;
  2691. }
  2692. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2693. DSI_ERR("cannot get values from dts\n");
  2694. kfree(*target);
  2695. *target = NULL;
  2696. return false;
  2697. }
  2698. return true;
  2699. }
  2700. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2701. {
  2702. kfree(esd_config->status_buf);
  2703. kfree(esd_config->return_buf);
  2704. kfree(esd_config->status_value);
  2705. kfree(esd_config->status_valid_params);
  2706. kfree(esd_config->status_cmds_rlen);
  2707. kfree(esd_config->status_cmd.cmds);
  2708. }
  2709. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2710. {
  2711. struct drm_panel_esd_config *esd_config;
  2712. int rc = 0;
  2713. u32 tmp;
  2714. u32 i, status_len, *lenp;
  2715. struct property *data;
  2716. struct dsi_parser_utils *utils = &panel->utils;
  2717. if (!panel) {
  2718. DSI_ERR("Invalid Params\n");
  2719. return -EINVAL;
  2720. }
  2721. esd_config = &panel->esd_config;
  2722. if (!esd_config)
  2723. return -EINVAL;
  2724. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2725. DSI_CMD_SET_PANEL_STATUS, utils);
  2726. if (!esd_config->status_cmd.count) {
  2727. DSI_ERR("panel status command parsing failed\n");
  2728. rc = -EINVAL;
  2729. goto error;
  2730. }
  2731. if (!dsi_panel_parse_esd_status_len(utils,
  2732. "qcom,mdss-dsi-panel-status-read-length",
  2733. &panel->esd_config.status_cmds_rlen,
  2734. esd_config->status_cmd.count)) {
  2735. DSI_ERR("Invalid status read length\n");
  2736. rc = -EINVAL;
  2737. goto error1;
  2738. }
  2739. if (dsi_panel_parse_esd_status_len(utils,
  2740. "qcom,mdss-dsi-panel-status-valid-params",
  2741. &panel->esd_config.status_valid_params,
  2742. esd_config->status_cmd.count)) {
  2743. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2744. esd_config->status_cmd.count)) {
  2745. rc = -EINVAL;
  2746. goto error2;
  2747. }
  2748. }
  2749. status_len = 0;
  2750. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2751. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2752. status_len += lenp[i];
  2753. if (!status_len) {
  2754. rc = -EINVAL;
  2755. goto error2;
  2756. }
  2757. /*
  2758. * Some panel may need multiple read commands to properly
  2759. * check panel status. Do a sanity check for proper status
  2760. * value which will be compared with the value read by dsi
  2761. * controller during ESD check. Also check if multiple read
  2762. * commands are there then, there should be corresponding
  2763. * status check values for each read command.
  2764. */
  2765. data = utils->find_property(utils->data,
  2766. "qcom,mdss-dsi-panel-status-value", &tmp);
  2767. tmp /= sizeof(u32);
  2768. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2769. esd_config->groups = tmp / status_len;
  2770. } else {
  2771. DSI_ERR("error parse panel-status-value\n");
  2772. rc = -EINVAL;
  2773. goto error2;
  2774. }
  2775. esd_config->status_value =
  2776. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2777. GFP_KERNEL);
  2778. if (!esd_config->status_value) {
  2779. rc = -ENOMEM;
  2780. goto error2;
  2781. }
  2782. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2783. sizeof(unsigned char), GFP_KERNEL);
  2784. if (!esd_config->return_buf) {
  2785. rc = -ENOMEM;
  2786. goto error3;
  2787. }
  2788. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2789. if (!esd_config->status_buf) {
  2790. rc = -ENOMEM;
  2791. goto error4;
  2792. }
  2793. rc = utils->read_u32_array(utils->data,
  2794. "qcom,mdss-dsi-panel-status-value",
  2795. esd_config->status_value, esd_config->groups * status_len);
  2796. if (rc) {
  2797. DSI_DEBUG("error reading panel status values\n");
  2798. memset(esd_config->status_value, 0,
  2799. esd_config->groups * status_len);
  2800. }
  2801. return 0;
  2802. error4:
  2803. kfree(esd_config->return_buf);
  2804. error3:
  2805. kfree(esd_config->status_value);
  2806. error2:
  2807. kfree(esd_config->status_valid_params);
  2808. kfree(esd_config->status_cmds_rlen);
  2809. error1:
  2810. kfree(esd_config->status_cmd.cmds);
  2811. error:
  2812. return rc;
  2813. }
  2814. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2815. {
  2816. int rc = 0;
  2817. const char *string;
  2818. struct drm_panel_esd_config *esd_config;
  2819. struct dsi_parser_utils *utils = &panel->utils;
  2820. u8 *esd_mode = NULL;
  2821. esd_config = &panel->esd_config;
  2822. esd_config->status_mode = ESD_MODE_MAX;
  2823. esd_config->esd_enabled = utils->read_bool(utils->data,
  2824. "qcom,esd-check-enabled");
  2825. if (!esd_config->esd_enabled)
  2826. return 0;
  2827. rc = utils->read_string(utils->data,
  2828. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2829. if (!rc) {
  2830. if (!strcmp(string, "bta_check")) {
  2831. esd_config->status_mode = ESD_MODE_SW_BTA;
  2832. } else if (!strcmp(string, "reg_read")) {
  2833. esd_config->status_mode = ESD_MODE_REG_READ;
  2834. } else if (!strcmp(string, "te_signal_check")) {
  2835. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2836. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2837. } else {
  2838. DSI_ERR("TE-ESD not valid for video mode\n");
  2839. rc = -EINVAL;
  2840. goto error;
  2841. }
  2842. } else {
  2843. DSI_ERR("No valid panel-status-check-mode string\n");
  2844. rc = -EINVAL;
  2845. goto error;
  2846. }
  2847. } else {
  2848. DSI_DEBUG("status check method not defined!\n");
  2849. rc = -EINVAL;
  2850. goto error;
  2851. }
  2852. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2853. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2854. if (rc) {
  2855. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2856. rc);
  2857. goto error;
  2858. }
  2859. esd_mode = "register_read";
  2860. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2861. esd_mode = "bta_trigger";
  2862. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2863. esd_mode = "te_check";
  2864. }
  2865. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2866. return 0;
  2867. error:
  2868. panel->esd_config.esd_enabled = false;
  2869. return rc;
  2870. }
  2871. static void dsi_panel_update_util(struct dsi_panel *panel,
  2872. struct device_node *parser_node)
  2873. {
  2874. struct dsi_parser_utils *utils = &panel->utils;
  2875. if (parser_node) {
  2876. *utils = *dsi_parser_get_parser_utils();
  2877. utils->data = parser_node;
  2878. DSI_DEBUG("switching to parser APIs\n");
  2879. goto end;
  2880. }
  2881. *utils = *dsi_parser_get_of_utils();
  2882. utils->data = panel->panel_of_node;
  2883. end:
  2884. utils->node = panel->panel_of_node;
  2885. }
  2886. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2887. {
  2888. return 0;
  2889. }
  2890. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2891. {
  2892. if (trusted_vm_env) {
  2893. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2894. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2895. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2896. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2897. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2898. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2899. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2900. } else {
  2901. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2902. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2903. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2904. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2905. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2906. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2907. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2908. }
  2909. }
  2910. struct dsi_panel *dsi_panel_get(struct device *parent,
  2911. struct device_node *of_node,
  2912. struct device_node *parser_node,
  2913. const char *type,
  2914. int topology_override,
  2915. bool trusted_vm_env)
  2916. {
  2917. struct dsi_panel *panel;
  2918. struct dsi_parser_utils *utils;
  2919. const char *panel_physical_type;
  2920. int rc = 0;
  2921. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2922. if (!panel)
  2923. return ERR_PTR(-ENOMEM);
  2924. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2925. panel->panel_of_node = of_node;
  2926. panel->parent = parent;
  2927. panel->type = type;
  2928. dsi_panel_update_util(panel, parser_node);
  2929. utils = &panel->utils;
  2930. panel->name = utils->get_property(utils->data,
  2931. "qcom,mdss-dsi-panel-name", NULL);
  2932. if (!panel->name)
  2933. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2934. /*
  2935. * Set panel type to LCD as default.
  2936. */
  2937. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2938. panel_physical_type = utils->get_property(utils->data,
  2939. "qcom,mdss-dsi-panel-physical-type", NULL);
  2940. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2941. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2942. rc = dsi_panel_parse_host_config(panel);
  2943. if (rc) {
  2944. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2945. rc);
  2946. goto error;
  2947. }
  2948. rc = dsi_panel_parse_panel_mode(panel);
  2949. if (rc) {
  2950. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2951. rc);
  2952. goto error;
  2953. }
  2954. rc = dsi_panel_parse_dfps_caps(panel);
  2955. if (rc)
  2956. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2957. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2958. if (rc)
  2959. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2960. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2961. if (rc)
  2962. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2963. rc = dsi_panel_parse_phy_props(panel);
  2964. if (rc) {
  2965. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2966. rc);
  2967. goto error;
  2968. }
  2969. rc = panel->panel_ops.parse_gpios(panel);
  2970. if (rc) {
  2971. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2972. goto error;
  2973. }
  2974. rc = dsi_panel_parse_tlmm_gpio(panel);
  2975. if (rc) {
  2976. DSI_ERR("failed to parse panel tlmm gpios, rc=%d\n", rc);
  2977. goto error;
  2978. }
  2979. rc = dsi_panel_parse_power_cfg(panel);
  2980. if (rc)
  2981. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2982. rc = dsi_panel_parse_bl_config(panel);
  2983. if (rc) {
  2984. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2985. if (rc == -EPROBE_DEFER)
  2986. goto error;
  2987. }
  2988. rc = dsi_panel_parse_misc_features(panel);
  2989. if (rc)
  2990. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2991. rc = dsi_panel_parse_hdr_config(panel);
  2992. if (rc)
  2993. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2994. rc = dsi_panel_get_mode_count(panel);
  2995. if (rc) {
  2996. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2997. goto error;
  2998. }
  2999. rc = dsi_panel_parse_dms_info(panel);
  3000. if (rc)
  3001. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3002. rc = dsi_panel_parse_esd_config(panel);
  3003. if (rc)
  3004. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3005. rc = dsi_panel_vreg_get(panel);
  3006. if (rc) {
  3007. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3008. panel->name, rc);
  3009. goto error;
  3010. }
  3011. panel->power_mode = SDE_MODE_DPMS_OFF;
  3012. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3013. NULL, DRM_MODE_CONNECTOR_DSI);
  3014. panel->mipi_device.dev.of_node = of_node;
  3015. drm_panel_add(&panel->drm_panel);
  3016. mutex_init(&panel->panel_lock);
  3017. return panel;
  3018. error:
  3019. kfree(panel);
  3020. return ERR_PTR(rc);
  3021. }
  3022. void dsi_panel_put(struct dsi_panel *panel)
  3023. {
  3024. drm_panel_remove(&panel->drm_panel);
  3025. /* free resources allocated for ESD check */
  3026. dsi_panel_esd_config_deinit(&panel->esd_config);
  3027. kfree(panel);
  3028. }
  3029. int dsi_panel_drv_init(struct dsi_panel *panel,
  3030. struct mipi_dsi_host *host)
  3031. {
  3032. int rc = 0;
  3033. struct mipi_dsi_device *dev;
  3034. if (!panel || !host) {
  3035. DSI_ERR("invalid params\n");
  3036. return -EINVAL;
  3037. }
  3038. mutex_lock(&panel->panel_lock);
  3039. dev = &panel->mipi_device;
  3040. dev->host = host;
  3041. /*
  3042. * We dont have device structure since panel is not a device node.
  3043. * When using drm panel framework, the device is probed when the host is
  3044. * create.
  3045. */
  3046. dev->channel = 0;
  3047. dev->lanes = 4;
  3048. panel->host = host;
  3049. rc = panel->panel_ops.pinctrl_init(panel);
  3050. if (rc) {
  3051. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3052. panel->name, rc);
  3053. goto exit;
  3054. }
  3055. rc = panel->panel_ops.gpio_request(panel);
  3056. if (rc) {
  3057. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3058. rc);
  3059. goto error_pinctrl_deinit;
  3060. }
  3061. rc = panel->panel_ops.bl_register(panel);
  3062. if (rc) {
  3063. if (rc != -EPROBE_DEFER)
  3064. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3065. panel->name, rc);
  3066. goto error_gpio_release;
  3067. }
  3068. goto exit;
  3069. error_gpio_release:
  3070. (void)dsi_panel_gpio_release(panel);
  3071. error_pinctrl_deinit:
  3072. (void)dsi_panel_pinctrl_deinit(panel);
  3073. exit:
  3074. mutex_unlock(&panel->panel_lock);
  3075. return rc;
  3076. }
  3077. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3078. {
  3079. int rc = 0;
  3080. if (!panel) {
  3081. DSI_ERR("invalid params\n");
  3082. return -EINVAL;
  3083. }
  3084. mutex_lock(&panel->panel_lock);
  3085. rc = panel->panel_ops.bl_unregister(panel);
  3086. if (rc)
  3087. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3088. panel->name, rc);
  3089. rc = panel->panel_ops.gpio_release(panel);
  3090. if (rc)
  3091. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3092. rc);
  3093. rc = panel->panel_ops.pinctrl_deinit(panel);
  3094. if (rc)
  3095. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3096. rc);
  3097. rc = dsi_panel_vreg_put(panel);
  3098. if (rc)
  3099. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3100. kfree(panel->tlmm_gpio);
  3101. panel->host = NULL;
  3102. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3103. mutex_unlock(&panel->panel_lock);
  3104. return rc;
  3105. }
  3106. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3107. struct dsi_display_mode *mode)
  3108. {
  3109. return 0;
  3110. }
  3111. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3112. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3113. {
  3114. const char *compression;
  3115. u32 *array = NULL, top_count, len, i;
  3116. int rc = -EINVAL;
  3117. bool dsc_enable = false;
  3118. *dsc_count = 0;
  3119. *lm_count = 0;
  3120. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3121. if (compression && !strcmp(compression, "dsc"))
  3122. dsc_enable = true;
  3123. len = utils->count_u32_elems(node, "qcom,display-topology");
  3124. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3125. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3126. return rc;
  3127. top_count = len / TOPOLOGY_SET_LEN;
  3128. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3129. if (!array)
  3130. return -ENOMEM;
  3131. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3132. if (rc) {
  3133. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3134. goto read_fail;
  3135. }
  3136. for (i = 0; i < top_count; i++) {
  3137. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3138. if (dsc_enable)
  3139. *dsc_count = max(*dsc_count,
  3140. array[i * TOPOLOGY_SET_LEN + 1]);
  3141. }
  3142. read_fail:
  3143. kfree(array);
  3144. return 0;
  3145. }
  3146. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3147. {
  3148. const u32 SINGLE_MODE_SUPPORT = 1;
  3149. struct dsi_parser_utils *utils;
  3150. struct device_node *timings_np, *child_np;
  3151. int num_dfps_rates, num_bit_clks;
  3152. int num_video_modes = 0, num_cmd_modes = 0;
  3153. int count, rc = 0;
  3154. u32 dsc_count = 0, lm_count = 0;
  3155. if (!panel) {
  3156. DSI_ERR("invalid params\n");
  3157. return -EINVAL;
  3158. }
  3159. utils = &panel->utils;
  3160. panel->num_timing_nodes = 0;
  3161. timings_np = utils->get_child_by_name(utils->data,
  3162. "qcom,mdss-dsi-display-timings");
  3163. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3164. DSI_ERR("no display timing nodes defined\n");
  3165. rc = -EINVAL;
  3166. goto error;
  3167. }
  3168. count = utils->get_child_count(timings_np);
  3169. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3170. count > DSI_MODE_MAX) {
  3171. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3172. rc = -EINVAL;
  3173. goto error;
  3174. }
  3175. /* No multiresolution support is available for video mode panels.
  3176. * Multi-mode is supported for video mode during POMS is enabled.
  3177. */
  3178. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3179. !panel->host_config.ext_bridge_mode &&
  3180. !panel->panel_mode_switch_enabled)
  3181. count = SINGLE_MODE_SUPPORT;
  3182. panel->num_timing_nodes = count;
  3183. dsi_for_each_child_node(timings_np, child_np) {
  3184. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3185. num_video_modes++;
  3186. else if (utils->read_bool(child_np,
  3187. "qcom,mdss-dsi-cmd-mode"))
  3188. num_cmd_modes++;
  3189. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3190. num_video_modes++;
  3191. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3192. num_cmd_modes++;
  3193. dsi_panel_get_max_res_count(utils, child_np,
  3194. &dsc_count, &lm_count);
  3195. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3196. panel->lm_count = max(lm_count, panel->lm_count);
  3197. }
  3198. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3199. panel->dfps_caps.dfps_list_len;
  3200. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  3201. panel->dyn_clk_caps.bit_clk_list_len;
  3202. /*
  3203. * Inflate num_of_modes by fps and bit clks in dfps.
  3204. * Single command mode for video mode panels supporting
  3205. * panel operating mode switch.
  3206. */
  3207. num_video_modes = num_video_modes * num_bit_clks * num_dfps_rates;
  3208. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3209. (panel->panel_mode_switch_enabled))
  3210. num_cmd_modes = 1;
  3211. else
  3212. num_cmd_modes = num_cmd_modes * num_bit_clks;
  3213. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3214. error:
  3215. return rc;
  3216. }
  3217. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3218. struct dsi_panel_phy_props *phy_props)
  3219. {
  3220. int rc = 0;
  3221. if (!panel || !phy_props) {
  3222. DSI_ERR("invalid params\n");
  3223. return -EINVAL;
  3224. }
  3225. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3226. return rc;
  3227. }
  3228. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3229. struct dsi_dfps_capabilities *dfps_caps)
  3230. {
  3231. int rc = 0;
  3232. if (!panel || !dfps_caps) {
  3233. DSI_ERR("invalid params\n");
  3234. return -EINVAL;
  3235. }
  3236. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3237. return rc;
  3238. }
  3239. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3240. {
  3241. int i;
  3242. if (!mode->priv_info)
  3243. return;
  3244. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3245. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3246. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3247. }
  3248. kfree(mode->priv_info);
  3249. }
  3250. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3251. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3252. {
  3253. u32 frame_time_us, nslices;
  3254. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3255. dsi_transfer_time_us, pixel_clk_khz;
  3256. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3257. struct dsi_mode_info *timing = &mode->timing;
  3258. struct dsi_display_mode *display_mode;
  3259. u32 jitter_numer, jitter_denom, prefill_lines;
  3260. u32 min_threshold_us, prefill_time_us, max_transfer_us;
  3261. u16 bpp;
  3262. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  3263. * + 1 byte dcs data command.
  3264. */
  3265. const u32 packet_overhead = 56;
  3266. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3267. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3268. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3269. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3270. if (timing->refresh_rate >= 120)
  3271. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3272. if (timing->dsc_enabled) {
  3273. nslices = (timing->h_active)/(dsc->config.slice_width);
  3274. /* (slice width x bit-per-pixel + packet overhead) x
  3275. * number of slices x height x fps / lane
  3276. */
  3277. bpp = DSC_BPP(dsc->config);
  3278. bits_per_line = ((dsc->config.slice_width * bpp) +
  3279. packet_overhead) * nslices;
  3280. bits_per_line = bits_per_line / (config->num_data_lanes);
  3281. min_bitclk_hz = (bits_per_line * timing->v_active *
  3282. timing->refresh_rate);
  3283. } else {
  3284. total_active_pixels = ((dsi_h_active_dce(timing)
  3285. * timing->v_active));
  3286. /* calculate the actual bitclk needed to transfer the frame */
  3287. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3288. (config->bpp));
  3289. do_div(min_bitclk_hz, config->num_data_lanes);
  3290. }
  3291. timing->min_dsi_clk_hz = min_bitclk_hz;
  3292. min_threshold_us = mult_frac(frame_time_us,
  3293. jitter_numer, (jitter_denom * 100));
  3294. /*
  3295. * Increase the prefill_lines proportionately as recommended
  3296. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3297. */
  3298. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3299. timing->refresh_rate, 60);
  3300. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3301. (timing->v_active));
  3302. /*
  3303. * Threshold is sum of panel jitter time, prefill line time
  3304. * plus 64usec buffer time.
  3305. */
  3306. min_threshold_us = min_threshold_us + 64 + prefill_time_us;
  3307. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3308. if (timing->clk_rate_hz) {
  3309. /* adjust the transfer time proportionately for bit clk*/
  3310. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3311. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3312. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3313. } else if (mode->priv_info->mdp_transfer_time_us) {
  3314. max_transfer_us = frame_time_us - min_threshold_us;
  3315. mode->priv_info->mdp_transfer_time_us = min(
  3316. mode->priv_info->mdp_transfer_time_us,
  3317. max_transfer_us);
  3318. timing->dsi_transfer_time_us =
  3319. mode->priv_info->mdp_transfer_time_us;
  3320. } else {
  3321. if (min_threshold_us > frame_threshold_us)
  3322. frame_threshold_us = min_threshold_us;
  3323. timing->dsi_transfer_time_us = frame_time_us -
  3324. frame_threshold_us;
  3325. }
  3326. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3327. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3328. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3329. timing->mdp_transfer_time_us =
  3330. mode->priv_info->mdp_transfer_time_us;
  3331. }
  3332. /* Calculate pclk_khz to update modeinfo */
  3333. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3334. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3335. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3336. do_div(pixel_clk_khz, config->bpp);
  3337. display_mode->pixel_clk_khz = pixel_clk_khz;
  3338. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3339. }
  3340. int dsi_panel_get_mode(struct dsi_panel *panel,
  3341. u32 index, struct dsi_display_mode *mode,
  3342. int topology_override)
  3343. {
  3344. struct device_node *timings_np, *child_np;
  3345. struct dsi_parser_utils *utils;
  3346. struct dsi_display_mode_priv_info *prv_info;
  3347. u32 child_idx = 0;
  3348. int rc = 0, num_timings;
  3349. int traffic_mode;
  3350. int panel_mode;
  3351. void *utils_data = NULL;
  3352. if (!panel || !mode) {
  3353. DSI_ERR("invalid params\n");
  3354. return -EINVAL;
  3355. }
  3356. mutex_lock(&panel->panel_lock);
  3357. utils = &panel->utils;
  3358. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3359. if (!mode->priv_info) {
  3360. rc = -ENOMEM;
  3361. goto done;
  3362. }
  3363. prv_info = mode->priv_info;
  3364. timings_np = utils->get_child_by_name(utils->data,
  3365. "qcom,mdss-dsi-display-timings");
  3366. if (!timings_np) {
  3367. DSI_ERR("no display timing nodes defined\n");
  3368. rc = -EINVAL;
  3369. goto parse_fail;
  3370. }
  3371. num_timings = utils->get_child_count(timings_np);
  3372. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3373. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3374. rc = -EINVAL;
  3375. goto parse_fail;
  3376. }
  3377. utils_data = utils->data;
  3378. traffic_mode = panel->video_config.traffic_mode;
  3379. panel_mode = panel->panel_mode;
  3380. dsi_for_each_child_node(timings_np, child_np) {
  3381. if (index != child_idx++)
  3382. continue;
  3383. utils->data = child_np;
  3384. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3385. if (rc) {
  3386. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3387. goto parse_fail;
  3388. }
  3389. rc = dsi_panel_parse_dsc_params(mode, utils);
  3390. if (rc) {
  3391. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3392. goto parse_fail;
  3393. }
  3394. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode,
  3395. panel_mode);
  3396. if (rc) {
  3397. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3398. goto parse_fail;
  3399. }
  3400. rc = dsi_panel_parse_topology(prv_info, utils,
  3401. topology_override);
  3402. if (rc) {
  3403. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3404. goto parse_fail;
  3405. }
  3406. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3407. if (rc) {
  3408. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3409. goto parse_fail;
  3410. }
  3411. rc = dsi_panel_parse_jitter_config(mode, utils);
  3412. if (rc)
  3413. DSI_ERR(
  3414. "failed to parse panel jitter config, rc=%d\n", rc);
  3415. rc = dsi_panel_parse_phy_timing(mode, utils);
  3416. if (rc) {
  3417. DSI_ERR(
  3418. "failed to parse panel phy timings, rc=%d\n", rc);
  3419. goto parse_fail;
  3420. }
  3421. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3422. if (rc)
  3423. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3424. if (panel->panel_mode_switch_enabled) {
  3425. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3426. if (rc) {
  3427. rc = 0;
  3428. mode->panel_mode = panel->panel_mode;
  3429. DSI_INFO(
  3430. "POMS: panel mode isn't specified in timing[%d]\n",
  3431. child_idx);
  3432. }
  3433. } else {
  3434. mode->panel_mode = panel->panel_mode;
  3435. }
  3436. }
  3437. goto done;
  3438. parse_fail:
  3439. kfree(mode->priv_info);
  3440. mode->priv_info = NULL;
  3441. done:
  3442. utils->data = utils_data;
  3443. mutex_unlock(&panel->panel_lock);
  3444. return rc;
  3445. }
  3446. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3447. struct dsi_display_mode *mode,
  3448. struct dsi_host_config *config)
  3449. {
  3450. int rc = 0;
  3451. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3452. if (!panel || !mode || !config) {
  3453. DSI_ERR("invalid params\n");
  3454. return -EINVAL;
  3455. }
  3456. mutex_lock(&panel->panel_lock);
  3457. config->panel_mode = panel->panel_mode;
  3458. memcpy(&config->common_config, &panel->host_config,
  3459. sizeof(config->common_config));
  3460. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3461. memcpy(&config->u.video_engine, &panel->video_config,
  3462. sizeof(config->u.video_engine));
  3463. } else {
  3464. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3465. sizeof(config->u.cmd_engine));
  3466. }
  3467. memcpy(&config->video_timing, &mode->timing,
  3468. sizeof(config->video_timing));
  3469. config->video_timing.mdp_transfer_time_us =
  3470. mode->priv_info->mdp_transfer_time_us;
  3471. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3472. config->video_timing.dsc = &mode->priv_info->dsc;
  3473. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3474. config->video_timing.vdc = &mode->priv_info->vdc;
  3475. if (dyn_clk_caps->dyn_clk_support)
  3476. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3477. else
  3478. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3479. config->esc_clk_rate_hz = 19200000;
  3480. mutex_unlock(&panel->panel_lock);
  3481. return rc;
  3482. }
  3483. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3484. {
  3485. int rc = 0;
  3486. if (!panel) {
  3487. DSI_ERR("invalid params\n");
  3488. return -EINVAL;
  3489. }
  3490. mutex_lock(&panel->panel_lock);
  3491. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3492. if (panel->lp11_init)
  3493. goto error;
  3494. rc = dsi_panel_power_on(panel);
  3495. if (rc) {
  3496. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3497. goto error;
  3498. }
  3499. error:
  3500. mutex_unlock(&panel->panel_lock);
  3501. return rc;
  3502. }
  3503. int dsi_panel_update_pps(struct dsi_panel *panel)
  3504. {
  3505. int rc = 0;
  3506. struct dsi_panel_cmd_set *set = NULL;
  3507. struct dsi_display_mode_priv_info *priv_info = NULL;
  3508. if (!panel || !panel->cur_mode) {
  3509. DSI_ERR("invalid params\n");
  3510. return -EINVAL;
  3511. }
  3512. mutex_lock(&panel->panel_lock);
  3513. priv_info = panel->cur_mode->priv_info;
  3514. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3515. if (priv_info->dsc_enabled)
  3516. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3517. panel->dce_pps_cmd, 0,
  3518. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3519. else if (priv_info->vdc_enabled)
  3520. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3521. panel->dce_pps_cmd, 0,
  3522. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3523. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3524. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3525. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3526. if (rc) {
  3527. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3528. goto error;
  3529. }
  3530. }
  3531. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3532. if (rc) {
  3533. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3534. panel->name, rc);
  3535. }
  3536. dsi_panel_destroy_cmd_packets(set);
  3537. error:
  3538. mutex_unlock(&panel->panel_lock);
  3539. return rc;
  3540. }
  3541. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3542. {
  3543. int rc = 0;
  3544. if (!panel) {
  3545. DSI_ERR("invalid params\n");
  3546. return -EINVAL;
  3547. }
  3548. mutex_lock(&panel->panel_lock);
  3549. if (!panel->panel_initialized)
  3550. goto exit;
  3551. /*
  3552. * Consider LP1->LP2->LP1.
  3553. * If the panel is already in LP mode, do not need to
  3554. * set the regulator.
  3555. * IBB and AB power mode would be set at the same time
  3556. * in PMIC driver, so we only call ibb setting that is enough.
  3557. */
  3558. if (dsi_panel_is_type_oled(panel) &&
  3559. panel->power_mode != SDE_MODE_DPMS_LP2)
  3560. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3561. "ibb", REGULATOR_MODE_IDLE);
  3562. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3563. if (rc)
  3564. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3565. panel->name, rc);
  3566. exit:
  3567. mutex_unlock(&panel->panel_lock);
  3568. return rc;
  3569. }
  3570. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3571. {
  3572. int rc = 0;
  3573. if (!panel) {
  3574. DSI_ERR("invalid params\n");
  3575. return -EINVAL;
  3576. }
  3577. mutex_lock(&panel->panel_lock);
  3578. if (!panel->panel_initialized)
  3579. goto exit;
  3580. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3581. if (rc)
  3582. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3583. panel->name, rc);
  3584. exit:
  3585. mutex_unlock(&panel->panel_lock);
  3586. return rc;
  3587. }
  3588. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3589. {
  3590. int rc = 0;
  3591. if (!panel) {
  3592. DSI_ERR("invalid params\n");
  3593. return -EINVAL;
  3594. }
  3595. mutex_lock(&panel->panel_lock);
  3596. if (!panel->panel_initialized)
  3597. goto exit;
  3598. /*
  3599. * Consider about LP1->LP2->NOLP.
  3600. */
  3601. if (dsi_panel_is_type_oled(panel) &&
  3602. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3603. panel->power_mode == SDE_MODE_DPMS_LP2))
  3604. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3605. "ibb", REGULATOR_MODE_NORMAL);
  3606. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3607. if (rc)
  3608. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3609. panel->name, rc);
  3610. exit:
  3611. mutex_unlock(&panel->panel_lock);
  3612. return rc;
  3613. }
  3614. int dsi_panel_prepare(struct dsi_panel *panel)
  3615. {
  3616. int rc = 0;
  3617. if (!panel) {
  3618. DSI_ERR("invalid params\n");
  3619. return -EINVAL;
  3620. }
  3621. mutex_lock(&panel->panel_lock);
  3622. if (panel->lp11_init) {
  3623. rc = dsi_panel_power_on(panel);
  3624. if (rc) {
  3625. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3626. panel->name, rc);
  3627. goto error;
  3628. }
  3629. }
  3630. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3631. if (rc) {
  3632. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3633. panel->name, rc);
  3634. goto error;
  3635. }
  3636. error:
  3637. mutex_unlock(&panel->panel_lock);
  3638. return rc;
  3639. }
  3640. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3641. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3642. {
  3643. static const int ROI_CMD_LEN = 5;
  3644. int rc = 0;
  3645. /* DTYPE_DCS_LWRITE */
  3646. char *caset, *paset;
  3647. set->cmds = NULL;
  3648. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3649. if (!caset) {
  3650. rc = -ENOMEM;
  3651. goto exit;
  3652. }
  3653. caset[0] = 0x2a;
  3654. caset[1] = (roi->x & 0xFF00) >> 8;
  3655. caset[2] = roi->x & 0xFF;
  3656. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3657. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3658. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3659. if (!paset) {
  3660. rc = -ENOMEM;
  3661. goto error_free_mem;
  3662. }
  3663. paset[0] = 0x2b;
  3664. paset[1] = (roi->y & 0xFF00) >> 8;
  3665. paset[2] = roi->y & 0xFF;
  3666. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3667. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3668. set->type = DSI_CMD_SET_ROI;
  3669. set->state = DSI_CMD_SET_STATE_LP;
  3670. set->count = 2; /* send caset + paset together */
  3671. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3672. if (!set->cmds) {
  3673. rc = -ENOMEM;
  3674. goto error_free_mem;
  3675. }
  3676. set->cmds[0].msg.channel = 0;
  3677. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3678. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3679. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3680. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3681. set->cmds[0].msg.tx_buf = caset;
  3682. set->cmds[0].msg.rx_len = 0;
  3683. set->cmds[0].msg.rx_buf = 0;
  3684. set->cmds[0].msg.wait_ms = 0;
  3685. set->cmds[0].last_command = 0;
  3686. set->cmds[0].post_wait_ms = 0;
  3687. set->cmds[1].msg.channel = 0;
  3688. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3689. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3690. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3691. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3692. set->cmds[1].msg.tx_buf = paset;
  3693. set->cmds[1].msg.rx_len = 0;
  3694. set->cmds[1].msg.rx_buf = 0;
  3695. set->cmds[1].msg.wait_ms = 0;
  3696. set->cmds[1].last_command = 1;
  3697. set->cmds[1].post_wait_ms = 0;
  3698. goto exit;
  3699. error_free_mem:
  3700. kfree(caset);
  3701. kfree(paset);
  3702. kfree(set->cmds);
  3703. exit:
  3704. return rc;
  3705. }
  3706. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3707. int ctrl_idx)
  3708. {
  3709. int rc = 0;
  3710. if (!panel) {
  3711. DSI_ERR("invalid params\n");
  3712. return -EINVAL;
  3713. }
  3714. mutex_lock(&panel->panel_lock);
  3715. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3716. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3717. if (rc)
  3718. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3719. panel->name, rc);
  3720. mutex_unlock(&panel->panel_lock);
  3721. return rc;
  3722. }
  3723. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3724. int ctrl_idx)
  3725. {
  3726. int rc = 0;
  3727. if (!panel) {
  3728. DSI_ERR("invalid params\n");
  3729. return -EINVAL;
  3730. }
  3731. mutex_lock(&panel->panel_lock);
  3732. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3733. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3734. if (rc)
  3735. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3736. panel->name, rc);
  3737. mutex_unlock(&panel->panel_lock);
  3738. return rc;
  3739. }
  3740. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3741. struct dsi_rect *roi)
  3742. {
  3743. int rc = 0;
  3744. struct dsi_panel_cmd_set *set;
  3745. struct dsi_display_mode_priv_info *priv_info;
  3746. if (!panel || !panel->cur_mode) {
  3747. DSI_ERR("Invalid params\n");
  3748. return -EINVAL;
  3749. }
  3750. priv_info = panel->cur_mode->priv_info;
  3751. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3752. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3753. if (rc) {
  3754. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3755. panel->name, rc);
  3756. return rc;
  3757. }
  3758. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3759. roi->x, roi->y, roi->w, roi->h);
  3760. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3761. mutex_lock(&panel->panel_lock);
  3762. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3763. if (rc)
  3764. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3765. panel->name, rc);
  3766. mutex_unlock(&panel->panel_lock);
  3767. dsi_panel_destroy_cmd_packets(set);
  3768. dsi_panel_dealloc_cmd_packets(set);
  3769. return rc;
  3770. }
  3771. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3772. {
  3773. int rc = 0;
  3774. if (!panel) {
  3775. DSI_ERR("Invalid params\n");
  3776. return -EINVAL;
  3777. }
  3778. mutex_lock(&panel->panel_lock);
  3779. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3780. if (rc)
  3781. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3782. panel->name, rc);
  3783. mutex_unlock(&panel->panel_lock);
  3784. return rc;
  3785. }
  3786. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3787. {
  3788. int rc = 0;
  3789. if (!panel) {
  3790. DSI_ERR("Invalid params\n");
  3791. return -EINVAL;
  3792. }
  3793. mutex_lock(&panel->panel_lock);
  3794. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3795. if (rc)
  3796. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3797. panel->name, rc);
  3798. mutex_unlock(&panel->panel_lock);
  3799. return rc;
  3800. }
  3801. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3802. {
  3803. int rc = 0;
  3804. if (!panel) {
  3805. DSI_ERR("Invalid params\n");
  3806. return -EINVAL;
  3807. }
  3808. mutex_lock(&panel->panel_lock);
  3809. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3810. if (rc)
  3811. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3812. panel->name, rc);
  3813. mutex_unlock(&panel->panel_lock);
  3814. return rc;
  3815. }
  3816. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3817. {
  3818. int rc = 0;
  3819. if (!panel) {
  3820. DSI_ERR("Invalid params\n");
  3821. return -EINVAL;
  3822. }
  3823. mutex_lock(&panel->panel_lock);
  3824. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3825. if (rc)
  3826. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3827. panel->name, rc);
  3828. mutex_unlock(&panel->panel_lock);
  3829. return rc;
  3830. }
  3831. int dsi_panel_switch(struct dsi_panel *panel)
  3832. {
  3833. int rc = 0;
  3834. if (!panel) {
  3835. DSI_ERR("Invalid params\n");
  3836. return -EINVAL;
  3837. }
  3838. mutex_lock(&panel->panel_lock);
  3839. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3840. if (rc)
  3841. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3842. panel->name, rc);
  3843. mutex_unlock(&panel->panel_lock);
  3844. return rc;
  3845. }
  3846. int dsi_panel_post_switch(struct dsi_panel *panel)
  3847. {
  3848. int rc = 0;
  3849. if (!panel) {
  3850. DSI_ERR("Invalid params\n");
  3851. return -EINVAL;
  3852. }
  3853. mutex_lock(&panel->panel_lock);
  3854. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3855. if (rc)
  3856. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3857. panel->name, rc);
  3858. mutex_unlock(&panel->panel_lock);
  3859. return rc;
  3860. }
  3861. int dsi_panel_enable(struct dsi_panel *panel)
  3862. {
  3863. int rc = 0;
  3864. if (!panel) {
  3865. DSI_ERR("Invalid params\n");
  3866. return -EINVAL;
  3867. }
  3868. mutex_lock(&panel->panel_lock);
  3869. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3870. if (rc)
  3871. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3872. panel->name, rc);
  3873. else
  3874. panel->panel_initialized = true;
  3875. mutex_unlock(&panel->panel_lock);
  3876. return rc;
  3877. }
  3878. int dsi_panel_post_enable(struct dsi_panel *panel)
  3879. {
  3880. int rc = 0;
  3881. if (!panel) {
  3882. DSI_ERR("invalid params\n");
  3883. return -EINVAL;
  3884. }
  3885. mutex_lock(&panel->panel_lock);
  3886. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3887. if (rc) {
  3888. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3889. panel->name, rc);
  3890. goto error;
  3891. }
  3892. error:
  3893. mutex_unlock(&panel->panel_lock);
  3894. return rc;
  3895. }
  3896. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3897. {
  3898. int rc = 0;
  3899. if (!panel) {
  3900. DSI_ERR("invalid params\n");
  3901. return -EINVAL;
  3902. }
  3903. mutex_lock(&panel->panel_lock);
  3904. if (gpio_is_valid(panel->bl_config.en_gpio))
  3905. gpio_set_value(panel->bl_config.en_gpio, 0);
  3906. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3907. if (rc) {
  3908. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3909. panel->name, rc);
  3910. goto error;
  3911. }
  3912. error:
  3913. mutex_unlock(&panel->panel_lock);
  3914. return rc;
  3915. }
  3916. int dsi_panel_disable(struct dsi_panel *panel)
  3917. {
  3918. int rc = 0;
  3919. if (!panel) {
  3920. DSI_ERR("invalid params\n");
  3921. return -EINVAL;
  3922. }
  3923. mutex_lock(&panel->panel_lock);
  3924. /* Avoid sending panel off commands when ESD recovery is underway */
  3925. if (!atomic_read(&panel->esd_recovery_pending)) {
  3926. /*
  3927. * Need to set IBB/AB regulator mode to STANDBY,
  3928. * if panel is going off from AOD mode.
  3929. */
  3930. if (dsi_panel_is_type_oled(panel) &&
  3931. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3932. panel->power_mode == SDE_MODE_DPMS_LP2))
  3933. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3934. "ibb", REGULATOR_MODE_STANDBY);
  3935. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3936. if (rc) {
  3937. /*
  3938. * Sending panel off commands may fail when DSI
  3939. * controller is in a bad state. These failures can be
  3940. * ignored since controller will go for full reset on
  3941. * subsequent display enable anyway.
  3942. */
  3943. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3944. panel->name, rc);
  3945. rc = 0;
  3946. }
  3947. }
  3948. panel->panel_initialized = false;
  3949. panel->power_mode = SDE_MODE_DPMS_OFF;
  3950. mutex_unlock(&panel->panel_lock);
  3951. return rc;
  3952. }
  3953. int dsi_panel_unprepare(struct dsi_panel *panel)
  3954. {
  3955. int rc = 0;
  3956. if (!panel) {
  3957. DSI_ERR("invalid params\n");
  3958. return -EINVAL;
  3959. }
  3960. mutex_lock(&panel->panel_lock);
  3961. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3962. if (rc) {
  3963. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3964. panel->name, rc);
  3965. goto error;
  3966. }
  3967. error:
  3968. mutex_unlock(&panel->panel_lock);
  3969. return rc;
  3970. }
  3971. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3972. {
  3973. int rc = 0;
  3974. if (!panel) {
  3975. DSI_ERR("invalid params\n");
  3976. return -EINVAL;
  3977. }
  3978. mutex_lock(&panel->panel_lock);
  3979. rc = dsi_panel_power_off(panel);
  3980. if (rc) {
  3981. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3982. panel->name, rc);
  3983. goto error;
  3984. }
  3985. error:
  3986. mutex_unlock(&panel->panel_lock);
  3987. return rc;
  3988. }