internal.h 4.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #ifndef _WCD939X_INTERNAL_H
  7. #define _WCD939X_INTERNAL_H
  8. #include <asoc/wcd-mbhc-v2.h>
  9. #include <asoc/wcd-irq.h>
  10. #include <asoc/wcd-clsh.h>
  11. #include <soc/soundwire.h>
  12. #include "wcd939x-mbhc.h"
  13. #include "wcd939x.h"
  14. #define SWR_SCP_CONTROL 0x44
  15. #define SWR_SCP_HOST_CLK_DIV2_CTL_BANK 0xE0
  16. #define WCD939X_MAX_MICBIAS 4
  17. /* Convert from vout ctl to micbias voltage in mV */
  18. #define WCD_VOUT_CTL_TO_MICB(v) (1000 + v * 50)
  19. #define MAX_PORT 8
  20. #define MAX_CH_PER_PORT 8
  21. #define TX_ADC_MAX 4
  22. #define SWR_NUM_PORTS 4
  23. enum {
  24. RX_CLK_9P6MHZ,
  25. RX_CLK_12P288MHZ,
  26. RX_CLK_11P2896MHZ,
  27. };
  28. enum {
  29. WCD939X_HPHL,
  30. WCD939X_HPHR,
  31. WCD939X_HPH_MAX,
  32. };
  33. enum {
  34. TX_HDR12 = 0,
  35. TX_HDR34,
  36. TX_HDR_MAX,
  37. };
  38. extern struct regmap_config wcd939x_regmap_config;
  39. struct comp_coeff_val {
  40. u8 lsb;
  41. u8 msb;
  42. };
  43. struct codec_port_info {
  44. u32 slave_port_type;
  45. u32 master_port_type;
  46. u32 ch_mask;
  47. u32 num_ch;
  48. u32 ch_rate;
  49. };
  50. struct wcd939x_priv {
  51. struct device *dev;
  52. int variant;
  53. struct snd_soc_component *component;
  54. struct device_node *rst_np;
  55. struct regmap *regmap;
  56. struct swr_device *rx_swr_dev;
  57. struct swr_device *tx_swr_dev;
  58. s32 micb_ref[WCD939X_MAX_MICBIAS];
  59. s32 pullup_ref[WCD939X_MAX_MICBIAS];
  60. struct fw_info *fw_data;
  61. struct device_node *wcd_rst_np;
  62. struct mutex micb_lock;
  63. struct mutex wakeup_lock;
  64. s32 dmic_0_1_clk_cnt;
  65. s32 dmic_2_3_clk_cnt;
  66. s32 dmic_4_5_clk_cnt;
  67. s32 dmic_6_7_clk_cnt;
  68. int hdr_en[TX_HDR_MAX];
  69. /* class h specific info */
  70. struct wcd_clsh_cdc_info clsh_info;
  71. /* mbhc module */
  72. struct wcd939x_mbhc *mbhc;
  73. /*compander and xtalk*/
  74. int compander_enabled[WCD939X_HPH_MAX];
  75. int xtalk_enabled[WCD939X_HPH_MAX];
  76. u8 hph_pcm_enabled;
  77. u32 hph_mode;
  78. u32 tx_mode[TX_ADC_MAX];
  79. s32 adc_count;
  80. bool comp1_enable;
  81. bool comp2_enable;
  82. bool ldoh;
  83. bool bcs_dis;
  84. bool dapm_bias_off;
  85. bool in_2Vpk_mode;
  86. struct irq_domain *virq;
  87. struct wcd_irq_info irq_info;
  88. u32 rx_clk_cnt;
  89. int num_irq_regs;
  90. /* to track the status */
  91. unsigned long status_mask;
  92. u8 num_tx_ports;
  93. u8 num_rx_ports;
  94. struct codec_port_info
  95. tx_port_mapping[MAX_PORT][MAX_CH_PER_PORT];
  96. struct codec_port_info
  97. rx_port_mapping[MAX_PORT][MAX_CH_PER_PORT];
  98. struct swr_port_params tx_port_params[SWR_UC_MAX][SWR_NUM_PORTS];
  99. struct swr_dev_frame_config swr_tx_port_params[SWR_UC_MAX];
  100. struct regulator_bulk_data *supplies;
  101. struct notifier_block nblock;
  102. /* wcd callback to bolero */
  103. void *handle;
  104. int (*update_wcd_event)(void *handle, u16 event, u32 data);
  105. int (*register_notifier)(void *handle,
  106. struct notifier_block *nblock,
  107. bool enable);
  108. int (*wakeup)(void *handle, bool enable);
  109. u32 version;
  110. /* Entry for version info */
  111. struct snd_info_entry *entry;
  112. struct snd_info_entry *version_entry;
  113. struct snd_info_entry *variant_entry;
  114. int flyback_cur_det_disable;
  115. int ear_rx_path;
  116. bool dev_up;
  117. u8 tx_master_ch_map[WCD939X_MAX_SLAVE_CH_TYPES];
  118. bool usbc_hs_status;
  119. u8 rx_clk_config;
  120. /* wcd to swr dmic notification */
  121. bool notify_swr_dmic;
  122. struct blocking_notifier_head notifier;
  123. };
  124. struct wcd939x_micbias_setting {
  125. u8 ldoh_v;
  126. u32 cfilt1_mv;
  127. u32 micb1_mv;
  128. u32 micb2_mv;
  129. u32 micb3_mv;
  130. u32 micb4_mv;
  131. u8 bias1_cfilt_sel;
  132. };
  133. struct wcd939x_pdata {
  134. struct device_node *rst_np;
  135. struct device_node *rx_slave;
  136. struct device_node *tx_slave;
  137. struct wcd939x_micbias_setting micbias;
  138. struct cdc_regulator *regulator;
  139. int num_supplies;
  140. };
  141. struct wcd_ctrl_platform_data {
  142. void *handle;
  143. int (*update_wcd_event)(void *handle, u16 event, u32 data);
  144. int (*register_notifier)(void *handle,
  145. struct notifier_block *nblock,
  146. bool enable);
  147. };
  148. enum {
  149. WCD_RX1,
  150. WCD_RX2,
  151. WCD_RX3
  152. };
  153. enum {
  154. /* INTR_CTRL_INT_MASK_0 */
  155. WCD939X_IRQ_MBHC_BUTTON_PRESS_DET = 0,
  156. WCD939X_IRQ_MBHC_BUTTON_RELEASE_DET,
  157. WCD939X_IRQ_MBHC_ELECT_INS_REM_DET,
  158. WCD939X_IRQ_MBHC_ELECT_INS_REM_LEG_DET,
  159. WCD939X_IRQ_MBHC_SW_DET,
  160. WCD939X_IRQ_HPHR_OCP_INT,
  161. WCD939X_IRQ_HPHR_CNP_INT,
  162. WCD939X_IRQ_HPHL_OCP_INT,
  163. /* INTR_CTRL_INT_MASK_1 */
  164. WCD939X_IRQ_HPHL_CNP_INT,
  165. WCD939X_IRQ_EAR_CNP_INT,
  166. WCD939X_IRQ_EAR_SCD_INT,
  167. WCD939X_IRQ_HPHL_PDM_WD_INT,
  168. WCD939X_IRQ_HPHR_PDM_WD_INT,
  169. WCD939X_IRQ_EAR_PDM_WD_INT,
  170. /* INTR_CTRL_INT_MASK_2 */
  171. WCD939X_IRQ_MBHC_MOISTURE_INT,
  172. WCD939X_IRQ_HPHL_SURGE_DET_INT,
  173. WCD939X_IRQ_HPHR_SURGE_DET_INT,
  174. WCD939X_NUM_IRQS,
  175. };
  176. extern struct wcd939x_mbhc *wcd939x_soc_get_mbhc(
  177. struct snd_soc_component *component);
  178. extern void wcd939x_disable_bcs_before_slow_insert(
  179. struct snd_soc_component *component,
  180. bool bcs_disable);
  181. extern int wcd939x_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  182. int volt, int micb_num);
  183. extern int wcd939x_get_micb_vout_ctl_val(u32 micb_mv);
  184. extern int wcd939x_micbias_control(struct snd_soc_component *component,
  185. int micb_num, int req, bool is_dapm);
  186. #endif /* _WCD939X_INTERNAL_H */