wcd939x-registers.h 43 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #ifndef WCD939X_REGISTERS_H
  7. #define WCD939X_REGISTERS_H
  8. #define WCD939X_BASE 0x2fff
  9. #define WCD939X_REG(reg) (reg - WCD939X_BASE - 1)
  10. enum {
  11. REG_NO_ACCESS,
  12. RD_REG,
  13. WR_REG,
  14. RD_WR_REG
  15. };
  16. #define WCD939X_ANA_BASE (WCD939X_BASE+0x01)
  17. #define WCD939X_ANA_PAGE (WCD939X_ANA_BASE+0x00)
  18. #define WCD939X_BIAS (WCD939X_ANA_BASE+0x01)
  19. #define WCD939X_RX_SUPPLIES (WCD939X_ANA_BASE+0x08)
  20. #define WCD939X_HPH (WCD939X_ANA_BASE+0x09)
  21. #define WCD939X_EAR (WCD939X_ANA_BASE+0x0a)
  22. #define WCD939X_EAR_COMPANDER_CTL (WCD939X_ANA_BASE+0x0b)
  23. #define WCD939X_TX_CH1 (WCD939X_ANA_BASE+0x0e)
  24. #define WCD939X_TX_CH2 (WCD939X_ANA_BASE+0x0f)
  25. #define WCD939X_TX_CH3 (WCD939X_ANA_BASE+0x10)
  26. #define WCD939X_TX_CH4 (WCD939X_ANA_BASE+0x11)
  27. #define WCD939X_MICB1_MICB2_DSP_EN_LOGIC (WCD939X_ANA_BASE+0x12)
  28. #define WCD939X_MICB3_DSP_EN_LOGIC (WCD939X_ANA_BASE+0x13)
  29. #define WCD939X_MBHC_MECH (WCD939X_ANA_BASE+0x14)
  30. #define WCD939X_MBHC_ELECT (WCD939X_ANA_BASE+0x15)
  31. #define WCD939X_MBHC_ZDET (WCD939X_ANA_BASE+0x16)
  32. #define WCD939X_MBHC_RESULT_1 (WCD939X_ANA_BASE+0x17)
  33. #define WCD939X_MBHC_RESULT_2 (WCD939X_ANA_BASE+0x18)
  34. #define WCD939X_MBHC_RESULT_3 (WCD939X_ANA_BASE+0x19)
  35. #define WCD939X_MBHC_BTN0 (WCD939X_ANA_BASE+0x1a)
  36. #define WCD939X_MBHC_BTN1 (WCD939X_ANA_BASE+0x1b)
  37. #define WCD939X_MBHC_BTN2 (WCD939X_ANA_BASE+0x1c)
  38. #define WCD939X_MBHC_BTN3 (WCD939X_ANA_BASE+0x1d)
  39. #define WCD939X_MBHC_BTN4 (WCD939X_ANA_BASE+0x1e)
  40. #define WCD939X_MBHC_BTN5 (WCD939X_ANA_BASE+0x1f)
  41. #define WCD939X_MBHC_BTN6 (WCD939X_ANA_BASE+0x20)
  42. #define WCD939X_MBHC_BTN7 (WCD939X_ANA_BASE+0x21)
  43. #define WCD939X_MICB1 (WCD939X_ANA_BASE+0x22)
  44. #define WCD939X_MICB2 (WCD939X_ANA_BASE+0x23)
  45. #define WCD939X_MICB2_RAMP (WCD939X_ANA_BASE+0x24)
  46. #define WCD939X_MICB3 (WCD939X_ANA_BASE+0x25)
  47. #define WCD939X_MICB4 (WCD939X_ANA_BASE+0x26)
  48. #define WCD939X_BIAS_BASE (WCD939X_BASE+0x29)
  49. #define WCD939X_CTL (WCD939X_BIAS_BASE+0x00)
  50. #define WCD939X_VBG_FINE_ADJ (WCD939X_BIAS_BASE+0x01)
  51. #define WCD939X_LDOL_BASE (WCD939X_BASE+0x41)
  52. #define WCD939X_VDDCX_ADJUST (WCD939X_LDOL_BASE+0x00)
  53. #define WCD939X_DISABLE_LDOL (WCD939X_LDOL_BASE+0x01)
  54. #define WCD939X_MBHC_BASE (WCD939X_BASE+0x57)
  55. #define WCD939X_CTL_CLK (WCD939X_MBHC_BASE+0x00)
  56. #define WCD939X_CTL_ANA (WCD939X_MBHC_BASE+0x01)
  57. #define WCD939X_ZDET_VNEG_CTL (WCD939X_MBHC_BASE+0x02)
  58. #define WCD939X_ZDET_BIAS_CTL (WCD939X_MBHC_BASE+0x03)
  59. #define WCD939X_CTL_BCS (WCD939X_MBHC_BASE+0x04)
  60. #define WCD939X_MOISTURE_DET_FSM_STATUS (WCD939X_MBHC_BASE+0x05)
  61. #define WCD939X_TEST_CTL (WCD939X_MBHC_BASE+0x06)
  62. #define WCD939X_LDOH_BASE (WCD939X_BASE+0x68)
  63. #define WCD939X_MODE (WCD939X_LDOH_BASE+0x00)
  64. #define WCD939X_LDOH_BIAS (WCD939X_LDOH_BASE+0x01)
  65. #define WCD939X_STB_LOADS (WCD939X_LDOH_BASE+0x02)
  66. #define WCD939X_SLOWRAMP (WCD939X_LDOH_BASE+0x03)
  67. #define WCD939X_MICB1_BASE (WCD939X_BASE+0x6c)
  68. #define WCD939X_TEST_CTL_1 (WCD939X_MICB1_BASE+0x00)
  69. #define WCD939X_TEST_CTL_2 (WCD939X_MICB1_BASE+0x01)
  70. #define WCD939X_TEST_CTL_3 (WCD939X_MICB1_BASE+0x02)
  71. #define WCD939X_MICB2_BASE (WCD939X_BASE+0x6f)
  72. #define WCD939X_MICB2_TEST_CTL_1 (WCD939X_MICB2_BASE+0x00)
  73. #define WCD939X_MICB2_TEST_CTL_2 (WCD939X_MICB2_BASE+0x01)
  74. #define WCD939X_MICB2_TEST_CTL_3 (WCD939X_MICB2_BASE+0x02)
  75. #define WCD939X_MICB3_BASE (WCD939X_BASE+0x72)
  76. #define WCD939X_MICB3_TEST_CTL_1 (WCD939X_MICB3_BASE+0x00)
  77. #define WCD939X_MICB3_TEST_CTL_2 (WCD939X_MICB3_BASE+0x01)
  78. #define WCD939X_MICB3_TEST_CTL_3 (WCD939X_MICB3_BASE+0x02)
  79. #define WCD939X_MICB4_BASE (WCD939X_BASE+0x75)
  80. #define WCD939X_MICB4_TEST_CTL_1 (WCD939X_MICB4_BASE+0x00)
  81. #define WCD939X_MICB4_TEST_CTL_2 (WCD939X_MICB4_BASE+0x01)
  82. #define WCD939X_MICB4_TEST_CTL_3 (WCD939X_MICB4_BASE+0x02)
  83. #define WCD939X_TX_COM_BASE (WCD939X_BASE+0x78)
  84. #define WCD939X_ADC_VCM (WCD939X_TX_COM_BASE+0x00)
  85. #define WCD939X_BIAS_ATEST (WCD939X_TX_COM_BASE+0x01)
  86. #define WCD939X_SPARE1 (WCD939X_TX_COM_BASE+0x02)
  87. #define WCD939X_SPARE2 (WCD939X_TX_COM_BASE+0x03)
  88. #define WCD939X_TXFE_DIV_CTL (WCD939X_TX_COM_BASE+0x04)
  89. #define WCD939X_TXFE_DIV_START (WCD939X_TX_COM_BASE+0x05)
  90. #define WCD939X_SPARE3 (WCD939X_TX_COM_BASE+0x06)
  91. #define WCD939X_SPARE4 (WCD939X_TX_COM_BASE+0x07)
  92. #define WCD939X_TX_1_2_BASE (WCD939X_BASE+0x80)
  93. #define WCD939X_TEST_EN (WCD939X_TX_1_2_BASE+0x00)
  94. #define WCD939X_ADC_IB (WCD939X_TX_1_2_BASE+0x01)
  95. #define WCD939X_ATEST_REFCTL (WCD939X_TX_1_2_BASE+0x02)
  96. #define WCD939X_TX_1_2_TEST_CTL (WCD939X_TX_1_2_BASE+0x03)
  97. #define WCD939X_TEST_BLK_EN1 (WCD939X_TX_1_2_BASE+0x04)
  98. #define WCD939X_TXFE1_CLKDIV (WCD939X_TX_1_2_BASE+0x05)
  99. #define WCD939X_SAR2_ERR (WCD939X_TX_1_2_BASE+0x06)
  100. #define WCD939X_SAR1_ERR (WCD939X_TX_1_2_BASE+0x07)
  101. #define WCD939X_TX_3_4_BASE (WCD939X_BASE+0x88)
  102. #define WCD939X_TX_3_4_TEST_EN (WCD939X_TX_3_4_BASE+0x00)
  103. #define WCD939X_TX_3_4_ADC_IB (WCD939X_TX_3_4_BASE+0x01)
  104. #define WCD939X_TX_3_4_ATEST_REFCTL (WCD939X_TX_3_4_BASE+0x02)
  105. #define WCD939X_TX_3_4_TEST_CTL (WCD939X_TX_3_4_BASE+0x03)
  106. #define WCD939X_TEST_BLK_EN3 (WCD939X_TX_3_4_BASE+0x04)
  107. #define WCD939X_TXFE3_CLKDIV (WCD939X_TX_3_4_BASE+0x05)
  108. #define WCD939X_SAR4_ERR (WCD939X_TX_3_4_BASE+0x06)
  109. #define WCD939X_SAR3_ERR (WCD939X_TX_3_4_BASE+0x07)
  110. #define WCD939X_TEST_BLK_EN2 (WCD939X_TX_3_4_BASE+0x08)
  111. #define WCD939X_TXFE2_CLKDIV (WCD939X_TX_3_4_BASE+0x09)
  112. #define WCD939X_TX_3_4_SPARE1 (WCD939X_TX_3_4_BASE+0x0a)
  113. #define WCD939X_TEST_BLK_EN4 (WCD939X_TX_3_4_BASE+0x0b)
  114. #define WCD939X_TXFE4_CLKDIV (WCD939X_TX_3_4_BASE+0x0c)
  115. #define WCD939X_TX_3_4_SPARE2 (WCD939X_TX_3_4_BASE+0x0d)
  116. #define WCD939X_CLASSH_BASE (WCD939X_BASE+0x98)
  117. #define WCD939X_MODE_1 (WCD939X_CLASSH_BASE+0x00)
  118. #define WCD939X_MODE_2 (WCD939X_CLASSH_BASE+0x01)
  119. #define WCD939X_MODE_3 (WCD939X_CLASSH_BASE+0x02)
  120. #define WCD939X_CTRL_VCL_1 (WCD939X_CLASSH_BASE+0x03)
  121. #define WCD939X_CTRL_VCL_2 (WCD939X_CLASSH_BASE+0x04)
  122. #define WCD939X_CTRL_CCL_1 (WCD939X_CLASSH_BASE+0x05)
  123. #define WCD939X_CTRL_CCL_2 (WCD939X_CLASSH_BASE+0x06)
  124. #define WCD939X_CTRL_CCL_3 (WCD939X_CLASSH_BASE+0x07)
  125. #define WCD939X_CTRL_CCL_4 (WCD939X_CLASSH_BASE+0x08)
  126. #define WCD939X_CTRL_CCL_5 (WCD939X_CLASSH_BASE+0x09)
  127. #define WCD939X_BUCK_TMUX_A_D (WCD939X_CLASSH_BASE+0x0a)
  128. #define WCD939X_BUCK_SW_DRV_CNTL (WCD939X_CLASSH_BASE+0x0b)
  129. #define WCD939X_SPARE (WCD939X_CLASSH_BASE+0x0c)
  130. #define WCD939X_FLYBACK_BASE (WCD939X_BASE+0xa5)
  131. #define WCD939X_EN (WCD939X_FLYBACK_BASE+0x00)
  132. #define WCD939X_VNEG_CTRL_1 (WCD939X_FLYBACK_BASE+0x01)
  133. #define WCD939X_VNEG_CTRL_2 (WCD939X_FLYBACK_BASE+0x02)
  134. #define WCD939X_VNEG_CTRL_3 (WCD939X_FLYBACK_BASE+0x03)
  135. #define WCD939X_VNEG_CTRL_4 (WCD939X_FLYBACK_BASE+0x04)
  136. #define WCD939X_VNEG_CTRL_5 (WCD939X_FLYBACK_BASE+0x05)
  137. #define WCD939X_VNEG_CTRL_6 (WCD939X_FLYBACK_BASE+0x06)
  138. #define WCD939X_VNEG_CTRL_7 (WCD939X_FLYBACK_BASE+0x07)
  139. #define WCD939X_VNEG_CTRL_8 (WCD939X_FLYBACK_BASE+0x08)
  140. #define WCD939X_VNEG_CTRL_9 (WCD939X_FLYBACK_BASE+0x09)
  141. #define WCD939X_VNEGDAC_CTRL_1 (WCD939X_FLYBACK_BASE+0x0a)
  142. #define WCD939X_VNEGDAC_CTRL_2 (WCD939X_FLYBACK_BASE+0x0b)
  143. #define WCD939X_VNEGDAC_CTRL_3 (WCD939X_FLYBACK_BASE+0x0c)
  144. #define WCD939X_CTRL_1 (WCD939X_FLYBACK_BASE+0x0d)
  145. #define WCD939X_FLYBACK_TEST_CTL (WCD939X_FLYBACK_BASE+0x0e)
  146. #define WCD939X_RX_BASE (WCD939X_BASE+0xb4)
  147. #define WCD939X_AUX_SW_CTL (WCD939X_RX_BASE+0x00)
  148. #define WCD939X_PA_AUX_IN_CONN (WCD939X_RX_BASE+0x01)
  149. #define WCD939X_TIMER_DIV (WCD939X_RX_BASE+0x02)
  150. #define WCD939X_OCP_CTL (WCD939X_RX_BASE+0x03)
  151. #define WCD939X_OCP_COUNT (WCD939X_RX_BASE+0x04)
  152. #define WCD939X_BIAS_EAR_DAC (WCD939X_RX_BASE+0x05)
  153. #define WCD939X_BIAS_EAR_AMP (WCD939X_RX_BASE+0x06)
  154. #define WCD939X_BIAS_HPH_LDO (WCD939X_RX_BASE+0x07)
  155. #define WCD939X_BIAS_HPH_PA (WCD939X_RX_BASE+0x08)
  156. #define WCD939X_BIAS_HPH_RDACBUFF_CNP2 (WCD939X_RX_BASE+0x09)
  157. #define WCD939X_BIAS_HPH_RDAC_LDO (WCD939X_RX_BASE+0x0a)
  158. #define WCD939X_BIAS_HPH_CNP1 (WCD939X_RX_BASE+0x0b)
  159. #define WCD939X_BIAS_HPH_LOWPOWER (WCD939X_RX_BASE+0x0c)
  160. #define WCD939X_BIAS_AUX_DAC (WCD939X_RX_BASE+0x0d)
  161. #define WCD939X_BIAS_AUX_AMP (WCD939X_RX_BASE+0x0e)
  162. #define WCD939X_BIAS_VNEGDAC_BLEEDER (WCD939X_RX_BASE+0x0f)
  163. #define WCD939X_BIAS_MISC (WCD939X_RX_BASE+0x10)
  164. #define WCD939X_BIAS_BUCK_RST (WCD939X_RX_BASE+0x11)
  165. #define WCD939X_BIAS_BUCK_VREF_ERRAMP (WCD939X_RX_BASE+0x12)
  166. #define WCD939X_BIAS_FLYB_ERRAMP (WCD939X_RX_BASE+0x13)
  167. #define WCD939X_BIAS_FLYB_BUFF (WCD939X_RX_BASE+0x14)
  168. #define WCD939X_BIAS_FLYB_MID_RST (WCD939X_RX_BASE+0x15)
  169. #define WCD939X_HPH_BASE (WCD939X_BASE+0xca)
  170. #define WCD939X_L_STATUS (WCD939X_HPH_BASE+0x00)
  171. #define WCD939X_R_STATUS (WCD939X_HPH_BASE+0x01)
  172. #define WCD939X_CNP_EN (WCD939X_HPH_BASE+0x02)
  173. #define WCD939X_CNP_WG_CTL (WCD939X_HPH_BASE+0x03)
  174. #define WCD939X_CNP_WG_TIME (WCD939X_HPH_BASE+0x04)
  175. #define WCD939X_HPH_OCP_CTL (WCD939X_HPH_BASE+0x05)
  176. #define WCD939X_AUTO_CHOP (WCD939X_HPH_BASE+0x06)
  177. #define WCD939X_CHOP_CTL (WCD939X_HPH_BASE+0x07)
  178. #define WCD939X_PA_CTL1 (WCD939X_HPH_BASE+0x08)
  179. #define WCD939X_PA_CTL2 (WCD939X_HPH_BASE+0x09)
  180. #define WCD939X_L_EN (WCD939X_HPH_BASE+0x0a)
  181. #define WCD939X_L_TEST (WCD939X_HPH_BASE+0x0b)
  182. #define WCD939X_L_ATEST (WCD939X_HPH_BASE+0x0c)
  183. #define WCD939X_R_EN (WCD939X_HPH_BASE+0x0d)
  184. #define WCD939X_R_TEST (WCD939X_HPH_BASE+0x0e)
  185. #define WCD939X_R_ATEST (WCD939X_HPH_BASE+0x0f)
  186. #define WCD939X_RDAC_CLK_CTL1 (WCD939X_HPH_BASE+0x10)
  187. #define WCD939X_RDAC_CLK_CTL2 (WCD939X_HPH_BASE+0x11)
  188. #define WCD939X_RDAC_LDO_CTL (WCD939X_HPH_BASE+0x12)
  189. #define WCD939X_RDAC_CHOP_CLK_LP_CTL (WCD939X_HPH_BASE+0x13)
  190. #define WCD939X_REFBUFF_UHQA_CTL (WCD939X_HPH_BASE+0x14)
  191. #define WCD939X_REFBUFF_LP_CTL (WCD939X_HPH_BASE+0x15)
  192. #define WCD939X_L_DAC_CTL (WCD939X_HPH_BASE+0x16)
  193. #define WCD939X_R_DAC_CTL (WCD939X_HPH_BASE+0x17)
  194. #define WCD939X_HPH_SURGE_BASE (WCD939X_BASE+0xe2)
  195. #define WCD939X_HPHLR_SURGE_COMP_SEL (WCD939X_HPH_SURGE_BASE+0x00)
  196. #define WCD939X_HPHLR_SURGE_EN (WCD939X_HPH_SURGE_BASE+0x01)
  197. #define WCD939X_HPHLR_SURGE_MISC1 (WCD939X_HPH_SURGE_BASE+0x02)
  198. #define WCD939X_HPHLR_SURGE_STATUS (WCD939X_HPH_SURGE_BASE+0x03)
  199. #define WCD939X_EAR_BASE (WCD939X_BASE+0xea)
  200. #define WCD939X_EAR_EN_REG (WCD939X_EAR_BASE+0x00)
  201. #define WCD939X_EAR_PA_CON (WCD939X_EAR_BASE+0x01)
  202. #define WCD939X_EAR_SP_CON (WCD939X_EAR_BASE+0x02)
  203. #define WCD939X_EAR_DAC_CON (WCD939X_EAR_BASE+0x03)
  204. #define WCD939X_EAR_CNP_FSM_CON (WCD939X_EAR_BASE+0x04)
  205. #define WCD939X_EAR_TEST_CTL (WCD939X_EAR_BASE+0x05)
  206. #define WCD939X_STATUS_REG_1 (WCD939X_EAR_BASE+0x06)
  207. #define WCD939X_STATUS_REG_2 (WCD939X_EAR_BASE+0x07)
  208. #define WCD939X_ANA_NEW_BASE (WCD939X_BASE+0x101)
  209. #define WCD939X_ANA_NEW_PAGE (WCD939X_ANA_NEW_BASE+0x00)
  210. #define WCD939X_HPH_NEW_BASE (WCD939X_BASE+0x102)
  211. #define WCD939X_ANA_HPH2 (WCD939X_HPH_NEW_BASE+0x00)
  212. #define WCD939X_ANA_HPH3 (WCD939X_HPH_NEW_BASE+0x01)
  213. #define WCD939X_SLEEP_BASE (WCD939X_BASE+0x104)
  214. #define WCD939X_SLEEP_CTL (WCD939X_SLEEP_BASE+0x00)
  215. #define WCD939X_WATCHDOG_CTL (WCD939X_SLEEP_BASE+0x01)
  216. #define WCD939X_MBHC_NEW_BASE (WCD939X_BASE+0x120)
  217. #define WCD939X_ELECT_REM_CLAMP_CTL (WCD939X_MBHC_NEW_BASE+0x00)
  218. #define WCD939X_CTL_1 (WCD939X_MBHC_NEW_BASE+0x01)
  219. #define WCD939X_CTL_2 (WCD939X_MBHC_NEW_BASE+0x02)
  220. #define WCD939X_PLUG_DETECT_CTL (WCD939X_MBHC_NEW_BASE+0x03)
  221. #define WCD939X_ZDET_ANA_CTL (WCD939X_MBHC_NEW_BASE+0x04)
  222. #define WCD939X_ZDET_RAMP_CTL (WCD939X_MBHC_NEW_BASE+0x05)
  223. #define WCD939X_FSM_STATUS (WCD939X_MBHC_NEW_BASE+0x06)
  224. #define WCD939X_ADC_RESULT (WCD939X_MBHC_NEW_BASE+0x07)
  225. #define WCD939X_TX_NEW_BASE (WCD939X_BASE+0x128)
  226. #define WCD939X_TX_CH12_MUX (WCD939X_TX_NEW_BASE+0x00)
  227. #define WCD939X_TX_CH34_MUX (WCD939X_TX_NEW_BASE+0x01)
  228. #define WCD939X_DIE_CRACK_BASE (WCD939X_BASE+0x12d)
  229. #define WCD939X_DIE_CRK_DET_EN (WCD939X_DIE_CRACK_BASE+0x00)
  230. #define WCD939X_DIE_CRK_DET_OUT (WCD939X_DIE_CRACK_BASE+0x01)
  231. #define WCD939X_HPH_NEW_INT_BASE (WCD939X_BASE+0x133)
  232. #define WCD939X_RDAC_GAIN_CTL (WCD939X_HPH_NEW_INT_BASE+0x00)
  233. #define WCD939X_PA_GAIN_CTL_L (WCD939X_HPH_NEW_INT_BASE+0x01)
  234. #define WCD939X_RDAC_VREF_CTL (WCD939X_HPH_NEW_INT_BASE+0x02)
  235. #define WCD939X_RDAC_OVERRIDE_CTL (WCD939X_HPH_NEW_INT_BASE+0x03)
  236. #define WCD939X_PA_GAIN_CTL_R (WCD939X_HPH_NEW_INT_BASE+0x04)
  237. #define WCD939X_PA_MISC1 (WCD939X_HPH_NEW_INT_BASE+0x05)
  238. #define WCD939X_PA_MISC2 (WCD939X_HPH_NEW_INT_BASE+0x06)
  239. #define WCD939X_PA_RDAC_MISC (WCD939X_HPH_NEW_INT_BASE+0x07)
  240. #define WCD939X_HPH_TIMER1 (WCD939X_HPH_NEW_INT_BASE+0x08)
  241. #define WCD939X_HPH_TIMER2 (WCD939X_HPH_NEW_INT_BASE+0x09)
  242. #define WCD939X_HPH_TIMER3 (WCD939X_HPH_NEW_INT_BASE+0x0a)
  243. #define WCD939X_HPH_TIMER4 (WCD939X_HPH_NEW_INT_BASE+0x0b)
  244. #define WCD939X_PA_RDAC_MISC2 (WCD939X_HPH_NEW_INT_BASE+0x0c)
  245. #define WCD939X_PA_RDAC_MISC3 (WCD939X_HPH_NEW_INT_BASE+0x0d)
  246. #define WCD939X_RDAC_HD2_CTL_L (WCD939X_HPH_NEW_INT_BASE+0x0e)
  247. #define WCD939X_RDAC_HD2_CTL_R (WCD939X_HPH_NEW_INT_BASE+0x0f)
  248. #define WCD939X_RX_NEW_INT_BASE (WCD939X_BASE+0x146)
  249. #define WCD939X_HPH_RDAC_BIAS_LOHIFI (WCD939X_RX_NEW_INT_BASE+0x00)
  250. #define WCD939X_HPH_RDAC_BIAS_ULP (WCD939X_RX_NEW_INT_BASE+0x01)
  251. #define WCD939X_HPH_RDAC_LDO_LP (WCD939X_RX_NEW_INT_BASE+0x02)
  252. #define WCD939X_MBHC_NEW_INT_BASE (WCD939X_BASE+0x1b0)
  253. #define WCD939X_MOISTURE_DET_DC_CTRL (WCD939X_MBHC_NEW_INT_BASE+0x00)
  254. #define WCD939X_MOISTURE_DET_POLLING_CTRL (WCD939X_MBHC_NEW_INT_BASE+0x01)
  255. #define WCD939X_MECH_DET_CURRENT (WCD939X_MBHC_NEW_INT_BASE+0x02)
  256. #define WCD939X_ZDET_CLK_AND_MOISTURE_CTL_NEW (WCD939X_MBHC_NEW_INT_BASE+0x03)
  257. #define WCD939X_EAR_INT_NEW_BASE (WCD939X_BASE+0x1b8)
  258. #define WCD939X_EAR_CHOPPER_CON (WCD939X_EAR_INT_NEW_BASE+0x00)
  259. #define WCD939X_CNP_VCM_CON1 (WCD939X_EAR_INT_NEW_BASE+0x01)
  260. #define WCD939X_CNP_VCM_CON2 (WCD939X_EAR_INT_NEW_BASE+0x02)
  261. #define WCD939X_EAR_DYNAMIC_BIAS (WCD939X_EAR_INT_NEW_BASE+0x03)
  262. #define WCD939X_SLEEP_INT_BASE (WCD939X_BASE+0x1d1)
  263. #define WCD939X_WATCHDOG_CTL_1 (WCD939X_SLEEP_INT_BASE+0x00)
  264. #define WCD939X_WATCHDOG_CTL_2 (WCD939X_SLEEP_INT_BASE+0x01)
  265. #define WCD939X_DIE_CRACK_INT_BASE (WCD939X_BASE+0x1d4)
  266. #define WCD939X_DIE_CRK_DET_INT1 (WCD939X_DIE_CRACK_INT_BASE+0x00)
  267. #define WCD939X_DIE_CRK_DET_INT2 (WCD939X_DIE_CRACK_INT_BASE+0x01)
  268. #define WCD939X_TX_COM_NEW_INT_BASE (WCD939X_BASE+0x1d6)
  269. #define WCD939X_TXFE_DIVSTOP_L2 (WCD939X_TX_COM_NEW_INT_BASE+0x00)
  270. #define WCD939X_TXFE_DIVSTOP_L1 (WCD939X_TX_COM_NEW_INT_BASE+0x01)
  271. #define WCD939X_TXFE_DIVSTOP_L0 (WCD939X_TX_COM_NEW_INT_BASE+0x02)
  272. #define WCD939X_TXFE_DIVSTOP_ULP1P2M (WCD939X_TX_COM_NEW_INT_BASE+0x03)
  273. #define WCD939X_TXFE_DIVSTOP_ULP0P6M (WCD939X_TX_COM_NEW_INT_BASE+0x04)
  274. #define WCD939X_TXFE_ICTRL_STG1_L2L1 (WCD939X_TX_COM_NEW_INT_BASE+0x05)
  275. #define WCD939X_TXFE_ICTRL_STG1_L0 (WCD939X_TX_COM_NEW_INT_BASE+0x06)
  276. #define WCD939X_TXFE_ICTRL_STG1_ULP (WCD939X_TX_COM_NEW_INT_BASE+0x07)
  277. #define WCD939X_TXFE_ICTRL_STG2MAIN_L2L1 (WCD939X_TX_COM_NEW_INT_BASE+0x08)
  278. #define WCD939X_TXFE_ICTRL_STG2MAIN_L0 (WCD939X_TX_COM_NEW_INT_BASE+0x09)
  279. #define WCD939X_TXFE_ICTRL_STG2MAIN_ULP (WCD939X_TX_COM_NEW_INT_BASE+0x0a)
  280. #define WCD939X_TXFE_ICTRL_STG2CASC_L2L1L0 (WCD939X_TX_COM_NEW_INT_BASE+0x0b)
  281. #define WCD939X_TXFE_ICTRL_STG2CASC_ULP (WCD939X_TX_COM_NEW_INT_BASE+0x0c)
  282. #define WCD939X_TXADC_SCBIAS_L2L1 (WCD939X_TX_COM_NEW_INT_BASE+0x0d)
  283. #define WCD939X_TXADC_SCBIAS_L0ULP (WCD939X_TX_COM_NEW_INT_BASE+0x0e)
  284. #define WCD939X_TXADC_INT_L2 (WCD939X_TX_COM_NEW_INT_BASE+0x0f)
  285. #define WCD939X_TXADC_INT_L1 (WCD939X_TX_COM_NEW_INT_BASE+0x10)
  286. #define WCD939X_TXADC_INT_L0 (WCD939X_TX_COM_NEW_INT_BASE+0x11)
  287. #define WCD939X_TXADC_INT_ULP (WCD939X_TX_COM_NEW_INT_BASE+0x12)
  288. #define WCD939X_DIGITAL_BASE (WCD939X_BASE+0x401)
  289. #define WCD939X_DIGITAL_PAGE (WCD939X_DIGITAL_BASE+0x00)
  290. #define WCD939X_CHIP_ID0 (WCD939X_DIGITAL_BASE+0x01)
  291. #define WCD939X_CHIP_ID1 (WCD939X_DIGITAL_BASE+0x02)
  292. #define WCD939X_CHIP_ID2 (WCD939X_DIGITAL_BASE+0x03)
  293. #define WCD939X_CHIP_ID3 (WCD939X_DIGITAL_BASE+0x04)
  294. #define WCD939X_SWR_TX_CLK_RATE (WCD939X_DIGITAL_BASE+0x05)
  295. #define WCD939X_CDC_RST_CTL (WCD939X_DIGITAL_BASE+0x06)
  296. #define WCD939X_TOP_CLK_CFG (WCD939X_DIGITAL_BASE+0x07)
  297. #define WCD939X_CDC_ANA_CLK_CTL (WCD939X_DIGITAL_BASE+0x08)
  298. #define WCD939X_CDC_DIG_CLK_CTL (WCD939X_DIGITAL_BASE+0x09)
  299. #define WCD939X_SWR_RST_EN (WCD939X_DIGITAL_BASE+0x0a)
  300. #define WCD939X_CDC_PATH_MODE (WCD939X_DIGITAL_BASE+0x0b)
  301. #define WCD939X_CDC_RX_RST (WCD939X_DIGITAL_BASE+0x0c)
  302. #define WCD939X_CDC_RX0_CTL (WCD939X_DIGITAL_BASE+0x0d)
  303. #define WCD939X_CDC_RX1_CTL (WCD939X_DIGITAL_BASE+0x0e)
  304. #define WCD939X_CDC_RX2_CTL (WCD939X_DIGITAL_BASE+0x0f)
  305. #define WCD939X_CDC_TX_ANA_MODE_0_1 (WCD939X_DIGITAL_BASE+0x10)
  306. #define WCD939X_CDC_TX_ANA_MODE_2_3 (WCD939X_DIGITAL_BASE+0x11)
  307. #define WCD939X_CDC_COMP_CTL_0 (WCD939X_DIGITAL_BASE+0x14)
  308. #define WCD939X_CDC_ANA_TX_CLK_CTL (WCD939X_DIGITAL_BASE+0x17)
  309. #define WCD939X_CDC_HPH_DSM_A1_0 (WCD939X_DIGITAL_BASE+0x18)
  310. #define WCD939X_CDC_HPH_DSM_A1_1 (WCD939X_DIGITAL_BASE+0x19)
  311. #define WCD939X_CDC_HPH_DSM_A2_0 (WCD939X_DIGITAL_BASE+0x1a)
  312. #define WCD939X_CDC_HPH_DSM_A2_1 (WCD939X_DIGITAL_BASE+0x1b)
  313. #define WCD939X_CDC_HPH_DSM_A3_0 (WCD939X_DIGITAL_BASE+0x1c)
  314. #define WCD939X_CDC_HPH_DSM_A3_1 (WCD939X_DIGITAL_BASE+0x1d)
  315. #define WCD939X_CDC_HPH_DSM_A4_0 (WCD939X_DIGITAL_BASE+0x1e)
  316. #define WCD939X_CDC_HPH_DSM_A4_1 (WCD939X_DIGITAL_BASE+0x1f)
  317. #define WCD939X_CDC_HPH_DSM_A5_0 (WCD939X_DIGITAL_BASE+0x20)
  318. #define WCD939X_CDC_HPH_DSM_A5_1 (WCD939X_DIGITAL_BASE+0x21)
  319. #define WCD939X_CDC_HPH_DSM_A6_0 (WCD939X_DIGITAL_BASE+0x22)
  320. #define WCD939X_CDC_HPH_DSM_A7_0 (WCD939X_DIGITAL_BASE+0x23)
  321. #define WCD939X_CDC_HPH_DSM_C_0 (WCD939X_DIGITAL_BASE+0x24)
  322. #define WCD939X_CDC_HPH_DSM_C_1 (WCD939X_DIGITAL_BASE+0x25)
  323. #define WCD939X_CDC_HPH_DSM_C_2 (WCD939X_DIGITAL_BASE+0x26)
  324. #define WCD939X_CDC_HPH_DSM_C_3 (WCD939X_DIGITAL_BASE+0x27)
  325. #define WCD939X_CDC_HPH_DSM_R1 (WCD939X_DIGITAL_BASE+0x28)
  326. #define WCD939X_CDC_HPH_DSM_R2 (WCD939X_DIGITAL_BASE+0x29)
  327. #define WCD939X_CDC_HPH_DSM_R3 (WCD939X_DIGITAL_BASE+0x2a)
  328. #define WCD939X_CDC_HPH_DSM_R4 (WCD939X_DIGITAL_BASE+0x2b)
  329. #define WCD939X_CDC_HPH_DSM_R5 (WCD939X_DIGITAL_BASE+0x2c)
  330. #define WCD939X_CDC_HPH_DSM_R6 (WCD939X_DIGITAL_BASE+0x2d)
  331. #define WCD939X_CDC_HPH_DSM_R7 (WCD939X_DIGITAL_BASE+0x2e)
  332. #define WCD939X_CDC_EAR_DSM_A1_0 (WCD939X_DIGITAL_BASE+0x2f)
  333. #define WCD939X_CDC_EAR_DSM_A1_1 (WCD939X_DIGITAL_BASE+0x30)
  334. #define WCD939X_CDC_EAR_DSM_A2_0 (WCD939X_DIGITAL_BASE+0x31)
  335. #define WCD939X_CDC_EAR_DSM_A2_1 (WCD939X_DIGITAL_BASE+0x32)
  336. #define WCD939X_CDC_EAR_DSM_A3_0 (WCD939X_DIGITAL_BASE+0x33)
  337. #define WCD939X_CDC_EAR_DSM_A3_1 (WCD939X_DIGITAL_BASE+0x34)
  338. #define WCD939X_CDC_EAR_DSM_A4_0 (WCD939X_DIGITAL_BASE+0x35)
  339. #define WCD939X_CDC_EAR_DSM_A4_1 (WCD939X_DIGITAL_BASE+0x36)
  340. #define WCD939X_CDC_EAR_DSM_A5_0 (WCD939X_DIGITAL_BASE+0x37)
  341. #define WCD939X_CDC_EAR_DSM_A5_1 (WCD939X_DIGITAL_BASE+0x38)
  342. #define WCD939X_CDC_EAR_DSM_A6_0 (WCD939X_DIGITAL_BASE+0x39)
  343. #define WCD939X_CDC_EAR_DSM_A7_0 (WCD939X_DIGITAL_BASE+0x3a)
  344. #define WCD939X_CDC_EAR_DSM_C_0 (WCD939X_DIGITAL_BASE+0x3b)
  345. #define WCD939X_CDC_EAR_DSM_C_1 (WCD939X_DIGITAL_BASE+0x3c)
  346. #define WCD939X_CDC_EAR_DSM_C_2 (WCD939X_DIGITAL_BASE+0x3d)
  347. #define WCD939X_CDC_EAR_DSM_C_3 (WCD939X_DIGITAL_BASE+0x3e)
  348. #define WCD939X_CDC_EAR_DSM_R1 (WCD939X_DIGITAL_BASE+0x3f)
  349. #define WCD939X_CDC_EAR_DSM_R2 (WCD939X_DIGITAL_BASE+0x40)
  350. #define WCD939X_CDC_EAR_DSM_R3 (WCD939X_DIGITAL_BASE+0x41)
  351. #define WCD939X_CDC_EAR_DSM_R4 (WCD939X_DIGITAL_BASE+0x42)
  352. #define WCD939X_CDC_EAR_DSM_R5 (WCD939X_DIGITAL_BASE+0x43)
  353. #define WCD939X_CDC_EAR_DSM_R6 (WCD939X_DIGITAL_BASE+0x44)
  354. #define WCD939X_CDC_EAR_DSM_R7 (WCD939X_DIGITAL_BASE+0x45)
  355. #define WCD939X_CDC_HPH_GAIN_RX_0 (WCD939X_DIGITAL_BASE+0x46)
  356. #define WCD939X_CDC_HPH_GAIN_RX_1 (WCD939X_DIGITAL_BASE+0x47)
  357. #define WCD939X_CDC_HPH_GAIN_DSD_0 (WCD939X_DIGITAL_BASE+0x48)
  358. #define WCD939X_CDC_HPH_GAIN_DSD_1 (WCD939X_DIGITAL_BASE+0x49)
  359. #define WCD939X_CDC_HPH_GAIN_DSD_2 (WCD939X_DIGITAL_BASE+0x4a)
  360. #define WCD939X_CDC_EAR_GAIN_DSD_0 (WCD939X_DIGITAL_BASE+0x4b)
  361. #define WCD939X_CDC_EAR_GAIN_DSD_1 (WCD939X_DIGITAL_BASE+0x4c)
  362. #define WCD939X_CDC_EAR_GAIN_DSD_2 (WCD939X_DIGITAL_BASE+0x4d)
  363. #define WCD939X_CDC_HPH_GAIN_CTL (WCD939X_DIGITAL_BASE+0x4e)
  364. #define WCD939X_CDC_EAR_GAIN_CTL (WCD939X_DIGITAL_BASE+0x4f)
  365. #define WCD939X_CDC_EAR_PATH_CTL (WCD939X_DIGITAL_BASE+0x50)
  366. #define WCD939X_CDC_SWR_CLH (WCD939X_DIGITAL_BASE+0x51)
  367. #define WCD939X_SWR_CLH_BYP (WCD939X_DIGITAL_BASE+0x52)
  368. #define WCD939X_CDC_TX0_CTL (WCD939X_DIGITAL_BASE+0x53)
  369. #define WCD939X_CDC_TX1_CTL (WCD939X_DIGITAL_BASE+0x54)
  370. #define WCD939X_CDC_TX2_CTL (WCD939X_DIGITAL_BASE+0x55)
  371. #define WCD939X_CDC_TX_RST (WCD939X_DIGITAL_BASE+0x56)
  372. #define WCD939X_CDC_REQ_CTL (WCD939X_DIGITAL_BASE+0x57)
  373. #define WCD939X_CDC_RST (WCD939X_DIGITAL_BASE+0x58)
  374. #define WCD939X_CDC_AMIC_CTL (WCD939X_DIGITAL_BASE+0x5a)
  375. #define WCD939X_CDC_DMIC_CTL (WCD939X_DIGITAL_BASE+0x5b)
  376. #define WCD939X_CDC_DMIC1_CTL (WCD939X_DIGITAL_BASE+0x5c)
  377. #define WCD939X_CDC_DMIC2_CTL (WCD939X_DIGITAL_BASE+0x5d)
  378. #define WCD939X_CDC_DMIC3_CTL (WCD939X_DIGITAL_BASE+0x5e)
  379. #define WCD939X_CDC_DMIC4_CTL (WCD939X_DIGITAL_BASE+0x5f)
  380. #define WCD939X_EFUSE_PRG_CTL (WCD939X_DIGITAL_BASE+0x60)
  381. #define WCD939X_EFUSE_CTL (WCD939X_DIGITAL_BASE+0x61)
  382. #define WCD939X_CDC_DMIC_RATE_1_2 (WCD939X_DIGITAL_BASE+0x62)
  383. #define WCD939X_CDC_DMIC_RATE_3_4 (WCD939X_DIGITAL_BASE+0x63)
  384. #define WCD939X_PDM_WD_CTL0 (WCD939X_DIGITAL_BASE+0x65)
  385. #define WCD939X_PDM_WD_CTL1 (WCD939X_DIGITAL_BASE+0x66)
  386. #define WCD939X_PDM_WD_CTL2 (WCD939X_DIGITAL_BASE+0x67)
  387. #define WCD939X_INTR_MODE (WCD939X_DIGITAL_BASE+0x6a)
  388. #define WCD939X_INTR_MASK_0 (WCD939X_DIGITAL_BASE+0x6b)
  389. #define WCD939X_INTR_MASK_1 (WCD939X_DIGITAL_BASE+0x6c)
  390. #define WCD939X_INTR_MASK_2 (WCD939X_DIGITAL_BASE+0x6d)
  391. #define WCD939X_INTR_STATUS_0 (WCD939X_DIGITAL_BASE+0x6e)
  392. #define WCD939X_INTR_STATUS_1 (WCD939X_DIGITAL_BASE+0x6f)
  393. #define WCD939X_INTR_STATUS_2 (WCD939X_DIGITAL_BASE+0x70)
  394. #define WCD939X_INTR_CLEAR_0 (WCD939X_DIGITAL_BASE+0x71)
  395. #define WCD939X_INTR_CLEAR_1 (WCD939X_DIGITAL_BASE+0x72)
  396. #define WCD939X_INTR_CLEAR_2 (WCD939X_DIGITAL_BASE+0x73)
  397. #define WCD939X_INTR_LEVEL_0 (WCD939X_DIGITAL_BASE+0x74)
  398. #define WCD939X_INTR_LEVEL_1 (WCD939X_DIGITAL_BASE+0x75)
  399. #define WCD939X_INTR_LEVEL_2 (WCD939X_DIGITAL_BASE+0x76)
  400. #define WCD939X_INTR_SET_0 (WCD939X_DIGITAL_BASE+0x77)
  401. #define WCD939X_INTR_SET_1 (WCD939X_DIGITAL_BASE+0x78)
  402. #define WCD939X_INTR_SET_2 (WCD939X_DIGITAL_BASE+0x79)
  403. #define WCD939X_INTR_TEST_0 (WCD939X_DIGITAL_BASE+0x7a)
  404. #define WCD939X_INTR_TEST_1 (WCD939X_DIGITAL_BASE+0x7b)
  405. #define WCD939X_INTR_TEST_2 (WCD939X_DIGITAL_BASE+0x7c)
  406. #define WCD939X_TX_MODE_DBG_EN (WCD939X_DIGITAL_BASE+0x7f)
  407. #define WCD939X_TX_MODE_DBG_0_1 (WCD939X_DIGITAL_BASE+0x80)
  408. #define WCD939X_TX_MODE_DBG_2_3 (WCD939X_DIGITAL_BASE+0x81)
  409. #define WCD939X_LB_IN_SEL_CTL (WCD939X_DIGITAL_BASE+0x82)
  410. #define WCD939X_LOOP_BACK_MODE (WCD939X_DIGITAL_BASE+0x83)
  411. #define WCD939X_SWR_DAC_TEST (WCD939X_DIGITAL_BASE+0x84)
  412. #define WCD939X_SWR_HM_TEST_RX_0 (WCD939X_DIGITAL_BASE+0x85)
  413. #define WCD939X_SWR_HM_TEST_TX_0 (WCD939X_DIGITAL_BASE+0x86)
  414. #define WCD939X_SWR_HM_TEST_RX_1 (WCD939X_DIGITAL_BASE+0x87)
  415. #define WCD939X_SWR_HM_TEST_TX_1 (WCD939X_DIGITAL_BASE+0x88)
  416. #define WCD939X_SWR_HM_TEST_TX_2 (WCD939X_DIGITAL_BASE+0x89)
  417. #define WCD939X_SWR_HM_TEST_0 (WCD939X_DIGITAL_BASE+0x8a)
  418. #define WCD939X_SWR_HM_TEST_1 (WCD939X_DIGITAL_BASE+0x8b)
  419. #define WCD939X_PAD_CTL_SWR_0 (WCD939X_DIGITAL_BASE+0x8c)
  420. #define WCD939X_PAD_CTL_SWR_1 (WCD939X_DIGITAL_BASE+0x8d)
  421. #define WCD939X_I2C_CTL (WCD939X_DIGITAL_BASE+0x8e)
  422. #define WCD939X_CDC_TX_TANGGU_SW_MODE (WCD939X_DIGITAL_BASE+0x8f)
  423. #define WCD939X_EFUSE_TEST_CTL_0 (WCD939X_DIGITAL_BASE+0x90)
  424. #define WCD939X_EFUSE_TEST_CTL_1 (WCD939X_DIGITAL_BASE+0x91)
  425. #define WCD939X_EFUSE_T_DATA_0 (WCD939X_DIGITAL_BASE+0x92)
  426. #define WCD939X_EFUSE_T_DATA_1 (WCD939X_DIGITAL_BASE+0x93)
  427. #define WCD939X_PAD_CTL_PDM_RX0 (WCD939X_DIGITAL_BASE+0x94)
  428. #define WCD939X_PAD_CTL_PDM_RX1 (WCD939X_DIGITAL_BASE+0x95)
  429. #define WCD939X_PAD_CTL_PDM_TX0 (WCD939X_DIGITAL_BASE+0x96)
  430. #define WCD939X_PAD_CTL_PDM_TX1 (WCD939X_DIGITAL_BASE+0x97)
  431. #define WCD939X_PAD_CTL_PDM_TX2 (WCD939X_DIGITAL_BASE+0x98)
  432. #define WCD939X_PAD_INP_DIS_0 (WCD939X_DIGITAL_BASE+0x99)
  433. #define WCD939X_PAD_INP_DIS_1 (WCD939X_DIGITAL_BASE+0x9a)
  434. #define WCD939X_DRIVE_STRENGTH_0 (WCD939X_DIGITAL_BASE+0x9b)
  435. #define WCD939X_DRIVE_STRENGTH_1 (WCD939X_DIGITAL_BASE+0x9c)
  436. #define WCD939X_DRIVE_STRENGTH_2 (WCD939X_DIGITAL_BASE+0x9d)
  437. #define WCD939X_RX_DATA_EDGE_CTL (WCD939X_DIGITAL_BASE+0x9e)
  438. #define WCD939X_TX_DATA_EDGE_CTL (WCD939X_DIGITAL_BASE+0x9f)
  439. #define WCD939X_GPIO_MODE (WCD939X_DIGITAL_BASE+0xa0)
  440. #define WCD939X_PIN_CTL_OE (WCD939X_DIGITAL_BASE+0xa1)
  441. #define WCD939X_PIN_CTL_DATA_0 (WCD939X_DIGITAL_BASE+0xa2)
  442. #define WCD939X_PIN_CTL_DATA_1 (WCD939X_DIGITAL_BASE+0xa3)
  443. #define WCD939X_PIN_STATUS_0 (WCD939X_DIGITAL_BASE+0xa4)
  444. #define WCD939X_PIN_STATUS_1 (WCD939X_DIGITAL_BASE+0xa5)
  445. #define WCD939X_DIG_DEBUG_CTL (WCD939X_DIGITAL_BASE+0xa6)
  446. #define WCD939X_DIG_DEBUG_EN (WCD939X_DIGITAL_BASE+0xa7)
  447. #define WCD939X_ANA_CSR_DBG_ADD (WCD939X_DIGITAL_BASE+0xa8)
  448. #define WCD939X_ANA_CSR_DBG_CTL (WCD939X_DIGITAL_BASE+0xa9)
  449. #define WCD939X_SSP_DBG (WCD939X_DIGITAL_BASE+0xaa)
  450. #define WCD939X_MODE_STATUS_0 (WCD939X_DIGITAL_BASE+0xab)
  451. #define WCD939X_MODE_STATUS_1 (WCD939X_DIGITAL_BASE+0xac)
  452. #define WCD939X_SPARE_0 (WCD939X_DIGITAL_BASE+0xad)
  453. #define WCD939X_SPARE_1 (WCD939X_DIGITAL_BASE+0xae)
  454. #define WCD939X_SPARE_2 (WCD939X_DIGITAL_BASE+0xaf)
  455. #define WCD939X_EFUSE_REG_0 (WCD939X_DIGITAL_BASE+0xb0)
  456. #define WCD939X_EFUSE_REG_1 (WCD939X_DIGITAL_BASE+0xb1)
  457. #define WCD939X_EFUSE_REG_2 (WCD939X_DIGITAL_BASE+0xb2)
  458. #define WCD939X_EFUSE_REG_3 (WCD939X_DIGITAL_BASE+0xb3)
  459. #define WCD939X_EFUSE_REG_4 (WCD939X_DIGITAL_BASE+0xb4)
  460. #define WCD939X_EFUSE_REG_5 (WCD939X_DIGITAL_BASE+0xb5)
  461. #define WCD939X_EFUSE_REG_6 (WCD939X_DIGITAL_BASE+0xb6)
  462. #define WCD939X_EFUSE_REG_7 (WCD939X_DIGITAL_BASE+0xb7)
  463. #define WCD939X_EFUSE_REG_8 (WCD939X_DIGITAL_BASE+0xb8)
  464. #define WCD939X_EFUSE_REG_9 (WCD939X_DIGITAL_BASE+0xb9)
  465. #define WCD939X_EFUSE_REG_10 (WCD939X_DIGITAL_BASE+0xba)
  466. #define WCD939X_EFUSE_REG_11 (WCD939X_DIGITAL_BASE+0xbb)
  467. #define WCD939X_EFUSE_REG_12 (WCD939X_DIGITAL_BASE+0xbc)
  468. #define WCD939X_EFUSE_REG_13 (WCD939X_DIGITAL_BASE+0xbd)
  469. #define WCD939X_EFUSE_REG_14 (WCD939X_DIGITAL_BASE+0xbe)
  470. #define WCD939X_EFUSE_REG_15 (WCD939X_DIGITAL_BASE+0xbf)
  471. #define WCD939X_EFUSE_REG_16 (WCD939X_DIGITAL_BASE+0xc0)
  472. #define WCD939X_EFUSE_REG_17 (WCD939X_DIGITAL_BASE+0xc1)
  473. #define WCD939X_EFUSE_REG_18 (WCD939X_DIGITAL_BASE+0xc2)
  474. #define WCD939X_EFUSE_REG_19 (WCD939X_DIGITAL_BASE+0xc3)
  475. #define WCD939X_EFUSE_REG_20 (WCD939X_DIGITAL_BASE+0xc4)
  476. #define WCD939X_EFUSE_REG_21 (WCD939X_DIGITAL_BASE+0xc5)
  477. #define WCD939X_EFUSE_REG_22 (WCD939X_DIGITAL_BASE+0xc6)
  478. #define WCD939X_EFUSE_REG_23 (WCD939X_DIGITAL_BASE+0xc7)
  479. #define WCD939X_EFUSE_REG_24 (WCD939X_DIGITAL_BASE+0xc8)
  480. #define WCD939X_EFUSE_REG_25 (WCD939X_DIGITAL_BASE+0xc9)
  481. #define WCD939X_EFUSE_REG_26 (WCD939X_DIGITAL_BASE+0xca)
  482. #define WCD939X_EFUSE_REG_27 (WCD939X_DIGITAL_BASE+0xcb)
  483. #define WCD939X_EFUSE_REG_28 (WCD939X_DIGITAL_BASE+0xcc)
  484. #define WCD939X_EFUSE_REG_29 (WCD939X_DIGITAL_BASE+0xcd)
  485. #define WCD939X_EFUSE_REG_30 (WCD939X_DIGITAL_BASE+0xce)
  486. #define WCD939X_EFUSE_REG_31 (WCD939X_DIGITAL_BASE+0xcf)
  487. #define WCD939X_TX_REQ_FB_CTL_0 (WCD939X_DIGITAL_BASE+0xd0)
  488. #define WCD939X_TX_REQ_FB_CTL_1 (WCD939X_DIGITAL_BASE+0xd1)
  489. #define WCD939X_TX_REQ_FB_CTL_2 (WCD939X_DIGITAL_BASE+0xd2)
  490. #define WCD939X_TX_REQ_FB_CTL_3 (WCD939X_DIGITAL_BASE+0xd3)
  491. #define WCD939X_TX_REQ_FB_CTL_4 (WCD939X_DIGITAL_BASE+0xd4)
  492. #define WCD939X_DEM_BYPASS_DATA0 (WCD939X_DIGITAL_BASE+0xd5)
  493. #define WCD939X_DEM_BYPASS_DATA1 (WCD939X_DIGITAL_BASE+0xd6)
  494. #define WCD939X_DEM_BYPASS_DATA2 (WCD939X_DIGITAL_BASE+0xd7)
  495. #define WCD939X_DEM_BYPASS_DATA3 (WCD939X_DIGITAL_BASE+0xd8)
  496. #define WCD939X_DEM_SECOND_ORDER (WCD939X_DIGITAL_BASE+0xd9)
  497. #define WCD939X_DSM_CTRL (WCD939X_DIGITAL_BASE+0xda)
  498. #define WCD939X_DSM_0_STATIC_DATA_0 (WCD939X_DIGITAL_BASE+0xdb)
  499. #define WCD939X_DSM_0_STATIC_DATA_1 (WCD939X_DIGITAL_BASE+0xdc)
  500. #define WCD939X_DSM_0_STATIC_DATA_2 (WCD939X_DIGITAL_BASE+0xdd)
  501. #define WCD939X_DSM_0_STATIC_DATA_3 (WCD939X_DIGITAL_BASE+0xde)
  502. #define WCD939X_DSM_1_STATIC_DATA_0 (WCD939X_DIGITAL_BASE+0xdf)
  503. #define WCD939X_DSM_1_STATIC_DATA_1 (WCD939X_DIGITAL_BASE+0xe0)
  504. #define WCD939X_DSM_1_STATIC_DATA_2 (WCD939X_DIGITAL_BASE+0xe1)
  505. #define WCD939X_DSM_1_STATIC_DATA_3 (WCD939X_DIGITAL_BASE+0xe2)
  506. #define WCD939X_RX_PAGE (WCD939X_RX_BASE+0x00)
  507. #define WCD939X_TOP_CFG0 (WCD939X_RX_BASE+0x01)
  508. #define WCD939X_HPHL_COMP_WR_LSB (WCD939X_RX_BASE+0x02)
  509. #define WCD939X_HPHL_COMP_WR_MSB (WCD939X_RX_BASE+0x03)
  510. #define WCD939X_HPHL_COMP_LUT (WCD939X_RX_BASE+0x04)
  511. #define WCD939X_HPHL_COMP_RD_LSB (WCD939X_RX_BASE+0x05)
  512. #define WCD939X_HPHL_COMP_RD_MSB (WCD939X_RX_BASE+0x06)
  513. #define WCD939X_HPHR_COMP_WR_LSB (WCD939X_RX_BASE+0x07)
  514. #define WCD939X_HPHR_COMP_WR_MSB (WCD939X_RX_BASE+0x08)
  515. #define WCD939X_HPHR_COMP_LUT (WCD939X_RX_BASE+0x09)
  516. #define WCD939X_HPHR_COMP_RD_LSB (WCD939X_RX_BASE+0x0a)
  517. #define WCD939X_HPHR_COMP_RD_MSB (WCD939X_RX_BASE+0x0b)
  518. #define WCD939X_DSD0_DEBUG_CFG1 (WCD939X_RX_BASE+0x0c)
  519. #define WCD939X_DSD0_DEBUG_CFG2 (WCD939X_RX_BASE+0x0d)
  520. #define WCD939X_DSD0_DEBUG_CFG3 (WCD939X_RX_BASE+0x0e)
  521. #define WCD939X_DSD0_DEBUG_CFG4 (WCD939X_RX_BASE+0x0f)
  522. #define WCD939X_DSD0_DEBUG_CFG5 (WCD939X_RX_BASE+0x10)
  523. #define WCD939X_DSD0_DEBUG_CFG6 (WCD939X_RX_BASE+0x11)
  524. #define WCD939X_DSD1_DEBUG_CFG1 (WCD939X_RX_BASE+0x12)
  525. #define WCD939X_DSD1_DEBUG_CFG2 (WCD939X_RX_BASE+0x13)
  526. #define WCD939X_DSD1_DEBUG_CFG3 (WCD939X_RX_BASE+0x14)
  527. #define WCD939X_DSD1_DEBUG_CFG4 (WCD939X_RX_BASE+0x15)
  528. #define WCD939X_DSD1_DEBUG_CFG5 (WCD939X_RX_BASE+0x16)
  529. #define WCD939X_DSD1_DEBUG_CFG6 (WCD939X_RX_BASE+0x17)
  530. #define WCD939X_HPHL_RX_PATH_CFG0 (WCD939X_RX_BASE+0x1c)
  531. #define WCD939X_HPHL_RX_PATH_CFG1 (WCD939X_RX_BASE+0x1d)
  532. #define WCD939X_HPHR_RX_PATH_CFG0 (WCD939X_RX_BASE+0x1e)
  533. #define WCD939X_HPHR_RX_PATH_CFG1 (WCD939X_RX_BASE+0x1f)
  534. #define WCD939X_RX_PATH_CFG2 (WCD939X_RX_BASE+0x20)
  535. #define WCD939X_HPHL_RX_PATH_SEC0 (WCD939X_RX_BASE+0x21)
  536. #define WCD939X_HPHL_RX_PATH_SEC1 (WCD939X_RX_BASE+0x22)
  537. #define WCD939X_HPHL_RX_PATH_SEC2 (WCD939X_RX_BASE+0x23)
  538. #define WCD939X_HPHL_RX_PATH_SEC3 (WCD939X_RX_BASE+0x24)
  539. #define WCD939X_HPHR_RX_PATH_SEC0 (WCD939X_RX_BASE+0x25)
  540. #define WCD939X_HPHR_RX_PATH_SEC1 (WCD939X_RX_BASE+0x26)
  541. #define WCD939X_HPHR_RX_PATH_SEC2 (WCD939X_RX_BASE+0x27)
  542. #define WCD939X_HPHR_RX_PATH_SEC3 (WCD939X_RX_BASE+0x28)
  543. #define WCD939X_RX_PATH_SEC4 (WCD939X_RX_BASE+0x29)
  544. #define WCD939X_RX_PATH_SEC5 (WCD939X_RX_BASE+0x2a)
  545. #define WCD939X_COMPANDER_HPHL_BASE (WCD939X_BASE+0x541)
  546. #define WCD939X_CTL0 (WCD939X_COMPANDER_HPHL_BASE+0x00)
  547. #define WCD939X_CTL1 (WCD939X_COMPANDER_HPHL_BASE+0x01)
  548. #define WCD939X_CTL2 (WCD939X_COMPANDER_HPHL_BASE+0x02)
  549. #define WCD939X_CTL3 (WCD939X_COMPANDER_HPHL_BASE+0x03)
  550. #define WCD939X_CTL4 (WCD939X_COMPANDER_HPHL_BASE+0x04)
  551. #define WCD939X_CTL5 (WCD939X_COMPANDER_HPHL_BASE+0x05)
  552. #define WCD939X_CTL6 (WCD939X_COMPANDER_HPHL_BASE+0x06)
  553. #define WCD939X_CTL7 (WCD939X_COMPANDER_HPHL_BASE+0x07)
  554. #define WCD939X_CTL8 (WCD939X_COMPANDER_HPHL_BASE+0x08)
  555. #define WCD939X_CTL9 (WCD939X_COMPANDER_HPHL_BASE+0x09)
  556. #define WCD939X_CTL10 (WCD939X_COMPANDER_HPHL_BASE+0x0a)
  557. #define WCD939X_CTL11 (WCD939X_COMPANDER_HPHL_BASE+0x0b)
  558. #define WCD939X_CTL12 (WCD939X_COMPANDER_HPHL_BASE+0x0c)
  559. #define WCD939X_CTL13 (WCD939X_COMPANDER_HPHL_BASE+0x0d)
  560. #define WCD939X_CTL14 (WCD939X_COMPANDER_HPHL_BASE+0x0e)
  561. #define WCD939X_CTL15 (WCD939X_COMPANDER_HPHL_BASE+0x0f)
  562. #define WCD939X_CTL16 (WCD939X_COMPANDER_HPHL_BASE+0x10)
  563. #define WCD939X_CTL17 (WCD939X_COMPANDER_HPHL_BASE+0x11)
  564. #define WCD939X_CTL18 (WCD939X_COMPANDER_HPHL_BASE+0x12)
  565. #define WCD939X_CTL19 (WCD939X_COMPANDER_HPHL_BASE+0x13)
  566. #define WCD939X_R_BASE (WCD939X_BASE+0x561)
  567. #define WCD939X_R_CTL0 (WCD939X_R_BASE+0x00)
  568. #define WCD939X_R_CTL1 (WCD939X_R_BASE+0x01)
  569. #define WCD939X_R_CTL2 (WCD939X_R_BASE+0x02)
  570. #define WCD939X_R_CTL3 (WCD939X_R_BASE+0x03)
  571. #define WCD939X_R_CTL4 (WCD939X_R_BASE+0x04)
  572. #define WCD939X_R_CTL5 (WCD939X_R_BASE+0x05)
  573. #define WCD939X_R_CTL6 (WCD939X_R_BASE+0x06)
  574. #define WCD939X_R_CTL7 (WCD939X_R_BASE+0x07)
  575. #define WCD939X_R_CTL8 (WCD939X_R_BASE+0x08)
  576. #define WCD939X_R_CTL9 (WCD939X_R_BASE+0x09)
  577. #define WCD939X_R_CTL10 (WCD939X_R_BASE+0x0a)
  578. #define WCD939X_R_CTL11 (WCD939X_R_BASE+0x0b)
  579. #define WCD939X_R_CTL12 (WCD939X_R_BASE+0x0c)
  580. #define WCD939X_R_CTL13 (WCD939X_R_BASE+0x0d)
  581. #define WCD939X_R_CTL14 (WCD939X_R_BASE+0x0e)
  582. #define WCD939X_R_CTL15 (WCD939X_R_BASE+0x0f)
  583. #define WCD939X_R_CTL16 (WCD939X_R_BASE+0x10)
  584. #define WCD939X_R_CTL17 (WCD939X_R_BASE+0x11)
  585. #define WCD939X_R_CTL18 (WCD939X_R_BASE+0x12)
  586. #define WCD939X_R_CTL19 (WCD939X_R_BASE+0x13)
  587. #define WCD939X_E_BASE (WCD939X_BASE+0x581)
  588. #define WCD939X_PATH_CTL (WCD939X_E_BASE+0x00)
  589. #define WCD939X_CFG0 (WCD939X_E_BASE+0x01)
  590. #define WCD939X_CFG1 (WCD939X_E_BASE+0x02)
  591. #define WCD939X_CFG2 (WCD939X_E_BASE+0x03)
  592. #define WCD939X_CFG3 (WCD939X_E_BASE+0x04)
  593. #define WCD939X_DSD_HPHL_BASE (WCD939X_BASE+0x591)
  594. #define WCD939X_DSD_HPHL_PATH_CTL (WCD939X_DSD_HPHL_BASE+0x00)
  595. #define WCD939X_DSD_HPHL_CFG0 (WCD939X_DSD_HPHL_BASE+0x01)
  596. #define WCD939X_DSD_HPHL_CFG1 (WCD939X_DSD_HPHL_BASE+0x02)
  597. #define WCD939X_DSD_HPHL_CFG2 (WCD939X_DSD_HPHL_BASE+0x03)
  598. #define WCD939X_DSD_HPHL_CFG3 (WCD939X_DSD_HPHL_BASE+0x04)
  599. #define WCD939X_CFG4 (WCD939X_DSD_HPHL_BASE+0x05)
  600. #define WCD939X_CFG5 (WCD939X_DSD_HPHL_BASE+0x06)
  601. #define WCD939X_DSD_HPHR_BASE (WCD939X_BASE+0x5a1)
  602. #define WCD939X_DSD_HPHR_PATH_CTL (WCD939X_DSD_HPHR_BASE+0x00)
  603. #define WCD939X_DSD_HPHR_CFG0 (WCD939X_DSD_HPHR_BASE+0x01)
  604. #define WCD939X_DSD_HPHR_CFG1 (WCD939X_DSD_HPHR_BASE+0x02)
  605. #define WCD939X_DSD_HPHR_CFG2 (WCD939X_DSD_HPHR_BASE+0x03)
  606. #define WCD939X_DSD_HPHR_CFG3 (WCD939X_DSD_HPHR_BASE+0x04)
  607. #define WCD939X_DSD_HPHR_CFG4 (WCD939X_DSD_HPHR_BASE+0x05)
  608. #define WCD939X_DSD_HPHR_CFG5 (WCD939X_DSD_HPHR_BASE+0x06)
  609. #define WCD939X_NUM_REGISTERS (WCD939X_DSD_HPHR_CFG5+1)
  610. #define WCD939X_MAX_REGISTER (WCD939X_NUM_REGISTERS-1)
  611. #endif /* WCD939X_REGISTERS_H */