sde_rm.c 60 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) "[drm:%s] " fmt, __func__
  6. #include "sde_kms.h"
  7. #include "sde_hw_lm.h"
  8. #include "sde_hw_ctl.h"
  9. #include "sde_hw_cdm.h"
  10. #include "sde_hw_dspp.h"
  11. #include "sde_hw_ds.h"
  12. #include "sde_hw_pingpong.h"
  13. #include "sde_hw_intf.h"
  14. #include "sde_hw_wb.h"
  15. #include "sde_encoder.h"
  16. #include "sde_connector.h"
  17. #include "sde_hw_dsc.h"
  18. #include "sde_hw_vdc.h"
  19. #include "sde_crtc.h"
  20. #include "sde_hw_qdss.h"
  21. #define RESERVED_BY_OTHER(h, r) \
  22. (((h)->rsvp && ((h)->rsvp->enc_id != (r)->enc_id)) ||\
  23. ((h)->rsvp_nxt && ((h)->rsvp_nxt->enc_id != (r)->enc_id)))
  24. #define RM_RQ_LOCK(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_RESERVE_LOCK))
  25. #define RM_RQ_CLEAR(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_RESERVE_CLEAR))
  26. #define RM_RQ_DSPP(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_DSPP))
  27. #define RM_RQ_DS(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_DS))
  28. #define RM_RQ_CWB(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_CWB))
  29. #define RM_IS_TOPOLOGY_MATCH(t, r) ((t).num_lm == (r).num_lm && \
  30. (t).num_comp_enc == (r).num_enc && \
  31. (t).num_intf == (r).num_intf)
  32. /**
  33. * toplogy information to be used when ctl path version does not
  34. * support driving more than one interface per ctl_path
  35. */
  36. static const struct sde_rm_topology_def g_top_table[] = {
  37. { SDE_RM_TOPOLOGY_NONE, 0, 0, 0, 0, false },
  38. { SDE_RM_TOPOLOGY_SINGLEPIPE, 1, 0, 1, 1, false },
  39. { SDE_RM_TOPOLOGY_SINGLEPIPE_DSC, 1, 1, 1, 1, false },
  40. { SDE_RM_TOPOLOGY_DUALPIPE, 2, 0, 2, 2, true },
  41. { SDE_RM_TOPOLOGY_DUALPIPE_DSC, 2, 2, 2, 2, true },
  42. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE, 2, 0, 1, 1, false },
  43. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC, 2, 1, 1, 1, false },
  44. { SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE, 2, 2, 1, 1, false },
  45. { SDE_RM_TOPOLOGY_PPSPLIT, 1, 0, 2, 1, true },
  46. };
  47. /**
  48. * topology information to be used when the ctl path version
  49. * is SDE_CTL_CFG_VERSION_1_0_0
  50. */
  51. static const struct sde_rm_topology_def g_ctl_ver_1_top_table[] = {
  52. { SDE_RM_TOPOLOGY_NONE, 0, 0, 0, 0, false },
  53. { SDE_RM_TOPOLOGY_SINGLEPIPE, 1, 0, 1, 1, false },
  54. { SDE_RM_TOPOLOGY_SINGLEPIPE_DSC, 1, 1, 1, 1, false },
  55. { SDE_RM_TOPOLOGY_SINGLEPIPE_VDC, 1, 1, 1, 1, false },
  56. { SDE_RM_TOPOLOGY_DUALPIPE, 2, 0, 2, 1, true },
  57. { SDE_RM_TOPOLOGY_DUALPIPE_DSC, 2, 2, 2, 1, true },
  58. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE, 2, 0, 1, 1, false },
  59. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC, 2, 1, 1, 1, false },
  60. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_VDC, 2, 1, 1, 1, false },
  61. { SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE, 2, 2, 1, 1, false },
  62. { SDE_RM_TOPOLOGY_PPSPLIT, 1, 0, 2, 1, true },
  63. };
  64. /**
  65. * struct sde_rm_requirements - Reservation requirements parameter bundle
  66. * @top_ctrl: topology control preference from kernel client
  67. * @top: selected topology for the display
  68. * @hw_res: Hardware resources required as reported by the encoders
  69. */
  70. struct sde_rm_requirements {
  71. uint64_t top_ctrl;
  72. const struct sde_rm_topology_def *topology;
  73. struct sde_encoder_hw_resources hw_res;
  74. };
  75. /**
  76. * struct sde_rm_rsvp - Use Case Reservation tagging structure
  77. * Used to tag HW blocks as reserved by a CRTC->Encoder->Connector chain
  78. * By using as a tag, rather than lists of pointers to HW blocks used
  79. * we can avoid some list management since we don't know how many blocks
  80. * of each type a given use case may require.
  81. * @list: List head for list of all reservations
  82. * @seq: Global RSVP sequence number for debugging, especially for
  83. * differentiating differenct allocations for same encoder.
  84. * @enc_id: Reservations are tracked by Encoder DRM object ID.
  85. * CRTCs may be connected to multiple Encoders.
  86. * An encoder or connector id identifies the display path.
  87. * @topology DRM<->HW topology use case
  88. */
  89. struct sde_rm_rsvp {
  90. struct list_head list;
  91. uint32_t seq;
  92. uint32_t enc_id;
  93. enum sde_rm_topology_name topology;
  94. };
  95. /**
  96. * struct sde_rm_hw_blk - hardware block tracking list member
  97. * @list: List head for list of all hardware blocks tracking items
  98. * @rsvp: Pointer to use case reservation if reserved by a client
  99. * @rsvp_nxt: Temporary pointer used during reservation to the incoming
  100. * request. Will be swapped into rsvp if proposal is accepted
  101. * @type: Type of hardware block this structure tracks
  102. * @id: Hardware ID number, within it's own space, ie. LM_X
  103. * @catalog: Pointer to the hardware catalog entry for this block
  104. * @hw: Pointer to the hardware register access object for this block
  105. */
  106. struct sde_rm_hw_blk {
  107. struct list_head list;
  108. struct sde_rm_rsvp *rsvp;
  109. struct sde_rm_rsvp *rsvp_nxt;
  110. enum sde_hw_blk_type type;
  111. uint32_t id;
  112. struct sde_hw_blk *hw;
  113. };
  114. /**
  115. * sde_rm_dbg_rsvp_stage - enum of steps in making reservation for event logging
  116. */
  117. enum sde_rm_dbg_rsvp_stage {
  118. SDE_RM_STAGE_BEGIN,
  119. SDE_RM_STAGE_AFTER_CLEAR,
  120. SDE_RM_STAGE_AFTER_RSVPNEXT,
  121. SDE_RM_STAGE_FINAL
  122. };
  123. static void _sde_rm_inc_resource_info_lm(struct sde_rm *rm,
  124. struct msm_resource_caps_info *avail_res,
  125. struct sde_rm_hw_blk *blk)
  126. {
  127. struct sde_rm_hw_blk *blk2;
  128. const struct sde_lm_cfg *lm_cfg, *lm_cfg2;
  129. avail_res->num_lm++;
  130. lm_cfg = to_sde_hw_mixer(blk->hw)->cap;
  131. /* Check for 3d muxes by comparing paired lms */
  132. list_for_each_entry(blk2, &rm->hw_blks[SDE_HW_BLK_LM], list) {
  133. lm_cfg2 = to_sde_hw_mixer(blk2->hw)->cap;
  134. /*
  135. * If lm2 is free, or
  136. * lm1 & lm2 reserved by same enc, check mask
  137. */
  138. if ((!blk2->rsvp || (blk->rsvp &&
  139. blk2->rsvp->enc_id == blk->rsvp->enc_id
  140. && lm_cfg->id > lm_cfg2->id)) &&
  141. test_bit(lm_cfg->id, &lm_cfg2->lm_pair_mask))
  142. avail_res->num_3dmux++;
  143. }
  144. }
  145. static void _sde_rm_dec_resource_info_lm(struct sde_rm *rm,
  146. struct msm_resource_caps_info *avail_res,
  147. struct sde_rm_hw_blk *blk)
  148. {
  149. struct sde_rm_hw_blk *blk2;
  150. const struct sde_lm_cfg *lm_cfg, *lm_cfg2;
  151. avail_res->num_lm--;
  152. lm_cfg = to_sde_hw_mixer(blk->hw)->cap;
  153. /* Check for 3d muxes by comparing paired lms */
  154. list_for_each_entry(blk2, &rm->hw_blks[SDE_HW_BLK_LM], list) {
  155. lm_cfg2 = to_sde_hw_mixer(blk2->hw)->cap;
  156. /* If lm2 is free and lm1 is now being reserved */
  157. if (!blk2->rsvp &&
  158. test_bit(lm_cfg->id, &lm_cfg2->lm_pair_mask))
  159. avail_res->num_3dmux--;
  160. }
  161. }
  162. static void _sde_rm_inc_resource_info(struct sde_rm *rm,
  163. struct msm_resource_caps_info *avail_res,
  164. struct sde_rm_hw_blk *blk)
  165. {
  166. enum sde_hw_blk_type type = blk->type;
  167. if (type == SDE_HW_BLK_LM)
  168. _sde_rm_inc_resource_info_lm(rm, avail_res, blk);
  169. else if (type == SDE_HW_BLK_CTL)
  170. avail_res->num_ctl++;
  171. else if (type == SDE_HW_BLK_DSC)
  172. avail_res->num_dsc++;
  173. else if (type == SDE_HW_BLK_VDC)
  174. avail_res->num_vdc++;
  175. }
  176. static void _sde_rm_dec_resource_info(struct sde_rm *rm,
  177. struct msm_resource_caps_info *avail_res,
  178. struct sde_rm_hw_blk *blk)
  179. {
  180. enum sde_hw_blk_type type = blk->type;
  181. if (type == SDE_HW_BLK_LM)
  182. _sde_rm_dec_resource_info_lm(rm, avail_res, blk);
  183. else if (type == SDE_HW_BLK_CTL)
  184. avail_res->num_ctl--;
  185. else if (type == SDE_HW_BLK_DSC)
  186. avail_res->num_dsc--;
  187. else if (type == SDE_HW_BLK_VDC)
  188. avail_res->num_vdc--;
  189. }
  190. void sde_rm_get_resource_info(struct sde_rm *rm,
  191. struct drm_encoder *drm_enc,
  192. struct msm_resource_caps_info *avail_res)
  193. {
  194. struct sde_rm_hw_blk *blk;
  195. enum sde_hw_blk_type type;
  196. struct sde_rm_rsvp rsvp;
  197. memcpy(avail_res, &rm->avail_res,
  198. sizeof(rm->avail_res));
  199. if (!drm_enc)
  200. return;
  201. rsvp.enc_id = drm_enc->base.id;
  202. for (type = 0; type < SDE_HW_BLK_MAX; type++)
  203. list_for_each_entry(blk, &rm->hw_blks[type], list)
  204. if (blk->rsvp && blk->rsvp->enc_id == rsvp.enc_id)
  205. _sde_rm_inc_resource_info(rm, avail_res, blk);
  206. }
  207. static void _sde_rm_print_rsvps(
  208. struct sde_rm *rm,
  209. enum sde_rm_dbg_rsvp_stage stage)
  210. {
  211. struct sde_rm_rsvp *rsvp;
  212. struct sde_rm_hw_blk *blk;
  213. enum sde_hw_blk_type type;
  214. SDE_DEBUG("%d\n", stage);
  215. list_for_each_entry(rsvp, &rm->rsvps, list) {
  216. SDE_DEBUG("%d rsvp[s%ue%u] topology %d\n", stage, rsvp->seq,
  217. rsvp->enc_id, rsvp->topology);
  218. SDE_EVT32(stage, rsvp->seq, rsvp->enc_id, rsvp->topology);
  219. }
  220. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  221. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  222. if (!blk->rsvp && !blk->rsvp_nxt)
  223. continue;
  224. SDE_DEBUG("%d rsvp[s%ue%u->s%ue%u] %d %d\n", stage,
  225. (blk->rsvp) ? blk->rsvp->seq : 0,
  226. (blk->rsvp) ? blk->rsvp->enc_id : 0,
  227. (blk->rsvp_nxt) ? blk->rsvp_nxt->seq : 0,
  228. (blk->rsvp_nxt) ? blk->rsvp_nxt->enc_id : 0,
  229. blk->type, blk->id);
  230. SDE_EVT32(stage,
  231. (blk->rsvp) ? blk->rsvp->seq : 0,
  232. (blk->rsvp) ? blk->rsvp->enc_id : 0,
  233. (blk->rsvp_nxt) ? blk->rsvp_nxt->seq : 0,
  234. (blk->rsvp_nxt) ? blk->rsvp_nxt->enc_id : 0,
  235. blk->type, blk->id);
  236. }
  237. }
  238. }
  239. static void _sde_rm_print_rsvps_by_type(
  240. struct sde_rm *rm,
  241. enum sde_hw_blk_type type)
  242. {
  243. struct sde_rm_hw_blk *blk;
  244. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  245. if (!blk->rsvp && !blk->rsvp_nxt)
  246. continue;
  247. SDE_ERROR("rsvp[s%ue%u->s%ue%u] %d %d\n",
  248. (blk->rsvp) ? blk->rsvp->seq : 0,
  249. (blk->rsvp) ? blk->rsvp->enc_id : 0,
  250. (blk->rsvp_nxt) ? blk->rsvp_nxt->seq : 0,
  251. (blk->rsvp_nxt) ? blk->rsvp_nxt->enc_id : 0,
  252. blk->type, blk->id);
  253. SDE_EVT32((blk->rsvp) ? blk->rsvp->seq : 0,
  254. (blk->rsvp) ? blk->rsvp->enc_id : 0,
  255. (blk->rsvp_nxt) ? blk->rsvp_nxt->seq : 0,
  256. (blk->rsvp_nxt) ? blk->rsvp_nxt->enc_id : 0,
  257. blk->type, blk->id);
  258. }
  259. }
  260. struct sde_hw_mdp *sde_rm_get_mdp(struct sde_rm *rm)
  261. {
  262. return rm->hw_mdp;
  263. }
  264. void sde_rm_init_hw_iter(
  265. struct sde_rm_hw_iter *iter,
  266. uint32_t enc_id,
  267. enum sde_hw_blk_type type)
  268. {
  269. memset(iter, 0, sizeof(*iter));
  270. iter->enc_id = enc_id;
  271. iter->type = type;
  272. }
  273. enum sde_rm_topology_name sde_rm_get_topology_name(
  274. struct msm_display_topology topology)
  275. {
  276. int i;
  277. for (i = 0; i < SDE_RM_TOPOLOGY_MAX; i++)
  278. if (RM_IS_TOPOLOGY_MATCH(g_top_table[i], topology))
  279. return g_top_table[i].top_name;
  280. return SDE_RM_TOPOLOGY_NONE;
  281. }
  282. static bool _sde_rm_get_hw_locked(struct sde_rm *rm, struct sde_rm_hw_iter *i)
  283. {
  284. struct list_head *blk_list;
  285. if (!rm || !i || i->type >= SDE_HW_BLK_MAX) {
  286. SDE_ERROR("invalid rm\n");
  287. return false;
  288. }
  289. i->hw = NULL;
  290. blk_list = &rm->hw_blks[i->type];
  291. if (i->blk && (&i->blk->list == blk_list)) {
  292. SDE_DEBUG("attempt resume iteration past last\n");
  293. return false;
  294. }
  295. i->blk = list_prepare_entry(i->blk, blk_list, list);
  296. list_for_each_entry_continue(i->blk, blk_list, list) {
  297. struct sde_rm_rsvp *rsvp = i->blk->rsvp;
  298. if (i->blk->type != i->type) {
  299. SDE_ERROR("found incorrect block type %d on %d list\n",
  300. i->blk->type, i->type);
  301. return false;
  302. }
  303. if ((i->enc_id == 0) || (rsvp && rsvp->enc_id == i->enc_id)) {
  304. i->hw = i->blk->hw;
  305. SDE_DEBUG("found type %d id %d for enc %d\n",
  306. i->type, i->blk->id, i->enc_id);
  307. return true;
  308. }
  309. }
  310. SDE_DEBUG("no match, type %d for enc %d\n", i->type, i->enc_id);
  311. return false;
  312. }
  313. static bool _sde_rm_request_hw_blk_locked(struct sde_rm *rm,
  314. struct sde_rm_hw_request *hw_blk_info)
  315. {
  316. struct list_head *blk_list;
  317. struct sde_rm_hw_blk *blk = NULL;
  318. if (!rm || !hw_blk_info || hw_blk_info->type >= SDE_HW_BLK_MAX) {
  319. SDE_ERROR("invalid rm\n");
  320. return false;
  321. }
  322. hw_blk_info->hw = NULL;
  323. blk_list = &rm->hw_blks[hw_blk_info->type];
  324. blk = list_prepare_entry(blk, blk_list, list);
  325. list_for_each_entry_continue(blk, blk_list, list) {
  326. if (blk->type != hw_blk_info->type) {
  327. SDE_ERROR("found incorrect block type %d on %d list\n",
  328. blk->type, hw_blk_info->type);
  329. return false;
  330. }
  331. if (blk->hw->id == hw_blk_info->id) {
  332. hw_blk_info->hw = blk->hw;
  333. SDE_DEBUG("found type %d id %d\n",
  334. blk->type, blk->id);
  335. return true;
  336. }
  337. }
  338. SDE_DEBUG("no match, type %d id %d\n", hw_blk_info->type,
  339. hw_blk_info->id);
  340. return false;
  341. }
  342. bool sde_rm_get_hw(struct sde_rm *rm, struct sde_rm_hw_iter *i)
  343. {
  344. bool ret;
  345. mutex_lock(&rm->rm_lock);
  346. ret = _sde_rm_get_hw_locked(rm, i);
  347. mutex_unlock(&rm->rm_lock);
  348. return ret;
  349. }
  350. bool sde_rm_request_hw_blk(struct sde_rm *rm, struct sde_rm_hw_request *hw)
  351. {
  352. bool ret;
  353. mutex_lock(&rm->rm_lock);
  354. ret = _sde_rm_request_hw_blk_locked(rm, hw);
  355. mutex_unlock(&rm->rm_lock);
  356. return ret;
  357. }
  358. static void _sde_rm_hw_destroy(enum sde_hw_blk_type type, void *hw)
  359. {
  360. switch (type) {
  361. case SDE_HW_BLK_LM:
  362. sde_hw_lm_destroy(hw);
  363. break;
  364. case SDE_HW_BLK_DSPP:
  365. sde_hw_dspp_destroy(hw);
  366. break;
  367. case SDE_HW_BLK_DS:
  368. sde_hw_ds_destroy(hw);
  369. break;
  370. case SDE_HW_BLK_CTL:
  371. sde_hw_ctl_destroy(hw);
  372. break;
  373. case SDE_HW_BLK_CDM:
  374. sde_hw_cdm_destroy(hw);
  375. break;
  376. case SDE_HW_BLK_PINGPONG:
  377. sde_hw_pingpong_destroy(hw);
  378. break;
  379. case SDE_HW_BLK_INTF:
  380. sde_hw_intf_destroy(hw);
  381. break;
  382. case SDE_HW_BLK_WB:
  383. sde_hw_wb_destroy(hw);
  384. break;
  385. case SDE_HW_BLK_DSC:
  386. sde_hw_dsc_destroy(hw);
  387. break;
  388. case SDE_HW_BLK_VDC:
  389. sde_hw_vdc_destroy(hw);
  390. break;
  391. case SDE_HW_BLK_QDSS:
  392. sde_hw_qdss_destroy(hw);
  393. break;
  394. case SDE_HW_BLK_SSPP:
  395. /* SSPPs are not managed by the resource manager */
  396. case SDE_HW_BLK_TOP:
  397. /* Top is a singleton, not managed in hw_blks list */
  398. case SDE_HW_BLK_MAX:
  399. default:
  400. SDE_ERROR("unsupported block type %d\n", type);
  401. break;
  402. }
  403. }
  404. int sde_rm_destroy(struct sde_rm *rm)
  405. {
  406. struct sde_rm_rsvp *rsvp_cur, *rsvp_nxt;
  407. struct sde_rm_hw_blk *hw_cur, *hw_nxt;
  408. enum sde_hw_blk_type type;
  409. if (!rm) {
  410. SDE_ERROR("invalid rm\n");
  411. return -EINVAL;
  412. }
  413. list_for_each_entry_safe(rsvp_cur, rsvp_nxt, &rm->rsvps, list) {
  414. list_del(&rsvp_cur->list);
  415. kfree(rsvp_cur);
  416. }
  417. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  418. list_for_each_entry_safe(hw_cur, hw_nxt, &rm->hw_blks[type],
  419. list) {
  420. list_del(&hw_cur->list);
  421. _sde_rm_hw_destroy(hw_cur->type, hw_cur->hw);
  422. kfree(hw_cur);
  423. }
  424. }
  425. sde_hw_mdp_destroy(rm->hw_mdp);
  426. rm->hw_mdp = NULL;
  427. mutex_destroy(&rm->rm_lock);
  428. return 0;
  429. }
  430. static int _sde_rm_hw_blk_create(
  431. struct sde_rm *rm,
  432. struct sde_mdss_cfg *cat,
  433. void __iomem *mmio,
  434. enum sde_hw_blk_type type,
  435. uint32_t id,
  436. void *hw_catalog_info)
  437. {
  438. struct sde_rm_hw_blk *blk;
  439. struct sde_hw_mdp *hw_mdp;
  440. void *hw;
  441. hw_mdp = rm->hw_mdp;
  442. switch (type) {
  443. case SDE_HW_BLK_LM:
  444. hw = sde_hw_lm_init(id, mmio, cat);
  445. break;
  446. case SDE_HW_BLK_DSPP:
  447. hw = sde_hw_dspp_init(id, mmio, cat);
  448. break;
  449. case SDE_HW_BLK_DS:
  450. hw = sde_hw_ds_init(id, mmio, cat);
  451. break;
  452. case SDE_HW_BLK_CTL:
  453. hw = sde_hw_ctl_init(id, mmio, cat);
  454. break;
  455. case SDE_HW_BLK_CDM:
  456. hw = sde_hw_cdm_init(id, mmio, cat, hw_mdp);
  457. break;
  458. case SDE_HW_BLK_PINGPONG:
  459. hw = sde_hw_pingpong_init(id, mmio, cat);
  460. break;
  461. case SDE_HW_BLK_INTF:
  462. hw = sde_hw_intf_init(id, mmio, cat);
  463. break;
  464. case SDE_HW_BLK_WB:
  465. hw = sde_hw_wb_init(id, mmio, cat, hw_mdp);
  466. break;
  467. case SDE_HW_BLK_DSC:
  468. hw = sde_hw_dsc_init(id, mmio, cat);
  469. break;
  470. case SDE_HW_BLK_VDC:
  471. hw = sde_hw_vdc_init(id, mmio, cat);
  472. break;
  473. case SDE_HW_BLK_QDSS:
  474. hw = sde_hw_qdss_init(id, mmio, cat);
  475. break;
  476. case SDE_HW_BLK_SSPP:
  477. /* SSPPs are not managed by the resource manager */
  478. case SDE_HW_BLK_TOP:
  479. /* Top is a singleton, not managed in hw_blks list */
  480. case SDE_HW_BLK_MAX:
  481. default:
  482. SDE_ERROR("unsupported block type %d\n", type);
  483. return -EINVAL;
  484. }
  485. if (IS_ERR_OR_NULL(hw)) {
  486. SDE_ERROR("failed hw object creation: type %d, err %ld\n",
  487. type, PTR_ERR(hw));
  488. return -EFAULT;
  489. }
  490. blk = kzalloc(sizeof(*blk), GFP_KERNEL);
  491. if (!blk) {
  492. _sde_rm_hw_destroy(type, hw);
  493. return -ENOMEM;
  494. }
  495. blk->type = type;
  496. blk->id = id;
  497. blk->hw = hw;
  498. list_add_tail(&blk->list, &rm->hw_blks[type]);
  499. _sde_rm_inc_resource_info(rm, &rm->avail_res, blk);
  500. return 0;
  501. }
  502. static int _sde_rm_hw_blk_create_new(struct sde_rm *rm,
  503. struct sde_mdss_cfg *cat,
  504. void __iomem *mmio)
  505. {
  506. int i, rc = 0;
  507. for (i = 0; i < cat->dspp_count; i++) {
  508. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_DSPP,
  509. cat->dspp[i].id, &cat->dspp[i]);
  510. if (rc) {
  511. SDE_ERROR("failed: dspp hw not available\n");
  512. goto fail;
  513. }
  514. }
  515. if (cat->mdp[0].has_dest_scaler) {
  516. for (i = 0; i < cat->ds_count; i++) {
  517. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_DS,
  518. cat->ds[i].id, &cat->ds[i]);
  519. if (rc) {
  520. SDE_ERROR("failed: ds hw not available\n");
  521. goto fail;
  522. }
  523. }
  524. }
  525. for (i = 0; i < cat->pingpong_count; i++) {
  526. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_PINGPONG,
  527. cat->pingpong[i].id, &cat->pingpong[i]);
  528. if (rc) {
  529. SDE_ERROR("failed: pp hw not available\n");
  530. goto fail;
  531. }
  532. }
  533. for (i = 0; i < cat->dsc_count; i++) {
  534. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_DSC,
  535. cat->dsc[i].id, &cat->dsc[i]);
  536. if (rc) {
  537. SDE_ERROR("failed: dsc hw not available\n");
  538. goto fail;
  539. }
  540. }
  541. for (i = 0; i < cat->vdc_count; i++) {
  542. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_VDC,
  543. cat->vdc[i].id, &cat->vdc[i]);
  544. if (rc) {
  545. SDE_ERROR("failed: vdc hw not available\n");
  546. goto fail;
  547. }
  548. }
  549. for (i = 0; i < cat->intf_count; i++) {
  550. if (cat->intf[i].type == INTF_NONE) {
  551. SDE_DEBUG("skip intf %d with type none\n", i);
  552. continue;
  553. }
  554. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_INTF,
  555. cat->intf[i].id, &cat->intf[i]);
  556. if (rc) {
  557. SDE_ERROR("failed: intf hw not available\n");
  558. goto fail;
  559. }
  560. }
  561. for (i = 0; i < cat->wb_count; i++) {
  562. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_WB,
  563. cat->wb[i].id, &cat->wb[i]);
  564. if (rc) {
  565. SDE_ERROR("failed: wb hw not available\n");
  566. goto fail;
  567. }
  568. }
  569. for (i = 0; i < cat->ctl_count; i++) {
  570. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_CTL,
  571. cat->ctl[i].id, &cat->ctl[i]);
  572. if (rc) {
  573. SDE_ERROR("failed: ctl hw not available\n");
  574. goto fail;
  575. }
  576. }
  577. for (i = 0; i < cat->cdm_count; i++) {
  578. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_CDM,
  579. cat->cdm[i].id, &cat->cdm[i]);
  580. if (rc) {
  581. SDE_ERROR("failed: cdm hw not available\n");
  582. goto fail;
  583. }
  584. }
  585. for (i = 0; i < cat->qdss_count; i++) {
  586. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_QDSS,
  587. cat->qdss[i].id, &cat->qdss[i]);
  588. if (rc) {
  589. SDE_ERROR("failed: qdss hw not available\n");
  590. goto fail;
  591. }
  592. }
  593. fail:
  594. return rc;
  595. }
  596. int sde_rm_init(struct sde_rm *rm,
  597. struct sde_mdss_cfg *cat,
  598. void __iomem *mmio,
  599. struct drm_device *dev)
  600. {
  601. int i, rc = 0;
  602. enum sde_hw_blk_type type;
  603. if (!rm || !cat || !mmio || !dev) {
  604. SDE_ERROR("invalid input params\n");
  605. return -EINVAL;
  606. }
  607. /* Clear, setup lists */
  608. memset(rm, 0, sizeof(*rm));
  609. mutex_init(&rm->rm_lock);
  610. INIT_LIST_HEAD(&rm->rsvps);
  611. for (type = 0; type < SDE_HW_BLK_MAX; type++)
  612. INIT_LIST_HEAD(&rm->hw_blks[type]);
  613. rm->dev = dev;
  614. if (IS_SDE_CTL_REV_100(cat->ctl_rev))
  615. rm->topology_tbl = g_ctl_ver_1_top_table;
  616. else
  617. rm->topology_tbl = g_top_table;
  618. /* Some of the sub-blocks require an mdptop to be created */
  619. rm->hw_mdp = sde_hw_mdptop_init(MDP_TOP, mmio, cat);
  620. if (IS_ERR_OR_NULL(rm->hw_mdp)) {
  621. rc = PTR_ERR(rm->hw_mdp);
  622. rm->hw_mdp = NULL;
  623. SDE_ERROR("failed: mdp hw not available\n");
  624. goto fail;
  625. }
  626. /* Interrogate HW catalog and create tracking items for hw blocks */
  627. for (i = 0; i < cat->mixer_count; i++) {
  628. struct sde_lm_cfg *lm = &cat->mixer[i];
  629. if (lm->pingpong == PINGPONG_MAX) {
  630. SDE_ERROR("mixer %d without pingpong\n", lm->id);
  631. goto fail;
  632. }
  633. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_LM,
  634. cat->mixer[i].id, &cat->mixer[i]);
  635. if (rc) {
  636. SDE_ERROR("failed: lm hw not available\n");
  637. goto fail;
  638. }
  639. if (!rm->lm_max_width) {
  640. rm->lm_max_width = lm->sblk->maxwidth;
  641. } else if (rm->lm_max_width != lm->sblk->maxwidth) {
  642. /*
  643. * Don't expect to have hw where lm max widths differ.
  644. * If found, take the min.
  645. */
  646. SDE_ERROR("unsupported: lm maxwidth differs\n");
  647. if (rm->lm_max_width > lm->sblk->maxwidth)
  648. rm->lm_max_width = lm->sblk->maxwidth;
  649. }
  650. }
  651. rc = _sde_rm_hw_blk_create_new(rm, cat, mmio);
  652. if (!rc)
  653. return 0;
  654. fail:
  655. sde_rm_destroy(rm);
  656. return rc;
  657. }
  658. static bool _sde_rm_check_lm(
  659. struct sde_rm *rm,
  660. struct sde_rm_rsvp *rsvp,
  661. struct sde_rm_requirements *reqs,
  662. const struct sde_lm_cfg *lm_cfg,
  663. struct sde_rm_hw_blk *lm,
  664. struct sde_rm_hw_blk **dspp,
  665. struct sde_rm_hw_blk **ds,
  666. struct sde_rm_hw_blk **pp)
  667. {
  668. bool is_valid_dspp, is_valid_ds, ret = true;
  669. is_valid_dspp = (lm_cfg->dspp != DSPP_MAX) ? true : false;
  670. is_valid_ds = (lm_cfg->ds != DS_MAX) ? true : false;
  671. /**
  672. * RM_RQ_X: specification of which LMs to choose
  673. * is_valid_X: indicates whether LM is tied with block X
  674. * ret: true if given LM matches the user requirement,
  675. * false otherwise
  676. */
  677. if (RM_RQ_DSPP(reqs) && RM_RQ_DS(reqs))
  678. ret = (is_valid_dspp && is_valid_ds);
  679. else if (RM_RQ_DSPP(reqs))
  680. ret = is_valid_dspp;
  681. else if (RM_RQ_DS(reqs))
  682. ret = is_valid_ds;
  683. if (!ret) {
  684. SDE_DEBUG(
  685. "fail:lm(%d)req_dspp(%d)dspp(%d)req_ds(%d)ds(%d)\n",
  686. lm_cfg->id, (bool)(RM_RQ_DSPP(reqs)),
  687. lm_cfg->dspp, (bool)(RM_RQ_DS(reqs)),
  688. lm_cfg->ds);
  689. return ret;
  690. }
  691. return true;
  692. }
  693. static bool _sde_rm_reserve_dspp(
  694. struct sde_rm *rm,
  695. struct sde_rm_rsvp *rsvp,
  696. const struct sde_lm_cfg *lm_cfg,
  697. struct sde_rm_hw_blk *lm,
  698. struct sde_rm_hw_blk **dspp)
  699. {
  700. struct sde_rm_hw_iter iter;
  701. if (lm_cfg->dspp != DSPP_MAX) {
  702. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_DSPP);
  703. while (_sde_rm_get_hw_locked(rm, &iter)) {
  704. if (iter.blk->id == lm_cfg->dspp) {
  705. *dspp = iter.blk;
  706. break;
  707. }
  708. }
  709. if (!*dspp) {
  710. SDE_DEBUG("lm %d failed to retrieve dspp %d\n", lm->id,
  711. lm_cfg->dspp);
  712. return false;
  713. }
  714. if (RESERVED_BY_OTHER(*dspp, rsvp)) {
  715. SDE_DEBUG("lm %d dspp %d already reserved\n",
  716. lm->id, (*dspp)->id);
  717. return false;
  718. }
  719. }
  720. return true;
  721. }
  722. static bool _sde_rm_reserve_ds(
  723. struct sde_rm *rm,
  724. struct sde_rm_rsvp *rsvp,
  725. const struct sde_lm_cfg *lm_cfg,
  726. struct sde_rm_hw_blk *lm,
  727. struct sde_rm_hw_blk **ds)
  728. {
  729. struct sde_rm_hw_iter iter;
  730. if (lm_cfg->ds != DS_MAX) {
  731. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_DS);
  732. while (_sde_rm_get_hw_locked(rm, &iter)) {
  733. if (iter.blk->id == lm_cfg->ds) {
  734. *ds = iter.blk;
  735. break;
  736. }
  737. }
  738. if (!*ds) {
  739. SDE_DEBUG("lm %d failed to retrieve ds %d\n", lm->id,
  740. lm_cfg->ds);
  741. return false;
  742. }
  743. if (RESERVED_BY_OTHER(*ds, rsvp)) {
  744. SDE_DEBUG("lm %d ds %d already reserved\n",
  745. lm->id, (*ds)->id);
  746. return false;
  747. }
  748. }
  749. return true;
  750. }
  751. static bool _sde_rm_reserve_pp(
  752. struct sde_rm *rm,
  753. struct sde_rm_rsvp *rsvp,
  754. struct sde_rm_requirements *reqs,
  755. const struct sde_lm_cfg *lm_cfg,
  756. const struct sde_pingpong_cfg *pp_cfg,
  757. struct sde_rm_hw_blk *lm,
  758. struct sde_rm_hw_blk **dspp,
  759. struct sde_rm_hw_blk **ds,
  760. struct sde_rm_hw_blk **pp)
  761. {
  762. struct sde_rm_hw_iter iter;
  763. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_PINGPONG);
  764. while (_sde_rm_get_hw_locked(rm, &iter)) {
  765. if (iter.blk->id == lm_cfg->pingpong) {
  766. *pp = iter.blk;
  767. break;
  768. }
  769. }
  770. if (!*pp) {
  771. SDE_ERROR("failed to get pp on lm %d\n", lm_cfg->pingpong);
  772. return false;
  773. }
  774. if (RESERVED_BY_OTHER(*pp, rsvp)) {
  775. SDE_DEBUG("lm %d pp %d already reserved\n", lm->id,
  776. (*pp)->id);
  777. *dspp = NULL;
  778. *ds = NULL;
  779. return false;
  780. }
  781. pp_cfg = to_sde_hw_pingpong((*pp)->hw)->caps;
  782. if ((reqs->topology->top_name == SDE_RM_TOPOLOGY_PPSPLIT) &&
  783. !(test_bit(SDE_PINGPONG_SPLIT, &pp_cfg->features))) {
  784. SDE_DEBUG("pp %d doesn't support ppsplit\n", pp_cfg->id);
  785. *dspp = NULL;
  786. *ds = NULL;
  787. return false;
  788. }
  789. return true;
  790. }
  791. /**
  792. * _sde_rm_check_lm_and_get_connected_blks - check if proposed layer mixer meets
  793. * proposed use case requirements, incl. hardwired dependent blocks like
  794. * pingpong, and dspp.
  795. * @rm: sde resource manager handle
  796. * @rsvp: reservation currently being created
  797. * @reqs: proposed use case requirements
  798. * @lm: proposed layer mixer, function checks if lm, and all other hardwired
  799. * blocks connected to the lm (pp, dspp) are available and appropriate
  800. * @dspp: output parameter, dspp block attached to the layer mixer.
  801. * NULL if dspp was not available, or not matching requirements.
  802. * @pp: output parameter, pingpong block attached to the layer mixer.
  803. * NULL if dspp was not available, or not matching requirements.
  804. * @primary_lm: if non-null, this function check if lm is compatible primary_lm
  805. * as well as satisfying all other requirements
  806. * @Return: true if lm matches all requirements, false otherwise
  807. */
  808. static bool _sde_rm_check_lm_and_get_connected_blks(
  809. struct sde_rm *rm,
  810. struct sde_rm_rsvp *rsvp,
  811. struct sde_rm_requirements *reqs,
  812. struct sde_rm_hw_blk *lm,
  813. struct sde_rm_hw_blk **dspp,
  814. struct sde_rm_hw_blk **ds,
  815. struct sde_rm_hw_blk **pp,
  816. struct sde_rm_hw_blk *primary_lm)
  817. {
  818. const struct sde_lm_cfg *lm_cfg = to_sde_hw_mixer(lm->hw)->cap;
  819. const struct sde_pingpong_cfg *pp_cfg;
  820. bool ret, is_conn_primary, is_conn_secondary;
  821. u32 lm_primary_pref, lm_secondary_pref, cwb_pref;
  822. *dspp = NULL;
  823. *ds = NULL;
  824. *pp = NULL;
  825. lm_primary_pref = lm_cfg->features & BIT(SDE_DISP_PRIMARY_PREF);
  826. lm_secondary_pref = lm_cfg->features & BIT(SDE_DISP_SECONDARY_PREF);
  827. cwb_pref = lm_cfg->features & BIT(SDE_DISP_CWB_PREF);
  828. is_conn_primary = (reqs->hw_res.display_type ==
  829. SDE_CONNECTOR_PRIMARY) ? true : false;
  830. is_conn_secondary = (reqs->hw_res.display_type ==
  831. SDE_CONNECTOR_SECONDARY) ? true : false;
  832. SDE_DEBUG("check lm %d: dspp %d ds %d pp %d features %d disp type %d\n",
  833. lm_cfg->id, lm_cfg->dspp, lm_cfg->ds, lm_cfg->pingpong,
  834. lm_cfg->features, (int)reqs->hw_res.display_type);
  835. /* Check if this layer mixer is a peer of the proposed primary LM */
  836. if (primary_lm) {
  837. const struct sde_lm_cfg *prim_lm_cfg =
  838. to_sde_hw_mixer(primary_lm->hw)->cap;
  839. if (!test_bit(lm_cfg->id, &prim_lm_cfg->lm_pair_mask)) {
  840. SDE_DEBUG("lm %d not peer of lm %d\n", lm_cfg->id,
  841. prim_lm_cfg->id);
  842. return false;
  843. }
  844. }
  845. /* bypass rest of the checks if LM for primary display is found */
  846. if (!lm_primary_pref && !lm_secondary_pref) {
  847. /* Check lm for valid requirements */
  848. ret = _sde_rm_check_lm(rm, rsvp, reqs, lm_cfg, lm,
  849. dspp, ds, pp);
  850. if (!ret)
  851. return ret;
  852. /**
  853. * If CWB is enabled and LM is not CWB supported
  854. * then return false.
  855. */
  856. if (RM_RQ_CWB(reqs) && !cwb_pref) {
  857. SDE_DEBUG("fail: cwb supported lm not allocated\n");
  858. return false;
  859. }
  860. } else if ((!is_conn_primary && lm_primary_pref) ||
  861. (!is_conn_secondary && lm_secondary_pref)) {
  862. SDE_DEBUG(
  863. "display preference is not met. display_type: %d lm_features: %x\n",
  864. (int)reqs->hw_res.display_type, lm_cfg->features);
  865. return false;
  866. }
  867. /* Already reserved? */
  868. if (RESERVED_BY_OTHER(lm, rsvp)) {
  869. SDE_DEBUG("lm %d already reserved\n", lm_cfg->id);
  870. return false;
  871. }
  872. /* Reserve dspp */
  873. ret = _sde_rm_reserve_dspp(rm, rsvp, lm_cfg, lm, dspp);
  874. if (!ret)
  875. return ret;
  876. /* Reserve ds */
  877. ret = _sde_rm_reserve_ds(rm, rsvp, lm_cfg, lm, ds);
  878. if (!ret)
  879. return ret;
  880. /* Reserve pp */
  881. ret = _sde_rm_reserve_pp(rm, rsvp, reqs, lm_cfg, pp_cfg, lm,
  882. dspp, ds, pp);
  883. if (!ret)
  884. return ret;
  885. return true;
  886. }
  887. static int _sde_rm_reserve_lms(
  888. struct sde_rm *rm,
  889. struct sde_rm_rsvp *rsvp,
  890. struct sde_rm_requirements *reqs,
  891. u8 *_lm_ids)
  892. {
  893. struct sde_rm_hw_blk *lm[MAX_BLOCKS];
  894. struct sde_rm_hw_blk *dspp[MAX_BLOCKS];
  895. struct sde_rm_hw_blk *ds[MAX_BLOCKS];
  896. struct sde_rm_hw_blk *pp[MAX_BLOCKS];
  897. struct sde_rm_hw_iter iter_i, iter_j;
  898. int lm_count = 0;
  899. int i, rc = 0;
  900. if (!reqs->topology->num_lm) {
  901. SDE_DEBUG("invalid number of lm: %d\n", reqs->topology->num_lm);
  902. return 0;
  903. }
  904. /* Find a primary mixer */
  905. sde_rm_init_hw_iter(&iter_i, 0, SDE_HW_BLK_LM);
  906. while (lm_count != reqs->topology->num_lm &&
  907. _sde_rm_get_hw_locked(rm, &iter_i)) {
  908. memset(&lm, 0, sizeof(lm));
  909. memset(&dspp, 0, sizeof(dspp));
  910. memset(&ds, 0, sizeof(ds));
  911. memset(&pp, 0, sizeof(pp));
  912. lm_count = 0;
  913. lm[lm_count] = iter_i.blk;
  914. SDE_DEBUG("blk id = %d, _lm_ids[%d] = %d\n",
  915. iter_i.blk->id,
  916. lm_count,
  917. _lm_ids ? _lm_ids[lm_count] : -1);
  918. if (_lm_ids && (lm[lm_count])->id != _lm_ids[lm_count])
  919. continue;
  920. if (!_sde_rm_check_lm_and_get_connected_blks(
  921. rm, rsvp, reqs, lm[lm_count],
  922. &dspp[lm_count], &ds[lm_count],
  923. &pp[lm_count], NULL))
  924. continue;
  925. ++lm_count;
  926. /* Valid primary mixer found, find matching peers */
  927. sde_rm_init_hw_iter(&iter_j, 0, SDE_HW_BLK_LM);
  928. while (lm_count != reqs->topology->num_lm &&
  929. _sde_rm_get_hw_locked(rm, &iter_j)) {
  930. if (iter_i.blk == iter_j.blk)
  931. continue;
  932. if (!_sde_rm_check_lm_and_get_connected_blks(
  933. rm, rsvp, reqs, iter_j.blk,
  934. &dspp[lm_count], &ds[lm_count],
  935. &pp[lm_count], iter_i.blk))
  936. continue;
  937. lm[lm_count] = iter_j.blk;
  938. SDE_DEBUG("blk id = %d, _lm_ids[%d] = %d\n",
  939. iter_i.blk->id,
  940. lm_count,
  941. _lm_ids ? _lm_ids[lm_count] : -1);
  942. if (_lm_ids && (lm[lm_count])->id != _lm_ids[lm_count])
  943. continue;
  944. ++lm_count;
  945. }
  946. }
  947. if (lm_count != reqs->topology->num_lm) {
  948. SDE_DEBUG("unable to find appropriate mixers\n");
  949. return -ENAVAIL;
  950. }
  951. for (i = 0; i < ARRAY_SIZE(lm); i++) {
  952. if (!lm[i])
  953. break;
  954. lm[i]->rsvp_nxt = rsvp;
  955. pp[i]->rsvp_nxt = rsvp;
  956. if (dspp[i])
  957. dspp[i]->rsvp_nxt = rsvp;
  958. if (ds[i])
  959. ds[i]->rsvp_nxt = rsvp;
  960. SDE_EVT32(lm[i]->type, rsvp->enc_id, lm[i]->id, pp[i]->id,
  961. dspp[i] ? dspp[i]->id : 0,
  962. ds[i] ? ds[i]->id : 0);
  963. }
  964. if (reqs->topology->top_name == SDE_RM_TOPOLOGY_PPSPLIT) {
  965. /* reserve a free PINGPONG_SLAVE block */
  966. rc = -ENAVAIL;
  967. sde_rm_init_hw_iter(&iter_i, 0, SDE_HW_BLK_PINGPONG);
  968. while (_sde_rm_get_hw_locked(rm, &iter_i)) {
  969. const struct sde_hw_pingpong *pp =
  970. to_sde_hw_pingpong(iter_i.blk->hw);
  971. const struct sde_pingpong_cfg *pp_cfg = pp->caps;
  972. if (!(test_bit(SDE_PINGPONG_SLAVE, &pp_cfg->features)))
  973. continue;
  974. if (RESERVED_BY_OTHER(iter_i.blk, rsvp))
  975. continue;
  976. iter_i.blk->rsvp_nxt = rsvp;
  977. rc = 0;
  978. break;
  979. }
  980. }
  981. return rc;
  982. }
  983. static int _sde_rm_reserve_ctls(
  984. struct sde_rm *rm,
  985. struct sde_rm_rsvp *rsvp,
  986. struct sde_rm_requirements *reqs,
  987. const struct sde_rm_topology_def *top,
  988. u8 *_ctl_ids)
  989. {
  990. struct sde_rm_hw_blk *ctls[MAX_BLOCKS];
  991. struct sde_rm_hw_iter iter;
  992. int i = 0;
  993. if (!top->num_ctl) {
  994. SDE_DEBUG("invalid number of ctl: %d\n", top->num_ctl);
  995. return 0;
  996. }
  997. memset(&ctls, 0, sizeof(ctls));
  998. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_CTL);
  999. while (_sde_rm_get_hw_locked(rm, &iter)) {
  1000. const struct sde_hw_ctl *ctl = to_sde_hw_ctl(iter.blk->hw);
  1001. unsigned long features = ctl->caps->features;
  1002. bool has_split_display, has_ppsplit, primary_pref;
  1003. if (RESERVED_BY_OTHER(iter.blk, rsvp))
  1004. continue;
  1005. has_split_display = BIT(SDE_CTL_SPLIT_DISPLAY) & features;
  1006. has_ppsplit = BIT(SDE_CTL_PINGPONG_SPLIT) & features;
  1007. primary_pref = BIT(SDE_CTL_PRIMARY_PREF) & features;
  1008. SDE_DEBUG("ctl %d caps 0x%lX\n", iter.blk->id, features);
  1009. /*
  1010. * bypass rest feature checks on finding CTL preferred
  1011. * for primary displays.
  1012. */
  1013. if (!primary_pref && !_ctl_ids) {
  1014. if (top->needs_split_display != has_split_display)
  1015. continue;
  1016. if (top->top_name == SDE_RM_TOPOLOGY_PPSPLIT &&
  1017. !has_ppsplit)
  1018. continue;
  1019. } else if (!(reqs->hw_res.display_type ==
  1020. SDE_CONNECTOR_PRIMARY && primary_pref) && !_ctl_ids) {
  1021. SDE_DEBUG(
  1022. "display pref not met. display_type: %d primary_pref: %d\n",
  1023. reqs->hw_res.display_type, primary_pref);
  1024. continue;
  1025. }
  1026. ctls[i] = iter.blk;
  1027. SDE_DEBUG("blk id = %d, _ctl_ids[%d] = %d\n",
  1028. iter.blk->id, i,
  1029. _ctl_ids ? _ctl_ids[i] : -1);
  1030. if (_ctl_ids && (ctls[i]->id != _ctl_ids[i]))
  1031. continue;
  1032. SDE_DEBUG("ctl %d match\n", iter.blk->id);
  1033. if (++i == top->num_ctl)
  1034. break;
  1035. }
  1036. if (i != top->num_ctl)
  1037. return -ENAVAIL;
  1038. for (i = 0; i < ARRAY_SIZE(ctls) && i < top->num_ctl; i++) {
  1039. ctls[i]->rsvp_nxt = rsvp;
  1040. SDE_EVT32(ctls[i]->type, rsvp->enc_id, ctls[i]->id);
  1041. }
  1042. return 0;
  1043. }
  1044. static bool _sde_rm_check_dsc(struct sde_rm *rm,
  1045. struct sde_rm_rsvp *rsvp,
  1046. struct sde_rm_hw_blk *dsc,
  1047. struct sde_rm_hw_blk *paired_dsc)
  1048. {
  1049. const struct sde_dsc_cfg *dsc_cfg = to_sde_hw_dsc(dsc->hw)->caps;
  1050. /* Already reserved? */
  1051. if (RESERVED_BY_OTHER(dsc, rsvp)) {
  1052. SDE_DEBUG("dsc %d already reserved\n", dsc_cfg->id);
  1053. return false;
  1054. }
  1055. /* Check if this dsc is a peer of the proposed paired DSC */
  1056. if (paired_dsc) {
  1057. const struct sde_dsc_cfg *paired_dsc_cfg =
  1058. to_sde_hw_dsc(paired_dsc->hw)->caps;
  1059. if (!test_bit(dsc_cfg->id, paired_dsc_cfg->dsc_pair_mask)) {
  1060. SDE_DEBUG("dsc %d not peer of dsc %d\n", dsc_cfg->id,
  1061. paired_dsc_cfg->id);
  1062. return false;
  1063. }
  1064. }
  1065. return true;
  1066. }
  1067. static bool _sde_rm_check_vdc(struct sde_rm *rm,
  1068. struct sde_rm_rsvp *rsvp,
  1069. struct sde_rm_hw_blk *vdc)
  1070. {
  1071. const struct sde_vdc_cfg *vdc_cfg = to_sde_hw_vdc(vdc->hw)->caps;
  1072. /* Already reserved? */
  1073. if (RESERVED_BY_OTHER(vdc, rsvp)) {
  1074. SDE_DEBUG("vdc %d already reserved\n", vdc_cfg->id);
  1075. return false;
  1076. }
  1077. return true;
  1078. }
  1079. static int _sde_rm_reserve_dsc(
  1080. struct sde_rm *rm,
  1081. struct sde_rm_rsvp *rsvp,
  1082. struct msm_display_dsc_info *dsc_info,
  1083. const struct sde_rm_topology_def *top,
  1084. u8 *_dsc_ids)
  1085. {
  1086. struct sde_rm_hw_iter iter_i, iter_j;
  1087. struct sde_rm_hw_blk *dsc[MAX_BLOCKS];
  1088. u32 reserve_mask = 0;
  1089. int alloc_count = 0;
  1090. int num_dsc_enc = top->num_comp_enc;
  1091. int i;
  1092. if ((!top->num_comp_enc) || !dsc_info) {
  1093. SDE_DEBUG("invalid topoplogy params: %d, %d\n",
  1094. top->num_comp_enc,
  1095. !(dsc_info == NULL));
  1096. return 0;
  1097. }
  1098. sde_rm_init_hw_iter(&iter_i, 0, SDE_HW_BLK_DSC);
  1099. /* Find a first DSC */
  1100. while (alloc_count != num_dsc_enc &&
  1101. _sde_rm_get_hw_locked(rm, &iter_i)) {
  1102. const struct sde_hw_dsc *hw_dsc = to_sde_hw_dsc(
  1103. iter_i.blk->hw);
  1104. unsigned long features = hw_dsc->caps->features;
  1105. bool has_422_420_support =
  1106. BIT(SDE_DSC_NATIVE_422_EN) & features;
  1107. if (reserve_mask & (1 << iter_i.blk->id))
  1108. continue;
  1109. if (_dsc_ids && (iter_i.blk->id != _dsc_ids[alloc_count]))
  1110. continue;
  1111. /* if this hw block does not support required feature */
  1112. if ((dsc_info->config.native_422 ||
  1113. dsc_info->config.native_420) && !has_422_420_support)
  1114. continue;
  1115. if (!_sde_rm_check_dsc(rm, rsvp, iter_i.blk, NULL))
  1116. continue;
  1117. SDE_DEBUG("blk id = %d, _dsc_ids[%d] = %d\n",
  1118. iter_i.blk->id,
  1119. alloc_count,
  1120. _dsc_ids ? _dsc_ids[alloc_count] : -1);
  1121. reserve_mask |= (1 << iter_i.blk->id);
  1122. dsc[alloc_count++] = iter_i.blk;
  1123. /* Valid first dsc found, find matching peers */
  1124. sde_rm_init_hw_iter(&iter_j, 0, SDE_HW_BLK_DSC);
  1125. while (alloc_count != num_dsc_enc &&
  1126. _sde_rm_get_hw_locked(rm, &iter_j)) {
  1127. if (reserve_mask & (1 << iter_j.blk->id))
  1128. continue;
  1129. if (_dsc_ids && (iter_j.blk->id !=
  1130. _dsc_ids[alloc_count]))
  1131. continue;
  1132. if (!_sde_rm_check_dsc(rm, rsvp,
  1133. iter_j.blk, iter_i.blk))
  1134. continue;
  1135. SDE_DEBUG("blk id = %d, _dsc_ids[%d] = %d\n",
  1136. iter_j.blk->id,
  1137. alloc_count,
  1138. _dsc_ids ? _dsc_ids[alloc_count] : -1);
  1139. reserve_mask |= (1 << iter_j.blk->id);
  1140. dsc[alloc_count++] = iter_j.blk;
  1141. break;
  1142. }
  1143. /* Rollback primary DSC if peer is not found */
  1144. if (!iter_j.hw) {
  1145. reserve_mask &= ~(1 << iter_i.blk->id);
  1146. --alloc_count;
  1147. }
  1148. }
  1149. if (alloc_count != num_dsc_enc) {
  1150. SDE_ERROR("couldn't reserve %d dsc blocks for enc id %d\n",
  1151. num_dsc_enc, rsvp->enc_id);
  1152. return -EINVAL;
  1153. }
  1154. for (i = 0; i < alloc_count; i++) {
  1155. if (!dsc[i])
  1156. break;
  1157. dsc[i]->rsvp_nxt = rsvp;
  1158. SDE_EVT32(dsc[i]->type, rsvp->enc_id, dsc[i]->id);
  1159. }
  1160. return 0;
  1161. }
  1162. static int _sde_rm_reserve_vdc(
  1163. struct sde_rm *rm,
  1164. struct sde_rm_rsvp *rsvp,
  1165. struct sde_rm_requirements *reqs,
  1166. const struct sde_rm_topology_def *top,
  1167. u8 *_vdc_ids)
  1168. {
  1169. struct sde_rm_hw_iter iter_i;
  1170. struct sde_rm_hw_blk *vdc[MAX_BLOCKS];
  1171. int alloc_count = 0;
  1172. int num_vdc_enc = top->num_comp_enc;
  1173. int i;
  1174. if (!top->num_comp_enc)
  1175. return 0;
  1176. if (reqs->hw_res.comp_info->comp_type != MSM_DISPLAY_COMPRESSION_VDC)
  1177. return 0;
  1178. sde_rm_init_hw_iter(&iter_i, 0, SDE_HW_BLK_VDC);
  1179. /* Find a VDC */
  1180. while (alloc_count != num_vdc_enc &&
  1181. _sde_rm_get_hw_locked(rm, &iter_i)) {
  1182. memset(&vdc, 0, sizeof(vdc));
  1183. alloc_count = 0;
  1184. if (_vdc_ids && (iter_i.blk->id != _vdc_ids[alloc_count]))
  1185. continue;
  1186. if (!_sde_rm_check_vdc(rm, rsvp, iter_i.blk))
  1187. continue;
  1188. SDE_DEBUG("blk id = %d, _vdc_ids[%d] = %d\n",
  1189. iter_i.blk->id,
  1190. alloc_count,
  1191. _vdc_ids ? _vdc_ids[alloc_count] : -1);
  1192. vdc[alloc_count++] = iter_i.blk;
  1193. }
  1194. if (alloc_count != num_vdc_enc) {
  1195. SDE_ERROR("couldn't reserve %d vdc blocks for enc id %d\n",
  1196. num_vdc_enc, rsvp->enc_id);
  1197. return -EINVAL;
  1198. }
  1199. for (i = 0; i < ARRAY_SIZE(vdc); i++) {
  1200. if (!vdc[i])
  1201. break;
  1202. vdc[i]->rsvp_nxt = rsvp;
  1203. SDE_EVT32(vdc[i]->type, rsvp->enc_id, vdc[i]->id);
  1204. }
  1205. return 0;
  1206. }
  1207. static int _sde_rm_reserve_qdss(
  1208. struct sde_rm *rm,
  1209. struct sde_rm_rsvp *rsvp,
  1210. const struct sde_rm_topology_def *top,
  1211. u8 *_qdss_ids)
  1212. {
  1213. struct sde_rm_hw_iter iter;
  1214. struct msm_drm_private *priv = rm->dev->dev_private;
  1215. struct sde_kms *sde_kms;
  1216. if (!priv->kms) {
  1217. SDE_ERROR("invalid kms\n");
  1218. return -EINVAL;
  1219. }
  1220. sde_kms = to_sde_kms(priv->kms);
  1221. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_QDSS);
  1222. while (_sde_rm_get_hw_locked(rm, &iter)) {
  1223. if (RESERVED_BY_OTHER(iter.blk, rsvp))
  1224. continue;
  1225. SDE_DEBUG("blk id = %d\n", iter.blk->id);
  1226. iter.blk->rsvp_nxt = rsvp;
  1227. SDE_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id);
  1228. return 0;
  1229. }
  1230. if (!iter.hw && sde_kms->catalog->qdss_count) {
  1231. SDE_DEBUG("couldn't reserve qdss for type %d id %d\n",
  1232. SDE_HW_BLK_QDSS, iter.blk->id);
  1233. return -ENAVAIL;
  1234. }
  1235. return 0;
  1236. }
  1237. static int _sde_rm_reserve_cdm(
  1238. struct sde_rm *rm,
  1239. struct sde_rm_rsvp *rsvp,
  1240. uint32_t id,
  1241. enum sde_hw_blk_type type)
  1242. {
  1243. struct sde_rm_hw_iter iter;
  1244. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_CDM);
  1245. while (_sde_rm_get_hw_locked(rm, &iter)) {
  1246. const struct sde_hw_cdm *cdm = to_sde_hw_cdm(iter.blk->hw);
  1247. const struct sde_cdm_cfg *caps = cdm->caps;
  1248. bool match = false;
  1249. if (RESERVED_BY_OTHER(iter.blk, rsvp))
  1250. continue;
  1251. if (type == SDE_HW_BLK_INTF && id != INTF_MAX)
  1252. match = test_bit(id, &caps->intf_connect);
  1253. else if (type == SDE_HW_BLK_WB && id != WB_MAX)
  1254. match = test_bit(id, &caps->wb_connect);
  1255. SDE_DEBUG("type %d id %d, cdm intfs %lu wbs %lu match %d\n",
  1256. type, id, caps->intf_connect, caps->wb_connect,
  1257. match);
  1258. if (!match)
  1259. continue;
  1260. iter.blk->rsvp_nxt = rsvp;
  1261. SDE_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id);
  1262. break;
  1263. }
  1264. if (!iter.hw) {
  1265. SDE_ERROR("couldn't reserve cdm for type %d id %d\n", type, id);
  1266. return -ENAVAIL;
  1267. }
  1268. return 0;
  1269. }
  1270. static int _sde_rm_reserve_intf_or_wb(
  1271. struct sde_rm *rm,
  1272. struct sde_rm_rsvp *rsvp,
  1273. uint32_t id,
  1274. enum sde_hw_blk_type type,
  1275. bool needs_cdm)
  1276. {
  1277. struct sde_rm_hw_iter iter;
  1278. int ret = 0;
  1279. /* Find the block entry in the rm, and note the reservation */
  1280. sde_rm_init_hw_iter(&iter, 0, type);
  1281. while (_sde_rm_get_hw_locked(rm, &iter)) {
  1282. if (iter.blk->id != id)
  1283. continue;
  1284. if (RESERVED_BY_OTHER(iter.blk, rsvp)) {
  1285. SDE_ERROR("type %d id %d already reserved\n", type, id);
  1286. return -ENAVAIL;
  1287. }
  1288. iter.blk->rsvp_nxt = rsvp;
  1289. SDE_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id);
  1290. break;
  1291. }
  1292. /* Shouldn't happen since wbs / intfs are fixed at probe */
  1293. if (!iter.hw) {
  1294. SDE_ERROR("couldn't find type %d id %d\n", type, id);
  1295. return -EINVAL;
  1296. }
  1297. /* Expected only one intf or wb will request cdm */
  1298. if (needs_cdm)
  1299. ret = _sde_rm_reserve_cdm(rm, rsvp, id, type);
  1300. return ret;
  1301. }
  1302. static int _sde_rm_reserve_intf_related_hw(
  1303. struct sde_rm *rm,
  1304. struct sde_rm_rsvp *rsvp,
  1305. struct sde_encoder_hw_resources *hw_res)
  1306. {
  1307. int i, ret = 0;
  1308. u32 id;
  1309. for (i = 0; i < ARRAY_SIZE(hw_res->intfs); i++) {
  1310. if (hw_res->intfs[i] == INTF_MODE_NONE)
  1311. continue;
  1312. id = i + INTF_0;
  1313. ret = _sde_rm_reserve_intf_or_wb(rm, rsvp, id,
  1314. SDE_HW_BLK_INTF, hw_res->needs_cdm);
  1315. if (ret)
  1316. return ret;
  1317. }
  1318. for (i = 0; i < ARRAY_SIZE(hw_res->wbs); i++) {
  1319. if (hw_res->wbs[i] == INTF_MODE_NONE)
  1320. continue;
  1321. id = i + WB_0;
  1322. ret = _sde_rm_reserve_intf_or_wb(rm, rsvp, id,
  1323. SDE_HW_BLK_WB, hw_res->needs_cdm);
  1324. if (ret)
  1325. return ret;
  1326. }
  1327. return ret;
  1328. }
  1329. static bool _sde_rm_is_display_in_cont_splash(struct sde_kms *sde_kms,
  1330. struct drm_encoder *enc)
  1331. {
  1332. int i;
  1333. struct sde_splash_display *splash_dpy;
  1334. for (i = 0; i < MAX_DSI_DISPLAYS; i++) {
  1335. splash_dpy = &sde_kms->splash_data.splash_display[i];
  1336. if (splash_dpy->encoder == enc)
  1337. return splash_dpy->cont_splash_enabled;
  1338. }
  1339. return false;
  1340. }
  1341. static int _sde_rm_make_lm_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1342. struct sde_rm_requirements *reqs,
  1343. struct sde_splash_display *splash_display)
  1344. {
  1345. int ret, i;
  1346. u8 *hw_ids = NULL;
  1347. /* Check if splash data provided lm_ids */
  1348. if (splash_display) {
  1349. hw_ids = splash_display->lm_ids;
  1350. for (i = 0; i < splash_display->lm_cnt; i++)
  1351. SDE_DEBUG("splash_display->lm_ids[%d] = %d\n",
  1352. i, splash_display->lm_ids[i]);
  1353. if (splash_display->lm_cnt != reqs->topology->num_lm)
  1354. SDE_DEBUG("Configured splash LMs != needed LM cnt\n");
  1355. }
  1356. /*
  1357. * Assign LMs and blocks whose usage is tied to them:
  1358. * DSPP & Pingpong.
  1359. */
  1360. ret = _sde_rm_reserve_lms(rm, rsvp, reqs, hw_ids);
  1361. return ret;
  1362. }
  1363. static int _sde_rm_make_ctl_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1364. struct sde_rm_requirements *reqs,
  1365. struct sde_splash_display *splash_display)
  1366. {
  1367. int ret, i;
  1368. u8 *hw_ids = NULL;
  1369. struct sde_rm_topology_def topology;
  1370. /* Check if splash data provided ctl_ids */
  1371. if (splash_display) {
  1372. hw_ids = splash_display->ctl_ids;
  1373. for (i = 0; i < splash_display->ctl_cnt; i++)
  1374. SDE_DEBUG("splash_display->ctl_ids[%d] = %d\n",
  1375. i, splash_display->ctl_ids[i]);
  1376. }
  1377. /*
  1378. * Do assignment preferring to give away low-resource CTLs first:
  1379. * - Check mixers without Split Display
  1380. * - Only then allow to grab from CTLs with split display capability
  1381. */
  1382. ret = _sde_rm_reserve_ctls(rm, rsvp, reqs, reqs->topology, hw_ids);
  1383. if (ret && !reqs->topology->needs_split_display &&
  1384. reqs->topology->num_ctl > SINGLE_CTL) {
  1385. memcpy(&topology, reqs->topology, sizeof(topology));
  1386. topology.needs_split_display = true;
  1387. ret = _sde_rm_reserve_ctls(rm, rsvp, reqs, &topology, hw_ids);
  1388. }
  1389. return ret;
  1390. }
  1391. static int _sde_rm_make_dsc_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1392. struct sde_rm_requirements *reqs,
  1393. struct sde_splash_display *splash_display)
  1394. {
  1395. int i;
  1396. u8 *hw_ids = NULL;
  1397. /* Check if splash data provided dsc_ids */
  1398. if (splash_display) {
  1399. hw_ids = splash_display->dsc_ids;
  1400. if (splash_display->dsc_cnt)
  1401. reqs->hw_res.comp_info->comp_type =
  1402. MSM_DISPLAY_COMPRESSION_DSC;
  1403. for (i = 0; i < splash_display->dsc_cnt; i++)
  1404. SDE_DEBUG("splash_data.dsc_ids[%d] = %d\n",
  1405. i, splash_display->dsc_ids[i]);
  1406. }
  1407. return _sde_rm_reserve_dsc(rm, rsvp,
  1408. &reqs->hw_res.comp_info->dsc_info,
  1409. reqs->topology, hw_ids);
  1410. }
  1411. static int _sde_rm_make_vdc_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1412. struct sde_rm_requirements *reqs,
  1413. struct sde_splash_display *splash_display)
  1414. {
  1415. int ret, i;
  1416. u8 *hw_ids = NULL;
  1417. /* Check if splash data provided vdc_ids */
  1418. if (splash_display) {
  1419. hw_ids = splash_display->vdc_ids;
  1420. for (i = 0; i < splash_display->vdc_cnt; i++)
  1421. SDE_DEBUG("splash_data.vdc_ids[%d] = %d\n",
  1422. i, splash_display->vdc_ids[i]);
  1423. }
  1424. ret = _sde_rm_reserve_vdc(rm, rsvp, reqs, reqs->topology, hw_ids);
  1425. return ret;
  1426. }
  1427. static int _sde_rm_make_next_rsvp(struct sde_rm *rm, struct drm_encoder *enc,
  1428. struct drm_crtc_state *crtc_state,
  1429. struct drm_connector_state *conn_state,
  1430. struct sde_rm_rsvp *rsvp,
  1431. struct sde_rm_requirements *reqs)
  1432. {
  1433. struct msm_drm_private *priv;
  1434. struct sde_kms *sde_kms;
  1435. struct sde_splash_display *splash_display = NULL;
  1436. struct sde_splash_data *splash_data;
  1437. int i, ret;
  1438. priv = enc->dev->dev_private;
  1439. sde_kms = to_sde_kms(priv->kms);
  1440. splash_data = &sde_kms->splash_data;
  1441. if (_sde_rm_is_display_in_cont_splash(sde_kms, enc)) {
  1442. for (i = 0; i < ARRAY_SIZE(splash_data->splash_display); i++) {
  1443. if (enc == splash_data->splash_display[i].encoder)
  1444. splash_display =
  1445. &splash_data->splash_display[i];
  1446. }
  1447. if (!splash_display) {
  1448. SDE_ERROR("rm is in cont_splash but data not found\n");
  1449. return -EINVAL;
  1450. }
  1451. }
  1452. /* Create reservation info, tag reserved blocks with it as we go */
  1453. rsvp->seq = ++rm->rsvp_next_seq;
  1454. rsvp->enc_id = enc->base.id;
  1455. rsvp->topology = reqs->topology->top_name;
  1456. list_add_tail(&rsvp->list, &rm->rsvps);
  1457. ret = _sde_rm_make_lm_rsvp(rm, rsvp, reqs, splash_display);
  1458. if (ret) {
  1459. SDE_ERROR("unable to find appropriate mixers\n");
  1460. _sde_rm_print_rsvps_by_type(rm, SDE_HW_BLK_LM);
  1461. return ret;
  1462. }
  1463. ret = _sde_rm_make_ctl_rsvp(rm, rsvp, reqs, splash_display);
  1464. if (ret) {
  1465. SDE_ERROR("unable to find appropriate CTL\n");
  1466. return ret;
  1467. }
  1468. /* Assign INTFs, WBs, and blks whose usage is tied to them: CTL & CDM */
  1469. ret = _sde_rm_reserve_intf_related_hw(rm, rsvp, &reqs->hw_res);
  1470. if (ret)
  1471. return ret;
  1472. ret = _sde_rm_make_dsc_rsvp(rm, rsvp, reqs, splash_display);
  1473. if (ret)
  1474. return ret;
  1475. ret = _sde_rm_make_vdc_rsvp(rm, rsvp, reqs, splash_display);
  1476. if (ret)
  1477. return ret;
  1478. ret = _sde_rm_reserve_qdss(rm, rsvp, reqs->topology, NULL);
  1479. if (ret)
  1480. return ret;
  1481. return ret;
  1482. }
  1483. /**
  1484. * _sde_rm_get_hw_blk_for_cont_splash - retrieve the LM blocks on given CTL
  1485. * and populate the connected HW blk ids in sde_splash_display
  1486. * @rm: Pointer to resource manager structure
  1487. * @ctl: Pointer to CTL hardware block
  1488. * @splash_display: Pointer to struct sde_splash_display
  1489. * return: number of active LM blocks for this CTL block
  1490. */
  1491. static int _sde_rm_get_hw_blk_for_cont_splash(struct sde_rm *rm,
  1492. struct sde_hw_ctl *ctl,
  1493. struct sde_splash_display *splash_display)
  1494. {
  1495. u32 lm_reg;
  1496. struct sde_rm_hw_iter iter_lm, iter_dsc;
  1497. if (!rm || !ctl || !splash_display) {
  1498. SDE_ERROR("invalid input parameters\n");
  1499. return 0;
  1500. }
  1501. sde_rm_init_hw_iter(&iter_lm, 0, SDE_HW_BLK_LM);
  1502. sde_rm_init_hw_iter(&iter_dsc, 0, SDE_HW_BLK_DSC);
  1503. while (_sde_rm_get_hw_locked(rm, &iter_lm)) {
  1504. if (splash_display->lm_cnt >= MAX_DATA_PATH_PER_DSIPLAY)
  1505. break;
  1506. lm_reg = ctl->ops.read_ctl_layers(ctl, iter_lm.blk->id);
  1507. if (!lm_reg)
  1508. continue;
  1509. splash_display->lm_ids[splash_display->lm_cnt++] =
  1510. iter_lm.blk->id;
  1511. SDE_DEBUG("lm_cnt=%d lm_reg[%d]=0x%x\n", splash_display->lm_cnt,
  1512. iter_lm.blk->id - LM_0, lm_reg);
  1513. if (ctl->ops.get_staged_sspp &&
  1514. ctl->ops.get_staged_sspp(ctl, iter_lm.blk->id,
  1515. &splash_display->pipes[
  1516. splash_display->pipe_cnt], 1)) {
  1517. splash_display->pipe_cnt++;
  1518. } else {
  1519. SDE_ERROR("no pipe detected on LM-%d\n",
  1520. iter_lm.blk->id - LM_0);
  1521. return 0;
  1522. }
  1523. }
  1524. while (_sde_rm_get_hw_locked(rm, &iter_dsc)) {
  1525. if (ctl->ops.read_active_status &&
  1526. !(ctl->ops.read_active_status(ctl,
  1527. SDE_HW_BLK_DSC,
  1528. iter_dsc.blk->id)))
  1529. continue;
  1530. splash_display->dsc_ids[splash_display->dsc_cnt++] =
  1531. iter_dsc.blk->id;
  1532. SDE_DEBUG("CTL[%d] path, using dsc[%d]\n",
  1533. ctl->idx,
  1534. iter_dsc.blk->id - DSC_0);
  1535. }
  1536. return splash_display->lm_cnt;
  1537. }
  1538. int sde_rm_cont_splash_res_init(struct msm_drm_private *priv,
  1539. struct sde_rm *rm,
  1540. struct sde_splash_data *splash_data,
  1541. struct sde_mdss_cfg *cat)
  1542. {
  1543. struct sde_rm_hw_iter iter_c;
  1544. int index = 0, ctl_top_cnt;
  1545. struct sde_kms *sde_kms = NULL;
  1546. struct sde_hw_mdp *hw_mdp;
  1547. struct sde_splash_display *splash_display;
  1548. u8 intf_sel;
  1549. if (!priv || !rm || !cat || !splash_data) {
  1550. SDE_ERROR("invalid input parameters\n");
  1551. return -EINVAL;
  1552. }
  1553. SDE_DEBUG("mixer_count=%d, ctl_count=%d, dsc_count=%d\n",
  1554. cat->mixer_count,
  1555. cat->ctl_count,
  1556. cat->dsc_count);
  1557. ctl_top_cnt = cat->ctl_count;
  1558. if (!priv->kms) {
  1559. SDE_ERROR("invalid kms\n");
  1560. return -EINVAL;
  1561. }
  1562. sde_kms = to_sde_kms(priv->kms);
  1563. hw_mdp = sde_rm_get_mdp(rm);
  1564. sde_rm_init_hw_iter(&iter_c, 0, SDE_HW_BLK_CTL);
  1565. while (_sde_rm_get_hw_locked(rm, &iter_c)
  1566. && (index < splash_data->num_splash_displays)) {
  1567. struct sde_hw_ctl *ctl = to_sde_hw_ctl(iter_c.blk->hw);
  1568. if (!ctl->ops.get_ctl_intf) {
  1569. SDE_ERROR("get_ctl_intf not initialized\n");
  1570. return -EINVAL;
  1571. }
  1572. intf_sel = ctl->ops.get_ctl_intf(ctl);
  1573. if (intf_sel) {
  1574. splash_display = &splash_data->splash_display[index];
  1575. SDE_DEBUG("finding resources for display=%d ctl=%d\n",
  1576. index, iter_c.blk->id - CTL_0);
  1577. _sde_rm_get_hw_blk_for_cont_splash(rm,
  1578. ctl, splash_display);
  1579. splash_display->cont_splash_enabled = true;
  1580. splash_display->ctl_ids[splash_display->ctl_cnt++] =
  1581. iter_c.blk->id;
  1582. }
  1583. index++;
  1584. }
  1585. return 0;
  1586. }
  1587. static int _sde_rm_populate_requirements(
  1588. struct sde_rm *rm,
  1589. struct drm_encoder *enc,
  1590. struct drm_crtc_state *crtc_state,
  1591. struct drm_connector_state *conn_state,
  1592. struct sde_rm_requirements *reqs)
  1593. {
  1594. const struct drm_display_mode *mode = &crtc_state->mode;
  1595. int i;
  1596. memset(reqs, 0, sizeof(*reqs));
  1597. reqs->top_ctrl = sde_connector_get_property(conn_state,
  1598. CONNECTOR_PROP_TOPOLOGY_CONTROL);
  1599. sde_encoder_get_hw_resources(enc, &reqs->hw_res, conn_state);
  1600. for (i = 0; i < SDE_RM_TOPOLOGY_MAX; i++) {
  1601. if (RM_IS_TOPOLOGY_MATCH(rm->topology_tbl[i],
  1602. reqs->hw_res.topology)) {
  1603. reqs->topology = &rm->topology_tbl[i];
  1604. break;
  1605. }
  1606. }
  1607. if (!reqs->topology) {
  1608. SDE_ERROR("invalid topology for the display\n");
  1609. return -EINVAL;
  1610. }
  1611. /*
  1612. * select dspp HW block for all dsi displays and ds for only
  1613. * primary dsi display.
  1614. */
  1615. if (conn_state->connector->connector_type == DRM_MODE_CONNECTOR_DSI) {
  1616. if (!RM_RQ_DSPP(reqs))
  1617. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_DSPP);
  1618. if (!RM_RQ_DS(reqs) && rm->hw_mdp->caps->has_dest_scaler &&
  1619. sde_encoder_is_primary_display(enc))
  1620. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_DS);
  1621. }
  1622. /**
  1623. * Set the requirement for LM which has CWB support if CWB is
  1624. * found enabled.
  1625. */
  1626. if (!RM_RQ_CWB(reqs) && sde_encoder_in_clone_mode(enc)) {
  1627. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_CWB);
  1628. /*
  1629. * topology selection based on conn mode is not valid for CWB
  1630. * as WB conn populates modes based on max_mixer_width check
  1631. * but primary can be using dual LMs. This topology override for
  1632. * CWB is to check number of datapath active in primary and
  1633. * allocate same number of LM/PP blocks reserved for CWB
  1634. */
  1635. reqs->topology =
  1636. &rm->topology_tbl[SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE];
  1637. if (sde_crtc_get_num_datapath(crtc_state->crtc) == 1)
  1638. reqs->topology =
  1639. &rm->topology_tbl[SDE_RM_TOPOLOGY_SINGLEPIPE];
  1640. }
  1641. SDE_DEBUG("top_ctrl: 0x%llX num_h_tiles: %d\n", reqs->top_ctrl,
  1642. reqs->hw_res.display_num_of_h_tiles);
  1643. SDE_DEBUG("num_lm: %d num_ctl: %d topology: %d split_display: %d\n",
  1644. reqs->topology->num_lm, reqs->topology->num_ctl,
  1645. reqs->topology->top_name,
  1646. reqs->topology->needs_split_display);
  1647. SDE_EVT32(mode->hdisplay, rm->lm_max_width, reqs->topology->num_lm,
  1648. reqs->top_ctrl, reqs->topology->top_name,
  1649. reqs->topology->num_ctl);
  1650. return 0;
  1651. }
  1652. static struct sde_rm_rsvp *_sde_rm_get_rsvp(
  1653. struct sde_rm *rm,
  1654. struct drm_encoder *enc)
  1655. {
  1656. struct sde_rm_rsvp *i;
  1657. if (!rm || !enc) {
  1658. SDE_ERROR("invalid params\n");
  1659. return NULL;
  1660. }
  1661. if (list_empty(&rm->rsvps))
  1662. return NULL;
  1663. list_for_each_entry(i, &rm->rsvps, list)
  1664. if (i->enc_id == enc->base.id)
  1665. return i;
  1666. return NULL;
  1667. }
  1668. static struct sde_rm_rsvp *_sde_rm_get_rsvp_nxt(
  1669. struct sde_rm *rm,
  1670. struct drm_encoder *enc)
  1671. {
  1672. struct sde_rm_rsvp *i;
  1673. if (list_empty(&rm->rsvps))
  1674. return NULL;
  1675. list_for_each_entry(i, &rm->rsvps, list)
  1676. if (i->enc_id == enc->base.id)
  1677. break;
  1678. list_for_each_entry_continue(i, &rm->rsvps, list)
  1679. if (i->enc_id == enc->base.id)
  1680. return i;
  1681. return NULL;
  1682. }
  1683. static struct drm_connector *_sde_rm_get_connector(
  1684. struct drm_encoder *enc)
  1685. {
  1686. struct drm_connector *conn = NULL, *conn_search;
  1687. struct drm_connector_list_iter conn_iter;
  1688. drm_connector_list_iter_begin(enc->dev, &conn_iter);
  1689. drm_for_each_connector_iter(conn_search, &conn_iter) {
  1690. if (conn_search->encoder == enc) {
  1691. conn = conn_search;
  1692. break;
  1693. }
  1694. }
  1695. drm_connector_list_iter_end(&conn_iter);
  1696. return conn;
  1697. }
  1698. int sde_rm_update_topology(struct drm_connector_state *conn_state,
  1699. struct msm_display_topology *topology)
  1700. {
  1701. int i, ret = 0;
  1702. struct msm_display_topology top;
  1703. enum sde_rm_topology_name top_name = SDE_RM_TOPOLOGY_NONE;
  1704. if (!conn_state)
  1705. return -EINVAL;
  1706. if (topology) {
  1707. top = *topology;
  1708. for (i = 0; i < SDE_RM_TOPOLOGY_MAX; i++)
  1709. if (RM_IS_TOPOLOGY_MATCH(g_top_table[i], top)) {
  1710. top_name = g_top_table[i].top_name;
  1711. break;
  1712. }
  1713. }
  1714. ret = msm_property_set_property(
  1715. sde_connector_get_propinfo(conn_state->connector),
  1716. sde_connector_get_property_state(conn_state),
  1717. CONNECTOR_PROP_TOPOLOGY_NAME, top_name);
  1718. return ret;
  1719. }
  1720. /**
  1721. * _sde_rm_release_rsvp - release resources and release a reservation
  1722. * @rm: KMS handle
  1723. * @rsvp: RSVP pointer to release and release resources for
  1724. */
  1725. static void _sde_rm_release_rsvp(
  1726. struct sde_rm *rm,
  1727. struct sde_rm_rsvp *rsvp,
  1728. struct drm_connector *conn)
  1729. {
  1730. struct sde_rm_rsvp *rsvp_c, *rsvp_n;
  1731. struct sde_rm_hw_blk *blk;
  1732. enum sde_hw_blk_type type;
  1733. if (!rsvp)
  1734. return;
  1735. SDE_DEBUG("rel rsvp %d enc %d\n", rsvp->seq, rsvp->enc_id);
  1736. list_for_each_entry_safe(rsvp_c, rsvp_n, &rm->rsvps, list) {
  1737. if (rsvp == rsvp_c) {
  1738. list_del(&rsvp_c->list);
  1739. break;
  1740. }
  1741. }
  1742. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  1743. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  1744. if (blk->rsvp == rsvp) {
  1745. blk->rsvp = NULL;
  1746. SDE_DEBUG("rel rsvp %d enc %d %d %d\n",
  1747. rsvp->seq, rsvp->enc_id,
  1748. blk->type, blk->id);
  1749. _sde_rm_inc_resource_info(rm,
  1750. &rm->avail_res, blk);
  1751. }
  1752. if (blk->rsvp_nxt == rsvp) {
  1753. blk->rsvp_nxt = NULL;
  1754. SDE_DEBUG("rel rsvp_nxt %d enc %d %d %d\n",
  1755. rsvp->seq, rsvp->enc_id,
  1756. blk->type, blk->id);
  1757. }
  1758. }
  1759. }
  1760. kfree(rsvp);
  1761. }
  1762. void sde_rm_release(struct sde_rm *rm, struct drm_encoder *enc, bool nxt)
  1763. {
  1764. struct sde_rm_rsvp *rsvp;
  1765. struct drm_connector *conn = NULL;
  1766. struct msm_drm_private *priv;
  1767. struct sde_kms *sde_kms;
  1768. uint64_t top_ctrl;
  1769. if (!rm || !enc) {
  1770. SDE_ERROR("invalid params\n");
  1771. return;
  1772. }
  1773. priv = enc->dev->dev_private;
  1774. if (!priv->kms) {
  1775. SDE_ERROR("invalid kms\n");
  1776. return;
  1777. }
  1778. sde_kms = to_sde_kms(priv->kms);
  1779. mutex_lock(&rm->rm_lock);
  1780. if (nxt)
  1781. rsvp = _sde_rm_get_rsvp_nxt(rm, enc);
  1782. else
  1783. rsvp = _sde_rm_get_rsvp(rm, enc);
  1784. if (!rsvp) {
  1785. SDE_DEBUG("failed to find rsvp for enc %d, nxt %d",
  1786. enc->base.id, nxt);
  1787. goto end;
  1788. }
  1789. if (_sde_rm_is_display_in_cont_splash(sde_kms, enc)) {
  1790. _sde_rm_release_rsvp(rm, rsvp, conn);
  1791. goto end;
  1792. }
  1793. conn = _sde_rm_get_connector(enc);
  1794. if (!conn) {
  1795. SDE_ERROR("failed to get connector for enc %d, nxt %d",
  1796. enc->base.id, nxt);
  1797. goto end;
  1798. }
  1799. top_ctrl = sde_connector_get_property(conn->state,
  1800. CONNECTOR_PROP_TOPOLOGY_CONTROL);
  1801. SDE_EVT32(enc->base.id, conn->base.id, rsvp->seq, top_ctrl, nxt);
  1802. if (top_ctrl & BIT(SDE_RM_TOPCTL_RESERVE_LOCK)) {
  1803. SDE_DEBUG("rsvp[s%de%d] not releasing locked resources\n",
  1804. rsvp->seq, rsvp->enc_id);
  1805. } else {
  1806. SDE_DEBUG("release rsvp[s%de%d]\n", rsvp->seq,
  1807. rsvp->enc_id);
  1808. _sde_rm_release_rsvp(rm, rsvp, conn);
  1809. }
  1810. end:
  1811. mutex_unlock(&rm->rm_lock);
  1812. }
  1813. static int _sde_rm_commit_rsvp(
  1814. struct sde_rm *rm,
  1815. struct sde_rm_rsvp *rsvp,
  1816. struct drm_connector_state *conn_state)
  1817. {
  1818. struct sde_rm_hw_blk *blk;
  1819. enum sde_hw_blk_type type;
  1820. int ret = 0;
  1821. /* Swap next rsvp to be the active */
  1822. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  1823. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  1824. if (blk->rsvp_nxt && conn_state->best_encoder->base.id
  1825. == blk->rsvp_nxt->enc_id) {
  1826. blk->rsvp = blk->rsvp_nxt;
  1827. blk->rsvp_nxt = NULL;
  1828. _sde_rm_dec_resource_info(rm,
  1829. &rm->avail_res, blk);
  1830. }
  1831. }
  1832. }
  1833. if (!ret) {
  1834. SDE_DEBUG("rsrv enc %d topology %d\n", rsvp->enc_id,
  1835. rsvp->topology);
  1836. SDE_EVT32(rsvp->enc_id, rsvp->topology);
  1837. }
  1838. return ret;
  1839. }
  1840. int sde_rm_reserve(
  1841. struct sde_rm *rm,
  1842. struct drm_encoder *enc,
  1843. struct drm_crtc_state *crtc_state,
  1844. struct drm_connector_state *conn_state,
  1845. bool test_only)
  1846. {
  1847. struct sde_rm_rsvp *rsvp_cur, *rsvp_nxt;
  1848. struct sde_rm_requirements reqs;
  1849. struct msm_drm_private *priv;
  1850. struct sde_kms *sde_kms;
  1851. int ret;
  1852. if (!rm || !enc || !crtc_state || !conn_state) {
  1853. SDE_ERROR("invalid arguments\n");
  1854. return -EINVAL;
  1855. }
  1856. if (!enc->dev || !enc->dev->dev_private) {
  1857. SDE_ERROR("drm device invalid\n");
  1858. return -EINVAL;
  1859. }
  1860. priv = enc->dev->dev_private;
  1861. if (!priv->kms) {
  1862. SDE_ERROR("invalid kms\n");
  1863. return -EINVAL;
  1864. }
  1865. sde_kms = to_sde_kms(priv->kms);
  1866. /* Check if this is just a page-flip */
  1867. if (!_sde_rm_is_display_in_cont_splash(sde_kms, enc) &&
  1868. !drm_atomic_crtc_needs_modeset(crtc_state))
  1869. return 0;
  1870. SDE_DEBUG("reserving hw for conn %d enc %d crtc %d test_only %d\n",
  1871. conn_state->connector->base.id, enc->base.id,
  1872. crtc_state->crtc->base.id, test_only);
  1873. SDE_EVT32(enc->base.id, conn_state->connector->base.id);
  1874. mutex_lock(&rm->rm_lock);
  1875. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_BEGIN);
  1876. rsvp_cur = _sde_rm_get_rsvp(rm, enc);
  1877. rsvp_nxt = _sde_rm_get_rsvp_nxt(rm, enc);
  1878. /*
  1879. * RM currently relies on rsvp_nxt assigned to the hw blocks to
  1880. * commit rsvps. This rsvp_nxt can be cleared by a back to back
  1881. * check_only commit with modeset when its predecessor atomic
  1882. * commit is delayed / not committed the reservation yet.
  1883. * Bail out in such cases so that check only commit
  1884. * comes again after earlier commit gets processed.
  1885. */
  1886. if (test_only && rsvp_nxt) {
  1887. SDE_ERROR("cur %d nxt %d enc %d conn %d\n", rsvp_cur->seq,
  1888. rsvp_nxt->seq, enc->base.id,
  1889. conn_state->connector->base.id);
  1890. ret = -EINVAL;
  1891. goto end;
  1892. }
  1893. if (!test_only && rsvp_nxt)
  1894. goto commit_rsvp;
  1895. ret = _sde_rm_populate_requirements(rm, enc, crtc_state,
  1896. conn_state, &reqs);
  1897. if (ret) {
  1898. SDE_ERROR("failed to populate hw requirements\n");
  1899. goto end;
  1900. }
  1901. /*
  1902. * We only support one active reservation per-hw-block. But to implement
  1903. * transactional semantics for test-only, and for allowing failure while
  1904. * modifying your existing reservation, over the course of this
  1905. * function we can have two reservations:
  1906. * Current: Existing reservation
  1907. * Next: Proposed reservation. The proposed reservation may fail, or may
  1908. * be discarded if in test-only mode.
  1909. * If reservation is successful, and we're not in test-only, then we
  1910. * replace the current with the next.
  1911. */
  1912. rsvp_nxt = kzalloc(sizeof(*rsvp_nxt), GFP_KERNEL);
  1913. if (!rsvp_nxt) {
  1914. ret = -ENOMEM;
  1915. goto end;
  1916. }
  1917. /*
  1918. * User can request that we clear out any reservation during the
  1919. * atomic_check phase by using this CLEAR bit
  1920. */
  1921. if (rsvp_cur && test_only && RM_RQ_CLEAR(&reqs)) {
  1922. SDE_DEBUG("test_only & CLEAR: clear rsvp[s%de%d]\n",
  1923. rsvp_cur->seq, rsvp_cur->enc_id);
  1924. _sde_rm_release_rsvp(rm, rsvp_cur, conn_state->connector);
  1925. rsvp_cur = NULL;
  1926. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_AFTER_CLEAR);
  1927. }
  1928. /* Check the proposed reservation, store it in hw's "next" field */
  1929. ret = _sde_rm_make_next_rsvp(rm, enc, crtc_state, conn_state,
  1930. rsvp_nxt, &reqs);
  1931. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_AFTER_RSVPNEXT);
  1932. if (ret) {
  1933. SDE_ERROR("failed to reserve hw resources: %d, test_only %d\n",
  1934. ret, test_only);
  1935. _sde_rm_release_rsvp(rm, rsvp_nxt, conn_state->connector);
  1936. goto end;
  1937. } else if (test_only && !RM_RQ_LOCK(&reqs)) {
  1938. /*
  1939. * Normally, if test_only, test the reservation and then undo
  1940. * However, if the user requests LOCK, then keep the reservation
  1941. * made during the atomic_check phase.
  1942. */
  1943. SDE_DEBUG("test_only: rsvp[s%de%d]\n",
  1944. rsvp_nxt->seq, rsvp_nxt->enc_id);
  1945. goto end;
  1946. } else {
  1947. if (test_only && RM_RQ_LOCK(&reqs))
  1948. SDE_DEBUG("test_only & LOCK: lock rsvp[s%de%d]\n",
  1949. rsvp_nxt->seq, rsvp_nxt->enc_id);
  1950. }
  1951. commit_rsvp:
  1952. _sde_rm_release_rsvp(rm, rsvp_cur, conn_state->connector);
  1953. ret = _sde_rm_commit_rsvp(rm, rsvp_nxt, conn_state);
  1954. end:
  1955. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_FINAL);
  1956. mutex_unlock(&rm->rm_lock);
  1957. return ret;
  1958. }
  1959. int sde_rm_ext_blk_create_reserve(struct sde_rm *rm,
  1960. struct sde_hw_blk *hw, struct drm_encoder *enc)
  1961. {
  1962. struct sde_rm_hw_blk *blk;
  1963. struct sde_rm_rsvp *rsvp;
  1964. int ret = 0;
  1965. if (!rm || !hw || !enc) {
  1966. SDE_ERROR("invalid parameters\n");
  1967. return -EINVAL;
  1968. }
  1969. if (hw->type >= SDE_HW_BLK_MAX) {
  1970. SDE_ERROR("invalid HW type\n");
  1971. return -EINVAL;
  1972. }
  1973. mutex_lock(&rm->rm_lock);
  1974. rsvp = _sde_rm_get_rsvp(rm, enc);
  1975. if (!rsvp) {
  1976. rsvp = kzalloc(sizeof(*rsvp), GFP_KERNEL);
  1977. if (!rsvp) {
  1978. ret = -ENOMEM;
  1979. goto end;
  1980. }
  1981. rsvp->seq = ++rm->rsvp_next_seq;
  1982. rsvp->enc_id = enc->base.id;
  1983. list_add_tail(&rsvp->list, &rm->rsvps);
  1984. SDE_DEBUG("create rsvp %d for enc %d\n",
  1985. rsvp->seq, rsvp->enc_id);
  1986. }
  1987. blk = kzalloc(sizeof(*blk), GFP_KERNEL);
  1988. if (!blk) {
  1989. ret = -ENOMEM;
  1990. goto end;
  1991. }
  1992. blk->type = hw->type;
  1993. blk->id = hw->id;
  1994. blk->hw = hw;
  1995. blk->rsvp = rsvp;
  1996. list_add_tail(&blk->list, &rm->hw_blks[hw->type]);
  1997. SDE_DEBUG("create blk %d %d for rsvp %d enc %d\n", blk->type, blk->id,
  1998. rsvp->seq, rsvp->enc_id);
  1999. end:
  2000. mutex_unlock(&rm->rm_lock);
  2001. return ret;
  2002. }
  2003. int sde_rm_ext_blk_destroy(struct sde_rm *rm,
  2004. struct drm_encoder *enc)
  2005. {
  2006. struct sde_rm_hw_blk *blk = NULL, *p;
  2007. struct sde_rm_rsvp *rsvp;
  2008. enum sde_hw_blk_type type;
  2009. int ret = 0;
  2010. if (!rm || !enc) {
  2011. SDE_ERROR("invalid parameters\n");
  2012. return -EINVAL;
  2013. }
  2014. mutex_lock(&rm->rm_lock);
  2015. rsvp = _sde_rm_get_rsvp(rm, enc);
  2016. if (!rsvp) {
  2017. ret = -ENOENT;
  2018. SDE_ERROR("failed to find rsvp for enc %d\n", enc->base.id);
  2019. goto end;
  2020. }
  2021. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  2022. list_for_each_entry_safe(blk, p, &rm->hw_blks[type], list) {
  2023. if (blk->rsvp == rsvp) {
  2024. list_del(&blk->list);
  2025. SDE_DEBUG("del blk %d %d from rsvp %d enc %d\n",
  2026. blk->type, blk->id,
  2027. rsvp->seq, rsvp->enc_id);
  2028. kfree(blk);
  2029. }
  2030. }
  2031. }
  2032. SDE_DEBUG("del rsvp %d\n", rsvp->seq);
  2033. list_del(&rsvp->list);
  2034. kfree(rsvp);
  2035. end:
  2036. mutex_unlock(&rm->rm_lock);
  2037. return ret;
  2038. }