msm_drv.c 50 KB

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  1. /*
  2. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  3. * Copyright (C) 2013 Red Hat
  4. * Author: Rob Clark <[email protected]>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published by
  8. * the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. /*
  19. * Copyright (c) 2016 Intel Corporation
  20. *
  21. * Permission to use, copy, modify, distribute, and sell this software and its
  22. * documentation for any purpose is hereby granted without fee, provided that
  23. * the above copyright notice appear in all copies and that both that copyright
  24. * notice and this permission notice appear in supporting documentation, and
  25. * that the name of the copyright holders not be used in advertising or
  26. * publicity pertaining to distribution of the software without specific,
  27. * written prior permission. The copyright holders make no representations
  28. * about the suitability of this software for any purpose. It is provided "as
  29. * is" without express or implied warranty.
  30. *
  31. * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  32. * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  33. * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  34. * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  35. * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  36. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
  37. * OF THIS SOFTWARE.
  38. */
  39. #include <linux/of_address.h>
  40. #include <linux/kthread.h>
  41. #include <uapi/linux/sched/types.h>
  42. #include <drm/drm_of.h>
  43. #include <drm/drm_probe_helper.h>
  44. #include "msm_drv.h"
  45. #include "msm_gem.h"
  46. #include "msm_kms.h"
  47. #include "msm_mmu.h"
  48. #include "sde_wb.h"
  49. #include "sde_dbg.h"
  50. /*
  51. * MSM driver version:
  52. * - 1.0.0 - initial interface
  53. * - 1.1.0 - adds madvise, and support for submits with > 4 cmd buffers
  54. * - 1.2.0 - adds explicit fence support for submit ioctl
  55. * - 1.3.0 - adds GMEM_BASE + NR_RINGS params, SUBMITQUEUE_NEW +
  56. * SUBMITQUEUE_CLOSE ioctls, and MSM_INFO_IOVA flag for
  57. * MSM_GEM_INFO ioctl.
  58. * - 1.4.0 - softpin, MSM_RELOC_BO_DUMP, and GEM_INFO support to set/get
  59. * GEM object's debug name
  60. */
  61. #define MSM_VERSION_MAJOR 1
  62. #define MSM_VERSION_MINOR 4
  63. #define MSM_VERSION_PATCHLEVEL 0
  64. static void msm_fb_output_poll_changed(struct drm_device *dev)
  65. {
  66. struct msm_drm_private *priv = NULL;
  67. if (!dev) {
  68. DRM_ERROR("output_poll_changed failed, invalid input\n");
  69. return;
  70. }
  71. priv = dev->dev_private;
  72. if (priv->fbdev)
  73. drm_fb_helper_hotplug_event(priv->fbdev);
  74. }
  75. /**
  76. * msm_atomic_helper_check - validate state object
  77. * @dev: DRM device
  78. * @state: the driver state object
  79. *
  80. * This is a wrapper for the drm_atomic_helper_check to check the modeset
  81. * and state checking for planes. Additionally it checks if any secure
  82. * transition(moving CRTC and planes between secure and non-secure states and
  83. * vice versa) is allowed or not. When going to secure state, planes
  84. * with fb_mode as dir translated only can be staged on the CRTC, and only one
  85. * CRTC should be active.
  86. * Also mixing of secure and non-secure is not allowed.
  87. *
  88. * RETURNS
  89. * Zero for success or -errorno.
  90. */
  91. int msm_atomic_check(struct drm_device *dev,
  92. struct drm_atomic_state *state)
  93. {
  94. struct msm_drm_private *priv;
  95. priv = dev->dev_private;
  96. if (priv && priv->kms && priv->kms->funcs &&
  97. priv->kms->funcs->atomic_check)
  98. return priv->kms->funcs->atomic_check(priv->kms, state);
  99. return drm_atomic_helper_check(dev, state);
  100. }
  101. static const struct drm_mode_config_funcs mode_config_funcs = {
  102. .fb_create = msm_framebuffer_create,
  103. .output_poll_changed = msm_fb_output_poll_changed,
  104. .atomic_check = msm_atomic_check,
  105. .atomic_commit = msm_atomic_commit,
  106. .atomic_state_alloc = msm_atomic_state_alloc,
  107. .atomic_state_clear = msm_atomic_state_clear,
  108. .atomic_state_free = msm_atomic_state_free,
  109. };
  110. static const struct drm_mode_config_helper_funcs mode_config_helper_funcs = {
  111. .atomic_commit_tail = msm_atomic_commit_tail,
  112. };
  113. #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING
  114. static bool reglog = false;
  115. MODULE_PARM_DESC(reglog, "Enable register read/write logging");
  116. module_param(reglog, bool, 0600);
  117. #else
  118. #define reglog 0
  119. #endif
  120. #ifdef CONFIG_DRM_FBDEV_EMULATION
  121. static bool fbdev = true;
  122. MODULE_PARM_DESC(fbdev, "Enable fbdev compat layer");
  123. module_param(fbdev, bool, 0600);
  124. #endif
  125. static char *vram = "16m";
  126. MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU)");
  127. module_param(vram, charp, 0);
  128. bool dumpstate = false;
  129. MODULE_PARM_DESC(dumpstate, "Dump KMS state on errors");
  130. module_param(dumpstate, bool, 0600);
  131. static bool modeset = true;
  132. MODULE_PARM_DESC(modeset, "Use kernel modesetting [KMS] (1=on (default), 0=disable)");
  133. module_param(modeset, bool, 0600);
  134. /*
  135. * Util/helpers:
  136. */
  137. int msm_clk_bulk_get(struct device *dev, struct clk_bulk_data **bulk)
  138. {
  139. struct property *prop;
  140. const char *name;
  141. struct clk_bulk_data *local;
  142. int i = 0, ret, count;
  143. count = of_property_count_strings(dev->of_node, "clock-names");
  144. if (count < 1)
  145. return 0;
  146. local = devm_kcalloc(dev, sizeof(struct clk_bulk_data *),
  147. count, GFP_KERNEL);
  148. if (!local)
  149. return -ENOMEM;
  150. of_property_for_each_string(dev->of_node, "clock-names", prop, name) {
  151. local[i].id = devm_kstrdup(dev, name, GFP_KERNEL);
  152. if (!local[i].id) {
  153. devm_kfree(dev, local);
  154. return -ENOMEM;
  155. }
  156. i++;
  157. }
  158. ret = devm_clk_bulk_get(dev, count, local);
  159. if (ret) {
  160. for (i = 0; i < count; i++)
  161. devm_kfree(dev, (void *) local[i].id);
  162. devm_kfree(dev, local);
  163. return ret;
  164. }
  165. *bulk = local;
  166. return count;
  167. }
  168. struct clk *msm_clk_bulk_get_clock(struct clk_bulk_data *bulk, int count,
  169. const char *name)
  170. {
  171. int i;
  172. char n[32];
  173. snprintf(n, sizeof(n), "%s_clk", name);
  174. for (i = 0; bulk && i < count; i++) {
  175. if (!strcmp(bulk[i].id, name) || !strcmp(bulk[i].id, n))
  176. return bulk[i].clk;
  177. }
  178. return NULL;
  179. }
  180. struct clk *msm_clk_get(struct platform_device *pdev, const char *name)
  181. {
  182. struct clk *clk;
  183. char name2[32];
  184. clk = devm_clk_get(&pdev->dev, name);
  185. if (!IS_ERR(clk) || PTR_ERR(clk) == -EPROBE_DEFER)
  186. return clk;
  187. snprintf(name2, sizeof(name2), "%s_clk", name);
  188. clk = devm_clk_get(&pdev->dev, name2);
  189. if (!IS_ERR(clk))
  190. dev_warn(&pdev->dev, "Using legacy clk name binding. Use "
  191. "\"%s\" instead of \"%s\"\n", name, name2);
  192. return clk;
  193. }
  194. void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
  195. const char *dbgname)
  196. {
  197. struct resource *res;
  198. unsigned long size;
  199. void __iomem *ptr;
  200. if (name)
  201. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
  202. else
  203. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  204. if (!res) {
  205. dev_dbg(&pdev->dev, "failed to get memory resource: %s\n",
  206. name);
  207. return ERR_PTR(-EINVAL);
  208. }
  209. size = resource_size(res);
  210. ptr = devm_ioremap_nocache(&pdev->dev, res->start, size);
  211. if (!ptr) {
  212. dev_err(&pdev->dev, "failed to ioremap: %s\n", name);
  213. return ERR_PTR(-ENOMEM);
  214. }
  215. if (reglog)
  216. dev_dbg(&pdev->dev, "IO:region %s %pK %08lx\n",
  217. dbgname, ptr, size);
  218. return ptr;
  219. }
  220. unsigned long msm_iomap_size(struct platform_device *pdev, const char *name)
  221. {
  222. struct resource *res;
  223. if (name)
  224. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
  225. else
  226. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  227. if (!res) {
  228. dev_dbg(&pdev->dev, "failed to get memory resource: %s\n",
  229. name);
  230. return 0;
  231. }
  232. return resource_size(res);
  233. }
  234. void msm_iounmap(struct platform_device *pdev, void __iomem *addr)
  235. {
  236. devm_iounmap(&pdev->dev, addr);
  237. }
  238. void msm_writel(u32 data, void __iomem *addr)
  239. {
  240. if (reglog)
  241. pr_debug("IO:W %pK %08x\n", addr, data);
  242. writel(data, addr);
  243. }
  244. u32 msm_readl(const void __iomem *addr)
  245. {
  246. u32 val = readl(addr);
  247. if (reglog)
  248. pr_err("IO:R %pK %08x\n", addr, val);
  249. return val;
  250. }
  251. int msm_get_src_bpc(int chroma_format,
  252. int bpc)
  253. {
  254. int src_bpp;
  255. switch (chroma_format) {
  256. case MSM_CHROMA_444:
  257. src_bpp = bpc * 3;
  258. break;
  259. case MSM_CHROMA_422:
  260. src_bpp = bpc * 2;
  261. break;
  262. case MSM_CHROMA_420:
  263. src_bpp = mult_frac(bpc, 3, 2);
  264. break;
  265. default:
  266. src_bpp = bpc * 3;
  267. break;
  268. }
  269. return src_bpp;
  270. }
  271. struct vblank_work {
  272. struct kthread_work work;
  273. int crtc_id;
  274. bool enable;
  275. struct msm_drm_private *priv;
  276. };
  277. static void vblank_ctrl_worker(struct kthread_work *work)
  278. {
  279. struct vblank_work *cur_work = container_of(work,
  280. struct vblank_work, work);
  281. struct msm_drm_private *priv = cur_work->priv;
  282. struct msm_kms *kms = priv->kms;
  283. if (cur_work->enable)
  284. kms->funcs->enable_vblank(kms, priv->crtcs[cur_work->crtc_id]);
  285. else
  286. kms->funcs->disable_vblank(kms, priv->crtcs[cur_work->crtc_id]);
  287. kfree(cur_work);
  288. }
  289. static int vblank_ctrl_queue_work(struct msm_drm_private *priv,
  290. int crtc_id, bool enable)
  291. {
  292. struct vblank_work *cur_work;
  293. if (!priv || crtc_id >= priv->num_crtcs)
  294. return -EINVAL;
  295. cur_work = kzalloc(sizeof(*cur_work), GFP_ATOMIC);
  296. if (!cur_work)
  297. return -ENOMEM;
  298. kthread_init_work(&cur_work->work, vblank_ctrl_worker);
  299. cur_work->crtc_id = crtc_id;
  300. cur_work->enable = enable;
  301. cur_work->priv = priv;
  302. kthread_queue_work(&priv->event_thread[crtc_id].worker,
  303. &cur_work->work);
  304. return 0;
  305. }
  306. static int msm_drm_uninit(struct device *dev)
  307. {
  308. struct platform_device *pdev = to_platform_device(dev);
  309. struct drm_device *ddev = platform_get_drvdata(pdev);
  310. struct msm_drm_private *priv = ddev->dev_private;
  311. struct msm_kms *kms = priv->kms;
  312. int i;
  313. /* We must cancel and cleanup any pending vblank enable/disable
  314. * work before drm_irq_uninstall() to avoid work re-enabling an
  315. * irq after uninstall has disabled it.
  316. */
  317. flush_workqueue(priv->wq);
  318. destroy_workqueue(priv->wq);
  319. /* clean up display commit/event worker threads */
  320. for (i = 0; i < priv->num_crtcs; i++) {
  321. if (priv->disp_thread[i].thread) {
  322. kthread_flush_worker(&priv->disp_thread[i].worker);
  323. kthread_stop(priv->disp_thread[i].thread);
  324. priv->disp_thread[i].thread = NULL;
  325. }
  326. if (priv->event_thread[i].thread) {
  327. kthread_flush_worker(&priv->event_thread[i].worker);
  328. kthread_stop(priv->event_thread[i].thread);
  329. priv->event_thread[i].thread = NULL;
  330. }
  331. }
  332. drm_kms_helper_poll_fini(ddev);
  333. drm_mode_config_cleanup(ddev);
  334. if (priv->registered) {
  335. drm_dev_unregister(ddev);
  336. priv->registered = false;
  337. }
  338. #ifdef CONFIG_DRM_FBDEV_EMULATION
  339. if (fbdev && priv->fbdev)
  340. msm_fbdev_free(ddev);
  341. #endif
  342. drm_atomic_helper_shutdown(ddev);
  343. drm_mode_config_cleanup(ddev);
  344. pm_runtime_get_sync(dev);
  345. drm_irq_uninstall(ddev);
  346. pm_runtime_put_sync(dev);
  347. if (kms && kms->funcs)
  348. kms->funcs->destroy(kms);
  349. if (priv->vram.paddr) {
  350. unsigned long attrs = DMA_ATTR_NO_KERNEL_MAPPING;
  351. drm_mm_takedown(&priv->vram.mm);
  352. dma_free_attrs(dev, priv->vram.size, NULL,
  353. priv->vram.paddr, attrs);
  354. }
  355. component_unbind_all(dev, ddev);
  356. sde_dbg_destroy();
  357. debugfs_remove_recursive(priv->debug_root);
  358. sde_power_resource_deinit(pdev, &priv->phandle);
  359. msm_mdss_destroy(ddev);
  360. ddev->dev_private = NULL;
  361. kfree(priv);
  362. drm_dev_put(ddev);
  363. return 0;
  364. }
  365. #define KMS_MDP4 4
  366. #define KMS_MDP5 5
  367. #define KMS_SDE 3
  368. static int get_mdp_ver(struct platform_device *pdev)
  369. {
  370. #ifdef CONFIG_OF
  371. static const struct of_device_id match_types[] = { {
  372. .compatible = "qcom,mdss_mdp",
  373. .data = (void *)KMS_MDP5,
  374. },
  375. {
  376. .compatible = "qcom,sde-kms",
  377. .data = (void *)KMS_SDE,
  378. },
  379. {},
  380. };
  381. struct device *dev = &pdev->dev;
  382. const struct of_device_id *match;
  383. match = of_match_node(match_types, dev->of_node);
  384. if (match)
  385. return (int)(unsigned long)match->data;
  386. #endif
  387. return KMS_MDP4;
  388. }
  389. static int msm_init_vram(struct drm_device *dev)
  390. {
  391. struct msm_drm_private *priv = dev->dev_private;
  392. struct device_node *node;
  393. unsigned long size = 0;
  394. int ret = 0;
  395. /* In the device-tree world, we could have a 'memory-region'
  396. * phandle, which gives us a link to our "vram". Allocating
  397. * is all nicely abstracted behind the dma api, but we need
  398. * to know the entire size to allocate it all in one go. There
  399. * are two cases:
  400. * 1) device with no IOMMU, in which case we need exclusive
  401. * access to a VRAM carveout big enough for all gpu
  402. * buffers
  403. * 2) device with IOMMU, but where the bootloader puts up
  404. * a splash screen. In this case, the VRAM carveout
  405. * need only be large enough for fbdev fb. But we need
  406. * exclusive access to the buffer to avoid the kernel
  407. * using those pages for other purposes (which appears
  408. * as corruption on screen before we have a chance to
  409. * load and do initial modeset)
  410. */
  411. node = of_parse_phandle(dev->dev->of_node, "memory-region", 0);
  412. if (node) {
  413. struct resource r;
  414. ret = of_address_to_resource(node, 0, &r);
  415. of_node_put(node);
  416. if (ret)
  417. return ret;
  418. size = r.end - r.start;
  419. DRM_INFO("using VRAM carveout: %lx@%pa\n", size, &r.start);
  420. /* if we have no IOMMU, then we need to use carveout allocator.
  421. * Grab the entire CMA chunk carved out in early startup in
  422. * mach-msm:
  423. */
  424. } else if (!iommu_present(&platform_bus_type)) {
  425. DRM_INFO("using %s VRAM carveout\n", vram);
  426. size = memparse(vram, NULL);
  427. }
  428. if (size) {
  429. unsigned long attrs = 0;
  430. void *p;
  431. priv->vram.size = size;
  432. drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1);
  433. spin_lock_init(&priv->vram.lock);
  434. attrs |= DMA_ATTR_NO_KERNEL_MAPPING;
  435. attrs |= DMA_ATTR_WRITE_COMBINE;
  436. /* note that for no-kernel-mapping, the vaddr returned
  437. * is bogus, but non-null if allocation succeeded:
  438. */
  439. p = dma_alloc_attrs(dev->dev, size,
  440. &priv->vram.paddr, GFP_KERNEL, attrs);
  441. if (!p) {
  442. dev_err(dev->dev, "failed to allocate VRAM\n");
  443. priv->vram.paddr = 0;
  444. return -ENOMEM;
  445. }
  446. dev_info(dev->dev, "VRAM: %08x->%08x\n",
  447. (uint32_t)priv->vram.paddr,
  448. (uint32_t)(priv->vram.paddr + size));
  449. }
  450. return ret;
  451. }
  452. #ifdef CONFIG_OF
  453. static int msm_component_bind_all(struct device *dev,
  454. struct drm_device *drm_dev)
  455. {
  456. int ret;
  457. ret = component_bind_all(dev, drm_dev);
  458. if (ret)
  459. DRM_ERROR("component_bind_all failed: %d\n", ret);
  460. return ret;
  461. }
  462. #else
  463. static int msm_component_bind_all(struct device *dev,
  464. struct drm_device *drm_dev)
  465. {
  466. return 0;
  467. }
  468. #endif
  469. static int msm_drm_display_thread_create(struct sched_param param,
  470. struct msm_drm_private *priv, struct drm_device *ddev,
  471. struct device *dev)
  472. {
  473. int i, ret = 0;
  474. /**
  475. * this priority was found during empiric testing to have appropriate
  476. * realtime scheduling to process display updates and interact with
  477. * other real time and normal priority task
  478. */
  479. param.sched_priority = 16;
  480. for (i = 0; i < priv->num_crtcs; i++) {
  481. /* initialize display thread */
  482. priv->disp_thread[i].crtc_id = priv->crtcs[i]->base.id;
  483. kthread_init_worker(&priv->disp_thread[i].worker);
  484. priv->disp_thread[i].dev = ddev;
  485. priv->disp_thread[i].thread =
  486. kthread_run(kthread_worker_fn,
  487. &priv->disp_thread[i].worker,
  488. "crtc_commit:%d", priv->disp_thread[i].crtc_id);
  489. ret = sched_setscheduler(priv->disp_thread[i].thread,
  490. SCHED_FIFO, &param);
  491. if (ret)
  492. pr_warn("display thread priority update failed: %d\n",
  493. ret);
  494. if (IS_ERR(priv->disp_thread[i].thread)) {
  495. dev_err(dev, "failed to create crtc_commit kthread\n");
  496. priv->disp_thread[i].thread = NULL;
  497. }
  498. /* initialize event thread */
  499. priv->event_thread[i].crtc_id = priv->crtcs[i]->base.id;
  500. kthread_init_worker(&priv->event_thread[i].worker);
  501. priv->event_thread[i].dev = ddev;
  502. priv->event_thread[i].thread =
  503. kthread_run(kthread_worker_fn,
  504. &priv->event_thread[i].worker,
  505. "crtc_event:%d", priv->event_thread[i].crtc_id);
  506. /**
  507. * event thread should also run at same priority as disp_thread
  508. * because it is handling frame_done events. A lower priority
  509. * event thread and higher priority disp_thread can causes
  510. * frame_pending counters beyond 2. This can lead to commit
  511. * failure at crtc commit level.
  512. */
  513. ret = sched_setscheduler(priv->event_thread[i].thread,
  514. SCHED_FIFO, &param);
  515. if (ret)
  516. pr_warn("display event thread priority update failed: %d\n",
  517. ret);
  518. if (IS_ERR(priv->event_thread[i].thread)) {
  519. dev_err(dev, "failed to create crtc_event kthread\n");
  520. priv->event_thread[i].thread = NULL;
  521. }
  522. if ((!priv->disp_thread[i].thread) ||
  523. !priv->event_thread[i].thread) {
  524. /* clean up previously created threads if any */
  525. for ( ; i >= 0; i--) {
  526. if (priv->disp_thread[i].thread) {
  527. kthread_stop(
  528. priv->disp_thread[i].thread);
  529. priv->disp_thread[i].thread = NULL;
  530. }
  531. if (priv->event_thread[i].thread) {
  532. kthread_stop(
  533. priv->event_thread[i].thread);
  534. priv->event_thread[i].thread = NULL;
  535. }
  536. }
  537. return -EINVAL;
  538. }
  539. }
  540. /**
  541. * Since pp interrupt is heavy weight, try to queue the work
  542. * into a dedicated worker thread, so that they dont interrupt
  543. * other important events.
  544. */
  545. kthread_init_worker(&priv->pp_event_worker);
  546. priv->pp_event_thread = kthread_run(kthread_worker_fn,
  547. &priv->pp_event_worker, "pp_event");
  548. ret = sched_setscheduler(priv->pp_event_thread,
  549. SCHED_FIFO, &param);
  550. if (ret)
  551. pr_warn("pp_event thread priority update failed: %d\n",
  552. ret);
  553. if (IS_ERR(priv->pp_event_thread)) {
  554. dev_err(dev, "failed to create pp_event kthread\n");
  555. ret = PTR_ERR(priv->pp_event_thread);
  556. priv->pp_event_thread = NULL;
  557. return ret;
  558. }
  559. return 0;
  560. }
  561. static struct msm_kms *_msm_drm_component_init_helper(
  562. struct msm_drm_private *priv,
  563. struct drm_device *ddev, struct device *dev,
  564. struct platform_device *pdev)
  565. {
  566. int ret;
  567. struct msm_kms *kms;
  568. switch (get_mdp_ver(pdev)) {
  569. case KMS_MDP4:
  570. kms = mdp4_kms_init(ddev);
  571. break;
  572. case KMS_MDP5:
  573. kms = mdp5_kms_init(ddev);
  574. break;
  575. case KMS_SDE:
  576. kms = sde_kms_init(ddev);
  577. break;
  578. default:
  579. kms = ERR_PTR(-ENODEV);
  580. break;
  581. }
  582. if (IS_ERR_OR_NULL(kms)) {
  583. /*
  584. * NOTE: once we have GPU support, having no kms should not
  585. * be considered fatal.. ideally we would still support gpu
  586. * and (for example) use dmabuf/prime to share buffers with
  587. * imx drm driver on iMX5
  588. */
  589. dev_err(dev, "failed to load kms\n");
  590. return kms;
  591. }
  592. priv->kms = kms;
  593. pm_runtime_enable(dev);
  594. /**
  595. * Since kms->funcs->hw_init(kms) might call
  596. * drm_object_property_set_value to initialize some custom
  597. * properties we need to make sure mode_config.funcs are populated
  598. * beforehand to avoid dereferencing an unset value during the
  599. * drm_drv_uses_atomic_modeset check.
  600. */
  601. ddev->mode_config.funcs = &mode_config_funcs;
  602. ret = (kms)->funcs->hw_init(kms);
  603. if (ret) {
  604. dev_err(dev, "kms hw init failed: %d\n", ret);
  605. return ERR_PTR(ret);
  606. }
  607. return kms;
  608. }
  609. static int msm_drm_device_init(struct platform_device *pdev,
  610. struct drm_driver *drv)
  611. {
  612. struct device *dev = &pdev->dev;
  613. struct drm_device *ddev;
  614. struct msm_drm_private *priv;
  615. int i, ret;
  616. ddev = drm_dev_alloc(drv, dev);
  617. if (IS_ERR(ddev)) {
  618. dev_err(dev, "failed to allocate drm_device\n");
  619. return PTR_ERR(ddev);
  620. }
  621. drm_mode_config_init(ddev);
  622. platform_set_drvdata(pdev, ddev);
  623. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  624. if (!priv) {
  625. ret = -ENOMEM;
  626. goto priv_alloc_fail;
  627. }
  628. ddev->dev_private = priv;
  629. priv->dev = ddev;
  630. ret = sde_power_resource_init(pdev, &priv->phandle);
  631. if (ret) {
  632. pr_err("sde power resource init failed\n");
  633. goto power_init_fail;
  634. }
  635. ret = sde_dbg_init(&pdev->dev);
  636. if (ret) {
  637. dev_err(dev, "failed to init sde dbg: %d\n", ret);
  638. goto dbg_init_fail;
  639. }
  640. for (i = 0; i < SDE_POWER_HANDLE_DBUS_ID_MAX; i++)
  641. sde_power_data_bus_set_quota(&priv->phandle, i,
  642. SDE_POWER_HANDLE_CONT_SPLASH_BUS_AB_QUOTA,
  643. SDE_POWER_HANDLE_CONT_SPLASH_BUS_IB_QUOTA);
  644. return ret;
  645. dbg_init_fail:
  646. sde_power_resource_deinit(pdev, &priv->phandle);
  647. power_init_fail:
  648. priv_alloc_fail:
  649. drm_dev_put(ddev);
  650. kfree(priv);
  651. return ret;
  652. }
  653. static int msm_drm_component_init(struct device *dev)
  654. {
  655. struct platform_device *pdev = to_platform_device(dev);
  656. struct drm_device *ddev = platform_get_drvdata(pdev);
  657. struct msm_drm_private *priv = ddev->dev_private;
  658. struct msm_kms *kms = NULL;
  659. int ret;
  660. struct sched_param param = { 0 };
  661. struct drm_crtc *crtc;
  662. ret = msm_mdss_init(ddev);
  663. if (ret)
  664. goto mdss_init_fail;
  665. priv->wq = alloc_ordered_workqueue("msm_drm", 0);
  666. init_waitqueue_head(&priv->pending_crtcs_event);
  667. INIT_LIST_HEAD(&priv->client_event_list);
  668. INIT_LIST_HEAD(&priv->inactive_list);
  669. /* Bind all our sub-components: */
  670. ret = msm_component_bind_all(dev, ddev);
  671. if (ret)
  672. goto bind_fail;
  673. ret = msm_init_vram(ddev);
  674. if (ret)
  675. goto fail;
  676. ddev->mode_config.funcs = &mode_config_funcs;
  677. ddev->mode_config.helper_private = &mode_config_helper_funcs;
  678. kms = _msm_drm_component_init_helper(priv, ddev, dev, pdev);
  679. if (IS_ERR_OR_NULL(kms)) {
  680. dev_err(dev, "msm_drm_component_init_helper failed\n");
  681. goto fail;
  682. }
  683. ret = msm_drm_display_thread_create(param, priv, ddev, dev);
  684. if (ret) {
  685. dev_err(dev, "msm_drm_display_thread_create failed\n");
  686. goto fail;
  687. }
  688. ret = drm_vblank_init(ddev, priv->num_crtcs);
  689. if (ret < 0) {
  690. dev_err(dev, "failed to initialize vblank\n");
  691. goto fail;
  692. }
  693. drm_for_each_crtc(crtc, ddev)
  694. drm_crtc_vblank_reset(crtc);
  695. if (kms) {
  696. pm_runtime_get_sync(dev);
  697. ret = drm_irq_install(ddev, platform_get_irq(pdev, 0));
  698. pm_runtime_put_sync(dev);
  699. if (ret < 0) {
  700. dev_err(dev, "failed to install IRQ handler\n");
  701. goto fail;
  702. }
  703. }
  704. ret = drm_dev_register(ddev, 0);
  705. if (ret)
  706. goto fail;
  707. priv->registered = true;
  708. drm_mode_config_reset(ddev);
  709. if (kms && kms->funcs && kms->funcs->cont_splash_config) {
  710. ret = kms->funcs->cont_splash_config(kms);
  711. if (ret) {
  712. dev_err(dev, "kms cont_splash config failed.\n");
  713. goto fail;
  714. }
  715. }
  716. #ifdef CONFIG_DRM_FBDEV_EMULATION
  717. if (fbdev)
  718. priv->fbdev = msm_fbdev_init(ddev);
  719. #endif
  720. /* create drm client only when fbdev is not supported */
  721. if (!priv->fbdev) {
  722. ret = drm_client_init(ddev, &kms->client, "kms_client", NULL);
  723. if (ret) {
  724. DRM_ERROR("failed to init kms_client: %d\n", ret);
  725. kms->client.dev = NULL;
  726. goto fail;
  727. }
  728. drm_client_register(&kms->client);
  729. }
  730. priv->debug_root = debugfs_create_dir("debug",
  731. ddev->primary->debugfs_root);
  732. if (IS_ERR_OR_NULL(priv->debug_root)) {
  733. pr_err("debugfs_root create_dir fail, error %ld\n",
  734. PTR_ERR(priv->debug_root));
  735. priv->debug_root = NULL;
  736. goto fail;
  737. }
  738. ret = sde_dbg_debugfs_register(priv->debug_root);
  739. if (ret) {
  740. dev_err(dev, "failed to reg sde dbg debugfs: %d\n", ret);
  741. goto fail;
  742. }
  743. /* perform subdriver post initialization */
  744. if (kms && kms->funcs && kms->funcs->postinit) {
  745. ret = kms->funcs->postinit(kms);
  746. if (ret) {
  747. pr_err("kms post init failed: %d\n", ret);
  748. goto fail;
  749. }
  750. }
  751. drm_kms_helper_poll_init(ddev);
  752. return 0;
  753. fail:
  754. msm_drm_uninit(dev);
  755. return ret;
  756. bind_fail:
  757. msm_mdss_destroy(ddev);
  758. mdss_init_fail:
  759. sde_dbg_destroy();
  760. sde_power_resource_deinit(pdev, &priv->phandle);
  761. drm_dev_put(ddev);
  762. kfree(priv);
  763. return ret;
  764. }
  765. /*
  766. * DRM operations:
  767. */
  768. static int context_init(struct drm_device *dev, struct drm_file *file)
  769. {
  770. struct msm_file_private *ctx;
  771. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  772. if (!ctx)
  773. return -ENOMEM;
  774. mutex_init(&ctx->power_lock);
  775. file->driver_priv = ctx;
  776. if (dev && dev->dev_private) {
  777. struct msm_drm_private *priv = dev->dev_private;
  778. struct msm_kms *kms;
  779. kms = priv->kms;
  780. if (kms && kms->funcs && kms->funcs->postopen)
  781. kms->funcs->postopen(kms, file);
  782. }
  783. return 0;
  784. }
  785. static int msm_open(struct drm_device *dev, struct drm_file *file)
  786. {
  787. return context_init(dev, file);
  788. }
  789. static void context_close(struct msm_file_private *ctx)
  790. {
  791. kfree(ctx);
  792. }
  793. static void msm_postclose(struct drm_device *dev, struct drm_file *file)
  794. {
  795. struct msm_drm_private *priv = dev->dev_private;
  796. struct msm_file_private *ctx = file->driver_priv;
  797. struct msm_kms *kms = priv->kms;
  798. if (kms && kms->funcs && kms->funcs->postclose)
  799. kms->funcs->postclose(kms, file);
  800. mutex_lock(&dev->struct_mutex);
  801. if (ctx == priv->lastctx)
  802. priv->lastctx = NULL;
  803. mutex_unlock(&dev->struct_mutex);
  804. mutex_lock(&ctx->power_lock);
  805. if (ctx->enable_refcnt) {
  806. SDE_EVT32(ctx->enable_refcnt);
  807. pm_runtime_put_sync(dev->dev);
  808. }
  809. mutex_unlock(&ctx->power_lock);
  810. context_close(ctx);
  811. }
  812. static void msm_lastclose(struct drm_device *dev)
  813. {
  814. struct msm_drm_private *priv = dev->dev_private;
  815. struct msm_kms *kms = priv->kms;
  816. int i, rc;
  817. /* check for splash status before triggering cleanup
  818. * if we end up here with splash status ON i.e before first
  819. * commit then ignore the last close call
  820. */
  821. if (kms && kms->funcs && kms->funcs->check_for_splash
  822. && kms->funcs->check_for_splash(kms))
  823. return;
  824. /*
  825. * clean up vblank disable immediately as this is the last close.
  826. */
  827. for (i = 0; i < dev->num_crtcs; i++) {
  828. struct drm_vblank_crtc *vblank = &dev->vblank[i];
  829. struct timer_list *disable_timer = &vblank->disable_timer;
  830. if (del_timer_sync(disable_timer))
  831. disable_timer->function(disable_timer);
  832. }
  833. /* wait for pending vblank requests to be executed by worker thread */
  834. flush_workqueue(priv->wq);
  835. if (priv->fbdev) {
  836. rc = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
  837. if (rc)
  838. DRM_ERROR("restore FBDEV mode failed: %d\n", rc);
  839. } else if (kms && kms->client.dev) {
  840. rc = drm_client_modeset_commit_force(&kms->client);
  841. if (rc)
  842. DRM_ERROR("client modeset commit failed: %d\n", rc);
  843. }
  844. if (kms && kms->funcs && kms->funcs->lastclose)
  845. kms->funcs->lastclose(kms);
  846. }
  847. static irqreturn_t msm_irq(int irq, void *arg)
  848. {
  849. struct drm_device *dev = arg;
  850. struct msm_drm_private *priv = dev->dev_private;
  851. struct msm_kms *kms = priv->kms;
  852. BUG_ON(!kms);
  853. return kms->funcs->irq(kms);
  854. }
  855. static void msm_irq_preinstall(struct drm_device *dev)
  856. {
  857. struct msm_drm_private *priv = dev->dev_private;
  858. struct msm_kms *kms = priv->kms;
  859. BUG_ON(!kms);
  860. kms->funcs->irq_preinstall(kms);
  861. }
  862. static int msm_irq_postinstall(struct drm_device *dev)
  863. {
  864. struct msm_drm_private *priv = dev->dev_private;
  865. struct msm_kms *kms = priv->kms;
  866. BUG_ON(!kms);
  867. if (kms->funcs->irq_postinstall)
  868. return kms->funcs->irq_postinstall(kms);
  869. return 0;
  870. }
  871. static void msm_irq_uninstall(struct drm_device *dev)
  872. {
  873. struct msm_drm_private *priv = dev->dev_private;
  874. struct msm_kms *kms = priv->kms;
  875. BUG_ON(!kms);
  876. kms->funcs->irq_uninstall(kms);
  877. }
  878. static int msm_enable_vblank(struct drm_device *dev, unsigned int pipe)
  879. {
  880. struct msm_drm_private *priv = dev->dev_private;
  881. struct msm_kms *kms = priv->kms;
  882. if (!kms)
  883. return -ENXIO;
  884. DBG("dev=%pK, crtc=%u", dev, pipe);
  885. return vblank_ctrl_queue_work(priv, pipe, true);
  886. }
  887. static void msm_disable_vblank(struct drm_device *dev, unsigned int pipe)
  888. {
  889. struct msm_drm_private *priv = dev->dev_private;
  890. struct msm_kms *kms = priv->kms;
  891. if (!kms)
  892. return;
  893. DBG("dev=%pK, crtc=%u", dev, pipe);
  894. vblank_ctrl_queue_work(priv, pipe, false);
  895. }
  896. /*
  897. * DRM ioctls:
  898. */
  899. static int msm_ioctl_gem_new(struct drm_device *dev, void *data,
  900. struct drm_file *file)
  901. {
  902. struct drm_msm_gem_new *args = data;
  903. if (args->flags & ~MSM_BO_FLAGS) {
  904. DRM_ERROR("invalid flags: %08x\n", args->flags);
  905. return -EINVAL;
  906. }
  907. return msm_gem_new_handle(dev, file, args->size,
  908. args->flags, &args->handle, NULL);
  909. }
  910. static inline ktime_t to_ktime(struct drm_msm_timespec timeout)
  911. {
  912. return ktime_set(timeout.tv_sec, timeout.tv_nsec);
  913. }
  914. static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
  915. struct drm_file *file)
  916. {
  917. struct drm_msm_gem_cpu_prep *args = data;
  918. struct drm_gem_object *obj;
  919. ktime_t timeout = to_ktime(args->timeout);
  920. int ret;
  921. if (args->op & ~MSM_PREP_FLAGS) {
  922. DRM_ERROR("invalid op: %08x\n", args->op);
  923. return -EINVAL;
  924. }
  925. obj = drm_gem_object_lookup(file, args->handle);
  926. if (!obj)
  927. return -ENOENT;
  928. ret = msm_gem_cpu_prep(obj, args->op, &timeout);
  929. drm_gem_object_put_unlocked(obj);
  930. return ret;
  931. }
  932. static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
  933. struct drm_file *file)
  934. {
  935. struct drm_msm_gem_cpu_fini *args = data;
  936. struct drm_gem_object *obj;
  937. int ret;
  938. obj = drm_gem_object_lookup(file, args->handle);
  939. if (!obj)
  940. return -ENOENT;
  941. ret = msm_gem_cpu_fini(obj);
  942. drm_gem_object_put_unlocked(obj);
  943. return ret;
  944. }
  945. static int msm_ioctl_gem_madvise(struct drm_device *dev, void *data,
  946. struct drm_file *file)
  947. {
  948. struct drm_msm_gem_madvise *args = data;
  949. struct drm_gem_object *obj;
  950. int ret;
  951. switch (args->madv) {
  952. case MSM_MADV_DONTNEED:
  953. case MSM_MADV_WILLNEED:
  954. break;
  955. default:
  956. return -EINVAL;
  957. }
  958. ret = mutex_lock_interruptible(&dev->struct_mutex);
  959. if (ret)
  960. return ret;
  961. obj = drm_gem_object_lookup(file, args->handle);
  962. if (!obj) {
  963. ret = -ENOENT;
  964. goto unlock;
  965. }
  966. ret = msm_gem_madvise(obj, args->madv);
  967. if (ret >= 0) {
  968. args->retained = ret;
  969. ret = 0;
  970. }
  971. drm_gem_object_put(obj);
  972. unlock:
  973. mutex_unlock(&dev->struct_mutex);
  974. return ret;
  975. }
  976. static int msm_drm_object_supports_event(struct drm_device *dev,
  977. struct drm_msm_event_req *req)
  978. {
  979. int ret = -EINVAL;
  980. struct drm_mode_object *arg_obj;
  981. arg_obj = drm_mode_object_find(dev, NULL, req->object_id,
  982. req->object_type);
  983. if (!arg_obj)
  984. return -ENOENT;
  985. switch (arg_obj->type) {
  986. case DRM_MODE_OBJECT_CRTC:
  987. case DRM_MODE_OBJECT_CONNECTOR:
  988. ret = 0;
  989. break;
  990. default:
  991. ret = -EOPNOTSUPP;
  992. break;
  993. }
  994. drm_mode_object_put(arg_obj);
  995. return ret;
  996. }
  997. static int msm_register_event(struct drm_device *dev,
  998. struct drm_msm_event_req *req, struct drm_file *file, bool en)
  999. {
  1000. int ret = -EINVAL;
  1001. struct msm_drm_private *priv = dev->dev_private;
  1002. struct msm_kms *kms = priv->kms;
  1003. struct drm_mode_object *arg_obj;
  1004. arg_obj = drm_mode_object_find(dev, file, req->object_id,
  1005. req->object_type);
  1006. if (!arg_obj)
  1007. return -ENOENT;
  1008. ret = kms->funcs->register_events(kms, arg_obj, req->event, en);
  1009. drm_mode_object_put(arg_obj);
  1010. return ret;
  1011. }
  1012. static int msm_event_client_count(struct drm_device *dev,
  1013. struct drm_msm_event_req *req_event, bool locked)
  1014. {
  1015. struct msm_drm_private *priv = dev->dev_private;
  1016. unsigned long flag = 0;
  1017. struct msm_drm_event *node;
  1018. int count = 0;
  1019. if (!locked)
  1020. spin_lock_irqsave(&dev->event_lock, flag);
  1021. list_for_each_entry(node, &priv->client_event_list, base.link) {
  1022. if (node->event.base.type == req_event->event &&
  1023. node->event.info.object_id == req_event->object_id)
  1024. count++;
  1025. }
  1026. if (!locked)
  1027. spin_unlock_irqrestore(&dev->event_lock, flag);
  1028. return count;
  1029. }
  1030. static int msm_ioctl_register_event(struct drm_device *dev, void *data,
  1031. struct drm_file *file)
  1032. {
  1033. struct msm_drm_private *priv = dev->dev_private;
  1034. struct drm_msm_event_req *req_event = data;
  1035. struct msm_drm_event *client, *node;
  1036. unsigned long flag = 0;
  1037. bool dup_request = false;
  1038. int ret = 0, count = 0;
  1039. ret = msm_drm_object_supports_event(dev, req_event);
  1040. if (ret) {
  1041. DRM_ERROR("unsupported event %x object %x object id %d\n",
  1042. req_event->event, req_event->object_type,
  1043. req_event->object_id);
  1044. return ret;
  1045. }
  1046. spin_lock_irqsave(&dev->event_lock, flag);
  1047. list_for_each_entry(node, &priv->client_event_list, base.link) {
  1048. if (node->base.file_priv != file)
  1049. continue;
  1050. if (node->event.base.type == req_event->event &&
  1051. node->event.info.object_id == req_event->object_id) {
  1052. DRM_DEBUG("duplicate request for event %x obj id %d\n",
  1053. node->event.base.type,
  1054. node->event.info.object_id);
  1055. dup_request = true;
  1056. break;
  1057. }
  1058. }
  1059. spin_unlock_irqrestore(&dev->event_lock, flag);
  1060. if (dup_request)
  1061. return -EALREADY;
  1062. client = kzalloc(sizeof(*client), GFP_KERNEL);
  1063. if (!client)
  1064. return -ENOMEM;
  1065. client->base.file_priv = file;
  1066. client->base.event = &client->event.base;
  1067. client->event.base.type = req_event->event;
  1068. memcpy(&client->event.info, req_event, sizeof(client->event.info));
  1069. /* Get the count of clients that have registered for event.
  1070. * Event should be enabled for first client, for subsequent enable
  1071. * calls add to client list and return.
  1072. */
  1073. count = msm_event_client_count(dev, req_event, false);
  1074. /* Add current client to list */
  1075. spin_lock_irqsave(&dev->event_lock, flag);
  1076. list_add_tail(&client->base.link, &priv->client_event_list);
  1077. spin_unlock_irqrestore(&dev->event_lock, flag);
  1078. if (count)
  1079. return 0;
  1080. ret = msm_register_event(dev, req_event, file, true);
  1081. if (ret) {
  1082. DRM_ERROR("failed to enable event %x object %x object id %d\n",
  1083. req_event->event, req_event->object_type,
  1084. req_event->object_id);
  1085. spin_lock_irqsave(&dev->event_lock, flag);
  1086. list_del(&client->base.link);
  1087. spin_unlock_irqrestore(&dev->event_lock, flag);
  1088. kfree(client);
  1089. }
  1090. return ret;
  1091. }
  1092. static int msm_ioctl_deregister_event(struct drm_device *dev, void *data,
  1093. struct drm_file *file)
  1094. {
  1095. struct msm_drm_private *priv = dev->dev_private;
  1096. struct drm_msm_event_req *req_event = data;
  1097. struct msm_drm_event *client = NULL, *node, *temp;
  1098. unsigned long flag = 0;
  1099. int count = 0;
  1100. bool found = false;
  1101. int ret = 0;
  1102. ret = msm_drm_object_supports_event(dev, req_event);
  1103. if (ret) {
  1104. DRM_ERROR("unsupported event %x object %x object id %d\n",
  1105. req_event->event, req_event->object_type,
  1106. req_event->object_id);
  1107. return ret;
  1108. }
  1109. spin_lock_irqsave(&dev->event_lock, flag);
  1110. list_for_each_entry_safe(node, temp, &priv->client_event_list,
  1111. base.link) {
  1112. if (node->event.base.type == req_event->event &&
  1113. node->event.info.object_id == req_event->object_id &&
  1114. node->base.file_priv == file) {
  1115. client = node;
  1116. list_del(&client->base.link);
  1117. found = true;
  1118. kfree(client);
  1119. break;
  1120. }
  1121. }
  1122. spin_unlock_irqrestore(&dev->event_lock, flag);
  1123. if (!found)
  1124. return -ENOENT;
  1125. count = msm_event_client_count(dev, req_event, false);
  1126. if (!count)
  1127. ret = msm_register_event(dev, req_event, file, false);
  1128. return ret;
  1129. }
  1130. void msm_mode_object_event_notify(struct drm_mode_object *obj,
  1131. struct drm_device *dev, struct drm_event *event, u8 *payload)
  1132. {
  1133. struct msm_drm_private *priv = NULL;
  1134. unsigned long flags;
  1135. struct msm_drm_event *notify, *node;
  1136. int len = 0, ret;
  1137. if (!obj || !event || !event->length || !payload) {
  1138. DRM_ERROR("err param obj %pK event %pK len %d payload %pK\n",
  1139. obj, event, ((event) ? (event->length) : -1),
  1140. payload);
  1141. return;
  1142. }
  1143. priv = (dev) ? dev->dev_private : NULL;
  1144. if (!dev || !priv) {
  1145. DRM_ERROR("invalid dev %pK priv %pK\n", dev, priv);
  1146. return;
  1147. }
  1148. spin_lock_irqsave(&dev->event_lock, flags);
  1149. list_for_each_entry(node, &priv->client_event_list, base.link) {
  1150. if (node->event.base.type != event->type ||
  1151. obj->id != node->event.info.object_id)
  1152. continue;
  1153. len = event->length + sizeof(struct msm_drm_event);
  1154. if (node->base.file_priv->event_space < len) {
  1155. DRM_ERROR("Insufficient space %d for event %x len %d\n",
  1156. node->base.file_priv->event_space, event->type,
  1157. len);
  1158. continue;
  1159. }
  1160. notify = kzalloc(len, GFP_ATOMIC);
  1161. if (!notify)
  1162. continue;
  1163. notify->base.file_priv = node->base.file_priv;
  1164. notify->base.event = &notify->event.base;
  1165. notify->event.base.type = node->event.base.type;
  1166. notify->event.base.length = event->length +
  1167. sizeof(struct drm_msm_event_resp);
  1168. memcpy(&notify->event.info, &node->event.info,
  1169. sizeof(notify->event.info));
  1170. memcpy(notify->event.data, payload, event->length);
  1171. ret = drm_event_reserve_init_locked(dev, node->base.file_priv,
  1172. &notify->base, &notify->event.base);
  1173. if (ret) {
  1174. kfree(notify);
  1175. continue;
  1176. }
  1177. drm_send_event_locked(dev, &notify->base);
  1178. }
  1179. spin_unlock_irqrestore(&dev->event_lock, flags);
  1180. }
  1181. static int msm_release(struct inode *inode, struct file *filp)
  1182. {
  1183. struct drm_file *file_priv = filp->private_data;
  1184. struct drm_minor *minor = file_priv->minor;
  1185. struct drm_device *dev = minor->dev;
  1186. struct msm_drm_private *priv = dev->dev_private;
  1187. struct msm_drm_event *node, *temp, *tmp_node;
  1188. u32 count;
  1189. unsigned long flags;
  1190. LIST_HEAD(tmp_head);
  1191. spin_lock_irqsave(&dev->event_lock, flags);
  1192. list_for_each_entry_safe(node, temp, &priv->client_event_list,
  1193. base.link) {
  1194. if (node->base.file_priv != file_priv)
  1195. continue;
  1196. list_del(&node->base.link);
  1197. list_add_tail(&node->base.link, &tmp_head);
  1198. }
  1199. spin_unlock_irqrestore(&dev->event_lock, flags);
  1200. list_for_each_entry_safe(node, temp, &tmp_head,
  1201. base.link) {
  1202. list_del(&node->base.link);
  1203. count = msm_event_client_count(dev, &node->event.info, false);
  1204. list_for_each_entry(tmp_node, &tmp_head, base.link) {
  1205. if (tmp_node->event.base.type ==
  1206. node->event.info.event &&
  1207. tmp_node->event.info.object_id ==
  1208. node->event.info.object_id)
  1209. count++;
  1210. }
  1211. if (!count)
  1212. msm_register_event(dev, &node->event.info, file_priv,
  1213. false);
  1214. kfree(node);
  1215. }
  1216. return drm_release(inode, filp);
  1217. }
  1218. /**
  1219. * msm_ioctl_rmfb2 - remove an FB from the configuration
  1220. * @dev: drm device for the ioctl
  1221. * @data: data pointer for the ioctl
  1222. * @file_priv: drm file for the ioctl call
  1223. *
  1224. * Remove the FB specified by the user.
  1225. *
  1226. * Called by the user via ioctl.
  1227. *
  1228. * Returns:
  1229. * Zero on success, negative errno on failure.
  1230. */
  1231. int msm_ioctl_rmfb2(struct drm_device *dev, void *data,
  1232. struct drm_file *file_priv)
  1233. {
  1234. struct drm_framebuffer *fb = NULL;
  1235. struct drm_framebuffer *fbl = NULL;
  1236. uint32_t *id = data;
  1237. int found = 0;
  1238. if (!drm_core_check_feature(dev, DRIVER_MODESET))
  1239. return -EINVAL;
  1240. fb = drm_framebuffer_lookup(dev, file_priv, *id);
  1241. if (!fb)
  1242. return -ENOENT;
  1243. /* drop extra ref from traversing drm_framebuffer_lookup */
  1244. drm_framebuffer_put(fb);
  1245. mutex_lock(&file_priv->fbs_lock);
  1246. list_for_each_entry(fbl, &file_priv->fbs, filp_head)
  1247. if (fb == fbl)
  1248. found = 1;
  1249. if (!found) {
  1250. mutex_unlock(&file_priv->fbs_lock);
  1251. return -ENOENT;
  1252. }
  1253. list_del_init(&fb->filp_head);
  1254. mutex_unlock(&file_priv->fbs_lock);
  1255. drm_framebuffer_put(fb);
  1256. return 0;
  1257. }
  1258. EXPORT_SYMBOL(msm_ioctl_rmfb2);
  1259. /**
  1260. * msm_ioctl_power_ctrl - enable/disable power vote on MDSS Hw
  1261. * @dev: drm device for the ioctl
  1262. * @data: data pointer for the ioctl
  1263. * @file_priv: drm file for the ioctl call
  1264. *
  1265. */
  1266. int msm_ioctl_power_ctrl(struct drm_device *dev, void *data,
  1267. struct drm_file *file_priv)
  1268. {
  1269. struct msm_file_private *ctx = file_priv->driver_priv;
  1270. struct msm_drm_private *priv;
  1271. struct drm_msm_power_ctrl *power_ctrl = data;
  1272. bool vote_req = false;
  1273. int old_cnt;
  1274. int rc = 0;
  1275. if (unlikely(!power_ctrl)) {
  1276. DRM_ERROR("invalid ioctl data\n");
  1277. return -EINVAL;
  1278. }
  1279. priv = dev->dev_private;
  1280. mutex_lock(&ctx->power_lock);
  1281. old_cnt = ctx->enable_refcnt;
  1282. if (power_ctrl->enable) {
  1283. if (!ctx->enable_refcnt)
  1284. vote_req = true;
  1285. ctx->enable_refcnt++;
  1286. } else if (ctx->enable_refcnt) {
  1287. ctx->enable_refcnt--;
  1288. if (!ctx->enable_refcnt)
  1289. vote_req = true;
  1290. } else {
  1291. pr_err("ignoring, unbalanced disable\n");
  1292. }
  1293. if (vote_req) {
  1294. if (power_ctrl->enable)
  1295. rc = pm_runtime_get_sync(dev->dev);
  1296. else
  1297. pm_runtime_put_sync(dev->dev);
  1298. if (rc < 0)
  1299. ctx->enable_refcnt = old_cnt;
  1300. else
  1301. rc = 0;
  1302. }
  1303. pr_debug("pid %d enable %d, refcnt %d, vote_req %d\n",
  1304. current->pid, power_ctrl->enable, ctx->enable_refcnt,
  1305. vote_req);
  1306. SDE_EVT32(current->pid, power_ctrl->enable, ctx->enable_refcnt,
  1307. vote_req);
  1308. mutex_unlock(&ctx->power_lock);
  1309. return rc;
  1310. }
  1311. static const struct drm_ioctl_desc msm_ioctls[] = {
  1312. DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_AUTH|DRM_RENDER_ALLOW),
  1313. DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
  1314. DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
  1315. DRM_IOCTL_DEF_DRV(MSM_GEM_MADVISE, msm_ioctl_gem_madvise, DRM_AUTH|DRM_RENDER_ALLOW),
  1316. DRM_IOCTL_DEF_DRV(SDE_WB_CONFIG, sde_wb_config, DRM_UNLOCKED|DRM_AUTH),
  1317. DRM_IOCTL_DEF_DRV(MSM_REGISTER_EVENT, msm_ioctl_register_event,
  1318. DRM_UNLOCKED),
  1319. DRM_IOCTL_DEF_DRV(MSM_DEREGISTER_EVENT, msm_ioctl_deregister_event,
  1320. DRM_UNLOCKED),
  1321. DRM_IOCTL_DEF_DRV(MSM_RMFB2, msm_ioctl_rmfb2, DRM_UNLOCKED),
  1322. DRM_IOCTL_DEF_DRV(MSM_POWER_CTRL, msm_ioctl_power_ctrl,
  1323. DRM_RENDER_ALLOW),
  1324. };
  1325. static const struct vm_operations_struct vm_ops = {
  1326. .fault = msm_gem_fault,
  1327. .open = drm_gem_vm_open,
  1328. .close = drm_gem_vm_close,
  1329. };
  1330. static const struct file_operations fops = {
  1331. .owner = THIS_MODULE,
  1332. .open = drm_open,
  1333. .release = msm_release,
  1334. .unlocked_ioctl = drm_ioctl,
  1335. .compat_ioctl = drm_compat_ioctl,
  1336. .poll = drm_poll,
  1337. .read = drm_read,
  1338. .llseek = no_llseek,
  1339. .mmap = msm_gem_mmap,
  1340. };
  1341. static struct drm_driver msm_driver = {
  1342. .driver_features = DRIVER_GEM |
  1343. DRIVER_RENDER |
  1344. DRIVER_ATOMIC |
  1345. DRIVER_MODESET,
  1346. .open = msm_open,
  1347. .postclose = msm_postclose,
  1348. .lastclose = msm_lastclose,
  1349. .irq_handler = msm_irq,
  1350. .irq_preinstall = msm_irq_preinstall,
  1351. .irq_postinstall = msm_irq_postinstall,
  1352. .irq_uninstall = msm_irq_uninstall,
  1353. .enable_vblank = msm_enable_vblank,
  1354. .disable_vblank = msm_disable_vblank,
  1355. .gem_free_object = msm_gem_free_object,
  1356. .gem_vm_ops = &vm_ops,
  1357. .dumb_create = msm_gem_dumb_create,
  1358. .dumb_map_offset = msm_gem_dumb_map_offset,
  1359. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  1360. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  1361. .gem_prime_export = drm_gem_prime_export,
  1362. .gem_prime_import = msm_gem_prime_import,
  1363. .gem_prime_pin = msm_gem_prime_pin,
  1364. .gem_prime_unpin = msm_gem_prime_unpin,
  1365. .gem_prime_get_sg_table = msm_gem_prime_get_sg_table,
  1366. .gem_prime_import_sg_table = msm_gem_prime_import_sg_table,
  1367. .gem_prime_vmap = msm_gem_prime_vmap,
  1368. .gem_prime_vunmap = msm_gem_prime_vunmap,
  1369. .gem_prime_mmap = msm_gem_prime_mmap,
  1370. .ioctls = msm_ioctls,
  1371. .num_ioctls = ARRAY_SIZE(msm_ioctls),
  1372. .fops = &fops,
  1373. .name = "msm_drm",
  1374. .desc = "MSM Snapdragon DRM",
  1375. .date = "20130625",
  1376. .major = MSM_VERSION_MAJOR,
  1377. .minor = MSM_VERSION_MINOR,
  1378. .patchlevel = MSM_VERSION_PATCHLEVEL,
  1379. };
  1380. #ifdef CONFIG_PM_SLEEP
  1381. static int msm_pm_suspend(struct device *dev)
  1382. {
  1383. struct drm_device *ddev;
  1384. struct msm_drm_private *priv;
  1385. struct msm_kms *kms;
  1386. if (!dev)
  1387. return -EINVAL;
  1388. ddev = dev_get_drvdata(dev);
  1389. if (!ddev || !ddev->dev_private)
  1390. return -EINVAL;
  1391. priv = ddev->dev_private;
  1392. kms = priv->kms;
  1393. if (kms && kms->funcs && kms->funcs->pm_suspend)
  1394. return kms->funcs->pm_suspend(dev);
  1395. /* disable hot-plug polling */
  1396. drm_kms_helper_poll_disable(ddev);
  1397. return 0;
  1398. }
  1399. static int msm_pm_resume(struct device *dev)
  1400. {
  1401. struct drm_device *ddev;
  1402. struct msm_drm_private *priv;
  1403. struct msm_kms *kms;
  1404. if (!dev)
  1405. return -EINVAL;
  1406. ddev = dev_get_drvdata(dev);
  1407. if (!ddev || !ddev->dev_private)
  1408. return -EINVAL;
  1409. priv = ddev->dev_private;
  1410. kms = priv->kms;
  1411. if (kms && kms->funcs && kms->funcs->pm_resume)
  1412. return kms->funcs->pm_resume(dev);
  1413. /* enable hot-plug polling */
  1414. drm_kms_helper_poll_enable(ddev);
  1415. return 0;
  1416. }
  1417. #endif
  1418. #ifdef CONFIG_PM
  1419. static int msm_runtime_suspend(struct device *dev)
  1420. {
  1421. struct drm_device *ddev = dev_get_drvdata(dev);
  1422. struct msm_drm_private *priv = ddev->dev_private;
  1423. DBG("");
  1424. if (priv->mdss)
  1425. msm_mdss_disable(priv->mdss);
  1426. else
  1427. sde_power_resource_enable(&priv->phandle, false);
  1428. return 0;
  1429. }
  1430. static int msm_runtime_resume(struct device *dev)
  1431. {
  1432. struct drm_device *ddev = dev_get_drvdata(dev);
  1433. struct msm_drm_private *priv = ddev->dev_private;
  1434. int ret;
  1435. DBG("");
  1436. if (priv->mdss)
  1437. ret = msm_mdss_enable(priv->mdss);
  1438. else
  1439. ret = sde_power_resource_enable(&priv->phandle, true);
  1440. return ret;
  1441. }
  1442. #endif
  1443. static const struct dev_pm_ops msm_pm_ops = {
  1444. SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
  1445. SET_RUNTIME_PM_OPS(msm_runtime_suspend, msm_runtime_resume, NULL)
  1446. };
  1447. /*
  1448. * Componentized driver support:
  1449. */
  1450. /*
  1451. * NOTE: duplication of the same code as exynos or imx (or probably any other).
  1452. * so probably some room for some helpers
  1453. */
  1454. static int compare_of(struct device *dev, void *data)
  1455. {
  1456. return dev->of_node == data;
  1457. }
  1458. /*
  1459. * Identify what components need to be added by parsing what remote-endpoints
  1460. * our MDP output ports are connected to. In the case of LVDS on MDP4, there
  1461. * is no external component that we need to add since LVDS is within MDP4
  1462. * itself.
  1463. */
  1464. static int add_components_mdp(struct device *mdp_dev,
  1465. struct component_match **matchptr)
  1466. {
  1467. struct device_node *np = mdp_dev->of_node;
  1468. struct device_node *ep_node;
  1469. struct device *master_dev;
  1470. /*
  1471. * on MDP4 based platforms, the MDP platform device is the component
  1472. * master that adds other display interface components to itself.
  1473. *
  1474. * on MDP5 based platforms, the MDSS platform device is the component
  1475. * master that adds MDP5 and other display interface components to
  1476. * itself.
  1477. */
  1478. if (of_device_is_compatible(np, "qcom,mdp4"))
  1479. master_dev = mdp_dev;
  1480. else
  1481. master_dev = mdp_dev->parent;
  1482. for_each_endpoint_of_node(np, ep_node) {
  1483. struct device_node *intf;
  1484. struct of_endpoint ep;
  1485. int ret;
  1486. ret = of_graph_parse_endpoint(ep_node, &ep);
  1487. if (ret) {
  1488. dev_err(mdp_dev, "unable to parse port endpoint\n");
  1489. of_node_put(ep_node);
  1490. return ret;
  1491. }
  1492. /*
  1493. * The LCDC/LVDS port on MDP4 is a speacial case where the
  1494. * remote-endpoint isn't a component that we need to add
  1495. */
  1496. if (of_device_is_compatible(np, "qcom,mdp4") &&
  1497. ep.port == 0)
  1498. continue;
  1499. /*
  1500. * It's okay if some of the ports don't have a remote endpoint
  1501. * specified. It just means that the port isn't connected to
  1502. * any external interface.
  1503. */
  1504. intf = of_graph_get_remote_port_parent(ep_node);
  1505. if (!intf)
  1506. continue;
  1507. if (of_device_is_available(intf))
  1508. drm_of_component_match_add(master_dev, matchptr,
  1509. compare_of, intf);
  1510. of_node_put(intf);
  1511. }
  1512. return 0;
  1513. }
  1514. static int compare_name_mdp(struct device *dev, void *data)
  1515. {
  1516. return (strnstr(dev_name(dev), "mdp", strlen("mdp")) != NULL);
  1517. }
  1518. static int add_display_components(struct device *dev,
  1519. struct component_match **matchptr)
  1520. {
  1521. struct device *mdp_dev = NULL;
  1522. struct device_node *node;
  1523. int ret;
  1524. if (of_device_is_compatible(dev->of_node, "qcom,sde-kms")) {
  1525. struct device_node *np = dev->of_node;
  1526. unsigned int i;
  1527. for (i = 0; ; i++) {
  1528. node = of_parse_phandle(np, "connectors", i);
  1529. if (!node)
  1530. break;
  1531. component_match_add(dev, matchptr, compare_of, node);
  1532. }
  1533. return 0;
  1534. }
  1535. /*
  1536. * MDP5 based devices don't have a flat hierarchy. There is a top level
  1537. * parent: MDSS, and children: MDP5, DSI, HDMI, eDP etc. Populate the
  1538. * children devices, find the MDP5 node, and then add the interfaces
  1539. * to our components list.
  1540. */
  1541. if (of_device_is_compatible(dev->of_node, "qcom,mdss")) {
  1542. ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
  1543. if (ret) {
  1544. dev_err(dev, "failed to populate children devices\n");
  1545. return ret;
  1546. }
  1547. mdp_dev = device_find_child(dev, NULL, compare_name_mdp);
  1548. if (!mdp_dev) {
  1549. dev_err(dev, "failed to find MDSS MDP node\n");
  1550. of_platform_depopulate(dev);
  1551. return -ENODEV;
  1552. }
  1553. put_device(mdp_dev);
  1554. /* add the MDP component itself */
  1555. component_match_add(dev, matchptr, compare_of,
  1556. mdp_dev->of_node);
  1557. } else {
  1558. /* MDP4 */
  1559. mdp_dev = dev;
  1560. }
  1561. ret = add_components_mdp(mdp_dev, matchptr);
  1562. if (ret)
  1563. of_platform_depopulate(dev);
  1564. return ret;
  1565. }
  1566. struct msm_gem_address_space *
  1567. msm_gem_smmu_address_space_get(struct drm_device *dev,
  1568. unsigned int domain)
  1569. {
  1570. struct msm_drm_private *priv = NULL;
  1571. struct msm_kms *kms;
  1572. const struct msm_kms_funcs *funcs;
  1573. if ((!dev) || (!dev->dev_private))
  1574. return NULL;
  1575. priv = dev->dev_private;
  1576. kms = priv->kms;
  1577. if (!kms)
  1578. return NULL;
  1579. funcs = kms->funcs;
  1580. if ((!funcs) || (!funcs->get_address_space))
  1581. return NULL;
  1582. return funcs->get_address_space(priv->kms, domain);
  1583. }
  1584. int msm_get_mixer_count(struct msm_drm_private *priv,
  1585. const struct drm_display_mode *mode,
  1586. const struct msm_resource_caps_info *res, u32 *num_lm)
  1587. {
  1588. struct msm_kms *kms;
  1589. const struct msm_kms_funcs *funcs;
  1590. if (!priv) {
  1591. DRM_ERROR("invalid drm private struct\n");
  1592. return -EINVAL;
  1593. }
  1594. kms = priv->kms;
  1595. if (!kms) {
  1596. DRM_ERROR("invalid msm kms struct\n");
  1597. return -EINVAL;
  1598. }
  1599. funcs = kms->funcs;
  1600. if (!funcs || !funcs->get_mixer_count) {
  1601. DRM_ERROR("invalid function pointers\n");
  1602. return -EINVAL;
  1603. }
  1604. return funcs->get_mixer_count(priv->kms, mode, res, num_lm);
  1605. }
  1606. static int msm_drm_bind(struct device *dev)
  1607. {
  1608. return msm_drm_component_init(dev);
  1609. }
  1610. static void msm_drm_unbind(struct device *dev)
  1611. {
  1612. msm_drm_uninit(dev);
  1613. }
  1614. static const struct component_master_ops msm_drm_ops = {
  1615. .bind = msm_drm_bind,
  1616. .unbind = msm_drm_unbind,
  1617. };
  1618. /*
  1619. * Platform driver:
  1620. */
  1621. static int msm_pdev_probe(struct platform_device *pdev)
  1622. {
  1623. int ret;
  1624. struct component_match *match = NULL;
  1625. ret = msm_drm_device_init(pdev, &msm_driver);
  1626. if (ret)
  1627. return ret;
  1628. ret = add_display_components(&pdev->dev, &match);
  1629. if (ret)
  1630. return ret;
  1631. if (!match)
  1632. return -ENODEV;
  1633. pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
  1634. return component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
  1635. }
  1636. static int msm_pdev_remove(struct platform_device *pdev)
  1637. {
  1638. component_master_del(&pdev->dev, &msm_drm_ops);
  1639. of_platform_depopulate(&pdev->dev);
  1640. msm_drm_unbind(&pdev->dev);
  1641. component_master_del(&pdev->dev, &msm_drm_ops);
  1642. return 0;
  1643. }
  1644. static void msm_pdev_shutdown(struct platform_device *pdev)
  1645. {
  1646. struct drm_device *ddev = platform_get_drvdata(pdev);
  1647. struct msm_drm_private *priv = NULL;
  1648. if (!ddev) {
  1649. DRM_ERROR("invalid drm device node\n");
  1650. return;
  1651. }
  1652. priv = ddev->dev_private;
  1653. if (!priv) {
  1654. DRM_ERROR("invalid msm drm private node\n");
  1655. return;
  1656. }
  1657. msm_lastclose(ddev);
  1658. /* set this after lastclose to allow kickoff from lastclose */
  1659. priv->shutdown_in_progress = true;
  1660. }
  1661. static const struct of_device_id dt_match[] = {
  1662. { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
  1663. { .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
  1664. { .compatible = "qcom,sde-kms", .data = (void *)KMS_SDE },
  1665. {},
  1666. };
  1667. MODULE_DEVICE_TABLE(of, dt_match);
  1668. static struct platform_driver msm_platform_driver = {
  1669. .probe = msm_pdev_probe,
  1670. .remove = msm_pdev_remove,
  1671. .shutdown = msm_pdev_shutdown,
  1672. .driver = {
  1673. .name = "msm_drm",
  1674. .of_match_table = dt_match,
  1675. .pm = &msm_pm_ops,
  1676. .suppress_bind_attrs = true,
  1677. },
  1678. };
  1679. static int __init msm_drm_register(void)
  1680. {
  1681. if (!modeset)
  1682. return -EINVAL;
  1683. DBG("init");
  1684. msm_smmu_driver_init();
  1685. msm_dsi_register();
  1686. msm_edp_register();
  1687. msm_hdmi_register();
  1688. return platform_driver_register(&msm_platform_driver);
  1689. }
  1690. static void __exit msm_drm_unregister(void)
  1691. {
  1692. DBG("fini");
  1693. platform_driver_unregister(&msm_platform_driver);
  1694. msm_hdmi_unregister();
  1695. msm_edp_unregister();
  1696. msm_dsi_unregister();
  1697. msm_smmu_driver_cleanup();
  1698. }
  1699. module_init(msm_drm_register);
  1700. module_exit(msm_drm_unregister);
  1701. MODULE_AUTHOR("Rob Clark <[email protected]");
  1702. MODULE_DESCRIPTION("MSM DRM Driver");
  1703. MODULE_LICENSE("GPL");