dp_rx.c 52 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830
  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #ifdef RX_DESC_DEBUG_CHECK
  31. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  32. {
  33. rx_desc->magic = DP_RX_DESC_MAGIC;
  34. rx_desc->nbuf = nbuf;
  35. }
  36. #else
  37. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  38. {
  39. rx_desc->nbuf = nbuf;
  40. }
  41. #endif
  42. #ifdef CONFIG_WIN
  43. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  44. {
  45. return vdev->ap_bridge_enabled;
  46. }
  47. #else
  48. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  49. {
  50. if (vdev->opmode != wlan_op_mode_sta)
  51. return true;
  52. else
  53. return false;
  54. }
  55. #endif
  56. /*
  57. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  58. * called during dp rx initialization
  59. * and at the end of dp_rx_process.
  60. *
  61. * @soc: core txrx main context
  62. * @mac_id: mac_id which is one of 3 mac_ids
  63. * @dp_rxdma_srng: dp rxdma circular ring
  64. * @rx_desc_pool: Pointer to free Rx descriptor pool
  65. * @num_req_buffers: number of buffer to be replenished
  66. * @desc_list: list of descs if called from dp_rx_process
  67. * or NULL during dp rx initialization or out of buffer
  68. * interrupt.
  69. * @tail: tail of descs list
  70. * Return: return success or failure
  71. */
  72. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  73. struct dp_srng *dp_rxdma_srng,
  74. struct rx_desc_pool *rx_desc_pool,
  75. uint32_t num_req_buffers,
  76. union dp_rx_desc_list_elem_t **desc_list,
  77. union dp_rx_desc_list_elem_t **tail)
  78. {
  79. uint32_t num_alloc_desc;
  80. uint16_t num_desc_to_free = 0;
  81. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  82. uint32_t num_entries_avail;
  83. uint32_t count;
  84. int sync_hw_ptr = 1;
  85. qdf_dma_addr_t paddr;
  86. qdf_nbuf_t rx_netbuf;
  87. void *rxdma_ring_entry;
  88. union dp_rx_desc_list_elem_t *next;
  89. QDF_STATUS ret;
  90. void *rxdma_srng;
  91. rxdma_srng = dp_rxdma_srng->hal_srng;
  92. if (!rxdma_srng) {
  93. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  94. "rxdma srng not initialized");
  95. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  96. return QDF_STATUS_E_FAILURE;
  97. }
  98. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  99. "requested %d buffers for replenish", num_req_buffers);
  100. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  101. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  102. rxdma_srng,
  103. sync_hw_ptr);
  104. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  105. "no of available entries in rxdma ring: %d",
  106. num_entries_avail);
  107. if (!(*desc_list) && (num_entries_avail >
  108. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  109. num_req_buffers = num_entries_avail;
  110. } else if (num_entries_avail < num_req_buffers) {
  111. num_desc_to_free = num_req_buffers - num_entries_avail;
  112. num_req_buffers = num_entries_avail;
  113. }
  114. if (qdf_unlikely(!num_req_buffers)) {
  115. num_desc_to_free = num_req_buffers;
  116. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  117. goto free_descs;
  118. }
  119. /*
  120. * if desc_list is NULL, allocate the descs from freelist
  121. */
  122. if (!(*desc_list)) {
  123. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  124. rx_desc_pool,
  125. num_req_buffers,
  126. desc_list,
  127. tail);
  128. if (!num_alloc_desc) {
  129. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  130. "no free rx_descs in freelist");
  131. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  132. num_req_buffers);
  133. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  134. return QDF_STATUS_E_NOMEM;
  135. }
  136. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  137. "%d rx desc allocated", num_alloc_desc);
  138. num_req_buffers = num_alloc_desc;
  139. }
  140. count = 0;
  141. while (count < num_req_buffers) {
  142. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  143. RX_BUFFER_SIZE,
  144. RX_BUFFER_RESERVATION,
  145. RX_BUFFER_ALIGNMENT,
  146. FALSE);
  147. if (rx_netbuf == NULL) {
  148. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  149. continue;
  150. }
  151. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  152. QDF_DMA_BIDIRECTIONAL);
  153. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  154. qdf_nbuf_free(rx_netbuf);
  155. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  156. continue;
  157. }
  158. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  159. /*
  160. * check if the physical address of nbuf->data is
  161. * less then 0x50000000 then free the nbuf and try
  162. * allocating new nbuf. We can try for 100 times.
  163. * this is a temp WAR till we fix it properly.
  164. */
  165. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  166. if (ret == QDF_STATUS_E_FAILURE) {
  167. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  168. break;
  169. }
  170. count++;
  171. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  172. rxdma_srng);
  173. qdf_assert_always(rxdma_ring_entry);
  174. next = (*desc_list)->next;
  175. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  176. (*desc_list)->rx_desc.in_use = 1;
  177. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  178. "rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  179. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  180. (unsigned long long)paddr, (*desc_list)->rx_desc.cookie);
  181. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  182. (*desc_list)->rx_desc.cookie,
  183. rx_desc_pool->owner);
  184. *desc_list = next;
  185. }
  186. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  187. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  188. "successfully replenished %d buffers", num_req_buffers);
  189. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  190. "%d rx desc added back to free list", num_desc_to_free);
  191. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, num_req_buffers,
  192. (RX_BUFFER_SIZE * num_req_buffers));
  193. free_descs:
  194. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  195. /*
  196. * add any available free desc back to the free list
  197. */
  198. if (*desc_list)
  199. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  200. mac_id, rx_desc_pool);
  201. return QDF_STATUS_SUCCESS;
  202. }
  203. /*
  204. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  205. * pkts to RAW mode simulation to
  206. * decapsulate the pkt.
  207. *
  208. * @vdev: vdev on which RAW mode is enabled
  209. * @nbuf_list: list of RAW pkts to process
  210. * @peer: peer object from which the pkt is rx
  211. *
  212. * Return: void
  213. */
  214. void
  215. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  216. struct dp_peer *peer)
  217. {
  218. qdf_nbuf_t deliver_list_head = NULL;
  219. qdf_nbuf_t deliver_list_tail = NULL;
  220. qdf_nbuf_t nbuf;
  221. nbuf = nbuf_list;
  222. while (nbuf) {
  223. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  224. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  225. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  226. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  227. /*
  228. * reset the chfrag_start and chfrag_end bits in nbuf cb
  229. * as this is a non-amsdu pkt and RAW mode simulation expects
  230. * these bit s to be 0 for non-amsdu pkt.
  231. */
  232. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  233. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  234. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  235. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  236. }
  237. nbuf = next;
  238. }
  239. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  240. &deliver_list_tail, (struct cdp_peer*) peer);
  241. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  242. }
  243. #ifdef DP_LFR
  244. /*
  245. * In case of LFR, data of a new peer might be sent up
  246. * even before peer is added.
  247. */
  248. static inline struct dp_vdev *
  249. dp_get_vdev_from_peer(struct dp_soc *soc,
  250. uint16_t peer_id,
  251. struct dp_peer *peer,
  252. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  253. {
  254. struct dp_vdev *vdev;
  255. uint8_t vdev_id;
  256. if (unlikely(!peer)) {
  257. if (peer_id != HTT_INVALID_PEER) {
  258. vdev_id = DP_PEER_METADATA_ID_GET(
  259. mpdu_desc_info.peer_meta_data);
  260. QDF_TRACE(QDF_MODULE_ID_DP,
  261. QDF_TRACE_LEVEL_DEBUG,
  262. FL("PeerID %d not found use vdevID %d"),
  263. peer_id, vdev_id);
  264. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  265. vdev_id);
  266. } else {
  267. QDF_TRACE(QDF_MODULE_ID_DP,
  268. QDF_TRACE_LEVEL_DEBUG,
  269. FL("Invalid PeerID %d"),
  270. peer_id);
  271. return NULL;
  272. }
  273. } else {
  274. vdev = peer->vdev;
  275. }
  276. return vdev;
  277. }
  278. #else
  279. static inline struct dp_vdev *
  280. dp_get_vdev_from_peer(struct dp_soc *soc,
  281. uint16_t peer_id,
  282. struct dp_peer *peer,
  283. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  284. {
  285. if (unlikely(!peer)) {
  286. QDF_TRACE(QDF_MODULE_ID_DP,
  287. QDF_TRACE_LEVEL_DEBUG,
  288. FL("Peer not found for peerID %d"),
  289. peer_id);
  290. return NULL;
  291. } else {
  292. return peer->vdev;
  293. }
  294. }
  295. #endif
  296. /**
  297. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  298. *
  299. * @soc: core txrx main context
  300. * @sa_peer : source peer entry
  301. * @rx_tlv_hdr : start address of rx tlvs
  302. * @nbuf : nbuf that has to be intrabss forwarded
  303. *
  304. * Return: bool: true if it is forwarded else false
  305. */
  306. static bool
  307. dp_rx_intrabss_fwd(struct dp_soc *soc,
  308. struct dp_peer *sa_peer,
  309. uint8_t *rx_tlv_hdr,
  310. qdf_nbuf_t nbuf)
  311. {
  312. uint16_t da_idx;
  313. uint16_t len;
  314. struct dp_peer *da_peer;
  315. struct dp_ast_entry *ast_entry;
  316. qdf_nbuf_t nbuf_copy;
  317. /* check if the destination peer is available in peer table
  318. * and also check if the source peer and destination peer
  319. * belong to the same vap and destination peer is not bss peer.
  320. */
  321. if ((hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr) &&
  322. !hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  323. da_idx = hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr);
  324. ast_entry = soc->ast_table[da_idx];
  325. if (!ast_entry)
  326. return false;
  327. da_peer = ast_entry->peer;
  328. if (!da_peer)
  329. return false;
  330. if (da_peer->vdev == sa_peer->vdev && !da_peer->bss_peer) {
  331. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  332. len = qdf_nbuf_len(nbuf);
  333. /* linearize the nbuf just before we send to
  334. * dp_tx_send()
  335. */
  336. if (qdf_unlikely(qdf_nbuf_get_ext_list(nbuf))) {
  337. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  338. return false;
  339. nbuf = qdf_nbuf_unshare(nbuf);
  340. if (!nbuf) {
  341. DP_STATS_INC_PKT(sa_peer,
  342. rx.intra_bss.fail,
  343. 1,
  344. len);
  345. /* return true even though the pkt is
  346. * not forwarded. Basically skb_unshare
  347. * failed and we want to continue with
  348. * next nbuf.
  349. */
  350. return true;
  351. }
  352. }
  353. if (!dp_tx_send(sa_peer->vdev, nbuf)) {
  354. DP_STATS_INC_PKT(sa_peer, rx.intra_bss.pkts,
  355. 1, len);
  356. return true;
  357. } else {
  358. DP_STATS_INC_PKT(sa_peer, rx.intra_bss.fail, 1,
  359. len);
  360. return false;
  361. }
  362. }
  363. }
  364. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  365. * source, then clone the pkt and send the cloned pkt for
  366. * intra BSS forwarding and original pkt up the network stack
  367. * Note: how do we handle multicast pkts. do we forward
  368. * all multicast pkts as is or let a higher layer module
  369. * like igmpsnoop decide whether to forward or not with
  370. * Mcast enhancement.
  371. */
  372. else if (qdf_unlikely((hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr) &&
  373. !sa_peer->bss_peer))) {
  374. nbuf_copy = qdf_nbuf_copy(nbuf);
  375. if (!nbuf_copy)
  376. return false;
  377. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  378. len = qdf_nbuf_len(nbuf_copy);
  379. if (dp_tx_send(sa_peer->vdev, nbuf_copy)) {
  380. DP_STATS_INC_PKT(sa_peer, rx.intra_bss.fail, 1, len);
  381. qdf_nbuf_free(nbuf_copy);
  382. } else
  383. DP_STATS_INC_PKT(sa_peer, rx.intra_bss.pkts, 1, len);
  384. }
  385. /* return false as we have to still send the original pkt
  386. * up the stack
  387. */
  388. return false;
  389. }
  390. #ifdef MESH_MODE_SUPPORT
  391. /**
  392. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  393. *
  394. * @vdev: DP Virtual device handle
  395. * @nbuf: Buffer pointer
  396. * @rx_tlv_hdr: start of rx tlv header
  397. * @peer: pointer to peer
  398. *
  399. * This function allocated memory for mesh receive stats and fill the
  400. * required stats. Stores the memory address in skb cb.
  401. *
  402. * Return: void
  403. */
  404. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  405. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  406. {
  407. struct mesh_recv_hdr_s *rx_info = NULL;
  408. uint32_t pkt_type;
  409. uint32_t nss;
  410. uint32_t rate_mcs;
  411. uint32_t bw;
  412. /* fill recv mesh stats */
  413. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  414. /* upper layers are resposible to free this memory */
  415. if (rx_info == NULL) {
  416. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  417. "Memory allocation failed for mesh rx stats");
  418. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  419. return;
  420. }
  421. rx_info->rs_flags = MESH_RXHDR_VER1;
  422. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  423. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  424. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  425. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  426. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  427. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  428. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  429. if (vdev->osif_get_key)
  430. vdev->osif_get_key(vdev->osif_vdev,
  431. &rx_info->rs_decryptkey[0],
  432. &peer->mac_addr.raw[0],
  433. rx_info->rs_keyix);
  434. }
  435. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  436. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  437. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  438. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  439. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  440. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  441. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  442. (bw << 24);
  443. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  444. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  445. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  446. rx_info->rs_flags,
  447. rx_info->rs_rssi,
  448. rx_info->rs_channel,
  449. rx_info->rs_ratephy1,
  450. rx_info->rs_keyix);
  451. }
  452. /**
  453. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  454. *
  455. * @vdev: DP Virtual device handle
  456. * @nbuf: Buffer pointer
  457. * @rx_tlv_hdr: start of rx tlv header
  458. *
  459. * This checks if the received packet is matching any filter out
  460. * catogery and and drop the packet if it matches.
  461. *
  462. * Return: status(0 indicates drop, 1 indicate to no drop)
  463. */
  464. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  465. uint8_t *rx_tlv_hdr)
  466. {
  467. union dp_align_mac_addr mac_addr;
  468. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  469. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  470. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  471. return QDF_STATUS_SUCCESS;
  472. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  473. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  474. return QDF_STATUS_SUCCESS;
  475. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  476. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  477. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  478. return QDF_STATUS_SUCCESS;
  479. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  480. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  481. &mac_addr.raw[0]))
  482. return QDF_STATUS_E_FAILURE;
  483. if (!qdf_mem_cmp(&mac_addr.raw[0],
  484. &vdev->mac_addr.raw[0],
  485. DP_MAC_ADDR_LEN))
  486. return QDF_STATUS_SUCCESS;
  487. }
  488. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  489. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  490. &mac_addr.raw[0]))
  491. return QDF_STATUS_E_FAILURE;
  492. if (!qdf_mem_cmp(&mac_addr.raw[0],
  493. &vdev->mac_addr.raw[0],
  494. DP_MAC_ADDR_LEN))
  495. return QDF_STATUS_SUCCESS;
  496. }
  497. }
  498. return QDF_STATUS_E_FAILURE;
  499. }
  500. #else
  501. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  502. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  503. {
  504. }
  505. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  506. uint8_t *rx_tlv_hdr)
  507. {
  508. return QDF_STATUS_E_FAILURE;
  509. }
  510. #endif
  511. #ifdef CONFIG_WIN
  512. /**
  513. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  514. * clients
  515. * @pdev: DP pdev handle
  516. * @rx_pkt_hdr: Rx packet Header
  517. *
  518. * return: dp_vdev*
  519. */
  520. static
  521. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  522. uint8_t *rx_pkt_hdr)
  523. {
  524. struct ieee80211_frame *wh;
  525. struct dp_neighbour_peer *peer = NULL;
  526. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  527. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  528. return NULL;
  529. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  530. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  531. neighbour_peer_list_elem) {
  532. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  533. wh->i_addr2, DP_MAC_ADDR_LEN) == 0) {
  534. QDF_TRACE(
  535. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  536. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  537. peer->neighbour_peers_macaddr.raw[0],
  538. peer->neighbour_peers_macaddr.raw[1],
  539. peer->neighbour_peers_macaddr.raw[2],
  540. peer->neighbour_peers_macaddr.raw[3],
  541. peer->neighbour_peers_macaddr.raw[4],
  542. peer->neighbour_peers_macaddr.raw[5]);
  543. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  544. return pdev->monitor_vdev;
  545. }
  546. }
  547. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  548. return NULL;
  549. }
  550. /**
  551. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  552. * @soc: DP SOC handle
  553. * @mpdu: mpdu for which peer is invalid
  554. *
  555. * return: integer type
  556. */
  557. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu)
  558. {
  559. struct dp_invalid_peer_msg msg;
  560. struct dp_vdev *vdev = NULL;
  561. struct dp_pdev *pdev = NULL;
  562. struct ieee80211_frame *wh;
  563. uint8_t i;
  564. qdf_nbuf_t curr_nbuf, next_nbuf;
  565. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  566. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  567. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  568. if (!DP_FRAME_IS_DATA(wh)) {
  569. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  570. "NAWDS valid only for data frames");
  571. goto free;
  572. }
  573. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  574. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  575. "Invalid nbuf length");
  576. goto free;
  577. }
  578. for (i = 0; i < MAX_PDEV_CNT; i++) {
  579. pdev = soc->pdev_list[i];
  580. if (!pdev) {
  581. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  582. "PDEV not found");
  583. continue;
  584. }
  585. if (pdev->filter_neighbour_peers) {
  586. /* Next Hop scenario not yet handle */
  587. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  588. if (vdev) {
  589. dp_rx_mon_deliver(soc, i,
  590. pdev->invalid_peer_head_msdu,
  591. pdev->invalid_peer_tail_msdu);
  592. pdev->invalid_peer_head_msdu = NULL;
  593. pdev->invalid_peer_tail_msdu = NULL;
  594. return 0;
  595. }
  596. }
  597. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  598. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  599. DP_MAC_ADDR_LEN) == 0) {
  600. goto out;
  601. }
  602. }
  603. }
  604. if (!vdev) {
  605. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  606. "VDEV not found");
  607. goto free;
  608. }
  609. out:
  610. msg.wh = wh;
  611. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  612. msg.nbuf = mpdu;
  613. msg.vdev_id = vdev->vdev_id;
  614. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  615. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(pdev->ctrl_pdev,
  616. &msg);
  617. free:
  618. /* Drop and free packet */
  619. curr_nbuf = mpdu;
  620. while (curr_nbuf) {
  621. next_nbuf = qdf_nbuf_next(curr_nbuf);
  622. qdf_nbuf_free(curr_nbuf);
  623. curr_nbuf = next_nbuf;
  624. }
  625. return 0;
  626. }
  627. /**
  628. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  629. * @soc: DP SOC handle
  630. * @mpdu: mpdu for which peer is invalid
  631. * @mpdu_done: if an mpdu is completed
  632. *
  633. * return: integer type
  634. */
  635. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  636. qdf_nbuf_t mpdu, bool mpdu_done)
  637. {
  638. /* Only trigger the process when mpdu is completed */
  639. if (mpdu_done)
  640. dp_rx_process_invalid_peer(soc, mpdu);
  641. }
  642. #else
  643. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu)
  644. {
  645. qdf_nbuf_t curr_nbuf, next_nbuf;
  646. struct dp_pdev *pdev;
  647. uint8_t i;
  648. struct dp_vdev *vdev = NULL;
  649. struct ieee80211_frame *wh;
  650. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  651. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  652. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  653. if (!DP_FRAME_IS_DATA(wh)) {
  654. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  655. "only for data frames");
  656. goto free;
  657. }
  658. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  659. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  660. "Invalid nbuf length");
  661. goto free;
  662. }
  663. /* reset the head and tail pointers */
  664. for (i = 0; i < MAX_PDEV_CNT; i++) {
  665. pdev = soc->pdev_list[i];
  666. if (!pdev) {
  667. QDF_TRACE(QDF_MODULE_ID_DP,
  668. QDF_TRACE_LEVEL_ERROR,
  669. "PDEV not found");
  670. continue;
  671. }
  672. pdev->invalid_peer_head_msdu = NULL;
  673. pdev->invalid_peer_tail_msdu = NULL;
  674. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  675. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  676. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  677. DP_MAC_ADDR_LEN) == 0) {
  678. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  679. goto out;
  680. }
  681. }
  682. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  683. }
  684. if (NULL == vdev) {
  685. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  686. "VDEV not found");
  687. goto free;
  688. }
  689. out:
  690. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  691. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  692. free:
  693. /* Drop and free packet */
  694. curr_nbuf = mpdu;
  695. while (curr_nbuf) {
  696. next_nbuf = qdf_nbuf_next(curr_nbuf);
  697. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  698. qdf_nbuf_len(curr_nbuf));
  699. qdf_nbuf_free(curr_nbuf);
  700. curr_nbuf = next_nbuf;
  701. }
  702. return 0;
  703. }
  704. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  705. qdf_nbuf_t mpdu, bool mpdu_done)
  706. {
  707. /* To avoid compiler warning */
  708. mpdu_done = mpdu_done;
  709. /* Process the nbuf */
  710. dp_rx_process_invalid_peer(soc, mpdu);
  711. }
  712. #endif
  713. #if defined(FEATURE_LRO)
  714. static void dp_rx_print_lro_info(uint8_t *rx_tlv)
  715. {
  716. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  717. FL("----------------------RX DESC LRO----------------------"));
  718. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  719. FL("lro_eligible 0x%x"), HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  720. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  721. FL("pure_ack 0x%x"), HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  722. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  723. FL("chksum 0x%x"), HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv));
  724. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  725. FL("TCP seq num 0x%x"), HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  726. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  727. FL("TCP ack num 0x%x"), HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  728. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  729. FL("TCP window 0x%x"), HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  730. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  731. FL("TCP protocol 0x%x"), HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  732. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  733. FL("TCP offset 0x%x"), HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  734. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  735. FL("toeplitz 0x%x"), HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  736. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  737. FL("---------------------------------------------------------"));
  738. }
  739. /**
  740. * dp_rx_lro() - LRO related processing
  741. * @rx_tlv: TLV data extracted from the rx packet
  742. * @peer: destination peer of the msdu
  743. * @msdu: network buffer
  744. * @ctx: LRO context
  745. *
  746. * This function performs the LRO related processing of the msdu
  747. *
  748. * Return: true: LRO enabled false: LRO is not enabled
  749. */
  750. static void dp_rx_lro(uint8_t *rx_tlv, struct dp_peer *peer,
  751. qdf_nbuf_t msdu, qdf_lro_ctx_t ctx)
  752. {
  753. if (!peer || !peer->vdev || !peer->vdev->lro_enable) {
  754. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  755. FL("no peer, no vdev or LRO disabled"));
  756. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = 0;
  757. return;
  758. }
  759. qdf_assert(rx_tlv);
  760. dp_rx_print_lro_info(rx_tlv);
  761. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  762. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  763. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  764. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  765. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  766. HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv);
  767. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  768. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  769. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  770. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  771. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  772. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  773. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  774. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  775. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  776. HAL_RX_TLV_GET_IPV6(rx_tlv);
  777. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  778. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  779. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  780. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  781. QDF_NBUF_CB_RX_LRO_CTX(msdu) = (unsigned char *)ctx;
  782. }
  783. #else
  784. static void dp_rx_lro(uint8_t *rx_tlv, struct dp_peer *peer,
  785. qdf_nbuf_t msdu, qdf_lro_ctx_t ctx)
  786. {
  787. }
  788. #endif
  789. /**
  790. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  791. *
  792. * @nbuf: pointer to msdu.
  793. * @mpdu_len: mpdu length
  794. *
  795. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  796. */
  797. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  798. {
  799. bool last_nbuf;
  800. if (*mpdu_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  801. qdf_nbuf_set_pktlen(nbuf, RX_BUFFER_SIZE);
  802. last_nbuf = false;
  803. } else {
  804. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  805. last_nbuf = true;
  806. }
  807. *mpdu_len -= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  808. return last_nbuf;
  809. }
  810. /**
  811. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  812. * multiple nbufs.
  813. * @nbuf: pointer to the first msdu of an amsdu.
  814. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  815. *
  816. *
  817. * This function implements the creation of RX frag_list for cases
  818. * where an MSDU is spread across multiple nbufs.
  819. *
  820. * Return: returns the head nbuf which contains complete frag_list.
  821. */
  822. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  823. {
  824. qdf_nbuf_t parent, next, frag_list;
  825. uint16_t frag_list_len = 0;
  826. uint16_t mpdu_len;
  827. bool last_nbuf;
  828. mpdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  829. /*
  830. * this is a case where the complete msdu fits in one single nbuf.
  831. * in this case HW sets both start and end bit and we only need to
  832. * reset these bits for RAW mode simulator to decap the pkt
  833. */
  834. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  835. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  836. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  837. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  838. return nbuf;
  839. }
  840. /*
  841. * This is a case where we have multiple msdus (A-MSDU) spread across
  842. * multiple nbufs. here we create a fraglist out of these nbufs.
  843. *
  844. * the moment we encounter a nbuf with continuation bit set we
  845. * know for sure we have an MSDU which is spread across multiple
  846. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  847. */
  848. parent = nbuf;
  849. frag_list = nbuf->next;
  850. nbuf = nbuf->next;
  851. /*
  852. * set the start bit in the first nbuf we encounter with continuation
  853. * bit set. This has the proper mpdu length set as it is the first
  854. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  855. * nbufs will form the frag_list of the parent nbuf.
  856. */
  857. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  858. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  859. /*
  860. * this is where we set the length of the fragments which are
  861. * associated to the parent nbuf. We iterate through the frag_list
  862. * till we hit the last_nbuf of the list.
  863. */
  864. do {
  865. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  866. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  867. frag_list_len += qdf_nbuf_len(nbuf);
  868. if (last_nbuf) {
  869. next = nbuf->next;
  870. nbuf->next = NULL;
  871. break;
  872. }
  873. nbuf = nbuf->next;
  874. } while (!last_nbuf);
  875. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  876. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  877. parent->next = next;
  878. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  879. return parent;
  880. }
  881. static inline void dp_rx_deliver_to_stack(struct dp_vdev *vdev,
  882. struct dp_peer *peer,
  883. qdf_nbuf_t nbuf_head,
  884. qdf_nbuf_t nbuf_tail)
  885. {
  886. /*
  887. * highly unlikely to have a vdev without a registered rx
  888. * callback function. if so let us free the nbuf_list.
  889. */
  890. if (qdf_unlikely(!vdev->osif_rx)) {
  891. qdf_nbuf_t nbuf;
  892. do {
  893. nbuf = nbuf_head;
  894. nbuf_head = nbuf_head->next;
  895. qdf_nbuf_free(nbuf);
  896. } while (nbuf_head);
  897. return;
  898. }
  899. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  900. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  901. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  902. &nbuf_tail, (struct cdp_peer *) peer);
  903. }
  904. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  905. }
  906. /**
  907. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  908. * @nbuf: pointer to the first msdu of an amsdu.
  909. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  910. *
  911. * The ipsumed field of the skb is set based on whether HW validated the
  912. * IP/TCP/UDP checksum.
  913. *
  914. * Return: void
  915. */
  916. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  917. qdf_nbuf_t nbuf,
  918. uint8_t *rx_tlv_hdr)
  919. {
  920. qdf_nbuf_rx_cksum_t cksum = {0};
  921. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  922. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  923. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  924. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  925. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  926. } else {
  927. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  928. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  929. }
  930. }
  931. /**
  932. * dp_rx_msdu_stats_update() - update per msdu stats.
  933. * @soc: core txrx main context
  934. * @nbuf: pointer to the first msdu of an amsdu.
  935. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  936. * @peer: pointer to the peer object.
  937. * @ring_id: reo dest ring number on which pkt is reaped.
  938. *
  939. * update all the per msdu stats for that nbuf.
  940. * Return: void
  941. */
  942. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  943. qdf_nbuf_t nbuf,
  944. uint8_t *rx_tlv_hdr,
  945. struct dp_peer *peer,
  946. uint8_t ring_id)
  947. {
  948. bool is_ampdu, is_not_amsdu;
  949. uint16_t peer_id;
  950. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  951. struct dp_vdev *vdev = peer->vdev;
  952. struct ether_header *eh;
  953. uint16_t msdu_len = qdf_nbuf_len(nbuf);
  954. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  955. hal_rx_mpdu_peer_meta_data_get(rx_tlv_hdr));
  956. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  957. qdf_nbuf_is_rx_chfrag_end(nbuf);
  958. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  959. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  960. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  961. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr) &&
  962. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  963. eh = (struct ether_header *)qdf_nbuf_data(nbuf);
  964. if (IEEE80211_IS_BROADCAST(eh->ether_dhost)) {
  965. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  966. } else {
  967. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  968. }
  969. }
  970. /*
  971. * currently we can return from here as we have similar stats
  972. * updated at per ppdu level instead of msdu level
  973. */
  974. if (!soc->process_rx_status)
  975. return;
  976. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  977. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  978. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  979. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  980. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  981. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc, rx_tlv_hdr);
  982. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  983. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  984. rx_tlv_hdr);
  985. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  986. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  987. /* Save tid to skb->priority */
  988. DP_RX_TID_SAVE(nbuf, tid);
  989. DP_STATS_INC(peer, rx.bw[bw], 1);
  990. DP_STATS_INC(peer, rx.nss[nss], 1);
  991. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  992. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  993. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  994. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  995. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  996. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  997. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  998. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS], 1,
  999. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1000. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1001. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1002. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS], 1,
  1003. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1004. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1005. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1006. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS], 1,
  1007. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1008. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1009. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1010. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS], 1,
  1011. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1012. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1013. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1014. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS], 1,
  1015. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1016. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1017. ((mcs <= MAX_MCS) && (pkt_type == DOT11_AX)));
  1018. if ((soc->process_rx_status) &&
  1019. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1020. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  1021. soc->cdp_soc.ol_ops->update_dp_stats(
  1022. vdev->pdev->ctrl_pdev,
  1023. &peer->stats,
  1024. peer_id,
  1025. UPDATE_PEER_STATS);
  1026. }
  1027. }
  1028. }
  1029. #ifdef WDS_VENDOR_EXTENSION
  1030. int dp_wds_rx_policy_check(
  1031. uint8_t *rx_tlv_hdr,
  1032. struct dp_vdev *vdev,
  1033. struct dp_peer *peer,
  1034. int rx_mcast
  1035. )
  1036. {
  1037. struct dp_peer *bss_peer;
  1038. int fr_ds, to_ds, rx_3addr, rx_4addr;
  1039. int rx_policy_ucast, rx_policy_mcast;
  1040. if (vdev->opmode == wlan_op_mode_ap) {
  1041. TAILQ_FOREACH(bss_peer, &vdev->peer_list, peer_list_elem) {
  1042. if (bss_peer->bss_peer) {
  1043. /* if wds policy check is not enabled on this vdev, accept all frames */
  1044. if (!bss_peer->wds_ecm.wds_rx_filter) {
  1045. return 1;
  1046. }
  1047. break;
  1048. }
  1049. }
  1050. rx_policy_ucast = bss_peer->wds_ecm.wds_rx_ucast_4addr;
  1051. rx_policy_mcast = bss_peer->wds_ecm.wds_rx_mcast_4addr;
  1052. } else { /* sta mode */
  1053. if (!peer->wds_ecm.wds_rx_filter) {
  1054. return 1;
  1055. }
  1056. rx_policy_ucast = peer->wds_ecm.wds_rx_ucast_4addr;
  1057. rx_policy_mcast = peer->wds_ecm.wds_rx_mcast_4addr;
  1058. }
  1059. /* ------------------------------------------------
  1060. * self
  1061. * peer- rx rx-
  1062. * wds ucast mcast dir policy accept note
  1063. * ------------------------------------------------
  1064. * 1 1 0 11 x1 1 AP configured to accept ds-to-ds Rx ucast from wds peers, constraint met; so, accept
  1065. * 1 1 0 01 x1 0 AP configured to accept ds-to-ds Rx ucast from wds peers, constraint not met; so, drop
  1066. * 1 1 0 10 x1 0 AP configured to accept ds-to-ds Rx ucast from wds peers, constraint not met; so, drop
  1067. * 1 1 0 00 x1 0 bad frame, won't see it
  1068. * 1 0 1 11 1x 1 AP configured to accept ds-to-ds Rx mcast from wds peers, constraint met; so, accept
  1069. * 1 0 1 01 1x 0 AP configured to accept ds-to-ds Rx mcast from wds peers, constraint not met; so, drop
  1070. * 1 0 1 10 1x 0 AP configured to accept ds-to-ds Rx mcast from wds peers, constraint not met; so, drop
  1071. * 1 0 1 00 1x 0 bad frame, won't see it
  1072. * 1 1 0 11 x0 0 AP configured to accept from-ds Rx ucast from wds peers, constraint not met; so, drop
  1073. * 1 1 0 01 x0 0 AP configured to accept from-ds Rx ucast from wds peers, constraint not met; so, drop
  1074. * 1 1 0 10 x0 1 AP configured to accept from-ds Rx ucast from wds peers, constraint met; so, accept
  1075. * 1 1 0 00 x0 0 bad frame, won't see it
  1076. * 1 0 1 11 0x 0 AP configured to accept from-ds Rx mcast from wds peers, constraint not met; so, drop
  1077. * 1 0 1 01 0x 0 AP configured to accept from-ds Rx mcast from wds peers, constraint not met; so, drop
  1078. * 1 0 1 10 0x 1 AP configured to accept from-ds Rx mcast from wds peers, constraint met; so, accept
  1079. * 1 0 1 00 0x 0 bad frame, won't see it
  1080. *
  1081. * 0 x x 11 xx 0 we only accept td-ds Rx frames from non-wds peers in mode.
  1082. * 0 x x 01 xx 1
  1083. * 0 x x 10 xx 0
  1084. * 0 x x 00 xx 0 bad frame, won't see it
  1085. * ------------------------------------------------
  1086. */
  1087. fr_ds = hal_rx_mpdu_get_fr_ds(rx_tlv_hdr);
  1088. to_ds = hal_rx_mpdu_get_to_ds(rx_tlv_hdr);
  1089. rx_3addr = fr_ds ^ to_ds;
  1090. rx_4addr = fr_ds & to_ds;
  1091. if (vdev->opmode == wlan_op_mode_ap) {
  1092. if ((!peer->wds_enabled && rx_3addr && to_ds) ||
  1093. (peer->wds_enabled && !rx_mcast && (rx_4addr == rx_policy_ucast)) ||
  1094. (peer->wds_enabled && rx_mcast && (rx_4addr == rx_policy_mcast))) {
  1095. return 1;
  1096. }
  1097. } else { /* sta mode */
  1098. if ((!rx_mcast && (rx_4addr == rx_policy_ucast)) ||
  1099. (rx_mcast && (rx_4addr == rx_policy_mcast))) {
  1100. return 1;
  1101. }
  1102. }
  1103. return 0;
  1104. }
  1105. #else
  1106. int dp_wds_rx_policy_check(
  1107. uint8_t *rx_tlv_hdr,
  1108. struct dp_vdev *vdev,
  1109. struct dp_peer *peer,
  1110. int rx_mcast
  1111. )
  1112. {
  1113. return 1;
  1114. }
  1115. #endif
  1116. /**
  1117. * dp_rx_process() - Brain of the Rx processing functionality
  1118. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1119. * @soc: core txrx main context
  1120. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1121. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1122. * @quota: No. of units (packets) that can be serviced in one shot.
  1123. *
  1124. * This function implements the core of Rx functionality. This is
  1125. * expected to handle only non-error frames.
  1126. *
  1127. * Return: uint32_t: No. of elements processed
  1128. */
  1129. uint32_t dp_rx_process(struct dp_intr *int_ctx, void *hal_ring,
  1130. uint8_t reo_ring_num, uint32_t quota)
  1131. {
  1132. void *hal_soc;
  1133. void *ring_desc;
  1134. struct dp_rx_desc *rx_desc = NULL;
  1135. qdf_nbuf_t nbuf, next;
  1136. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  1137. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  1138. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1139. uint32_t l2_hdr_offset = 0;
  1140. uint16_t msdu_len = 0;
  1141. uint16_t peer_id;
  1142. struct dp_peer *peer = NULL;
  1143. struct dp_vdev *vdev = NULL;
  1144. uint32_t pkt_len = 0;
  1145. struct hal_rx_mpdu_desc_info mpdu_desc_info = { 0 };
  1146. struct hal_rx_msdu_desc_info msdu_desc_info = { 0 };
  1147. enum hal_reo_error_status error;
  1148. uint32_t peer_mdata;
  1149. uint8_t *rx_tlv_hdr;
  1150. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  1151. uint8_t mac_id = 0;
  1152. struct dp_pdev *pdev;
  1153. struct dp_srng *dp_rxdma_srng;
  1154. struct rx_desc_pool *rx_desc_pool;
  1155. struct dp_soc *soc = int_ctx->soc;
  1156. uint8_t ring_id = 0;
  1157. uint8_t core_id = 0;
  1158. qdf_nbuf_t nbuf_head = NULL;
  1159. qdf_nbuf_t nbuf_tail = NULL;
  1160. qdf_nbuf_t deliver_list_head = NULL;
  1161. qdf_nbuf_t deliver_list_tail = NULL;
  1162. DP_HIST_INIT();
  1163. /* Debug -- Remove later */
  1164. qdf_assert(soc && hal_ring);
  1165. hal_soc = soc->hal_soc;
  1166. /* Debug -- Remove later */
  1167. qdf_assert(hal_soc);
  1168. hif_pm_runtime_mark_last_busy(soc->osdev->dev);
  1169. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  1170. /*
  1171. * Need API to convert from hal_ring pointer to
  1172. * Ring Type / Ring Id combo
  1173. */
  1174. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1175. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1176. FL("HAL RING Access Failed -- %pK"), hal_ring);
  1177. hal_srng_access_end(hal_soc, hal_ring);
  1178. goto done;
  1179. }
  1180. /*
  1181. * start reaping the buffers from reo ring and queue
  1182. * them in per vdev queue.
  1183. * Process the received pkts in a different per vdev loop.
  1184. */
  1185. while (qdf_likely(quota)) {
  1186. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring);
  1187. /*
  1188. * in case HW has updated hp after we cached the hp
  1189. * ring_desc can be NULL even there are entries
  1190. * available in the ring. Update the cached_hp
  1191. * and reap the buffers available to read complete
  1192. * mpdu in one reap
  1193. *
  1194. * This is needed for RAW mode we have to read all
  1195. * msdus corresponding to amsdu in one reap to create
  1196. * SG list properly but due to mismatch in cached_hp
  1197. * and actual hp sometimes we are unable to read
  1198. * complete mpdu in one reap.
  1199. */
  1200. if (qdf_unlikely(!ring_desc)) {
  1201. hal_srng_access_start_unlocked(hal_soc, hal_ring);
  1202. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring);
  1203. if (!ring_desc)
  1204. break;
  1205. }
  1206. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1207. ring_id = hal_srng_ring_id_get(hal_ring);
  1208. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1209. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1210. FL("HAL RING 0x%pK:error %d"), hal_ring, error);
  1211. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1212. /* Don't know how to deal with this -- assert */
  1213. qdf_assert(0);
  1214. }
  1215. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1216. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1217. qdf_assert(rx_desc);
  1218. rx_bufs_reaped[rx_desc->pool_id]++;
  1219. /* TODO */
  1220. /*
  1221. * Need a separate API for unmapping based on
  1222. * phyiscal address
  1223. */
  1224. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  1225. QDF_DMA_BIDIRECTIONAL);
  1226. core_id = smp_processor_id();
  1227. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1228. /* Get MPDU DESC info */
  1229. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1230. hal_rx_mpdu_peer_meta_data_set(qdf_nbuf_data(rx_desc->nbuf),
  1231. mpdu_desc_info.peer_meta_data);
  1232. /* Get MSDU DESC info */
  1233. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1234. /*
  1235. * save msdu flags first, last and continuation msdu in
  1236. * nbuf->cb
  1237. */
  1238. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1239. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1240. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1241. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1242. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1243. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1244. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1245. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1246. /*
  1247. * if continuation bit is set then we have MSDU spread
  1248. * across multiple buffers, let us not decrement quota
  1249. * till we reap all buffers of that MSDU.
  1250. */
  1251. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1252. quota -= 1;
  1253. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1254. &tail[rx_desc->pool_id],
  1255. rx_desc);
  1256. }
  1257. done:
  1258. hal_srng_access_end(hal_soc, hal_ring);
  1259. if (nbuf_tail)
  1260. QDF_NBUF_CB_RX_FLUSH_IND(nbuf_tail) = 1;
  1261. /* Update histogram statistics by looping through pdev's */
  1262. DP_RX_HIST_STATS_PER_PDEV();
  1263. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1264. /*
  1265. * continue with next mac_id if no pkts were reaped
  1266. * from that pool
  1267. */
  1268. if (!rx_bufs_reaped[mac_id])
  1269. continue;
  1270. pdev = soc->pdev_list[mac_id];
  1271. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1272. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1273. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1274. rx_desc_pool, rx_bufs_reaped[mac_id],
  1275. &head[mac_id], &tail[mac_id]);
  1276. }
  1277. /* Peer can be NULL is case of LFR */
  1278. if (qdf_likely(peer != NULL))
  1279. vdev = NULL;
  1280. /*
  1281. * BIG loop where each nbuf is dequeued from global queue,
  1282. * processed and queued back on a per vdev basis. These nbufs
  1283. * are sent to stack as and when we run out of nbufs
  1284. * or a new nbuf dequeued from global queue has a different
  1285. * vdev when compared to previous nbuf.
  1286. */
  1287. nbuf = nbuf_head;
  1288. while (nbuf) {
  1289. next = nbuf->next;
  1290. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1291. /*
  1292. * Check if DMA completed -- msdu_done is the last bit
  1293. * to be written
  1294. */
  1295. if (qdf_unlikely(!hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  1296. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1297. FL("MSDU DONE failure"));
  1298. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1299. QDF_TRACE_LEVEL_INFO);
  1300. qdf_assert(0);
  1301. }
  1302. peer_mdata = hal_rx_mpdu_peer_meta_data_get(rx_tlv_hdr);
  1303. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1304. peer = dp_peer_find_by_id(soc, peer_id);
  1305. if (peer) {
  1306. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  1307. qdf_dp_trace_set_track(nbuf, QDF_RX);
  1308. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  1309. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  1310. QDF_NBUF_RX_PKT_DATA_TRACK;
  1311. }
  1312. rx_bufs_used++;
  1313. if (deliver_list_head && peer && (vdev != peer->vdev)) {
  1314. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1315. deliver_list_tail);
  1316. deliver_list_head = NULL;
  1317. deliver_list_tail = NULL;
  1318. }
  1319. if (qdf_likely(peer != NULL)) {
  1320. vdev = peer->vdev;
  1321. } else {
  1322. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1323. qdf_nbuf_len(nbuf));
  1324. qdf_nbuf_free(nbuf);
  1325. nbuf = next;
  1326. continue;
  1327. }
  1328. if (qdf_unlikely(vdev == NULL)) {
  1329. qdf_nbuf_free(nbuf);
  1330. nbuf = next;
  1331. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1332. continue;
  1333. }
  1334. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  1335. /*
  1336. * First IF condition:
  1337. * 802.11 Fragmented pkts are reinjected to REO
  1338. * HW block as SG pkts and for these pkts we only
  1339. * need to pull the RX TLVS header length.
  1340. * Second IF condition:
  1341. * The below condition happens when an MSDU is spread
  1342. * across multiple buffers. This can happen in two cases
  1343. * 1. The nbuf size is smaller then the received msdu.
  1344. * ex: we have set the nbuf size to 2048 during
  1345. * nbuf_alloc. but we received an msdu which is
  1346. * 2304 bytes in size then this msdu is spread
  1347. * across 2 nbufs.
  1348. *
  1349. * 2. AMSDUs when RAW mode is enabled.
  1350. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  1351. * across 1st nbuf and 2nd nbuf and last MSDU is
  1352. * spread across 2nd nbuf and 3rd nbuf.
  1353. *
  1354. * for these scenarios let us create a skb frag_list and
  1355. * append these buffers till the last MSDU of the AMSDU
  1356. * Third condition:
  1357. * This is the most likely case, we receive 802.3 pkts
  1358. * decapsulated by HW, here we need to set the pkt length.
  1359. */
  1360. if (qdf_unlikely(qdf_nbuf_get_ext_list(nbuf)))
  1361. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1362. else if (qdf_unlikely(vdev->rx_decap_type ==
  1363. htt_cmn_pkt_type_raw)) {
  1364. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  1365. nbuf = dp_rx_sg_create(nbuf, rx_tlv_hdr);
  1366. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  1367. DP_STATS_INC_PKT(peer, rx.raw, 1,
  1368. msdu_len);
  1369. next = nbuf->next;
  1370. } else {
  1371. l2_hdr_offset =
  1372. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1373. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  1374. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1375. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1376. qdf_nbuf_pull_head(nbuf,
  1377. RX_PKT_TLVS_LEN +
  1378. l2_hdr_offset);
  1379. }
  1380. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer,
  1381. hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  1382. QDF_TRACE(QDF_MODULE_ID_DP,
  1383. QDF_TRACE_LEVEL_ERROR,
  1384. FL("Policy Check Drop pkt"));
  1385. /* Drop & free packet */
  1386. qdf_nbuf_free(nbuf);
  1387. /* Statistics */
  1388. nbuf = next;
  1389. continue;
  1390. }
  1391. if (qdf_unlikely(peer && peer->bss_peer)) {
  1392. QDF_TRACE(QDF_MODULE_ID_DP,
  1393. QDF_TRACE_LEVEL_ERROR,
  1394. FL("received pkt with same src MAC"));
  1395. DP_STATS_INC(vdev->pdev, dropped.mec, 1);
  1396. /* Drop & free packet */
  1397. qdf_nbuf_free(nbuf);
  1398. /* Statistics */
  1399. nbuf = next;
  1400. continue;
  1401. }
  1402. if (qdf_unlikely(peer && (peer->nawds_enabled == true) &&
  1403. (hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr)) &&
  1404. (hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr) == false))) {
  1405. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1406. qdf_nbuf_free(nbuf);
  1407. nbuf = next;
  1408. continue;
  1409. }
  1410. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  1411. dp_set_rx_queue(nbuf, ring_id);
  1412. /*
  1413. * HW structures call this L3 header padding --
  1414. * even though this is actually the offset from
  1415. * the buffer beginning where the L2 header
  1416. * begins.
  1417. */
  1418. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1419. FL("rxhash: flow id toeplitz: 0x%x"),
  1420. hal_rx_msdu_start_toeplitz_get(rx_tlv_hdr));
  1421. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer, ring_id);
  1422. if (qdf_unlikely(vdev->mesh_vdev)) {
  1423. if (dp_rx_filter_mesh_packets(vdev, nbuf,
  1424. rx_tlv_hdr)
  1425. == QDF_STATUS_SUCCESS) {
  1426. QDF_TRACE(QDF_MODULE_ID_DP,
  1427. QDF_TRACE_LEVEL_INFO_MED,
  1428. FL("mesh pkt filtered"));
  1429. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1430. 1);
  1431. qdf_nbuf_free(nbuf);
  1432. nbuf = next;
  1433. continue;
  1434. }
  1435. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1436. }
  1437. #ifdef QCA_WIFI_NAPIER_EMULATION_DBG /* Debug code, remove later */
  1438. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1439. "p_id %d msdu_len %d hdr_off %d",
  1440. peer_id, msdu_len, l2_hdr_offset);
  1441. print_hex_dump(KERN_ERR,
  1442. "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  1443. qdf_nbuf_data(nbuf), 128, false);
  1444. #endif /* NAPIER_EMULATION */
  1445. if (qdf_likely(vdev->rx_decap_type ==
  1446. htt_cmn_pkt_type_ethernet) &&
  1447. (qdf_likely(!vdev->mesh_vdev)) &&
  1448. (vdev->wds_enabled)) {
  1449. /* WDS Source Port Learning */
  1450. dp_rx_wds_srcport_learn(soc,
  1451. rx_tlv_hdr,
  1452. peer,
  1453. nbuf);
  1454. /* Intrabss-fwd */
  1455. if (dp_rx_check_ap_bridge(vdev))
  1456. if (dp_rx_intrabss_fwd(soc,
  1457. peer,
  1458. rx_tlv_hdr,
  1459. nbuf)) {
  1460. nbuf = next;
  1461. continue; /* Get next desc */
  1462. }
  1463. }
  1464. dp_rx_lro(rx_tlv_hdr, peer, nbuf, int_ctx->lro_ctx);
  1465. qdf_nbuf_cb_update_peer_local_id(nbuf, peer->local_id);
  1466. DP_RX_LIST_APPEND(deliver_list_head,
  1467. deliver_list_tail,
  1468. nbuf);
  1469. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1470. qdf_nbuf_len(nbuf));
  1471. nbuf = next;
  1472. }
  1473. if (deliver_list_head)
  1474. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1475. deliver_list_tail);
  1476. return rx_bufs_used; /* Assume no scale factor for now */
  1477. }
  1478. /**
  1479. * dp_rx_detach() - detach dp rx
  1480. * @pdev: core txrx pdev context
  1481. *
  1482. * This function will detach DP RX into main device context
  1483. * will free DP Rx resources.
  1484. *
  1485. * Return: void
  1486. */
  1487. void
  1488. dp_rx_pdev_detach(struct dp_pdev *pdev)
  1489. {
  1490. uint8_t pdev_id = pdev->pdev_id;
  1491. struct dp_soc *soc = pdev->soc;
  1492. struct rx_desc_pool *rx_desc_pool;
  1493. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1494. if (rx_desc_pool->pool_size != 0) {
  1495. dp_rx_desc_pool_free(soc, pdev_id, rx_desc_pool);
  1496. }
  1497. return;
  1498. }
  1499. /**
  1500. * dp_rx_attach() - attach DP RX
  1501. * @pdev: core txrx pdev context
  1502. *
  1503. * This function will attach a DP RX instance into the main
  1504. * device (SOC) context. Will allocate dp rx resource and
  1505. * initialize resources.
  1506. *
  1507. * Return: QDF_STATUS_SUCCESS: success
  1508. * QDF_STATUS_E_RESOURCES: Error return
  1509. */
  1510. QDF_STATUS
  1511. dp_rx_pdev_attach(struct dp_pdev *pdev)
  1512. {
  1513. uint8_t pdev_id = pdev->pdev_id;
  1514. struct dp_soc *soc = pdev->soc;
  1515. struct dp_srng rxdma_srng;
  1516. uint32_t rxdma_entries;
  1517. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1518. union dp_rx_desc_list_elem_t *tail = NULL;
  1519. struct dp_srng *dp_rxdma_srng;
  1520. struct rx_desc_pool *rx_desc_pool;
  1521. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  1522. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1523. "nss-wifi<4> skip Rx refil %d", pdev_id);
  1524. return QDF_STATUS_SUCCESS;
  1525. }
  1526. pdev = soc->pdev_list[pdev_id];
  1527. rxdma_srng = pdev->rx_refill_buf_ring;
  1528. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  1529. rxdma_entries = rxdma_srng.alloc_size/hal_srng_get_entrysize(
  1530. soc->hal_soc, RXDMA_BUF);
  1531. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1532. dp_rx_desc_pool_alloc(soc, pdev_id, rxdma_entries*3, rx_desc_pool);
  1533. rx_desc_pool->owner = DP_WBM2SW_RBM;
  1534. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  1535. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1536. dp_rx_buffers_replenish(soc, pdev_id, dp_rxdma_srng, rx_desc_pool,
  1537. 0, &desc_list, &tail);
  1538. return QDF_STATUS_SUCCESS;
  1539. }
  1540. /*
  1541. * dp_rx_nbuf_prepare() - prepare RX nbuf
  1542. * @soc: core txrx main context
  1543. * @pdev: core txrx pdev context
  1544. *
  1545. * This function alloc & map nbuf for RX dma usage, retry it if failed
  1546. * until retry times reaches max threshold or succeeded.
  1547. *
  1548. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  1549. */
  1550. qdf_nbuf_t
  1551. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  1552. {
  1553. uint8_t *buf;
  1554. int32_t nbuf_retry_count;
  1555. QDF_STATUS ret;
  1556. qdf_nbuf_t nbuf = NULL;
  1557. for (nbuf_retry_count = 0; nbuf_retry_count <
  1558. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  1559. nbuf_retry_count++) {
  1560. /* Allocate a new skb */
  1561. nbuf = qdf_nbuf_alloc(soc->osdev,
  1562. RX_BUFFER_SIZE,
  1563. RX_BUFFER_RESERVATION,
  1564. RX_BUFFER_ALIGNMENT,
  1565. FALSE);
  1566. if (nbuf == NULL) {
  1567. DP_STATS_INC(pdev,
  1568. replenish.nbuf_alloc_fail, 1);
  1569. continue;
  1570. }
  1571. buf = qdf_nbuf_data(nbuf);
  1572. memset(buf, 0, RX_BUFFER_SIZE);
  1573. ret = qdf_nbuf_map_single(soc->osdev, nbuf,
  1574. QDF_DMA_BIDIRECTIONAL);
  1575. /* nbuf map failed */
  1576. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1577. qdf_nbuf_free(nbuf);
  1578. DP_STATS_INC(pdev, replenish.map_err, 1);
  1579. continue;
  1580. }
  1581. /* qdf_nbuf alloc and map succeeded */
  1582. break;
  1583. }
  1584. /* qdf_nbuf still alloc or map failed */
  1585. if (qdf_unlikely(nbuf_retry_count >=
  1586. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  1587. return NULL;
  1588. return nbuf;
  1589. }