dsi_panel.c 100 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) "msm-dsi-panel:[%s:%d] " fmt, __func__, __LINE__
  6. #include <linux/delay.h>
  7. #include <linux/slab.h>
  8. #include <linux/gpio.h>
  9. #include <linux/of_gpio.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. /**
  15. * topology is currently defined by a set of following 3 values:
  16. * 1. num of layer mixers
  17. * 2. num of compression encoders
  18. * 3. num of interfaces
  19. */
  20. #define TOPOLOGY_SET_LEN 3
  21. #define MAX_TOPOLOGY 5
  22. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  23. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  24. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  25. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  26. #define MAX_PANEL_JITTER 10
  27. #define DEFAULT_PANEL_PREFILL_LINES 25
  28. enum dsi_dsc_ratio_type {
  29. DSC_8BPC_8BPP,
  30. DSC_10BPC_8BPP,
  31. DSC_12BPC_8BPP,
  32. DSC_10BPC_10BPP,
  33. DSC_RATIO_TYPE_MAX
  34. };
  35. static u32 dsi_dsc_rc_buf_thresh[] = {0x0e, 0x1c, 0x2a, 0x38, 0x46, 0x54,
  36. 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b, 0x7d, 0x7e};
  37. /*
  38. * DSC 1.1
  39. * Rate control - Min QP values for each ratio type in dsi_dsc_ratio_type
  40. */
  41. static char dsi_dsc_rc_range_min_qp_1_1[][15] = {
  42. {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 7, 12},
  43. {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 17},
  44. {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 15, 21},
  45. {0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
  46. };
  47. /*
  48. * DSC 1.1 SCR
  49. * Rate control - Min QP values for each ratio type in dsi_dsc_ratio_type
  50. */
  51. static char dsi_dsc_rc_range_min_qp_1_1_scr1[][15] = {
  52. {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 9, 12},
  53. {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 13, 16},
  54. {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 17, 20},
  55. {0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
  56. };
  57. /*
  58. * DSC 1.1
  59. * Rate control - Max QP values for each ratio type in dsi_dsc_ratio_type
  60. */
  61. static char dsi_dsc_rc_range_max_qp_1_1[][15] = {
  62. {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 11, 12, 13, 13, 15},
  63. {4, 8, 9, 10, 11, 11, 11, 12, 13, 14, 15, 16, 17, 17, 19},
  64. {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 19, 20, 21, 21, 23},
  65. {7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
  66. };
  67. /*
  68. * DSC 1.1 SCR
  69. * Rate control - Max QP values for each ratio type in dsi_dsc_ratio_type
  70. */
  71. static char dsi_dsc_rc_range_max_qp_1_1_scr1[][15] = {
  72. {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 10, 11, 11, 12, 13},
  73. {8, 8, 9, 10, 11, 11, 11, 12, 13, 14, 14, 15, 15, 16, 17},
  74. {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 18, 19, 19, 20, 23},
  75. {7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
  76. };
  77. /*
  78. * DSC 1.1 and DSC 1.1 SCR
  79. * Rate control - bpg offset values
  80. */
  81. static char dsi_dsc_rc_range_bpg_offset[] = {2, 0, 0, -2, -4, -6, -8, -8,
  82. -8, -10, -10, -12, -12, -12, -12};
  83. int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc, char *buf,
  84. int pps_id)
  85. {
  86. char *bp;
  87. char data;
  88. int i, bpp;
  89. char *dbgbp;
  90. dbgbp = buf;
  91. bp = buf;
  92. /* First 7 bytes are cmd header */
  93. *bp++ = 0x0A;
  94. *bp++ = 1;
  95. *bp++ = 0;
  96. *bp++ = 0;
  97. *bp++ = 10;
  98. *bp++ = 0;
  99. *bp++ = 128;
  100. *bp++ = (dsc->version & 0xff); /* pps0 */
  101. *bp++ = (pps_id & 0xff); /* pps1 */
  102. bp++; /* pps2, reserved */
  103. data = dsc->line_buf_depth & 0x0f;
  104. data |= ((dsc->bpc & 0xf) << 4);
  105. *bp++ = data; /* pps3 */
  106. bpp = dsc->bpp;
  107. bpp <<= 4; /* 4 fraction bits */
  108. data = (bpp >> 8);
  109. data &= 0x03; /* upper two bits */
  110. data |= ((dsc->block_pred_enable & 0x1) << 5);
  111. data |= ((dsc->convert_rgb & 0x1) << 4);
  112. data |= ((dsc->enable_422 & 0x1) << 3);
  113. data |= ((dsc->vbr_enable & 0x1) << 2);
  114. *bp++ = data; /* pps4 */
  115. *bp++ = (bpp & 0xff); /* pps5 */
  116. *bp++ = ((dsc->pic_height >> 8) & 0xff); /* pps6 */
  117. *bp++ = (dsc->pic_height & 0x0ff); /* pps7 */
  118. *bp++ = ((dsc->pic_width >> 8) & 0xff); /* pps8 */
  119. *bp++ = (dsc->pic_width & 0x0ff); /* pps9 */
  120. *bp++ = ((dsc->slice_height >> 8) & 0xff);/* pps10 */
  121. *bp++ = (dsc->slice_height & 0x0ff); /* pps11 */
  122. *bp++ = ((dsc->slice_width >> 8) & 0xff); /* pps12 */
  123. *bp++ = (dsc->slice_width & 0x0ff); /* pps13 */
  124. *bp++ = ((dsc->chunk_size >> 8) & 0xff);/* pps14 */
  125. *bp++ = (dsc->chunk_size & 0x0ff); /* pps15 */
  126. *bp++ = (dsc->initial_xmit_delay >> 8) & 0x3; /* pps16, bit 0, 1 */
  127. *bp++ = (dsc->initial_xmit_delay & 0xff);/* pps17 */
  128. *bp++ = ((dsc->initial_dec_delay >> 8) & 0xff); /* pps18 */
  129. *bp++ = (dsc->initial_dec_delay & 0xff);/* pps19 */
  130. bp++; /* pps20, reserved */
  131. *bp++ = (dsc->initial_scale_value & 0x3f); /* pps21 */
  132. *bp++ = ((dsc->scale_increment_interval >> 8) & 0xff); /* pps22 */
  133. *bp++ = (dsc->scale_increment_interval & 0xff); /* pps23 */
  134. *bp++ = ((dsc->scale_decrement_interval >> 8) & 0xf); /* pps24 */
  135. *bp++ = (dsc->scale_decrement_interval & 0x0ff);/* pps25 */
  136. bp++; /* pps26, reserved */
  137. *bp++ = (dsc->first_line_bpg_offset & 0x1f);/* pps27 */
  138. *bp++ = ((dsc->nfl_bpg_offset >> 8) & 0xff);/* pps28 */
  139. *bp++ = (dsc->nfl_bpg_offset & 0x0ff); /* pps29 */
  140. *bp++ = ((dsc->slice_bpg_offset >> 8) & 0xff);/* pps30 */
  141. *bp++ = (dsc->slice_bpg_offset & 0x0ff);/* pps31 */
  142. *bp++ = ((dsc->initial_offset >> 8) & 0xff);/* pps32 */
  143. *bp++ = (dsc->initial_offset & 0x0ff); /* pps33 */
  144. *bp++ = ((dsc->final_offset >> 8) & 0xff);/* pps34 */
  145. *bp++ = (dsc->final_offset & 0x0ff); /* pps35 */
  146. *bp++ = (dsc->min_qp_flatness & 0x1f); /* pps36 */
  147. *bp++ = (dsc->max_qp_flatness & 0x1f); /* pps37 */
  148. *bp++ = ((dsc->rc_model_size >> 8) & 0xff);/* pps38 */
  149. *bp++ = (dsc->rc_model_size & 0x0ff); /* pps39 */
  150. *bp++ = (dsc->edge_factor & 0x0f); /* pps40 */
  151. *bp++ = (dsc->quant_incr_limit0 & 0x1f); /* pps41 */
  152. *bp++ = (dsc->quant_incr_limit1 & 0x1f); /* pps42 */
  153. data = ((dsc->tgt_offset_hi & 0xf) << 4);
  154. data |= (dsc->tgt_offset_lo & 0x0f);
  155. *bp++ = data; /* pps43 */
  156. for (i = 0; i < 14; i++)
  157. *bp++ = (dsc->buf_thresh[i] & 0xff); /* pps44 - pps57 */
  158. for (i = 0; i < 15; i++) { /* pps58 - pps87 */
  159. data = (dsc->range_min_qp[i] & 0x1f);
  160. data <<= 3;
  161. data |= ((dsc->range_max_qp[i] >> 2) & 0x07);
  162. *bp++ = data;
  163. data = (dsc->range_max_qp[i] & 0x03);
  164. data <<= 6;
  165. data |= (dsc->range_bpg_offset[i] & 0x3f);
  166. *bp++ = data;
  167. }
  168. return 128;
  169. }
  170. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  171. {
  172. int rc = 0;
  173. int i;
  174. struct regulator *vreg = NULL;
  175. for (i = 0; i < panel->power_info.count; i++) {
  176. vreg = devm_regulator_get(panel->parent,
  177. panel->power_info.vregs[i].vreg_name);
  178. rc = PTR_RET(vreg);
  179. if (rc) {
  180. pr_err("failed to get %s regulator\n",
  181. panel->power_info.vregs[i].vreg_name);
  182. goto error_put;
  183. }
  184. panel->power_info.vregs[i].vreg = vreg;
  185. }
  186. return rc;
  187. error_put:
  188. for (i = i - 1; i >= 0; i--) {
  189. devm_regulator_put(panel->power_info.vregs[i].vreg);
  190. panel->power_info.vregs[i].vreg = NULL;
  191. }
  192. return rc;
  193. }
  194. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  195. {
  196. int rc = 0;
  197. int i;
  198. for (i = panel->power_info.count - 1; i >= 0; i--)
  199. devm_regulator_put(panel->power_info.vregs[i].vreg);
  200. return rc;
  201. }
  202. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  203. {
  204. int rc = 0;
  205. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  206. if (gpio_is_valid(r_config->reset_gpio)) {
  207. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  208. if (rc) {
  209. pr_err("request for reset_gpio failed, rc=%d\n", rc);
  210. goto error;
  211. }
  212. }
  213. if (gpio_is_valid(r_config->disp_en_gpio)) {
  214. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  215. if (rc) {
  216. pr_err("request for disp_en_gpio failed, rc=%d\n", rc);
  217. goto error_release_reset;
  218. }
  219. }
  220. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  221. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  222. if (rc) {
  223. pr_err("request for bklt_en_gpio failed, rc=%d\n", rc);
  224. goto error_release_disp_en;
  225. }
  226. }
  227. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  228. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  229. if (rc) {
  230. pr_err("request for mode_gpio failed, rc=%d\n", rc);
  231. goto error_release_mode_sel;
  232. }
  233. }
  234. goto error;
  235. error_release_mode_sel:
  236. if (gpio_is_valid(panel->bl_config.en_gpio))
  237. gpio_free(panel->bl_config.en_gpio);
  238. error_release_disp_en:
  239. if (gpio_is_valid(r_config->disp_en_gpio))
  240. gpio_free(r_config->disp_en_gpio);
  241. error_release_reset:
  242. if (gpio_is_valid(r_config->reset_gpio))
  243. gpio_free(r_config->reset_gpio);
  244. error:
  245. return rc;
  246. }
  247. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  248. {
  249. int rc = 0;
  250. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  251. if (gpio_is_valid(r_config->reset_gpio))
  252. gpio_free(r_config->reset_gpio);
  253. if (gpio_is_valid(r_config->disp_en_gpio))
  254. gpio_free(r_config->disp_en_gpio);
  255. if (gpio_is_valid(panel->bl_config.en_gpio))
  256. gpio_free(panel->bl_config.en_gpio);
  257. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  258. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  259. return rc;
  260. }
  261. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  262. {
  263. struct dsi_panel_reset_config *r_config;
  264. if (!panel) {
  265. pr_err("Invalid panel param\n");
  266. return -EINVAL;
  267. }
  268. r_config = &panel->reset_config;
  269. if (!r_config) {
  270. pr_err("Invalid panel reset configuration\n");
  271. return -EINVAL;
  272. }
  273. if (gpio_is_valid(r_config->reset_gpio)) {
  274. gpio_set_value(r_config->reset_gpio, 0);
  275. pr_info("GPIO pulled low to simulate ESD\n");
  276. return 0;
  277. }
  278. pr_err("failed to pull down gpio\n");
  279. return -EINVAL;
  280. }
  281. static int dsi_panel_reset(struct dsi_panel *panel)
  282. {
  283. int rc = 0;
  284. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  285. int i;
  286. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  287. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  288. if (rc) {
  289. pr_err("unable to set dir for disp gpio rc=%d\n", rc);
  290. goto exit;
  291. }
  292. }
  293. if (r_config->count) {
  294. rc = gpio_direction_output(r_config->reset_gpio,
  295. r_config->sequence[0].level);
  296. if (rc) {
  297. pr_err("unable to set dir for rst gpio rc=%d\n", rc);
  298. goto exit;
  299. }
  300. }
  301. for (i = 0; i < r_config->count; i++) {
  302. gpio_set_value(r_config->reset_gpio,
  303. r_config->sequence[i].level);
  304. if (r_config->sequence[i].sleep_ms)
  305. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  306. (r_config->sequence[i].sleep_ms * 1000) + 100);
  307. }
  308. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  309. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  310. if (rc)
  311. pr_err("unable to set dir for bklt gpio rc=%d\n", rc);
  312. }
  313. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  314. bool out = true;
  315. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  316. || (panel->reset_config.mode_sel_state
  317. == MODE_GPIO_LOW))
  318. out = false;
  319. else if ((panel->reset_config.mode_sel_state
  320. == MODE_SEL_SINGLE_PORT) ||
  321. (panel->reset_config.mode_sel_state
  322. == MODE_GPIO_HIGH))
  323. out = true;
  324. rc = gpio_direction_output(
  325. panel->reset_config.lcd_mode_sel_gpio, out);
  326. if (rc)
  327. pr_err("unable to set dir for mode gpio rc=%d\n", rc);
  328. }
  329. exit:
  330. return rc;
  331. }
  332. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  333. {
  334. int rc = 0;
  335. struct pinctrl_state *state;
  336. if (panel->host_config.ext_bridge_mode)
  337. return 0;
  338. if (enable)
  339. state = panel->pinctrl.active;
  340. else
  341. state = panel->pinctrl.suspend;
  342. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  343. if (rc)
  344. pr_err("[%s] failed to set pin state, rc=%d\n", panel->name,
  345. rc);
  346. return rc;
  347. }
  348. static int dsi_panel_power_on(struct dsi_panel *panel)
  349. {
  350. int rc = 0;
  351. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  352. if (rc) {
  353. pr_err("[%s] failed to enable vregs, rc=%d\n", panel->name, rc);
  354. goto exit;
  355. }
  356. rc = dsi_panel_set_pinctrl_state(panel, true);
  357. if (rc) {
  358. pr_err("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  359. goto error_disable_vregs;
  360. }
  361. rc = dsi_panel_reset(panel);
  362. if (rc) {
  363. pr_err("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  364. goto error_disable_gpio;
  365. }
  366. goto exit;
  367. error_disable_gpio:
  368. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  369. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  370. if (gpio_is_valid(panel->bl_config.en_gpio))
  371. gpio_set_value(panel->bl_config.en_gpio, 0);
  372. (void)dsi_panel_set_pinctrl_state(panel, false);
  373. error_disable_vregs:
  374. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  375. exit:
  376. return rc;
  377. }
  378. static int dsi_panel_power_off(struct dsi_panel *panel)
  379. {
  380. int rc = 0;
  381. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  382. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  383. if (gpio_is_valid(panel->reset_config.reset_gpio))
  384. gpio_set_value(panel->reset_config.reset_gpio, 0);
  385. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  386. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  387. rc = dsi_panel_set_pinctrl_state(panel, false);
  388. if (rc) {
  389. pr_err("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  390. rc);
  391. }
  392. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  393. if (rc)
  394. pr_err("[%s] failed to enable vregs, rc=%d\n", panel->name, rc);
  395. return rc;
  396. }
  397. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  398. enum dsi_cmd_set_type type)
  399. {
  400. int rc = 0, i = 0;
  401. ssize_t len;
  402. struct dsi_cmd_desc *cmds;
  403. u32 count;
  404. enum dsi_cmd_set_state state;
  405. struct dsi_display_mode *mode;
  406. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  407. if (!panel || !panel->cur_mode)
  408. return -EINVAL;
  409. mode = panel->cur_mode;
  410. cmds = mode->priv_info->cmd_sets[type].cmds;
  411. count = mode->priv_info->cmd_sets[type].count;
  412. state = mode->priv_info->cmd_sets[type].state;
  413. if (count == 0) {
  414. pr_debug("[%s] No commands to be sent for state(%d)\n",
  415. panel->name, type);
  416. goto error;
  417. }
  418. for (i = 0; i < count; i++) {
  419. if (state == DSI_CMD_SET_STATE_LP)
  420. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  421. if (cmds->last_command)
  422. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  423. len = ops->transfer(panel->host, &cmds->msg);
  424. if (len < 0) {
  425. rc = len;
  426. pr_err("failed to set cmds(%d), rc=%d\n", type, rc);
  427. goto error;
  428. }
  429. if (cmds->post_wait_ms)
  430. usleep_range(cmds->post_wait_ms*1000,
  431. ((cmds->post_wait_ms*1000)+10));
  432. cmds++;
  433. }
  434. error:
  435. return rc;
  436. }
  437. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  438. {
  439. int rc = 0;
  440. if (panel->host_config.ext_bridge_mode)
  441. return 0;
  442. devm_pinctrl_put(panel->pinctrl.pinctrl);
  443. return rc;
  444. }
  445. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  446. {
  447. int rc = 0;
  448. if (panel->host_config.ext_bridge_mode)
  449. return 0;
  450. /* TODO: pinctrl is defined in dsi dt node */
  451. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  452. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  453. rc = PTR_ERR(panel->pinctrl.pinctrl);
  454. pr_err("failed to get pinctrl, rc=%d\n", rc);
  455. goto error;
  456. }
  457. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  458. "panel_active");
  459. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  460. rc = PTR_ERR(panel->pinctrl.active);
  461. pr_err("failed to get pinctrl active state, rc=%d\n", rc);
  462. goto error;
  463. }
  464. panel->pinctrl.suspend =
  465. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  466. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  467. rc = PTR_ERR(panel->pinctrl.suspend);
  468. pr_err("failed to get pinctrl suspend state, rc=%d\n", rc);
  469. goto error;
  470. }
  471. error:
  472. return rc;
  473. }
  474. static int dsi_panel_wled_register(struct dsi_panel *panel,
  475. struct dsi_backlight_config *bl)
  476. {
  477. int rc = 0;
  478. struct backlight_device *bd;
  479. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  480. if (!bd) {
  481. pr_err("[%s] fail raw backlight register\n", panel->name);
  482. rc = -EINVAL;
  483. }
  484. bl->raw_bd = bd;
  485. return rc;
  486. }
  487. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  488. u32 bl_lvl)
  489. {
  490. int rc = 0;
  491. struct mipi_dsi_device *dsi;
  492. if (!panel || (bl_lvl > 0xffff)) {
  493. pr_err("invalid params\n");
  494. return -EINVAL;
  495. }
  496. dsi = &panel->mipi_device;
  497. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  498. if (rc < 0)
  499. pr_err("failed to update dcs backlight:%d\n", bl_lvl);
  500. return rc;
  501. }
  502. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  503. {
  504. int rc = 0;
  505. struct dsi_backlight_config *bl = &panel->bl_config;
  506. if (panel->host_config.ext_bridge_mode)
  507. return 0;
  508. pr_debug("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  509. switch (bl->type) {
  510. case DSI_BACKLIGHT_WLED:
  511. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  512. break;
  513. case DSI_BACKLIGHT_DCS:
  514. rc = dsi_panel_update_backlight(panel, bl_lvl);
  515. break;
  516. case DSI_BACKLIGHT_EXTERNAL:
  517. break;
  518. default:
  519. pr_err("Backlight type(%d) not supported\n", bl->type);
  520. rc = -ENOTSUPP;
  521. }
  522. return rc;
  523. }
  524. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  525. {
  526. u32 cur_bl_level;
  527. struct backlight_device *bd = bl->raw_bd;
  528. /* default the brightness level to 50% */
  529. cur_bl_level = bl->bl_max_level >> 1;
  530. switch (bl->type) {
  531. case DSI_BACKLIGHT_WLED:
  532. /* Try to query the backlight level from the backlight device */
  533. if (bd->ops && bd->ops->get_brightness)
  534. cur_bl_level = bd->ops->get_brightness(bd);
  535. break;
  536. case DSI_BACKLIGHT_DCS:
  537. case DSI_BACKLIGHT_EXTERNAL:
  538. default:
  539. /*
  540. * Ideally, we should read the backlight level from the
  541. * panel. For now, just set it default value.
  542. */
  543. break;
  544. }
  545. pr_debug("cur_bl_level=%d\n", cur_bl_level);
  546. return cur_bl_level;
  547. }
  548. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  549. {
  550. struct dsi_backlight_config *bl = &panel->bl_config;
  551. bl->bl_level = dsi_panel_get_brightness(bl);
  552. }
  553. static int dsi_panel_bl_register(struct dsi_panel *panel)
  554. {
  555. int rc = 0;
  556. struct dsi_backlight_config *bl = &panel->bl_config;
  557. if (panel->host_config.ext_bridge_mode)
  558. return 0;
  559. switch (bl->type) {
  560. case DSI_BACKLIGHT_WLED:
  561. rc = dsi_panel_wled_register(panel, bl);
  562. break;
  563. case DSI_BACKLIGHT_DCS:
  564. break;
  565. case DSI_BACKLIGHT_EXTERNAL:
  566. break;
  567. default:
  568. pr_err("Backlight type(%d) not supported\n", bl->type);
  569. rc = -ENOTSUPP;
  570. goto error;
  571. }
  572. error:
  573. return rc;
  574. }
  575. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  576. {
  577. int rc = 0;
  578. struct dsi_backlight_config *bl = &panel->bl_config;
  579. if (panel->host_config.ext_bridge_mode)
  580. return 0;
  581. switch (bl->type) {
  582. case DSI_BACKLIGHT_WLED:
  583. break;
  584. case DSI_BACKLIGHT_DCS:
  585. break;
  586. case DSI_BACKLIGHT_EXTERNAL:
  587. break;
  588. default:
  589. pr_err("Backlight type(%d) not supported\n", bl->type);
  590. rc = -ENOTSUPP;
  591. goto error;
  592. }
  593. error:
  594. return rc;
  595. }
  596. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  597. struct dsi_parser_utils *utils)
  598. {
  599. int rc = 0;
  600. u64 tmp64 = 0;
  601. struct dsi_display_mode *display_mode;
  602. struct dsi_display_mode_priv_info *priv_info;
  603. display_mode = container_of(mode, struct dsi_display_mode, timing);
  604. priv_info = display_mode->priv_info;
  605. rc = utils->read_u64(utils->data,
  606. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  607. if (rc == -EOVERFLOW) {
  608. tmp64 = 0;
  609. rc = utils->read_u32(utils->data,
  610. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  611. }
  612. mode->clk_rate_hz = !rc ? tmp64 : 0;
  613. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  614. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  615. &mode->mdp_transfer_time_us);
  616. if (!rc)
  617. display_mode->priv_info->mdp_transfer_time_us =
  618. mode->mdp_transfer_time_us;
  619. else
  620. display_mode->priv_info->mdp_transfer_time_us = 0;
  621. rc = utils->read_u32(utils->data,
  622. "qcom,mdss-dsi-panel-framerate",
  623. &mode->refresh_rate);
  624. if (rc) {
  625. pr_err("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  626. rc);
  627. goto error;
  628. }
  629. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  630. &mode->h_active);
  631. if (rc) {
  632. pr_err("failed to read qcom,mdss-dsi-panel-width, rc=%d\n", rc);
  633. goto error;
  634. }
  635. rc = utils->read_u32(utils->data,
  636. "qcom,mdss-dsi-h-front-porch",
  637. &mode->h_front_porch);
  638. if (rc) {
  639. pr_err("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  640. rc);
  641. goto error;
  642. }
  643. rc = utils->read_u32(utils->data,
  644. "qcom,mdss-dsi-h-back-porch",
  645. &mode->h_back_porch);
  646. if (rc) {
  647. pr_err("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  648. rc);
  649. goto error;
  650. }
  651. rc = utils->read_u32(utils->data,
  652. "qcom,mdss-dsi-h-pulse-width",
  653. &mode->h_sync_width);
  654. if (rc) {
  655. pr_err("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  656. rc);
  657. goto error;
  658. }
  659. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  660. &mode->h_skew);
  661. if (rc)
  662. pr_err("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n", rc);
  663. pr_debug("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  664. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  665. mode->h_sync_width);
  666. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  667. &mode->v_active);
  668. if (rc) {
  669. pr_err("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  670. rc);
  671. goto error;
  672. }
  673. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  674. &mode->v_back_porch);
  675. if (rc) {
  676. pr_err("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  677. rc);
  678. goto error;
  679. }
  680. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  681. &mode->v_front_porch);
  682. if (rc) {
  683. pr_err("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  684. rc);
  685. goto error;
  686. }
  687. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  688. &mode->v_sync_width);
  689. if (rc) {
  690. pr_err("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  691. rc);
  692. goto error;
  693. }
  694. pr_debug("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  695. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  696. mode->v_sync_width);
  697. error:
  698. return rc;
  699. }
  700. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  701. struct dsi_parser_utils *utils,
  702. const char *name)
  703. {
  704. int rc = 0;
  705. u32 bpp = 0;
  706. enum dsi_pixel_format fmt;
  707. const char *packing;
  708. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  709. if (rc) {
  710. pr_err("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  711. name, rc);
  712. return rc;
  713. }
  714. host->bpp = bpp;
  715. switch (bpp) {
  716. case 3:
  717. fmt = DSI_PIXEL_FORMAT_RGB111;
  718. break;
  719. case 8:
  720. fmt = DSI_PIXEL_FORMAT_RGB332;
  721. break;
  722. case 12:
  723. fmt = DSI_PIXEL_FORMAT_RGB444;
  724. break;
  725. case 16:
  726. fmt = DSI_PIXEL_FORMAT_RGB565;
  727. break;
  728. case 18:
  729. fmt = DSI_PIXEL_FORMAT_RGB666;
  730. break;
  731. case 24:
  732. default:
  733. fmt = DSI_PIXEL_FORMAT_RGB888;
  734. break;
  735. }
  736. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  737. packing = utils->get_property(utils->data,
  738. "qcom,mdss-dsi-pixel-packing",
  739. NULL);
  740. if (packing && !strcmp(packing, "loose"))
  741. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  742. }
  743. host->dst_format = fmt;
  744. return rc;
  745. }
  746. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  747. struct dsi_parser_utils *utils,
  748. const char *name)
  749. {
  750. int rc = 0;
  751. bool lane_enabled;
  752. u32 num_of_lanes = 0;
  753. lane_enabled = utils->read_bool(utils->data,
  754. "qcom,mdss-dsi-lane-0-state");
  755. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  756. lane_enabled = utils->read_bool(utils->data,
  757. "qcom,mdss-dsi-lane-1-state");
  758. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  759. lane_enabled = utils->read_bool(utils->data,
  760. "qcom,mdss-dsi-lane-2-state");
  761. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  762. lane_enabled = utils->read_bool(utils->data,
  763. "qcom,mdss-dsi-lane-3-state");
  764. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  765. if (host->data_lanes & DSI_DATA_LANE_0)
  766. num_of_lanes++;
  767. if (host->data_lanes & DSI_DATA_LANE_1)
  768. num_of_lanes++;
  769. if (host->data_lanes & DSI_DATA_LANE_2)
  770. num_of_lanes++;
  771. if (host->data_lanes & DSI_DATA_LANE_3)
  772. num_of_lanes++;
  773. host->num_data_lanes = num_of_lanes;
  774. if (host->data_lanes == 0) {
  775. pr_err("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  776. rc = -EINVAL;
  777. }
  778. return rc;
  779. }
  780. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  781. struct dsi_parser_utils *utils,
  782. const char *name)
  783. {
  784. int rc = 0;
  785. const char *swap_mode;
  786. swap_mode = utils->get_property(utils->data,
  787. "qcom,mdss-dsi-color-order", NULL);
  788. if (swap_mode) {
  789. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  790. host->swap_mode = DSI_COLOR_SWAP_RGB;
  791. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  792. host->swap_mode = DSI_COLOR_SWAP_RBG;
  793. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  794. host->swap_mode = DSI_COLOR_SWAP_BRG;
  795. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  796. host->swap_mode = DSI_COLOR_SWAP_GRB;
  797. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  798. host->swap_mode = DSI_COLOR_SWAP_GBR;
  799. } else {
  800. pr_err("[%s] Unrecognized color order-%s\n",
  801. name, swap_mode);
  802. rc = -EINVAL;
  803. }
  804. } else {
  805. pr_debug("[%s] Falling back to default color order\n", name);
  806. host->swap_mode = DSI_COLOR_SWAP_RGB;
  807. }
  808. /* bit swap on color channel is not defined in dt */
  809. host->bit_swap_red = false;
  810. host->bit_swap_green = false;
  811. host->bit_swap_blue = false;
  812. return rc;
  813. }
  814. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  815. struct dsi_parser_utils *utils,
  816. const char *name)
  817. {
  818. const char *trig;
  819. int rc = 0;
  820. trig = utils->get_property(utils->data,
  821. "qcom,mdss-dsi-mdp-trigger", NULL);
  822. if (trig) {
  823. if (!strcmp(trig, "none")) {
  824. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  825. } else if (!strcmp(trig, "trigger_te")) {
  826. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  827. } else if (!strcmp(trig, "trigger_sw")) {
  828. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  829. } else if (!strcmp(trig, "trigger_sw_te")) {
  830. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  831. } else {
  832. pr_err("[%s] Unrecognized mdp trigger type (%s)\n",
  833. name, trig);
  834. rc = -EINVAL;
  835. }
  836. } else {
  837. pr_debug("[%s] Falling back to default MDP trigger\n",
  838. name);
  839. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  840. }
  841. trig = utils->get_property(utils->data,
  842. "qcom,mdss-dsi-dma-trigger", NULL);
  843. if (trig) {
  844. if (!strcmp(trig, "none")) {
  845. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  846. } else if (!strcmp(trig, "trigger_te")) {
  847. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  848. } else if (!strcmp(trig, "trigger_sw")) {
  849. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  850. } else if (!strcmp(trig, "trigger_sw_seof")) {
  851. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  852. } else if (!strcmp(trig, "trigger_sw_te")) {
  853. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  854. } else {
  855. pr_err("[%s] Unrecognized mdp trigger type (%s)\n",
  856. name, trig);
  857. rc = -EINVAL;
  858. }
  859. } else {
  860. pr_debug("[%s] Falling back to default MDP trigger\n", name);
  861. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  862. }
  863. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  864. &host->te_mode);
  865. if (rc) {
  866. pr_warn("[%s] fallback to default te-pin-select\n", name);
  867. host->te_mode = 1;
  868. rc = 0;
  869. }
  870. return rc;
  871. }
  872. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  873. struct dsi_parser_utils *utils,
  874. const char *name)
  875. {
  876. u32 val = 0;
  877. int rc = 0;
  878. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  879. if (!rc) {
  880. host->t_clk_post = val;
  881. pr_debug("[%s] t_clk_post = %d\n", name, val);
  882. }
  883. val = 0;
  884. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  885. if (!rc) {
  886. host->t_clk_pre = val;
  887. pr_debug("[%s] t_clk_pre = %d\n", name, val);
  888. }
  889. host->ignore_rx_eot = utils->read_bool(utils->data,
  890. "qcom,mdss-dsi-rx-eot-ignore");
  891. host->append_tx_eot = utils->read_bool(utils->data,
  892. "qcom,mdss-dsi-tx-eot-append");
  893. host->ext_bridge_mode = utils->read_bool(utils->data,
  894. "qcom,mdss-dsi-ext-bridge-mode");
  895. host->force_hs_clk_lane = utils->read_bool(utils->data,
  896. "qcom,mdss-dsi-force-clock-lane-hs");
  897. return 0;
  898. }
  899. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  900. {
  901. int rc = 0;
  902. struct dsi_parser_utils *utils = &panel->utils;
  903. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  904. panel->name);
  905. if (rc) {
  906. pr_err("[%s] failed to get pixel format, rc=%d\n",
  907. panel->name, rc);
  908. goto error;
  909. }
  910. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  911. panel->name);
  912. if (rc) {
  913. pr_err("[%s] failed to parse lane states, rc=%d\n",
  914. panel->name, rc);
  915. goto error;
  916. }
  917. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  918. panel->name);
  919. if (rc) {
  920. pr_err("[%s] failed to parse color swap config, rc=%d\n",
  921. panel->name, rc);
  922. goto error;
  923. }
  924. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  925. panel->name);
  926. if (rc) {
  927. pr_err("[%s] failed to parse triggers, rc=%d\n",
  928. panel->name, rc);
  929. goto error;
  930. }
  931. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  932. panel->name);
  933. if (rc) {
  934. pr_err("[%s] failed to parse misc host config, rc=%d\n",
  935. panel->name, rc);
  936. goto error;
  937. }
  938. error:
  939. return rc;
  940. }
  941. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  942. struct device_node *of_node)
  943. {
  944. int rc = 0;
  945. u32 val = 0;
  946. rc = of_property_read_u32(of_node,
  947. "qcom,mdss-dsi-qsync-min-refresh-rate",
  948. &val);
  949. if (rc)
  950. pr_err("[%s] qsync min fps not defined rc:%d\n",
  951. panel->name, rc);
  952. panel->qsync_min_fps = val;
  953. return rc;
  954. }
  955. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  956. {
  957. int rc = 0;
  958. bool supported = false;
  959. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  960. struct dsi_parser_utils *utils = &panel->utils;
  961. const char *name = panel->name;
  962. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  963. if (!supported) {
  964. dyn_clk_caps->dyn_clk_support = false;
  965. return rc;
  966. }
  967. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  968. "qcom,dsi-dyn-clk-list");
  969. if (dyn_clk_caps->bit_clk_list_len < 1) {
  970. pr_err("[%s] failed to get supported bit clk list\n", name);
  971. return -EINVAL;
  972. }
  973. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  974. sizeof(u32), GFP_KERNEL);
  975. if (!dyn_clk_caps->bit_clk_list)
  976. return -ENOMEM;
  977. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  978. dyn_clk_caps->bit_clk_list,
  979. dyn_clk_caps->bit_clk_list_len);
  980. if (rc) {
  981. pr_err("[%s] failed to parse supported bit clk list\n", name);
  982. return -EINVAL;
  983. }
  984. dyn_clk_caps->dyn_clk_support = true;
  985. return 0;
  986. }
  987. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  988. {
  989. int rc = 0;
  990. bool supported = false;
  991. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  992. struct dsi_parser_utils *utils = &panel->utils;
  993. const char *name = panel->name;
  994. const char *type;
  995. u32 i;
  996. supported = utils->read_bool(utils->data,
  997. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  998. if (!supported) {
  999. pr_debug("[%s] DFPS is not supported\n", name);
  1000. dfps_caps->dfps_support = false;
  1001. return rc;
  1002. }
  1003. type = utils->get_property(utils->data,
  1004. "qcom,mdss-dsi-pan-fps-update", NULL);
  1005. if (!type) {
  1006. pr_err("[%s] dfps type not defined\n", name);
  1007. rc = -EINVAL;
  1008. goto error;
  1009. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1010. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1011. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1012. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1013. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1014. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1015. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1016. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1017. } else {
  1018. pr_err("[%s] dfps type is not recognized\n", name);
  1019. rc = -EINVAL;
  1020. goto error;
  1021. }
  1022. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1023. "qcom,dsi-supported-dfps-list");
  1024. if (dfps_caps->dfps_list_len < 1) {
  1025. pr_err("[%s] dfps refresh list not present\n", name);
  1026. rc = -EINVAL;
  1027. goto error;
  1028. }
  1029. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1030. GFP_KERNEL);
  1031. if (!dfps_caps->dfps_list) {
  1032. rc = -ENOMEM;
  1033. goto error;
  1034. }
  1035. rc = utils->read_u32_array(utils->data,
  1036. "qcom,dsi-supported-dfps-list",
  1037. dfps_caps->dfps_list,
  1038. dfps_caps->dfps_list_len);
  1039. if (rc) {
  1040. pr_err("[%s] dfps refresh rate list parse failed\n", name);
  1041. rc = -EINVAL;
  1042. goto error;
  1043. }
  1044. dfps_caps->dfps_support = true;
  1045. /* calculate max and min fps */
  1046. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1047. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1048. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1049. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1050. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1051. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1052. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1053. }
  1054. error:
  1055. return rc;
  1056. }
  1057. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1058. struct dsi_parser_utils *utils,
  1059. const char *name)
  1060. {
  1061. int rc = 0;
  1062. const char *traffic_mode;
  1063. u32 vc_id = 0;
  1064. u32 val = 0;
  1065. u32 line_no = 0;
  1066. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1067. if (rc) {
  1068. pr_debug("[%s] fallback to default h-sync-pulse\n", name);
  1069. cfg->pulse_mode_hsa_he = false;
  1070. } else if (val == 1) {
  1071. cfg->pulse_mode_hsa_he = true;
  1072. } else if (val == 0) {
  1073. cfg->pulse_mode_hsa_he = false;
  1074. } else {
  1075. pr_err("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1076. name);
  1077. rc = -EINVAL;
  1078. goto error;
  1079. }
  1080. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1081. "qcom,mdss-dsi-hfp-power-mode");
  1082. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1083. "qcom,mdss-dsi-hbp-power-mode");
  1084. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1085. "qcom,mdss-dsi-hsa-power-mode");
  1086. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1087. "qcom,mdss-dsi-last-line-interleave");
  1088. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1089. "qcom,mdss-dsi-bllp-eof-power-mode");
  1090. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1091. "qcom,mdss-dsi-bllp-power-mode");
  1092. cfg->force_clk_lane_hs = of_property_read_bool(utils->data,
  1093. "qcom,mdss-dsi-force-clock-lane-hs");
  1094. traffic_mode = utils->get_property(utils->data,
  1095. "qcom,mdss-dsi-traffic-mode",
  1096. NULL);
  1097. if (!traffic_mode) {
  1098. pr_debug("[%s] Falling back to default traffic mode\n", name);
  1099. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1100. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1101. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1102. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1103. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1104. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1105. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1106. } else {
  1107. pr_err("[%s] Unrecognized traffic mode-%s\n", name,
  1108. traffic_mode);
  1109. rc = -EINVAL;
  1110. goto error;
  1111. }
  1112. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1113. &vc_id);
  1114. if (rc) {
  1115. pr_debug("[%s] Fallback to default vc id\n", name);
  1116. cfg->vc_id = 0;
  1117. } else {
  1118. cfg->vc_id = vc_id;
  1119. }
  1120. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1121. &line_no);
  1122. if (rc) {
  1123. pr_debug("[%s] set default dma scheduling line no\n", name);
  1124. cfg->dma_sched_line = 0x1;
  1125. /* do not fail since we have default value */
  1126. rc = 0;
  1127. } else {
  1128. cfg->dma_sched_line = line_no;
  1129. }
  1130. error:
  1131. return rc;
  1132. }
  1133. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1134. struct dsi_parser_utils *utils,
  1135. const char *name)
  1136. {
  1137. u32 val = 0;
  1138. int rc = 0;
  1139. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1140. if (rc) {
  1141. pr_debug("[%s] Fallback to default wr-mem-start\n", name);
  1142. cfg->wr_mem_start = 0x2C;
  1143. } else {
  1144. cfg->wr_mem_start = val;
  1145. }
  1146. val = 0;
  1147. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1148. &val);
  1149. if (rc) {
  1150. pr_debug("[%s] Fallback to default wr-mem-continue\n", name);
  1151. cfg->wr_mem_continue = 0x3C;
  1152. } else {
  1153. cfg->wr_mem_continue = val;
  1154. }
  1155. /* TODO: fix following */
  1156. cfg->max_cmd_packets_interleave = 0;
  1157. val = 0;
  1158. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1159. &val);
  1160. if (rc) {
  1161. pr_debug("[%s] fallback to default te-dcs-cmd\n", name);
  1162. cfg->insert_dcs_command = true;
  1163. } else if (val == 1) {
  1164. cfg->insert_dcs_command = true;
  1165. } else if (val == 0) {
  1166. cfg->insert_dcs_command = false;
  1167. } else {
  1168. pr_err("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1169. name);
  1170. rc = -EINVAL;
  1171. goto error;
  1172. }
  1173. error:
  1174. return rc;
  1175. }
  1176. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1177. {
  1178. int rc = 0;
  1179. struct dsi_parser_utils *utils = &panel->utils;
  1180. bool panel_mode_switch_enabled;
  1181. enum dsi_op_mode panel_mode;
  1182. const char *mode;
  1183. mode = utils->get_property(utils->data,
  1184. "qcom,mdss-dsi-panel-type", NULL);
  1185. if (!mode) {
  1186. pr_debug("[%s] Fallback to default panel mode\n", panel->name);
  1187. panel_mode = DSI_OP_VIDEO_MODE;
  1188. } else if (!strcmp(mode, "dsi_video_mode")) {
  1189. panel_mode = DSI_OP_VIDEO_MODE;
  1190. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1191. panel_mode = DSI_OP_CMD_MODE;
  1192. } else {
  1193. pr_err("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1194. rc = -EINVAL;
  1195. goto error;
  1196. }
  1197. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1198. "qcom,mdss-dsi-panel-mode-switch");
  1199. pr_info("%s: panel operating mode switch feature %s\n", __func__,
  1200. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1201. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1202. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1203. utils,
  1204. panel->name);
  1205. if (rc) {
  1206. pr_err("[%s] Failed to parse video host cfg, rc=%d\n",
  1207. panel->name, rc);
  1208. goto error;
  1209. }
  1210. }
  1211. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1212. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1213. utils,
  1214. panel->name);
  1215. if (rc) {
  1216. pr_err("[%s] Failed to parse cmd host config, rc=%d\n",
  1217. panel->name, rc);
  1218. goto error;
  1219. }
  1220. }
  1221. panel->panel_mode = panel_mode;
  1222. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1223. error:
  1224. return rc;
  1225. }
  1226. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1227. {
  1228. int rc = 0;
  1229. u32 val = 0;
  1230. const char *str;
  1231. struct dsi_panel_phy_props *props = &panel->phy_props;
  1232. struct dsi_parser_utils *utils = &panel->utils;
  1233. const char *name = panel->name;
  1234. rc = utils->read_u32(utils->data,
  1235. "qcom,mdss-pan-physical-width-dimension", &val);
  1236. if (rc) {
  1237. pr_debug("[%s] Physical panel width is not defined\n", name);
  1238. props->panel_width_mm = 0;
  1239. rc = 0;
  1240. } else {
  1241. props->panel_width_mm = val;
  1242. }
  1243. rc = utils->read_u32(utils->data,
  1244. "qcom,mdss-pan-physical-height-dimension",
  1245. &val);
  1246. if (rc) {
  1247. pr_debug("[%s] Physical panel height is not defined\n", name);
  1248. props->panel_height_mm = 0;
  1249. rc = 0;
  1250. } else {
  1251. props->panel_height_mm = val;
  1252. }
  1253. str = utils->get_property(utils->data,
  1254. "qcom,mdss-dsi-panel-orientation", NULL);
  1255. if (!str) {
  1256. props->rotation = DSI_PANEL_ROTATE_NONE;
  1257. } else if (!strcmp(str, "180")) {
  1258. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1259. } else if (!strcmp(str, "hflip")) {
  1260. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1261. } else if (!strcmp(str, "vflip")) {
  1262. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1263. } else {
  1264. pr_err("[%s] Unrecognized panel rotation-%s\n", name, str);
  1265. rc = -EINVAL;
  1266. goto error;
  1267. }
  1268. error:
  1269. return rc;
  1270. }
  1271. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1272. "qcom,mdss-dsi-pre-on-command",
  1273. "qcom,mdss-dsi-on-command",
  1274. "qcom,mdss-dsi-post-panel-on-command",
  1275. "qcom,mdss-dsi-pre-off-command",
  1276. "qcom,mdss-dsi-off-command",
  1277. "qcom,mdss-dsi-post-off-command",
  1278. "qcom,mdss-dsi-pre-res-switch",
  1279. "qcom,mdss-dsi-res-switch",
  1280. "qcom,mdss-dsi-post-res-switch",
  1281. "qcom,cmd-to-video-mode-switch-commands",
  1282. "qcom,cmd-to-video-mode-post-switch-commands",
  1283. "qcom,video-to-cmd-mode-switch-commands",
  1284. "qcom,video-to-cmd-mode-post-switch-commands",
  1285. "qcom,mdss-dsi-panel-status-command",
  1286. "qcom,mdss-dsi-lp1-command",
  1287. "qcom,mdss-dsi-lp2-command",
  1288. "qcom,mdss-dsi-nolp-command",
  1289. "PPS not parsed from DTSI, generated dynamically",
  1290. "ROI not parsed from DTSI, generated dynamically",
  1291. "qcom,mdss-dsi-timing-switch-command",
  1292. "qcom,mdss-dsi-post-mode-switch-on-command",
  1293. "qcom,mdss-dsi-qsync-on-commands",
  1294. "qcom,mdss-dsi-qsync-off-commands",
  1295. };
  1296. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1297. "qcom,mdss-dsi-pre-on-command-state",
  1298. "qcom,mdss-dsi-on-command-state",
  1299. "qcom,mdss-dsi-post-on-command-state",
  1300. "qcom,mdss-dsi-pre-off-command-state",
  1301. "qcom,mdss-dsi-off-command-state",
  1302. "qcom,mdss-dsi-post-off-command-state",
  1303. "qcom,mdss-dsi-pre-res-switch-state",
  1304. "qcom,mdss-dsi-res-switch-state",
  1305. "qcom,mdss-dsi-post-res-switch-state",
  1306. "qcom,cmd-to-video-mode-switch-commands-state",
  1307. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1308. "qcom,video-to-cmd-mode-switch-commands-state",
  1309. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1310. "qcom,mdss-dsi-panel-status-command-state",
  1311. "qcom,mdss-dsi-lp1-command-state",
  1312. "qcom,mdss-dsi-lp2-command-state",
  1313. "qcom,mdss-dsi-nolp-command-state",
  1314. "PPS not parsed from DTSI, generated dynamically",
  1315. "ROI not parsed from DTSI, generated dynamically",
  1316. "qcom,mdss-dsi-timing-switch-command-state",
  1317. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1318. "qcom,mdss-dsi-qsync-on-commands-state",
  1319. "qcom,mdss-dsi-qsync-off-commands-state",
  1320. };
  1321. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1322. {
  1323. const u32 cmd_set_min_size = 7;
  1324. u32 count = 0;
  1325. u32 packet_length;
  1326. u32 tmp;
  1327. while (length >= cmd_set_min_size) {
  1328. packet_length = cmd_set_min_size;
  1329. tmp = ((data[5] << 8) | (data[6]));
  1330. packet_length += tmp;
  1331. if (packet_length > length) {
  1332. pr_err("format error\n");
  1333. return -EINVAL;
  1334. }
  1335. length -= packet_length;
  1336. data += packet_length;
  1337. count++;
  1338. }
  1339. *cnt = count;
  1340. return 0;
  1341. }
  1342. static int dsi_panel_create_cmd_packets(const char *data,
  1343. u32 length,
  1344. u32 count,
  1345. struct dsi_cmd_desc *cmd)
  1346. {
  1347. int rc = 0;
  1348. int i, j;
  1349. u8 *payload;
  1350. for (i = 0; i < count; i++) {
  1351. u32 size;
  1352. cmd[i].msg.type = data[0];
  1353. cmd[i].last_command = (data[1] == 1);
  1354. cmd[i].msg.channel = data[2];
  1355. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1356. cmd[i].msg.ctrl = 0;
  1357. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1358. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1359. size = cmd[i].msg.tx_len * sizeof(u8);
  1360. payload = kzalloc(size, GFP_KERNEL);
  1361. if (!payload) {
  1362. rc = -ENOMEM;
  1363. goto error_free_payloads;
  1364. }
  1365. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1366. payload[j] = data[7 + j];
  1367. cmd[i].msg.tx_buf = payload;
  1368. data += (7 + cmd[i].msg.tx_len);
  1369. }
  1370. return rc;
  1371. error_free_payloads:
  1372. for (i = i - 1; i >= 0; i--) {
  1373. cmd--;
  1374. kfree(cmd->msg.tx_buf);
  1375. }
  1376. return rc;
  1377. }
  1378. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1379. {
  1380. u32 i = 0;
  1381. struct dsi_cmd_desc *cmd;
  1382. for (i = 0; i < set->count; i++) {
  1383. cmd = &set->cmds[i];
  1384. kfree(cmd->msg.tx_buf);
  1385. }
  1386. }
  1387. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1388. {
  1389. kfree(set->cmds);
  1390. }
  1391. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1392. u32 packet_count)
  1393. {
  1394. u32 size;
  1395. size = packet_count * sizeof(*cmd->cmds);
  1396. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1397. if (!cmd->cmds)
  1398. return -ENOMEM;
  1399. cmd->count = packet_count;
  1400. return 0;
  1401. }
  1402. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1403. enum dsi_cmd_set_type type,
  1404. struct dsi_parser_utils *utils)
  1405. {
  1406. int rc = 0;
  1407. u32 length = 0;
  1408. const char *data;
  1409. const char *state;
  1410. u32 packet_count = 0;
  1411. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1412. &length);
  1413. if (!data) {
  1414. pr_debug("%s commands not defined\n", cmd_set_prop_map[type]);
  1415. rc = -ENOTSUPP;
  1416. goto error;
  1417. }
  1418. pr_debug("type=%d, name=%s, length=%d\n", type,
  1419. cmd_set_prop_map[type], length);
  1420. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1421. 8, 1, data, length, false);
  1422. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1423. if (rc) {
  1424. pr_err("commands failed, rc=%d\n", rc);
  1425. goto error;
  1426. }
  1427. pr_debug("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1428. packet_count, length);
  1429. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1430. if (rc) {
  1431. pr_err("failed to allocate cmd packets, rc=%d\n", rc);
  1432. goto error;
  1433. }
  1434. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1435. cmd->cmds);
  1436. if (rc) {
  1437. pr_err("failed to create cmd packets, rc=%d\n", rc);
  1438. goto error_free_mem;
  1439. }
  1440. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1441. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1442. cmd->state = DSI_CMD_SET_STATE_LP;
  1443. } else if (!strcmp(state, "dsi_hs_mode")) {
  1444. cmd->state = DSI_CMD_SET_STATE_HS;
  1445. } else {
  1446. pr_err("[%s] command state unrecognized-%s\n",
  1447. cmd_set_state_map[type], state);
  1448. goto error_free_mem;
  1449. }
  1450. return rc;
  1451. error_free_mem:
  1452. kfree(cmd->cmds);
  1453. cmd->cmds = NULL;
  1454. error:
  1455. return rc;
  1456. }
  1457. static int dsi_panel_parse_cmd_sets(
  1458. struct dsi_display_mode_priv_info *priv_info,
  1459. struct dsi_parser_utils *utils)
  1460. {
  1461. int rc = 0;
  1462. struct dsi_panel_cmd_set *set;
  1463. u32 i;
  1464. if (!priv_info) {
  1465. pr_err("invalid mode priv info\n");
  1466. return -EINVAL;
  1467. }
  1468. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1469. set = &priv_info->cmd_sets[i];
  1470. set->type = i;
  1471. set->count = 0;
  1472. if (i == DSI_CMD_SET_PPS) {
  1473. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1474. if (rc)
  1475. pr_err("failed to allocate cmd set %d, rc = %d\n",
  1476. i, rc);
  1477. set->state = DSI_CMD_SET_STATE_LP;
  1478. } else {
  1479. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1480. if (rc)
  1481. pr_debug("failed to parse set %d\n", i);
  1482. }
  1483. }
  1484. rc = 0;
  1485. return rc;
  1486. }
  1487. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1488. {
  1489. int rc = 0;
  1490. int i;
  1491. u32 length = 0;
  1492. u32 count = 0;
  1493. u32 size = 0;
  1494. u32 *arr_32 = NULL;
  1495. const u32 *arr;
  1496. struct dsi_parser_utils *utils = &panel->utils;
  1497. struct dsi_reset_seq *seq;
  1498. if (panel->host_config.ext_bridge_mode)
  1499. return 0;
  1500. arr = utils->get_property(utils->data,
  1501. "qcom,mdss-dsi-reset-sequence", &length);
  1502. if (!arr) {
  1503. pr_err("[%s] dsi-reset-sequence not found\n", panel->name);
  1504. rc = -EINVAL;
  1505. goto error;
  1506. }
  1507. if (length & 0x1) {
  1508. pr_err("[%s] syntax error for dsi-reset-sequence\n",
  1509. panel->name);
  1510. rc = -EINVAL;
  1511. goto error;
  1512. }
  1513. pr_err("RESET SEQ LENGTH = %d\n", length);
  1514. length = length / sizeof(u32);
  1515. size = length * sizeof(u32);
  1516. arr_32 = kzalloc(size, GFP_KERNEL);
  1517. if (!arr_32) {
  1518. rc = -ENOMEM;
  1519. goto error;
  1520. }
  1521. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1522. arr_32, length);
  1523. if (rc) {
  1524. pr_err("[%s] cannot read dso-reset-seqience\n", panel->name);
  1525. goto error_free_arr_32;
  1526. }
  1527. count = length / 2;
  1528. size = count * sizeof(*seq);
  1529. seq = kzalloc(size, GFP_KERNEL);
  1530. if (!seq) {
  1531. rc = -ENOMEM;
  1532. goto error_free_arr_32;
  1533. }
  1534. panel->reset_config.sequence = seq;
  1535. panel->reset_config.count = count;
  1536. for (i = 0; i < length; i += 2) {
  1537. seq->level = arr_32[i];
  1538. seq->sleep_ms = arr_32[i + 1];
  1539. seq++;
  1540. }
  1541. error_free_arr_32:
  1542. kfree(arr_32);
  1543. error:
  1544. return rc;
  1545. }
  1546. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1547. {
  1548. struct dsi_parser_utils *utils = &panel->utils;
  1549. panel->ulps_feature_enabled =
  1550. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1551. pr_info("%s: ulps feature %s\n", __func__,
  1552. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1553. panel->ulps_suspend_enabled =
  1554. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1555. pr_info("%s: ulps during suspend feature %s\n", __func__,
  1556. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1557. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1558. "qcom,mdss-dsi-te-using-wd");
  1559. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1560. "qcom,cmd-sync-wait-broadcast");
  1561. panel->lp11_init = utils->read_bool(utils->data,
  1562. "qcom,mdss-dsi-lp11-init");
  1563. return 0;
  1564. }
  1565. static int dsi_panel_parse_jitter_config(
  1566. struct dsi_display_mode *mode,
  1567. struct dsi_parser_utils *utils)
  1568. {
  1569. int rc;
  1570. struct dsi_display_mode_priv_info *priv_info;
  1571. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1572. u64 jitter_val = 0;
  1573. priv_info = mode->priv_info;
  1574. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1575. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1576. if (rc) {
  1577. pr_debug("panel jitter not defined rc=%d\n", rc);
  1578. } else {
  1579. jitter_val = jitter[0];
  1580. jitter_val = div_u64(jitter_val, jitter[1]);
  1581. }
  1582. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1583. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1584. priv_info->panel_jitter_denom =
  1585. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1586. } else {
  1587. priv_info->panel_jitter_numer = jitter[0];
  1588. priv_info->panel_jitter_denom = jitter[1];
  1589. }
  1590. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1591. &priv_info->panel_prefill_lines);
  1592. if (rc) {
  1593. pr_debug("panel prefill lines are not defined rc=%d\n", rc);
  1594. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1595. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1596. } else if (priv_info->panel_prefill_lines >=
  1597. DSI_V_TOTAL(&mode->timing)) {
  1598. pr_debug("invalid prefill lines config=%d setting to:%d\n",
  1599. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1600. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1601. }
  1602. return 0;
  1603. }
  1604. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1605. {
  1606. int rc = 0;
  1607. char *supply_name;
  1608. if (panel->host_config.ext_bridge_mode)
  1609. return 0;
  1610. if (!strcmp(panel->type, "primary"))
  1611. supply_name = "qcom,panel-supply-entries";
  1612. else
  1613. supply_name = "qcom,panel-sec-supply-entries";
  1614. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1615. &panel->power_info, supply_name);
  1616. if (rc) {
  1617. pr_err("[%s] failed to parse vregs\n", panel->name);
  1618. goto error;
  1619. }
  1620. error:
  1621. return rc;
  1622. }
  1623. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1624. {
  1625. int rc = 0;
  1626. const char *data;
  1627. struct dsi_parser_utils *utils = &panel->utils;
  1628. char *reset_gpio_name, *mode_set_gpio_name;
  1629. if (!strcmp(panel->type, "primary")) {
  1630. reset_gpio_name = "qcom,platform-reset-gpio";
  1631. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1632. } else {
  1633. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1634. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1635. }
  1636. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1637. reset_gpio_name, 0);
  1638. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1639. !panel->host_config.ext_bridge_mode) {
  1640. rc = panel->reset_config.reset_gpio;
  1641. pr_err("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1642. goto error;
  1643. }
  1644. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1645. "qcom,5v-boost-gpio",
  1646. 0);
  1647. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1648. pr_debug("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1649. panel->name, rc);
  1650. panel->reset_config.disp_en_gpio =
  1651. utils->get_named_gpio(utils->data,
  1652. "qcom,platform-en-gpio", 0);
  1653. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1654. pr_debug("[%s] platform-en-gpio is not set, rc=%d\n",
  1655. panel->name, rc);
  1656. }
  1657. }
  1658. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1659. utils->data, mode_set_gpio_name, 0);
  1660. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1661. pr_debug("%s:%d mode gpio not specified\n", __func__, __LINE__);
  1662. pr_debug("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1663. data = utils->get_property(utils->data,
  1664. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1665. if (data) {
  1666. if (!strcmp(data, "single_port"))
  1667. panel->reset_config.mode_sel_state =
  1668. MODE_SEL_SINGLE_PORT;
  1669. else if (!strcmp(data, "dual_port"))
  1670. panel->reset_config.mode_sel_state =
  1671. MODE_SEL_DUAL_PORT;
  1672. else if (!strcmp(data, "high"))
  1673. panel->reset_config.mode_sel_state =
  1674. MODE_GPIO_HIGH;
  1675. else if (!strcmp(data, "low"))
  1676. panel->reset_config.mode_sel_state =
  1677. MODE_GPIO_LOW;
  1678. } else {
  1679. /* Set default mode as SPLIT mode */
  1680. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1681. }
  1682. /* TODO: release memory */
  1683. rc = dsi_panel_parse_reset_sequence(panel);
  1684. if (rc) {
  1685. pr_err("[%s] failed to parse reset sequence, rc=%d\n",
  1686. panel->name, rc);
  1687. goto error;
  1688. }
  1689. error:
  1690. return rc;
  1691. }
  1692. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1693. {
  1694. int rc = 0;
  1695. u32 val;
  1696. struct dsi_backlight_config *config = &panel->bl_config;
  1697. struct dsi_parser_utils *utils = &panel->utils;
  1698. rc = utils->read_u32(utils->data, "qcom,dsi-bl-pmic-bank-select",
  1699. &val);
  1700. if (rc) {
  1701. pr_err("bl-pmic-bank-select is not defined, rc=%d\n", rc);
  1702. goto error;
  1703. }
  1704. config->pwm_pmic_bank = val;
  1705. rc = utils->read_u32(utils->data, "qcom,dsi-bl-pmic-pwm-frequency",
  1706. &val);
  1707. if (rc) {
  1708. pr_err("bl-pmic-bank-select is not defined, rc=%d\n", rc);
  1709. goto error;
  1710. }
  1711. config->pwm_period_usecs = val;
  1712. config->pwm_pmi_control = utils->read_bool(utils->data,
  1713. "qcom,mdss-dsi-bl-pwm-pmi");
  1714. config->pwm_gpio = utils->get_named_gpio(utils->data,
  1715. "qcom,mdss-dsi-pwm-gpio",
  1716. 0);
  1717. if (!gpio_is_valid(config->pwm_gpio)) {
  1718. pr_err("pwm gpio is invalid\n");
  1719. rc = -EINVAL;
  1720. goto error;
  1721. }
  1722. error:
  1723. return rc;
  1724. }
  1725. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1726. {
  1727. int rc = 0;
  1728. u32 val = 0;
  1729. const char *bl_type;
  1730. const char *data;
  1731. struct dsi_parser_utils *utils = &panel->utils;
  1732. char *bl_name;
  1733. if (!strcmp(panel->type, "primary"))
  1734. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1735. else
  1736. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1737. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1738. if (!bl_type) {
  1739. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1740. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1741. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1742. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1743. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1744. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1745. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1746. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1747. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1748. } else {
  1749. pr_debug("[%s] bl-pmic-control-type unknown-%s\n",
  1750. panel->name, bl_type);
  1751. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1752. }
  1753. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1754. if (!data) {
  1755. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1756. } else if (!strcmp(data, "delay_until_first_frame")) {
  1757. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1758. } else {
  1759. pr_debug("[%s] No valid bl-update-flag: %s\n",
  1760. panel->name, data);
  1761. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1762. }
  1763. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1764. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1765. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1766. if (rc) {
  1767. pr_debug("[%s] bl-min-level unspecified, defaulting to zero\n",
  1768. panel->name);
  1769. panel->bl_config.bl_min_level = 0;
  1770. } else {
  1771. panel->bl_config.bl_min_level = val;
  1772. }
  1773. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1774. if (rc) {
  1775. pr_debug("[%s] bl-max-level unspecified, defaulting to max level\n",
  1776. panel->name);
  1777. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1778. } else {
  1779. panel->bl_config.bl_max_level = val;
  1780. }
  1781. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1782. &val);
  1783. if (rc) {
  1784. pr_debug("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1785. panel->name);
  1786. panel->bl_config.brightness_max_level = 255;
  1787. } else {
  1788. panel->bl_config.brightness_max_level = val;
  1789. }
  1790. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1791. rc = dsi_panel_parse_bl_pwm_config(panel);
  1792. if (rc) {
  1793. pr_err("[%s] failed to parse pwm config, rc=%d\n",
  1794. panel->name, rc);
  1795. goto error;
  1796. }
  1797. }
  1798. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1799. "qcom,platform-bklight-en-gpio",
  1800. 0);
  1801. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1802. pr_debug("[%s] failed get bklt gpio, rc=%d\n", panel->name, rc);
  1803. rc = 0;
  1804. goto error;
  1805. }
  1806. error:
  1807. return rc;
  1808. }
  1809. void dsi_dsc_pclk_param_calc(struct msm_display_dsc_info *dsc, int intf_width)
  1810. {
  1811. int slice_per_pkt, slice_per_intf;
  1812. int bytes_in_slice, total_bytes_per_intf;
  1813. if (!dsc || !dsc->slice_width || !dsc->slice_per_pkt ||
  1814. (intf_width < dsc->slice_width)) {
  1815. pr_err("invalid input, intf_width=%d slice_width=%d\n",
  1816. intf_width, dsc ? dsc->slice_width : -1);
  1817. return;
  1818. }
  1819. slice_per_pkt = dsc->slice_per_pkt;
  1820. slice_per_intf = DIV_ROUND_UP(intf_width, dsc->slice_width);
  1821. /*
  1822. * If slice_per_pkt is greater than slice_per_intf then default to 1.
  1823. * This can happen during partial update.
  1824. */
  1825. if (slice_per_pkt > slice_per_intf)
  1826. slice_per_pkt = 1;
  1827. bytes_in_slice = DIV_ROUND_UP(dsc->slice_width * dsc->bpp, 8);
  1828. total_bytes_per_intf = bytes_in_slice * slice_per_intf;
  1829. dsc->eol_byte_num = total_bytes_per_intf % 3;
  1830. dsc->pclk_per_line = DIV_ROUND_UP(total_bytes_per_intf, 3);
  1831. dsc->bytes_in_slice = bytes_in_slice;
  1832. dsc->bytes_per_pkt = bytes_in_slice * slice_per_pkt;
  1833. dsc->pkt_per_line = slice_per_intf / slice_per_pkt;
  1834. }
  1835. int dsi_dsc_populate_static_param(struct msm_display_dsc_info *dsc)
  1836. {
  1837. int bpp, bpc;
  1838. int mux_words_size;
  1839. int groups_per_line, groups_total;
  1840. int min_rate_buffer_size;
  1841. int hrd_delay;
  1842. int pre_num_extra_mux_bits, num_extra_mux_bits;
  1843. int slice_bits;
  1844. int data;
  1845. int final_value, final_scale;
  1846. int ratio_index, mod_offset;
  1847. dsc->rc_model_size = 8192;
  1848. if (dsc->version == 0x11 && dsc->scr_rev == 0x1)
  1849. dsc->first_line_bpg_offset = 15;
  1850. else
  1851. dsc->first_line_bpg_offset = 12;
  1852. dsc->edge_factor = 6;
  1853. dsc->tgt_offset_hi = 3;
  1854. dsc->tgt_offset_lo = 3;
  1855. dsc->enable_422 = 0;
  1856. dsc->convert_rgb = 1;
  1857. dsc->vbr_enable = 0;
  1858. dsc->buf_thresh = dsi_dsc_rc_buf_thresh;
  1859. bpp = dsc->bpp;
  1860. bpc = dsc->bpc;
  1861. if ((bpc == 12) && (bpp == 8))
  1862. ratio_index = DSC_12BPC_8BPP;
  1863. else if ((bpc == 10) && (bpp == 8))
  1864. ratio_index = DSC_10BPC_8BPP;
  1865. else if ((bpc == 10) && (bpp == 10))
  1866. ratio_index = DSC_10BPC_10BPP;
  1867. else
  1868. ratio_index = DSC_8BPC_8BPP;
  1869. if (dsc->version == 0x11 && dsc->scr_rev == 0x1) {
  1870. dsc->range_min_qp =
  1871. dsi_dsc_rc_range_min_qp_1_1_scr1[ratio_index];
  1872. dsc->range_max_qp =
  1873. dsi_dsc_rc_range_max_qp_1_1_scr1[ratio_index];
  1874. } else {
  1875. dsc->range_min_qp = dsi_dsc_rc_range_min_qp_1_1[ratio_index];
  1876. dsc->range_max_qp = dsi_dsc_rc_range_max_qp_1_1[ratio_index];
  1877. }
  1878. dsc->range_bpg_offset = dsi_dsc_rc_range_bpg_offset;
  1879. if (bpp == 8) {
  1880. dsc->initial_offset = 6144;
  1881. dsc->initial_xmit_delay = 512;
  1882. } else if (bpp == 10) {
  1883. dsc->initial_offset = 5632;
  1884. dsc->initial_xmit_delay = 410;
  1885. } else {
  1886. dsc->initial_offset = 2048;
  1887. dsc->initial_xmit_delay = 341;
  1888. }
  1889. dsc->line_buf_depth = bpc + 1;
  1890. if (bpc == 8) {
  1891. dsc->input_10_bits = 0;
  1892. dsc->min_qp_flatness = 3;
  1893. dsc->max_qp_flatness = 12;
  1894. dsc->quant_incr_limit0 = 11;
  1895. dsc->quant_incr_limit1 = 11;
  1896. mux_words_size = 48;
  1897. } else if (bpc == 10) { /* 10bpc */
  1898. dsc->input_10_bits = 1;
  1899. dsc->min_qp_flatness = 7;
  1900. dsc->max_qp_flatness = 16;
  1901. dsc->quant_incr_limit0 = 15;
  1902. dsc->quant_incr_limit1 = 15;
  1903. mux_words_size = 48;
  1904. } else { /* 12 bpc */
  1905. dsc->input_10_bits = 0;
  1906. dsc->min_qp_flatness = 11;
  1907. dsc->max_qp_flatness = 20;
  1908. dsc->quant_incr_limit0 = 19;
  1909. dsc->quant_incr_limit1 = 19;
  1910. mux_words_size = 64;
  1911. }
  1912. mod_offset = dsc->slice_width % 3;
  1913. switch (mod_offset) {
  1914. case 0:
  1915. dsc->slice_last_group_size = 2;
  1916. break;
  1917. case 1:
  1918. dsc->slice_last_group_size = 0;
  1919. break;
  1920. case 2:
  1921. dsc->slice_last_group_size = 1;
  1922. break;
  1923. default:
  1924. break;
  1925. }
  1926. dsc->det_thresh_flatness = 2 << (bpc - 8);
  1927. groups_per_line = DIV_ROUND_UP(dsc->slice_width, 3);
  1928. dsc->chunk_size = dsc->slice_width * bpp / 8;
  1929. if ((dsc->slice_width * bpp) % 8)
  1930. dsc->chunk_size++;
  1931. /* rbs-min */
  1932. min_rate_buffer_size = dsc->rc_model_size - dsc->initial_offset +
  1933. dsc->initial_xmit_delay * bpp +
  1934. groups_per_line * dsc->first_line_bpg_offset;
  1935. hrd_delay = DIV_ROUND_UP(min_rate_buffer_size, bpp);
  1936. dsc->initial_dec_delay = hrd_delay - dsc->initial_xmit_delay;
  1937. dsc->initial_scale_value = 8 * dsc->rc_model_size /
  1938. (dsc->rc_model_size - dsc->initial_offset);
  1939. slice_bits = 8 * dsc->chunk_size * dsc->slice_height;
  1940. groups_total = groups_per_line * dsc->slice_height;
  1941. data = dsc->first_line_bpg_offset * 2048;
  1942. dsc->nfl_bpg_offset = DIV_ROUND_UP(data, (dsc->slice_height - 1));
  1943. pre_num_extra_mux_bits = 3 * (mux_words_size + (4 * bpc + 4) - 2);
  1944. num_extra_mux_bits = pre_num_extra_mux_bits - (mux_words_size -
  1945. ((slice_bits - pre_num_extra_mux_bits) % mux_words_size));
  1946. data = 2048 * (dsc->rc_model_size - dsc->initial_offset
  1947. + num_extra_mux_bits);
  1948. dsc->slice_bpg_offset = DIV_ROUND_UP(data, groups_total);
  1949. data = dsc->initial_xmit_delay * bpp;
  1950. final_value = dsc->rc_model_size - data + num_extra_mux_bits;
  1951. final_scale = 8 * dsc->rc_model_size /
  1952. (dsc->rc_model_size - final_value);
  1953. dsc->final_offset = final_value;
  1954. data = (final_scale - 9) * (dsc->nfl_bpg_offset +
  1955. dsc->slice_bpg_offset);
  1956. dsc->scale_increment_interval = (2048 * dsc->final_offset) / data;
  1957. dsc->scale_decrement_interval = groups_per_line /
  1958. (dsc->initial_scale_value - 8);
  1959. return 0;
  1960. }
  1961. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  1962. struct dsi_parser_utils *utils)
  1963. {
  1964. const char *data;
  1965. u32 len, i;
  1966. int rc = 0;
  1967. struct dsi_display_mode_priv_info *priv_info;
  1968. priv_info = mode->priv_info;
  1969. data = utils->get_property(utils->data,
  1970. "qcom,mdss-dsi-panel-phy-timings", &len);
  1971. if (!data) {
  1972. pr_debug("Unable to read Phy timing settings\n");
  1973. } else {
  1974. priv_info->phy_timing_val =
  1975. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  1976. if (!priv_info->phy_timing_val)
  1977. return -EINVAL;
  1978. for (i = 0; i < len; i++)
  1979. priv_info->phy_timing_val[i] = data[i];
  1980. priv_info->phy_timing_len = len;
  1981. }
  1982. mode->pixel_clk_khz = (DSI_H_TOTAL_DSC(&mode->timing) *
  1983. DSI_V_TOTAL(&mode->timing) *
  1984. mode->timing.refresh_rate) / 1000;
  1985. return rc;
  1986. }
  1987. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  1988. struct dsi_parser_utils *utils)
  1989. {
  1990. u32 data;
  1991. int rc = -EINVAL;
  1992. int intf_width;
  1993. const char *compression;
  1994. struct dsi_display_mode_priv_info *priv_info;
  1995. if (!mode || !mode->priv_info)
  1996. return -EINVAL;
  1997. priv_info = mode->priv_info;
  1998. priv_info->dsc_enabled = false;
  1999. compression = utils->get_property(utils->data,
  2000. "qcom,compression-mode", NULL);
  2001. if (compression && !strcmp(compression, "dsc"))
  2002. priv_info->dsc_enabled = true;
  2003. if (!priv_info->dsc_enabled) {
  2004. pr_debug("dsc compression is not enabled for the mode\n");
  2005. return 0;
  2006. }
  2007. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2008. if (rc) {
  2009. priv_info->dsc.version = 0x11;
  2010. rc = 0;
  2011. } else {
  2012. priv_info->dsc.version = data & 0xff;
  2013. /* only support DSC 1.1 rev */
  2014. if (priv_info->dsc.version != 0x11) {
  2015. pr_err("%s: DSC version:%d not supported\n", __func__,
  2016. priv_info->dsc.version);
  2017. rc = -EINVAL;
  2018. goto error;
  2019. }
  2020. }
  2021. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2022. if (rc) {
  2023. priv_info->dsc.scr_rev = 0x0;
  2024. rc = 0;
  2025. } else {
  2026. priv_info->dsc.scr_rev = data & 0xff;
  2027. /* only one scr rev supported */
  2028. if (priv_info->dsc.scr_rev > 0x1) {
  2029. pr_err("%s: DSC scr version:%d not supported\n",
  2030. __func__, priv_info->dsc.scr_rev);
  2031. rc = -EINVAL;
  2032. goto error;
  2033. }
  2034. }
  2035. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2036. if (rc) {
  2037. pr_err("failed to parse qcom,mdss-dsc-slice-height\n");
  2038. goto error;
  2039. }
  2040. priv_info->dsc.slice_height = data;
  2041. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2042. if (rc) {
  2043. pr_err("failed to parse qcom,mdss-dsc-slice-width\n");
  2044. goto error;
  2045. }
  2046. priv_info->dsc.slice_width = data;
  2047. intf_width = mode->timing.h_active;
  2048. if (intf_width % priv_info->dsc.slice_width) {
  2049. pr_err("invalid slice width for the intf width:%d slice width:%d\n",
  2050. intf_width, priv_info->dsc.slice_width);
  2051. rc = -EINVAL;
  2052. goto error;
  2053. }
  2054. priv_info->dsc.pic_width = mode->timing.h_active;
  2055. priv_info->dsc.pic_height = mode->timing.v_active;
  2056. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2057. if (rc) {
  2058. pr_err("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2059. goto error;
  2060. } else if (!data || (data > 2)) {
  2061. pr_err("invalid dsc slice-per-pkt:%d\n", data);
  2062. goto error;
  2063. }
  2064. priv_info->dsc.slice_per_pkt = data;
  2065. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2066. &data);
  2067. if (rc) {
  2068. pr_err("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2069. goto error;
  2070. }
  2071. priv_info->dsc.bpc = data;
  2072. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2073. &data);
  2074. if (rc) {
  2075. pr_err("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2076. goto error;
  2077. }
  2078. priv_info->dsc.bpp = data;
  2079. priv_info->dsc.block_pred_enable = utils->read_bool(utils->data,
  2080. "qcom,mdss-dsc-block-prediction-enable");
  2081. priv_info->dsc.full_frame_slices = DIV_ROUND_UP(intf_width,
  2082. priv_info->dsc.slice_width);
  2083. dsi_dsc_populate_static_param(&priv_info->dsc);
  2084. dsi_dsc_pclk_param_calc(&priv_info->dsc, intf_width);
  2085. mode->timing.dsc_enabled = true;
  2086. mode->timing.dsc = &priv_info->dsc;
  2087. error:
  2088. return rc;
  2089. }
  2090. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2091. {
  2092. int rc = 0;
  2093. struct drm_panel_hdr_properties *hdr_prop;
  2094. struct dsi_parser_utils *utils = &panel->utils;
  2095. hdr_prop = &panel->hdr_props;
  2096. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2097. "qcom,mdss-dsi-panel-hdr-enabled");
  2098. if (hdr_prop->hdr_enabled) {
  2099. rc = utils->read_u32_array(utils->data,
  2100. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2101. hdr_prop->display_primaries,
  2102. DISPLAY_PRIMARIES_MAX);
  2103. if (rc) {
  2104. pr_err("%s:%d, Unable to read color primaries,rc:%u\n",
  2105. __func__, __LINE__, rc);
  2106. hdr_prop->hdr_enabled = false;
  2107. return rc;
  2108. }
  2109. rc = utils->read_u32(utils->data,
  2110. "qcom,mdss-dsi-panel-peak-brightness",
  2111. &(hdr_prop->peak_brightness));
  2112. if (rc) {
  2113. pr_err("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2114. __func__, __LINE__, rc);
  2115. hdr_prop->hdr_enabled = false;
  2116. return rc;
  2117. }
  2118. rc = utils->read_u32(utils->data,
  2119. "qcom,mdss-dsi-panel-blackness-level",
  2120. &(hdr_prop->blackness_level));
  2121. if (rc) {
  2122. pr_err("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2123. __func__, __LINE__, rc);
  2124. hdr_prop->hdr_enabled = false;
  2125. return rc;
  2126. }
  2127. }
  2128. return 0;
  2129. }
  2130. static int dsi_panel_parse_topology(
  2131. struct dsi_display_mode_priv_info *priv_info,
  2132. struct dsi_parser_utils *utils,
  2133. int topology_override)
  2134. {
  2135. struct msm_display_topology *topology;
  2136. u32 top_count, top_sel, *array = NULL;
  2137. int i, len = 0;
  2138. int rc = -EINVAL;
  2139. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2140. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2141. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2142. pr_err("invalid topology list for the panel, rc = %d\n", rc);
  2143. return rc;
  2144. }
  2145. top_count = len / TOPOLOGY_SET_LEN;
  2146. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2147. if (!array)
  2148. return -ENOMEM;
  2149. rc = utils->read_u32_array(utils->data,
  2150. "qcom,display-topology", array, len);
  2151. if (rc) {
  2152. pr_err("unable to read the display topologies, rc = %d\n", rc);
  2153. goto read_fail;
  2154. }
  2155. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2156. if (!topology) {
  2157. rc = -ENOMEM;
  2158. goto read_fail;
  2159. }
  2160. for (i = 0; i < top_count; i++) {
  2161. struct msm_display_topology *top = &topology[i];
  2162. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2163. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2164. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2165. }
  2166. if (topology_override >= 0 && topology_override < top_count) {
  2167. pr_info("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2168. topology_override,
  2169. topology[topology_override].num_lm,
  2170. topology[topology_override].num_enc,
  2171. topology[topology_override].num_intf);
  2172. top_sel = topology_override;
  2173. goto parse_done;
  2174. }
  2175. rc = utils->read_u32(utils->data,
  2176. "qcom,default-topology-index", &top_sel);
  2177. if (rc) {
  2178. pr_err("no default topology selected, rc = %d\n", rc);
  2179. goto parse_fail;
  2180. }
  2181. if (top_sel >= top_count) {
  2182. rc = -EINVAL;
  2183. pr_err("default topology is specified is not valid, rc = %d\n",
  2184. rc);
  2185. goto parse_fail;
  2186. }
  2187. pr_info("default topology: lm: %d comp_enc:%d intf: %d\n",
  2188. topology[top_sel].num_lm,
  2189. topology[top_sel].num_enc,
  2190. topology[top_sel].num_intf);
  2191. parse_done:
  2192. memcpy(&priv_info->topology, &topology[top_sel],
  2193. sizeof(struct msm_display_topology));
  2194. parse_fail:
  2195. kfree(topology);
  2196. read_fail:
  2197. kfree(array);
  2198. return rc;
  2199. }
  2200. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2201. struct msm_roi_alignment *align)
  2202. {
  2203. int len = 0, rc = 0;
  2204. u32 value[6];
  2205. struct property *data;
  2206. if (!align)
  2207. return -EINVAL;
  2208. memset(align, 0, sizeof(*align));
  2209. data = utils->find_property(utils->data,
  2210. "qcom,panel-roi-alignment", &len);
  2211. len /= sizeof(u32);
  2212. if (!data) {
  2213. pr_err("panel roi alignment not found\n");
  2214. rc = -EINVAL;
  2215. } else if (len != 6) {
  2216. pr_err("incorrect roi alignment len %d\n", len);
  2217. rc = -EINVAL;
  2218. } else {
  2219. rc = utils->read_u32_array(utils->data,
  2220. "qcom,panel-roi-alignment", value, len);
  2221. if (rc)
  2222. pr_debug("error reading panel roi alignment values\n");
  2223. else {
  2224. align->xstart_pix_align = value[0];
  2225. align->ystart_pix_align = value[1];
  2226. align->width_pix_align = value[2];
  2227. align->height_pix_align = value[3];
  2228. align->min_width = value[4];
  2229. align->min_height = value[5];
  2230. }
  2231. pr_info("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2232. align->xstart_pix_align,
  2233. align->width_pix_align,
  2234. align->ystart_pix_align,
  2235. align->height_pix_align,
  2236. align->min_width,
  2237. align->min_height);
  2238. }
  2239. return rc;
  2240. }
  2241. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2242. struct dsi_parser_utils *utils)
  2243. {
  2244. struct msm_roi_caps *roi_caps = NULL;
  2245. const char *data;
  2246. int rc = 0;
  2247. if (!mode || !mode->priv_info) {
  2248. pr_err("invalid arguments\n");
  2249. return -EINVAL;
  2250. }
  2251. roi_caps = &mode->priv_info->roi_caps;
  2252. memset(roi_caps, 0, sizeof(*roi_caps));
  2253. data = utils->get_property(utils->data,
  2254. "qcom,partial-update-enabled", NULL);
  2255. if (data) {
  2256. if (!strcmp(data, "dual_roi"))
  2257. roi_caps->num_roi = 2;
  2258. else if (!strcmp(data, "single_roi"))
  2259. roi_caps->num_roi = 1;
  2260. else {
  2261. pr_info(
  2262. "invalid value for qcom,partial-update-enabled: %s\n",
  2263. data);
  2264. return 0;
  2265. }
  2266. } else {
  2267. pr_info("partial update disabled as the property is not set\n");
  2268. return 0;
  2269. }
  2270. roi_caps->merge_rois = utils->read_bool(utils->data,
  2271. "qcom,partial-update-roi-merge");
  2272. roi_caps->enabled = roi_caps->num_roi > 0;
  2273. pr_info("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2274. roi_caps->enabled);
  2275. if (roi_caps->enabled)
  2276. rc = dsi_panel_parse_roi_alignment(utils,
  2277. &roi_caps->align);
  2278. if (rc)
  2279. memset(roi_caps, 0, sizeof(*roi_caps));
  2280. return rc;
  2281. }
  2282. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2283. struct dsi_parser_utils *utils)
  2284. {
  2285. bool vid_mode_support, cmd_mode_support;
  2286. if (!mode || !mode->priv_info) {
  2287. pr_err("invalid arguments\n");
  2288. return -EINVAL;
  2289. }
  2290. vid_mode_support = utils->read_bool(utils->data,
  2291. "qcom,mdss-dsi-video-mode");
  2292. cmd_mode_support = utils->read_bool(utils->data,
  2293. "qcom,mdss-dsi-cmd-mode");
  2294. if (cmd_mode_support)
  2295. mode->panel_mode = DSI_OP_CMD_MODE;
  2296. else if (vid_mode_support)
  2297. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2298. else
  2299. return -EINVAL;
  2300. return 0;
  2301. };
  2302. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2303. {
  2304. int dms_enabled;
  2305. const char *data;
  2306. struct dsi_parser_utils *utils = &panel->utils;
  2307. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2308. dms_enabled = utils->read_bool(utils->data,
  2309. "qcom,dynamic-mode-switch-enabled");
  2310. if (!dms_enabled)
  2311. return 0;
  2312. data = utils->get_property(utils->data,
  2313. "qcom,dynamic-mode-switch-type", NULL);
  2314. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2315. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2316. } else {
  2317. pr_err("[%s] unsupported dynamic switch mode: %s\n",
  2318. panel->name, data);
  2319. return -EINVAL;
  2320. }
  2321. return 0;
  2322. };
  2323. /*
  2324. * The length of all the valid values to be checked should not be greater
  2325. * than the length of returned data from read command.
  2326. */
  2327. static bool
  2328. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2329. {
  2330. int i;
  2331. struct drm_panel_esd_config *config = &panel->esd_config;
  2332. for (i = 0; i < count; ++i) {
  2333. if (config->status_valid_params[i] >
  2334. config->status_cmds_rlen[i]) {
  2335. pr_debug("ignore valid params\n");
  2336. return false;
  2337. }
  2338. }
  2339. return true;
  2340. }
  2341. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2342. char *prop_key, u32 **target, u32 cmd_cnt)
  2343. {
  2344. int tmp;
  2345. if (!utils->find_property(utils->data, prop_key, &tmp))
  2346. return false;
  2347. tmp /= sizeof(u32);
  2348. if (tmp != cmd_cnt) {
  2349. pr_err("request property(%d) do not match cmd count(%d)\n",
  2350. tmp, cmd_cnt);
  2351. return false;
  2352. }
  2353. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2354. if (IS_ERR_OR_NULL(*target)) {
  2355. pr_err("Error allocating memory for property\n");
  2356. return false;
  2357. }
  2358. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2359. pr_err("cannot get values from dts\n");
  2360. kfree(*target);
  2361. *target = NULL;
  2362. return false;
  2363. }
  2364. return true;
  2365. }
  2366. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2367. {
  2368. kfree(esd_config->status_buf);
  2369. kfree(esd_config->return_buf);
  2370. kfree(esd_config->status_value);
  2371. kfree(esd_config->status_valid_params);
  2372. kfree(esd_config->status_cmds_rlen);
  2373. kfree(esd_config->status_cmd.cmds);
  2374. }
  2375. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2376. {
  2377. struct drm_panel_esd_config *esd_config;
  2378. int rc = 0;
  2379. u32 tmp;
  2380. u32 i, status_len, *lenp;
  2381. struct property *data;
  2382. struct dsi_parser_utils *utils = &panel->utils;
  2383. if (!panel) {
  2384. pr_err("Invalid Params\n");
  2385. return -EINVAL;
  2386. }
  2387. esd_config = &panel->esd_config;
  2388. if (!esd_config)
  2389. return -EINVAL;
  2390. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2391. DSI_CMD_SET_PANEL_STATUS, utils);
  2392. if (!esd_config->status_cmd.count) {
  2393. pr_err("panel status command parsing failed\n");
  2394. rc = -EINVAL;
  2395. goto error;
  2396. }
  2397. if (!dsi_panel_parse_esd_status_len(utils,
  2398. "qcom,mdss-dsi-panel-status-read-length",
  2399. &panel->esd_config.status_cmds_rlen,
  2400. esd_config->status_cmd.count)) {
  2401. pr_err("Invalid status read length\n");
  2402. rc = -EINVAL;
  2403. goto error1;
  2404. }
  2405. if (dsi_panel_parse_esd_status_len(utils,
  2406. "qcom,mdss-dsi-panel-status-valid-params",
  2407. &panel->esd_config.status_valid_params,
  2408. esd_config->status_cmd.count)) {
  2409. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2410. esd_config->status_cmd.count)) {
  2411. rc = -EINVAL;
  2412. goto error2;
  2413. }
  2414. }
  2415. status_len = 0;
  2416. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2417. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2418. status_len += lenp[i];
  2419. if (!status_len) {
  2420. rc = -EINVAL;
  2421. goto error2;
  2422. }
  2423. /*
  2424. * Some panel may need multiple read commands to properly
  2425. * check panel status. Do a sanity check for proper status
  2426. * value which will be compared with the value read by dsi
  2427. * controller during ESD check. Also check if multiple read
  2428. * commands are there then, there should be corresponding
  2429. * status check values for each read command.
  2430. */
  2431. data = utils->find_property(utils->data,
  2432. "qcom,mdss-dsi-panel-status-value", &tmp);
  2433. tmp /= sizeof(u32);
  2434. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2435. esd_config->groups = tmp / status_len;
  2436. } else {
  2437. pr_err("error parse panel-status-value\n");
  2438. rc = -EINVAL;
  2439. goto error2;
  2440. }
  2441. esd_config->status_value =
  2442. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2443. GFP_KERNEL);
  2444. if (!esd_config->status_value) {
  2445. rc = -ENOMEM;
  2446. goto error2;
  2447. }
  2448. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2449. sizeof(unsigned char), GFP_KERNEL);
  2450. if (!esd_config->return_buf) {
  2451. rc = -ENOMEM;
  2452. goto error3;
  2453. }
  2454. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2455. if (!esd_config->status_buf) {
  2456. rc = -ENOMEM;
  2457. goto error4;
  2458. }
  2459. rc = utils->read_u32_array(utils->data,
  2460. "qcom,mdss-dsi-panel-status-value",
  2461. esd_config->status_value, esd_config->groups * status_len);
  2462. if (rc) {
  2463. pr_debug("error reading panel status values\n");
  2464. memset(esd_config->status_value, 0,
  2465. esd_config->groups * status_len);
  2466. }
  2467. return 0;
  2468. error4:
  2469. kfree(esd_config->return_buf);
  2470. error3:
  2471. kfree(esd_config->status_value);
  2472. error2:
  2473. kfree(esd_config->status_valid_params);
  2474. kfree(esd_config->status_cmds_rlen);
  2475. error1:
  2476. kfree(esd_config->status_cmd.cmds);
  2477. error:
  2478. return rc;
  2479. }
  2480. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2481. {
  2482. int rc = 0;
  2483. const char *string;
  2484. struct drm_panel_esd_config *esd_config;
  2485. struct dsi_parser_utils *utils = &panel->utils;
  2486. u8 *esd_mode = NULL;
  2487. esd_config = &panel->esd_config;
  2488. esd_config->status_mode = ESD_MODE_MAX;
  2489. esd_config->esd_enabled = utils->read_bool(utils->data,
  2490. "qcom,esd-check-enabled");
  2491. if (!esd_config->esd_enabled)
  2492. return 0;
  2493. rc = utils->read_string(utils->data,
  2494. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2495. if (!rc) {
  2496. if (!strcmp(string, "bta_check")) {
  2497. esd_config->status_mode = ESD_MODE_SW_BTA;
  2498. } else if (!strcmp(string, "reg_read")) {
  2499. esd_config->status_mode = ESD_MODE_REG_READ;
  2500. } else if (!strcmp(string, "te_signal_check")) {
  2501. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2502. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2503. } else {
  2504. pr_err("TE-ESD not valid for video mode\n");
  2505. rc = -EINVAL;
  2506. goto error;
  2507. }
  2508. } else {
  2509. pr_err("No valid panel-status-check-mode string\n");
  2510. rc = -EINVAL;
  2511. goto error;
  2512. }
  2513. } else {
  2514. pr_debug("status check method not defined!\n");
  2515. rc = -EINVAL;
  2516. goto error;
  2517. }
  2518. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2519. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2520. if (rc) {
  2521. pr_err("failed to parse esd reg read mode params, rc=%d\n",
  2522. rc);
  2523. goto error;
  2524. }
  2525. esd_mode = "register_read";
  2526. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2527. esd_mode = "bta_trigger";
  2528. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2529. esd_mode = "te_check";
  2530. }
  2531. pr_info("ESD enabled with mode: %s\n", esd_mode);
  2532. return 0;
  2533. error:
  2534. panel->esd_config.esd_enabled = false;
  2535. return rc;
  2536. }
  2537. static void dsi_panel_update_util(struct dsi_panel *panel,
  2538. struct device_node *parser_node)
  2539. {
  2540. struct dsi_parser_utils *utils = &panel->utils;
  2541. if (parser_node) {
  2542. *utils = *dsi_parser_get_parser_utils();
  2543. utils->data = parser_node;
  2544. pr_debug("switching to parser APIs\n");
  2545. goto end;
  2546. }
  2547. *utils = *dsi_parser_get_of_utils();
  2548. utils->data = panel->panel_of_node;
  2549. end:
  2550. utils->node = panel->panel_of_node;
  2551. }
  2552. struct dsi_panel *dsi_panel_get(struct device *parent,
  2553. struct device_node *of_node,
  2554. struct device_node *parser_node,
  2555. const char *type,
  2556. int topology_override)
  2557. {
  2558. struct dsi_panel *panel;
  2559. struct dsi_parser_utils *utils;
  2560. int rc = 0;
  2561. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2562. if (!panel)
  2563. return ERR_PTR(-ENOMEM);
  2564. panel->panel_of_node = of_node;
  2565. panel->parent = parent;
  2566. panel->type = type;
  2567. dsi_panel_update_util(panel, parser_node);
  2568. utils = &panel->utils;
  2569. panel->name = utils->get_property(utils->data,
  2570. "qcom,mdss-dsi-panel-name", NULL);
  2571. if (!panel->name)
  2572. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2573. rc = dsi_panel_parse_host_config(panel);
  2574. if (rc) {
  2575. pr_err("failed to parse host configuration, rc=%d\n", rc);
  2576. goto error;
  2577. }
  2578. rc = dsi_panel_parse_panel_mode(panel);
  2579. if (rc) {
  2580. pr_err("failed to parse panel mode configuration, rc=%d\n", rc);
  2581. goto error;
  2582. }
  2583. rc = dsi_panel_parse_dfps_caps(panel);
  2584. if (rc)
  2585. pr_err("failed to parse dfps configuration, rc=%d\n", rc);
  2586. if (!(panel->dfps_caps.dfps_support)) {
  2587. /* qsync and dfps are mutually exclusive features */
  2588. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2589. if (rc)
  2590. pr_err("failed to parse qsync features, rc=%d\n", rc);
  2591. }
  2592. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2593. if (rc)
  2594. pr_err("failed to parse dynamic clk config, rc=%d\n", rc);
  2595. rc = dsi_panel_parse_phy_props(panel);
  2596. if (rc) {
  2597. pr_err("failed to parse panel physical dimension, rc=%d\n", rc);
  2598. goto error;
  2599. }
  2600. rc = dsi_panel_parse_gpios(panel);
  2601. if (rc) {
  2602. pr_err("failed to parse panel gpios, rc=%d\n", rc);
  2603. goto error;
  2604. }
  2605. rc = dsi_panel_parse_power_cfg(panel);
  2606. if (rc)
  2607. pr_err("failed to parse power config, rc=%d\n", rc);
  2608. rc = dsi_panel_parse_bl_config(panel);
  2609. if (rc)
  2610. pr_err("failed to parse backlight config, rc=%d\n", rc);
  2611. rc = dsi_panel_parse_misc_features(panel);
  2612. if (rc)
  2613. pr_err("failed to parse misc features, rc=%d\n", rc);
  2614. rc = dsi_panel_parse_hdr_config(panel);
  2615. if (rc)
  2616. pr_err("failed to parse hdr config, rc=%d\n", rc);
  2617. rc = dsi_panel_get_mode_count(panel);
  2618. if (rc) {
  2619. pr_err("failed to get mode count, rc=%d\n", rc);
  2620. goto error;
  2621. }
  2622. rc = dsi_panel_parse_dms_info(panel);
  2623. if (rc)
  2624. pr_debug("failed to get dms info, rc=%d\n", rc);
  2625. rc = dsi_panel_parse_esd_config(panel);
  2626. if (rc)
  2627. pr_debug("failed to parse esd config, rc=%d\n", rc);
  2628. drm_panel_init(&panel->drm_panel);
  2629. panel->drm_panel.dev = &panel->mipi_device.dev;
  2630. panel->mipi_device.dev.of_node = of_node;
  2631. rc = drm_panel_add(&panel->drm_panel);
  2632. if (rc)
  2633. goto error;
  2634. mutex_init(&panel->panel_lock);
  2635. return panel;
  2636. error:
  2637. kfree(panel);
  2638. return ERR_PTR(rc);
  2639. }
  2640. void dsi_panel_put(struct dsi_panel *panel)
  2641. {
  2642. drm_panel_remove(&panel->drm_panel);
  2643. /* free resources allocated for ESD check */
  2644. dsi_panel_esd_config_deinit(&panel->esd_config);
  2645. kfree(panel);
  2646. }
  2647. int dsi_panel_drv_init(struct dsi_panel *panel,
  2648. struct mipi_dsi_host *host)
  2649. {
  2650. int rc = 0;
  2651. struct mipi_dsi_device *dev;
  2652. if (!panel || !host) {
  2653. pr_err("invalid params\n");
  2654. return -EINVAL;
  2655. }
  2656. mutex_lock(&panel->panel_lock);
  2657. dev = &panel->mipi_device;
  2658. dev->host = host;
  2659. /*
  2660. * We dont have device structure since panel is not a device node.
  2661. * When using drm panel framework, the device is probed when the host is
  2662. * create.
  2663. */
  2664. dev->channel = 0;
  2665. dev->lanes = 4;
  2666. panel->host = host;
  2667. rc = dsi_panel_vreg_get(panel);
  2668. if (rc) {
  2669. pr_err("[%s] failed to get panel regulators, rc=%d\n",
  2670. panel->name, rc);
  2671. goto exit;
  2672. }
  2673. rc = dsi_panel_pinctrl_init(panel);
  2674. if (rc) {
  2675. pr_err("[%s] failed to init pinctrl, rc=%d\n", panel->name, rc);
  2676. goto error_vreg_put;
  2677. }
  2678. rc = dsi_panel_gpio_request(panel);
  2679. if (rc) {
  2680. pr_err("[%s] failed to request gpios, rc=%d\n", panel->name,
  2681. rc);
  2682. goto error_pinctrl_deinit;
  2683. }
  2684. rc = dsi_panel_bl_register(panel);
  2685. if (rc) {
  2686. if (rc != -EPROBE_DEFER)
  2687. pr_err("[%s] failed to register backlight, rc=%d\n",
  2688. panel->name, rc);
  2689. goto error_gpio_release;
  2690. }
  2691. goto exit;
  2692. error_gpio_release:
  2693. (void)dsi_panel_gpio_release(panel);
  2694. error_pinctrl_deinit:
  2695. (void)dsi_panel_pinctrl_deinit(panel);
  2696. error_vreg_put:
  2697. (void)dsi_panel_vreg_put(panel);
  2698. exit:
  2699. mutex_unlock(&panel->panel_lock);
  2700. return rc;
  2701. }
  2702. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2703. {
  2704. int rc = 0;
  2705. if (!panel) {
  2706. pr_err("invalid params\n");
  2707. return -EINVAL;
  2708. }
  2709. mutex_lock(&panel->panel_lock);
  2710. rc = dsi_panel_bl_unregister(panel);
  2711. if (rc)
  2712. pr_err("[%s] failed to unregister backlight, rc=%d\n",
  2713. panel->name, rc);
  2714. rc = dsi_panel_gpio_release(panel);
  2715. if (rc)
  2716. pr_err("[%s] failed to release gpios, rc=%d\n", panel->name,
  2717. rc);
  2718. rc = dsi_panel_pinctrl_deinit(panel);
  2719. if (rc)
  2720. pr_err("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2721. rc);
  2722. rc = dsi_panel_vreg_put(panel);
  2723. if (rc)
  2724. pr_err("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2725. panel->host = NULL;
  2726. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2727. mutex_unlock(&panel->panel_lock);
  2728. return rc;
  2729. }
  2730. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2731. struct dsi_display_mode *mode)
  2732. {
  2733. return 0;
  2734. }
  2735. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2736. {
  2737. const u32 SINGLE_MODE_SUPPORT = 1;
  2738. struct dsi_parser_utils *utils;
  2739. struct device_node *timings_np;
  2740. int count, rc = 0;
  2741. if (!panel) {
  2742. pr_err("invalid params\n");
  2743. return -EINVAL;
  2744. }
  2745. utils = &panel->utils;
  2746. panel->num_timing_nodes = 0;
  2747. timings_np = utils->get_child_by_name(utils->data,
  2748. "qcom,mdss-dsi-display-timings");
  2749. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2750. pr_err("no display timing nodes defined\n");
  2751. rc = -EINVAL;
  2752. goto error;
  2753. }
  2754. count = utils->get_child_count(timings_np);
  2755. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2756. count > DSI_MODE_MAX) {
  2757. pr_err("invalid count of timing nodes: %d\n", count);
  2758. rc = -EINVAL;
  2759. goto error;
  2760. }
  2761. /* No multiresolution support is available for video mode panels */
  2762. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  2763. !panel->host_config.ext_bridge_mode)
  2764. count = SINGLE_MODE_SUPPORT;
  2765. panel->num_timing_nodes = count;
  2766. error:
  2767. return rc;
  2768. }
  2769. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  2770. struct dsi_panel_phy_props *phy_props)
  2771. {
  2772. int rc = 0;
  2773. if (!panel || !phy_props) {
  2774. pr_err("invalid params\n");
  2775. return -EINVAL;
  2776. }
  2777. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  2778. return rc;
  2779. }
  2780. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  2781. struct dsi_dfps_capabilities *dfps_caps)
  2782. {
  2783. int rc = 0;
  2784. if (!panel || !dfps_caps) {
  2785. pr_err("invalid params\n");
  2786. return -EINVAL;
  2787. }
  2788. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  2789. return rc;
  2790. }
  2791. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  2792. {
  2793. int i;
  2794. if (!mode->priv_info)
  2795. return;
  2796. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  2797. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2798. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2799. }
  2800. kfree(mode->priv_info);
  2801. }
  2802. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  2803. struct dsi_display_mode *mode, u32 frame_threshold_us)
  2804. {
  2805. u32 frame_time_us,nslices;
  2806. u64 min_bitclk, total_active_pixels, bits_per_line;
  2807. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  2808. struct dsi_mode_info *timing = &mode->timing;
  2809. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  2810. * + 1 byte dcs data command.
  2811. */
  2812. const u32 packet_overhead = 56;
  2813. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  2814. if (timing->dsc_enabled) {
  2815. nslices = (timing->h_active)/(dsc->slice_width);
  2816. /* (slice width x bit-per-pixel + packet overhead) x
  2817. * number of slices x height x fps / lane
  2818. */
  2819. bits_per_line = ((dsc->slice_width * dsc->bpp) +
  2820. packet_overhead) * nslices;
  2821. bits_per_line = bits_per_line / (config->num_data_lanes);
  2822. min_bitclk = (bits_per_line * timing->v_active *
  2823. timing->refresh_rate);
  2824. } else {
  2825. total_active_pixels = ((DSI_H_ACTIVE_DSC(timing)
  2826. * timing->v_active));
  2827. /* calculate the actual bitclk needed to transfer the frame */
  2828. min_bitclk = (total_active_pixels * (timing->refresh_rate) *
  2829. (config->bpp)) / (config->num_data_lanes);
  2830. }
  2831. timing->min_dsi_clk_hz = min_bitclk;
  2832. if (timing->clk_rate_hz) {
  2833. /* adjust the transfer time proportionately for bit clk*/
  2834. timing->dsi_transfer_time_us = mult_frac(frame_time_us,
  2835. min_bitclk, timing->clk_rate_hz);
  2836. } else if (mode->priv_info->mdp_transfer_time_us) {
  2837. timing->dsi_transfer_time_us =
  2838. mode->priv_info->mdp_transfer_time_us;
  2839. } else {
  2840. timing->dsi_transfer_time_us = frame_time_us -
  2841. frame_threshold_us;
  2842. }
  2843. }
  2844. int dsi_panel_get_mode(struct dsi_panel *panel,
  2845. u32 index, struct dsi_display_mode *mode,
  2846. int topology_override)
  2847. {
  2848. struct device_node *timings_np, *child_np;
  2849. struct dsi_parser_utils *utils;
  2850. struct dsi_display_mode_priv_info *prv_info;
  2851. u32 child_idx = 0;
  2852. int rc = 0, num_timings;
  2853. void *utils_data = NULL;
  2854. if (!panel || !mode) {
  2855. pr_err("invalid params\n");
  2856. return -EINVAL;
  2857. }
  2858. mutex_lock(&panel->panel_lock);
  2859. utils = &panel->utils;
  2860. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  2861. if (!mode->priv_info) {
  2862. rc = -ENOMEM;
  2863. goto done;
  2864. }
  2865. prv_info = mode->priv_info;
  2866. timings_np = utils->get_child_by_name(utils->data,
  2867. "qcom,mdss-dsi-display-timings");
  2868. if (!timings_np) {
  2869. pr_err("no display timing nodes defined\n");
  2870. rc = -EINVAL;
  2871. goto parse_fail;
  2872. }
  2873. num_timings = utils->get_child_count(timings_np);
  2874. if (!num_timings || num_timings > DSI_MODE_MAX) {
  2875. pr_err("invalid count of timing nodes: %d\n", num_timings);
  2876. rc = -EINVAL;
  2877. goto parse_fail;
  2878. }
  2879. utils_data = utils->data;
  2880. dsi_for_each_child_node(timings_np, child_np) {
  2881. if (index != child_idx++)
  2882. continue;
  2883. utils->data = child_np;
  2884. rc = dsi_panel_parse_timing(&mode->timing, utils);
  2885. if (rc) {
  2886. pr_err("failed to parse panel timing, rc=%d\n", rc);
  2887. goto parse_fail;
  2888. }
  2889. rc = dsi_panel_parse_dsc_params(mode, utils);
  2890. if (rc) {
  2891. pr_err("failed to parse dsc params, rc=%d\n", rc);
  2892. goto parse_fail;
  2893. }
  2894. rc = dsi_panel_parse_topology(prv_info, utils,
  2895. topology_override);
  2896. if (rc) {
  2897. pr_err("failed to parse panel topology, rc=%d\n", rc);
  2898. goto parse_fail;
  2899. }
  2900. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  2901. if (rc) {
  2902. pr_err("failed to parse command sets, rc=%d\n", rc);
  2903. goto parse_fail;
  2904. }
  2905. rc = dsi_panel_parse_jitter_config(mode, utils);
  2906. if (rc)
  2907. pr_err(
  2908. "failed to parse panel jitter config, rc=%d\n", rc);
  2909. rc = dsi_panel_parse_phy_timing(mode, utils);
  2910. if (rc) {
  2911. pr_err(
  2912. "failed to parse panel phy timings, rc=%d\n", rc);
  2913. goto parse_fail;
  2914. }
  2915. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  2916. if (rc)
  2917. pr_err("failed to partial update caps, rc=%d\n", rc);
  2918. if (panel->panel_mode_switch_enabled) {
  2919. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  2920. if (rc) {
  2921. pr_err("PMS: failed to parse panel mode\n");
  2922. rc = 0;
  2923. mode->panel_mode = panel->panel_mode;
  2924. }
  2925. } else {
  2926. mode->panel_mode = panel->panel_mode;
  2927. }
  2928. }
  2929. goto done;
  2930. parse_fail:
  2931. kfree(mode->priv_info);
  2932. mode->priv_info = NULL;
  2933. done:
  2934. utils->data = utils_data;
  2935. mutex_unlock(&panel->panel_lock);
  2936. return rc;
  2937. }
  2938. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  2939. struct dsi_display_mode *mode,
  2940. struct dsi_host_config *config)
  2941. {
  2942. int rc = 0;
  2943. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  2944. if (!panel || !mode || !config) {
  2945. pr_err("invalid params\n");
  2946. return -EINVAL;
  2947. }
  2948. mutex_lock(&panel->panel_lock);
  2949. config->panel_mode = panel->panel_mode;
  2950. memcpy(&config->common_config, &panel->host_config,
  2951. sizeof(config->common_config));
  2952. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  2953. memcpy(&config->u.video_engine, &panel->video_config,
  2954. sizeof(config->u.video_engine));
  2955. } else {
  2956. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  2957. sizeof(config->u.cmd_engine));
  2958. }
  2959. memcpy(&config->video_timing, &mode->timing,
  2960. sizeof(config->video_timing));
  2961. config->video_timing.mdp_transfer_time_us =
  2962. mode->priv_info->mdp_transfer_time_us;
  2963. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  2964. config->video_timing.dsc = &mode->priv_info->dsc;
  2965. if (dyn_clk_caps->dyn_clk_support)
  2966. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  2967. else
  2968. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  2969. config->esc_clk_rate_hz = 19200000;
  2970. mutex_unlock(&panel->panel_lock);
  2971. return rc;
  2972. }
  2973. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  2974. {
  2975. int rc = 0;
  2976. if (!panel) {
  2977. pr_err("invalid params\n");
  2978. return -EINVAL;
  2979. }
  2980. mutex_lock(&panel->panel_lock);
  2981. /* If LP11_INIT is set, panel will be powered up during prepare() */
  2982. if (panel->lp11_init)
  2983. goto error;
  2984. rc = dsi_panel_power_on(panel);
  2985. if (rc) {
  2986. pr_err("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  2987. goto error;
  2988. }
  2989. error:
  2990. mutex_unlock(&panel->panel_lock);
  2991. return rc;
  2992. }
  2993. int dsi_panel_update_pps(struct dsi_panel *panel)
  2994. {
  2995. int rc = 0;
  2996. struct dsi_panel_cmd_set *set = NULL;
  2997. struct dsi_display_mode_priv_info *priv_info = NULL;
  2998. if (!panel || !panel->cur_mode) {
  2999. pr_err("invalid params\n");
  3000. return -EINVAL;
  3001. }
  3002. mutex_lock(&panel->panel_lock);
  3003. priv_info = panel->cur_mode->priv_info;
  3004. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3005. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc, panel->dsc_pps_cmd, 0);
  3006. rc = dsi_panel_create_cmd_packets(panel->dsc_pps_cmd,
  3007. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3008. if (rc) {
  3009. pr_err("failed to create cmd packets, rc=%d\n", rc);
  3010. goto error;
  3011. }
  3012. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3013. if (rc) {
  3014. pr_err("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3015. panel->name, rc);
  3016. }
  3017. dsi_panel_destroy_cmd_packets(set);
  3018. error:
  3019. mutex_unlock(&panel->panel_lock);
  3020. return rc;
  3021. }
  3022. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3023. {
  3024. int rc = 0;
  3025. if (!panel) {
  3026. pr_err("invalid params\n");
  3027. return -EINVAL;
  3028. }
  3029. mutex_lock(&panel->panel_lock);
  3030. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3031. if (rc)
  3032. pr_err("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3033. panel->name, rc);
  3034. mutex_unlock(&panel->panel_lock);
  3035. return rc;
  3036. }
  3037. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3038. {
  3039. int rc = 0;
  3040. if (!panel) {
  3041. pr_err("invalid params\n");
  3042. return -EINVAL;
  3043. }
  3044. mutex_lock(&panel->panel_lock);
  3045. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3046. if (rc)
  3047. pr_err("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3048. panel->name, rc);
  3049. mutex_unlock(&panel->panel_lock);
  3050. return rc;
  3051. }
  3052. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3053. {
  3054. int rc = 0;
  3055. if (!panel) {
  3056. pr_err("invalid params\n");
  3057. return -EINVAL;
  3058. }
  3059. mutex_lock(&panel->panel_lock);
  3060. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3061. if (rc)
  3062. pr_err("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3063. panel->name, rc);
  3064. mutex_unlock(&panel->panel_lock);
  3065. return rc;
  3066. }
  3067. int dsi_panel_prepare(struct dsi_panel *panel)
  3068. {
  3069. int rc = 0;
  3070. if (!panel) {
  3071. pr_err("invalid params\n");
  3072. return -EINVAL;
  3073. }
  3074. mutex_lock(&panel->panel_lock);
  3075. if (panel->lp11_init) {
  3076. rc = dsi_panel_power_on(panel);
  3077. if (rc) {
  3078. pr_err("[%s] panel power on failed, rc=%d\n",
  3079. panel->name, rc);
  3080. goto error;
  3081. }
  3082. }
  3083. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3084. if (rc) {
  3085. pr_err("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3086. panel->name, rc);
  3087. goto error;
  3088. }
  3089. error:
  3090. mutex_unlock(&panel->panel_lock);
  3091. return rc;
  3092. }
  3093. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3094. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3095. {
  3096. static const int ROI_CMD_LEN = 5;
  3097. int rc = 0;
  3098. /* DTYPE_DCS_LWRITE */
  3099. static char *caset, *paset;
  3100. set->cmds = NULL;
  3101. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3102. if (!caset) {
  3103. rc = -ENOMEM;
  3104. goto exit;
  3105. }
  3106. caset[0] = 0x2a;
  3107. caset[1] = (roi->x & 0xFF00) >> 8;
  3108. caset[2] = roi->x & 0xFF;
  3109. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3110. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3111. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3112. if (!paset) {
  3113. rc = -ENOMEM;
  3114. goto error_free_mem;
  3115. }
  3116. paset[0] = 0x2b;
  3117. paset[1] = (roi->y & 0xFF00) >> 8;
  3118. paset[2] = roi->y & 0xFF;
  3119. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3120. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3121. set->type = DSI_CMD_SET_ROI;
  3122. set->state = DSI_CMD_SET_STATE_LP;
  3123. set->count = 2; /* send caset + paset together */
  3124. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3125. if (!set->cmds) {
  3126. rc = -ENOMEM;
  3127. goto error_free_mem;
  3128. }
  3129. set->cmds[0].msg.channel = 0;
  3130. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3131. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3132. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3133. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3134. set->cmds[0].msg.tx_buf = caset;
  3135. set->cmds[0].msg.rx_len = 0;
  3136. set->cmds[0].msg.rx_buf = 0;
  3137. set->cmds[0].msg.wait_ms = 0;
  3138. set->cmds[0].last_command = 0;
  3139. set->cmds[0].post_wait_ms = 0;
  3140. set->cmds[1].msg.channel = 0;
  3141. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3142. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3143. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3144. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3145. set->cmds[1].msg.tx_buf = paset;
  3146. set->cmds[1].msg.rx_len = 0;
  3147. set->cmds[1].msg.rx_buf = 0;
  3148. set->cmds[1].msg.wait_ms = 0;
  3149. set->cmds[1].last_command = 1;
  3150. set->cmds[1].post_wait_ms = 0;
  3151. goto exit;
  3152. error_free_mem:
  3153. kfree(caset);
  3154. kfree(paset);
  3155. kfree(set->cmds);
  3156. exit:
  3157. return rc;
  3158. }
  3159. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3160. int ctrl_idx)
  3161. {
  3162. int rc = 0;
  3163. if (!panel) {
  3164. pr_err("invalid params\n");
  3165. return -EINVAL;
  3166. }
  3167. mutex_lock(&panel->panel_lock);
  3168. pr_debug("ctrl:%d qsync on\n", ctrl_idx);
  3169. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3170. if (rc)
  3171. pr_err("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3172. panel->name, rc);
  3173. mutex_unlock(&panel->panel_lock);
  3174. return rc;
  3175. }
  3176. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3177. int ctrl_idx)
  3178. {
  3179. int rc = 0;
  3180. if (!panel) {
  3181. pr_err("invalid params\n");
  3182. return -EINVAL;
  3183. }
  3184. mutex_lock(&panel->panel_lock);
  3185. pr_debug("ctrl:%d qsync off\n", ctrl_idx);
  3186. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3187. if (rc)
  3188. pr_err("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3189. panel->name, rc);
  3190. mutex_unlock(&panel->panel_lock);
  3191. return rc;
  3192. }
  3193. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3194. struct dsi_rect *roi)
  3195. {
  3196. int rc = 0;
  3197. struct dsi_panel_cmd_set *set;
  3198. struct dsi_display_mode_priv_info *priv_info;
  3199. if (!panel || !panel->cur_mode) {
  3200. pr_err("Invalid params\n");
  3201. return -EINVAL;
  3202. }
  3203. priv_info = panel->cur_mode->priv_info;
  3204. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3205. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3206. if (rc) {
  3207. pr_err("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3208. panel->name, rc);
  3209. return rc;
  3210. }
  3211. pr_debug("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3212. roi->x, roi->y, roi->w, roi->h);
  3213. mutex_lock(&panel->panel_lock);
  3214. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3215. if (rc)
  3216. pr_err("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3217. panel->name, rc);
  3218. mutex_unlock(&panel->panel_lock);
  3219. dsi_panel_destroy_cmd_packets(set);
  3220. return rc;
  3221. }
  3222. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3223. {
  3224. int rc = 0;
  3225. if (!panel) {
  3226. pr_err("Invalid params\n");
  3227. return -EINVAL;
  3228. }
  3229. mutex_lock(&panel->panel_lock);
  3230. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3231. if (rc)
  3232. pr_err("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3233. panel->name, rc);
  3234. mutex_unlock(&panel->panel_lock);
  3235. return rc;
  3236. }
  3237. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3238. {
  3239. int rc = 0;
  3240. if (!panel) {
  3241. pr_err("Invalid params\n");
  3242. return -EINVAL;
  3243. }
  3244. mutex_lock(&panel->panel_lock);
  3245. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3246. if (rc)
  3247. pr_err("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3248. panel->name, rc);
  3249. mutex_unlock(&panel->panel_lock);
  3250. return rc;
  3251. }
  3252. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3253. {
  3254. int rc = 0;
  3255. if (!panel) {
  3256. pr_err("Invalid params\n");
  3257. return -EINVAL;
  3258. }
  3259. mutex_lock(&panel->panel_lock);
  3260. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3261. if (rc)
  3262. pr_err("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3263. panel->name, rc);
  3264. mutex_unlock(&panel->panel_lock);
  3265. return rc;
  3266. }
  3267. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3268. {
  3269. int rc = 0;
  3270. if (!panel) {
  3271. pr_err("Invalid params\n");
  3272. return -EINVAL;
  3273. }
  3274. mutex_lock(&panel->panel_lock);
  3275. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3276. if (rc)
  3277. pr_err("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3278. panel->name, rc);
  3279. mutex_unlock(&panel->panel_lock);
  3280. return rc;
  3281. }
  3282. int dsi_panel_switch(struct dsi_panel *panel)
  3283. {
  3284. int rc = 0;
  3285. if (!panel) {
  3286. pr_err("Invalid params\n");
  3287. return -EINVAL;
  3288. }
  3289. mutex_lock(&panel->panel_lock);
  3290. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3291. if (rc)
  3292. pr_err("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3293. panel->name, rc);
  3294. mutex_unlock(&panel->panel_lock);
  3295. return rc;
  3296. }
  3297. int dsi_panel_post_switch(struct dsi_panel *panel)
  3298. {
  3299. int rc = 0;
  3300. if (!panel) {
  3301. pr_err("Invalid params\n");
  3302. return -EINVAL;
  3303. }
  3304. mutex_lock(&panel->panel_lock);
  3305. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3306. if (rc)
  3307. pr_err("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3308. panel->name, rc);
  3309. mutex_unlock(&panel->panel_lock);
  3310. return rc;
  3311. }
  3312. int dsi_panel_enable(struct dsi_panel *panel)
  3313. {
  3314. int rc = 0;
  3315. if (!panel) {
  3316. pr_err("Invalid params\n");
  3317. return -EINVAL;
  3318. }
  3319. mutex_lock(&panel->panel_lock);
  3320. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3321. if (rc) {
  3322. pr_err("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3323. panel->name, rc);
  3324. }
  3325. panel->panel_initialized = true;
  3326. mutex_unlock(&panel->panel_lock);
  3327. return rc;
  3328. }
  3329. int dsi_panel_post_enable(struct dsi_panel *panel)
  3330. {
  3331. int rc = 0;
  3332. if (!panel) {
  3333. pr_err("invalid params\n");
  3334. return -EINVAL;
  3335. }
  3336. mutex_lock(&panel->panel_lock);
  3337. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3338. if (rc) {
  3339. pr_err("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3340. panel->name, rc);
  3341. goto error;
  3342. }
  3343. error:
  3344. mutex_unlock(&panel->panel_lock);
  3345. return rc;
  3346. }
  3347. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3348. {
  3349. int rc = 0;
  3350. if (!panel) {
  3351. pr_err("invalid params\n");
  3352. return -EINVAL;
  3353. }
  3354. mutex_lock(&panel->panel_lock);
  3355. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3356. if (rc) {
  3357. pr_err("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3358. panel->name, rc);
  3359. goto error;
  3360. }
  3361. error:
  3362. mutex_unlock(&panel->panel_lock);
  3363. return rc;
  3364. }
  3365. int dsi_panel_disable(struct dsi_panel *panel)
  3366. {
  3367. int rc = 0;
  3368. if (!panel) {
  3369. pr_err("invalid params\n");
  3370. return -EINVAL;
  3371. }
  3372. mutex_lock(&panel->panel_lock);
  3373. /* Avoid sending panel off commands when ESD recovery is underway */
  3374. if (!atomic_read(&panel->esd_recovery_pending)) {
  3375. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3376. if (rc) {
  3377. /*
  3378. * Sending panel off commands may fail when DSI
  3379. * controller is in a bad state. These failures can be
  3380. * ignored since controller will go for full reset on
  3381. * subsequent display enable anyway.
  3382. */
  3383. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3384. panel->name, rc);
  3385. rc = 0;
  3386. }
  3387. }
  3388. panel->panel_initialized = false;
  3389. mutex_unlock(&panel->panel_lock);
  3390. return rc;
  3391. }
  3392. int dsi_panel_unprepare(struct dsi_panel *panel)
  3393. {
  3394. int rc = 0;
  3395. if (!panel) {
  3396. pr_err("invalid params\n");
  3397. return -EINVAL;
  3398. }
  3399. mutex_lock(&panel->panel_lock);
  3400. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3401. if (rc) {
  3402. pr_err("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3403. panel->name, rc);
  3404. goto error;
  3405. }
  3406. error:
  3407. mutex_unlock(&panel->panel_lock);
  3408. return rc;
  3409. }
  3410. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3411. {
  3412. int rc = 0;
  3413. if (!panel) {
  3414. pr_err("invalid params\n");
  3415. return -EINVAL;
  3416. }
  3417. mutex_lock(&panel->panel_lock);
  3418. rc = dsi_panel_power_off(panel);
  3419. if (rc) {
  3420. pr_err("[%s] panel power_Off failed, rc=%d\n",
  3421. panel->name, rc);
  3422. goto error;
  3423. }
  3424. error:
  3425. mutex_unlock(&panel->panel_lock);
  3426. return rc;
  3427. }