main.c 114 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/version.h>
  20. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  21. #include <linux/panic_notifier.h>
  22. #endif
  23. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  24. #include <soc/qcom/minidump.h>
  25. #endif
  26. #include "cnss_plat_ipc_qmi.h"
  27. #include "cnss_utils.h"
  28. #include "main.h"
  29. #include "bus.h"
  30. #include "debug.h"
  31. #include "genl.h"
  32. #include "reg.h"
  33. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  34. #include "smcinvoke.h"
  35. #include "smcinvoke_object.h"
  36. #include "IClientEnv.h"
  37. #define HW_STATE_UID 0x108
  38. #define HW_OP_GET_STATE 1
  39. #define HW_WIFI_UID 0x508
  40. #define FEATURE_NOT_SUPPORTED 12
  41. #define PERIPHERAL_NOT_FOUND 10
  42. #endif
  43. #define CNSS_DUMP_FORMAT_VER 0x11
  44. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  45. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  46. #define CNSS_DUMP_NAME "CNSS_WLAN"
  47. #define CNSS_DUMP_DESC_SIZE 0x1000
  48. #define CNSS_DUMP_SEG_VER 0x1
  49. #define FILE_SYSTEM_READY 1
  50. #define FW_READY_TIMEOUT 20000
  51. #define FW_ASSERT_TIMEOUT 5000
  52. #define CNSS_EVENT_PENDING 2989
  53. #define POWER_RESET_MIN_DELAY_MS 100
  54. #define CNSS_QUIRKS_DEFAULT 0
  55. #ifdef CONFIG_CNSS_EMULATION
  56. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  57. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  58. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  59. #else
  60. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  61. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  62. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  63. #endif
  64. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  65. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  66. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  67. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  68. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  69. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  70. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  71. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  72. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  73. enum cnss_cal_db_op {
  74. CNSS_CAL_DB_UPLOAD,
  75. CNSS_CAL_DB_DOWNLOAD,
  76. CNSS_CAL_DB_INVALID_OP,
  77. };
  78. enum cnss_recovery_type {
  79. CNSS_WLAN_RECOVERY = 0x1,
  80. CNSS_PCSS_RECOVERY = 0x2,
  81. };
  82. static struct cnss_plat_data *plat_env;
  83. static bool cnss_allow_driver_loading;
  84. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  85. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  86. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  87. };
  88. static struct cnss_fw_files FW_FILES_DEFAULT = {
  89. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  90. "utfbd.bin", "epping.bin", "evicted.bin"
  91. };
  92. struct cnss_driver_event {
  93. struct list_head list;
  94. enum cnss_driver_event_type type;
  95. bool sync;
  96. struct completion complete;
  97. int ret;
  98. void *data;
  99. };
  100. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  101. struct cnss_plat_data *plat_priv)
  102. {
  103. plat_env = plat_priv;
  104. }
  105. bool cnss_check_driver_loading_allowed(void)
  106. {
  107. return cnss_allow_driver_loading;
  108. }
  109. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  110. {
  111. return plat_env;
  112. }
  113. /**
  114. * cnss_get_mem_seg_count - Get segment count of memory
  115. * @type: memory type
  116. * @seg: segment count
  117. *
  118. * Return: 0 on success, negative value on failure
  119. */
  120. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  121. {
  122. struct cnss_plat_data *plat_priv;
  123. plat_priv = cnss_get_plat_priv(NULL);
  124. if (!plat_priv)
  125. return -ENODEV;
  126. switch (type) {
  127. case CNSS_REMOTE_MEM_TYPE_FW:
  128. *seg = plat_priv->fw_mem_seg_len;
  129. break;
  130. case CNSS_REMOTE_MEM_TYPE_QDSS:
  131. *seg = plat_priv->qdss_mem_seg_len;
  132. break;
  133. default:
  134. return -EINVAL;
  135. }
  136. return 0;
  137. }
  138. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  139. /**
  140. * cnss_get_wifi_kobject -return wifi kobject
  141. * Return: Null, to maintain driver comnpatibilty
  142. */
  143. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  144. {
  145. struct cnss_plat_data *plat_priv;
  146. plat_priv = cnss_get_plat_priv(NULL);
  147. if (!plat_priv)
  148. return NULL;
  149. return plat_priv->wifi_kobj;
  150. }
  151. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  152. /**
  153. * cnss_get_mem_segment_info - Get memory info of different type
  154. * @type: memory type
  155. * @segment: array to save the segment info
  156. * @seg: segment count
  157. *
  158. * Return: 0 on success, negative value on failure
  159. */
  160. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  161. struct cnss_mem_segment segment[],
  162. u32 segment_count)
  163. {
  164. struct cnss_plat_data *plat_priv;
  165. u32 i;
  166. plat_priv = cnss_get_plat_priv(NULL);
  167. if (!plat_priv)
  168. return -ENODEV;
  169. switch (type) {
  170. case CNSS_REMOTE_MEM_TYPE_FW:
  171. if (segment_count > plat_priv->fw_mem_seg_len)
  172. segment_count = plat_priv->fw_mem_seg_len;
  173. for (i = 0; i < segment_count; i++) {
  174. segment[i].size = plat_priv->fw_mem[i].size;
  175. segment[i].va = plat_priv->fw_mem[i].va;
  176. segment[i].pa = plat_priv->fw_mem[i].pa;
  177. }
  178. break;
  179. case CNSS_REMOTE_MEM_TYPE_QDSS:
  180. if (segment_count > plat_priv->qdss_mem_seg_len)
  181. segment_count = plat_priv->qdss_mem_seg_len;
  182. for (i = 0; i < segment_count; i++) {
  183. segment[i].size = plat_priv->qdss_mem[i].size;
  184. segment[i].va = plat_priv->qdss_mem[i].va;
  185. segment[i].pa = plat_priv->qdss_mem[i].pa;
  186. }
  187. break;
  188. default:
  189. return -EINVAL;
  190. }
  191. return 0;
  192. }
  193. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  194. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  195. {
  196. struct device_node *audio_ion_node;
  197. struct platform_device *audio_ion_pdev;
  198. audio_ion_node = of_find_compatible_node(NULL, NULL,
  199. "qcom,msm-audio-ion");
  200. if (!audio_ion_node) {
  201. cnss_pr_err("Unable to get Audio ion node");
  202. return -EINVAL;
  203. }
  204. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  205. of_node_put(audio_ion_node);
  206. if (!audio_ion_pdev) {
  207. cnss_pr_err("Unable to get Audio ion platform device");
  208. return -EINVAL;
  209. }
  210. plat_priv->audio_iommu_domain =
  211. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  212. put_device(&audio_ion_pdev->dev);
  213. if (!plat_priv->audio_iommu_domain) {
  214. cnss_pr_err("Unable to get Audio ion iommu domain");
  215. return -EINVAL;
  216. }
  217. return 0;
  218. }
  219. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  220. enum cnss_feature_v01 feature)
  221. {
  222. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  223. return -EINVAL;
  224. plat_priv->feature_list |= 1 << feature;
  225. return 0;
  226. }
  227. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  228. enum cnss_feature_v01 feature)
  229. {
  230. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  231. return -EINVAL;
  232. plat_priv->feature_list &= ~(1 << feature);
  233. return 0;
  234. }
  235. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  236. u64 *feature_list)
  237. {
  238. if (unlikely(!plat_priv))
  239. return -EINVAL;
  240. *feature_list = plat_priv->feature_list;
  241. return 0;
  242. }
  243. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  244. {
  245. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  246. return;
  247. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  248. plat_priv->driver_state,
  249. atomic_read(&plat_priv->pm_count));
  250. pm_stay_awake(&plat_priv->plat_dev->dev);
  251. }
  252. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  253. {
  254. int r = atomic_dec_return(&plat_priv->pm_count);
  255. WARN_ON(r < 0);
  256. if (r != 0)
  257. return;
  258. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  259. plat_priv->driver_state,
  260. atomic_read(&plat_priv->pm_count));
  261. pm_relax(&plat_priv->plat_dev->dev);
  262. }
  263. int cnss_get_fw_files_for_target(struct device *dev,
  264. struct cnss_fw_files *pfw_files,
  265. u32 target_type, u32 target_version)
  266. {
  267. if (!pfw_files)
  268. return -ENODEV;
  269. switch (target_version) {
  270. case QCA6174_REV3_VERSION:
  271. case QCA6174_REV3_2_VERSION:
  272. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  273. break;
  274. default:
  275. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  276. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  277. target_type, target_version);
  278. break;
  279. }
  280. return 0;
  281. }
  282. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  283. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  284. {
  285. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  286. if (!plat_priv)
  287. return -ENODEV;
  288. if (!cap)
  289. return -EINVAL;
  290. *cap = plat_priv->cap;
  291. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  292. return 0;
  293. }
  294. EXPORT_SYMBOL(cnss_get_platform_cap);
  295. /**
  296. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  297. * @dev: Device
  298. * @fw_cap: FW Capability which needs to be checked
  299. *
  300. * Return: TRUE if supported, FALSE on failure or if not supported
  301. */
  302. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  303. {
  304. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  305. bool is_supported = false;
  306. if (!plat_priv)
  307. return is_supported;
  308. if (!plat_priv->fw_caps)
  309. return is_supported;
  310. switch (fw_cap) {
  311. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  312. is_supported = !!(plat_priv->fw_caps &
  313. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  314. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  315. is_supported = false;
  316. break;
  317. default:
  318. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  319. }
  320. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  321. is_supported ? "supported" : "not supported");
  322. return is_supported;
  323. }
  324. EXPORT_SYMBOL(cnss_get_fw_cap);
  325. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  326. {
  327. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  328. if (!plat_priv)
  329. return;
  330. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  331. }
  332. EXPORT_SYMBOL(cnss_request_pm_qos);
  333. void cnss_remove_pm_qos(struct device *dev)
  334. {
  335. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  336. if (!plat_priv)
  337. return;
  338. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  339. }
  340. EXPORT_SYMBOL(cnss_remove_pm_qos);
  341. int cnss_wlan_enable(struct device *dev,
  342. struct cnss_wlan_enable_cfg *config,
  343. enum cnss_driver_mode mode,
  344. const char *host_version)
  345. {
  346. int ret = 0;
  347. struct cnss_plat_data *plat_priv;
  348. if (!dev) {
  349. cnss_pr_err("Invalid dev pointer\n");
  350. return -EINVAL;
  351. }
  352. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  353. if (!plat_priv)
  354. return -ENODEV;
  355. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  356. return 0;
  357. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  358. return 0;
  359. if (!config || !host_version) {
  360. cnss_pr_err("Invalid config or host_version pointer\n");
  361. return -EINVAL;
  362. }
  363. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  364. mode, config, host_version);
  365. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  366. goto skip_cfg;
  367. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  368. if (ret)
  369. goto out;
  370. skip_cfg:
  371. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  372. out:
  373. return ret;
  374. }
  375. EXPORT_SYMBOL(cnss_wlan_enable);
  376. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  377. {
  378. int ret = 0;
  379. struct cnss_plat_data *plat_priv;
  380. if (!dev) {
  381. cnss_pr_err("Invalid dev pointer\n");
  382. return -EINVAL;
  383. }
  384. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  385. if (!plat_priv)
  386. return -ENODEV;
  387. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  388. return 0;
  389. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  390. return 0;
  391. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  392. cnss_bus_free_qdss_mem(plat_priv);
  393. return ret;
  394. }
  395. EXPORT_SYMBOL(cnss_wlan_disable);
  396. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  397. dma_addr_t iova, size_t size)
  398. {
  399. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  400. uint32_t page_offset;
  401. if (!plat_priv)
  402. return -ENODEV;
  403. if (!plat_priv->audio_iommu_domain)
  404. return -EINVAL;
  405. page_offset = iova & (PAGE_SIZE - 1);
  406. if (page_offset + size > PAGE_SIZE)
  407. size += PAGE_SIZE;
  408. iova -= page_offset;
  409. paddr -= page_offset;
  410. return iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  411. roundup(size, PAGE_SIZE), IOMMU_READ | IOMMU_WRITE);
  412. }
  413. EXPORT_SYMBOL(cnss_audio_smmu_map);
  414. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  415. {
  416. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  417. uint32_t page_offset;
  418. if (!plat_priv)
  419. return;
  420. if (!plat_priv->audio_iommu_domain)
  421. return;
  422. page_offset = iova & (PAGE_SIZE - 1);
  423. if (page_offset + size > PAGE_SIZE)
  424. size += PAGE_SIZE;
  425. iova -= page_offset;
  426. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  427. roundup(size, PAGE_SIZE));
  428. }
  429. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  430. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  431. u32 data_len, u8 *output)
  432. {
  433. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  434. int ret = 0;
  435. if (!plat_priv) {
  436. cnss_pr_err("plat_priv is NULL!\n");
  437. return -EINVAL;
  438. }
  439. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  440. return 0;
  441. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  442. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  443. plat_priv->driver_state);
  444. ret = -EINVAL;
  445. goto out;
  446. }
  447. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  448. data_len, output);
  449. out:
  450. return ret;
  451. }
  452. EXPORT_SYMBOL(cnss_athdiag_read);
  453. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  454. u32 data_len, u8 *input)
  455. {
  456. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  457. int ret = 0;
  458. if (!plat_priv) {
  459. cnss_pr_err("plat_priv is NULL!\n");
  460. return -EINVAL;
  461. }
  462. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  463. return 0;
  464. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  465. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  466. plat_priv->driver_state);
  467. ret = -EINVAL;
  468. goto out;
  469. }
  470. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  471. data_len, input);
  472. out:
  473. return ret;
  474. }
  475. EXPORT_SYMBOL(cnss_athdiag_write);
  476. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  477. {
  478. struct cnss_plat_data *plat_priv;
  479. if (!dev) {
  480. cnss_pr_err("Invalid dev pointer\n");
  481. return -EINVAL;
  482. }
  483. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  484. if (!plat_priv)
  485. return -ENODEV;
  486. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  487. return 0;
  488. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  489. }
  490. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  491. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  492. {
  493. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  494. if (!plat_priv)
  495. return -EINVAL;
  496. if (!plat_priv->fw_pcie_gen_switch) {
  497. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  498. return -EOPNOTSUPP;
  499. }
  500. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  501. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  502. return -EINVAL;
  503. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  504. plat_priv->pcie_gen_speed = pcie_gen_speed;
  505. return 0;
  506. }
  507. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  508. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  509. {
  510. int ret = 0;
  511. if (!plat_priv)
  512. return -ENODEV;
  513. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  514. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  515. if (ret)
  516. goto out;
  517. if (plat_priv->hds_enabled)
  518. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  519. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  520. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  521. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  522. plat_priv->ctrl_params.bdf_type);
  523. if (ret)
  524. goto out;
  525. ret = cnss_bus_load_m3(plat_priv);
  526. if (ret)
  527. goto out;
  528. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  529. if (ret)
  530. goto out;
  531. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  532. return 0;
  533. out:
  534. return ret;
  535. }
  536. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  537. {
  538. int ret = 0;
  539. if (!plat_priv->antenna) {
  540. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  541. if (ret)
  542. goto out;
  543. }
  544. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  545. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  546. if (ret)
  547. goto out;
  548. }
  549. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  550. if (ret)
  551. goto out;
  552. return 0;
  553. out:
  554. return ret;
  555. }
  556. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  557. {
  558. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  559. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  560. }
  561. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  562. {
  563. u32 i;
  564. int ret = 0;
  565. struct cnss_plat_ipc_daemon_config *cfg;
  566. ret = cnss_qmi_get_dms_mac(plat_priv);
  567. if (ret == 0 && plat_priv->dms.mac_valid)
  568. goto qmi_send;
  569. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  570. * Thus assert on failure to get MAC from DMS even after retries
  571. */
  572. if (plat_priv->use_nv_mac) {
  573. /* Check if Daemon says platform support DMS MAC provisioning */
  574. cfg = cnss_plat_ipc_qmi_daemon_config();
  575. if (cfg) {
  576. if (!cfg->dms_mac_addr_supported) {
  577. cnss_pr_err("DMS MAC address not supported\n");
  578. CNSS_ASSERT(0);
  579. return -EINVAL;
  580. }
  581. }
  582. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  583. if (plat_priv->dms.mac_valid)
  584. break;
  585. ret = cnss_qmi_get_dms_mac(plat_priv);
  586. if (ret == 0)
  587. break;
  588. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  589. }
  590. if (!plat_priv->dms.mac_valid) {
  591. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  592. CNSS_ASSERT(0);
  593. return -EINVAL;
  594. }
  595. }
  596. qmi_send:
  597. if (plat_priv->dms.mac_valid)
  598. ret =
  599. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  600. ARRAY_SIZE(plat_priv->dms.mac));
  601. return ret;
  602. }
  603. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  604. enum cnss_cal_db_op op, u32 *size)
  605. {
  606. int ret = 0;
  607. u32 timeout = cnss_get_timeout(plat_priv,
  608. CNSS_TIMEOUT_DAEMON_CONNECTION);
  609. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  610. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  611. if (op >= CNSS_CAL_DB_INVALID_OP)
  612. return -EINVAL;
  613. if (!plat_priv->cbc_file_download) {
  614. cnss_pr_info("CAL DB file not required as per BDF\n");
  615. return 0;
  616. }
  617. if (*size == 0) {
  618. cnss_pr_err("Invalid cal file size\n");
  619. return -EINVAL;
  620. }
  621. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  622. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  623. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  624. msecs_to_jiffies(timeout));
  625. if (!ret) {
  626. cnss_pr_err("Daemon not yet connected\n");
  627. CNSS_ASSERT(0);
  628. return ret;
  629. }
  630. }
  631. if (!plat_priv->cal_mem->va) {
  632. cnss_pr_err("CAL DB Memory not setup for FW\n");
  633. return -EINVAL;
  634. }
  635. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  636. if (op == CNSS_CAL_DB_DOWNLOAD) {
  637. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  638. ret = cnss_plat_ipc_qmi_file_download(client_id,
  639. CNSS_CAL_DB_FILE_NAME,
  640. plat_priv->cal_mem->va,
  641. size);
  642. } else {
  643. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  644. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  645. CNSS_CAL_DB_FILE_NAME,
  646. plat_priv->cal_mem->va,
  647. *size);
  648. }
  649. if (ret)
  650. cnss_pr_err("Cal DB file %s %s failure\n",
  651. CNSS_CAL_DB_FILE_NAME,
  652. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  653. else
  654. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  655. CNSS_CAL_DB_FILE_NAME,
  656. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  657. *size);
  658. return ret;
  659. }
  660. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  661. {
  662. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  663. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  664. return -EINVAL;
  665. }
  666. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  667. &plat_priv->cal_file_size);
  668. }
  669. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  670. u32 *cal_file_size)
  671. {
  672. /* To download pass the total size of cal DB mem allocated.
  673. * After cal file is download to mem, its size is updated in
  674. * return pointer
  675. */
  676. *cal_file_size = plat_priv->cal_mem->size;
  677. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  678. cal_file_size);
  679. }
  680. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  681. {
  682. int ret = 0;
  683. u32 cal_file_size = 0;
  684. if (!plat_priv)
  685. return -ENODEV;
  686. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  687. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  688. return -EINVAL;
  689. }
  690. cnss_pr_dbg("Processing FW Init Done..\n");
  691. del_timer(&plat_priv->fw_boot_timer);
  692. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  693. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  694. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  695. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  696. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  697. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  698. }
  699. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  700. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  701. CNSS_WALTEST);
  702. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  703. cnss_request_antenna_sharing(plat_priv);
  704. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  705. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  706. plat_priv->cal_time = jiffies;
  707. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  708. CNSS_CALIBRATION);
  709. } else {
  710. ret = cnss_setup_dms_mac(plat_priv);
  711. ret = cnss_bus_call_driver_probe(plat_priv);
  712. }
  713. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  714. goto out;
  715. else if (ret)
  716. goto shutdown;
  717. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  718. return 0;
  719. shutdown:
  720. cnss_bus_dev_shutdown(plat_priv);
  721. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  722. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  723. out:
  724. return ret;
  725. }
  726. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  727. {
  728. switch (type) {
  729. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  730. return "SERVER_ARRIVE";
  731. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  732. return "SERVER_EXIT";
  733. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  734. return "REQUEST_MEM";
  735. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  736. return "FW_MEM_READY";
  737. case CNSS_DRIVER_EVENT_FW_READY:
  738. return "FW_READY";
  739. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  740. return "COLD_BOOT_CAL_START";
  741. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  742. return "COLD_BOOT_CAL_DONE";
  743. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  744. return "REGISTER_DRIVER";
  745. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  746. return "UNREGISTER_DRIVER";
  747. case CNSS_DRIVER_EVENT_RECOVERY:
  748. return "RECOVERY";
  749. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  750. return "FORCE_FW_ASSERT";
  751. case CNSS_DRIVER_EVENT_POWER_UP:
  752. return "POWER_UP";
  753. case CNSS_DRIVER_EVENT_POWER_DOWN:
  754. return "POWER_DOWN";
  755. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  756. return "IDLE_RESTART";
  757. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  758. return "IDLE_SHUTDOWN";
  759. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  760. return "IMS_WFC_CALL_IND";
  761. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  762. return "WLFW_TWC_CFG_IND";
  763. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  764. return "QDSS_TRACE_REQ_MEM";
  765. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  766. return "FW_MEM_FILE_SAVE";
  767. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  768. return "QDSS_TRACE_FREE";
  769. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  770. return "QDSS_TRACE_REQ_DATA";
  771. case CNSS_DRIVER_EVENT_MAX:
  772. return "EVENT_MAX";
  773. }
  774. return "UNKNOWN";
  775. };
  776. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  777. enum cnss_driver_event_type type,
  778. u32 flags, void *data)
  779. {
  780. struct cnss_driver_event *event;
  781. unsigned long irq_flags;
  782. int gfp = GFP_KERNEL;
  783. int ret = 0;
  784. if (!plat_priv)
  785. return -ENODEV;
  786. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  787. cnss_driver_event_to_str(type), type,
  788. flags ? "-sync" : "", plat_priv->driver_state, flags);
  789. if (type >= CNSS_DRIVER_EVENT_MAX) {
  790. cnss_pr_err("Invalid Event type: %d, can't post", type);
  791. return -EINVAL;
  792. }
  793. if (in_interrupt() || irqs_disabled())
  794. gfp = GFP_ATOMIC;
  795. event = kzalloc(sizeof(*event), gfp);
  796. if (!event)
  797. return -ENOMEM;
  798. cnss_pm_stay_awake(plat_priv);
  799. event->type = type;
  800. event->data = data;
  801. init_completion(&event->complete);
  802. event->ret = CNSS_EVENT_PENDING;
  803. event->sync = !!(flags & CNSS_EVENT_SYNC);
  804. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  805. list_add_tail(&event->list, &plat_priv->event_list);
  806. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  807. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  808. if (!(flags & CNSS_EVENT_SYNC))
  809. goto out;
  810. if (flags & CNSS_EVENT_UNKILLABLE)
  811. wait_for_completion(&event->complete);
  812. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  813. ret = wait_for_completion_killable(&event->complete);
  814. else
  815. ret = wait_for_completion_interruptible(&event->complete);
  816. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  817. cnss_driver_event_to_str(type), type,
  818. plat_priv->driver_state, ret, event->ret);
  819. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  820. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  821. event->sync = false;
  822. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  823. ret = -EINTR;
  824. goto out;
  825. }
  826. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  827. ret = event->ret;
  828. kfree(event);
  829. out:
  830. cnss_pm_relax(plat_priv);
  831. return ret;
  832. }
  833. /**
  834. * cnss_get_timeout - Get timeout for corresponding type.
  835. * @plat_priv: Pointer to platform driver context.
  836. * @cnss_timeout_type: Timeout type.
  837. *
  838. * Return: Timeout in milliseconds.
  839. */
  840. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  841. enum cnss_timeout_type timeout_type)
  842. {
  843. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  844. switch (timeout_type) {
  845. case CNSS_TIMEOUT_QMI:
  846. return qmi_timeout;
  847. case CNSS_TIMEOUT_POWER_UP:
  848. return (qmi_timeout << 2);
  849. case CNSS_TIMEOUT_IDLE_RESTART:
  850. /* In idle restart power up sequence, we have fw_boot_timer to
  851. * handle FW initialization failure.
  852. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  853. * account for FW dump collection and FW re-initialization on
  854. * retry.
  855. */
  856. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  857. case CNSS_TIMEOUT_CALIBRATION:
  858. /* Similar to mission mode, in CBC if FW init fails
  859. * fw recovery is tried. Thus return 2x the CBC timeout.
  860. */
  861. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  862. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  863. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  864. case CNSS_TIMEOUT_RDDM:
  865. return CNSS_RDDM_TIMEOUT_MS;
  866. case CNSS_TIMEOUT_RECOVERY:
  867. return RECOVERY_TIMEOUT;
  868. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  869. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  870. default:
  871. return qmi_timeout;
  872. }
  873. }
  874. unsigned int cnss_get_boot_timeout(struct device *dev)
  875. {
  876. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  877. if (!plat_priv) {
  878. cnss_pr_err("plat_priv is NULL\n");
  879. return 0;
  880. }
  881. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  882. }
  883. EXPORT_SYMBOL(cnss_get_boot_timeout);
  884. int cnss_power_up(struct device *dev)
  885. {
  886. int ret = 0;
  887. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  888. unsigned int timeout;
  889. if (!plat_priv) {
  890. cnss_pr_err("plat_priv is NULL\n");
  891. return -ENODEV;
  892. }
  893. cnss_pr_dbg("Powering up device\n");
  894. ret = cnss_driver_event_post(plat_priv,
  895. CNSS_DRIVER_EVENT_POWER_UP,
  896. CNSS_EVENT_SYNC, NULL);
  897. if (ret)
  898. goto out;
  899. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  900. goto out;
  901. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  902. reinit_completion(&plat_priv->power_up_complete);
  903. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  904. msecs_to_jiffies(timeout));
  905. if (!ret) {
  906. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  907. timeout);
  908. ret = -EAGAIN;
  909. goto out;
  910. }
  911. return 0;
  912. out:
  913. return ret;
  914. }
  915. EXPORT_SYMBOL(cnss_power_up);
  916. int cnss_power_down(struct device *dev)
  917. {
  918. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  919. if (!plat_priv) {
  920. cnss_pr_err("plat_priv is NULL\n");
  921. return -ENODEV;
  922. }
  923. cnss_pr_dbg("Powering down device\n");
  924. return cnss_driver_event_post(plat_priv,
  925. CNSS_DRIVER_EVENT_POWER_DOWN,
  926. CNSS_EVENT_SYNC, NULL);
  927. }
  928. EXPORT_SYMBOL(cnss_power_down);
  929. int cnss_idle_restart(struct device *dev)
  930. {
  931. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  932. unsigned int timeout;
  933. int ret = 0;
  934. if (!plat_priv) {
  935. cnss_pr_err("plat_priv is NULL\n");
  936. return -ENODEV;
  937. }
  938. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  939. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  940. return -EBUSY;
  941. }
  942. cnss_pr_dbg("Doing idle restart\n");
  943. reinit_completion(&plat_priv->power_up_complete);
  944. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  945. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  946. ret = -EINVAL;
  947. goto out;
  948. }
  949. ret = cnss_driver_event_post(plat_priv,
  950. CNSS_DRIVER_EVENT_IDLE_RESTART,
  951. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  952. if (ret)
  953. goto out;
  954. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  955. ret = cnss_bus_call_driver_probe(plat_priv);
  956. goto out;
  957. }
  958. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  959. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  960. msecs_to_jiffies(timeout));
  961. if (plat_priv->power_up_error) {
  962. ret = plat_priv->power_up_error;
  963. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  964. cnss_pr_dbg("Power up error:%d, exiting\n",
  965. plat_priv->power_up_error);
  966. goto out;
  967. }
  968. if (!ret) {
  969. /* This exception occurs after attempting retry of FW recovery.
  970. * Thus we can safely power off the device.
  971. */
  972. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  973. timeout);
  974. ret = -ETIMEDOUT;
  975. cnss_power_down(dev);
  976. CNSS_ASSERT(0);
  977. goto out;
  978. }
  979. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  980. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  981. del_timer(&plat_priv->fw_boot_timer);
  982. ret = -EINVAL;
  983. goto out;
  984. }
  985. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  986. * non-DRV is supported only once after device reboots and before wifi
  987. * is turned on. We do not allow switching back to DRV.
  988. * To bring device back into DRV, user needs to reboot device.
  989. */
  990. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  991. cnss_pr_dbg("DRV is disabled\n");
  992. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  993. }
  994. mutex_unlock(&plat_priv->driver_ops_lock);
  995. return 0;
  996. out:
  997. mutex_unlock(&plat_priv->driver_ops_lock);
  998. return ret;
  999. }
  1000. EXPORT_SYMBOL(cnss_idle_restart);
  1001. int cnss_idle_shutdown(struct device *dev)
  1002. {
  1003. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1004. unsigned int timeout;
  1005. int ret;
  1006. if (!plat_priv) {
  1007. cnss_pr_err("plat_priv is NULL\n");
  1008. return -ENODEV;
  1009. }
  1010. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1011. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1012. return -EAGAIN;
  1013. }
  1014. cnss_pr_dbg("Doing idle shutdown\n");
  1015. if (!test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) &&
  1016. !test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1017. goto skip_wait;
  1018. reinit_completion(&plat_priv->recovery_complete);
  1019. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY);
  1020. ret = wait_for_completion_timeout(&plat_priv->recovery_complete,
  1021. msecs_to_jiffies(timeout));
  1022. if (!ret) {
  1023. cnss_pr_err("Timeout (%ums) waiting for recovery to complete\n",
  1024. timeout);
  1025. CNSS_ASSERT(0);
  1026. }
  1027. skip_wait:
  1028. return cnss_driver_event_post(plat_priv,
  1029. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1030. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1031. }
  1032. EXPORT_SYMBOL(cnss_idle_shutdown);
  1033. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1034. {
  1035. int ret = 0;
  1036. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1037. if (ret) {
  1038. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1039. goto out;
  1040. }
  1041. ret = cnss_get_clk(plat_priv);
  1042. if (ret) {
  1043. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1044. goto put_vreg;
  1045. }
  1046. ret = cnss_get_pinctrl(plat_priv);
  1047. if (ret) {
  1048. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1049. goto put_clk;
  1050. }
  1051. return 0;
  1052. put_clk:
  1053. cnss_put_clk(plat_priv);
  1054. put_vreg:
  1055. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1056. out:
  1057. return ret;
  1058. }
  1059. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1060. {
  1061. cnss_put_clk(plat_priv);
  1062. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1063. }
  1064. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1065. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1066. unsigned long code,
  1067. void *ss_handle)
  1068. {
  1069. struct cnss_plat_data *plat_priv =
  1070. container_of(nb, struct cnss_plat_data, modem_nb);
  1071. struct cnss_esoc_info *esoc_info;
  1072. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1073. if (!plat_priv)
  1074. return NOTIFY_DONE;
  1075. esoc_info = &plat_priv->esoc_info;
  1076. if (code == SUBSYS_AFTER_POWERUP)
  1077. esoc_info->modem_current_status = 1;
  1078. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1079. esoc_info->modem_current_status = 0;
  1080. else
  1081. return NOTIFY_DONE;
  1082. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1083. esoc_info->modem_current_status))
  1084. return NOTIFY_DONE;
  1085. return NOTIFY_OK;
  1086. }
  1087. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1088. {
  1089. int ret = 0;
  1090. struct device *dev;
  1091. struct cnss_esoc_info *esoc_info;
  1092. struct esoc_desc *esoc_desc;
  1093. const char *client_desc;
  1094. dev = &plat_priv->plat_dev->dev;
  1095. esoc_info = &plat_priv->esoc_info;
  1096. esoc_info->notify_modem_status =
  1097. of_property_read_bool(dev->of_node,
  1098. "qcom,notify-modem-status");
  1099. if (!esoc_info->notify_modem_status)
  1100. goto out;
  1101. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1102. &client_desc);
  1103. if (ret) {
  1104. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1105. } else {
  1106. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1107. if (IS_ERR_OR_NULL(esoc_desc)) {
  1108. ret = PTR_RET(esoc_desc);
  1109. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1110. ret);
  1111. goto out;
  1112. }
  1113. esoc_info->esoc_desc = esoc_desc;
  1114. }
  1115. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1116. esoc_info->modem_current_status = 0;
  1117. esoc_info->modem_notify_handler =
  1118. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1119. esoc_info->esoc_desc->name :
  1120. "modem", &plat_priv->modem_nb);
  1121. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1122. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1123. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1124. ret);
  1125. goto unreg_esoc;
  1126. }
  1127. return 0;
  1128. unreg_esoc:
  1129. if (esoc_info->esoc_desc)
  1130. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1131. out:
  1132. return ret;
  1133. }
  1134. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1135. {
  1136. struct device *dev;
  1137. struct cnss_esoc_info *esoc_info;
  1138. dev = &plat_priv->plat_dev->dev;
  1139. esoc_info = &plat_priv->esoc_info;
  1140. if (esoc_info->notify_modem_status)
  1141. subsys_notif_unregister_notifier
  1142. (esoc_info->modem_notify_handler,
  1143. &plat_priv->modem_nb);
  1144. if (esoc_info->esoc_desc)
  1145. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1146. }
  1147. #else
  1148. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1149. {
  1150. return 0;
  1151. }
  1152. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1153. #endif
  1154. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1155. {
  1156. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1157. int ret = 0;
  1158. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1159. return 0;
  1160. enable_irq(sol_gpio->dev_sol_irq);
  1161. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1162. if (ret)
  1163. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1164. ret);
  1165. return ret;
  1166. }
  1167. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1168. {
  1169. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1170. int ret = 0;
  1171. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1172. return 0;
  1173. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1174. if (ret)
  1175. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1176. ret);
  1177. disable_irq(sol_gpio->dev_sol_irq);
  1178. return ret;
  1179. }
  1180. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1181. {
  1182. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1183. if (sol_gpio->dev_sol_gpio < 0)
  1184. return -EINVAL;
  1185. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1186. }
  1187. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1188. {
  1189. struct cnss_plat_data *plat_priv = data;
  1190. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1191. sol_gpio->dev_sol_counter++;
  1192. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1193. irq, sol_gpio->dev_sol_counter);
  1194. /* Make sure abort current suspend */
  1195. cnss_pm_stay_awake(plat_priv);
  1196. cnss_pm_relax(plat_priv);
  1197. pm_system_wakeup();
  1198. cnss_bus_handle_dev_sol_irq(plat_priv);
  1199. return IRQ_HANDLED;
  1200. }
  1201. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1202. {
  1203. struct device *dev = &plat_priv->plat_dev->dev;
  1204. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1205. int ret = 0;
  1206. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1207. "wlan-dev-sol-gpio", 0);
  1208. if (sol_gpio->dev_sol_gpio < 0)
  1209. goto out;
  1210. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1211. sol_gpio->dev_sol_gpio);
  1212. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1213. if (ret) {
  1214. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1215. ret);
  1216. goto out;
  1217. }
  1218. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1219. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1220. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1221. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1222. if (ret) {
  1223. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1224. goto free_gpio;
  1225. }
  1226. return 0;
  1227. free_gpio:
  1228. gpio_free(sol_gpio->dev_sol_gpio);
  1229. out:
  1230. return ret;
  1231. }
  1232. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1233. {
  1234. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1235. if (sol_gpio->dev_sol_gpio < 0)
  1236. return;
  1237. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1238. gpio_free(sol_gpio->dev_sol_gpio);
  1239. }
  1240. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1241. {
  1242. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1243. if (sol_gpio->host_sol_gpio < 0)
  1244. return -EINVAL;
  1245. if (value)
  1246. cnss_pr_dbg("Assert host SOL GPIO\n");
  1247. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1248. return 0;
  1249. }
  1250. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1251. {
  1252. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1253. if (sol_gpio->host_sol_gpio < 0)
  1254. return -EINVAL;
  1255. return gpio_get_value(sol_gpio->host_sol_gpio);
  1256. }
  1257. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1258. {
  1259. struct device *dev = &plat_priv->plat_dev->dev;
  1260. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1261. int ret = 0;
  1262. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1263. "wlan-host-sol-gpio", 0);
  1264. if (sol_gpio->host_sol_gpio < 0)
  1265. goto out;
  1266. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1267. sol_gpio->host_sol_gpio);
  1268. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1269. if (ret) {
  1270. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1271. ret);
  1272. goto out;
  1273. }
  1274. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1275. return 0;
  1276. out:
  1277. return ret;
  1278. }
  1279. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1280. {
  1281. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1282. if (sol_gpio->host_sol_gpio < 0)
  1283. return;
  1284. gpio_free(sol_gpio->host_sol_gpio);
  1285. }
  1286. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1287. {
  1288. int ret;
  1289. ret = cnss_init_dev_sol_gpio(plat_priv);
  1290. if (ret)
  1291. goto out;
  1292. ret = cnss_init_host_sol_gpio(plat_priv);
  1293. if (ret)
  1294. goto deinit_dev_sol;
  1295. return 0;
  1296. deinit_dev_sol:
  1297. cnss_deinit_dev_sol_gpio(plat_priv);
  1298. out:
  1299. return ret;
  1300. }
  1301. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1302. {
  1303. cnss_deinit_host_sol_gpio(plat_priv);
  1304. cnss_deinit_dev_sol_gpio(plat_priv);
  1305. }
  1306. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1307. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1308. {
  1309. struct cnss_plat_data *plat_priv;
  1310. int ret = 0;
  1311. if (!subsys_desc->dev) {
  1312. cnss_pr_err("dev from subsys_desc is NULL\n");
  1313. return -ENODEV;
  1314. }
  1315. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1316. if (!plat_priv) {
  1317. cnss_pr_err("plat_priv is NULL\n");
  1318. return -ENODEV;
  1319. }
  1320. if (!plat_priv->driver_state) {
  1321. cnss_pr_dbg("subsys powerup is ignored\n");
  1322. return 0;
  1323. }
  1324. ret = cnss_bus_dev_powerup(plat_priv);
  1325. if (ret)
  1326. __pm_relax(plat_priv->recovery_ws);
  1327. return ret;
  1328. }
  1329. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1330. bool force_stop)
  1331. {
  1332. struct cnss_plat_data *plat_priv;
  1333. if (!subsys_desc->dev) {
  1334. cnss_pr_err("dev from subsys_desc is NULL\n");
  1335. return -ENODEV;
  1336. }
  1337. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1338. if (!plat_priv) {
  1339. cnss_pr_err("plat_priv is NULL\n");
  1340. return -ENODEV;
  1341. }
  1342. if (!plat_priv->driver_state) {
  1343. cnss_pr_dbg("subsys shutdown is ignored\n");
  1344. return 0;
  1345. }
  1346. return cnss_bus_dev_shutdown(plat_priv);
  1347. }
  1348. void cnss_device_crashed(struct device *dev)
  1349. {
  1350. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1351. struct cnss_subsys_info *subsys_info;
  1352. if (!plat_priv)
  1353. return;
  1354. subsys_info = &plat_priv->subsys_info;
  1355. if (subsys_info->subsys_device) {
  1356. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1357. subsys_set_crash_status(subsys_info->subsys_device, true);
  1358. subsystem_restart_dev(subsys_info->subsys_device);
  1359. }
  1360. }
  1361. EXPORT_SYMBOL(cnss_device_crashed);
  1362. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1363. {
  1364. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1365. if (!plat_priv) {
  1366. cnss_pr_err("plat_priv is NULL\n");
  1367. return;
  1368. }
  1369. cnss_bus_dev_crash_shutdown(plat_priv);
  1370. }
  1371. static int cnss_subsys_ramdump(int enable,
  1372. const struct subsys_desc *subsys_desc)
  1373. {
  1374. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1375. if (!plat_priv) {
  1376. cnss_pr_err("plat_priv is NULL\n");
  1377. return -ENODEV;
  1378. }
  1379. if (!enable)
  1380. return 0;
  1381. return cnss_bus_dev_ramdump(plat_priv);
  1382. }
  1383. static void cnss_recovery_work_handler(struct work_struct *work)
  1384. {
  1385. }
  1386. #else
  1387. static void cnss_recovery_work_handler(struct work_struct *work)
  1388. {
  1389. int ret;
  1390. struct cnss_plat_data *plat_priv =
  1391. container_of(work, struct cnss_plat_data, recovery_work);
  1392. if (!plat_priv->recovery_enabled)
  1393. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1394. cnss_bus_dev_shutdown(plat_priv);
  1395. cnss_bus_dev_ramdump(plat_priv);
  1396. msleep(POWER_RESET_MIN_DELAY_MS);
  1397. ret = cnss_bus_dev_powerup(plat_priv);
  1398. if (ret)
  1399. __pm_relax(plat_priv->recovery_ws);
  1400. return;
  1401. }
  1402. void cnss_device_crashed(struct device *dev)
  1403. {
  1404. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1405. if (!plat_priv)
  1406. return;
  1407. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1408. schedule_work(&plat_priv->recovery_work);
  1409. }
  1410. EXPORT_SYMBOL(cnss_device_crashed);
  1411. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1412. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1413. {
  1414. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1415. struct cnss_ramdump_info *ramdump_info;
  1416. if (!plat_priv)
  1417. return NULL;
  1418. ramdump_info = &plat_priv->ramdump_info;
  1419. *size = ramdump_info->ramdump_size;
  1420. return ramdump_info->ramdump_va;
  1421. }
  1422. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1423. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1424. {
  1425. switch (reason) {
  1426. case CNSS_REASON_DEFAULT:
  1427. return "DEFAULT";
  1428. case CNSS_REASON_LINK_DOWN:
  1429. return "LINK_DOWN";
  1430. case CNSS_REASON_RDDM:
  1431. return "RDDM";
  1432. case CNSS_REASON_TIMEOUT:
  1433. return "TIMEOUT";
  1434. }
  1435. return "UNKNOWN";
  1436. };
  1437. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1438. enum cnss_recovery_reason reason)
  1439. {
  1440. plat_priv->recovery_count++;
  1441. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1442. goto self_recovery;
  1443. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1444. cnss_pr_dbg("Skip device recovery\n");
  1445. return 0;
  1446. }
  1447. /* FW recovery sequence has multiple steps and firmware load requires
  1448. * linux PM in awake state. Thus hold the cnss wake source until
  1449. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1450. * time taken in this process.
  1451. */
  1452. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1453. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1454. true);
  1455. switch (reason) {
  1456. case CNSS_REASON_LINK_DOWN:
  1457. if (!cnss_bus_check_link_status(plat_priv)) {
  1458. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1459. return 0;
  1460. }
  1461. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1462. &plat_priv->ctrl_params.quirks))
  1463. goto self_recovery;
  1464. if (!cnss_bus_recover_link_down(plat_priv)) {
  1465. /* clear recovery bit here to avoid skipping
  1466. * the recovery work for RDDM later
  1467. */
  1468. clear_bit(CNSS_DRIVER_RECOVERY,
  1469. &plat_priv->driver_state);
  1470. return 0;
  1471. }
  1472. break;
  1473. case CNSS_REASON_RDDM:
  1474. cnss_bus_collect_dump_info(plat_priv, false);
  1475. break;
  1476. case CNSS_REASON_DEFAULT:
  1477. case CNSS_REASON_TIMEOUT:
  1478. break;
  1479. default:
  1480. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1481. cnss_recovery_reason_to_str(reason), reason);
  1482. break;
  1483. }
  1484. cnss_bus_device_crashed(plat_priv);
  1485. return 0;
  1486. self_recovery:
  1487. cnss_pr_dbg("Going for self recovery\n");
  1488. cnss_bus_dev_shutdown(plat_priv);
  1489. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1490. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1491. &plat_priv->ctrl_params.quirks);
  1492. cnss_bus_dev_powerup(plat_priv);
  1493. return 0;
  1494. }
  1495. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1496. void *data)
  1497. {
  1498. struct cnss_recovery_data *recovery_data = data;
  1499. int ret = 0;
  1500. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1501. cnss_recovery_reason_to_str(recovery_data->reason),
  1502. recovery_data->reason);
  1503. if (!plat_priv->driver_state) {
  1504. cnss_pr_err("Improper driver state, ignore recovery\n");
  1505. ret = -EINVAL;
  1506. goto out;
  1507. }
  1508. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1509. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1510. ret = -EINVAL;
  1511. goto out;
  1512. }
  1513. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1514. cnss_pr_err("Recovery is already in progress\n");
  1515. CNSS_ASSERT(0);
  1516. ret = -EINVAL;
  1517. goto out;
  1518. }
  1519. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1520. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1521. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1522. ret = -EINVAL;
  1523. goto out;
  1524. }
  1525. switch (plat_priv->device_id) {
  1526. case QCA6174_DEVICE_ID:
  1527. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1528. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1529. &plat_priv->driver_state)) {
  1530. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1531. ret = -EINVAL;
  1532. goto out;
  1533. }
  1534. break;
  1535. default:
  1536. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1537. set_bit(CNSS_FW_BOOT_RECOVERY,
  1538. &plat_priv->driver_state);
  1539. }
  1540. break;
  1541. }
  1542. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1543. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1544. out:
  1545. kfree(data);
  1546. return ret;
  1547. }
  1548. int cnss_self_recovery(struct device *dev,
  1549. enum cnss_recovery_reason reason)
  1550. {
  1551. cnss_schedule_recovery(dev, reason);
  1552. return 0;
  1553. }
  1554. EXPORT_SYMBOL(cnss_self_recovery);
  1555. void cnss_schedule_recovery(struct device *dev,
  1556. enum cnss_recovery_reason reason)
  1557. {
  1558. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1559. struct cnss_recovery_data *data;
  1560. int gfp = GFP_KERNEL;
  1561. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1562. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1563. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1564. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1565. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1566. return;
  1567. }
  1568. if (in_interrupt() || irqs_disabled())
  1569. gfp = GFP_ATOMIC;
  1570. data = kzalloc(sizeof(*data), gfp);
  1571. if (!data)
  1572. return;
  1573. data->reason = reason;
  1574. cnss_driver_event_post(plat_priv,
  1575. CNSS_DRIVER_EVENT_RECOVERY,
  1576. 0, data);
  1577. }
  1578. EXPORT_SYMBOL(cnss_schedule_recovery);
  1579. int cnss_force_fw_assert(struct device *dev)
  1580. {
  1581. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1582. if (!plat_priv) {
  1583. cnss_pr_err("plat_priv is NULL\n");
  1584. return -ENODEV;
  1585. }
  1586. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1587. cnss_pr_info("Forced FW assert is not supported\n");
  1588. return -EOPNOTSUPP;
  1589. }
  1590. if (cnss_bus_is_device_down(plat_priv)) {
  1591. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1592. return 0;
  1593. }
  1594. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1595. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1596. return 0;
  1597. }
  1598. if (in_interrupt() || irqs_disabled())
  1599. cnss_driver_event_post(plat_priv,
  1600. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1601. 0, NULL);
  1602. else
  1603. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1604. return 0;
  1605. }
  1606. EXPORT_SYMBOL(cnss_force_fw_assert);
  1607. int cnss_force_collect_rddm(struct device *dev)
  1608. {
  1609. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1610. unsigned int timeout;
  1611. int ret = 0;
  1612. if (!plat_priv) {
  1613. cnss_pr_err("plat_priv is NULL\n");
  1614. return -ENODEV;
  1615. }
  1616. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1617. cnss_pr_info("Force collect rddm is not supported\n");
  1618. return -EOPNOTSUPP;
  1619. }
  1620. if (cnss_bus_is_device_down(plat_priv)) {
  1621. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1622. goto wait_rddm;
  1623. }
  1624. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1625. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1626. goto wait_rddm;
  1627. }
  1628. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1629. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1630. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1631. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1632. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1633. return 0;
  1634. }
  1635. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1636. if (ret)
  1637. return ret;
  1638. wait_rddm:
  1639. reinit_completion(&plat_priv->rddm_complete);
  1640. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1641. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1642. msecs_to_jiffies(timeout));
  1643. if (!ret) {
  1644. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1645. timeout);
  1646. ret = -ETIMEDOUT;
  1647. } else if (ret > 0) {
  1648. ret = 0;
  1649. }
  1650. return ret;
  1651. }
  1652. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1653. int cnss_qmi_send_get(struct device *dev)
  1654. {
  1655. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1656. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1657. return 0;
  1658. return cnss_bus_qmi_send_get(plat_priv);
  1659. }
  1660. EXPORT_SYMBOL(cnss_qmi_send_get);
  1661. int cnss_qmi_send_put(struct device *dev)
  1662. {
  1663. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1664. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1665. return 0;
  1666. return cnss_bus_qmi_send_put(plat_priv);
  1667. }
  1668. EXPORT_SYMBOL(cnss_qmi_send_put);
  1669. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1670. int cmd_len, void *cb_ctx,
  1671. int (*cb)(void *ctx, void *event, int event_len))
  1672. {
  1673. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1674. int ret;
  1675. if (!plat_priv)
  1676. return -ENODEV;
  1677. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1678. return -EINVAL;
  1679. plat_priv->get_info_cb = cb;
  1680. plat_priv->get_info_cb_ctx = cb_ctx;
  1681. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1682. if (ret) {
  1683. plat_priv->get_info_cb = NULL;
  1684. plat_priv->get_info_cb_ctx = NULL;
  1685. }
  1686. return ret;
  1687. }
  1688. EXPORT_SYMBOL(cnss_qmi_send);
  1689. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1690. {
  1691. int ret = 0;
  1692. u32 retry = 0, timeout;
  1693. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1694. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1695. goto out;
  1696. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1697. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1698. goto out;
  1699. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1700. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1701. goto out;
  1702. }
  1703. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1704. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1705. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1706. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1707. CNSS_ASSERT(0);
  1708. return -EINVAL;
  1709. }
  1710. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1711. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1712. break;
  1713. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1714. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1715. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1716. CNSS_ASSERT(0);
  1717. ret = -EINVAL;
  1718. goto mark_cal_fail;
  1719. }
  1720. }
  1721. switch (plat_priv->device_id) {
  1722. case QCA6290_DEVICE_ID:
  1723. case QCA6390_DEVICE_ID:
  1724. case QCA6490_DEVICE_ID:
  1725. case KIWI_DEVICE_ID:
  1726. case MANGO_DEVICE_ID:
  1727. break;
  1728. default:
  1729. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1730. plat_priv->device_id);
  1731. ret = -EINVAL;
  1732. goto mark_cal_fail;
  1733. }
  1734. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1735. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1736. timeout = cnss_get_timeout(plat_priv,
  1737. CNSS_TIMEOUT_CALIBRATION);
  1738. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1739. timeout / 1000);
  1740. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1741. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1742. msecs_to_jiffies(timeout));
  1743. }
  1744. reinit_completion(&plat_priv->cal_complete);
  1745. ret = cnss_bus_dev_powerup(plat_priv);
  1746. mark_cal_fail:
  1747. if (ret) {
  1748. complete(&plat_priv->cal_complete);
  1749. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1750. /* Set CBC done in driver state to mark attempt and note error
  1751. * since calibration cannot be retried at boot.
  1752. */
  1753. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1754. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1755. }
  1756. out:
  1757. return ret;
  1758. }
  1759. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1760. void *data)
  1761. {
  1762. struct cnss_cal_info *cal_info = data;
  1763. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1764. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1765. goto out;
  1766. switch (cal_info->cal_status) {
  1767. case CNSS_CAL_DONE:
  1768. cnss_pr_dbg("Calibration completed successfully\n");
  1769. plat_priv->cal_done = true;
  1770. break;
  1771. case CNSS_CAL_TIMEOUT:
  1772. case CNSS_CAL_FAILURE:
  1773. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1774. cal_info->cal_status);
  1775. break;
  1776. default:
  1777. cnss_pr_err("Unknown calibration status: %u\n",
  1778. cal_info->cal_status);
  1779. break;
  1780. }
  1781. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1782. cnss_bus_free_qdss_mem(plat_priv);
  1783. cnss_release_antenna_sharing(plat_priv);
  1784. cnss_bus_dev_shutdown(plat_priv);
  1785. msleep(POWER_RESET_MIN_DELAY_MS);
  1786. complete(&plat_priv->cal_complete);
  1787. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1788. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1789. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1790. cnss_cal_mem_upload_to_file(plat_priv);
  1791. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1792. goto out;
  1793. cnss_pr_dbg("Schedule WLAN driver load\n");
  1794. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1795. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1796. 0);
  1797. }
  1798. out:
  1799. kfree(data);
  1800. return 0;
  1801. }
  1802. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1803. {
  1804. int ret;
  1805. ret = cnss_bus_dev_powerup(plat_priv);
  1806. if (ret)
  1807. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1808. return ret;
  1809. }
  1810. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1811. {
  1812. cnss_bus_dev_shutdown(plat_priv);
  1813. return 0;
  1814. }
  1815. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1816. {
  1817. int ret = 0;
  1818. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1819. if (ret < 0)
  1820. return ret;
  1821. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1822. }
  1823. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1824. u32 mem_seg_len, u64 pa, u32 size)
  1825. {
  1826. int i = 0;
  1827. u64 offset = 0;
  1828. void *va = NULL;
  1829. u64 local_pa;
  1830. u32 local_size;
  1831. for (i = 0; i < mem_seg_len; i++) {
  1832. local_pa = (u64)fw_mem[i].pa;
  1833. local_size = (u32)fw_mem[i].size;
  1834. if (pa == local_pa && size <= local_size) {
  1835. va = fw_mem[i].va;
  1836. break;
  1837. }
  1838. if (pa > local_pa &&
  1839. pa < local_pa + local_size &&
  1840. pa + size <= local_pa + local_size) {
  1841. offset = pa - local_pa;
  1842. va = fw_mem[i].va + offset;
  1843. break;
  1844. }
  1845. }
  1846. return va;
  1847. }
  1848. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1849. void *data)
  1850. {
  1851. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1852. struct cnss_fw_mem *fw_mem_seg;
  1853. int ret = 0L;
  1854. void *va = NULL;
  1855. u32 i, fw_mem_seg_len;
  1856. switch (event_data->mem_type) {
  1857. case QMI_WLFW_MEM_TYPE_DDR_V01:
  1858. if (!plat_priv->fw_mem_seg_len)
  1859. goto invalid_mem_save;
  1860. fw_mem_seg = plat_priv->fw_mem;
  1861. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  1862. break;
  1863. case QMI_WLFW_MEM_QDSS_V01:
  1864. if (!plat_priv->qdss_mem_seg_len)
  1865. goto invalid_mem_save;
  1866. fw_mem_seg = plat_priv->qdss_mem;
  1867. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  1868. break;
  1869. default:
  1870. goto invalid_mem_save;
  1871. }
  1872. for (i = 0; i < event_data->mem_seg_len; i++) {
  1873. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  1874. event_data->mem_seg[i].addr,
  1875. event_data->mem_seg[i].size);
  1876. if (!va) {
  1877. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  1878. &event_data->mem_seg[i].addr,
  1879. event_data->mem_type);
  1880. ret = -EINVAL;
  1881. break;
  1882. }
  1883. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  1884. event_data->file_name,
  1885. event_data->mem_seg[i].size);
  1886. if (ret < 0) {
  1887. cnss_pr_err("Fail to save fw mem data: %d\n",
  1888. ret);
  1889. break;
  1890. }
  1891. }
  1892. kfree(data);
  1893. return ret;
  1894. invalid_mem_save:
  1895. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  1896. event_data->mem_type);
  1897. kfree(data);
  1898. return -EINVAL;
  1899. }
  1900. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  1901. {
  1902. cnss_bus_free_qdss_mem(plat_priv);
  1903. return 0;
  1904. }
  1905. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  1906. void *data)
  1907. {
  1908. int ret = 0;
  1909. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1910. if (!plat_priv)
  1911. return -ENODEV;
  1912. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  1913. event_data->total_size);
  1914. kfree(data);
  1915. return ret;
  1916. }
  1917. static void cnss_driver_event_work(struct work_struct *work)
  1918. {
  1919. struct cnss_plat_data *plat_priv =
  1920. container_of(work, struct cnss_plat_data, event_work);
  1921. struct cnss_driver_event *event;
  1922. unsigned long flags;
  1923. int ret = 0;
  1924. if (!plat_priv) {
  1925. cnss_pr_err("plat_priv is NULL!\n");
  1926. return;
  1927. }
  1928. cnss_pm_stay_awake(plat_priv);
  1929. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1930. while (!list_empty(&plat_priv->event_list)) {
  1931. event = list_first_entry(&plat_priv->event_list,
  1932. struct cnss_driver_event, list);
  1933. list_del(&event->list);
  1934. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1935. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  1936. cnss_driver_event_to_str(event->type),
  1937. event->sync ? "-sync" : "", event->type,
  1938. plat_priv->driver_state);
  1939. switch (event->type) {
  1940. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1941. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  1942. break;
  1943. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  1944. ret = cnss_wlfw_server_exit(plat_priv);
  1945. break;
  1946. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  1947. ret = cnss_bus_alloc_fw_mem(plat_priv);
  1948. if (ret)
  1949. break;
  1950. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  1951. break;
  1952. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  1953. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  1954. break;
  1955. case CNSS_DRIVER_EVENT_FW_READY:
  1956. ret = cnss_fw_ready_hdlr(plat_priv);
  1957. break;
  1958. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  1959. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  1960. break;
  1961. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  1962. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  1963. event->data);
  1964. break;
  1965. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1966. ret = cnss_bus_register_driver_hdlr(plat_priv,
  1967. event->data);
  1968. break;
  1969. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1970. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  1971. break;
  1972. case CNSS_DRIVER_EVENT_RECOVERY:
  1973. ret = cnss_driver_recovery_hdlr(plat_priv,
  1974. event->data);
  1975. break;
  1976. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1977. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1978. break;
  1979. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1980. set_bit(CNSS_DRIVER_IDLE_RESTART,
  1981. &plat_priv->driver_state);
  1982. fallthrough;
  1983. case CNSS_DRIVER_EVENT_POWER_UP:
  1984. ret = cnss_power_up_hdlr(plat_priv);
  1985. break;
  1986. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1987. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  1988. &plat_priv->driver_state);
  1989. fallthrough;
  1990. case CNSS_DRIVER_EVENT_POWER_DOWN:
  1991. ret = cnss_power_down_hdlr(plat_priv);
  1992. break;
  1993. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1994. ret = cnss_process_wfc_call_ind_event(plat_priv,
  1995. event->data);
  1996. break;
  1997. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1998. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  1999. event->data);
  2000. break;
  2001. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2002. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2003. break;
  2004. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2005. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2006. event->data);
  2007. break;
  2008. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2009. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2010. break;
  2011. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2012. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2013. event->data);
  2014. break;
  2015. default:
  2016. cnss_pr_err("Invalid driver event type: %d",
  2017. event->type);
  2018. kfree(event);
  2019. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2020. continue;
  2021. }
  2022. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2023. if (event->sync) {
  2024. event->ret = ret;
  2025. complete(&event->complete);
  2026. continue;
  2027. }
  2028. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2029. kfree(event);
  2030. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2031. }
  2032. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2033. cnss_pm_relax(plat_priv);
  2034. }
  2035. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2036. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2037. {
  2038. int ret = 0;
  2039. struct cnss_subsys_info *subsys_info;
  2040. subsys_info = &plat_priv->subsys_info;
  2041. subsys_info->subsys_desc.name = "wlan";
  2042. subsys_info->subsys_desc.owner = THIS_MODULE;
  2043. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2044. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2045. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2046. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2047. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2048. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2049. if (IS_ERR(subsys_info->subsys_device)) {
  2050. ret = PTR_ERR(subsys_info->subsys_device);
  2051. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2052. goto out;
  2053. }
  2054. subsys_info->subsys_handle =
  2055. subsystem_get(subsys_info->subsys_desc.name);
  2056. if (!subsys_info->subsys_handle) {
  2057. cnss_pr_err("Failed to get subsys_handle!\n");
  2058. ret = -EINVAL;
  2059. goto unregister_subsys;
  2060. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2061. ret = PTR_ERR(subsys_info->subsys_handle);
  2062. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2063. goto unregister_subsys;
  2064. }
  2065. return 0;
  2066. unregister_subsys:
  2067. subsys_unregister(subsys_info->subsys_device);
  2068. out:
  2069. return ret;
  2070. }
  2071. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2072. {
  2073. struct cnss_subsys_info *subsys_info;
  2074. subsys_info = &plat_priv->subsys_info;
  2075. subsystem_put(subsys_info->subsys_handle);
  2076. subsys_unregister(subsys_info->subsys_device);
  2077. }
  2078. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2079. {
  2080. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2081. return create_ramdump_device(subsys_info->subsys_desc.name,
  2082. subsys_info->subsys_desc.dev);
  2083. }
  2084. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2085. void *ramdump_dev)
  2086. {
  2087. destroy_ramdump_device(ramdump_dev);
  2088. }
  2089. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2090. {
  2091. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2092. struct ramdump_segment segment;
  2093. memset(&segment, 0, sizeof(segment));
  2094. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2095. segment.size = ramdump_info->ramdump_size;
  2096. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2097. }
  2098. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2099. {
  2100. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2101. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2102. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2103. struct ramdump_segment *ramdump_segs, *s;
  2104. struct cnss_dump_meta_info meta_info = {0};
  2105. int i, ret = 0;
  2106. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2107. sizeof(*ramdump_segs),
  2108. GFP_KERNEL);
  2109. if (!ramdump_segs)
  2110. return -ENOMEM;
  2111. s = ramdump_segs + 1;
  2112. for (i = 0; i < dump_data->nentries; i++) {
  2113. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2114. cnss_pr_err("Unsupported dump type: %d",
  2115. dump_seg->type);
  2116. continue;
  2117. }
  2118. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2119. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2120. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2121. }
  2122. meta_info.entry[dump_seg->type].entry_num++;
  2123. s->address = dump_seg->address;
  2124. s->v_address = (void __iomem *)dump_seg->v_address;
  2125. s->size = dump_seg->size;
  2126. s++;
  2127. dump_seg++;
  2128. }
  2129. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2130. meta_info.version = CNSS_RAMDUMP_VERSION;
  2131. meta_info.chipset = plat_priv->device_id;
  2132. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2133. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2134. ramdump_segs->size = sizeof(meta_info);
  2135. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2136. dump_data->nentries + 1);
  2137. kfree(ramdump_segs);
  2138. return ret;
  2139. }
  2140. #else
  2141. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2142. void *data)
  2143. {
  2144. struct cnss_plat_data *plat_priv =
  2145. container_of(nb, struct cnss_plat_data, panic_nb);
  2146. cnss_bus_dev_crash_shutdown(plat_priv);
  2147. return NOTIFY_DONE;
  2148. }
  2149. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2150. {
  2151. int ret;
  2152. if (!plat_priv)
  2153. return -ENODEV;
  2154. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2155. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2156. &plat_priv->panic_nb);
  2157. if (ret) {
  2158. cnss_pr_err("Failed to register panic handler\n");
  2159. return -EINVAL;
  2160. }
  2161. return 0;
  2162. }
  2163. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2164. {
  2165. int ret;
  2166. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2167. &plat_priv->panic_nb);
  2168. if (ret)
  2169. cnss_pr_err("Failed to unregister panic handler\n");
  2170. }
  2171. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2172. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2173. {
  2174. return &plat_priv->plat_dev->dev;
  2175. }
  2176. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2177. void *ramdump_dev)
  2178. {
  2179. }
  2180. #endif
  2181. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2182. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2183. {
  2184. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2185. struct qcom_dump_segment segment;
  2186. struct list_head head;
  2187. INIT_LIST_HEAD(&head);
  2188. memset(&segment, 0, sizeof(segment));
  2189. segment.va = ramdump_info->ramdump_va;
  2190. segment.size = ramdump_info->ramdump_size;
  2191. list_add(&segment.node, &head);
  2192. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2193. }
  2194. #else
  2195. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2196. {
  2197. return 0;
  2198. }
  2199. /* Using completion event inside dynamically allocated ramdump_desc
  2200. * may result a race between freeing the event after setting it to
  2201. * complete inside dev coredump free callback and the thread that is
  2202. * waiting for completion.
  2203. */
  2204. DECLARE_COMPLETION(dump_done);
  2205. #define TIMEOUT_SAVE_DUMP_MS 30000
  2206. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2207. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2208. { \
  2209. if (class == ELFCLASS32) \
  2210. return sizeof(struct elf32_##__xhdr); \
  2211. else \
  2212. return sizeof(struct elf64_##__xhdr); \
  2213. }
  2214. SIZEOF_ELF_STRUCT(phdr)
  2215. SIZEOF_ELF_STRUCT(hdr)
  2216. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2217. do { \
  2218. if (class == ELFCLASS32) \
  2219. ((struct elf32_##__xhdr *)arg)->member = value; \
  2220. else \
  2221. ((struct elf64_##__xhdr *)arg)->member = value; \
  2222. } while (0)
  2223. #define set_ehdr_property(arg, class, member, value) \
  2224. set_xhdr_property(hdr, arg, class, member, value)
  2225. #define set_phdr_property(arg, class, member, value) \
  2226. set_xhdr_property(phdr, arg, class, member, value)
  2227. /* These replace qcom_ramdump driver APIs called from common API
  2228. * cnss_do_elf_dump() by the ones defined here.
  2229. */
  2230. #define qcom_dump_segment cnss_qcom_dump_segment
  2231. #define qcom_elf_dump cnss_qcom_elf_dump
  2232. #define dump_enabled cnss_dump_enabled
  2233. struct cnss_qcom_dump_segment {
  2234. struct list_head node;
  2235. dma_addr_t da;
  2236. void *va;
  2237. size_t size;
  2238. };
  2239. struct cnss_qcom_ramdump_desc {
  2240. void *data;
  2241. struct completion dump_done;
  2242. };
  2243. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2244. void *data, size_t datalen)
  2245. {
  2246. struct cnss_qcom_ramdump_desc *desc = data;
  2247. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2248. datalen);
  2249. }
  2250. static void cnss_qcom_devcd_freev(void *data)
  2251. {
  2252. struct cnss_qcom_ramdump_desc *desc = data;
  2253. cnss_pr_dbg("Free dump data for dev coredump\n");
  2254. complete(&dump_done);
  2255. vfree(desc->data);
  2256. kfree(desc);
  2257. }
  2258. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2259. gfp_t gfp)
  2260. {
  2261. struct cnss_qcom_ramdump_desc *desc;
  2262. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2263. int ret;
  2264. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2265. if (!desc)
  2266. return -ENOMEM;
  2267. desc->data = data;
  2268. reinit_completion(&dump_done);
  2269. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2270. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2271. ret = wait_for_completion_timeout(&dump_done,
  2272. msecs_to_jiffies(timeout));
  2273. if (!ret)
  2274. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2275. timeout);
  2276. return ret ? 0 : -ETIMEDOUT;
  2277. }
  2278. /* Since the elf32 and elf64 identification is identical apart from
  2279. * the class, use elf32 by default.
  2280. */
  2281. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2282. {
  2283. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2284. ehdr->e_ident[EI_CLASS] = class;
  2285. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2286. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2287. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2288. }
  2289. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2290. unsigned char class)
  2291. {
  2292. struct cnss_qcom_dump_segment *segment;
  2293. void *phdr, *ehdr;
  2294. size_t data_size, offset;
  2295. int phnum = 0;
  2296. void *data;
  2297. void __iomem *ptr;
  2298. if (!segs || list_empty(segs))
  2299. return -EINVAL;
  2300. data_size = sizeof_elf_hdr(class);
  2301. list_for_each_entry(segment, segs, node) {
  2302. data_size += sizeof_elf_phdr(class) + segment->size;
  2303. phnum++;
  2304. }
  2305. data = vmalloc(data_size);
  2306. if (!data)
  2307. return -ENOMEM;
  2308. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2309. ehdr = data;
  2310. memset(ehdr, 0, sizeof_elf_hdr(class));
  2311. init_elf_identification(ehdr, class);
  2312. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2313. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2314. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2315. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2316. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2317. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2318. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2319. phdr = data + sizeof_elf_hdr(class);
  2320. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2321. list_for_each_entry(segment, segs, node) {
  2322. memset(phdr, 0, sizeof_elf_phdr(class));
  2323. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2324. set_phdr_property(phdr, class, p_offset, offset);
  2325. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2326. set_phdr_property(phdr, class, p_paddr, segment->da);
  2327. set_phdr_property(phdr, class, p_filesz, segment->size);
  2328. set_phdr_property(phdr, class, p_memsz, segment->size);
  2329. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2330. set_phdr_property(phdr, class, p_align, 0);
  2331. if (segment->va) {
  2332. memcpy(data + offset, segment->va, segment->size);
  2333. } else {
  2334. ptr = devm_ioremap(dev, segment->da, segment->size);
  2335. if (!ptr) {
  2336. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2337. &segment->da, segment->size);
  2338. memset(data + offset, 0xff, segment->size);
  2339. } else {
  2340. memcpy_fromio(data + offset, ptr,
  2341. segment->size);
  2342. }
  2343. }
  2344. offset += segment->size;
  2345. phdr += sizeof_elf_phdr(class);
  2346. }
  2347. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2348. }
  2349. /* Saving dump to file system is always needed in this case. */
  2350. static bool cnss_dump_enabled(void)
  2351. {
  2352. return true;
  2353. }
  2354. #endif /* CONFIG_QCOM_RAMDUMP */
  2355. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2356. {
  2357. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2358. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2359. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2360. struct qcom_dump_segment *seg;
  2361. struct cnss_dump_meta_info meta_info = {0};
  2362. struct list_head head;
  2363. int i, ret = 0;
  2364. if (!dump_enabled()) {
  2365. cnss_pr_info("Dump collection is not enabled\n");
  2366. return ret;
  2367. }
  2368. INIT_LIST_HEAD(&head);
  2369. for (i = 0; i < dump_data->nentries; i++) {
  2370. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2371. cnss_pr_err("Unsupported dump type: %d",
  2372. dump_seg->type);
  2373. continue;
  2374. }
  2375. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2376. if (!seg)
  2377. continue;
  2378. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2379. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2380. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2381. }
  2382. meta_info.entry[dump_seg->type].entry_num++;
  2383. seg->da = dump_seg->address;
  2384. seg->va = dump_seg->v_address;
  2385. seg->size = dump_seg->size;
  2386. list_add_tail(&seg->node, &head);
  2387. dump_seg++;
  2388. }
  2389. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2390. if (!seg)
  2391. goto do_elf_dump;
  2392. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2393. meta_info.version = CNSS_RAMDUMP_VERSION;
  2394. meta_info.chipset = plat_priv->device_id;
  2395. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2396. seg->va = &meta_info;
  2397. seg->size = sizeof(meta_info);
  2398. list_add(&seg->node, &head);
  2399. do_elf_dump:
  2400. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2401. while (!list_empty(&head)) {
  2402. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2403. list_del(&seg->node);
  2404. kfree(seg);
  2405. }
  2406. return ret;
  2407. }
  2408. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2409. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2410. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2411. {
  2412. struct cnss_ramdump_info *ramdump_info;
  2413. struct msm_dump_entry dump_entry;
  2414. ramdump_info = &plat_priv->ramdump_info;
  2415. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2416. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2417. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2418. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2419. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2420. sizeof(ramdump_info->dump_data.name));
  2421. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2422. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2423. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2424. &dump_entry);
  2425. }
  2426. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2427. {
  2428. int ret = 0;
  2429. struct device *dev;
  2430. struct cnss_ramdump_info *ramdump_info;
  2431. u32 ramdump_size = 0;
  2432. dev = &plat_priv->plat_dev->dev;
  2433. ramdump_info = &plat_priv->ramdump_info;
  2434. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2435. /* dt type: legacy or converged */
  2436. ret = of_property_read_u32(dev->of_node,
  2437. "qcom,wlan-ramdump-dynamic",
  2438. &ramdump_size);
  2439. } else {
  2440. ret = of_property_read_u32(plat_priv->dev_node,
  2441. "qcom,wlan-ramdump-dynamic",
  2442. &ramdump_size);
  2443. }
  2444. if (ret == 0) {
  2445. ramdump_info->ramdump_va =
  2446. dma_alloc_coherent(dev, ramdump_size,
  2447. &ramdump_info->ramdump_pa,
  2448. GFP_KERNEL);
  2449. if (ramdump_info->ramdump_va)
  2450. ramdump_info->ramdump_size = ramdump_size;
  2451. }
  2452. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2453. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2454. if (ramdump_info->ramdump_size == 0) {
  2455. cnss_pr_info("Ramdump will not be collected");
  2456. goto out;
  2457. }
  2458. ret = cnss_init_dump_entry(plat_priv);
  2459. if (ret) {
  2460. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2461. goto free_ramdump;
  2462. }
  2463. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2464. if (!ramdump_info->ramdump_dev) {
  2465. cnss_pr_err("Failed to create ramdump device!");
  2466. ret = -ENOMEM;
  2467. goto free_ramdump;
  2468. }
  2469. return 0;
  2470. free_ramdump:
  2471. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2472. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2473. out:
  2474. return ret;
  2475. }
  2476. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2477. {
  2478. struct device *dev;
  2479. struct cnss_ramdump_info *ramdump_info;
  2480. dev = &plat_priv->plat_dev->dev;
  2481. ramdump_info = &plat_priv->ramdump_info;
  2482. if (ramdump_info->ramdump_dev)
  2483. cnss_destroy_ramdump_device(plat_priv,
  2484. ramdump_info->ramdump_dev);
  2485. if (ramdump_info->ramdump_va)
  2486. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2487. ramdump_info->ramdump_va,
  2488. ramdump_info->ramdump_pa);
  2489. }
  2490. /**
  2491. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2492. * @ret: Error returned by msm_dump_data_register_nominidump
  2493. *
  2494. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2495. * ignore failure.
  2496. *
  2497. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2498. */
  2499. static int cnss_ignore_dump_data_reg_fail(int ret)
  2500. {
  2501. return ret;
  2502. }
  2503. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2504. {
  2505. int ret = 0;
  2506. struct cnss_ramdump_info_v2 *info_v2;
  2507. struct cnss_dump_data *dump_data;
  2508. struct msm_dump_entry dump_entry;
  2509. struct device *dev = &plat_priv->plat_dev->dev;
  2510. u32 ramdump_size = 0;
  2511. info_v2 = &plat_priv->ramdump_info_v2;
  2512. dump_data = &info_v2->dump_data;
  2513. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2514. /* dt type: legacy or converged */
  2515. ret = of_property_read_u32(dev->of_node,
  2516. "qcom,wlan-ramdump-dynamic",
  2517. &ramdump_size);
  2518. } else {
  2519. ret = of_property_read_u32(plat_priv->dev_node,
  2520. "qcom,wlan-ramdump-dynamic",
  2521. &ramdump_size);
  2522. }
  2523. if (ret == 0)
  2524. info_v2->ramdump_size = ramdump_size;
  2525. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2526. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2527. if (!info_v2->dump_data_vaddr)
  2528. return -ENOMEM;
  2529. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2530. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2531. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2532. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2533. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2534. sizeof(dump_data->name));
  2535. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2536. dump_entry.addr = virt_to_phys(dump_data);
  2537. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2538. &dump_entry);
  2539. if (ret) {
  2540. ret = cnss_ignore_dump_data_reg_fail(ret);
  2541. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2542. ret ? "Error" : "Ignoring", ret);
  2543. goto free_ramdump;
  2544. }
  2545. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2546. if (!info_v2->ramdump_dev) {
  2547. cnss_pr_err("Failed to create ramdump device!\n");
  2548. ret = -ENOMEM;
  2549. goto free_ramdump;
  2550. }
  2551. return 0;
  2552. free_ramdump:
  2553. kfree(info_v2->dump_data_vaddr);
  2554. info_v2->dump_data_vaddr = NULL;
  2555. return ret;
  2556. }
  2557. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2558. {
  2559. struct cnss_ramdump_info_v2 *info_v2;
  2560. info_v2 = &plat_priv->ramdump_info_v2;
  2561. if (info_v2->ramdump_dev)
  2562. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2563. kfree(info_v2->dump_data_vaddr);
  2564. info_v2->dump_data_vaddr = NULL;
  2565. info_v2->dump_data_valid = false;
  2566. }
  2567. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2568. {
  2569. int ret = 0;
  2570. switch (plat_priv->device_id) {
  2571. case QCA6174_DEVICE_ID:
  2572. ret = cnss_register_ramdump_v1(plat_priv);
  2573. break;
  2574. case QCA6290_DEVICE_ID:
  2575. case QCA6390_DEVICE_ID:
  2576. case QCA6490_DEVICE_ID:
  2577. case KIWI_DEVICE_ID:
  2578. case MANGO_DEVICE_ID:
  2579. ret = cnss_register_ramdump_v2(plat_priv);
  2580. break;
  2581. default:
  2582. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2583. ret = -ENODEV;
  2584. break;
  2585. }
  2586. return ret;
  2587. }
  2588. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2589. {
  2590. switch (plat_priv->device_id) {
  2591. case QCA6174_DEVICE_ID:
  2592. cnss_unregister_ramdump_v1(plat_priv);
  2593. break;
  2594. case QCA6290_DEVICE_ID:
  2595. case QCA6390_DEVICE_ID:
  2596. case QCA6490_DEVICE_ID:
  2597. case KIWI_DEVICE_ID:
  2598. case MANGO_DEVICE_ID:
  2599. cnss_unregister_ramdump_v2(plat_priv);
  2600. break;
  2601. default:
  2602. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2603. break;
  2604. }
  2605. }
  2606. #else
  2607. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2608. {
  2609. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2610. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2611. struct device *dev = &plat_priv->plat_dev->dev;
  2612. u32 ramdump_size = 0;
  2613. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2614. &ramdump_size) == 0)
  2615. info_v2->ramdump_size = ramdump_size;
  2616. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2617. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2618. if (!info_v2->dump_data_vaddr)
  2619. return -ENOMEM;
  2620. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2621. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2622. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2623. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2624. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2625. sizeof(dump_data->name));
  2626. info_v2->ramdump_dev = dev;
  2627. return 0;
  2628. }
  2629. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2630. {
  2631. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2632. info_v2->ramdump_dev = NULL;
  2633. kfree(info_v2->dump_data_vaddr);
  2634. info_v2->dump_data_vaddr = NULL;
  2635. info_v2->dump_data_valid = false;
  2636. }
  2637. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2638. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2639. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2640. phys_addr_t *pa, unsigned long attrs)
  2641. {
  2642. struct sg_table sgt;
  2643. int ret;
  2644. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2645. if (ret) {
  2646. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2647. va, &dma, size, attrs);
  2648. return -EINVAL;
  2649. }
  2650. *pa = page_to_phys(sg_page(sgt.sgl));
  2651. sg_free_table(&sgt);
  2652. return 0;
  2653. }
  2654. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2655. enum cnss_fw_dump_type type, int seg_no,
  2656. void *va, phys_addr_t pa, size_t size)
  2657. {
  2658. struct md_region md_entry;
  2659. int ret;
  2660. switch (type) {
  2661. case CNSS_FW_IMAGE:
  2662. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2663. seg_no);
  2664. break;
  2665. case CNSS_FW_RDDM:
  2666. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2667. seg_no);
  2668. break;
  2669. case CNSS_FW_REMOTE_HEAP:
  2670. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2671. seg_no);
  2672. break;
  2673. default:
  2674. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2675. return -EINVAL;
  2676. }
  2677. md_entry.phys_addr = pa;
  2678. md_entry.virt_addr = (uintptr_t)va;
  2679. md_entry.size = size;
  2680. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2681. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2682. md_entry.name, va, &pa, size);
  2683. ret = msm_minidump_add_region(&md_entry);
  2684. if (ret < 0)
  2685. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2686. return ret;
  2687. }
  2688. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2689. enum cnss_fw_dump_type type, int seg_no,
  2690. void *va, phys_addr_t pa, size_t size)
  2691. {
  2692. struct md_region md_entry;
  2693. int ret;
  2694. switch (type) {
  2695. case CNSS_FW_IMAGE:
  2696. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2697. seg_no);
  2698. break;
  2699. case CNSS_FW_RDDM:
  2700. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2701. seg_no);
  2702. break;
  2703. case CNSS_FW_REMOTE_HEAP:
  2704. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2705. seg_no);
  2706. break;
  2707. default:
  2708. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2709. return -EINVAL;
  2710. }
  2711. md_entry.phys_addr = pa;
  2712. md_entry.virt_addr = (uintptr_t)va;
  2713. md_entry.size = size;
  2714. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2715. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2716. md_entry.name, va, &pa, size);
  2717. ret = msm_minidump_remove_region(&md_entry);
  2718. if (ret)
  2719. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2720. ret);
  2721. return ret;
  2722. }
  2723. #else
  2724. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2725. phys_addr_t *pa, unsigned long attrs)
  2726. {
  2727. return 0;
  2728. }
  2729. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2730. enum cnss_fw_dump_type type, int seg_no,
  2731. void *va, phys_addr_t pa, size_t size)
  2732. {
  2733. return 0;
  2734. }
  2735. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2736. enum cnss_fw_dump_type type, int seg_no,
  2737. void *va, phys_addr_t pa, size_t size)
  2738. {
  2739. return 0;
  2740. }
  2741. #endif /* CONFIG_QCOM_MINIDUMP */
  2742. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2743. const struct firmware **fw_entry,
  2744. const char *filename)
  2745. {
  2746. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2747. return request_firmware_direct(fw_entry, filename,
  2748. &plat_priv->plat_dev->dev);
  2749. else
  2750. return firmware_request_nowarn(fw_entry, filename,
  2751. &plat_priv->plat_dev->dev);
  2752. }
  2753. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2754. /**
  2755. * cnss_register_bus_scale() - Setup interconnect voting data
  2756. * @plat_priv: Platform data structure
  2757. *
  2758. * For different interconnect path configured in device tree setup voting data
  2759. * for list of bandwidth requirements.
  2760. *
  2761. * Result: 0 for success. -EINVAL if not configured
  2762. */
  2763. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2764. {
  2765. int ret = -EINVAL;
  2766. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  2767. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2768. struct device *dev = &plat_priv->plat_dev->dev;
  2769. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  2770. ret = of_property_read_u32(dev->of_node,
  2771. "qcom,icc-path-count",
  2772. &plat_priv->icc.path_count);
  2773. if (ret) {
  2774. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  2775. return 0;
  2776. }
  2777. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  2778. "qcom,bus-bw-cfg-count",
  2779. &plat_priv->icc.bus_bw_cfg_count);
  2780. if (ret) {
  2781. cnss_pr_err("Failed to get Bus BW Config table size\n");
  2782. goto cleanup;
  2783. }
  2784. cfg_arr_size = plat_priv->icc.path_count *
  2785. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  2786. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  2787. if (!cfg_arr) {
  2788. cnss_pr_err("Failed to alloc cfg table mem\n");
  2789. ret = -ENOMEM;
  2790. goto cleanup;
  2791. }
  2792. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  2793. "qcom,bus-bw-cfg", cfg_arr,
  2794. cfg_arr_size);
  2795. if (ret) {
  2796. cnss_pr_err("Invalid Bus BW Config Table\n");
  2797. goto cleanup;
  2798. }
  2799. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  2800. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  2801. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  2802. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  2803. GFP_KERNEL);
  2804. if (!bus_bw_info) {
  2805. ret = -ENOMEM;
  2806. goto out;
  2807. }
  2808. ret = of_property_read_string_index(dev->of_node,
  2809. "interconnect-names", idx,
  2810. &bus_bw_info->icc_name);
  2811. if (ret)
  2812. goto out;
  2813. bus_bw_info->icc_path =
  2814. of_icc_get(&plat_priv->plat_dev->dev,
  2815. bus_bw_info->icc_name);
  2816. if (IS_ERR(bus_bw_info->icc_path)) {
  2817. ret = PTR_ERR(bus_bw_info->icc_path);
  2818. if (ret != -EPROBE_DEFER) {
  2819. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  2820. bus_bw_info->icc_name, ret);
  2821. goto out;
  2822. }
  2823. }
  2824. bus_bw_info->cfg_table =
  2825. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  2826. sizeof(*bus_bw_info->cfg_table),
  2827. GFP_KERNEL);
  2828. if (!bus_bw_info->cfg_table) {
  2829. ret = -ENOMEM;
  2830. goto out;
  2831. }
  2832. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  2833. bus_bw_info->icc_name);
  2834. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  2835. CNSS_ICC_VOTE_MAX);
  2836. i < plat_priv->icc.bus_bw_cfg_count;
  2837. i++, j += 2) {
  2838. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  2839. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  2840. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  2841. i, bus_bw_info->cfg_table[i].avg_bw,
  2842. bus_bw_info->cfg_table[i].peak_bw);
  2843. }
  2844. list_add_tail(&bus_bw_info->list,
  2845. &plat_priv->icc.list_head);
  2846. }
  2847. kfree(cfg_arr);
  2848. return 0;
  2849. out:
  2850. list_for_each_entry_safe(bus_bw_info, tmp,
  2851. &plat_priv->icc.list_head, list) {
  2852. list_del(&bus_bw_info->list);
  2853. }
  2854. cleanup:
  2855. kfree(cfg_arr);
  2856. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2857. return ret;
  2858. }
  2859. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  2860. {
  2861. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2862. list_for_each_entry_safe(bus_bw_info, tmp,
  2863. &plat_priv->icc.list_head, list) {
  2864. list_del(&bus_bw_info->list);
  2865. if (bus_bw_info->icc_path)
  2866. icc_put(bus_bw_info->icc_path);
  2867. }
  2868. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2869. }
  2870. #else
  2871. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2872. {
  2873. return 0;
  2874. }
  2875. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  2876. #endif /* CONFIG_INTERCONNECT */
  2877. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  2878. {
  2879. struct cnss_plat_data *plat_priv = cb_ctx;
  2880. if (!plat_priv) {
  2881. cnss_pr_err("%s: Invalid context\n", __func__);
  2882. return;
  2883. }
  2884. if (status) {
  2885. cnss_pr_info("CNSS Daemon connected\n");
  2886. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2887. complete(&plat_priv->daemon_connected);
  2888. } else {
  2889. cnss_pr_info("CNSS Daemon disconnected\n");
  2890. reinit_completion(&plat_priv->daemon_connected);
  2891. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2892. }
  2893. }
  2894. static ssize_t enable_hds_store(struct device *dev,
  2895. struct device_attribute *attr,
  2896. const char *buf, size_t count)
  2897. {
  2898. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2899. unsigned int enable_hds = 0;
  2900. if (!plat_priv)
  2901. return -ENODEV;
  2902. if (sscanf(buf, "%du", &enable_hds) != 1) {
  2903. cnss_pr_err("Invalid enable_hds sysfs command\n");
  2904. return -EINVAL;
  2905. }
  2906. if (enable_hds)
  2907. plat_priv->hds_enabled = true;
  2908. else
  2909. plat_priv->hds_enabled = false;
  2910. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  2911. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  2912. return count;
  2913. }
  2914. static ssize_t recovery_show(struct device *dev,
  2915. struct device_attribute *attr,
  2916. char *buf)
  2917. {
  2918. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2919. u32 buf_size = PAGE_SIZE;
  2920. u32 curr_len = 0;
  2921. u32 buf_written = 0;
  2922. if (!plat_priv)
  2923. return -ENODEV;
  2924. buf_written = scnprintf(buf, buf_size,
  2925. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  2926. "BIT0 -- wlan fw recovery\n"
  2927. "BIT1 -- wlan pcss recovery\n"
  2928. "---------------------------------\n");
  2929. curr_len += buf_written;
  2930. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2931. "WLAN recovery %s[%d]\n",
  2932. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  2933. plat_priv->recovery_enabled);
  2934. curr_len += buf_written;
  2935. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2936. "WLAN PCSS recovery %s[%d]\n",
  2937. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  2938. plat_priv->recovery_pcss_enabled);
  2939. curr_len += buf_written;
  2940. /*
  2941. * Now size of curr_len is not over page size for sure,
  2942. * later if new item or none-fixed size item added, need
  2943. * add check to make sure curr_len is not over page size.
  2944. */
  2945. return curr_len;
  2946. }
  2947. static ssize_t time_sync_period_show(struct device *dev,
  2948. struct device_attribute *attr,
  2949. char *buf)
  2950. {
  2951. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2952. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  2953. plat_priv->ctrl_params.time_sync_period);
  2954. }
  2955. static ssize_t time_sync_period_store(struct device *dev,
  2956. struct device_attribute *attr,
  2957. const char *buf, size_t count)
  2958. {
  2959. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2960. unsigned int time_sync_period = 0;
  2961. if (!plat_priv)
  2962. return -ENODEV;
  2963. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  2964. cnss_pr_err("Invalid time sync sysfs command\n");
  2965. return -EINVAL;
  2966. }
  2967. if (time_sync_period >= CNSS_MIN_TIME_SYNC_PERIOD)
  2968. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  2969. return count;
  2970. }
  2971. static ssize_t recovery_store(struct device *dev,
  2972. struct device_attribute *attr,
  2973. const char *buf, size_t count)
  2974. {
  2975. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2976. unsigned int recovery = 0;
  2977. int ret;
  2978. if (!plat_priv)
  2979. return -ENODEV;
  2980. if (sscanf(buf, "%du", &recovery) != 1) {
  2981. cnss_pr_err("Invalid recovery sysfs command\n");
  2982. return -EINVAL;
  2983. }
  2984. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  2985. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  2986. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  2987. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  2988. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  2989. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  2990. ret = cnss_send_subsys_restart_level_msg(plat_priv);
  2991. if (ret < 0) {
  2992. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  2993. plat_priv->recovery_pcss_enabled = false;
  2994. return -EINVAL;
  2995. }
  2996. return count;
  2997. }
  2998. static ssize_t shutdown_store(struct device *dev,
  2999. struct device_attribute *attr,
  3000. const char *buf, size_t count)
  3001. {
  3002. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3003. if (plat_priv) {
  3004. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3005. del_timer(&plat_priv->fw_boot_timer);
  3006. complete_all(&plat_priv->power_up_complete);
  3007. complete_all(&plat_priv->cal_complete);
  3008. }
  3009. cnss_pr_dbg("Received shutdown notification\n");
  3010. return count;
  3011. }
  3012. static ssize_t fs_ready_store(struct device *dev,
  3013. struct device_attribute *attr,
  3014. const char *buf, size_t count)
  3015. {
  3016. int fs_ready = 0;
  3017. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3018. if (sscanf(buf, "%du", &fs_ready) != 1)
  3019. return -EINVAL;
  3020. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3021. fs_ready, count);
  3022. if (!plat_priv) {
  3023. cnss_pr_err("plat_priv is NULL\n");
  3024. return count;
  3025. }
  3026. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3027. cnss_pr_dbg("QMI is bypassed\n");
  3028. return count;
  3029. }
  3030. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3031. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3032. cnss_driver_event_post(plat_priv,
  3033. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3034. 0, NULL);
  3035. }
  3036. return count;
  3037. }
  3038. static ssize_t qdss_trace_start_store(struct device *dev,
  3039. struct device_attribute *attr,
  3040. const char *buf, size_t count)
  3041. {
  3042. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3043. wlfw_qdss_trace_start(plat_priv);
  3044. cnss_pr_dbg("Received QDSS start command\n");
  3045. return count;
  3046. }
  3047. static ssize_t qdss_trace_stop_store(struct device *dev,
  3048. struct device_attribute *attr,
  3049. const char *buf, size_t count)
  3050. {
  3051. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3052. u32 option = 0;
  3053. if (sscanf(buf, "%du", &option) != 1)
  3054. return -EINVAL;
  3055. wlfw_qdss_trace_stop(plat_priv, option);
  3056. cnss_pr_dbg("Received QDSS stop command\n");
  3057. return count;
  3058. }
  3059. static ssize_t qdss_conf_download_store(struct device *dev,
  3060. struct device_attribute *attr,
  3061. const char *buf, size_t count)
  3062. {
  3063. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3064. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3065. cnss_pr_dbg("Received QDSS download config command\n");
  3066. return count;
  3067. }
  3068. static ssize_t hw_trace_override_store(struct device *dev,
  3069. struct device_attribute *attr,
  3070. const char *buf, size_t count)
  3071. {
  3072. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3073. int tmp = 0;
  3074. if (sscanf(buf, "%du", &tmp) != 1)
  3075. return -EINVAL;
  3076. plat_priv->hw_trc_override = tmp;
  3077. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3078. return count;
  3079. }
  3080. static ssize_t charger_mode_store(struct device *dev,
  3081. struct device_attribute *attr,
  3082. const char *buf, size_t count)
  3083. {
  3084. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3085. int tmp = 0;
  3086. if (sscanf(buf, "%du", &tmp) != 1)
  3087. return -EINVAL;
  3088. plat_priv->charger_mode = tmp;
  3089. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3090. return count;
  3091. }
  3092. static DEVICE_ATTR_WO(fs_ready);
  3093. static DEVICE_ATTR_WO(shutdown);
  3094. static DEVICE_ATTR_RW(recovery);
  3095. static DEVICE_ATTR_WO(enable_hds);
  3096. static DEVICE_ATTR_WO(qdss_trace_start);
  3097. static DEVICE_ATTR_WO(qdss_trace_stop);
  3098. static DEVICE_ATTR_WO(qdss_conf_download);
  3099. static DEVICE_ATTR_WO(hw_trace_override);
  3100. static DEVICE_ATTR_WO(charger_mode);
  3101. static DEVICE_ATTR_RW(time_sync_period);
  3102. static struct attribute *cnss_attrs[] = {
  3103. &dev_attr_fs_ready.attr,
  3104. &dev_attr_shutdown.attr,
  3105. &dev_attr_recovery.attr,
  3106. &dev_attr_enable_hds.attr,
  3107. &dev_attr_qdss_trace_start.attr,
  3108. &dev_attr_qdss_trace_stop.attr,
  3109. &dev_attr_qdss_conf_download.attr,
  3110. &dev_attr_hw_trace_override.attr,
  3111. &dev_attr_charger_mode.attr,
  3112. &dev_attr_time_sync_period.attr,
  3113. NULL,
  3114. };
  3115. static struct attribute_group cnss_attr_group = {
  3116. .attrs = cnss_attrs,
  3117. };
  3118. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3119. {
  3120. struct device *dev = &plat_priv->plat_dev->dev;
  3121. int ret;
  3122. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "cnss");
  3123. if (ret) {
  3124. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3125. ret);
  3126. goto out;
  3127. }
  3128. /* This is only for backward compatibility. */
  3129. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "shutdown_wlan");
  3130. if (ret) {
  3131. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3132. ret);
  3133. goto rm_cnss_link;
  3134. }
  3135. return 0;
  3136. rm_cnss_link:
  3137. sysfs_remove_link(kernel_kobj, "cnss");
  3138. out:
  3139. return ret;
  3140. }
  3141. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3142. {
  3143. sysfs_remove_link(kernel_kobj, "shutdown_wlan");
  3144. sysfs_remove_link(kernel_kobj, "cnss");
  3145. }
  3146. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3147. {
  3148. int ret = 0;
  3149. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3150. &cnss_attr_group);
  3151. if (ret) {
  3152. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3153. ret);
  3154. goto out;
  3155. }
  3156. cnss_create_sysfs_link(plat_priv);
  3157. return 0;
  3158. out:
  3159. return ret;
  3160. }
  3161. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3162. {
  3163. cnss_remove_sysfs_link(plat_priv);
  3164. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3165. }
  3166. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3167. {
  3168. spin_lock_init(&plat_priv->event_lock);
  3169. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3170. WQ_UNBOUND, 1);
  3171. if (!plat_priv->event_wq) {
  3172. cnss_pr_err("Failed to create event workqueue!\n");
  3173. return -EFAULT;
  3174. }
  3175. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3176. INIT_LIST_HEAD(&plat_priv->event_list);
  3177. return 0;
  3178. }
  3179. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3180. {
  3181. destroy_workqueue(plat_priv->event_wq);
  3182. }
  3183. static int cnss_reboot_notifier(struct notifier_block *nb,
  3184. unsigned long action,
  3185. void *data)
  3186. {
  3187. struct cnss_plat_data *plat_priv =
  3188. container_of(nb, struct cnss_plat_data, reboot_nb);
  3189. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3190. del_timer(&plat_priv->fw_boot_timer);
  3191. complete_all(&plat_priv->power_up_complete);
  3192. complete_all(&plat_priv->cal_complete);
  3193. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3194. return NOTIFY_DONE;
  3195. }
  3196. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3197. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3198. {
  3199. struct Object client_env;
  3200. struct Object app_object;
  3201. u32 wifi_uid = HW_WIFI_UID;
  3202. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3203. int ret;
  3204. u8 state = 0;
  3205. /* Once this flag is set, secure peripheral feature
  3206. * will not be supported till next reboot
  3207. */
  3208. if (plat_priv->sec_peri_feature_disable)
  3209. return 0;
  3210. /* get rootObj */
  3211. ret = get_client_env_object(&client_env);
  3212. if (ret) {
  3213. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3214. goto end;
  3215. }
  3216. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3217. if (ret) {
  3218. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3219. if (ret == FEATURE_NOT_SUPPORTED) {
  3220. ret = 0; /* Do not Assert */
  3221. plat_priv->sec_peri_feature_disable = true;
  3222. cnss_pr_dbg("Secure HW feature not supported\n");
  3223. }
  3224. goto exit_release_clientenv;
  3225. }
  3226. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3227. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3228. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3229. ObjectCounts_pack(1, 1, 0, 0));
  3230. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3231. if (ret) {
  3232. if (ret == PERIPHERAL_NOT_FOUND) {
  3233. ret = 0; /* Do not Assert */
  3234. plat_priv->sec_peri_feature_disable = true;
  3235. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3236. }
  3237. goto exit_release_app_obj;
  3238. }
  3239. if (state == 1)
  3240. set_bit(CNSS_WLAN_HW_DISABLED,
  3241. &plat_priv->driver_state);
  3242. else
  3243. clear_bit(CNSS_WLAN_HW_DISABLED,
  3244. &plat_priv->driver_state);
  3245. exit_release_app_obj:
  3246. Object_release(app_object);
  3247. exit_release_clientenv:
  3248. Object_release(client_env);
  3249. end:
  3250. if (ret) {
  3251. cnss_pr_err("Unable to get HW disable status\n");
  3252. CNSS_ASSERT(0);
  3253. }
  3254. return ret;
  3255. }
  3256. #else
  3257. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3258. {
  3259. return 0;
  3260. }
  3261. #endif
  3262. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3263. {
  3264. int ret;
  3265. ret = cnss_init_sol_gpio(plat_priv);
  3266. if (ret)
  3267. return ret;
  3268. timer_setup(&plat_priv->fw_boot_timer,
  3269. cnss_bus_fw_boot_timeout_hdlr, 0);
  3270. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3271. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3272. if (ret)
  3273. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3274. ret);
  3275. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3276. if (ret)
  3277. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3278. ret);
  3279. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3280. init_completion(&plat_priv->power_up_complete);
  3281. init_completion(&plat_priv->cal_complete);
  3282. init_completion(&plat_priv->rddm_complete);
  3283. init_completion(&plat_priv->recovery_complete);
  3284. init_completion(&plat_priv->daemon_connected);
  3285. mutex_init(&plat_priv->dev_lock);
  3286. mutex_init(&plat_priv->driver_ops_lock);
  3287. plat_priv->recovery_ws =
  3288. wakeup_source_register(&plat_priv->plat_dev->dev,
  3289. "CNSS_FW_RECOVERY");
  3290. if (!plat_priv->recovery_ws)
  3291. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3292. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3293. cnss_daemon_connection_update_cb,
  3294. plat_priv);
  3295. if (ret)
  3296. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3297. ret);
  3298. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3299. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3300. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3301. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3302. "qcom,rc-ep-short-channel"))
  3303. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  3304. return 0;
  3305. }
  3306. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3307. {
  3308. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3309. plat_priv);
  3310. complete_all(&plat_priv->recovery_complete);
  3311. complete_all(&plat_priv->rddm_complete);
  3312. complete_all(&plat_priv->cal_complete);
  3313. complete_all(&plat_priv->power_up_complete);
  3314. complete_all(&plat_priv->daemon_connected);
  3315. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3316. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3317. del_timer(&plat_priv->fw_boot_timer);
  3318. wakeup_source_unregister(plat_priv->recovery_ws);
  3319. cnss_deinit_sol_gpio(plat_priv);
  3320. kfree(plat_priv->sram_dump);
  3321. }
  3322. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3323. {
  3324. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3325. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3326. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3327. "qcom,wlan-cbc-enabled");
  3328. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3329. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3330. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3331. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3332. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3333. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3334. * enabled by default
  3335. */
  3336. plat_priv->adsp_pc_enabled = true;
  3337. }
  3338. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3339. {
  3340. struct device *dev = &plat_priv->plat_dev->dev;
  3341. plat_priv->use_pm_domain =
  3342. of_property_read_bool(dev->of_node, "use-pm-domain");
  3343. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3344. }
  3345. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3346. {
  3347. struct device *dev = &plat_priv->plat_dev->dev;
  3348. plat_priv->set_wlaon_pwr_ctrl =
  3349. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3350. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3351. plat_priv->set_wlaon_pwr_ctrl);
  3352. }
  3353. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3354. {
  3355. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3356. "qcom,converged-dt") ||
  3357. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3358. "qcom,same-dt-multi-dev") ||
  3359. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3360. "qcom,multi-wlan-exchg"));
  3361. }
  3362. static const struct platform_device_id cnss_platform_id_table[] = {
  3363. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3364. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3365. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3366. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3367. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3368. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3369. { .name = "qcaconv", .driver_data = 0, },
  3370. { },
  3371. };
  3372. static const struct of_device_id cnss_of_match_table[] = {
  3373. {
  3374. .compatible = "qcom,cnss",
  3375. .data = (void *)&cnss_platform_id_table[0]},
  3376. {
  3377. .compatible = "qcom,cnss-qca6290",
  3378. .data = (void *)&cnss_platform_id_table[1]},
  3379. {
  3380. .compatible = "qcom,cnss-qca6390",
  3381. .data = (void *)&cnss_platform_id_table[2]},
  3382. {
  3383. .compatible = "qcom,cnss-qca6490",
  3384. .data = (void *)&cnss_platform_id_table[3]},
  3385. {
  3386. .compatible = "qcom,cnss-kiwi",
  3387. .data = (void *)&cnss_platform_id_table[4]},
  3388. {
  3389. .compatible = "qcom,cnss-mango",
  3390. .data = (void *)&cnss_platform_id_table[5]},
  3391. {
  3392. .compatible = "qcom,cnss-qca-converged",
  3393. .data = (void *)&cnss_platform_id_table[6]},
  3394. { },
  3395. };
  3396. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3397. static inline bool
  3398. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3399. {
  3400. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3401. "use-nv-mac");
  3402. }
  3403. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3404. {
  3405. struct device_node *child;
  3406. u32 id, i;
  3407. int id_n, device_identifier_gpio, ret;
  3408. u8 gpio_value;
  3409. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  3410. return 0;
  3411. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3412. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3413. if (ret) {
  3414. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3415. return ret;
  3416. }
  3417. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3418. gpio_value = gpio_get_value(device_identifier_gpio);
  3419. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3420. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3421. child) {
  3422. if (strcmp(child->name, "chip_cfg"))
  3423. continue;
  3424. id_n = of_property_count_u32_elems(child, "supported-ids");
  3425. if (id_n <= 0) {
  3426. cnss_pr_err("Device id is NOT set\n");
  3427. return -EINVAL;
  3428. }
  3429. for (i = 0; i < id_n; i++) {
  3430. ret = of_property_read_u32_index(child,
  3431. "supported-ids",
  3432. i, &id);
  3433. if (ret) {
  3434. cnss_pr_err("Failed to read supported ids\n");
  3435. return -EINVAL;
  3436. }
  3437. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3438. plat_priv->plat_dev->dev.of_node = child;
  3439. plat_priv->device_id = QCA6490_DEVICE_ID;
  3440. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3441. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3442. child->name, i, id);
  3443. return 0;
  3444. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3445. plat_priv->plat_dev->dev.of_node = child;
  3446. plat_priv->device_id = KIWI_DEVICE_ID;
  3447. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3448. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3449. child->name, i, id);
  3450. return 0;
  3451. }
  3452. }
  3453. }
  3454. return -EINVAL;
  3455. }
  3456. static inline u32
  3457. cnss_dt_type(struct cnss_plat_data *plat_priv)
  3458. {
  3459. bool is_converged_dt = of_property_read_bool(
  3460. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  3461. bool is_multi_wlan_xchg;
  3462. if (is_converged_dt)
  3463. return CNSS_DTT_CONVERGED;
  3464. is_multi_wlan_xchg = of_property_read_bool(
  3465. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  3466. if (is_multi_wlan_xchg)
  3467. return CNSS_DTT_MULTIEXCHG;
  3468. return CNSS_DTT_LEGACY;
  3469. }
  3470. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3471. {
  3472. int ret = 0;
  3473. int retry = 0;
  3474. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3475. return 0;
  3476. retry:
  3477. ret = cnss_power_on_device(plat_priv);
  3478. if (ret)
  3479. goto end;
  3480. ret = cnss_bus_init(plat_priv);
  3481. if (ret) {
  3482. if ((ret != -EPROBE_DEFER) &&
  3483. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3484. cnss_power_off_device(plat_priv);
  3485. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3486. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3487. goto retry;
  3488. }
  3489. goto power_off;
  3490. }
  3491. return 0;
  3492. power_off:
  3493. cnss_power_off_device(plat_priv);
  3494. end:
  3495. return ret;
  3496. }
  3497. int cnss_wlan_hw_enable(void)
  3498. {
  3499. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3500. int ret = 0;
  3501. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3502. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  3503. goto register_driver;
  3504. ret = cnss_wlan_device_init(plat_priv);
  3505. if (ret) {
  3506. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  3507. CNSS_ASSERT(0);
  3508. return ret;
  3509. }
  3510. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  3511. cnss_driver_event_post(plat_priv,
  3512. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3513. 0, NULL);
  3514. register_driver:
  3515. if (plat_priv->driver_ops)
  3516. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  3517. return ret;
  3518. }
  3519. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  3520. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  3521. {
  3522. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3523. int ret = 0;
  3524. if (!plat_priv)
  3525. return -ENODEV;
  3526. /* If IMS server is connected, return success without QMI send */
  3527. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  3528. cnss_pr_dbg("Ignore host request as IMS server is connected");
  3529. return ret;
  3530. }
  3531. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  3532. return ret;
  3533. }
  3534. EXPORT_SYMBOL(cnss_set_wfc_mode);
  3535. static int cnss_probe(struct platform_device *plat_dev)
  3536. {
  3537. int ret = 0;
  3538. struct cnss_plat_data *plat_priv;
  3539. const struct of_device_id *of_id;
  3540. const struct platform_device_id *device_id;
  3541. if (cnss_get_plat_priv(plat_dev)) {
  3542. cnss_pr_err("Driver is already initialized!\n");
  3543. ret = -EEXIST;
  3544. goto out;
  3545. }
  3546. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  3547. if (!of_id || !of_id->data) {
  3548. cnss_pr_err("Failed to find of match device!\n");
  3549. ret = -ENODEV;
  3550. goto out;
  3551. }
  3552. device_id = of_id->data;
  3553. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  3554. GFP_KERNEL);
  3555. if (!plat_priv) {
  3556. ret = -ENOMEM;
  3557. goto out;
  3558. }
  3559. plat_priv->plat_dev = plat_dev;
  3560. plat_priv->dev_node = NULL;
  3561. plat_priv->device_id = device_id->driver_data;
  3562. plat_priv->dt_type = cnss_dt_type(plat_priv);
  3563. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  3564. plat_priv->dt_type);
  3565. plat_priv->use_fw_path_with_prefix =
  3566. cnss_use_fw_path_with_prefix(plat_priv);
  3567. ret = cnss_get_dev_cfg_node(plat_priv);
  3568. if (ret) {
  3569. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  3570. goto reset_plat_dev;
  3571. }
  3572. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  3573. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  3574. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  3575. cnss_set_plat_priv(plat_dev, plat_priv);
  3576. platform_set_drvdata(plat_dev, plat_priv);
  3577. INIT_LIST_HEAD(&plat_priv->vreg_list);
  3578. INIT_LIST_HEAD(&plat_priv->clk_list);
  3579. cnss_get_pm_domain_info(plat_priv);
  3580. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  3581. cnss_power_misc_params_init(plat_priv);
  3582. cnss_get_tcs_info(plat_priv);
  3583. cnss_get_cpr_info(plat_priv);
  3584. cnss_aop_mbox_init(plat_priv);
  3585. cnss_init_control_params(plat_priv);
  3586. ret = cnss_get_resources(plat_priv);
  3587. if (ret)
  3588. goto reset_ctx;
  3589. ret = cnss_register_esoc(plat_priv);
  3590. if (ret)
  3591. goto free_res;
  3592. ret = cnss_register_bus_scale(plat_priv);
  3593. if (ret)
  3594. goto unreg_esoc;
  3595. ret = cnss_create_sysfs(plat_priv);
  3596. if (ret)
  3597. goto unreg_bus_scale;
  3598. ret = cnss_event_work_init(plat_priv);
  3599. if (ret)
  3600. goto remove_sysfs;
  3601. ret = cnss_qmi_init(plat_priv);
  3602. if (ret)
  3603. goto deinit_event_work;
  3604. ret = cnss_dms_init(plat_priv);
  3605. if (ret)
  3606. goto deinit_qmi;
  3607. ret = cnss_debugfs_create(plat_priv);
  3608. if (ret)
  3609. goto deinit_dms;
  3610. ret = cnss_misc_init(plat_priv);
  3611. if (ret)
  3612. goto destroy_debugfs;
  3613. ret = cnss_wlan_hw_disable_check(plat_priv);
  3614. if (ret)
  3615. goto deinit_misc;
  3616. /* Make sure all platform related init are done before
  3617. * device power on and bus init.
  3618. */
  3619. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  3620. ret = cnss_wlan_device_init(plat_priv);
  3621. if (ret)
  3622. goto deinit_misc;
  3623. } else {
  3624. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  3625. }
  3626. cnss_register_coex_service(plat_priv);
  3627. cnss_register_ims_service(plat_priv);
  3628. ret = cnss_genl_init();
  3629. if (ret < 0)
  3630. cnss_pr_err("CNSS genl init failed %d\n", ret);
  3631. cnss_pr_info("Platform driver probed successfully.\n");
  3632. return 0;
  3633. deinit_misc:
  3634. cnss_misc_deinit(plat_priv);
  3635. destroy_debugfs:
  3636. cnss_debugfs_destroy(plat_priv);
  3637. deinit_dms:
  3638. cnss_dms_deinit(plat_priv);
  3639. deinit_qmi:
  3640. cnss_qmi_deinit(plat_priv);
  3641. deinit_event_work:
  3642. cnss_event_work_deinit(plat_priv);
  3643. remove_sysfs:
  3644. cnss_remove_sysfs(plat_priv);
  3645. unreg_bus_scale:
  3646. cnss_unregister_bus_scale(plat_priv);
  3647. unreg_esoc:
  3648. cnss_unregister_esoc(plat_priv);
  3649. free_res:
  3650. cnss_put_resources(plat_priv);
  3651. reset_ctx:
  3652. platform_set_drvdata(plat_dev, NULL);
  3653. reset_plat_dev:
  3654. cnss_set_plat_priv(plat_dev, NULL);
  3655. out:
  3656. return ret;
  3657. }
  3658. static int cnss_remove(struct platform_device *plat_dev)
  3659. {
  3660. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  3661. plat_priv->audio_iommu_domain = NULL;
  3662. cnss_genl_exit();
  3663. cnss_unregister_ims_service(plat_priv);
  3664. cnss_unregister_coex_service(plat_priv);
  3665. cnss_bus_deinit(plat_priv);
  3666. cnss_misc_deinit(plat_priv);
  3667. cnss_debugfs_destroy(plat_priv);
  3668. cnss_dms_deinit(plat_priv);
  3669. cnss_qmi_deinit(plat_priv);
  3670. cnss_event_work_deinit(plat_priv);
  3671. cnss_cancel_dms_work();
  3672. cnss_remove_sysfs(plat_priv);
  3673. cnss_unregister_bus_scale(plat_priv);
  3674. cnss_unregister_esoc(plat_priv);
  3675. cnss_put_resources(plat_priv);
  3676. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  3677. mbox_free_channel(plat_priv->mbox_chan);
  3678. platform_set_drvdata(plat_dev, NULL);
  3679. plat_env = NULL;
  3680. return 0;
  3681. }
  3682. static struct platform_driver cnss_platform_driver = {
  3683. .probe = cnss_probe,
  3684. .remove = cnss_remove,
  3685. .driver = {
  3686. .name = "cnss2",
  3687. .of_match_table = cnss_of_match_table,
  3688. #ifdef CONFIG_CNSS_ASYNC
  3689. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3690. #endif
  3691. },
  3692. };
  3693. static bool cnss_check_compatible_node(void)
  3694. {
  3695. struct device_node *dn = NULL;
  3696. for_each_matching_node(dn, cnss_of_match_table) {
  3697. if (of_device_is_available(dn)) {
  3698. cnss_allow_driver_loading = true;
  3699. return true;
  3700. }
  3701. }
  3702. return false;
  3703. }
  3704. /**
  3705. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  3706. *
  3707. * Valid device tree node means a node with "compatible" property from the
  3708. * device match table and "status" property is not disabled.
  3709. *
  3710. * Return: true if valid device tree node found, false if not found
  3711. */
  3712. static bool cnss_is_valid_dt_node_found(void)
  3713. {
  3714. struct device_node *dn = NULL;
  3715. for_each_matching_node(dn, cnss_of_match_table) {
  3716. if (of_device_is_available(dn))
  3717. break;
  3718. }
  3719. if (dn)
  3720. return true;
  3721. return false;
  3722. }
  3723. static int __init cnss_initialize(void)
  3724. {
  3725. int ret = 0;
  3726. if (!cnss_is_valid_dt_node_found())
  3727. return -ENODEV;
  3728. if (!cnss_check_compatible_node())
  3729. return ret;
  3730. cnss_debug_init();
  3731. ret = platform_driver_register(&cnss_platform_driver);
  3732. if (ret)
  3733. cnss_debug_deinit();
  3734. return ret;
  3735. }
  3736. static void __exit cnss_exit(void)
  3737. {
  3738. platform_driver_unregister(&cnss_platform_driver);
  3739. cnss_debug_deinit();
  3740. }
  3741. module_init(cnss_initialize);
  3742. module_exit(cnss_exit);
  3743. MODULE_LICENSE("GPL v2");
  3744. MODULE_DESCRIPTION("CNSS2 Platform Driver");